merge intel x86 patches into gingerbread branch
diff --git a/android-arm/kernel/kernel-qemu b/android-arm/kernel/kernel-qemu
index 69f7340..c3b341e 100755
--- a/android-arm/kernel/kernel-qemu
+++ b/android-arm/kernel/kernel-qemu
Binary files differ
diff --git a/android-arm/kernel/kernel-qemu-armv7 b/android-arm/kernel/kernel-qemu-armv7
index 3193300..1295a00 100755
--- a/android-arm/kernel/kernel-qemu-armv7
+++ b/android-arm/kernel/kernel-qemu-armv7
Binary files differ
diff --git a/android-arm/kernel/vmlinux-qemu b/android-arm/kernel/vmlinux-qemu
index 110cc3e..8e244cb 100755
--- a/android-arm/kernel/vmlinux-qemu
+++ b/android-arm/kernel/vmlinux-qemu
Binary files differ
diff --git a/android-arm/kernel/vmlinux-qemu-armv7 b/android-arm/kernel/vmlinux-qemu-armv7
index bc55840..f7a26cf 100755
--- a/android-arm/kernel/vmlinux-qemu-armv7
+++ b/android-arm/kernel/vmlinux-qemu-armv7
Binary files differ
diff --git a/android-x86/kernel/README b/android-x86/kernel/README
index 454c269..c895fe8 100644
--- a/android-x86/kernel/README
+++ b/android-x86/kernel/README
@@ -2,6 +2,10 @@
the kernel from which you wish to boot. The same kernel is used for the
installer_dvi image as well as for the boot kernel.
-The file 'kernel_config_VirtualBox' is a .config file for the Android
-2.6.32 kernel tree that can boot and run fairly well using VirtualBox.
+To rebuild the kernel, use external/qemu/distrib/build-kernel.sh
+/path/to/build-kernel.sh --arch=x86 -> full_x86 image (for QEMU)
+/path/to/build-kernel.sh --arch=x86 --config=vbox -> vbox_x86 image (for VirtualBox)
+
+The kernel sources are in android.git.kernel.org/kernel/qemu.git,
+in the android-goldfish-2.6.XX branch (where XX is the highest patch kernel version number).
diff --git a/android-x86/kernel/kernel b/android-x86/kernel/kernel
deleted file mode 100644
index 890d11a..0000000
--- a/android-x86/kernel/kernel
+++ /dev/null
@@ -1,4 +0,0 @@
-#
-# Put your kernel binary here
-#
-#
diff --git a/android-x86/kernel/kernel-qemu b/android-x86/kernel/kernel-qemu
new file mode 100644
index 0000000..62a7ed2
--- /dev/null
+++ b/android-x86/kernel/kernel-qemu
Binary files differ
diff --git a/android-x86/kernel/kernel-vbox b/android-x86/kernel/kernel-vbox
new file mode 100644
index 0000000..21323e4
--- /dev/null
+++ b/android-x86/kernel/kernel-vbox
Binary files differ
diff --git a/android-x86/kernel/kernel_config_VirtualBox b/android-x86/kernel/kernel_config_VirtualBox
deleted file mode 100644
index ed8379f..0000000
--- a/android-x86/kernel/kernel_config_VirtualBox
+++ /dev/null
@@ -1,2225 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.32.9
-# Tue May 4 08:07:50 2010
-#
-# CONFIG_64BIT is not set
-CONFIG_X86_32=y
-# CONFIG_X86_64 is not set
-CONFIG_X86=y
-CONFIG_OUTPUT_FORMAT="elf32-i386"
-CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
-CONFIG_GENERIC_TIME=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_CLOCKSOURCE_WATCHDOG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_MMU=y
-CONFIG_ZONE_DMA=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_GENERIC_IOMAP=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-# CONFIG_GENERIC_TIME_VSYSCALL is not set
-CONFIG_ARCH_HAS_CPU_RELAX=y
-CONFIG_ARCH_HAS_DEFAULT_IDLE=y
-CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
-CONFIG_HAVE_SETUP_PER_CPU_AREA=y
-CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
-CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
-# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_ZONE_DMA32 is not set
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-# CONFIG_AUDIT_ARCH is not set
-CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
-CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_GENERIC_PENDING_IRQ=y
-CONFIG_USE_GENERIC_SMP_HELPERS=y
-CONFIG_X86_32_SMP=y
-CONFIG_X86_HT=y
-CONFIG_X86_TRAMPOLINE=y
-CONFIG_X86_32_LAZY_GS=y
-CONFIG_KTIME_SCALAR=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-CONFIG_CONSTRUCTORS=y
-
-#
-# General setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCK_KERNEL=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION="-qemu"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_BZIP2=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_KERNEL_GZIP=y
-# CONFIG_KERNEL_BZIP2 is not set
-# CONFIG_KERNEL_LZMA is not set
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-# CONFIG_TASKSTATS is not set
-# CONFIG_AUDIT is not set
-
-#
-# RCU Subsystem
-#
-CONFIG_TREE_RCU=y
-# CONFIG_TREE_PREEMPT_RCU is not set
-# CONFIG_RCU_TRACE is not set
-CONFIG_RCU_FANOUT=32
-# CONFIG_RCU_FANOUT_EXACT is not set
-# CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=17
-CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
-# CONFIG_GROUP_SCHED is not set
-# CONFIG_CGROUPS is not set
-# CONFIG_SYSFS_DEPRECATED_V2 is not set
-CONFIG_RELAY=y
-# CONFIG_NAMESPACES is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_RD_GZIP=y
-# CONFIG_RD_BZIP2 is not set
-# CONFIG_RD_LZMA is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL=y
-CONFIG_ANON_INODES=y
-CONFIG_PANIC_TIMEOUT=0
-CONFIG_EMBEDDED=y
-CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_PCSPKR_PLATFORM=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_ASHMEM=y
-CONFIG_AIO=y
-CONFIG_HAVE_PERF_EVENTS=y
-
-#
-# Kernel Performance Events And Counters
-#
-# CONFIG_PERF_EVENTS is not set
-# CONFIG_PERF_COUNTERS is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-# CONFIG_PROFILING is not set
-CONFIG_TRACEPOINTS=y
-CONFIG_HAVE_OPROFILE=y
-# CONFIG_KPROBES is not set
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_IOREMAP_PROT=y
-CONFIG_HAVE_KPROBES=y
-CONFIG_HAVE_KRETPROBES=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-
-#
-# GCOV-based kernel profiling
-#
-# CONFIG_GCOV_KERNEL is not set
-# CONFIG_SLOW_WORK is not set
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-# CONFIG_MODULE_FORCE_LOAD is not set
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_STOP_MACHINE=y
-CONFIG_BLOCK=y
-# CONFIG_LBDAF is not set
-CONFIG_BLK_DEV_BSG=y
-CONFIG_BLK_DEV_INTEGRITY=y
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-# CONFIG_FREEZER is not set
-
-#
-# Processor type and features
-#
-CONFIG_TICK_ONESHOT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_SMP=y
-# CONFIG_SPARSE_IRQ is not set
-CONFIG_X86_MPPARSE=y
-# CONFIG_X86_BIGSMP is not set
-# CONFIG_X86_EXTENDED_PLATFORM is not set
-CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y
-# CONFIG_SCHED_OMIT_FRAME_POINTER is not set
-# CONFIG_PARAVIRT_GUEST is not set
-# CONFIG_MEMTEST is not set
-# CONFIG_M386 is not set
-# CONFIG_M486 is not set
-# CONFIG_M586 is not set
-# CONFIG_M586TSC is not set
-# CONFIG_M586MMX is not set
-# CONFIG_M686 is not set
-# CONFIG_MPENTIUMII is not set
-# CONFIG_MPENTIUMIII is not set
-# CONFIG_MPENTIUMM is not set
-# CONFIG_MPENTIUM4 is not set
-# CONFIG_MK6 is not set
-# CONFIG_MK7 is not set
-# CONFIG_MK8 is not set
-# CONFIG_MCRUSOE is not set
-# CONFIG_MEFFICEON is not set
-# CONFIG_MWINCHIPC6 is not set
-# CONFIG_MWINCHIP3D is not set
-# CONFIG_MGEODEGX1 is not set
-# CONFIG_MGEODE_LX is not set
-# CONFIG_MCYRIXIII is not set
-# CONFIG_MVIAC3_2 is not set
-# CONFIG_MVIAC7 is not set
-# CONFIG_MPSC is not set
-CONFIG_MCORE2=y
-# CONFIG_MATOM is not set
-# CONFIG_GENERIC_CPU is not set
-CONFIG_X86_GENERIC=y
-CONFIG_X86_CPU=y
-CONFIG_X86_L1_CACHE_BYTES=64
-CONFIG_X86_INTERNODE_CACHE_BYTES=64
-CONFIG_X86_CMPXCHG=y
-CONFIG_X86_L1_CACHE_SHIFT=6
-CONFIG_X86_XADD=y
-CONFIG_X86_WP_WORKS_OK=y
-CONFIG_X86_INVLPG=y
-CONFIG_X86_BSWAP=y
-CONFIG_X86_POPAD_OK=y
-CONFIG_X86_INTEL_USERCOPY=y
-CONFIG_X86_USE_PPRO_CHECKSUM=y
-CONFIG_X86_TSC=y
-CONFIG_X86_CMPXCHG64=y
-CONFIG_X86_CMOV=y
-CONFIG_X86_MINIMUM_CPU_FAMILY=5
-CONFIG_X86_DEBUGCTLMSR=y
-CONFIG_PROCESSOR_SELECT=y
-CONFIG_CPU_SUP_INTEL=y
-# CONFIG_CPU_SUP_CYRIX_32 is not set
-# CONFIG_CPU_SUP_AMD is not set
-# CONFIG_CPU_SUP_CENTAUR is not set
-# CONFIG_CPU_SUP_TRANSMETA_32 is not set
-# CONFIG_CPU_SUP_UMC_32 is not set
-# CONFIG_X86_DS is not set
-# CONFIG_HPET_TIMER is not set
-CONFIG_DMI=y
-# CONFIG_IOMMU_HELPER is not set
-# CONFIG_IOMMU_API is not set
-CONFIG_NR_CPUS=8
-CONFIG_SCHED_SMT=y
-CONFIG_SCHED_MC=y
-# CONFIG_PREEMPT_NONE is not set
-# CONFIG_PREEMPT_VOLUNTARY is not set
-CONFIG_PREEMPT=y
-CONFIG_X86_LOCAL_APIC=y
-CONFIG_X86_IO_APIC=y
-# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set
-CONFIG_X86_MCE=y
-CONFIG_X86_MCE_INTEL=y
-# CONFIG_X86_MCE_AMD is not set
-# CONFIG_X86_ANCIENT_MCE is not set
-CONFIG_X86_MCE_THRESHOLD=y
-# CONFIG_X86_MCE_INJECT is not set
-CONFIG_X86_THERMAL_VECTOR=y
-CONFIG_VM86=y
-# CONFIG_TOSHIBA is not set
-# CONFIG_I8K is not set
-CONFIG_X86_REBOOTFIXUPS=y
-CONFIG_MICROCODE=y
-CONFIG_MICROCODE_INTEL=y
-# CONFIG_MICROCODE_AMD is not set
-CONFIG_MICROCODE_OLD_INTERFACE=y
-CONFIG_X86_MSR=y
-CONFIG_X86_CPUID=y
-# CONFIG_NOHIGHMEM is not set
-# CONFIG_HIGHMEM4G is not set
-CONFIG_HIGHMEM64G=y
-CONFIG_VMSPLIT_3G=y
-# CONFIG_VMSPLIT_3G_OPT is not set
-# CONFIG_VMSPLIT_2G is not set
-# CONFIG_VMSPLIT_2G_OPT is not set
-# CONFIG_VMSPLIT_1G is not set
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_HIGHMEM=y
-CONFIG_X86_PAE=y
-CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_SPARSEMEM_STATIC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_PHYS_ADDR_T_64BIT=y
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
-CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
-# CONFIG_KSM is not set
-CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
-# CONFIG_MEMORY_FAILURE is not set
-CONFIG_HIGHPTE=y
-# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set
-CONFIG_X86_RESERVE_LOW_64K=y
-# CONFIG_MATH_EMULATION is not set
-CONFIG_MTRR=y
-CONFIG_MTRR_SANITIZER=y
-CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1
-CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
-CONFIG_X86_PAT=y
-CONFIG_ARCH_USES_PG_UNCACHED=y
-# CONFIG_SECCOMP is not set
-# CONFIG_CC_STACKPROTECTOR is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_300 is not set
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_SCHED_HRTICK=y
-CONFIG_KEXEC=y
-CONFIG_CRASH_DUMP=y
-CONFIG_PHYSICAL_START=0x100000
-CONFIG_RELOCATABLE=y
-CONFIG_X86_NEED_RELOCS=y
-CONFIG_PHYSICAL_ALIGN=0x100000
-CONFIG_HOTPLUG_CPU=y
-# CONFIG_COMPAT_VDSO is not set
-# CONFIG_CMDLINE_BOOL is not set
-CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
-
-#
-# Power management and ACPI options
-#
-CONFIG_PM=y
-# CONFIG_PM_DEBUG is not set
-# CONFIG_SUSPEND is not set
-CONFIG_HAS_WAKELOCK=y
-CONFIG_HAS_EARLYSUSPEND=y
-CONFIG_WAKELOCK=y
-CONFIG_WAKELOCK_STAT=y
-CONFIG_USER_WAKELOCK=y
-CONFIG_EARLYSUSPEND=y
-# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
-# CONFIG_CONSOLE_EARLYSUSPEND is not set
-CONFIG_FB_EARLYSUSPEND=y
-# CONFIG_HIBERNATION is not set
-# CONFIG_PM_RUNTIME is not set
-# CONFIG_ACPI is not set
-CONFIG_SFI=y
-
-#
-# CPU Frequency scaling
-#
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_TABLE=y
-CONFIG_CPU_FREQ_DEBUG=y
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-
-#
-# CPUFreq processor drivers
-#
-# CONFIG_X86_POWERNOW_K6 is not set
-# CONFIG_X86_POWERNOW_K7 is not set
-# CONFIG_X86_GX_SUSPMOD is not set
-# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
-# CONFIG_X86_SPEEDSTEP_ICH is not set
-# CONFIG_X86_SPEEDSTEP_SMI is not set
-# CONFIG_X86_P4_CLOCKMOD is not set
-# CONFIG_X86_CPUFREQ_NFORCE2 is not set
-# CONFIG_X86_LONGRUN is not set
-# CONFIG_X86_E_POWERSAVER is not set
-
-#
-# shared options
-#
-# CONFIG_X86_SPEEDSTEP_LIB is not set
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_IDLE_GOV_MENU=y
-
-#
-# Bus options (PCI etc.)
-#
-CONFIG_PCI=y
-# CONFIG_PCI_GOBIOS is not set
-# CONFIG_PCI_GOMMCONFIG is not set
-# CONFIG_PCI_GODIRECT is not set
-# CONFIG_PCI_GOOLPC is not set
-CONFIG_PCI_GOANY=y
-CONFIG_PCI_BIOS=y
-CONFIG_PCI_DIRECT=y
-CONFIG_PCI_MMCONFIG=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIEAER is not set
-# CONFIG_PCIEASPM is not set
-CONFIG_ARCH_SUPPORTS_MSI=y
-CONFIG_PCI_MSI=y
-# CONFIG_PCI_LEGACY is not set
-# CONFIG_PCI_DEBUG is not set
-# CONFIG_PCI_STUB is not set
-# CONFIG_HT_IRQ is not set
-# CONFIG_PCI_IOV is not set
-CONFIG_ISA_DMA_API=y
-CONFIG_ISA=y
-# CONFIG_EISA is not set
-# CONFIG_MCA is not set
-# CONFIG_SCx200 is not set
-# CONFIG_OLPC is not set
-# CONFIG_PCCARD is not set
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# Executable file formats / Emulations
-#
-CONFIG_BINFMT_ELF=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_HAVE_AOUT=y
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_MISC=y
-CONFIG_HAVE_ATOMIC_IOMAP=y
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=y
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_ASK_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-CONFIG_INET_TUNNEL=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-CONFIG_INET_LRO=y
-# CONFIG_INET_DIAG is not set
-CONFIG_TCP_CONG_ADVANCED=y
-# CONFIG_TCP_CONG_BIC is not set
-CONFIG_TCP_CONG_CUBIC=y
-# CONFIG_TCP_CONG_WESTWOOD is not set
-# CONFIG_TCP_CONG_HTCP is not set
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
-# CONFIG_TCP_CONG_LP is not set
-# CONFIG_TCP_CONG_VENO is not set
-# CONFIG_TCP_CONG_YEAH is not set
-# CONFIG_TCP_CONG_ILLINOIS is not set
-# CONFIG_DEFAULT_BIC is not set
-CONFIG_DEFAULT_CUBIC=y
-# CONFIG_DEFAULT_HTCP is not set
-# CONFIG_DEFAULT_VEGAS is not set
-# CONFIG_DEFAULT_WESTWOOD is not set
-# CONFIG_DEFAULT_RENO is not set
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-CONFIG_IPV6=y
-# CONFIG_IPV6_PRIVACY is not set
-# CONFIG_IPV6_ROUTER_PREF is not set
-# CONFIG_IPV6_OPTIMISTIC_DAD is not set
-CONFIG_INET6_AH=y
-CONFIG_INET6_ESP=y
-# CONFIG_INET6_IPCOMP is not set
-# CONFIG_IPV6_MIP6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-CONFIG_INET6_XFRM_MODE_TRANSPORT=y
-CONFIG_INET6_XFRM_MODE_TUNNEL=y
-CONFIG_INET6_XFRM_MODE_BEET=y
-# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
-CONFIG_IPV6_SIT=y
-CONFIG_IPV6_NDISC_NODETYPE=y
-# CONFIG_IPV6_TUNNEL is not set
-# CONFIG_IPV6_MULTIPLE_TABLES is not set
-# CONFIG_IPV6_MROUTE is not set
-# CONFIG_ANDROID_PARANOID_NETWORK is not set
-CONFIG_NETWORK_SECMARK=y
-# CONFIG_NETFILTER is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_SCTP is not set
-# CONFIG_RDS is not set
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NET_DSA is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_PHONET is not set
-# CONFIG_IEEE802154 is not set
-CONFIG_NET_SCHED=y
-
-#
-# Queueing/Scheduling
-#
-# CONFIG_NET_SCH_CBQ is not set
-# CONFIG_NET_SCH_HTB is not set
-# CONFIG_NET_SCH_HFSC is not set
-# CONFIG_NET_SCH_PRIO is not set
-# CONFIG_NET_SCH_MULTIQ is not set
-# CONFIG_NET_SCH_RED is not set
-# CONFIG_NET_SCH_SFQ is not set
-# CONFIG_NET_SCH_TEQL is not set
-# CONFIG_NET_SCH_TBF is not set
-# CONFIG_NET_SCH_GRED is not set
-# CONFIG_NET_SCH_DSMARK is not set
-# CONFIG_NET_SCH_NETEM is not set
-# CONFIG_NET_SCH_DRR is not set
-# CONFIG_NET_SCH_INGRESS is not set
-
-#
-# Classification
-#
-CONFIG_NET_CLS=y
-# CONFIG_NET_CLS_BASIC is not set
-# CONFIG_NET_CLS_TCINDEX is not set
-# CONFIG_NET_CLS_ROUTE4 is not set
-# CONFIG_NET_CLS_FW is not set
-# CONFIG_NET_CLS_U32 is not set
-# CONFIG_NET_CLS_RSVP is not set
-# CONFIG_NET_CLS_RSVP6 is not set
-# CONFIG_NET_CLS_FLOW is not set
-CONFIG_NET_EMATCH=y
-CONFIG_NET_EMATCH_STACK=32
-# CONFIG_NET_EMATCH_CMP is not set
-# CONFIG_NET_EMATCH_NBYTE is not set
-# CONFIG_NET_EMATCH_U32 is not set
-# CONFIG_NET_EMATCH_META is not set
-# CONFIG_NET_EMATCH_TEXT is not set
-CONFIG_NET_CLS_ACT=y
-# CONFIG_NET_ACT_POLICE is not set
-# CONFIG_NET_ACT_GACT is not set
-# CONFIG_NET_ACT_MIRRED is not set
-# CONFIG_NET_ACT_NAT is not set
-# CONFIG_NET_ACT_PEDIT is not set
-# CONFIG_NET_ACT_SIMP is not set
-# CONFIG_NET_ACT_SKBEDIT is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_DCB is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NET_DROP_MONITOR is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_CAN is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_AF_RXRPC is not set
-CONFIG_FIB_RULES=y
-# CONFIG_WIRELESS is not set
-# CONFIG_WIMAX is not set
-CONFIG_RFKILL=y
-CONFIG_RFKILL_PM=y
-CONFIG_RFKILL_LEDS=y
-CONFIG_RFKILL_INPUT=y
-# CONFIG_NET_9P is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_UEVENT_HELPER_PATH=""
-# CONFIG_DEVTMPFS is not set
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_EXTRA_FIRMWARE=""
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-# CONFIG_PNP is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=16384
-# CONFIG_BLK_DEV_XIP is not set
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_MISC_DEVICES=y
-# CONFIG_ANDROID_PMEM is not set
-# CONFIG_IBM_ASM is not set
-# CONFIG_PHANTOM is not set
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
-# CONFIG_ICS932S401 is not set
-# CONFIG_ENCLOSURE_SERVICES is not set
-# CONFIG_KERNEL_DEBUGGER_CORE is not set
-# CONFIG_HP_ILO is not set
-# CONFIG_ISL29003 is not set
-# CONFIG_UID_STAT is not set
-# CONFIG_WL127X_RFKILL is not set
-# CONFIG_APANIC is not set
-# CONFIG_C2PORT is not set
-
-#
-# EEPROM support
-#
-# CONFIG_EEPROM_AT24 is not set
-CONFIG_EEPROM_AT25=y
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_EEPROM_MAX6875 is not set
-# CONFIG_EEPROM_93CX6 is not set
-# CONFIG_CB710_CORE is not set
-CONFIG_HAVE_IDE=y
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
-CONFIG_SCSI_DMA=y
-# CONFIG_SCSI_TGT is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_SCSI_PROC_FS is not set
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-# CONFIG_CHR_DEV_SCH is not set
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-# CONFIG_SCSI_SCAN_ASYNC is not set
-CONFIG_SCSI_WAIT_SCAN=m
-
-#
-# SCSI Transports
-#
-# CONFIG_SCSI_SPI_ATTRS is not set
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-# CONFIG_SCSI_SAS_ATTRS is not set
-# CONFIG_SCSI_SAS_LIBSAS is not set
-# CONFIG_SCSI_SRP_ATTRS is not set
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_SCSI_DH is not set
-# CONFIG_SCSI_OSD_INITIATOR is not set
-CONFIG_ATA=y
-# CONFIG_ATA_NONSTANDARD is not set
-CONFIG_ATA_VERBOSE_ERROR=y
-# CONFIG_SATA_PMP is not set
-# CONFIG_SATA_AHCI is not set
-# CONFIG_SATA_SIL24 is not set
-CONFIG_ATA_SFF=y
-# CONFIG_SATA_SVW is not set
-CONFIG_ATA_PIIX=y
-# CONFIG_SATA_MV is not set
-# CONFIG_SATA_NV is not set
-# CONFIG_PDC_ADMA is not set
-# CONFIG_SATA_QSTOR is not set
-# CONFIG_SATA_PROMISE is not set
-# CONFIG_SATA_SX4 is not set
-# CONFIG_SATA_SIL is not set
-# CONFIG_SATA_SIS is not set
-# CONFIG_SATA_ULI is not set
-# CONFIG_SATA_VIA is not set
-# CONFIG_SATA_VITESSE is not set
-# CONFIG_SATA_INIC162X is not set
-# CONFIG_PATA_ALI is not set
-# CONFIG_PATA_AMD is not set
-# CONFIG_PATA_ARTOP is not set
-# CONFIG_PATA_ATP867X is not set
-# CONFIG_PATA_ATIIXP is not set
-# CONFIG_PATA_CMD640_PCI is not set
-# CONFIG_PATA_CMD64X is not set
-# CONFIG_PATA_CS5520 is not set
-# CONFIG_PATA_CS5530 is not set
-# CONFIG_PATA_CS5535 is not set
-# CONFIG_PATA_CS5536 is not set
-# CONFIG_PATA_CYPRESS is not set
-# CONFIG_PATA_EFAR is not set
-# CONFIG_ATA_GENERIC is not set
-# CONFIG_PATA_HPT366 is not set
-# CONFIG_PATA_HPT37X is not set
-# CONFIG_PATA_HPT3X2N is not set
-# CONFIG_PATA_HPT3X3 is not set
-# CONFIG_PATA_IT821X is not set
-# CONFIG_PATA_IT8213 is not set
-# CONFIG_PATA_JMICRON is not set
-# CONFIG_PATA_LEGACY is not set
-# CONFIG_PATA_TRIFLEX is not set
-# CONFIG_PATA_MARVELL is not set
-# CONFIG_PATA_MPIIX is not set
-# CONFIG_PATA_OLDPIIX is not set
-# CONFIG_PATA_NETCELL is not set
-# CONFIG_PATA_NINJA32 is not set
-# CONFIG_PATA_NS87410 is not set
-# CONFIG_PATA_NS87415 is not set
-# CONFIG_PATA_OPTI is not set
-# CONFIG_PATA_OPTIDMA is not set
-# CONFIG_PATA_PDC_OLD is not set
-# CONFIG_PATA_QDI is not set
-# CONFIG_PATA_RADISYS is not set
-# CONFIG_PATA_RDC is not set
-# CONFIG_PATA_RZ1000 is not set
-# CONFIG_PATA_SC1200 is not set
-# CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
-# CONFIG_PATA_SIL680 is not set
-# CONFIG_PATA_SIS is not set
-# CONFIG_PATA_VIA is not set
-# CONFIG_PATA_WINBOND is not set
-# CONFIG_PATA_WINBOND_VLB is not set
-# CONFIG_PATA_PLATFORM is not set
-# CONFIG_PATA_SCH is not set
-# CONFIG_MD is not set
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# You can enable one or both FireWire driver stacks.
-#
-
-#
-# See the help texts for more information.
-#
-# CONFIG_FIREWIRE is not set
-# CONFIG_IEEE1394 is not set
-# CONFIG_I2O is not set
-# CONFIG_MACINTOSH_DRIVERS is not set
-CONFIG_NETDEVICES=y
-# CONFIG_IFB is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_MACVLAN is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_VETH is not set
-# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ETHOC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_DNET is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_IBM_NEW_EMAC_ZMII is not set
-# CONFIG_IBM_NEW_EMAC_RGMII is not set
-# CONFIG_IBM_NEW_EMAC_TAH is not set
-# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
-# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
-# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_AC3200 is not set
-# CONFIG_APRICOT is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_CS89x0 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-CONFIG_8139CP=y
-# CONFIG_8139TOO is not set
-# CONFIG_R6040 is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SMSC9420 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_KS8842 is not set
-# CONFIG_KS8851 is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_SC92031 is not set
-# CONFIG_ATL2 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-CONFIG_E1000=y
-CONFIG_E1000E=y
-# CONFIG_IP1000 is not set
-# CONFIG_IGB is not set
-# CONFIG_IGBVF is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-# CONFIG_CNIC is not set
-# CONFIG_QLA3XXX is not set
-# CONFIG_ATL1 is not set
-# CONFIG_ATL1E is not set
-# CONFIG_ATL1C is not set
-# CONFIG_JME is not set
-CONFIG_NETDEV_10000=y
-# CONFIG_CHELSIO_T1 is not set
-CONFIG_CHELSIO_T3_DEPENDS=y
-# CONFIG_CHELSIO_T3 is not set
-# CONFIG_ENIC is not set
-# CONFIG_IXGBE is not set
-CONFIG_IXGB=y
-# CONFIG_S2IO is not set
-# CONFIG_VXGE is not set
-# CONFIG_MYRI10GE is not set
-# CONFIG_NETXEN_NIC is not set
-# CONFIG_NIU is not set
-# CONFIG_MLX4_EN is not set
-# CONFIG_MLX4_CORE is not set
-# CONFIG_TEHUTI is not set
-# CONFIG_BNX2X is not set
-# CONFIG_QLGE is not set
-# CONFIG_SFC is not set
-# CONFIG_BE2NET is not set
-# CONFIG_TR is not set
-CONFIG_WLAN=y
-# CONFIG_WLAN_PRE80211 is not set
-CONFIG_WLAN_80211=y
-# CONFIG_LIBERTAS is not set
-# CONFIG_AIRO is not set
-# CONFIG_ATMEL is not set
-# CONFIG_PRISM54 is not set
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_HOSTAP is not set
-
-#
-# Enable WiMAX (Networking options) to see the WiMAX drivers
-#
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_HSO is not set
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_VMXNET3 is not set
-# CONFIG_ISDN is not set
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_FF_MEMLESS=y
-CONFIG_INPUT_POLLDEV=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-# CONFIG_INPUT_KEYRESET is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-# CONFIG_KEYBOARD_ADP5588 is not set
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_QT2160 is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_KEYBOARD_MATRIX is not set
-# CONFIG_KEYBOARD_LM8323 is not set
-# CONFIG_KEYBOARD_MAX7359 is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_OPENCORES is not set
-# CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
-# CONFIG_TOUCHSCREEN_AD7877 is not set
-# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
-# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
-# CONFIG_TOUCHSCREEN_AD7879 is not set
-# CONFIG_TOUCHSCREEN_EETI is not set
-# CONFIG_TOUCHSCREEN_FUJITSU is not set
-# CONFIG_TOUCHSCREEN_GUNZE is not set
-# CONFIG_TOUCHSCREEN_ELO is not set
-# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
-# CONFIG_TOUCHSCREEN_MCS5000 is not set
-# CONFIG_TOUCHSCREEN_MTOUCH is not set
-# CONFIG_TOUCHSCREEN_INEXIO is not set
-# CONFIG_TOUCHSCREEN_MK712 is not set
-# CONFIG_TOUCHSCREEN_HTCPEN is not set
-# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
-# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
-# CONFIG_TOUCHSCREEN_TSC2007 is not set
-CONFIG_INPUT_MISC=y
-# CONFIG_INPUT_PCSPKR is not set
-# CONFIG_INPUT_APANEL is not set
-# CONFIG_INPUT_WISTRON_BTNS is not set
-# CONFIG_INPUT_ATI_REMOTE is not set
-# CONFIG_INPUT_ATI_REMOTE2 is not set
-# CONFIG_INPUT_KEYCHORD is not set
-# CONFIG_INPUT_KEYSPAN_REMOTE is not set
-# CONFIG_INPUT_POWERMATE is not set
-# CONFIG_INPUT_YEALINK is not set
-# CONFIG_INPUT_CM109 is not set
-CONFIG_INPUT_UINPUT=y
-# CONFIG_INPUT_GPIO is not set
-# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVMEM=y
-# CONFIG_DEVKMEM is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_NOZOMI is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_SERIAL_8250_PCI=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_SERIAL_MAX3100 is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_NVRAM is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_SONYPI is not set
-# CONFIG_MWAVE is not set
-# CONFIG_PC8736x_GPIO is not set
-# CONFIG_NSC_GPIO is not set
-# CONFIG_CS5535_GPIO is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-# CONFIG_TCG_TPM is not set
-# CONFIG_TELCLOCK is not set
-CONFIG_DEVPORT=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_COMPAT=y
-# CONFIG_I2C_CHARDEV is not set
-# CONFIG_I2C_HELPER_AUTO is not set
-
-#
-# I2C Algorithms
-#
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-
-#
-# PC SMBus host controller drivers
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_ISCH is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-
-#
-# I2C system bus drivers (mostly embedded / system-on-chip)
-#
-# CONFIG_I2C_GPIO is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_SIMTEC is not set
-
-#
-# External I2C/SMBus adapter drivers
-#
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_TINY_USB is not set
-
-#
-# Graphics adapter I2C/DDC channel drivers
-#
-# CONFIG_I2C_VOODOO3 is not set
-
-#
-# Other I2C/SMBus bus drivers
-#
-# CONFIG_I2C_PCA_ISA is not set
-# CONFIG_I2C_PCA_PLATFORM is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_SCx200_ACB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_DS1682 is not set
-# CONFIG_SENSORS_TSL2550 is not set
-# CONFIG_SENSORS_PCA963X is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-CONFIG_SPI=y
-# CONFIG_SPI_DEBUG is not set
-CONFIG_SPI_MASTER=y
-
-#
-# SPI Master Controller Drivers
-#
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_GPIO=y
-
-#
-# SPI Protocol Masters
-#
-# CONFIG_SPI_SPIDEV is not set
-# CONFIG_SPI_TLE62X0 is not set
-
-#
-# PPS support
-#
-# CONFIG_PPS is not set
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_GPIOLIB=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_GPIO_SYSFS is not set
-
-#
-# Memory mapped GPIO expanders:
-#
-
-#
-# I2C GPIO expanders:
-#
-# CONFIG_GPIO_MAX732X is not set
-CONFIG_GPIO_PCA953X=y
-# CONFIG_GPIO_PCF857X is not set
-
-#
-# PCI GPIO expanders:
-#
-# CONFIG_GPIO_BT8XX is not set
-# CONFIG_GPIO_LANGWELL is not set
-
-#
-# SPI GPIO expanders:
-#
-# CONFIG_GPIO_MAX7301 is not set
-# CONFIG_GPIO_MCP23S08 is not set
-# CONFIG_GPIO_MC33880 is not set
-
-#
-# AC97 GPIO expanders:
-#
-# CONFIG_W1 is not set
-CONFIG_POWER_SUPPLY=y
-# CONFIG_POWER_SUPPLY_DEBUG is not set
-# CONFIG_PDA_POWER is not set
-# CONFIG_BATTERY_DS2760 is not set
-# CONFIG_BATTERY_DS2782 is not set
-# CONFIG_BATTERY_BQ27x00 is not set
-# CONFIG_BATTERY_MAX17040 is not set
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Native drivers
-#
-# CONFIG_SENSORS_ABITUGURU is not set
-# CONFIG_SENSORS_ABITUGURU3 is not set
-# CONFIG_SENSORS_AD7414 is not set
-# CONFIG_SENSORS_AD7418 is not set
-# CONFIG_SENSORS_ADCXX is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1029 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ADT7462 is not set
-# CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
-# CONFIG_SENSORS_ADT7475 is not set
-# CONFIG_SENSORS_K8TEMP is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_I5K_AMB is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_F71882FG is not set
-# CONFIG_SENSORS_F75375S is not set
-# CONFIG_SENSORS_FSCHMD is not set
-# CONFIG_SENSORS_G760A is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_CORETEMP is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM70 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_LM93 is not set
-# CONFIG_SENSORS_LTC4215 is not set
-# CONFIG_SENSORS_LTC4245 is not set
-# CONFIG_SENSORS_LM95241 is not set
-# CONFIG_SENSORS_MAX1111 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_MAX6650 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_SHT15 is not set
-# CONFIG_SENSORS_SIS5595 is not set
-# CONFIG_SENSORS_DME1737 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47M192 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_ADS7828 is not set
-# CONFIG_SENSORS_THMC50 is not set
-# CONFIG_SENSORS_TMP401 is not set
-# CONFIG_SENSORS_TMP421 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_VT8231 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83791D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83793 is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83L786NG is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_SENSORS_HDAPS is not set
-# CONFIG_SENSORS_LIS3_SPI is not set
-# CONFIG_SENSORS_APPLESMC is not set
-CONFIG_THERMAL=y
-CONFIG_THERMAL_HWMON=y
-# CONFIG_WATCHDOG is not set
-CONFIG_SSB_POSSIBLE=y
-
-#
-# Sonics Silicon Backplane
-#
-# CONFIG_SSB is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_CORE is not set
-# CONFIG_MFD_SM501 is not set
-# CONFIG_HTC_PASIC3 is not set
-# CONFIG_TPS65010 is not set
-# CONFIG_TWL4030_CORE is not set
-# CONFIG_MFD_TMIO is not set
-# CONFIG_PMIC_DA903X is not set
-# CONFIG_MFD_WM8400 is not set
-# CONFIG_MFD_WM831X is not set
-# CONFIG_MFD_WM8350_I2C is not set
-# CONFIG_MFD_PCF50633 is not set
-# CONFIG_MFD_MC13783 is not set
-# CONFIG_AB3100_CORE is not set
-# CONFIG_EZX_PCAP is not set
-# CONFIG_REGULATOR is not set
-# CONFIG_MEDIA_SUPPORT is not set
-
-#
-# Graphics support
-#
-CONFIG_AGP=y
-# CONFIG_AGP_ALI is not set
-# CONFIG_AGP_ATI is not set
-# CONFIG_AGP_AMD is not set
-# CONFIG_AGP_AMD64 is not set
-# CONFIG_AGP_INTEL is not set
-# CONFIG_AGP_NVIDIA is not set
-# CONFIG_AGP_SIS is not set
-# CONFIG_AGP_SWORKS is not set
-# CONFIG_AGP_VIA is not set
-# CONFIG_AGP_EFFICEON is not set
-# CONFIG_VGA_ARB is not set
-CONFIG_DRM=y
-# CONFIG_DRM_TDFX is not set
-# CONFIG_DRM_R128 is not set
-# CONFIG_DRM_RADEON is not set
-# CONFIG_DRM_MGA is not set
-# CONFIG_DRM_SIS is not set
-# CONFIG_DRM_VIA is not set
-# CONFIG_DRM_SAVAGE is not set
-# CONFIG_VGASTATE is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_FB_DDC is not set
-CONFIG_FB_BOOT_VESA_SUPPORT=y
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-CONFIG_FB_FOREIGN_ENDIAN=y
-CONFIG_FB_BOTH_ENDIAN=y
-# CONFIG_FB_BIG_ENDIAN is not set
-# CONFIG_FB_LITTLE_ENDIAN is not set
-# CONFIG_FB_SYS_FOPS is not set
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-
-#
-# Frame buffer hardware drivers
-#
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_ARC is not set
-# CONFIG_FB_ASILIANT is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_VGA16 is not set
-CONFIG_FB_VESA=y
-# CONFIG_FB_N411 is not set
-# CONFIG_FB_HGA is not set
-# CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_NVIDIA is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_LE80578 is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_S3 is not set
-# CONFIG_FB_SAVAGE is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_VIA is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_KYRO is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_VT8623 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_ARK is not set
-# CONFIG_FB_PM3 is not set
-# CONFIG_FB_CARMINE is not set
-# CONFIG_FB_GEODE is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FB_METRONOME is not set
-# CONFIG_FB_MB862XX is not set
-# CONFIG_FB_BROADSHEET is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-CONFIG_DISPLAY_SUPPORT=y
-
-#
-# Display hardware drivers
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_7x14 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-# CONFIG_FONT_MINI_4x6 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_10x18 is not set
-# CONFIG_LOGO is not set
-# CONFIG_SOUND is not set
-CONFIG_HID_SUPPORT=y
-CONFIG_HID=y
-CONFIG_HIDRAW=y
-
-#
-# USB Input Devices
-#
-CONFIG_USB_HID=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
-
-#
-# Special HID drivers
-#
-# CONFIG_HID_A4TECH is not set
-# CONFIG_HID_APPLE is not set
-# CONFIG_HID_BELKIN is not set
-# CONFIG_HID_CHERRY is not set
-# CONFIG_HID_CHICONY is not set
-# CONFIG_HID_CYPRESS is not set
-# CONFIG_HID_DRAGONRISE is not set
-# CONFIG_HID_EZKEY is not set
-# CONFIG_HID_KYE is not set
-# CONFIG_HID_GYRATION is not set
-# CONFIG_HID_TWINHAN is not set
-# CONFIG_HID_KENSINGTON is not set
-# CONFIG_HID_LOGITECH is not set
-# CONFIG_HID_MICROSOFT is not set
-# CONFIG_HID_MONTEREY is not set
-# CONFIG_HID_NTRIG is not set
-# CONFIG_HID_PANTHERLORD is not set
-# CONFIG_HID_PETALYNX is not set
-# CONFIG_HID_SAMSUNG is not set
-# CONFIG_HID_SONY is not set
-# CONFIG_HID_SUNPLUS is not set
-# CONFIG_HID_GREENASIA is not set
-# CONFIG_HID_SMARTJOYPLUS is not set
-# CONFIG_HID_TOPSEED is not set
-# CONFIG_HID_THRUSTMASTER is not set
-# CONFIG_HID_ZEROPLUS is not set
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-CONFIG_USB_SUSPEND=y
-# CONFIG_USB_OTG is not set
-# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-CONFIG_USB_MON=y
-# CONFIG_USB_WUSB is not set
-# CONFIG_USB_WUSB_CBAF is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_C67X00_HCD is not set
-# CONFIG_USB_XHCI_HCD is not set
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-# CONFIG_USB_OXU210HP_HCD is not set
-# CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_ISP1760_HCD is not set
-# CONFIG_USB_ISP1362_HCD is not set
-# CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_SL811_HCD is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_WHCI_HCD is not set
-# CONFIG_USB_HWA_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_WDM is not set
-# CONFIG_USB_TMC is not set
-
-#
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
-#
-
-#
-# also be needed; see USB_STORAGE Help for more info
-#
-CONFIG_USB_STORAGE=y
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_USBAT is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_ALAUDA is not set
-# CONFIG_USB_STORAGE_ONETOUCH is not set
-# CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
-# CONFIG_USB_LIBUSUAL is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_SEVSEG is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYPRESS_CY7C63 is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_IDMOUSE is not set
-# CONFIG_USB_FTDI_ELAN is not set
-# CONFIG_USB_APPLEDISPLAY is not set
-# CONFIG_USB_SISUSBVGA is not set
-# CONFIG_USB_LD is not set
-# CONFIG_USB_TRANCEVIBRATOR is not set
-# CONFIG_USB_IOWARRIOR is not set
-# CONFIG_USB_TEST is not set
-# CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# OTG and related infrastructure
-#
-# CONFIG_USB_GPIO_VBUS is not set
-# CONFIG_NOP_USB_XCEIV is not set
-# CONFIG_UWB is not set
-CONFIG_MMC=y
-# CONFIG_MMC_DEBUG is not set
-# CONFIG_MMC_UNSAFE_RESUME is not set
-# CONFIG_MMC_EMBEDDED_SDIO is not set
-# CONFIG_MMC_PARANOID_SD_INIT is not set
-
-#
-# MMC/SD/SDIO Card Drivers
-#
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_BLOCK_BOUNCE=y
-# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set
-CONFIG_SDIO_UART=y
-# CONFIG_MMC_TEST is not set
-
-#
-# MMC/SD/SDIO Host Controller Drivers
-#
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PCI=y
-# CONFIG_MMC_RICOH_MMC is not set
-# CONFIG_MMC_SDHCI_PLTFM is not set
-# CONFIG_MMC_WBSD is not set
-# CONFIG_MMC_AT91 is not set
-# CONFIG_MMC_ATMELMCI is not set
-# CONFIG_MMC_TIFM_SD is not set
-# CONFIG_MMC_CB710 is not set
-# CONFIG_MMC_VIA_SDMMC is not set
-# CONFIG_MEMSTICK is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-
-#
-# LED drivers
-#
-# CONFIG_LEDS_ALIX2 is not set
-# CONFIG_LEDS_PCA9532 is not set
-# CONFIG_LEDS_GPIO is not set
-# CONFIG_LEDS_LP3944 is not set
-# CONFIG_LEDS_CLEVO_MAIL is not set
-# CONFIG_LEDS_PCA955X is not set
-# CONFIG_LEDS_DAC124S085 is not set
-# CONFIG_LEDS_BD2802 is not set
-
-#
-# LED Triggers
-#
-CONFIG_LEDS_TRIGGERS=y
-# CONFIG_LEDS_TRIGGER_TIMER is not set
-# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
-# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
-# CONFIG_LEDS_TRIGGER_GPIO is not set
-# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
-# CONFIG_LEDS_TRIGGER_SLEEP is not set
-
-#
-# iptables trigger is under Netfilter config (LED target)
-#
-CONFIG_SWITCH=y
-CONFIG_SWITCH_GPIO=y
-# CONFIG_ACCESSIBILITY is not set
-# CONFIG_INFINIBAND is not set
-# CONFIG_EDAC is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_INTF_ALARM is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# I2C RTC drivers
-#
-# CONFIG_RTC_DRV_DS1307 is not set
-# CONFIG_RTC_DRV_DS1374 is not set
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_MAX6900 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-# CONFIG_RTC_DRV_ISL1208 is not set
-# CONFIG_RTC_DRV_X1205 is not set
-# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
-# CONFIG_RTC_DRV_M41T80 is not set
-# CONFIG_RTC_DRV_S35390A is not set
-# CONFIG_RTC_DRV_FM3130 is not set
-# CONFIG_RTC_DRV_RX8581 is not set
-# CONFIG_RTC_DRV_RX8025 is not set
-
-#
-# SPI RTC drivers
-#
-# CONFIG_RTC_DRV_M41T94 is not set
-# CONFIG_RTC_DRV_DS1305 is not set
-# CONFIG_RTC_DRV_DS1390 is not set
-# CONFIG_RTC_DRV_MAX6902 is not set
-# CONFIG_RTC_DRV_R9701 is not set
-# CONFIG_RTC_DRV_RS5C348 is not set
-# CONFIG_RTC_DRV_DS3234 is not set
-# CONFIG_RTC_DRV_PCF2123 is not set
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1286 is not set
-# CONFIG_RTC_DRV_DS1511 is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T35 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_BQ4802 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-CONFIG_DMADEVICES=y
-
-#
-# DMA Devices
-#
-# CONFIG_INTEL_IOATDMA is not set
-# CONFIG_AUXDISPLAY is not set
-# CONFIG_UIO is not set
-
-#
-# TI VLYNQ
-#
-CONFIG_STAGING=y
-# CONFIG_STAGING_EXCLUDE_BUILD is not set
-# CONFIG_ET131X is not set
-# CONFIG_SLICOSS is not set
-# CONFIG_USB_IP_COMMON is not set
-# CONFIG_ECHO is not set
-# CONFIG_RT2860 is not set
-# CONFIG_RT2870 is not set
-# CONFIG_RT3090 is not set
-# CONFIG_COMEDI is not set
-# CONFIG_ASUS_OLED is not set
-# CONFIG_ALTERA_PCIE_CHDMA is not set
-# CONFIG_INPUT_MIMIO is not set
-# CONFIG_TRANZPORT is not set
-
-#
-# Android
-#
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-# CONFIG_ANDROID_RAM_CONSOLE is not set
-CONFIG_ANDROID_TIMED_OUTPUT=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-
-#
-# Qualcomm MSM Camera And Video
-#
-
-#
-# Camera Sensor Selection
-#
-# CONFIG_DST is not set
-# CONFIG_POHMELFS is not set
-# CONFIG_B3DFG is not set
-# CONFIG_IDE_PHISON is not set
-# CONFIG_PLAN9AUTH is not set
-# CONFIG_FB_UDL is not set
-# CONFIG_HYPERV is not set
-# CONFIG_VME_BUS is not set
-
-#
-# RAR Register Driver
-#
-CONFIG_RAR_REGISTER=y
-CONFIG_DX_SEP=y
-# CONFIG_IIO is not set
-CONFIG_X86_PLATFORM_DEVICES=y
-
-#
-# Firmware Drivers
-#
-# CONFIG_EDD is not set
-CONFIG_FIRMWARE_MEMMAP=y
-# CONFIG_DELL_RBU is not set
-# CONFIG_DCDBAS is not set
-CONFIG_DMIID=y
-# CONFIG_ISCSI_IBFT_FIND is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_BTRFS_FS is not set
-# CONFIG_NILFS2_FS is not set
-CONFIG_FILE_LOCKING=y
-CONFIG_FSNOTIFY=y
-CONFIG_DNOTIFY=y
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-CONFIG_GENERIC_ACL=y
-
-#
-# Caches
-#
-# CONFIG_FSCACHE is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_VMCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_PROC_PAGE_MONITOR=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_HUGETLBFS=y
-CONFIG_HUGETLB_PAGE=y
-# CONFIG_CONFIGFS_FS is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NETWORK_FILESYSTEMS=y
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-CONFIG_LDM_PARTITION=y
-# CONFIG_LDM_DEBUG is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-# CONFIG_SYSV68_PARTITION is not set
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-CONFIG_NLS_UTF8=y
-# CONFIG_DLM is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_PRINTK_TIME=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_FRAME_WARN=1024
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_STRIP_ASM_SYMS is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
-CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
-CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
-CONFIG_SCHED_DEBUG=y
-CONFIG_SCHEDSTATS=y
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_OBJECTS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_KMEMLEAK is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-CONFIG_STACKTRACE=y
-# CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_HIGHMEM is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_VIRTUAL is not set
-# CONFIG_DEBUG_WRITECOUNT is not set
-# CONFIG_DEBUG_MEMORY_INIT is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-# CONFIG_DEBUG_NOTIFIERS is not set
-# CONFIG_DEBUG_CREDENTIALS is not set
-CONFIG_ARCH_WANT_FRAME_POINTERS=y
-CONFIG_FRAME_POINTER=y
-# CONFIG_BOOT_PRINTK_DELAY is not set
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_BACKTRACE_SELF_TEST is not set
-# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
-# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
-# CONFIG_FAULT_INJECTION is not set
-CONFIG_LATENCYTOP=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_DEBUG_PAGEALLOC is not set
-CONFIG_USER_STACKTRACE_SUPPORT=y
-CONFIG_NOP_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
-CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_RING_BUFFER=y
-CONFIG_EVENT_TRACING=y
-CONFIG_CONTEXT_SWITCH_TRACER=y
-CONFIG_TRACING=y
-CONFIG_GENERIC_TRACER=y
-CONFIG_TRACING_SUPPORT=y
-CONFIG_FTRACE=y
-# CONFIG_FUNCTION_TRACER is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_PREEMPT_TRACER is not set
-# CONFIG_SYSPROF_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_FTRACE_SYSCALLS is not set
-# CONFIG_BOOT_TRACER is not set
-CONFIG_BRANCH_PROFILE_NONE=y
-# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
-# CONFIG_PROFILE_ALL_BRANCHES is not set
-# CONFIG_POWER_TRACER is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_KMEMTRACE is not set
-# CONFIG_WORKQUEUE_TRACER is not set
-CONFIG_BLK_DEV_IO_TRACE=y
-# CONFIG_FTRACE_STARTUP_TEST is not set
-# CONFIG_MMIOTRACE is not set
-# CONFIG_RING_BUFFER_BENCHMARK is not set
-# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
-CONFIG_DYNAMIC_DEBUG=y
-# CONFIG_DMA_API_DEBUG is not set
-# CONFIG_SAMPLES is not set
-CONFIG_HAVE_ARCH_KGDB=y
-# CONFIG_KGDB is not set
-CONFIG_HAVE_ARCH_KMEMCHECK=y
-# CONFIG_STRICT_DEVMEM is not set
-CONFIG_X86_VERBOSE_BOOTUP=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_EARLY_PRINTK_DBGP is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
-# CONFIG_DEBUG_STACK_USAGE is not set
-# CONFIG_DEBUG_PER_CPU_MAPS is not set
-# CONFIG_X86_PTDUMP is not set
-CONFIG_DEBUG_RODATA=y
-CONFIG_DEBUG_RODATA_TEST=y
-# CONFIG_DEBUG_NX_TEST is not set
-# CONFIG_4KSTACKS is not set
-CONFIG_DOUBLEFAULT=y
-# CONFIG_IOMMU_STRESS is not set
-CONFIG_HAVE_MMIOTRACE_SUPPORT=y
-CONFIG_IO_DELAY_TYPE_0X80=0
-CONFIG_IO_DELAY_TYPE_0XED=1
-CONFIG_IO_DELAY_TYPE_UDELAY=2
-CONFIG_IO_DELAY_TYPE_NONE=3
-CONFIG_IO_DELAY_0X80=y
-# CONFIG_IO_DELAY_0XED is not set
-# CONFIG_IO_DELAY_UDELAY is not set
-# CONFIG_IO_DELAY_NONE is not set
-CONFIG_DEFAULT_IO_DELAY_TYPE=0
-# CONFIG_DEBUG_BOOT_PARAMS is not set
-# CONFIG_CPA_DEBUG is not set
-CONFIG_OPTIMIZE_INLINING=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_CRYPTO=y
-
-#
-# Crypto core or helper
-#
-CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_ALGAPI2=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_BLKCIPHER2=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_PCOMP=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_NULL is not set
-CONFIG_CRYPTO_WORKQUEUE=y
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_AUTHENC=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Authenticated Encryption with Associated Data
-#
-# CONFIG_CRYPTO_CCM is not set
-# CONFIG_CRYPTO_GCM is not set
-# CONFIG_CRYPTO_SEQIV is not set
-
-#
-# Block modes
-#
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_CTR is not set
-# CONFIG_CRYPTO_CTS is not set
-CONFIG_CRYPTO_ECB=y
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_XTS is not set
-
-#
-# Hash modes
-#
-CONFIG_CRYPTO_HMAC=y
-# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_VMAC is not set
-
-#
-# Digest
-#
-CONFIG_CRYPTO_CRC32C=y
-# CONFIG_CRYPTO_CRC32C_INTEL is not set
-# CONFIG_CRYPTO_GHASH is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_RMD128 is not set
-# CONFIG_CRYPTO_RMD160 is not set
-# CONFIG_CRYPTO_RMD256 is not set
-# CONFIG_CRYPTO_RMD320 is not set
-CONFIG_CRYPTO_SHA1=y
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_WP512 is not set
-
-#
-# Ciphers
-#
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_AES_586=y
-# CONFIG_CRYPTO_ANUBIS is not set
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_SALSA20 is not set
-# CONFIG_CRYPTO_SALSA20_586 is not set
-# CONFIG_CRYPTO_SEED is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_TWOFISH_586 is not set
-
-#
-# Compression
-#
-# CONFIG_CRYPTO_DEFLATE is not set
-CONFIG_CRYPTO_ZLIB=y
-# CONFIG_CRYPTO_LZO is not set
-
-#
-# Random Number Generation
-#
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_HW=y
-# CONFIG_CRYPTO_DEV_PADLOCK is not set
-# CONFIG_CRYPTO_DEV_GEODE is not set
-# CONFIG_CRYPTO_DEV_HIFN_795X is not set
-CONFIG_HAVE_KVM=y
-# CONFIG_VIRTUALIZATION is not set
-CONFIG_BINARY_PRINTF=y
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-CONFIG_GENERIC_FIND_FIRST_BIT=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_FIND_LAST_BIT=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC_T10DIF=y
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_DECOMPRESS_GZIP=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
-CONFIG_NLATTR=y
diff --git a/android-x86/kernel/vmlinux-qemu b/android-x86/kernel/vmlinux-qemu
new file mode 100755
index 0000000..daaec91
--- /dev/null
+++ b/android-x86/kernel/vmlinux-qemu
Binary files differ
diff --git a/android-x86/kernel/vmlinux-vbox b/android-x86/kernel/vmlinux-vbox
new file mode 100755
index 0000000..ca40c99
--- /dev/null
+++ b/android-x86/kernel/vmlinux-vbox
Binary files differ
diff --git a/common/pc-bios/Android.mk b/common/pc-bios/Android.mk
new file mode 100644
index 0000000..9c99865
--- /dev/null
+++ b/common/pc-bios/Android.mk
@@ -0,0 +1,35 @@
+#
+# Copyright (C) 2011 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+LOCAL_PATH := $(my-dir)
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := bios.bin
+LOCAL_SRC_FILES := $(LOCAL_MODULE)
+LOCAL_IS_HOST_MODULE := true
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_CLASS := EXECUTABLES
+LOCAL_MODULE_PATH := $(HOST_OUT)/usr/share/pc-bios
+include $(BUILD_PREBUILT)
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := vgabios-cirrus.bin
+LOCAL_SRC_FILES := $(LOCAL_MODULE)
+LOCAL_IS_HOST_MODULE := true
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_CLASS := EXECUTABLES
+LOCAL_MODULE_PATH := $(HOST_OUT)/usr/share/pc-bios
+include $(BUILD_PREBUILT)
+
diff --git a/common/pc-bios/bios.bin b/common/pc-bios/bios.bin
new file mode 100644
index 0000000..ed9b8f7
--- /dev/null
+++ b/common/pc-bios/bios.bin
Binary files differ
diff --git a/common/pc-bios/vgabios-cirrus.bin b/common/pc-bios/vgabios-cirrus.bin
new file mode 100644
index 0000000..d32ec21
--- /dev/null
+++ b/common/pc-bios/vgabios-cirrus.bin
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES
new file mode 100644
index 0000000..a882fa2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES
@@ -0,0 +1,32 @@
+Sources for this prebuilt toolchain can be downloaded from Android Opensource
+Project GIT repository git://android.git.kernel.org/toolchain.
+
+gcc/ synced to
+ commit d9394eebf42aee6de56a970df3c56e67e5455545
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Wed Mar 16 14:47:42 2011 -0700
+
+binutils/ synced to
+ commit a4316ba2b7698435a68e9826cabd87ae43dad182
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Mon Feb 14 12:02:57 2011 -0800
+
+gdb/ synced to
+ commit 3954a66c7a6939e2c7bed362ec4df06b9f921bcf
+ Author: Jean-Baptiste Queru <jbq@google.com>
+ Date: Tue Jan 4 14:52:40 2011 -0800
+
+gmp/ synced to
+ commit 9fb242a79dd122d7fbf867daf5620dba6927bd2e
+ Author: Jing Yu <jingyu@google.com>
+ Date: Thu Nov 5 17:43:59 2009 -0800
+
+mpfr/ synced to
+ commit da6dfde986af1b56f0f41e9f5de61d093fa8af90
+ Author: Jing Yu <jingyu@google.com>
+ Date: Thu Nov 5 17:50:13 2009 -0800
+
+build/ synced to
+ commit b57a44f739598a081d8efed906a523b98ec45fef
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Wed Mar 23 11:53:17 2011 -0700
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ar b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ar
new file mode 100755
index 0000000..c4eaaba
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ar
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/as b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/as
new file mode 100755
index 0000000..3cbe5b3
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/as
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/c++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/c++
new file mode 100755
index 0000000..ce4cb54
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/c++
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/g++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/g++
new file mode 100755
index 0000000..ce4cb54
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/g++
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/gcc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/gcc
new file mode 100755
index 0000000..5b109a9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/gcc
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld
new file mode 100755
index 0000000..a76029b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.bfd b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.bfd
new file mode 100755
index 0000000..ddfd4c4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.bfd
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.gold b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.gold
new file mode 100755
index 0000000..a76029b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ld.gold
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/nm b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/nm
new file mode 100755
index 0000000..472b157
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/nm
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objcopy b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objcopy
new file mode 100755
index 0000000..ca12732
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objcopy
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objdump b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objdump
new file mode 100755
index 0000000..64475f2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/objdump
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ranlib b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ranlib
new file mode 100755
index 0000000..ebb5719
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ranlib
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/strip b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/strip
new file mode 100755
index 0000000..436f77f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/strip
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg
new file mode 100644
index 0000000..73327b1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg
@@ -0,0 +1,60 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/cstdarg
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stdarg.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 20.4.6 C library
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <stdarg.h>
+
+#ifndef _GLIBCXX_CSTDARG
+#define _GLIBCXX_CSTDARG 1
+
+// Adhere to section 17.4.1.2 clause 5 of ISO 14882:1998
+#ifndef va_end
+#define va_end(ap) va_end (ap)
+#endif
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::va_list;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef
new file mode 100644
index 0000000..bb16e75
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef
@@ -0,0 +1,56 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cstddef
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stddef.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 18.1 Types
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <stddef.h>
+
+#ifndef _GLIBCXX_CSTDDEF
+#define _GLIBCXX_CSTDDEF 1
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::ptrdiff_t;
+ using ::size_t;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib
new file mode 100644
index 0000000..a29031e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib
@@ -0,0 +1,242 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/cstdlib
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stdlib.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 20.4.6 C library
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <cstddef>
+
+#ifndef _GLIBCXX_CSTDLIB
+#define _GLIBCXX_CSTDLIB 1
+
+#if !_GLIBCXX_HOSTED
+// The C standard does not require a freestanding implementation to
+// provide <stdlib.h>. However, the C++ standard does still require
+// <cstdlib> -- but only the functionality mentioned in
+// [lib.support.start.term].
+
+#define EXIT_SUCCESS 0
+#define EXIT_FAILURE 1
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ extern "C" void abort(void);
+ extern "C" int atexit(void (*)());
+ extern "C" void exit(int);
+
+_GLIBCXX_END_NAMESPACE
+
+#else
+
+#include <stdlib.h>
+
+// Get rid of those macros defined in <stdlib.h> in lieu of real functions.
+#undef abort
+#undef abs
+#undef atexit
+#undef atof
+#undef atoi
+#undef atol
+#undef bsearch
+#undef calloc
+#undef div
+#undef exit
+#undef free
+#undef getenv
+#undef labs
+#undef ldiv
+#undef malloc
+#undef mblen
+#undef mbstowcs
+#undef mbtowc
+#undef qsort
+#undef rand
+#undef realloc
+#undef srand
+#undef strtod
+#undef strtol
+#undef strtoul
+#undef system
+#undef wcstombs
+#undef wctomb
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::div_t;
+ using ::ldiv_t;
+
+ using ::abort;
+ using ::abs;
+ using ::atexit;
+ using ::atof;
+ using ::atoi;
+ using ::atol;
+ using ::bsearch;
+ using ::calloc;
+ using ::div;
+ using ::exit;
+ using ::free;
+ using ::getenv;
+ using ::labs;
+ using ::ldiv;
+ using ::malloc;
+#ifdef _GLIBCXX_HAVE_MBSTATE_T
+ using ::mblen;
+ using ::mbstowcs;
+ using ::mbtowc;
+#endif // _GLIBCXX_HAVE_MBSTATE_T
+ using ::qsort;
+ using ::rand;
+ using ::realloc;
+ using ::srand;
+ using ::strtod;
+ using ::strtol;
+ using ::strtoul;
+ using ::system;
+#ifdef _GLIBCXX_USE_WCHAR_T
+ using ::wcstombs;
+ using ::wctomb;
+#endif // _GLIBCXX_USE_WCHAR_T
+
+ inline long
+ abs(long __i) { return labs(__i); }
+
+ inline ldiv_t
+ div(long __i, long __j) { return ldiv(__i, __j); }
+
+_GLIBCXX_END_NAMESPACE
+
+#if _GLIBCXX_USE_C99
+
+#undef _Exit
+#undef llabs
+#undef lldiv
+#undef atoll
+#undef strtoll
+#undef strtoull
+#undef strtof
+#undef strtold
+
+_GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx)
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::lldiv_t;
+#endif
+#if _GLIBCXX_USE_C99_CHECK || _GLIBCXX_USE_C99_DYNAMIC
+ extern "C" void (_Exit)(int);
+#endif
+#if !_GLIBCXX_USE_C99_DYNAMIC
+ using ::_Exit;
+#endif
+
+ inline long long
+ abs(long long __x) { return __x >= 0 ? __x : -__x; }
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::llabs;
+
+ inline lldiv_t
+ div(long long __n, long long __d)
+ { lldiv_t __q; __q.quot = __n / __d; __q.rem = __n % __d; return __q; }
+
+ using ::lldiv;
+#endif
+
+#if _GLIBCXX_USE_C99_LONG_LONG_CHECK || _GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ extern "C" long long int (atoll)(const char *);
+ extern "C" long long int
+ (strtoll)(const char * restrict, char ** restrict, int);
+ extern "C" unsigned long long int
+ (strtoull)(const char * restrict, char ** restrict, int);
+#endif
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::atoll;
+ using ::strtoll;
+ using ::strtoull;
+#endif
+ using ::strtof;
+ using ::strtold;
+
+_GLIBCXX_END_NAMESPACE
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::__gnu_cxx::lldiv_t;
+#endif
+ using ::__gnu_cxx::_Exit;
+ using ::__gnu_cxx::abs;
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::__gnu_cxx::llabs;
+ using ::__gnu_cxx::div;
+ using ::__gnu_cxx::lldiv;
+#endif
+ using ::__gnu_cxx::atoll;
+ using ::__gnu_cxx::strtof;
+ using ::__gnu_cxx::strtoll;
+ using ::__gnu_cxx::strtoull;
+ using ::__gnu_cxx::strtold;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif // _GLIBCXX_USE_C99
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+# if defined(_GLIBCXX_INCLUDE_AS_TR1)
+# error C++0x header cannot be included from TR1 header
+# endif
+# if defined(_GLIBCXX_INCLUDE_AS_CXX0X)
+# include <tr1_impl/cstdlib>
+# else
+# define _GLIBCXX_INCLUDE_AS_CXX0X
+# define _GLIBCXX_BEGIN_NAMESPACE_TR1
+# define _GLIBCXX_END_NAMESPACE_TR1
+# define _GLIBCXX_TR1
+# include <tr1_impl/cstdlib>
+# undef _GLIBCXX_TR1
+# undef _GLIBCXX_END_NAMESPACE_TR1
+# undef _GLIBCXX_BEGIN_NAMESPACE_TR1
+# undef _GLIBCXX_INCLUDE_AS_CXX0X
+# endif
+#endif
+
+#endif // !_GLIBCXX_HOSTED
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h
new file mode 100644
index 0000000..e0cf1d0
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h
@@ -0,0 +1,51 @@
+// cxxabi.h subset for inclusion by other library headers -*- C++ -*-
+
+// Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+#ifndef _CXXABI_FORCED_H
+#define _CXXABI_FORCED_H 1
+
+#pragma GCC visibility push(default)
+
+#ifdef __cplusplus
+namespace __cxxabiv1
+{
+ /**
+ * @brief Thrown as part of forced unwinding.
+ * @ingroup exceptions
+ *
+ * A magic placeholder class that can be caught by reference to
+ * recognize forced unwinding.
+ */
+ class __forced_unwind
+ {
+ virtual ~__forced_unwind() throw();
+ virtual void __pure_dummy() = 0; // prevent catch by value
+ };
+}
+#endif // __cplusplus
+
+#pragma GCC visibility pop
+
+#endif // __CXXABI_FORCED_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h
new file mode 100644
index 0000000..bfdd8e5
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h
@@ -0,0 +1,608 @@
+// new abi support -*- C++ -*-
+
+// Copyright (C) 2000, 2002, 2003, 2004, 2006, 2007, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+// Written by Nathan Sidwell, Codesourcery LLC, <nathan@codesourcery.com>
+
+/* This file declares the new abi entry points into the runtime. It is not
+ normally necessary for user programs to include this header, or use the
+ entry points directly. However, this header is available should that be
+ needed.
+
+ Some of the entry points are intended for both C and C++, thus this header
+ is includable from both C and C++. Though the C++ specific parts are not
+ available in C, naturally enough. */
+
+/** @file cxxabi.h
+ * The header provides an interface to the C++ ABI.
+ */
+
+#ifndef _CXXABI_H
+#define _CXXABI_H 1
+
+#pragma GCC visibility push(default)
+
+#include <stddef.h>
+#include <bits/cxxabi_tweaks.h>
+#include <cxxabi-forced.h>
+
+#ifdef __cplusplus
+#define _GLIBCXX_NOTHROW throw()
+#else
+#define _GLIBCXX_NOTHROW __attribute__((nothrow))
+#endif
+
+#ifdef __cplusplus
+namespace __cxxabiv1
+{
+ extern "C"
+ {
+#endif
+
+ typedef __cxa_cdtor_return_type (*__cxa_cdtor_type)(void *);
+
+ // Allocate array.
+ void*
+ __cxa_vec_new(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor);
+
+ void*
+ __cxa_vec_new2(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor, void *(*__alloc) (size_t),
+ void (*__dealloc) (void*));
+
+ void*
+ __cxa_vec_new3(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor, void *(*__alloc) (size_t),
+ void (*__dealloc) (void*, size_t));
+
+ // Construct array.
+ __cxa_vec_ctor_return_type
+ __cxa_vec_ctor(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor);
+
+ __cxa_vec_ctor_return_type
+ __cxa_vec_cctor(void* dest_array, void* src_array, size_t element_count,
+ size_t element_size,
+ __cxa_cdtor_return_type (*constructor) (void*, void*),
+ __cxa_cdtor_type destructor);
+
+ // Destruct array.
+ void
+ __cxa_vec_dtor(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type destructor);
+
+ void
+ __cxa_vec_cleanup(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type destructor);
+
+ // Destruct and release array.
+ void
+ __cxa_vec_delete(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor);
+
+ void
+ __cxa_vec_delete2(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor,
+ void (*__dealloc) (void*));
+
+ void
+ __cxa_vec_delete3(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor,
+ void (*__dealloc) (void*, size_t));
+
+ int
+ __cxa_guard_acquire(__guard*);
+
+ void
+ __cxa_guard_release(__guard*);
+
+ void
+ __cxa_guard_abort(__guard*);
+
+ // Pure virtual functions.
+ void
+ __cxa_pure_virtual(void);
+
+ // Exception handling.
+ void
+ __cxa_bad_cast();
+
+ void
+ __cxa_bad_typeid();
+
+ // DSO destruction.
+ int
+ __cxa_atexit(void (*)(void*), void*, void*) _GLIBCXX_NOTHROW;
+
+ int
+ __cxa_finalize(void*);
+
+
+ /**
+ * @brief Demangling routine.
+ * ABI-mandated entry point in the C++ runtime library for demangling.
+ *
+ * @param __mangled_name A NUL-terminated character string
+ * containing the name to be demangled.
+ *
+ * @param __output_buffer A region of memory, allocated with
+ * malloc, of @a *__length bytes, into which the demangled name is
+ * stored. If @a __output_buffer is not long enough, it is
+ * expanded using realloc. @a __output_buffer may instead be NULL;
+ * in that case, the demangled name is placed in a region of memory
+ * allocated with malloc.
+ *
+ * @param __length If @a __length is non-NULL, the length of the
+ * buffer containing the demangled name is placed in @a *__length.
+ *
+ * @param __status @a *__status is set to one of the following values:
+ * 0: The demangling operation succeeded.
+ * -1: A memory allocation failiure occurred.
+ * -2: @a mangled_name is not a valid name under the C++ ABI mangling rules.
+ * -3: One of the arguments is invalid.
+ *
+ * @return A pointer to the start of the NUL-terminated demangled
+ * name, or NULL if the demangling fails. The caller is
+ * responsible for deallocating this memory using @c free.
+ *
+ * The demangling is performed using the C++ ABI mangling rules,
+ * with GNU extensions. For example, this function is used in
+ * __gnu_cxx::__verbose_terminate_handler.
+ *
+ * See http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt12ch39.html
+ * for other examples of use.
+ *
+ * @note The same demangling functionality is available via
+ * libiberty (@c <libiberty/demangle.h> and @c libiberty.a) in GCC
+ * 3.1 and later, but that requires explicit installation (@c
+ * --enable-install-libiberty) and uses a different API, although
+ * the ABI is unchanged.
+ */
+ char*
+ __cxa_demangle(const char* __mangled_name, char* __output_buffer,
+ size_t* __length, int* __status);
+#ifdef __cplusplus
+ }
+} // namespace __cxxabiv1
+#endif
+
+#ifdef __cplusplus
+
+#include <typeinfo>
+
+namespace __cxxabiv1
+{
+ // Type information for int, float etc.
+ class __fundamental_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __fundamental_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__fundamental_type_info();
+ };
+
+ // Type information for array objects.
+ class __array_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __array_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__array_type_info();
+ };
+
+ // Type information for functions (both member and non-member).
+ class __function_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __function_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__function_type_info();
+
+ protected:
+ // Implementation defined member function.
+ virtual bool
+ __is_function_p() const;
+ };
+
+ // Type information for enumerations.
+ class __enum_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __enum_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__enum_type_info();
+ };
+
+ // Common type information for simple pointers and pointers to member.
+ class __pbase_type_info : public std::type_info
+ {
+ public:
+ unsigned int __flags; // Qualification of the target object.
+ const std::type_info* __pointee; // Type of pointed to object.
+
+ explicit
+ __pbase_type_info(const char* __n, int __quals,
+ const std::type_info* __type)
+ : std::type_info(__n), __flags(__quals), __pointee(__type)
+ { }
+
+ virtual
+ ~__pbase_type_info();
+
+ // Implementation defined type.
+ enum __masks
+ {
+ __const_mask = 0x1,
+ __volatile_mask = 0x2,
+ __restrict_mask = 0x4,
+ __incomplete_mask = 0x8,
+ __incomplete_class_mask = 0x10
+ };
+
+ protected:
+ __pbase_type_info(const __pbase_type_info&);
+
+ __pbase_type_info&
+ operator=(const __pbase_type_info&);
+
+ // Implementation defined member functions.
+ virtual bool
+ __do_catch(const std::type_info* __thr_type, void** __thr_obj,
+ unsigned int __outer) const;
+
+ inline virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ // Type information for simple pointers.
+ class __pointer_type_info : public __pbase_type_info
+ {
+ public:
+ explicit
+ __pointer_type_info(const char* __n, int __quals,
+ const std::type_info* __type)
+ : __pbase_type_info (__n, __quals, __type) { }
+
+
+ virtual
+ ~__pointer_type_info();
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __is_pointer_p() const;
+
+ virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ class __class_type_info;
+
+ // Type information for a pointer to member variable.
+ class __pointer_to_member_type_info : public __pbase_type_info
+ {
+ public:
+ __class_type_info* __context; // Class of the member.
+
+ explicit
+ __pointer_to_member_type_info(const char* __n, int __quals,
+ const std::type_info* __type,
+ __class_type_info* __klass)
+ : __pbase_type_info(__n, __quals, __type), __context(__klass) { }
+
+ virtual
+ ~__pointer_to_member_type_info();
+
+ protected:
+ __pointer_to_member_type_info(const __pointer_to_member_type_info&);
+
+ __pointer_to_member_type_info&
+ operator=(const __pointer_to_member_type_info&);
+
+ // Implementation defined member function.
+ virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ // Helper class for __vmi_class_type.
+ class __base_class_type_info
+ {
+ public:
+ const __class_type_info* __base_type; // Base class type.
+ long __offset_flags; // Offset and info.
+
+ enum __offset_flags_masks
+ {
+ __virtual_mask = 0x1,
+ __public_mask = 0x2,
+ __hwm_bit = 2,
+ __offset_shift = 8 // Bits to shift offset.
+ };
+
+ // Implementation defined member functions.
+ bool
+ __is_virtual_p() const
+ { return __offset_flags & __virtual_mask; }
+
+ bool
+ __is_public_p() const
+ { return __offset_flags & __public_mask; }
+
+ ptrdiff_t
+ __offset() const
+ {
+ // This shift, being of a signed type, is implementation
+ // defined. GCC implements such shifts as arithmetic, which is
+ // what we want.
+ return static_cast<ptrdiff_t>(__offset_flags) >> __offset_shift;
+ }
+ };
+
+ // Type information for a class.
+ class __class_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __class_type_info (const char *__n) : type_info(__n) { }
+
+ virtual
+ ~__class_type_info ();
+
+ // Implementation defined types.
+ // The type sub_kind tells us about how a base object is contained
+ // within a derived object. We often do this lazily, hence the
+ // UNKNOWN value. At other times we may use NOT_CONTAINED to mean
+ // not publicly contained.
+ enum __sub_kind
+ {
+ // We have no idea.
+ __unknown = 0,
+
+ // Not contained within us (in some circumstances this might
+ // mean not contained publicly)
+ __not_contained,
+
+ // Contained ambiguously.
+ __contained_ambig,
+
+ // Via a virtual path.
+ __contained_virtual_mask = __base_class_type_info::__virtual_mask,
+
+ // Via a public path.
+ __contained_public_mask = __base_class_type_info::__public_mask,
+
+ // Contained within us.
+ __contained_mask = 1 << __base_class_type_info::__hwm_bit,
+
+ __contained_private = __contained_mask,
+ __contained_public = __contained_mask | __contained_public_mask
+ };
+
+ struct __upcast_result;
+ struct __dyncast_result;
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __do_upcast(const __class_type_info* __dst_type, void**__obj_ptr) const;
+
+ virtual bool
+ __do_catch(const type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+
+ public:
+ // Helper for upcast. See if DST is us, or one of our bases.
+ // Return false if not found, true if found.
+ virtual bool
+ __do_upcast(const __class_type_info* __dst, const void* __obj,
+ __upcast_result& __restrict __result) const;
+
+ // Indicate whether SRC_PTR of type SRC_TYPE is contained publicly
+ // within OBJ_PTR. OBJ_PTR points to a base object of our type,
+ // which is the destination type. SRC2DST indicates how SRC
+ // objects might be contained within this type. If SRC_PTR is one
+ // of our SRC_TYPE bases, indicate the virtuality. Returns
+ // not_contained for non containment or private containment.
+ inline __sub_kind
+ __find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+
+ // Helper for dynamic cast. ACCESS_PATH gives the access from the
+ // most derived object to this base. DST_TYPE indicates the
+ // desired type we want. OBJ_PTR points to a base of our type
+ // within the complete object. SRC_TYPE indicates the static type
+ // started from and SRC_PTR points to that base within the most
+ // derived object. Fill in RESULT with what we find. Return true
+ // if we have located an ambiguous match.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ // Helper for find_public_subobj. SRC2DST indicates how SRC_TYPE
+ // bases are inherited by the type started from -- which is not
+ // necessarily the current type. The current type will be a base
+ // of the destination type. OBJ_PTR points to the current base.
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+ };
+
+ // Type information for a class with a single non-virtual base.
+ class __si_class_type_info : public __class_type_info
+ {
+ public:
+ const __class_type_info* __base_type;
+
+ explicit
+ __si_class_type_info(const char *__n, const __class_type_info *__base)
+ : __class_type_info(__n), __base_type(__base) { }
+
+ virtual
+ ~__si_class_type_info();
+
+ protected:
+ __si_class_type_info(const __si_class_type_info&);
+
+ __si_class_type_info&
+ operator=(const __si_class_type_info&);
+
+ // Implementation defined member functions.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __sub_ptr) const;
+
+ virtual bool
+ __do_upcast(const __class_type_info*__dst, const void*__obj,
+ __upcast_result& __restrict __result) const;
+ };
+
+ // Type information for a class with multiple and/or virtual bases.
+ class __vmi_class_type_info : public __class_type_info
+ {
+ public:
+ unsigned int __flags; // Details about the class hierarchy.
+ unsigned int __base_count; // Number of direct bases.
+
+ // The array of bases uses the trailing array struct hack so this
+ // class is not constructable with a normal constructor. It is
+ // internally generated by the compiler.
+ __base_class_type_info __base_info[1]; // Array of bases.
+
+ explicit
+ __vmi_class_type_info(const char* __n, int ___flags)
+ : __class_type_info(__n), __flags(___flags), __base_count(0) { }
+
+ virtual
+ ~__vmi_class_type_info();
+
+ // Implementation defined types.
+ enum __flags_masks
+ {
+ __non_diamond_repeat_mask = 0x1, // Distinct instance of repeated base.
+ __diamond_shaped_mask = 0x2, // Diamond shaped multiple inheritance.
+ __flags_unknown_mask = 0x10
+ };
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+
+ virtual bool
+ __do_upcast(const __class_type_info* __dst, const void* __obj,
+ __upcast_result& __restrict __result) const;
+ };
+
+ // Dynamic cast runtime.
+ // src2dst has the following possible values
+ // >-1: src_type is a unique public non-virtual base of dst_type
+ // dst_ptr + src2dst == src_ptr
+ // -1: unspecified relationship
+ // -2: src_type is not a public base of dst_type
+ // -3: src_type is a multiple public non-virtual base of dst_type
+ extern "C" void*
+ __dynamic_cast(const void* __src_ptr, // Starting object.
+ const __class_type_info* __src_type, // Static type of object.
+ const __class_type_info* __dst_type, // Desired target type.
+ ptrdiff_t __src2dst); // How src and dst are related.
+
+
+ // Returns the type_info for the currently handled exception [15.3/8], or
+ // null if there is none.
+ extern "C" std::type_info*
+ __cxa_current_exception_type();
+
+ // A magic placeholder class that can be caught by reference
+ // to recognize foreign exceptions.
+ class __foreign_exception
+ {
+ virtual ~__foreign_exception() throw();
+ virtual void __pure_dummy() = 0; // prevent catch by value
+ };
+
+} // namespace __cxxabiv1
+
+/** @namespace abi
+ * @brief The cross-vendor C++ Application Binary Interface. A
+ * namespace alias to __cxxabiv1, but user programs should use the
+ * alias `abi'.
+ *
+ * A brief overview of an ABI is given in the libstdc++ FAQ, question
+ * 5.8 (you may have a copy of the FAQ locally, or you can view the online
+ * version at http://gcc.gnu.org/onlinedocs/libstdc++/faq/index.html#5_8).
+ *
+ * GCC subscribes to a cross-vendor ABI for C++, sometimes
+ * called the IA64 ABI because it happens to be the native ABI for that
+ * platform. It is summarized at http://www.codesourcery.com/cxx-abi/
+ * along with the current specification.
+ *
+ * For users of GCC greater than or equal to 3.x, entry points are
+ * available in <cxxabi.h>, which notes, <em>"It is not normally
+ * necessary for user programs to include this header, or use the
+ * entry points directly. However, this header is available should
+ * that be needed."</em>
+*/
+namespace abi = __cxxabiv1;
+
+#endif // __cplusplus
+
+#pragma GCC visibility pop
+
+#endif // __CXXABI_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception
new file mode 100644
index 0000000..7fa929b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception
@@ -0,0 +1,151 @@
+// Exception Handling support header for -*- C++ -*-
+
+// Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+// 2004, 2005, 2006, 2007, 2008, 2009
+// Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file exception
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef __EXCEPTION__
+#define __EXCEPTION__
+
+#pragma GCC visibility push(default)
+
+#include <bits/c++config.h>
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @defgroup exceptions Exceptions
+ * @ingroup diagnostics
+ *
+ * Classes and functions for reporting errors via exception classes.
+ * @{
+ */
+
+ /**
+ * @brief Base class for all library exceptions.
+ *
+ * This is the base class for all exceptions thrown by the standard
+ * library, and by certain language expressions. You are free to derive
+ * your own %exception classes, or use a different hierarchy, or to
+ * throw non-class data (e.g., fundamental types).
+ */
+ class exception
+ {
+ public:
+ exception() throw() { }
+ virtual ~exception() throw();
+
+ /** Returns a C-style character string describing the general cause
+ * of the current error. */
+ virtual const char* what() const throw();
+ };
+
+ /** If an %exception is thrown which is not listed in a function's
+ * %exception specification, one of these may be thrown. */
+ class bad_exception : public exception
+ {
+ public:
+ bad_exception() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_exception() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ /// If you write a replacement %terminate handler, it must be of this type.
+ typedef void (*terminate_handler) ();
+
+ /// If you write a replacement %unexpected handler, it must be of this type.
+ typedef void (*unexpected_handler) ();
+
+ /// Takes a new handler function as an argument, returns the old function.
+ terminate_handler set_terminate(terminate_handler) throw();
+
+ /** The runtime will call this function if %exception handling must be
+ * abandoned for any reason. It can also be called by the user. */
+ void terminate() __attribute__ ((__noreturn__));
+
+ /// Takes a new handler function as an argument, returns the old function.
+ unexpected_handler set_unexpected(unexpected_handler) throw();
+
+ /** The runtime will call this function if an %exception is thrown which
+ * violates the function's %exception specification. */
+ void unexpected() __attribute__ ((__noreturn__));
+
+ /** [18.6.4]/1: "Returns true after completing evaluation of a
+ * throw-expression until either completing initialization of the
+ * exception-declaration in the matching handler or entering @c unexpected()
+ * due to the throw; or after entering @c terminate() for any reason
+ * other than an explicit call to @c terminate(). [Note: This includes
+ * stack unwinding [15.2]. end note]"
+ *
+ * 2: "When @c uncaught_exception() is true, throwing an %exception can
+ * result in a call of @c terminate() (15.5.1)."
+ */
+ bool uncaught_exception() throw();
+
+ // @} group exceptions
+} // namespace std
+
+_GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx)
+
+ /**
+ * @brief A replacement for the standard terminate_handler which
+ * prints more information about the terminating exception (if any)
+ * on stderr.
+ *
+ * @ingroup exceptions
+ *
+ * Call
+ * @code
+ * std::set_terminate(__gnu_cxx::__verbose_terminate_handler)
+ * @endcode
+ * to use. For more info, see
+ * http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt02ch06s02.html
+ *
+ * In 3.4 and later, this is on by default.
+ */
+ void __verbose_terminate_handler();
+
+_GLIBCXX_END_NAMESPACE
+
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#if (defined(__GXX_EXPERIMENTAL_CXX0X__) \
+ && defined(_GLIBCXX_ATOMIC_BUILTINS_4))
+#include <exception_ptr.h>
+#endif
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h
new file mode 100644
index 0000000..951d96f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h
@@ -0,0 +1,49 @@
+// -fno-exceptions Support -*- C++ -*-
+
+// Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+//
+// ISO C++ 14882: 19.1 Exception classes
+//
+
+/** @file exception_defines.h
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef _EXCEPTION_DEFINES_H
+#define _EXCEPTION_DEFINES_H 1
+
+#ifndef __EXCEPTIONS
+// Iff -fno-exceptions, transform error handling code to work without it.
+# define __try if (true)
+# define __catch(X) if (false)
+# define __throw_exception_again
+#else
+// Else proceed normally.
+# define __try try
+# define __catch(X) catch(X)
+# define __throw_exception_again throw
+#endif
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h
new file mode 100644
index 0000000..b24ec21
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h
@@ -0,0 +1,171 @@
+// Exception Handling support header (exception_ptr class) for -*- C++ -*-
+
+// Copyright (C) 2008, 2009 Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file exception_ptr.h
+ * This is an internal header file, included by other headers and the
+ * implementation. You should not attempt to use it directly.
+ */
+
+#ifndef _EXCEPTION_PTR_H
+#define _EXCEPTION_PTR_H
+
+#pragma GCC visibility push(default)
+
+#include <bits/c++config.h>
+#include <exception_defines.h>
+
+#if !defined(_GLIBCXX_ATOMIC_BUILTINS_4)
+# error This platform does not support exception propagation.
+#endif
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @addtogroup exceptions
+ * @{
+ */
+
+ // Hide the free operators from other types
+ namespace __exception_ptr
+ {
+ /**
+ * @brief An opaque pointer to an arbitrary exception.
+ */
+ class exception_ptr;
+ }
+
+ using __exception_ptr::exception_ptr;
+
+ /** Obtain an %exception_ptr to the currently handled exception. If there
+ * is none, or the currently handled exception is foreign, return the null
+ * value.
+ */
+ exception_ptr current_exception() throw();
+
+ /// Throw the object pointed to by the %exception_ptr.
+ void rethrow_exception(exception_ptr) __attribute__ ((__noreturn__));
+
+ /// Obtain an %exception_ptr pointing to a copy of the supplied object.
+ template<typename _Ex>
+ exception_ptr
+ copy_exception(_Ex __ex) throw();
+
+ namespace __exception_ptr
+ {
+ bool
+ operator==(const exception_ptr&, const exception_ptr&) throw();
+
+ bool
+ operator!=(const exception_ptr&, const exception_ptr&) throw();
+
+ class exception_ptr
+ {
+ void* _M_exception_object;
+
+ explicit exception_ptr(void* __e) throw();
+
+ void _M_addref() throw();
+ void _M_release() throw();
+
+ void *_M_get() const throw();
+
+ void _M_safe_bool_dummy();
+
+ friend exception_ptr std::current_exception() throw();
+ friend void std::rethrow_exception(exception_ptr);
+
+ public:
+ exception_ptr() throw();
+
+ typedef void (exception_ptr::*__safe_bool)();
+
+ // For construction from nullptr or 0.
+ exception_ptr(__safe_bool) throw();
+
+ exception_ptr(const exception_ptr&) throw();
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ exception_ptr(exception_ptr&& __o) throw()
+ : _M_exception_object(__o._M_exception_object)
+ { __o._M_exception_object = 0; }
+#endif
+
+ exception_ptr&
+ operator=(const exception_ptr&) throw();
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ exception_ptr&
+ operator=(exception_ptr&& __o) throw()
+ {
+ exception_ptr(static_cast<exception_ptr&&>(__o)).swap(*this);
+ return *this;
+ }
+#endif
+
+ ~exception_ptr() throw();
+
+ void
+ swap(exception_ptr&) throw();
+
+#ifdef _GLIBCXX_EH_PTR_COMPAT
+ // Retained for compatibility with CXXABI_1.3.
+ bool operator!() const throw();
+ operator __safe_bool() const throw();
+#endif
+
+ friend bool
+ operator==(const exception_ptr&, const exception_ptr&) throw();
+
+ const type_info*
+ __cxa_exception_type() const throw();
+ };
+
+ } // namespace __exception_ptr
+
+
+ template<typename _Ex>
+ exception_ptr
+ copy_exception(_Ex __ex) throw()
+ {
+ __try
+ {
+ throw __ex;
+ }
+ __catch(...)
+ {
+ return current_exception ();
+ }
+ }
+
+ // @} group exceptions
+} // namespace std
+
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list
new file mode 100644
index 0000000..6b8a202
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list
@@ -0,0 +1,72 @@
+// std::initializer_list support -*- C++ -*-
+
+// Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file initializer_list
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef __CXX_INITIALIZER_LIST
+#define __CXX_INITIALIZER_LIST
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+
+#pragma GCC visibility push(default)
+
+#include <cstddef>
+
+namespace std
+{
+ /// initializer_list
+ template<class _E>
+ class initializer_list
+ {
+ const _E* __array;
+ size_t __len;
+
+ // The compiler can call a private constructor.
+ initializer_list(const _E* __a, size_t __l)
+ : __array(__a), __len(__l) { }
+
+ public:
+ initializer_list()
+ : __array(NULL), __len(0) { }
+
+ // Number of elements.
+ size_t size() const
+ { return __len; }
+
+ // First element.
+ const _E* begin() const
+ { return __array; }
+
+ // One past the last element.
+ const _E* end() const
+ { return begin() + size(); }
+ };
+}
+
+#pragma GCC visibility pop
+#endif // C++0x
+#endif // __CXX_INITIALIZER_LIST
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits
new file mode 100644
index 0000000..41bf806
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits
@@ -0,0 +1,1256 @@
+// The template and inlines for the numeric_limits classes. -*- C++ -*-
+
+// Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+// 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file limits
+ * This is a Standard C++ Library header.
+ */
+
+// Note: this is not a conforming implementation.
+// Written by Gabriel Dos Reis <gdr@codesourcery.com>
+
+//
+// ISO 14882:1998
+// 18.2.1
+//
+
+#ifndef _GLIBCXX_NUMERIC_LIMITS
+#define _GLIBCXX_NUMERIC_LIMITS 1
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+
+//
+// The numeric_limits<> traits document implementation-defined aspects
+// of fundamental arithmetic data types (integers and floating points).
+// From Standard C++ point of view, there are 13 such types:
+// * integers
+// bool (1)
+// char, signed char, unsigned char (3)
+// short, unsigned short (2)
+// int, unsigned (2)
+// long, unsigned long (2)
+//
+// * floating points
+// float (1)
+// double (1)
+// long double (1)
+//
+// GNU C++ understands (where supported by the host C-library)
+// * integer
+// long long, unsigned long long (2)
+//
+// which brings us to 15 fundamental arithmetic data types in GNU C++.
+//
+//
+// Since a numeric_limits<> is a bit tricky to get right, we rely on
+// an interface composed of macros which should be defined in config/os
+// or config/cpu when they differ from the generic (read arbitrary)
+// definitions given here.
+//
+
+// These values can be overridden in the target configuration file.
+// The default values are appropriate for many 32-bit targets.
+
+// GCC only intrinsically supports modulo integral types. The only remaining
+// integral exceptional values is division by zero. Only targets that do not
+// signal division by zero in some "hard to ignore" way should use false.
+#ifndef __glibcxx_integral_traps
+# define __glibcxx_integral_traps true
+#endif
+
+// float
+//
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_float_has_denorm_loss
+# define __glibcxx_float_has_denorm_loss false
+#endif
+#ifndef __glibcxx_float_traps
+# define __glibcxx_float_traps false
+#endif
+#ifndef __glibcxx_float_tinyness_before
+# define __glibcxx_float_tinyness_before false
+#endif
+
+// double
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_double_has_denorm_loss
+# define __glibcxx_double_has_denorm_loss false
+#endif
+#ifndef __glibcxx_double_traps
+# define __glibcxx_double_traps false
+#endif
+#ifndef __glibcxx_double_tinyness_before
+# define __glibcxx_double_tinyness_before false
+#endif
+
+// long double
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_long_double_has_denorm_loss
+# define __glibcxx_long_double_has_denorm_loss false
+#endif
+#ifndef __glibcxx_long_double_traps
+# define __glibcxx_long_double_traps false
+#endif
+#ifndef __glibcxx_long_double_tinyness_before
+# define __glibcxx_long_double_tinyness_before false
+#endif
+
+// You should not need to define any macros below this point.
+
+#define __glibcxx_signed(T) ((T)(-1) < 0)
+
+#define __glibcxx_min(T) \
+ (__glibcxx_signed (T) ? (T)1 << __glibcxx_digits (T) : (T)0)
+
+#define __glibcxx_max(T) \
+ (__glibcxx_signed (T) ? \
+ (((((T)1 << (__glibcxx_digits (T) - 1)) - 1) << 1) + 1) : ~(T)0)
+
+#define __glibcxx_digits(T) \
+ (sizeof(T) * __CHAR_BIT__ - __glibcxx_signed (T))
+
+// The fraction 643/2136 approximates log10(2) to 7 significant digits.
+#define __glibcxx_digits10(T) \
+ (__glibcxx_digits (T) * 643 / 2136)
+
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ /**
+ * @brief Describes the rounding style for floating-point types.
+ *
+ * This is used in the std::numeric_limits class.
+ */
+ enum float_round_style
+ {
+ round_indeterminate = -1, ///< Self-explanatory.
+ round_toward_zero = 0, ///< Self-explanatory.
+ round_to_nearest = 1, ///< To the nearest representable value.
+ round_toward_infinity = 2, ///< Self-explanatory.
+ round_toward_neg_infinity = 3 ///< Self-explanatory.
+ };
+
+ /**
+ * @brief Describes the denormalization for floating-point types.
+ *
+ * These values represent the presence or absence of a variable number
+ * of exponent bits. This type is used in the std::numeric_limits class.
+ */
+ enum float_denorm_style
+ {
+ /// Indeterminate at compile time whether denormalized values are allowed.
+ denorm_indeterminate = -1,
+ /// The type does not allow denormalized values.
+ denorm_absent = 0,
+ /// The type allows denormalized values.
+ denorm_present = 1
+ };
+
+ /**
+ * @brief Part of std::numeric_limits.
+ *
+ * The @c static @c const members are usable as integral constant
+ * expressions.
+ *
+ * @note This is a separate class for purposes of efficiency; you
+ * should only access these members as part of an instantiation
+ * of the std::numeric_limits class.
+ */
+ struct __numeric_limits_base
+ {
+ /** This will be true for all fundamental types (which have
+ specializations), and false for everything else. */
+ static const bool is_specialized = false;
+
+ /** The number of @c radix digits that be represented without change: for
+ integer types, the number of non-sign bits in the mantissa; for
+ floating types, the number of @c radix digits in the mantissa. */
+ static const int digits = 0;
+ /** The number of base 10 digits that can be represented without change. */
+ static const int digits10 = 0;
+ /** True if the type is signed. */
+ static const bool is_signed = false;
+ /** True if the type is integer.
+ * Is this supposed to be "if the type is integral"?
+ */
+ static const bool is_integer = false;
+ /** True if the type uses an exact representation. "All integer types are
+ exact, but not all exact types are integer. For example, rational and
+ fixed-exponent representations are exact but not integer."
+ [18.2.1.2]/15 */
+ static const bool is_exact = false;
+ /** For integer types, specifies the base of the representation. For
+ floating types, specifies the base of the exponent representation. */
+ static const int radix = 0;
+
+ /** The minimum negative integer such that @c radix raised to the power of
+ (one less than that integer) is a normalized floating point number. */
+ static const int min_exponent = 0;
+ /** The minimum negative integer such that 10 raised to that power is in
+ the range of normalized floating point numbers. */
+ static const int min_exponent10 = 0;
+ /** The maximum positive integer such that @c radix raised to the power of
+ (one less than that integer) is a representable finite floating point
+ number. */
+ static const int max_exponent = 0;
+ /** The maximum positive integer such that 10 raised to that power is in
+ the range of representable finite floating point numbers. */
+ static const int max_exponent10 = 0;
+
+ /** True if the type has a representation for positive infinity. */
+ static const bool has_infinity = false;
+ /** True if the type has a representation for a quiet (non-signaling)
+ "Not a Number." */
+ static const bool has_quiet_NaN = false;
+ /** True if the type has a representation for a signaling
+ "Not a Number." */
+ static const bool has_signaling_NaN = false;
+ /** See std::float_denorm_style for more information. */
+ static const float_denorm_style has_denorm = denorm_absent;
+ /** "True if loss of accuracy is detected as a denormalization loss,
+ rather than as an inexact result." [18.2.1.2]/42 */
+ static const bool has_denorm_loss = false;
+
+ /** True if-and-only-if the type adheres to the IEC 559 standard, also
+ known as IEEE 754. (Only makes sense for floating point types.) */
+ static const bool is_iec559 = false;
+ /** "True if the set of values representable by the type is finite. All
+ built-in types are bounded, this member would be false for arbitrary
+ precision types." [18.2.1.2]/54 */
+ static const bool is_bounded = false;
+ /** True if the type is @e modulo, that is, if it is possible to add two
+ positive numbers and have a result that wraps around to a third number
+ that is less. Typically false for floating types, true for unsigned
+ integers, and true for signed integers. */
+ static const bool is_modulo = false;
+
+ /** True if trapping is implemented for this type. */
+ static const bool traps = false;
+ /** True if tininess is detected before rounding. (see IEC 559) */
+ static const bool tinyness_before = false;
+ /** See std::float_round_style for more information. This is only
+ meaningful for floating types; integer types will all be
+ round_toward_zero. */
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /**
+ * @brief Properties of fundamental types.
+ *
+ * This class allows a program to obtain information about the
+ * representation of a fundamental type on a given platform. For
+ * non-fundamental types, the functions will return 0 and the data
+ * members will all be @c false.
+ *
+ * _GLIBCXX_RESOLVE_LIB_DEFECTS: DRs 201 and 184 (hi Gaby!) are
+ * noted, but not incorporated in this documented (yet).
+ */
+ template<typename _Tp>
+ struct numeric_limits : public __numeric_limits_base
+ {
+ /** The minimum finite value, or for floating types with
+ denormalization, the minimum positive normalized value. */
+ static _Tp min() throw() { return static_cast<_Tp>(0); }
+ /** The maximum finite value. */
+ static _Tp max() throw() { return static_cast<_Tp>(0); }
+ /** The @e machine @e epsilon: the difference between 1 and the least
+ value greater than 1 that is representable. */
+ static _Tp epsilon() throw() { return static_cast<_Tp>(0); }
+ /** The maximum rounding error measurement (see LIA-1). */
+ static _Tp round_error() throw() { return static_cast<_Tp>(0); }
+ /** The representation of positive infinity, if @c has_infinity. */
+ static _Tp infinity() throw() { return static_cast<_Tp>(0); }
+ /** The representation of a quiet "Not a Number," if @c has_quiet_NaN. */
+ static _Tp quiet_NaN() throw() { return static_cast<_Tp>(0); }
+ /** The representation of a signaling "Not a Number," if
+ @c has_signaling_NaN. */
+ static _Tp signaling_NaN() throw() { return static_cast<_Tp>(0); }
+ /** The minimum positive denormalized value. For types where
+ @c has_denorm is false, this is the minimum positive normalized
+ value. */
+ static _Tp denorm_min() throw() { return static_cast<_Tp>(0); }
+ };
+
+ // Now there follow 15 explicit specializations. Yes, 15. Make sure
+ // you get the count right.
+
+ /// numeric_limits<bool> specialization.
+ template<>
+ struct numeric_limits<bool>
+ {
+ static const bool is_specialized = true;
+
+ static bool min() throw()
+ { return false; }
+ static bool max() throw()
+ { return true; }
+
+ static const int digits = 1;
+ static const int digits10 = 0;
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static bool epsilon() throw()
+ { return false; }
+ static bool round_error() throw()
+ { return false; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static bool infinity() throw()
+ { return false; }
+ static bool quiet_NaN() throw()
+ { return false; }
+ static bool signaling_NaN() throw()
+ { return false; }
+ static bool denorm_min() throw()
+ { return false; }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ // It is not clear what it means for a boolean type to trap.
+ // This is a DR on the LWG issue list. Here, I use integer
+ // promotion semantics.
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<char> specialization.
+ template<>
+ struct numeric_limits<char>
+ {
+ static const bool is_specialized = true;
+
+ static char min() throw()
+ { return __glibcxx_min(char); }
+ static char max() throw()
+ { return __glibcxx_max(char); }
+
+ static const int digits = __glibcxx_digits (char);
+ static const int digits10 = __glibcxx_digits10 (char);
+ static const bool is_signed = __glibcxx_signed (char);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char epsilon() throw()
+ { return 0; }
+ static char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char infinity() throw()
+ { return char(); }
+ static char quiet_NaN() throw()
+ { return char(); }
+ static char signaling_NaN() throw()
+ { return char(); }
+ static char denorm_min() throw()
+ { return static_cast<char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<signed char> specialization.
+ template<>
+ struct numeric_limits<signed char>
+ {
+ static const bool is_specialized = true;
+
+ static signed char min() throw()
+ { return -__SCHAR_MAX__ - 1; }
+ static signed char max() throw()
+ { return __SCHAR_MAX__; }
+
+ static const int digits = __glibcxx_digits (signed char);
+ static const int digits10 = __glibcxx_digits10 (signed char);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static signed char epsilon() throw()
+ { return 0; }
+ static signed char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static signed char infinity() throw()
+ { return static_cast<signed char>(0); }
+ static signed char quiet_NaN() throw()
+ { return static_cast<signed char>(0); }
+ static signed char signaling_NaN() throw()
+ { return static_cast<signed char>(0); }
+ static signed char denorm_min() throw()
+ { return static_cast<signed char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned char> specialization.
+ template<>
+ struct numeric_limits<unsigned char>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned char min() throw()
+ { return 0; }
+ static unsigned char max() throw()
+ { return __SCHAR_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned char);
+ static const int digits10 = __glibcxx_digits10 (unsigned char);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned char epsilon() throw()
+ { return 0; }
+ static unsigned char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned char infinity() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char quiet_NaN() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char signaling_NaN() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char denorm_min() throw()
+ { return static_cast<unsigned char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<wchar_t> specialization.
+ template<>
+ struct numeric_limits<wchar_t>
+ {
+ static const bool is_specialized = true;
+
+ static wchar_t min() throw()
+ { return __glibcxx_min (wchar_t); }
+ static wchar_t max() throw()
+ { return __glibcxx_max (wchar_t); }
+
+ static const int digits = __glibcxx_digits (wchar_t);
+ static const int digits10 = __glibcxx_digits10 (wchar_t);
+ static const bool is_signed = __glibcxx_signed (wchar_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static wchar_t epsilon() throw()
+ { return 0; }
+ static wchar_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static wchar_t infinity() throw()
+ { return wchar_t(); }
+ static wchar_t quiet_NaN() throw()
+ { return wchar_t(); }
+ static wchar_t signaling_NaN() throw()
+ { return wchar_t(); }
+ static wchar_t denorm_min() throw()
+ { return wchar_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ /// numeric_limits<char16_t> specialization.
+ template<>
+ struct numeric_limits<char16_t>
+ {
+ static const bool is_specialized = true;
+
+ static char16_t min() throw()
+ { return __glibcxx_min (char16_t); }
+ static char16_t max() throw()
+ { return __glibcxx_max (char16_t); }
+
+ static const int digits = __glibcxx_digits (char16_t);
+ static const int digits10 = __glibcxx_digits10 (char16_t);
+ static const bool is_signed = __glibcxx_signed (char16_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char16_t epsilon() throw()
+ { return 0; }
+ static char16_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char16_t infinity() throw()
+ { return char16_t(); }
+ static char16_t quiet_NaN() throw()
+ { return char16_t(); }
+ static char16_t signaling_NaN() throw()
+ { return char16_t(); }
+ static char16_t denorm_min() throw()
+ { return char16_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<char32_t> specialization.
+ template<>
+ struct numeric_limits<char32_t>
+ {
+ static const bool is_specialized = true;
+
+ static char32_t min() throw()
+ { return __glibcxx_min (char32_t); }
+ static char32_t max() throw()
+ { return __glibcxx_max (char32_t); }
+
+ static const int digits = __glibcxx_digits (char32_t);
+ static const int digits10 = __glibcxx_digits10 (char32_t);
+ static const bool is_signed = __glibcxx_signed (char32_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char32_t epsilon() throw()
+ { return 0; }
+ static char32_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char32_t infinity() throw()
+ { return char32_t(); }
+ static char32_t quiet_NaN() throw()
+ { return char32_t(); }
+ static char32_t signaling_NaN() throw()
+ { return char32_t(); }
+ static char32_t denorm_min() throw()
+ { return char32_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+#endif
+
+ /// numeric_limits<short> specialization.
+ template<>
+ struct numeric_limits<short>
+ {
+ static const bool is_specialized = true;
+
+ static short min() throw()
+ { return -__SHRT_MAX__ - 1; }
+ static short max() throw()
+ { return __SHRT_MAX__; }
+
+ static const int digits = __glibcxx_digits (short);
+ static const int digits10 = __glibcxx_digits10 (short);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static short epsilon() throw()
+ { return 0; }
+ static short round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static short infinity() throw()
+ { return short(); }
+ static short quiet_NaN() throw()
+ { return short(); }
+ static short signaling_NaN() throw()
+ { return short(); }
+ static short denorm_min() throw()
+ { return short(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned short> specialization.
+ template<>
+ struct numeric_limits<unsigned short>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned short min() throw()
+ { return 0; }
+ static unsigned short max() throw()
+ { return __SHRT_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned short);
+ static const int digits10 = __glibcxx_digits10 (unsigned short);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned short epsilon() throw()
+ { return 0; }
+ static unsigned short round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned short infinity() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short quiet_NaN() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short signaling_NaN() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short denorm_min() throw()
+ { return static_cast<unsigned short>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<int> specialization.
+ template<>
+ struct numeric_limits<int>
+ {
+ static const bool is_specialized = true;
+
+ static int min() throw()
+ { return -__INT_MAX__ - 1; }
+ static int max() throw()
+ { return __INT_MAX__; }
+
+ static const int digits = __glibcxx_digits (int);
+ static const int digits10 = __glibcxx_digits10 (int);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static int epsilon() throw()
+ { return 0; }
+ static int round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static int infinity() throw()
+ { return static_cast<int>(0); }
+ static int quiet_NaN() throw()
+ { return static_cast<int>(0); }
+ static int signaling_NaN() throw()
+ { return static_cast<int>(0); }
+ static int denorm_min() throw()
+ { return static_cast<int>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned int> specialization.
+ template<>
+ struct numeric_limits<unsigned int>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned int min() throw()
+ { return 0; }
+ static unsigned int max() throw()
+ { return __INT_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned int);
+ static const int digits10 = __glibcxx_digits10 (unsigned int);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned int epsilon() throw()
+ { return 0; }
+ static unsigned int round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned int infinity() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int quiet_NaN() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int signaling_NaN() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int denorm_min() throw()
+ { return static_cast<unsigned int>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<long> specialization.
+ template<>
+ struct numeric_limits<long>
+ {
+ static const bool is_specialized = true;
+
+ static long min() throw()
+ { return -__LONG_MAX__ - 1; }
+ static long max() throw()
+ { return __LONG_MAX__; }
+
+ static const int digits = __glibcxx_digits (long);
+ static const int digits10 = __glibcxx_digits10 (long);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static long epsilon() throw()
+ { return 0; }
+ static long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static long infinity() throw()
+ { return static_cast<long>(0); }
+ static long quiet_NaN() throw()
+ { return static_cast<long>(0); }
+ static long signaling_NaN() throw()
+ { return static_cast<long>(0); }
+ static long denorm_min() throw()
+ { return static_cast<long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned long> specialization.
+ template<>
+ struct numeric_limits<unsigned long>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned long min() throw()
+ { return 0; }
+ static unsigned long max() throw()
+ { return __LONG_MAX__ * 2UL + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned long);
+ static const int digits10 = __glibcxx_digits10 (unsigned long);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned long epsilon() throw()
+ { return 0; }
+ static unsigned long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned long infinity() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long quiet_NaN() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long signaling_NaN() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long denorm_min() throw()
+ { return static_cast<unsigned long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<long long> specialization.
+ template<>
+ struct numeric_limits<long long>
+ {
+ static const bool is_specialized = true;
+
+ static long long min() throw()
+ { return -__LONG_LONG_MAX__ - 1; }
+ static long long max() throw()
+ { return __LONG_LONG_MAX__; }
+
+ static const int digits = __glibcxx_digits (long long);
+ static const int digits10 = __glibcxx_digits10 (long long);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static long long epsilon() throw()
+ { return 0; }
+ static long long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static long long infinity() throw()
+ { return static_cast<long long>(0); }
+ static long long quiet_NaN() throw()
+ { return static_cast<long long>(0); }
+ static long long signaling_NaN() throw()
+ { return static_cast<long long>(0); }
+ static long long denorm_min() throw()
+ { return static_cast<long long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned long long> specialization.
+ template<>
+ struct numeric_limits<unsigned long long>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned long long min() throw()
+ { return 0; }
+ static unsigned long long max() throw()
+ { return __LONG_LONG_MAX__ * 2ULL + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned long long);
+ static const int digits10 = __glibcxx_digits10 (unsigned long long);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned long long epsilon() throw()
+ { return 0; }
+ static unsigned long long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned long long infinity() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long quiet_NaN() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long signaling_NaN() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long denorm_min() throw()
+ { return static_cast<unsigned long long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<float> specialization.
+ template<>
+ struct numeric_limits<float>
+ {
+ static const bool is_specialized = true;
+
+ static float min() throw()
+ { return __FLT_MIN__; }
+ static float max() throw()
+ { return __FLT_MAX__; }
+
+ static const int digits = __FLT_MANT_DIG__;
+ static const int digits10 = __FLT_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static float epsilon() throw()
+ { return __FLT_EPSILON__; }
+ static float round_error() throw()
+ { return 0.5F; }
+
+ static const int min_exponent = __FLT_MIN_EXP__;
+ static const int min_exponent10 = __FLT_MIN_10_EXP__;
+ static const int max_exponent = __FLT_MAX_EXP__;
+ static const int max_exponent10 = __FLT_MAX_10_EXP__;
+
+ static const bool has_infinity = __FLT_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __FLT_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__FLT_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss = __glibcxx_float_has_denorm_loss;
+
+ static float infinity() throw()
+ { return __builtin_huge_valf (); }
+ static float quiet_NaN() throw()
+ { return __builtin_nanf (""); }
+ static float signaling_NaN() throw()
+ { return __builtin_nansf (""); }
+ static float denorm_min() throw()
+ { return __FLT_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_float_traps;
+ static const bool tinyness_before = __glibcxx_float_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_float_has_denorm_loss
+#undef __glibcxx_float_traps
+#undef __glibcxx_float_tinyness_before
+
+ /// numeric_limits<double> specialization.
+ template<>
+ struct numeric_limits<double>
+ {
+ static const bool is_specialized = true;
+
+ static double min() throw()
+ { return __DBL_MIN__; }
+ static double max() throw()
+ { return __DBL_MAX__; }
+
+ static const int digits = __DBL_MANT_DIG__;
+ static const int digits10 = __DBL_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static double epsilon() throw()
+ { return __DBL_EPSILON__; }
+ static double round_error() throw()
+ { return 0.5; }
+
+ static const int min_exponent = __DBL_MIN_EXP__;
+ static const int min_exponent10 = __DBL_MIN_10_EXP__;
+ static const int max_exponent = __DBL_MAX_EXP__;
+ static const int max_exponent10 = __DBL_MAX_10_EXP__;
+
+ static const bool has_infinity = __DBL_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __DBL_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__DBL_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss = __glibcxx_double_has_denorm_loss;
+
+ static double infinity() throw()
+ { return __builtin_huge_val(); }
+ static double quiet_NaN() throw()
+ { return __builtin_nan (""); }
+ static double signaling_NaN() throw()
+ { return __builtin_nans (""); }
+ static double denorm_min() throw()
+ { return __DBL_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_double_traps;
+ static const bool tinyness_before = __glibcxx_double_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_double_has_denorm_loss
+#undef __glibcxx_double_traps
+#undef __glibcxx_double_tinyness_before
+
+ /// numeric_limits<long double> specialization.
+ template<>
+ struct numeric_limits<long double>
+ {
+ static const bool is_specialized = true;
+
+ static long double min() throw()
+ { return __LDBL_MIN__; }
+ static long double max() throw()
+ { return __LDBL_MAX__; }
+
+ static const int digits = __LDBL_MANT_DIG__;
+ static const int digits10 = __LDBL_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static long double epsilon() throw()
+ { return __LDBL_EPSILON__; }
+ static long double round_error() throw()
+ { return 0.5L; }
+
+ static const int min_exponent = __LDBL_MIN_EXP__;
+ static const int min_exponent10 = __LDBL_MIN_10_EXP__;
+ static const int max_exponent = __LDBL_MAX_EXP__;
+ static const int max_exponent10 = __LDBL_MAX_10_EXP__;
+
+ static const bool has_infinity = __LDBL_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __LDBL_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__LDBL_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss
+ = __glibcxx_long_double_has_denorm_loss;
+
+ static long double infinity() throw()
+ { return __builtin_huge_vall (); }
+ static long double quiet_NaN() throw()
+ { return __builtin_nanl (""); }
+ static long double signaling_NaN() throw()
+ { return __builtin_nansl (""); }
+ static long double denorm_min() throw()
+ { return __LDBL_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_long_double_traps;
+ static const bool tinyness_before = __glibcxx_long_double_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_long_double_has_denorm_loss
+#undef __glibcxx_long_double_traps
+#undef __glibcxx_long_double_tinyness_before
+
+_GLIBCXX_END_NAMESPACE
+
+#undef __glibcxx_signed
+#undef __glibcxx_min
+#undef __glibcxx_max
+#undef __glibcxx_digits
+#undef __glibcxx_digits10
+
+#endif // _GLIBCXX_NUMERIC_LIMITS
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new
new file mode 100644
index 0000000..d411502
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new
@@ -0,0 +1,112 @@
+// The -*- C++ -*- dynamic memory management header.
+
+// Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+// 2003, 2004, 2005, 2006, 2007, 2009
+// Free Software Foundation
+
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file new
+ * This is a Standard C++ Library header.
+ *
+ * The header @c new defines several functions to manage dynamic memory and
+ * handling memory allocation errors; see
+ * http://gcc.gnu.org/onlinedocs/libstdc++/18_support/howto.html#4 for more.
+ */
+
+#ifndef _NEW
+#define _NEW
+
+#include <cstddef>
+#include <exception>
+
+#pragma GCC visibility push(default)
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @brief Exception possibly thrown by @c new.
+ * @ingroup exceptions
+ *
+ * @c bad_alloc (or classes derived from it) is used to report allocation
+ * errors from the throwing forms of @c new. */
+ class bad_alloc : public exception
+ {
+ public:
+ bad_alloc() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_alloc() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ struct nothrow_t { };
+
+ extern const nothrow_t nothrow;
+
+ /** If you write your own error handler to be called by @c new, it must
+ * be of this type. */
+ typedef void (*new_handler)();
+
+ /// Takes a replacement handler as the argument, returns the
+ /// previous handler.
+ new_handler set_new_handler(new_handler) throw();
+} // namespace std
+
+//@{
+/** These are replaceable signatures:
+ * - normal single new and delete (no arguments, throw @c bad_alloc on error)
+ * - normal array new and delete (same)
+ * - @c nothrow single new and delete (take a @c nothrow argument, return
+ * @c NULL on error)
+ * - @c nothrow array new and delete (same)
+ *
+ * Placement new and delete signatures (take a memory address argument,
+ * does nothing) may not be replaced by a user's program.
+*/
+void* operator new(std::size_t) throw (std::bad_alloc);
+void* operator new[](std::size_t) throw (std::bad_alloc);
+void operator delete(void*) throw();
+void operator delete[](void*) throw();
+void* operator new(std::size_t, const std::nothrow_t&) throw();
+void* operator new[](std::size_t, const std::nothrow_t&) throw();
+void operator delete(void*, const std::nothrow_t&) throw();
+void operator delete[](void*, const std::nothrow_t&) throw();
+
+// Default placement versions of operator new.
+inline void* operator new(std::size_t, void* __p) throw() { return __p; }
+inline void* operator new[](std::size_t, void* __p) throw() { return __p; }
+
+// Default placement versions of operator delete.
+inline void operator delete (void*, void*) throw() { }
+inline void operator delete[](void*, void*) throw() { }
+//@}
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo
new file mode 100644
index 0000000..eea38e7
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo
@@ -0,0 +1,196 @@
+// RTTI support for -*- C++ -*-
+// Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+// 2003, 2004, 2005, 2006, 2007, 2009
+// Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file typeinfo
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef _TYPEINFO
+#define _TYPEINFO
+
+#include <exception>
+
+#pragma GCC visibility push(default)
+
+extern "C++" {
+
+namespace __cxxabiv1
+{
+ class __class_type_info;
+} // namespace __cxxabiv1
+
+// Determine whether typeinfo names for the same type are merged (in which
+// case comparison can just compare pointers) or not (in which case
+// strings must be compared and g++.dg/abi/local1.C will fail), and
+// whether comparison is to be implemented inline or not. By default we
+// use inline pointer comparison if weak symbols are available, and
+// out-of-line strcmp if not. Out-of-line pointer comparison is used
+// where the object files are to be portable to multiple systems, some of
+// which may not be able to use pointer comparison, but the particular
+// system for which libstdc++ is being built can use pointer comparison;
+// in particular for most ARM EABI systems, where the ABI specifies
+// out-of-line comparison. Inline strcmp is not currently supported. The
+// compiler's target configuration can override the defaults by defining
+// __GXX_TYPEINFO_EQUALITY_INLINE to 1 or 0 to indicate whether or not
+// comparison is inline, and __GXX_MERGED_TYPEINFO_NAMES to 1 or 0 to
+// indicate whether or not pointer comparison can be used.
+
+#ifndef __GXX_MERGED_TYPEINFO_NAMES
+ #if !__GXX_WEAK__
+ // If weak symbols are not supported, typeinfo names are not merged.
+ #define __GXX_MERGED_TYPEINFO_NAMES 0
+ #else
+ // On platforms that support weak symbols, typeinfo names are merged.
+ #define __GXX_MERGED_TYPEINFO_NAMES 1
+ #endif
+#endif
+
+// By default follow the same rules as for __GXX_MERGED_TYPEINFO_NAMES.
+#ifndef __GXX_TYPEINFO_EQUALITY_INLINE
+ #if !__GXX_WEAK__
+ #define __GXX_TYPEINFO_EQUALITY_INLINE 0
+ #else
+ #define __GXX_TYPEINFO_EQUALITY_INLINE 1
+ #endif
+#endif
+
+namespace std
+{
+ /**
+ * @brief Part of RTTI.
+ *
+ * The @c type_info class describes type information generated by
+ * an implementation.
+ */
+ class type_info
+ {
+ public:
+ /** Destructor first. Being the first non-inline virtual function, this
+ * controls in which translation unit the vtable is emitted. The
+ * compiler makes use of that information to know where to emit
+ * the runtime-mandated type_info structures in the new-abi. */
+ virtual ~type_info();
+
+ /** Returns an @e implementation-defined byte string; this is not
+ * portable between compilers! */
+ const char* name() const
+ { return __name; }
+
+#if !__GXX_TYPEINFO_EQUALITY_INLINE
+ bool before(const type_info& __arg) const;
+
+ // In old abi, or when weak symbols are not supported, there can
+ // be multiple instances of a type_info object for one
+ // type. Uniqueness must use the _name value, not object address.
+ bool operator==(const type_info& __arg) const;
+#else
+ #if !__GXX_MERGED_TYPEINFO_NAMES
+ #error "Inline implementation of type_info comparision requires merging of type_info objects"
+ #endif
+ /** Returns true if @c *this precedes @c __arg in the implementation's
+ * collation order. */
+ // In new abi we can rely on type_info's NTBS being unique,
+ // and therefore address comparisons are sufficient.
+ bool before(const type_info& __arg) const
+ { return __name < __arg.__name; }
+
+ bool operator==(const type_info& __arg) const
+ { return __name == __arg.__name; }
+#endif
+ bool operator!=(const type_info& __arg) const
+ { return !operator==(__arg); }
+
+ // Return true if this is a pointer type of some kind
+ virtual bool __is_pointer_p() const;
+
+ // Return true if this is a function type
+ virtual bool __is_function_p() const;
+
+ // Try and catch a thrown type. Store an adjusted pointer to the
+ // caught type in THR_OBJ. If THR_TYPE is not a pointer type, then
+ // THR_OBJ points to the thrown object. If THR_TYPE is a pointer
+ // type, then THR_OBJ is the pointer itself. OUTER indicates the
+ // number of outer pointers, and whether they were const
+ // qualified.
+ virtual bool __do_catch(const type_info *__thr_type, void **__thr_obj,
+ unsigned __outer) const;
+
+ // Internally used during catch matching
+ virtual bool __do_upcast(const __cxxabiv1::__class_type_info *__target,
+ void **__obj_ptr) const;
+
+ protected:
+ const char *__name;
+
+ explicit type_info(const char *__n): __name(__n) { }
+
+ private:
+ /// Assigning type_info is not supported.
+ type_info& operator=(const type_info&);
+ type_info(const type_info&);
+ };
+
+ /**
+ * @brief Thrown during incorrect typecasting.
+ * @ingroup exceptions
+ *
+ * If you attempt an invalid @c dynamic_cast expression, an instance of
+ * this class (or something derived from this class) is thrown. */
+ class bad_cast : public exception
+ {
+ public:
+ bad_cast() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_cast() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ /**
+ * @brief Thrown when a NULL pointer in a @c typeid expression is used.
+ * @ingroup exceptions
+ */
+ class bad_typeid : public exception
+ {
+ public:
+ bad_typeid () throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_typeid() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+} // namespace std
+
+#pragma GCC visibility pop
+
+} // extern "C++"
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a
new file mode 100644
index 0000000..2d23df5
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a
new file mode 100644
index 0000000..c2b06b4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la
new file mode 100755
index 0000000..65eb6e4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la
@@ -0,0 +1,41 @@
+# libsupc++.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libsupc++.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib/armv7-a'
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a
new file mode 100644
index 0000000..4d991b8
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a
new file mode 100644
index 0000000..a8b2aa2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la
new file mode 100755
index 0000000..f13425c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la
@@ -0,0 +1,41 @@
+# libsupc++.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libsupc++.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib/armv7-a/thumb'
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x
new file mode 100644
index 0000000..94285a1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x
@@ -0,0 +1,224 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
+ "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SEARCH_DIR("=/usr/local/lib"); SEARCH_DIR("=/lib"); SEARCH_DIR("=/usr/lib");
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x00008000)); . = SEGMENT_START("text-segment", 0x00008000) + SIZEOF_HEADERS;
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+ .note.gnu.build-id : { *(.note.gnu.build-id) }
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+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) }
+ .rel.iplt :
+ {
+ PROVIDE_HIDDEN (__rel_iplt_start = .);
+ *(.rel.iplt)
+ PROVIDE_HIDDEN (__rel_iplt_end = .);
+ }
+ .rela.iplt :
+ {
+ PROVIDE_HIDDEN (__rela_iplt_start = .);
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+ }
+ .init :
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+ KEEP (*(.init))
+ } =0
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+ /* .gnu.warning sections are handled specially by elf32.em. */
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+ } =0
+ .fini :
+ {
+ KEEP (*(.fini))
+ } =0
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
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+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
+ __exidx_start = .;
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+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. */
+ . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
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+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+ .preinit_array :
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+ PROVIDE_HIDDEN (__preinit_array_start = .);
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+ }
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*crtbegin?.o(.ctors))
+ /* We don't want to include the .ctor section from
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn
new file mode 100644
index 0000000..c50badd
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn
@@ -0,0 +1,222 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc
new file mode 100644
index 0000000..5ea66eb
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd
new file mode 100644
index 0000000..c13ea94
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd
@@ -0,0 +1,224 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc
new file mode 100644
index 0000000..5c4f46e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc
@@ -0,0 +1,227 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw
new file mode 100644
index 0000000..29e0f7f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw
@@ -0,0 +1,227 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn
new file mode 100644
index 0000000..a4a26f0
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn
@@ -0,0 +1,224 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xr b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xr
new file mode 100644
index 0000000..3ff3f1e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xr
@@ -0,0 +1,163 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs
new file mode 100644
index 0000000..53685f8
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs
@@ -0,0 +1,213 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc
new file mode 100644
index 0000000..bb54aa4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc
@@ -0,0 +1,212 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw
new file mode 100644
index 0000000..7cdf2d1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw
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new file mode 100644
index 0000000..40a23ed
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xu
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw
new file mode 100644
index 0000000..28cb887
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw
@@ -0,0 +1,227 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x
new file mode 100644
index 0000000..9ff8ca9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x
@@ -0,0 +1,224 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn
new file mode 100644
index 0000000..58dd71f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn
@@ -0,0 +1,222 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc
new file mode 100644
index 0000000..8b43c0c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc
@@ -0,0 +1,227 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd
new file mode 100644
index 0000000..4b9b5f7
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd
@@ -0,0 +1,224 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdc
new file mode 100644
index 0000000..6adcf2f
--- /dev/null
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw
new file mode 100644
index 0000000..0c3c7e9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw
@@ -0,0 +1,227 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn
new file mode 100644
index 0000000..3d38294
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn
@@ -0,0 +1,224 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr
new file mode 100644
index 0000000..ee19e6e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr
@@ -0,0 +1,163 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs
new file mode 100644
index 0000000..edf8b6a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs
@@ -0,0 +1,213 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc
new file mode 100644
index 0000000..8a19f57
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc
@@ -0,0 +1,212 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsw
new file mode 100644
index 0000000..63926e6
--- /dev/null
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@@ -0,0 +1,212 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu
new file mode 100644
index 0000000..cf0815b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu
@@ -0,0 +1,164 @@
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw
new file mode 100644
index 0000000..9fc8ff4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libiberty.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libiberty.a
new file mode 100644
index 0000000..8900230
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Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.a
new file mode 100644
index 0000000..84bdedb
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Binary files differ
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new file mode 100755
index 0000000..4d9bfc1
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new file mode 100755
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-addr2line b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-addr2line
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Binary files differ
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Binary files differ
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Binary files differ
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Binary files differ
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Binary files differ
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+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3
new file mode 100755
index 0000000..5b109a9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug
new file mode 100755
index 0000000..93f7bc2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug
@@ -0,0 +1,558 @@
+#!/bin/sh
+# Submit a problem report to a GNATS site.
+# Copyright (C) 1993, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
+# Contributed by Brendan Kehoe (brendan@cygnus.com), based on a
+# version written by Heinz G. Seidl (hgs@cygnus.com).
+#
+# This file is part of GNU GNATS.
+#
+# GNU GNATS is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU GNATS is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU GNATS; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# The version of this send-pr.
+VERSION=3.113
+
+# The submitter-id for your site.
+SUBMITTER=net
+
+# The default mail address for PR submissions.
+GNATS_ADDR=gcc-gnats@gcc.gnu.org
+
+# The default release for this host.
+# We have to guess at what program_transform_name might have done.
+# "sed 1q" because neither "head -1" nor "head -n 1" is universal, argh.
+
+DEFAULT_GCC="`echo $0 | sed -e 's/bug//'`"
+DEFAULT_RELEASE="`$DEFAULT_GCC --version | sed 1q`"
+
+# The default organization.
+DEFAULT_ORGANIZATION=
+
+# What mailer to use. This must come after the config file, since it is
+# host-dependent.
+# Copied from cvsbug
+if [ -f /usr/sbin/sendmail ]; then
+ MAIL_AGENT="/usr/sbin/sendmail -oi -t"
+else
+ MAIL_AGENT="/usr/lib/sendmail -oi -t"
+fi
+MAILER=`echo $MAIL_AGENT | sed -e 's, .*,,'`
+if [ ! -f "$MAILER" ] ; then
+ echo "$COMMAND: Cannot file mail program \"$MAILER\"."
+ echo "$COMMAND: Please fix the MAIL_AGENT entry in the $COMMAND file."
+ exit 1
+fi
+
+
+# How to read the passwd database.
+PASSWD="cat /etc/passwd"
+
+ECHON=bsd
+
+if [ $ECHON = bsd ] ; then
+ ECHON1="echo -n"
+ ECHON2=
+elif [ $ECHON = sysv ] ; then
+ ECHON1=echo
+ ECHON2='\c'
+else
+ ECHON1=echo
+ ECHON2=
+fi
+
+#
+
+if [ -z "$TMPDIR" ]; then
+ TMPDIR=/tmp
+else
+ if [ "`echo $TMPDIR | grep '/$'`" != "" ]; then
+ TMPDIR="`echo $TMPDIR | sed -e 's,/$,,'`"
+ fi
+fi
+
+if [ yes = yes ]; then
+ TEMP0=`mktemp $TMPDIR/poXXXXXX` || exit 1
+ TEMP=`mktemp $TMPDIR/pXXXXXX` || exit 1
+ BAD=`mktemp $TMPDIR/pbadXXXXXX` || exit 1
+ REF=`mktemp $TMPDIR/pfXXXXXX` || exit 1
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $BAD $REF"
+else
+ TEMPD=$TMPDIR/pd$$
+ TEMP0=$TEMPD/po$$
+ TEMP=$TEMPD/p$$
+ BAD=$TEMPD/pbad$$
+ REF=$TEMPD/pf$$
+ mkdir $TEMPD || exit 1
+ REMOVE_TEMP="rm -rf $TEMPD"
+fi
+
+# find a user name
+if [ "$LOGNAME" = "" ]; then
+ if [ "$USER" != "" ]; then
+ LOGNAME="$USER"
+ else
+ LOGNAME="UNKNOWN"
+ fi
+fi
+
+FROM="$LOGNAME"
+REPLY_TO="${REPLY_TO:-${REPLYTO:-$LOGNAME}}"
+
+# Find out the name of the originator of this PR.
+if [ -n "$NAME" ]; then
+ ORIGINATOR="$NAME"
+elif [ -f $HOME/.fullname ]; then
+ ORIGINATOR="`sed -e '1q' $HOME/.fullname`"
+else
+ # Must use temp file due to incompatibilities in quoting behavior
+ # and to protect shell metacharacters in the expansion of $LOGNAME
+ $PASSWD | grep "^$LOGNAME:" | awk -F: '{print $5}' | sed -e 's/,.*//' > $TEMP0
+ ORIGINATOR="`cat $TEMP0`"
+ rm -f $TEMP0
+fi
+
+if [ -n "$ORGANIZATION" ]; then
+ if [ -f "$ORGANIZATION" ]; then
+ ORGANIZATION="`cat $ORGANIZATION`"
+ fi
+else
+ if [ -n "$DEFAULT_ORGANIZATION" ]; then
+ ORGANIZATION="$DEFAULT_ORGANIZATION"
+ elif [ -f $HOME/.organization ]; then
+ ORGANIZATION="`cat $HOME/.organization`"
+ fi
+fi
+
+# If they don't have a preferred editor set, then use
+if [ -z "$VISUAL" ]; then
+ if [ -z "$EDITOR" ]; then
+ EDIT=vi
+ else
+ EDIT="$EDITOR"
+ fi
+else
+ EDIT="$VISUAL"
+fi
+
+# Find out some information.
+SYSTEM=`( [ -f /bin/uname ] && /bin/uname -a ) || \
+ ( [ -f /usr/bin/uname ] && /usr/bin/uname -a ) || echo ""`
+ARCH=`[ -f /bin/arch ] && /bin/arch`
+MACHINE=`[ -f /bin/machine ] && /bin/machine`
+
+COMMAND=`echo $0 | sed -e 's,.*/,,'`
+USAGE="Usage: $COMMAND [-PVL] [-t address] [-f filename] [-s severity]
+ [-c address] [--request-id] [--version]"
+REMOVE=
+BATCH=
+CC=
+SEVERITY_C=
+
+while [ $# -gt 0 ]; do
+ case "$1" in
+ -r) ;; # Ignore for backward compat.
+ -t | --to) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; GNATS_ADDR="$1"
+ EXPLICIT_GNATS_ADDR=true
+ ;;
+ -f | --file) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; IN_FILE="$1"
+ if [ "$IN_FILE" != "-" -a ! -r "$IN_FILE" ]; then
+ echo "$COMMAND: cannot read $IN_FILE"
+ $REMOVE_TEMP
+ exit 1
+ fi
+ ;;
+ -b | --batch) BATCH=true ;;
+ -c | --cc) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; CC="$1"
+ ;;
+ -s | --severity) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; SEVERITY_C="$1"
+ ;;
+ -p | -P | --print) PRINT=true ;;
+ -L | --list) FORMAT=norm ;;
+ -l | -CL | --lisp) FORMAT=lisp ;;
+ --request-id) REQUEST_ID=true ;;
+ -h | --help) echo "$USAGE"; $REMOVE_TEMP; exit 0 ;;
+ -V | --version) cat <<EOF
+gccbug (GCC) $DEFAULT_RELEASE
+Copyright (C) 2002 Free Software Foundation, Inc.
+This is free software; see the source for copying conditions. There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+EOF
+ $REMOVE_TEMP; exit 0 ;;
+ -*) echo "$USAGE" ; $REMOVE_TEMP; exit 1 ;;
+ *) echo "$USAGE" ; $REMOVE_TEMP; exit 1
+ esac
+ shift
+done
+
+# spam does not need to be listed here
+CATEGORIES="ada bootstrap c++ c debug driver fortran inline-asm java libgcj libobjc libstdc++ middle-end objc other pch preprocessor rtl-optimization target tree-optimization web"
+
+case "$FORMAT" in
+ lisp) echo "$CATEGORIES" | \
+ awk 'BEGIN {printf "( "} {printf "(\"%s\") ",$0} END {printf ")\n"}'
+ $REMOVE_TEMP
+ exit 0
+ ;;
+ norm) l=`echo "$CATEGORIES" | \
+ awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+ END {print max + 1;}'`
+ c=`expr 70 / $l`
+ if [ $c -eq 0 ]; then c=1; fi
+ echo "$CATEGORIES" | \
+ awk 'BEGIN {print "Known categories:"; i = 0 }
+ { printf ("%-'$l'.'$l's", $0); if ((++i % '$c') == 0) { print "" } }
+ END { print ""; }'
+ $REMOVE_TEMP
+ exit 0
+ ;;
+esac
+
+ORIGINATOR_C='<name of the PR author (one line)>'
+ORGANIZATION_C='<organization of PR author (multiple lines)>'
+SYNOPSIS_C='<synopsis of the problem (one line)>'
+if [ -z "$SEVERITY_C" ]; then
+ SEVERITY_C='<[ non-critical | serious | critical ] (one line)>'
+fi
+PRIORITY_C='<[ low | medium ] (one line)>'
+CATEGORY_C='<choose from the top of this file (one line)>'
+RELEASE_C='<release number or tag (one line)>'
+ENVIRONMENT_C='<machine, os, target, libraries (multiple lines)>'
+DESCRIPTION_C='<precise description of the problem (multiple lines)>'
+HOW_TO_REPEAT_C='<When reporting a compiler error, preprocessor output must be included>'
+FIX_C='<how to correct or work around the problem, if known (multiple lines)>'
+
+# Catch some signals. ($xs kludge needed by Sun /bin/sh)
+xs=0
+trap '$REMOVE_TEMP; exit $xs' 0
+trap 'echo "$COMMAND: Aborting ..."; $REMOVE_TEMP; xs=1; exit' 1 3 13 15
+
+# If they told us to use a specific file, then do so.
+if [ -n "$IN_FILE" ]; then
+ if [ "$IN_FILE" = "-" ]; then
+ # The PR is coming from the standard input.
+ if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+ sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" > $TEMP
+ else
+ cat > $TEMP
+ fi
+ else
+ # Use the file they named.
+ if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+ sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" $IN_FILE > $TEMP
+ else
+ cat $IN_FILE > $TEMP
+ fi
+ fi
+else
+
+ if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+ # If their PR_FORM points to a bogus entry, then bail.
+ if [ ! -f "$PR_FORM" -o ! -r "$PR_FORM" -o ! -s "$PR_FORM" ]; then
+ echo "$COMMAND: can't seem to read your template file (\`$PR_FORM'), ignoring PR_FORM"
+ sleep 1
+ PRINT_INTERN=bad_prform
+ fi
+ fi
+
+ if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+ cp $PR_FORM $TEMP ||
+ ( echo "$COMMAND: could not copy $PR_FORM" ; xs=1; exit )
+ else
+ for file in $TEMP $REF ; do
+ cat > $file << '__EOF__'
+SEND-PR: -*- send-pr -*-
+SEND-PR: Lines starting with `SEND-PR' will be removed automatically, as
+SEND-PR: will all comments (text enclosed in `<' and `>').
+SEND-PR:
+SEND-PR: Please consult the GCC manual if you are not sure how to
+SEND-PR: fill out a problem report.
+SEND-PR: Note that the Synopsis field is mandatory. The Subject (for
+SEND-PR: the mail) will be made the same as Synopsis unless explicitly
+SEND-PR: changed.
+SEND-PR:
+SEND-PR: Choose from the following categories:
+SEND-PR:
+__EOF__
+
+ # Format the categories so they fit onto lines.
+ l=`echo "$CATEGORIES" | \
+ awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+ END {print max + 1;}'`
+ c=`expr 61 / $l`
+ if [ $c -eq 0 ]; then c=1; fi
+ echo "$CATEGORIES" | \
+ awk 'BEGIN {printf "SEND-PR: "; i = 0 }
+ { printf ("%-'$l'.'$l's", $0);
+ if ((++i % '$c') == 0) { printf "\nSEND-PR: " } }
+ END { printf "\nSEND-PR:\n"; }' >> $file
+
+ cat >> $file << __EOF__
+To: $GNATS_ADDR
+Subject:
+From: $FROM
+Reply-To: $REPLYTO
+Cc: $CC
+X-send-pr-version: $VERSION
+X-GNATS-Notify:
+
+
+>Submitter-Id: $SUBMITTER
+>Originator: $ORIGINATOR
+>Organization: ${ORGANIZATION-$ORGANIZATION_C}
+>Confidential: no
+SEND-PR: Leave "Confidential" as "no"; all GCC PRs are public.
+>Synopsis: $SYNOPSIS_C
+>Severity: $SEVERITY_C
+SEND-PR: critical GCC is completely not operational; no work-around known.
+SEND-PR: serious GCC is not working properly; a work-around is possible.
+SEND-PR: non-critical Report indicates minor problem.
+>Priority: $PRIORITY_C
+SEND-PR: medium The problem should be solved in the next release.
+SEND-PR: low The problem should be solve in a future release.
+>Category: $CATEGORY_C
+>Class: <[ doc-bug | accepts-illegal | rejects-legal | wrong-code | ice-on-legal-code| ice-on-illegal-code | pessimizes-code | sw-bug | change-request | support ] (one line)>
+SEND-PR: doc-bug The documentation is incorrect.
+SEND-PR: accepts-illegal GCC fails to reject erroneous code.
+SEND-PR: rejects-legal GCC gives an error message for correct code.
+SEND-PR: wrong-code The machine code generated by gcc is incorrect.
+SEND-PR: ice-on-legal-code GCC gives an Internal Compiler Error (ICE)
+SEND-PR: for correct code
+SEND-PR: ice-on-illegal-code GCC gives an ICE instead of reporting an error
+SEND-PR: pessimizes-code GCC misses an important optimization opportunity
+SEND-PR: sw-bug Software bug of some other class than above
+SEND-PR: change-request A feature in GCC is missing.
+SEND-PR: support I need help with gcc.
+>Release: ${DEFAULT_RELEASE-$RELEASE_C}
+>Environment:
+`[ -n "$SYSTEM" ] && echo System: $SYSTEM`
+`[ -n "$ARCH" ] && echo Architecture: $ARCH`
+`[ -n "$MACHINE" ] && echo Machine: $MACHINE`
+ $ENVIRONMENT_C
+host: i686-apple-darwin
+build: i686-apple-darwin
+target: arm-unknown-linux-androideabi
+__EOF__
+ cat >> $file << \__EOF__
+configured with: /tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/src/build/../gcc/gcc-4.4.3/configure --prefix=/usr/local --target=arm-linux-androideabi --host=i686-apple-darwin --build=i686-apple-darwin --with-gnu-as --with-gnu-ld --enable-languages=c,c++ --with-gmp=/tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/build/temp-install --with-mpfr=/tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/build/temp-install --disable-libssp --enable-threads --disable-nls --disable-libmudflap --disable-libgomp --disable-sjlj-exceptions --disable-shared --disable-tls --with-float=soft --with-fpu=vfp --with-arch=armv5te --enable-target-optspace --disable-hosted-libstdcxx --enable-cxx-flags='-fexceptions -frtti' --with-gcc-version=4.4.3 --with-binutils-version=2.20.1 --with-gmp-version=4.2.4 --with-mpfr-version=2.4.1 --with-gdb-version=7.1.x --with-arch=armv5te --with-sysroot=/tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/arm-linux-androideabi-4.4.x/sysroot --with-gold-version=20100303 --enable-gold=both/gold --program-transform-name='s,^,arm-linux-androideabi-,'
+__EOF__
+ cat >> $file << __EOF__
+>Description:
+ $DESCRIPTION_C
+>How-To-Repeat:
+ $HOW_TO_REPEAT_C
+>Fix:
+ $FIX_C
+__EOF__
+ done
+ fi
+
+ if [ "$PRINT" = true -o "$PRINT_INTERN" = true ]; then
+ cat $TEMP
+ xs=0; exit
+ fi
+
+ chmod u+w $TEMP
+ if [ -z "$REQUEST_ID" ]; then
+ eval $EDIT $TEMP
+ else
+ ed -s $TEMP << '__EOF__'
+/^Subject/s/^Subject:.*/Subject: request for a customer id/
+/^>Category/s/^>Category:.*/>Category: send-pr/
+w
+q
+__EOF__
+ fi
+
+ if cmp -s $REF $TEMP ; then
+ echo "$COMMAND: problem report not filled out, therefore not sent"
+ xs=1; exit
+ fi
+fi
+
+#
+# Check the enumeration fields
+
+# This is a "sed-subroutine" with one keyword parameter
+# (with workaround for Sun sed bug)
+#
+SED_CMD='
+/$PATTERN/{
+s|||
+s|<.*>||
+s|^[ ]*||
+s|[ ]*$||
+p
+q
+}'
+
+
+while [ -z "$REQUEST_ID" ]; do
+ CNT=0
+
+ # 1) Confidential
+ #
+ PATTERN=">Confidential:"
+ CONFIDENTIAL=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$CONFIDENTIAL" in
+ no) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$CONFIDENTIAL' is not a valid value for \`Confidential'." ;;
+ esac
+ #
+ # 2) Severity
+ #
+ PATTERN=">Severity:"
+ SEVERITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$SEVERITY" in
+ ""|non-critical|serious|critical) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$SEVERITY' is not a valid value for \`Severity'."
+ esac
+ #
+ # 3) Priority
+ #
+ PATTERN=">Priority:"
+ PRIORITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$PRIORITY" in
+ ""|low|medium) CNT=`expr $CNT + 1` ;;
+ high) echo "$COMMAND: \`Priority: high' is reserved for GCC maintainers." ;;
+ *) echo "$COMMAND: \`$PRIORITY' is not a valid value for \`Priority'."
+ esac
+ #
+ # 4) Category
+ #
+ PATTERN=">Category:"
+ CATEGORY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ FOUND=
+ for C in $CATEGORIES
+ do
+ if [ "$C" = "$CATEGORY" ]; then FOUND=true ; break ; fi
+ done
+ if [ -n "$FOUND" ]; then
+ CNT=`expr $CNT + 1`
+ else
+ if [ -z "$CATEGORY" ]; then
+ echo "$COMMAND: you must include a Category: field in your report."
+ else
+ echo "$COMMAND: \`$CATEGORY' is not a known category."
+ fi
+ fi
+ #
+ # 5) Class
+ #
+ PATTERN=">Class:"
+ CLASS=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$CLASS" in
+ ""|doc-bug|accepts-illegal|rejects-legal|wrong-code|ice-on-legal-code|ice-on-illegal-code|pessimizes-code|sw-bug|change-request|support) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$CLASS' is not a valid value for \`Class'."
+ esac
+ #
+ # 6) Check that synopsis is not empty
+ #
+ if grep "^>Synopsis:[ ]*${SYNOPSIS_C}\$" $TEMP > /dev/null
+ then
+ echo "$COMMAND: Synopsis must not be empty."
+ else
+ CNT=`expr $CNT + 1`
+ fi
+
+ [ $CNT -lt 6 -a -z "$BATCH" ] &&
+ echo "Errors were found with the problem report."
+
+ while true; do
+ if [ -z "$BATCH" ]; then
+ $ECHON1 "a)bort, e)dit or s)end? $ECHON2"
+ read input
+ else
+ if [ $CNT -eq 6 ]; then
+ input=s
+ else
+ input=a
+ fi
+ fi
+ case "$input" in
+ a*)
+ if [ -z "$BATCH" ]; then
+ echo "$COMMAND: the problem report remains in $BAD and is not sent."
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+ mv $TEMP $BAD
+ else
+ echo "$COMMAND: the problem report is not sent."
+ fi
+ xs=1; exit
+ ;;
+ e*)
+ eval $EDIT $TEMP
+ continue 2
+ ;;
+ s*)
+ break 2
+ ;;
+ esac
+ done
+done
+
+#
+# Make sure the mail has got a Subject. If not, use the same as
+# in Synopsis.
+#
+
+if grep '^Subject:[ ]*$' $TEMP > /dev/null
+then
+ SYNOPSIS=`grep '^>Synopsis:' $TEMP | sed -e 's/^>Synopsis:[ ]*//'`
+ ed -s $TEMP << __EOF__
+/^Subject:/s/:.*\$/: $SYNOPSIS/
+w
+q
+__EOF__
+fi
+
+#
+# Remove comments and send the problem report
+# (we have to use patterns, where the comment contains regex chars)
+#
+# /^>Originator:/s;$ORIGINATOR;;
+sed -e "
+/^SEND-PR:/d
+/^>Organization:/,/^>[A-Za-z-]*:/s;$ORGANIZATION_C;;
+/^>Confidential:/s;<.*>;;
+/^>Synopsis:/s;$SYNOPSIS_C;;
+/^>Severity:/s;<.*>;;
+/^>Priority:/s;<.*>;;
+/^>Category:/s;$CATEGORY_C;;
+/^>Class:/s;<.*>;;
+/^>Release:/,/^>[A-Za-z-]*:/s;$RELEASE_C;;
+/^>Environment:/,/^>[A-Za-z-]*:/s;$ENVIRONMENT_C;;
+/^>Description:/,/^>[A-Za-z-]*:/s;$DESCRIPTION_C;;
+/^>How-To-Repeat:/,/^>[A-Za-z-]*:/s;$HOW_TO_REPEAT_C;;
+/^>Fix:/,/^>[A-Za-z-]*:/s;$FIX_C;;
+" $TEMP > $REF
+
+if $MAIL_AGENT < $REF; then
+ echo "$COMMAND: problem report sent"
+ xs=0; exit
+else
+ echo "$COMMAND: mysterious mail failure."
+ if [ -z "$BATCH" ]; then
+ echo "$COMMAND: the problem report remains in $BAD and is not sent."
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+ mv $REF $BAD
+ else
+ echo "$COMMAND: the problem report is not sent."
+ fi
+ xs=1; exit
+fi
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov
new file mode 100755
index 0000000..247ca23
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb
new file mode 100755
index 0000000..71c4cef
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui
new file mode 100755
index 0000000..fd34242
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gprof b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gprof
new file mode 100755
index 0000000..bbeff87
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld
new file mode 100755
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+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd
new file mode 100755
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--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold
new file mode 100755
index 0000000..a76029b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm
new file mode 100755
index 0000000..472b157
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy
new file mode 100755
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+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump
new file mode 100755
index 0000000..64475f2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib
new file mode 100755
index 0000000..ebb5719
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf
new file mode 100755
index 0000000..ac47106
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+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-run b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-run
new file mode 100755
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-size b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-size
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strings b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strings
new file mode 100755
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--- /dev/null
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strip b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strip
new file mode 100755
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h
new file mode 100644
index 0000000..86b0944
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h
@@ -0,0 +1,423 @@
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
+ 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ ANSI_PROTOTYPES 1 not defined
+ PTR `void *' `char *'
+ PTRCONST `void *const' `char *'
+ LONG_DOUBLE `long double' `double'
+ const not defined `'
+ volatile not defined `'
+ signed not defined `'
+ VA_START(ap, var) va_start(ap, var) va_start(ap)
+
+ Note that it is safe to write "void foo();" indicating a function
+ with no return value, in all K+R compilers we have been able to test.
+
+ For declaring functions with prototypes, we also provide these:
+
+ PARAMS ((prototype))
+ -- for functions which take a fixed number of arguments. Use this
+ when declaring the function. When defining the function, write a
+ K+R style argument list. For example:
+
+ char *strcpy PARAMS ((char *dest, char *source));
+ ...
+ char *
+ strcpy (dest, source)
+ char *dest;
+ char *source;
+ { ... }
+
+
+ VPARAMS ((prototype, ...))
+ -- for functions which take a variable number of arguments. Use
+ PARAMS to declare the function, VPARAMS to define it. For example:
+
+ int printf PARAMS ((const char *format, ...));
+ ...
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ ...
+ }
+
+ For writing functions which take variable numbers of arguments, we
+ also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These
+ hide the differences between K+R <varargs.h> and C89 <stdarg.h> more
+ thoroughly than the simple VA_START() macro mentioned above.
+
+ VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end.
+ Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls
+ corresponding to the list of fixed arguments. Then use va_arg
+ normally to get the variable arguments, or pass your va_list object
+ around. You do not declare the va_list yourself; VA_OPEN does it
+ for you.
+
+ Here is a complete example:
+
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ int result;
+
+ VA_OPEN (ap, format);
+ VA_FIXEDARG (ap, const char *, format);
+
+ result = vfprintf (stdout, format, ap);
+ VA_CLOSE (ap);
+
+ return result;
+ }
+
+
+ You can declare variables either before or after the VA_OPEN,
+ VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning
+ and end of a block. They must appear at the same nesting level,
+ and any variables declared after VA_OPEN go out of scope at
+ VA_CLOSE. Unfortunately, with a K+R compiler, that includes the
+ argument list. You can have multiple instances of VA_OPEN/VA_CLOSE
+ pairs in a single function in case you need to traverse the
+ argument list more than once.
+
+ For ease of writing code which uses GCC extensions but needs to be
+ portable to other compilers, we provide the GCC_VERSION macro that
+ simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various
+ wrappers around __attribute__. Also, __extension__ will be #defined
+ to nothing if it doesn't work. See below.
+
+ This header also defines a lot of obsolete macros:
+ CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID,
+ AND, DOTS, NOARGS. Don't use them. */
+
+#ifndef _ANSIDECL_H
+#define _ANSIDECL_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+/* Using MACRO(x,y) in cpp #if conditionals does not work with some
+ older preprocessors. Thus we can't define something like this:
+
+#define HAVE_GCC_VERSION(MAJOR, MINOR) \
+ (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR)))
+
+and then test "#if HAVE_GCC_VERSION(2,7)".
+
+So instead we use the macro below and test it against specific values. */
+
+/* This macro simplifies testing whether we are using gcc, and if it
+ is of a particular minimum version. (Both major & minor numbers are
+ significant.) This macro will evaluate to 0 if we are not using
+ gcc at all. */
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
+#endif /* GCC_VERSION */
+
+#if defined (__STDC__) || defined(__cplusplus) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32)
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other
+ C++ compilers, does not define __STDC__, though it acts as if this
+ was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */
+
+#define ANSI_PROTOTYPES 1
+#define PTR void *
+#define PTRCONST void *const
+#define LONG_DOUBLE long double
+
+/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in
+ a #ifndef. */
+#ifndef PARAMS
+#define PARAMS(ARGS) ARGS
+#endif
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR)
+
+/* variadic function helper macros */
+/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's
+ use without inhibiting further decls and without declaring an
+ actual variable. */
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, T, N) struct Qdmy
+
+#undef const
+#undef volatile
+#undef signed
+
+/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
+ it too, but it's not in C89. */
+#undef inline
+#if __STDC_VERSION__ > 199901L || defined(__cplusplus)
+/* it's a keyword */
+#else
+# if GCC_VERSION >= 2007
+# define inline __inline__ /* __inline__ prevents -pedantic warnings */
+# else
+# define inline /* nothing */
+# endif
+#endif
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define VOLATILE volatile
+#define SIGNED signed
+
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#define AND ,
+#define DOTS , ...
+#define NOARGS void
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#undef ANSI_PROTOTYPES
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#define PARAMS(args) ()
+#define VPARAMS(args) (va_alist) va_dcl
+#define VA_START(va_list, var) va_start(va_list)
+
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE)
+
+/* some systems define these in header files for non-ansi mode */
+#undef const
+#undef volatile
+#undef signed
+#undef inline
+#define const
+#define volatile
+#define signed
+#define inline
+
+#ifndef IN_GCC
+#define CONST
+#define VOLATILE
+#define SIGNED
+
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#define AND ;
+#define DOTS
+#define NOARGS
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+/* Define macros for some gcc attributes. This permits us to use the
+ macros freely, and know that they will come into play for the
+ version of gcc in which they are supported. */
+
+#if (GCC_VERSION < 2007)
+# define __attribute__(x)
+#endif
+
+/* Attribute __malloc__ on functions was valid as of gcc 2.96. */
+#ifndef ATTRIBUTE_MALLOC
+# if (GCC_VERSION >= 2096)
+# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__))
+# else
+# define ATTRIBUTE_MALLOC
+# endif /* GNUC >= 2.96 */
+#endif /* ATTRIBUTE_MALLOC */
+
+/* Attributes on labels were valid as of gcc 2.93 and g++ 4.5. For
+ g++ an attribute on a label must be followed by a semicolon. */
+#ifndef ATTRIBUTE_UNUSED_LABEL
+# ifndef __cplusplus
+# if GCC_VERSION >= 2093
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif
+# else
+# if GCC_VERSION >= 4005
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED ;
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif
+# endif
+#endif
+
+#ifndef ATTRIBUTE_UNUSED
+#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+#endif /* ATTRIBUTE_UNUSED */
+
+/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the
+ identifier name. */
+#if ! defined(__cplusplus) || (GCC_VERSION >= 3004)
+# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED
+#else /* !__cplusplus || GNUC >= 3.4 */
+# define ARG_UNUSED(NAME) NAME
+#endif /* !__cplusplus || GNUC >= 3.4 */
+
+#ifndef ATTRIBUTE_NORETURN
+#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__))
+#endif /* ATTRIBUTE_NORETURN */
+
+/* Attribute `nonnull' was valid as of gcc 3.3. */
+#ifndef ATTRIBUTE_NONNULL
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m)))
+# else
+# define ATTRIBUTE_NONNULL(m)
+# endif /* GNUC >= 3.3 */
+#endif /* ATTRIBUTE_NONNULL */
+
+/* Attribute `pure' was valid as of gcc 3.0. */
+#ifndef ATTRIBUTE_PURE
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_PURE __attribute__ ((__pure__))
+# else
+# define ATTRIBUTE_PURE
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_PURE */
+
+/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL.
+ This was the case for the `printf' format attribute by itself
+ before GCC 3.3, but as of 3.3 we need to add the `nonnull'
+ attribute to retain this behavior. */
+#ifndef ATTRIBUTE_PRINTF
+#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m)
+#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2)
+#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3)
+#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4)
+#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5)
+#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6)
+#endif /* ATTRIBUTE_PRINTF */
+
+/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on
+ a function pointer. Format attributes were allowed on function
+ pointers as of gcc 3.1. */
+#ifndef ATTRIBUTE_FPTR_PRINTF
+# if (GCC_VERSION >= 3001)
+# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n)
+# else
+# define ATTRIBUTE_FPTR_PRINTF(m, n)
+# endif /* GNUC >= 3.1 */
+# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2)
+# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3)
+# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4)
+# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5)
+# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6)
+#endif /* ATTRIBUTE_FPTR_PRINTF */
+
+/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A
+ NULL format specifier was allowed as of gcc 3.3. */
+#ifndef ATTRIBUTE_NULL_PRINTF
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n)))
+# else
+# define ATTRIBUTE_NULL_PRINTF(m, n)
+# endif /* GNUC >= 3.3 */
+# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2)
+# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3)
+# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4)
+# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5)
+# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6)
+#endif /* ATTRIBUTE_NULL_PRINTF */
+
+/* Attribute `sentinel' was valid as of gcc 3.5. */
+#ifndef ATTRIBUTE_SENTINEL
+# if (GCC_VERSION >= 3005)
+# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__))
+# else
+# define ATTRIBUTE_SENTINEL
+# endif /* GNUC >= 3.5 */
+#endif /* ATTRIBUTE_SENTINEL */
+
+
+#ifndef ATTRIBUTE_ALIGNED_ALIGNOF
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m))))
+# else
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m)
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */
+
+/* Useful for structures whose layout must much some binary specification
+ regardless of the alignment and padding qualities of the compiler. */
+#ifndef ATTRIBUTE_PACKED
+# define ATTRIBUTE_PACKED __attribute__ ((packed))
+#endif
+
+/* Attribute `hot' and `cold' was valid as of gcc 4.3. */
+#ifndef ATTRIBUTE_COLD
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_COLD __attribute__ ((__cold__))
+# else
+# define ATTRIBUTE_COLD
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_COLD */
+#ifndef ATTRIBUTE_HOT
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_HOT __attribute__ ((__hot__))
+# else
+# define ATTRIBUTE_HOT
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_HOT */
+
+/* We use __extension__ in some places to suppress -pedantic warnings
+ about GCC extensions. This feature didn't work properly before
+ gcc 2.8. */
+#if GCC_VERSION < 2008
+#define __extension__
+#endif
+
+/* This is used to declare a const variable which should be visible
+ outside of the current compilation unit. Use it as
+ EXPORTED_CONST int i = 1;
+ This is because the semantics of const are different in C and C++.
+ "extern const" is permitted in C but it looks strange, and gcc
+ warns about it when -Wc++-compat is not used. */
+#ifdef __cplusplus
+#define EXPORTED_CONST extern const
+#else
+#define EXPORTED_CONST const
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ansidecl.h */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h
new file mode 100644
index 0000000..6024a88
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h
@@ -0,0 +1,5725 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- This file is automatically
+ generated from "bfd-in.h", "init.c", "opncls.c", "libbfd.c",
+ "bfdio.c", "bfdwin.c", "section.c", "archures.c", "reloc.c",
+ "syms.c", "bfd.c", "archive.c", "corefile.c", "targets.c", "format.c",
+ "linker.c", "simple.c" and "compress.c".
+ Run "make headers" in your build bfd/ to regenerate. */
+
+/* Main header file for the bfd library -- portable access to object files.
+
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
+
+ Contributed by Cygnus Support.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef __BFD_H_SEEN__
+#define __BFD_H_SEEN__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+#include "symcat.h"
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#ifndef SABER
+/* This hack is to avoid a problem with some strict ANSI C preprocessors.
+ The problem is, "32_" is not a valid preprocessing token, and we don't
+ want extra underscores (e.g., "nlm_32_"). The XCONCAT2 macro will
+ cause the inner CONCAT2 macros to be evaluated first, producing
+ still-valid pp-tokens. Then the final concatenation can be done. */
+#undef CONCAT4
+#define CONCAT4(a,b,c,d) XCONCAT2(CONCAT2(a,b),CONCAT2(c,d))
+#endif
+#endif
+
+/* This is a utility macro to handle the situation where the code
+ wants to place a constant string into the code, followed by a
+ comma and then the length of the string. Doing this by hand
+ is error prone, so using this macro is safer. */
+#define STRING_COMMA_LEN(STR) (STR), (sizeof (STR) - 1)
+/* Unfortunately it is not possible to use the STRING_COMMA_LEN macro
+ to create the arguments to another macro, since the preprocessor
+ will mis-count the number of arguments to the outer macro (by not
+ evaluating STRING_COMMA_LEN and so missing the comma). This is a
+ problem for example when trying to use STRING_COMMA_LEN to build
+ the arguments to the strncmp() macro. Hence this alternative
+ definition of strncmp is provided here.
+
+ Note - these macros do NOT work if STR2 is not a constant string. */
+#define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0)
+ /* strcpy() can have a similar problem, but since we know we are
+ copying a constant string, we can use memcpy which will be faster
+ since there is no need to check for a NUL byte inside STR. We
+ can also save time if we do not need to copy the terminating NUL. */
+#define LITMEMCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2) - 1)
+#define LITSTRCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2))
+
+
+#define BFD_SUPPORTS_PLUGINS 0
+
+/* The word size used by BFD on the host. This may be 64 with a 32
+ bit target if the host is 64 bit, or if other 64 bit targets have
+ been selected with --enable-targets, or if --enable-64-bit-bfd. */
+#define BFD_ARCH_SIZE 32
+
+/* The word size of the default bfd target. */
+#define BFD_DEFAULT_TARGET_SIZE 32
+
+#define BFD_HOST_64BIT_LONG 0
+#define BFD_HOST_64BIT_LONG_LONG 1
+#if 1
+#define BFD_HOST_64_BIT long long
+#define BFD_HOST_U_64_BIT unsigned long long
+typedef BFD_HOST_64_BIT bfd_int64_t;
+typedef BFD_HOST_U_64_BIT bfd_uint64_t;
+#endif
+
+#if BFD_ARCH_SIZE >= 64
+#define BFD64
+#endif
+
+#ifndef INLINE
+#if __GNUC__ >= 2
+#define INLINE __inline__
+#else
+#define INLINE
+#endif
+#endif
+
+/* Declaring a type wide enough to hold a host long and a host pointer. */
+#define BFD_HOSTPTR_T unsigned long
+typedef BFD_HOSTPTR_T bfd_hostptr_t;
+
+/* Forward declaration. */
+typedef struct bfd bfd;
+
+/* Boolean type used in bfd. Too many systems define their own
+ versions of "boolean" for us to safely typedef a "boolean" of
+ our own. Using an enum for "bfd_boolean" has its own set of
+ problems, with strange looking casts required to avoid warnings
+ on some older compilers. Thus we just use an int.
+
+ General rule: Functions which are bfd_boolean return TRUE on
+ success and FALSE on failure (unless they're a predicate). */
+
+typedef int bfd_boolean;
+#undef FALSE
+#undef TRUE
+#define FALSE 0
+#define TRUE 1
+
+#ifdef BFD64
+
+#ifndef BFD_HOST_64_BIT
+ #error No 64 bit integer type available
+#endif /* ! defined (BFD_HOST_64_BIT) */
+
+typedef BFD_HOST_U_64_BIT bfd_vma;
+typedef BFD_HOST_64_BIT bfd_signed_vma;
+typedef BFD_HOST_U_64_BIT bfd_size_type;
+typedef BFD_HOST_U_64_BIT symvalue;
+
+#if BFD_HOST_64BIT_LONG
+#define BFD_VMA_FMT "l"
+#elif defined (__MSVCRT__)
+#define BFD_VMA_FMT "I64"
+#else
+#define BFD_VMA_FMT "ll"
+#endif
+
+#ifndef fprintf_vma
+#define sprintf_vma(s,x) sprintf (s, "%016" BFD_VMA_FMT "x", x)
+#define fprintf_vma(f,x) fprintf (f, "%016" BFD_VMA_FMT "x", x)
+#endif
+
+#else /* not BFD64 */
+
+/* Represent a target address. Also used as a generic unsigned type
+ which is guaranteed to be big enough to hold any arithmetic types
+ we need to deal with. */
+typedef unsigned long bfd_vma;
+
+/* A generic signed type which is guaranteed to be big enough to hold any
+ arithmetic types we need to deal with. Can be assumed to be compatible
+ with bfd_vma in the same way that signed and unsigned ints are compatible
+ (as parameters, in assignment, etc). */
+typedef long bfd_signed_vma;
+
+typedef unsigned long symvalue;
+typedef unsigned long bfd_size_type;
+
+/* Print a bfd_vma x on stream s. */
+#define BFD_VMA_FMT "l"
+#define fprintf_vma(s,x) fprintf (s, "%08" BFD_VMA_FMT "x", x)
+#define sprintf_vma(s,x) sprintf (s, "%08" BFD_VMA_FMT "x", x)
+
+#endif /* not BFD64 */
+
+#define HALF_BFD_SIZE_TYPE \
+ (((bfd_size_type) 1) << (8 * sizeof (bfd_size_type) / 2))
+
+#ifndef BFD_HOST_64_BIT
+/* Fall back on a 32 bit type. The idea is to make these types always
+ available for function return types, but in the case that
+ BFD_HOST_64_BIT is undefined such a function should abort or
+ otherwise signal an error. */
+typedef bfd_signed_vma bfd_int64_t;
+typedef bfd_vma bfd_uint64_t;
+#endif
+
+/* An offset into a file. BFD always uses the largest possible offset
+ based on the build time availability of fseek, fseeko, or fseeko64. */
+typedef BFD_HOST_64_BIT file_ptr;
+typedef unsigned BFD_HOST_64_BIT ufile_ptr;
+
+extern void bfd_sprintf_vma (bfd *, char *, bfd_vma);
+extern void bfd_fprintf_vma (bfd *, void *, bfd_vma);
+
+#define printf_vma(x) fprintf_vma(stdout,x)
+#define bfd_printf_vma(abfd,x) bfd_fprintf_vma (abfd,stdout,x)
+
+typedef unsigned int flagword; /* 32 bits of flags */
+typedef unsigned char bfd_byte;
+
+/* File formats. */
+
+typedef enum bfd_format
+{
+ bfd_unknown = 0, /* File format is unknown. */
+ bfd_object, /* Linker/assembler/compiler output. */
+ bfd_archive, /* Object archive file. */
+ bfd_core, /* Core dump. */
+ bfd_type_end /* Marks the end; don't use it! */
+}
+bfd_format;
+
+/* Symbols and relocation. */
+
+/* A count of carsyms (canonical archive symbols). */
+typedef unsigned long symindex;
+
+/* How to perform a relocation. */
+typedef const struct reloc_howto_struct reloc_howto_type;
+
+#define BFD_NO_MORE_SYMBOLS ((symindex) ~0)
+
+/* General purpose part of a symbol X;
+ target specific parts are in libcoff.h, libaout.h, etc. */
+
+#define bfd_get_section(x) ((x)->section)
+#define bfd_get_output_section(x) ((x)->section->output_section)
+#define bfd_set_section(x,y) ((x)->section) = (y)
+#define bfd_asymbol_base(x) ((x)->section->vma)
+#define bfd_asymbol_value(x) (bfd_asymbol_base(x) + (x)->value)
+#define bfd_asymbol_name(x) ((x)->name)
+/*Perhaps future: #define bfd_asymbol_bfd(x) ((x)->section->owner)*/
+#define bfd_asymbol_bfd(x) ((x)->the_bfd)
+#define bfd_asymbol_flavour(x) \
+ (((x)->flags & BSF_SYNTHETIC) != 0 \
+ ? bfd_target_unknown_flavour \
+ : bfd_asymbol_bfd (x)->xvec->flavour)
+
+/* A canonical archive symbol. */
+/* This is a type pun with struct ranlib on purpose! */
+typedef struct carsym
+{
+ char *name;
+ file_ptr file_offset; /* Look here to find the file. */
+}
+carsym; /* To make these you call a carsymogen. */
+
+/* Used in generating armaps (archive tables of contents).
+ Perhaps just a forward definition would do? */
+struct orl /* Output ranlib. */
+{
+ char **name; /* Symbol name. */
+ union
+ {
+ file_ptr pos;
+ bfd *abfd;
+ } u; /* bfd* or file position. */
+ int namidx; /* Index into string table. */
+};
+
+/* Linenumber stuff. */
+typedef struct lineno_cache_entry
+{
+ unsigned int line_number; /* Linenumber from start of function. */
+ union
+ {
+ struct bfd_symbol *sym; /* Function name. */
+ bfd_vma offset; /* Offset into section. */
+ } u;
+}
+alent;
+
+/* Object and core file sections. */
+
+#define align_power(addr, align) \
+ (((addr) + ((bfd_vma) 1 << (align)) - 1) & ((bfd_vma) -1 << (align)))
+
+typedef struct bfd_section *sec_ptr;
+
+#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0)
+#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0)
+#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0)
+#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0)
+#define bfd_section_name(bfd, ptr) ((ptr)->name)
+#define bfd_section_size(bfd, ptr) ((ptr)->size)
+#define bfd_get_section_size(ptr) ((ptr)->size)
+#define bfd_section_vma(bfd, ptr) ((ptr)->vma)
+#define bfd_section_lma(bfd, ptr) ((ptr)->lma)
+#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power)
+#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0)
+#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata)
+
+#define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
+
+#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = TRUE), TRUE)
+#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),TRUE)
+#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE)
+/* Find the address one past the end of SEC. */
+#define bfd_get_section_limit(bfd, sec) \
+ (((sec)->rawsize ? (sec)->rawsize : (sec)->size) \
+ / bfd_octets_per_byte (bfd))
+
+/* Return TRUE if section has been discarded. */
+#define elf_discarded_section(sec) \
+ (!bfd_is_abs_section (sec) \
+ && bfd_is_abs_section ((sec)->output_section) \
+ && (sec)->sec_info_type != ELF_INFO_TYPE_MERGE \
+ && (sec)->sec_info_type != ELF_INFO_TYPE_JUST_SYMS)
+
+/* Forward define. */
+struct stat;
+
+typedef enum bfd_print_symbol
+{
+ bfd_print_symbol_name,
+ bfd_print_symbol_more,
+ bfd_print_symbol_all
+} bfd_print_symbol_type;
+
+/* Information about a symbol that nm needs. */
+
+typedef struct _symbol_info
+{
+ symvalue value;
+ char type;
+ const char *name; /* Symbol name. */
+ unsigned char stab_type; /* Stab type. */
+ char stab_other; /* Stab other. */
+ short stab_desc; /* Stab desc. */
+ const char *stab_name; /* String for stab type. */
+} symbol_info;
+
+/* Get the name of a stabs type code. */
+
+extern const char *bfd_get_stab_name (int);
+
+/* Hash table routines. There is no way to free up a hash table. */
+
+/* An element in the hash table. Most uses will actually use a larger
+ structure, and an instance of this will be the first field. */
+
+struct bfd_hash_entry
+{
+ /* Next entry for this hash code. */
+ struct bfd_hash_entry *next;
+ /* String being hashed. */
+ const char *string;
+ /* Hash code. This is the full hash code, not the index into the
+ table. */
+ unsigned long hash;
+};
+
+/* A hash table. */
+
+struct bfd_hash_table
+{
+ /* The hash array. */
+ struct bfd_hash_entry **table;
+ /* A function used to create new elements in the hash table. The
+ first entry is itself a pointer to an element. When this
+ function is first invoked, this pointer will be NULL. However,
+ having the pointer permits a hierarchy of method functions to be
+ built each of which calls the function in the superclass. Thus
+ each function should be written to allocate a new block of memory
+ only if the argument is NULL. */
+ struct bfd_hash_entry *(*newfunc)
+ (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
+ /* An objalloc for this hash table. This is a struct objalloc *,
+ but we use void * to avoid requiring the inclusion of objalloc.h. */
+ void *memory;
+ /* The number of slots in the hash table. */
+ unsigned int size;
+ /* The number of entries in the hash table. */
+ unsigned int count;
+ /* The size of elements. */
+ unsigned int entsize;
+ /* If non-zero, don't grow the hash table. */
+ unsigned int frozen:1;
+};
+
+/* Initialize a hash table. */
+extern bfd_boolean bfd_hash_table_init
+ (struct bfd_hash_table *,
+ struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
+ struct bfd_hash_table *,
+ const char *),
+ unsigned int);
+
+/* Initialize a hash table specifying a size. */
+extern bfd_boolean bfd_hash_table_init_n
+ (struct bfd_hash_table *,
+ struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
+ struct bfd_hash_table *,
+ const char *),
+ unsigned int, unsigned int);
+
+/* Free up a hash table. */
+extern void bfd_hash_table_free
+ (struct bfd_hash_table *);
+
+/* Look up a string in a hash table. If CREATE is TRUE, a new entry
+ will be created for this string if one does not already exist. The
+ COPY argument must be TRUE if this routine should copy the string
+ into newly allocated memory when adding an entry. */
+extern struct bfd_hash_entry *bfd_hash_lookup
+ (struct bfd_hash_table *, const char *, bfd_boolean create,
+ bfd_boolean copy);
+
+/* Insert an entry in a hash table. */
+extern struct bfd_hash_entry *bfd_hash_insert
+ (struct bfd_hash_table *, const char *, unsigned long);
+
+/* Replace an entry in a hash table. */
+extern void bfd_hash_replace
+ (struct bfd_hash_table *, struct bfd_hash_entry *old,
+ struct bfd_hash_entry *nw);
+
+/* Base method for creating a hash table entry. */
+extern struct bfd_hash_entry *bfd_hash_newfunc
+ (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
+
+/* Grab some space for a hash table entry. */
+extern void *bfd_hash_allocate
+ (struct bfd_hash_table *, unsigned int);
+
+/* Traverse a hash table in a random order, calling a function on each
+ element. If the function returns FALSE, the traversal stops. The
+ INFO argument is passed to the function. */
+extern void bfd_hash_traverse
+ (struct bfd_hash_table *,
+ bfd_boolean (*) (struct bfd_hash_entry *, void *),
+ void *info);
+
+/* Allows the default size of a hash table to be configured. New hash
+ tables allocated using bfd_hash_table_init will be created with
+ this size. */
+extern void bfd_hash_set_default_size (bfd_size_type);
+
+/* This structure is used to keep track of stabs in sections
+ information while linking. */
+
+struct stab_info
+{
+ /* A hash table used to hold stabs strings. */
+ struct bfd_strtab_hash *strings;
+ /* The header file hash table. */
+ struct bfd_hash_table includes;
+ /* The first .stabstr section. */
+ struct bfd_section *stabstr;
+};
+
+#define COFF_SWAP_TABLE (void *) &bfd_coff_std_swap_table
+
+/* User program access to BFD facilities. */
+
+/* Direct I/O routines, for programs which know more about the object
+ file than BFD does. Use higher level routines if possible. */
+
+extern bfd_size_type bfd_bread (void *, bfd_size_type, bfd *);
+extern bfd_size_type bfd_bwrite (const void *, bfd_size_type, bfd *);
+extern int bfd_seek (bfd *, file_ptr, int);
+extern file_ptr bfd_tell (bfd *);
+extern int bfd_flush (bfd *);
+extern int bfd_stat (bfd *, struct stat *);
+
+/* Deprecated old routines. */
+#if __GNUC__
+#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_read", __FILE__, __LINE__, __FUNCTION__), \
+ bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_write", __FILE__, __LINE__, __FUNCTION__), \
+ bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#else
+#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_read", (const char *) 0, 0, (const char *) 0), \
+ bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_write", (const char *) 0, 0, (const char *) 0),\
+ bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#endif
+extern void warn_deprecated (const char *, const char *, int, const char *);
+
+/* Cast from const char * to char * so that caller can assign to
+ a char * without a warning. */
+#define bfd_get_filename(abfd) ((char *) (abfd)->filename)
+#define bfd_get_cacheable(abfd) ((abfd)->cacheable)
+#define bfd_get_format(abfd) ((abfd)->format)
+#define bfd_get_target(abfd) ((abfd)->xvec->name)
+#define bfd_get_flavour(abfd) ((abfd)->xvec->flavour)
+#define bfd_family_coff(abfd) \
+ (bfd_get_flavour (abfd) == bfd_target_coff_flavour || \
+ bfd_get_flavour (abfd) == bfd_target_xcoff_flavour)
+#define bfd_big_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
+#define bfd_little_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_LITTLE)
+#define bfd_header_big_endian(abfd) \
+ ((abfd)->xvec->header_byteorder == BFD_ENDIAN_BIG)
+#define bfd_header_little_endian(abfd) \
+ ((abfd)->xvec->header_byteorder == BFD_ENDIAN_LITTLE)
+#define bfd_get_file_flags(abfd) ((abfd)->flags)
+#define bfd_applicable_file_flags(abfd) ((abfd)->xvec->object_flags)
+#define bfd_applicable_section_flags(abfd) ((abfd)->xvec->section_flags)
+#define bfd_my_archive(abfd) ((abfd)->my_archive)
+#define bfd_has_map(abfd) ((abfd)->has_armap)
+#define bfd_is_thin_archive(abfd) ((abfd)->is_thin_archive)
+
+#define bfd_valid_reloc_types(abfd) ((abfd)->xvec->valid_reloc_types)
+#define bfd_usrdata(abfd) ((abfd)->usrdata)
+
+#define bfd_get_start_address(abfd) ((abfd)->start_address)
+#define bfd_get_symcount(abfd) ((abfd)->symcount)
+#define bfd_get_outsymbols(abfd) ((abfd)->outsymbols)
+#define bfd_count_sections(abfd) ((abfd)->section_count)
+
+#define bfd_get_dynamic_symcount(abfd) ((abfd)->dynsymcount)
+
+#define bfd_get_symbol_leading_char(abfd) ((abfd)->xvec->symbol_leading_char)
+
+#define bfd_set_cacheable(abfd,bool) (((abfd)->cacheable = bool), TRUE)
+
+extern bfd_boolean bfd_cache_close
+ (bfd *abfd);
+/* NB: This declaration should match the autogenerated one in libbfd.h. */
+
+extern bfd_boolean bfd_cache_close_all (void);
+
+extern bfd_boolean bfd_record_phdr
+ (bfd *, unsigned long, bfd_boolean, flagword, bfd_boolean, bfd_vma,
+ bfd_boolean, bfd_boolean, unsigned int, struct bfd_section **);
+
+/* Byte swapping routines. */
+
+bfd_uint64_t bfd_getb64 (const void *);
+bfd_uint64_t bfd_getl64 (const void *);
+bfd_int64_t bfd_getb_signed_64 (const void *);
+bfd_int64_t bfd_getl_signed_64 (const void *);
+bfd_vma bfd_getb32 (const void *);
+bfd_vma bfd_getl32 (const void *);
+bfd_signed_vma bfd_getb_signed_32 (const void *);
+bfd_signed_vma bfd_getl_signed_32 (const void *);
+bfd_vma bfd_getb16 (const void *);
+bfd_vma bfd_getl16 (const void *);
+bfd_signed_vma bfd_getb_signed_16 (const void *);
+bfd_signed_vma bfd_getl_signed_16 (const void *);
+void bfd_putb64 (bfd_uint64_t, void *);
+void bfd_putl64 (bfd_uint64_t, void *);
+void bfd_putb32 (bfd_vma, void *);
+void bfd_putl32 (bfd_vma, void *);
+void bfd_putb16 (bfd_vma, void *);
+void bfd_putl16 (bfd_vma, void *);
+
+/* Byte swapping routines which take size and endiannes as arguments. */
+
+bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean);
+void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean);
+
+extern bfd_boolean bfd_section_already_linked_table_init (void);
+extern void bfd_section_already_linked_table_free (void);
+
+/* Externally visible ECOFF routines. */
+
+#if defined(__STDC__) || defined(ALMOST_STDC)
+struct ecoff_debug_info;
+struct ecoff_debug_swap;
+struct ecoff_extr;
+struct bfd_symbol;
+struct bfd_link_info;
+struct bfd_link_hash_entry;
+struct bfd_elf_version_tree;
+#endif
+extern bfd_vma bfd_ecoff_get_gp_value
+ (bfd * abfd);
+extern bfd_boolean bfd_ecoff_set_gp_value
+ (bfd *abfd, bfd_vma gp_value);
+extern bfd_boolean bfd_ecoff_set_regmasks
+ (bfd *abfd, unsigned long gprmask, unsigned long fprmask,
+ unsigned long *cprmask);
+extern void *bfd_ecoff_debug_init
+ (bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, struct bfd_link_info *);
+extern void bfd_ecoff_debug_free
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_accumulate
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, bfd *input_bfd,
+ struct ecoff_debug_info *input_debug,
+ const struct ecoff_debug_swap *input_swap, struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_accumulate_other
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, bfd *input_bfd,
+ struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_externals
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, bfd_boolean relocatable,
+ bfd_boolean (*get_extr) (struct bfd_symbol *, struct ecoff_extr *),
+ void (*set_index) (struct bfd_symbol *, bfd_size_type));
+extern bfd_boolean bfd_ecoff_debug_one_external
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, const char *name,
+ struct ecoff_extr *esym);
+extern bfd_size_type bfd_ecoff_debug_size
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap);
+extern bfd_boolean bfd_ecoff_write_debug
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, file_ptr where);
+extern bfd_boolean bfd_ecoff_write_accumulated_debug
+ (void *handle, bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap,
+ struct bfd_link_info *info, file_ptr where);
+
+/* Externally visible ELF routines. */
+
+struct bfd_link_needed_list
+{
+ struct bfd_link_needed_list *next;
+ bfd *by;
+ const char *name;
+};
+
+enum dynamic_lib_link_class {
+ DYN_NORMAL = 0,
+ DYN_AS_NEEDED = 1,
+ DYN_DT_NEEDED = 2,
+ DYN_NO_ADD_NEEDED = 4,
+ DYN_NO_NEEDED = 8
+};
+
+enum notice_asneeded_action {
+ notice_as_needed,
+ notice_not_needed,
+ notice_needed
+};
+
+extern bfd_boolean bfd_elf_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *, bfd_boolean,
+ bfd_boolean);
+extern struct bfd_link_needed_list *bfd_elf_get_needed_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_elf_get_bfd_needed_list
+ (bfd *, struct bfd_link_needed_list **);
+extern bfd_boolean bfd_elf_size_dynamic_sections
+ (bfd *, const char *, const char *, const char *, const char * const *,
+ struct bfd_link_info *, struct bfd_section **,
+ struct bfd_elf_version_tree *);
+extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr
+ (bfd *, struct bfd_link_info *);
+extern void bfd_elf_set_dt_needed_name
+ (bfd *, const char *);
+extern const char *bfd_elf_get_dt_soname
+ (bfd *);
+extern void bfd_elf_set_dyn_lib_class
+ (bfd *, enum dynamic_lib_link_class);
+extern int bfd_elf_get_dyn_lib_class
+ (bfd *);
+extern struct bfd_link_needed_list *bfd_elf_get_runpath_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_elf_discard_info
+ (bfd *, struct bfd_link_info *);
+extern unsigned int _bfd_elf_default_action_discarded
+ (struct bfd_section *);
+
+/* Return an upper bound on the number of bytes required to store a
+ copy of ABFD's program header table entries. Return -1 if an error
+ occurs; bfd_get_error will return an appropriate code. */
+extern long bfd_get_elf_phdr_upper_bound
+ (bfd *abfd);
+
+/* Copy ABFD's program header table entries to *PHDRS. The entries
+ will be stored as an array of Elf_Internal_Phdr structures, as
+ defined in include/elf/internal.h. To find out how large the
+ buffer needs to be, call bfd_get_elf_phdr_upper_bound.
+
+ Return the number of program header table entries read, or -1 if an
+ error occurs; bfd_get_error will return an appropriate code. */
+extern int bfd_get_elf_phdrs
+ (bfd *abfd, void *phdrs);
+
+/* Create a new BFD as if by bfd_openr. Rather than opening a file,
+ reconstruct an ELF file by reading the segments out of remote memory
+ based on the ELF file header at EHDR_VMA and the ELF program headers it
+ points to. If not null, *LOADBASEP is filled in with the difference
+ between the VMAs from which the segments were read, and the VMAs the
+ file headers (and hence BFD's idea of each section's VMA) put them at.
+
+ The function TARGET_READ_MEMORY is called to copy LEN bytes from the
+ remote memory at target address VMA into the local buffer at MYADDR; it
+ should return zero on success or an `errno' code on failure. TEMPL must
+ be a BFD for an ELF target with the word size and byte order found in
+ the remote memory. */
+extern bfd *bfd_elf_bfd_from_remote_memory
+ (bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
+ int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len));
+
+/* Return the arch_size field of an elf bfd, or -1 if not elf. */
+extern int bfd_get_arch_size
+ (bfd *);
+
+/* Return TRUE if address "naturally" sign extends, or -1 if not elf. */
+extern int bfd_get_sign_extend_vma
+ (bfd *);
+
+extern struct bfd_section *_bfd_elf_tls_setup
+ (bfd *, struct bfd_link_info *);
+
+extern void _bfd_fix_excluded_sec_syms
+ (bfd *, struct bfd_link_info *);
+
+extern unsigned bfd_m68k_mach_to_features (int);
+
+extern int bfd_m68k_features_to_mach (unsigned);
+
+extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+extern void bfd_elf_m68k_set_target_options (struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_bfin_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+extern bfd_boolean bfd_cr16_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+/* SunOS shared library support routines for the linker. */
+
+extern struct bfd_link_needed_list *bfd_sunos_get_needed_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_sunos_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_sunos_size_dynamic_sections
+ (bfd *, struct bfd_link_info *, struct bfd_section **,
+ struct bfd_section **, struct bfd_section **);
+
+/* Linux shared library support routines for the linker. */
+
+extern bfd_boolean bfd_i386linux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_m68klinux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_sparclinux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+
+/* mmap hacks */
+
+struct _bfd_window_internal;
+typedef struct _bfd_window_internal bfd_window_internal;
+
+typedef struct _bfd_window
+{
+ /* What the user asked for. */
+ void *data;
+ bfd_size_type size;
+ /* The actual window used by BFD. Small user-requested read-only
+ regions sharing a page may share a single window into the object
+ file. Read-write versions shouldn't until I've fixed things to
+ keep track of which portions have been claimed by the
+ application; don't want to give the same region back when the
+ application wants two writable copies! */
+ struct _bfd_window_internal *i;
+}
+bfd_window;
+
+extern void bfd_init_window
+ (bfd_window *);
+extern void bfd_free_window
+ (bfd_window *);
+extern bfd_boolean bfd_get_file_window
+ (bfd *, file_ptr, bfd_size_type, bfd_window *, bfd_boolean);
+
+/* XCOFF support routines for the linker. */
+
+extern bfd_boolean bfd_xcoff_split_import_path
+ (bfd *, const char *, const char **, const char **);
+extern bfd_boolean bfd_xcoff_set_archive_import_path
+ (struct bfd_link_info *, bfd *, const char *);
+extern bfd_boolean bfd_xcoff_link_record_set
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_size_type);
+extern bfd_boolean bfd_xcoff_import_symbol
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_vma,
+ const char *, const char *, const char *, unsigned int);
+extern bfd_boolean bfd_xcoff_export_symbol
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *);
+extern bfd_boolean bfd_xcoff_link_count_reloc
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_xcoff_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_xcoff_size_dynamic_sections
+ (bfd *, struct bfd_link_info *, const char *, const char *,
+ unsigned long, unsigned long, unsigned long, bfd_boolean,
+ int, bfd_boolean, unsigned int, struct bfd_section **, bfd_boolean);
+extern bfd_boolean bfd_xcoff_link_generate_rtinit
+ (bfd *, const char *, const char *, bfd_boolean);
+
+/* XCOFF support routines for ar. */
+extern bfd_boolean bfd_xcoff_ar_archive_set_magic
+ (bfd *, char *);
+
+/* Externally visible COFF routines. */
+
+#if defined(__STDC__) || defined(ALMOST_STDC)
+struct internal_syment;
+union internal_auxent;
+#endif
+
+extern bfd_boolean bfd_coff_get_syment
+ (bfd *, struct bfd_symbol *, struct internal_syment *);
+
+extern bfd_boolean bfd_coff_get_auxent
+ (bfd *, struct bfd_symbol *, int, union internal_auxent *);
+
+extern bfd_boolean bfd_coff_set_symbol_class
+ (bfd *, struct bfd_symbol *, unsigned int);
+
+extern bfd_boolean bfd_m68k_coff_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, char **);
+
+/* ARM VFP11 erratum workaround support. */
+typedef enum
+{
+ BFD_ARM_VFP11_FIX_DEFAULT,
+ BFD_ARM_VFP11_FIX_NONE,
+ BFD_ARM_VFP11_FIX_SCALAR,
+ BFD_ARM_VFP11_FIX_VECTOR
+} bfd_arm_vfp11_fix;
+
+extern void bfd_elf32_arm_init_maps
+ (bfd *);
+
+extern void bfd_elf32_arm_set_vfp11_fix
+ (bfd *, struct bfd_link_info *);
+
+extern void bfd_elf32_arm_set_cortex_a8_fix
+ (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_vfp11_erratum_scan
+ (bfd *, struct bfd_link_info *);
+
+extern void bfd_elf32_arm_vfp11_fix_veneer_locations
+ (bfd *, struct bfd_link_info *);
+
+/* ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_arm_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_arm_process_before_allocation
+ (bfd *, struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+/* PE ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_arm_pe_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_arm_pe_process_before_allocation
+ (bfd *, struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_arm_pe_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+/* ELF ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_elf32_arm_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_process_before_allocation
+ (bfd *, struct bfd_link_info *);
+
+void bfd_elf32_arm_set_target_relocs
+ (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
+ int, int, int, int);
+
+extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_add_glue_sections_to_bfd
+ (bfd *, struct bfd_link_info *);
+
+/* ELF ARM mapping symbol support */
+#define BFD_ARM_SPECIAL_SYM_TYPE_MAP (1 << 0)
+#define BFD_ARM_SPECIAL_SYM_TYPE_TAG (1 << 1)
+#define BFD_ARM_SPECIAL_SYM_TYPE_OTHER (1 << 2)
+#define BFD_ARM_SPECIAL_SYM_TYPE_ANY (~0)
+extern bfd_boolean bfd_is_arm_special_symbol_name
+ (const char * name, int type);
+
+extern void bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *, int);
+
+/* ARM Note section processing. */
+extern bfd_boolean bfd_arm_merge_machines
+ (bfd *, bfd *);
+
+extern bfd_boolean bfd_arm_update_notes
+ (bfd *, const char *);
+
+extern unsigned int bfd_arm_get_mach_from_notes
+ (bfd *, const char *);
+
+/* ARM stub generation support. Called from the linker. */
+extern int elf32_arm_setup_section_lists
+ (bfd *, struct bfd_link_info *);
+extern void elf32_arm_next_input_section
+ (struct bfd_link_info *, struct bfd_section *);
+extern bfd_boolean elf32_arm_size_stubs
+ (bfd *, bfd *, struct bfd_link_info *, bfd_signed_vma,
+ struct bfd_section * (*) (const char *, struct bfd_section *), void (*) (void));
+extern bfd_boolean elf32_arm_build_stubs
+ (struct bfd_link_info *);
+
+/* ARM unwind section editing support. */
+extern bfd_boolean elf32_arm_fix_exidx_coverage
+ (struct bfd_section **, unsigned int, struct bfd_link_info *);
+
+/* PowerPC @tls opcode transform/validate. */
+extern unsigned int _bfd_elf_ppc_at_tls_transform
+ (unsigned int, unsigned int);
+/* PowerPC @tprel opcode transform/validate. */
+extern unsigned int _bfd_elf_ppc_at_tprel_transform
+ (unsigned int, unsigned int);
+
+/* TI COFF load page support. */
+extern void bfd_ticoff_set_section_load_page
+ (struct bfd_section *, int);
+
+extern int bfd_ticoff_get_section_load_page
+ (struct bfd_section *);
+
+/* H8/300 functions. */
+extern bfd_vma bfd_h8300_pad_address
+ (bfd *, bfd_vma);
+
+/* IA64 Itanium code generation. Called from linker. */
+extern void bfd_elf32_ia64_after_parse
+ (int);
+
+extern void bfd_elf64_ia64_after_parse
+ (int);
+
+/* This structure is used for a comdat section, as in PE. A comdat
+ section is associated with a particular symbol. When the linker
+ sees a comdat section, it keeps only one of the sections with a
+ given name and associated with a given symbol. */
+
+struct coff_comdat_info
+{
+ /* The name of the symbol associated with a comdat section. */
+ const char *name;
+
+ /* The local symbol table index of the symbol associated with a
+ comdat section. This is only meaningful to the object file format
+ specific code; it is not an index into the list returned by
+ bfd_canonicalize_symtab. */
+ long symbol;
+};
+
+extern struct coff_comdat_info *bfd_coff_get_comdat_section
+ (bfd *, struct bfd_section *);
+
+/* Extracted from init.c. */
+void bfd_init (void);
+
+/* Extracted from opncls.c. */
+bfd *bfd_fopen (const char *filename, const char *target,
+ const char *mode, int fd);
+
+bfd *bfd_openr (const char *filename, const char *target);
+
+bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
+
+bfd *bfd_openstreamr (const char *, const char *, void *);
+
+bfd *bfd_openr_iovec (const char *filename, const char *target,
+ void *(*open) (struct bfd *nbfd,
+ void *open_closure),
+ void *open_closure,
+ file_ptr (*pread) (struct bfd *nbfd,
+ void *stream,
+ void *buf,
+ file_ptr nbytes,
+ file_ptr offset),
+ int (*close) (struct bfd *nbfd,
+ void *stream),
+ int (*stat) (struct bfd *abfd,
+ void *stream,
+ struct stat *sb));
+
+bfd *bfd_openw (const char *filename, const char *target);
+
+bfd_boolean bfd_close (bfd *abfd);
+
+bfd_boolean bfd_close_all_done (bfd *);
+
+bfd *bfd_create (const char *filename, bfd *templ);
+
+bfd_boolean bfd_make_writable (bfd *abfd);
+
+bfd_boolean bfd_make_readable (bfd *abfd);
+
+unsigned long bfd_calc_gnu_debuglink_crc32
+ (unsigned long crc, const unsigned char *buf, bfd_size_type len);
+
+char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
+
+struct bfd_section *bfd_create_gnu_debuglink_section
+ (bfd *abfd, const char *filename);
+
+bfd_boolean bfd_fill_in_gnu_debuglink_section
+ (bfd *abfd, struct bfd_section *sect, const char *filename);
+
+/* Extracted from libbfd.c. */
+
+/* Byte swapping macros for user section data. */
+
+#define bfd_put_8(abfd, val, ptr) \
+ ((void) (*((unsigned char *) (ptr)) = (val) & 0xff))
+#define bfd_put_signed_8 \
+ bfd_put_8
+#define bfd_get_8(abfd, ptr) \
+ (*(unsigned char *) (ptr) & 0xff)
+#define bfd_get_signed_8(abfd, ptr) \
+ (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80)
+
+#define bfd_put_16(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx16, ((val),(ptr)))
+#define bfd_put_signed_16 \
+ bfd_put_16
+#define bfd_get_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx16, (ptr))
+#define bfd_get_signed_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_16, (ptr))
+
+#define bfd_put_32(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx32, ((val),(ptr)))
+#define bfd_put_signed_32 \
+ bfd_put_32
+#define bfd_get_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx32, (ptr))
+#define bfd_get_signed_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_32, (ptr))
+
+#define bfd_put_64(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx64, ((val), (ptr)))
+#define bfd_put_signed_64 \
+ bfd_put_64
+#define bfd_get_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx64, (ptr))
+#define bfd_get_signed_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_64, (ptr))
+
+#define bfd_get(bits, abfd, ptr) \
+ ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \
+ : (bits) == 16 ? bfd_get_16 (abfd, ptr) \
+ : (bits) == 32 ? bfd_get_32 (abfd, ptr) \
+ : (bits) == 64 ? bfd_get_64 (abfd, ptr) \
+ : (abort (), (bfd_vma) - 1))
+
+#define bfd_put(bits, abfd, val, ptr) \
+ ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \
+ : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \
+ : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \
+ : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
+ : (abort (), (void) 0))
+
+
+/* Byte swapping macros for file header data. */
+
+#define bfd_h_put_8(abfd, val, ptr) \
+ bfd_put_8 (abfd, val, ptr)
+#define bfd_h_put_signed_8(abfd, val, ptr) \
+ bfd_put_8 (abfd, val, ptr)
+#define bfd_h_get_8(abfd, ptr) \
+ bfd_get_8 (abfd, ptr)
+#define bfd_h_get_signed_8(abfd, ptr) \
+ bfd_get_signed_8 (abfd, ptr)
+
+#define bfd_h_put_16(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx16, (val, ptr))
+#define bfd_h_put_signed_16 \
+ bfd_h_put_16
+#define bfd_h_get_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx16, (ptr))
+#define bfd_h_get_signed_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr))
+
+#define bfd_h_put_32(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx32, (val, ptr))
+#define bfd_h_put_signed_32 \
+ bfd_h_put_32
+#define bfd_h_get_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx32, (ptr))
+#define bfd_h_get_signed_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr))
+
+#define bfd_h_put_64(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx64, (val, ptr))
+#define bfd_h_put_signed_64 \
+ bfd_h_put_64
+#define bfd_h_get_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx64, (ptr))
+#define bfd_h_get_signed_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr))
+
+/* Aliases for the above, which should eventually go away. */
+
+#define H_PUT_64 bfd_h_put_64
+#define H_PUT_32 bfd_h_put_32
+#define H_PUT_16 bfd_h_put_16
+#define H_PUT_8 bfd_h_put_8
+#define H_PUT_S64 bfd_h_put_signed_64
+#define H_PUT_S32 bfd_h_put_signed_32
+#define H_PUT_S16 bfd_h_put_signed_16
+#define H_PUT_S8 bfd_h_put_signed_8
+#define H_GET_64 bfd_h_get_64
+#define H_GET_32 bfd_h_get_32
+#define H_GET_16 bfd_h_get_16
+#define H_GET_8 bfd_h_get_8
+#define H_GET_S64 bfd_h_get_signed_64
+#define H_GET_S32 bfd_h_get_signed_32
+#define H_GET_S16 bfd_h_get_signed_16
+#define H_GET_S8 bfd_h_get_signed_8
+
+
+/* Extracted from bfdio.c. */
+long bfd_get_mtime (bfd *abfd);
+
+file_ptr bfd_get_size (bfd *abfd);
+
+void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len,
+ int prot, int flags, file_ptr offset);
+
+/* Extracted from bfdwin.c. */
+/* Extracted from section.c. */
+typedef struct bfd_section
+{
+ /* The name of the section; the name isn't a copy, the pointer is
+ the same as that passed to bfd_make_section. */
+ const char *name;
+
+ /* A unique sequence number. */
+ int id;
+
+ /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */
+ int index;
+
+ /* The next section in the list belonging to the BFD, or NULL. */
+ struct bfd_section *next;
+
+ /* The previous section in the list belonging to the BFD, or NULL. */
+ struct bfd_section *prev;
+
+ /* The field flags contains attributes of the section. Some
+ flags are read in from the object file, and some are
+ synthesized from other information. */
+ flagword flags;
+
+#define SEC_NO_FLAGS 0x000
+
+ /* Tells the OS to allocate space for this section when loading.
+ This is clear for a section containing debug information only. */
+#define SEC_ALLOC 0x001
+
+ /* Tells the OS to load the section from the file when loading.
+ This is clear for a .bss section. */
+#define SEC_LOAD 0x002
+
+ /* The section contains data still to be relocated, so there is
+ some relocation information too. */
+#define SEC_RELOC 0x004
+
+ /* A signal to the OS that the section contains read only data. */
+#define SEC_READONLY 0x008
+
+ /* The section contains code only. */
+#define SEC_CODE 0x010
+
+ /* The section contains data only. */
+#define SEC_DATA 0x020
+
+ /* The section will reside in ROM. */
+#define SEC_ROM 0x040
+
+ /* The section contains constructor information. This section
+ type is used by the linker to create lists of constructors and
+ destructors used by <<g++>>. When a back end sees a symbol
+ which should be used in a constructor list, it creates a new
+ section for the type of name (e.g., <<__CTOR_LIST__>>), attaches
+ the symbol to it, and builds a relocation. To build the lists
+ of constructors, all the linker has to do is catenate all the
+ sections called <<__CTOR_LIST__>> and relocate the data
+ contained within - exactly the operations it would peform on
+ standard data. */
+#define SEC_CONSTRUCTOR 0x080
+
+ /* The section has contents - a data section could be
+ <<SEC_ALLOC>> | <<SEC_HAS_CONTENTS>>; a debug section could be
+ <<SEC_HAS_CONTENTS>> */
+#define SEC_HAS_CONTENTS 0x100
+
+ /* An instruction to the linker to not output the section
+ even if it has information which would normally be written. */
+#define SEC_NEVER_LOAD 0x200
+
+ /* The section contains thread local data. */
+#define SEC_THREAD_LOCAL 0x400
+
+ /* The section has GOT references. This flag is only for the
+ linker, and is currently only used by the elf32-hppa back end.
+ It will be set if global offset table references were detected
+ in this section, which indicate to the linker that the section
+ contains PIC code, and must be handled specially when doing a
+ static link. */
+#define SEC_HAS_GOT_REF 0x800
+
+ /* The section contains common symbols (symbols may be defined
+ multiple times, the value of a symbol is the amount of
+ space it requires, and the largest symbol value is the one
+ used). Most targets have exactly one of these (which we
+ translate to bfd_com_section_ptr), but ECOFF has two. */
+#define SEC_IS_COMMON 0x1000
+
+ /* The section contains only debugging information. For
+ example, this is set for ELF .debug and .stab sections.
+ strip tests this flag to see if a section can be
+ discarded. */
+#define SEC_DEBUGGING 0x2000
+
+ /* The contents of this section are held in memory pointed to
+ by the contents field. This is checked by bfd_get_section_contents,
+ and the data is retrieved from memory if appropriate. */
+#define SEC_IN_MEMORY 0x4000
+
+ /* The contents of this section are to be excluded by the
+ linker for executable and shared objects unless those
+ objects are to be further relocated. */
+#define SEC_EXCLUDE 0x8000
+
+ /* The contents of this section are to be sorted based on the sum of
+ the symbol and addend values specified by the associated relocation
+ entries. Entries without associated relocation entries will be
+ appended to the end of the section in an unspecified order. */
+#define SEC_SORT_ENTRIES 0x10000
+
+ /* When linking, duplicate sections of the same name should be
+ discarded, rather than being combined into a single section as
+ is usually done. This is similar to how common symbols are
+ handled. See SEC_LINK_DUPLICATES below. */
+#define SEC_LINK_ONCE 0x20000
+
+ /* If SEC_LINK_ONCE is set, this bitfield describes how the linker
+ should handle duplicate sections. */
+#define SEC_LINK_DUPLICATES 0xc0000
+
+ /* This value for SEC_LINK_DUPLICATES means that duplicate
+ sections with the same name should simply be discarded. */
+#define SEC_LINK_DUPLICATES_DISCARD 0x0
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if there are any duplicate sections, although
+ it should still only link one copy. */
+#define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if any duplicate sections are a different size. */
+#define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if any duplicate sections contain different
+ contents. */
+#define SEC_LINK_DUPLICATES_SAME_CONTENTS \
+ (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE)
+
+ /* This section was created by the linker as part of dynamic
+ relocation or other arcane processing. It is skipped when
+ going through the first-pass output, trusting that someone
+ else up the line will take care of it later. */
+#define SEC_LINKER_CREATED 0x100000
+
+ /* This section should not be subject to garbage collection.
+ Also set to inform the linker that this section should not be
+ listed in the link map as discarded. */
+#define SEC_KEEP 0x200000
+
+ /* This section contains "short" data, and should be placed
+ "near" the GP. */
+#define SEC_SMALL_DATA 0x400000
+
+ /* Attempt to merge identical entities in the section.
+ Entity size is given in the entsize field. */
+#define SEC_MERGE 0x800000
+
+ /* If given with SEC_MERGE, entities to merge are zero terminated
+ strings where entsize specifies character size instead of fixed
+ size entries. */
+#define SEC_STRINGS 0x1000000
+
+ /* This section contains data about section groups. */
+#define SEC_GROUP 0x2000000
+
+ /* The section is a COFF shared library section. This flag is
+ only for the linker. If this type of section appears in
+ the input file, the linker must copy it to the output file
+ without changing the vma or size. FIXME: Although this
+ was originally intended to be general, it really is COFF
+ specific (and the flag was renamed to indicate this). It
+ might be cleaner to have some more general mechanism to
+ allow the back end to control what the linker does with
+ sections. */
+#define SEC_COFF_SHARED_LIBRARY 0x4000000
+
+ /* This section contains data which may be shared with other
+ executables or shared objects. This is for COFF only. */
+#define SEC_COFF_SHARED 0x8000000
+
+ /* When a section with this flag is being linked, then if the size of
+ the input section is less than a page, it should not cross a page
+ boundary. If the size of the input section is one page or more,
+ it should be aligned on a page boundary. This is for TI
+ TMS320C54X only. */
+#define SEC_TIC54X_BLOCK 0x10000000
+
+ /* Conditionally link this section; do not link if there are no
+ references found to any symbol in the section. This is for TI
+ TMS320C54X only. */
+#define SEC_TIC54X_CLINK 0x20000000
+
+ /* Indicate that section has the no read flag set. This happens
+ when memory read flag isn't set. */
+#define SEC_COFF_NOREAD 0x40000000
+
+ /* End of section flags. */
+
+ /* Some internal packed boolean fields. */
+
+ /* See the vma field. */
+ unsigned int user_set_vma : 1;
+
+ /* A mark flag used by some of the linker backends. */
+ unsigned int linker_mark : 1;
+
+ /* Another mark flag used by some of the linker backends. Set for
+ output sections that have an input section. */
+ unsigned int linker_has_input : 1;
+
+ /* Mark flag used by some linker backends for garbage collection. */
+ unsigned int gc_mark : 1;
+
+ /* The following flags are used by the ELF linker. */
+
+ /* Mark sections which have been allocated to segments. */
+ unsigned int segment_mark : 1;
+
+ /* Type of sec_info information. */
+ unsigned int sec_info_type:3;
+#define ELF_INFO_TYPE_NONE 0
+#define ELF_INFO_TYPE_STABS 1
+#define ELF_INFO_TYPE_MERGE 2
+#define ELF_INFO_TYPE_EH_FRAME 3
+#define ELF_INFO_TYPE_JUST_SYMS 4
+
+ /* Nonzero if this section uses RELA relocations, rather than REL. */
+ unsigned int use_rela_p:1;
+
+ /* Bits used by various backends. The generic code doesn't touch
+ these fields. */
+
+ /* Nonzero if this section has TLS related relocations. */
+ unsigned int has_tls_reloc:1;
+
+ /* Nonzero if this section has a call to __tls_get_addr. */
+ unsigned int has_tls_get_addr_call:1;
+
+ /* Nonzero if this section has a gp reloc. */
+ unsigned int has_gp_reloc:1;
+
+ /* Nonzero if this section needs the relax finalize pass. */
+ unsigned int need_finalize_relax:1;
+
+ /* Whether relocations have been processed. */
+ unsigned int reloc_done : 1;
+
+ /* End of internal packed boolean fields. */
+
+ /* The virtual memory address of the section - where it will be
+ at run time. The symbols are relocated against this. The
+ user_set_vma flag is maintained by bfd; if it's not set, the
+ backend can assign addresses (for example, in <<a.out>>, where
+ the default address for <<.data>> is dependent on the specific
+ target and various flags). */
+ bfd_vma vma;
+
+ /* The load address of the section - where it would be in a
+ rom image; really only used for writing section header
+ information. */
+ bfd_vma lma;
+
+ /* The size of the section in octets, as it will be output.
+ Contains a value even if the section has no contents (e.g., the
+ size of <<.bss>>). */
+ bfd_size_type size;
+
+ /* For input sections, the original size on disk of the section, in
+ octets. This field should be set for any section whose size is
+ changed by linker relaxation. It is required for sections where
+ the linker relaxation scheme doesn't cache altered section and
+ reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing
+ targets), and thus the original size needs to be kept to read the
+ section multiple times. For output sections, rawsize holds the
+ section size calculated on a previous linker relaxation pass. */
+ bfd_size_type rawsize;
+
+ /* Relaxation table. */
+ struct relax_table *relax;
+
+ /* Count of used relaxation table entries. */
+ int relax_count;
+
+
+ /* If this section is going to be output, then this value is the
+ offset in *bytes* into the output section of the first byte in the
+ input section (byte ==> smallest addressable unit on the
+ target). In most cases, if this was going to start at the
+ 100th octet (8-bit quantity) in the output section, this value
+ would be 100. However, if the target byte size is 16 bits
+ (bfd_octets_per_byte is "2"), this value would be 50. */
+ bfd_vma output_offset;
+
+ /* The output section through which to map on output. */
+ struct bfd_section *output_section;
+
+ /* The alignment requirement of the section, as an exponent of 2 -
+ e.g., 3 aligns to 2^3 (or 8). */
+ unsigned int alignment_power;
+
+ /* If an input section, a pointer to a vector of relocation
+ records for the data in this section. */
+ struct reloc_cache_entry *relocation;
+
+ /* If an output section, a pointer to a vector of pointers to
+ relocation records for the data in this section. */
+ struct reloc_cache_entry **orelocation;
+
+ /* The number of relocation records in one of the above. */
+ unsigned reloc_count;
+
+ /* Information below is back end specific - and not always used
+ or updated. */
+
+ /* File position of section data. */
+ file_ptr filepos;
+
+ /* File position of relocation info. */
+ file_ptr rel_filepos;
+
+ /* File position of line data. */
+ file_ptr line_filepos;
+
+ /* Pointer to data for applications. */
+ void *userdata;
+
+ /* If the SEC_IN_MEMORY flag is set, this points to the actual
+ contents. */
+ unsigned char *contents;
+
+ /* Attached line number information. */
+ alent *lineno;
+
+ /* Number of line number records. */
+ unsigned int lineno_count;
+
+ /* Entity size for merging purposes. */
+ unsigned int entsize;
+
+ /* Points to the kept section if this section is a link-once section,
+ and is discarded. */
+ struct bfd_section *kept_section;
+
+ /* When a section is being output, this value changes as more
+ linenumbers are written out. */
+ file_ptr moving_line_filepos;
+
+ /* What the section number is in the target world. */
+ int target_index;
+
+ void *used_by_bfd;
+
+ /* If this is a constructor section then here is a list of the
+ relocations created to relocate items within it. */
+ struct relent_chain *constructor_chain;
+
+ /* The BFD which owns the section. */
+ bfd *owner;
+
+ /* A symbol which points at this section only. */
+ struct bfd_symbol *symbol;
+ struct bfd_symbol **symbol_ptr_ptr;
+
+ /* Early in the link process, map_head and map_tail are used to build
+ a list of input sections attached to an output section. Later,
+ output sections use these fields for a list of bfd_link_order
+ structs. */
+ union {
+ struct bfd_link_order *link_order;
+ struct bfd_section *s;
+ } map_head, map_tail;
+} asection;
+
+/* Relax table contains information about instructions which can
+ be removed by relaxation -- replacing a long address with a
+ short address. */
+struct relax_table {
+ /* Address where bytes may be deleted. */
+ bfd_vma addr;
+
+ /* Number of bytes to be deleted. */
+ int size;
+};
+
+/* These sections are global, and are managed by BFD. The application
+ and target back end are not permitted to change the values in
+ these sections. New code should use the section_ptr macros rather
+ than referring directly to the const sections. The const sections
+ may eventually vanish. */
+#define BFD_ABS_SECTION_NAME "*ABS*"
+#define BFD_UND_SECTION_NAME "*UND*"
+#define BFD_COM_SECTION_NAME "*COM*"
+#define BFD_IND_SECTION_NAME "*IND*"
+
+/* The absolute section. */
+extern asection bfd_abs_section;
+#define bfd_abs_section_ptr ((asection *) &bfd_abs_section)
+#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr)
+/* Pointer to the undefined section. */
+extern asection bfd_und_section;
+#define bfd_und_section_ptr ((asection *) &bfd_und_section)
+#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr)
+/* Pointer to the common section. */
+extern asection bfd_com_section;
+#define bfd_com_section_ptr ((asection *) &bfd_com_section)
+/* Pointer to the indirect section. */
+extern asection bfd_ind_section;
+#define bfd_ind_section_ptr ((asection *) &bfd_ind_section)
+#define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr)
+
+#define bfd_is_const_section(SEC) \
+ ( ((SEC) == bfd_abs_section_ptr) \
+ || ((SEC) == bfd_und_section_ptr) \
+ || ((SEC) == bfd_com_section_ptr) \
+ || ((SEC) == bfd_ind_section_ptr))
+
+/* Macros to handle insertion and deletion of a bfd's sections. These
+ only handle the list pointers, ie. do not adjust section_count,
+ target_index etc. */
+#define bfd_section_list_remove(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ asection *_next = _s->next; \
+ asection *_prev = _s->prev; \
+ if (_prev) \
+ _prev->next = _next; \
+ else \
+ (ABFD)->sections = _next; \
+ if (_next) \
+ _next->prev = _prev; \
+ else \
+ (ABFD)->section_last = _prev; \
+ } \
+ while (0)
+#define bfd_section_list_append(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ bfd *_abfd = ABFD; \
+ _s->next = NULL; \
+ if (_abfd->section_last) \
+ { \
+ _s->prev = _abfd->section_last; \
+ _abfd->section_last->next = _s; \
+ } \
+ else \
+ { \
+ _s->prev = NULL; \
+ _abfd->sections = _s; \
+ } \
+ _abfd->section_last = _s; \
+ } \
+ while (0)
+#define bfd_section_list_prepend(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ bfd *_abfd = ABFD; \
+ _s->prev = NULL; \
+ if (_abfd->sections) \
+ { \
+ _s->next = _abfd->sections; \
+ _abfd->sections->prev = _s; \
+ } \
+ else \
+ { \
+ _s->next = NULL; \
+ _abfd->section_last = _s; \
+ } \
+ _abfd->sections = _s; \
+ } \
+ while (0)
+#define bfd_section_list_insert_after(ABFD, A, S) \
+ do \
+ { \
+ asection *_a = A; \
+ asection *_s = S; \
+ asection *_next = _a->next; \
+ _s->next = _next; \
+ _s->prev = _a; \
+ _a->next = _s; \
+ if (_next) \
+ _next->prev = _s; \
+ else \
+ (ABFD)->section_last = _s; \
+ } \
+ while (0)
+#define bfd_section_list_insert_before(ABFD, B, S) \
+ do \
+ { \
+ asection *_b = B; \
+ asection *_s = S; \
+ asection *_prev = _b->prev; \
+ _s->prev = _prev; \
+ _s->next = _b; \
+ _b->prev = _s; \
+ if (_prev) \
+ _prev->next = _s; \
+ else \
+ (ABFD)->sections = _s; \
+ } \
+ while (0)
+#define bfd_section_removed_from_list(ABFD, S) \
+ ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
+
+#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \
+ /* name, id, index, next, prev, flags, user_set_vma, */ \
+ { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \
+ \
+ /* linker_mark, linker_has_input, gc_mark, */ \
+ 0, 0, 1, \
+ \
+ /* segment_mark, sec_info_type, use_rela_p, has_tls_reloc, */ \
+ 0, 0, 0, 0, \
+ \
+ /* has_tls_get_addr_call, has_gp_reloc, need_finalize_relax, */ \
+ 0, 0, 0, \
+ \
+ /* reloc_done, vma, lma, size, rawsize, relax, relax_count, */ \
+ 0, 0, 0, 0, 0, 0, 0, \
+ \
+ /* output_offset, output_section, alignment_power, */ \
+ 0, (struct bfd_section *) &SEC, 0, \
+ \
+ /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
+ NULL, NULL, 0, 0, 0, \
+ \
+ /* line_filepos, userdata, contents, lineno, lineno_count, */ \
+ 0, NULL, NULL, NULL, 0, \
+ \
+ /* entsize, kept_section, moving_line_filepos, */ \
+ 0, NULL, 0, \
+ \
+ /* target_index, used_by_bfd, constructor_chain, owner, */ \
+ 0, NULL, NULL, NULL, \
+ \
+ /* symbol, symbol_ptr_ptr, */ \
+ (struct bfd_symbol *) SYM, &SEC.symbol, \
+ \
+ /* map_head, map_tail */ \
+ { NULL }, { NULL } \
+ }
+
+void bfd_section_list_clear (bfd *);
+
+asection *bfd_get_section_by_name (bfd *abfd, const char *name);
+
+asection *bfd_get_section_by_name_if
+ (bfd *abfd,
+ const char *name,
+ bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+char *bfd_get_unique_section_name
+ (bfd *abfd, const char *templat, int *count);
+
+asection *bfd_make_section_old_way (bfd *abfd, const char *name);
+
+asection *bfd_make_section_anyway_with_flags
+ (bfd *abfd, const char *name, flagword flags);
+
+asection *bfd_make_section_anyway (bfd *abfd, const char *name);
+
+asection *bfd_make_section_with_flags
+ (bfd *, const char *name, flagword flags);
+
+asection *bfd_make_section (bfd *, const char *name);
+
+bfd_boolean bfd_set_section_flags
+ (bfd *abfd, asection *sec, flagword flags);
+
+void bfd_map_over_sections
+ (bfd *abfd,
+ void (*func) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+asection *bfd_sections_find_if
+ (bfd *abfd,
+ bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+bfd_boolean bfd_set_section_size
+ (bfd *abfd, asection *sec, bfd_size_type val);
+
+bfd_boolean bfd_set_section_contents
+ (bfd *abfd, asection *section, const void *data,
+ file_ptr offset, bfd_size_type count);
+
+bfd_boolean bfd_get_section_contents
+ (bfd *abfd, asection *section, void *location, file_ptr offset,
+ bfd_size_type count);
+
+bfd_boolean bfd_malloc_and_get_section
+ (bfd *abfd, asection *section, bfd_byte **buf);
+
+bfd_boolean bfd_copy_private_section_data
+ (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
+
+#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
+ BFD_SEND (obfd, _bfd_copy_private_section_data, \
+ (ibfd, isection, obfd, osection))
+bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec);
+
+bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
+
+/* Extracted from archures.c. */
+enum bfd_architecture
+{
+ bfd_arch_unknown, /* File arch not known. */
+ bfd_arch_obscure, /* Arch known, not one of these. */
+ bfd_arch_m68k, /* Motorola 68xxx */
+#define bfd_mach_m68000 1
+#define bfd_mach_m68008 2
+#define bfd_mach_m68010 3
+#define bfd_mach_m68020 4
+#define bfd_mach_m68030 5
+#define bfd_mach_m68040 6
+#define bfd_mach_m68060 7
+#define bfd_mach_cpu32 8
+#define bfd_mach_fido 9
+#define bfd_mach_mcf_isa_a_nodiv 10
+#define bfd_mach_mcf_isa_a 11
+#define bfd_mach_mcf_isa_a_mac 12
+#define bfd_mach_mcf_isa_a_emac 13
+#define bfd_mach_mcf_isa_aplus 14
+#define bfd_mach_mcf_isa_aplus_mac 15
+#define bfd_mach_mcf_isa_aplus_emac 16
+#define bfd_mach_mcf_isa_b_nousp 17
+#define bfd_mach_mcf_isa_b_nousp_mac 18
+#define bfd_mach_mcf_isa_b_nousp_emac 19
+#define bfd_mach_mcf_isa_b 20
+#define bfd_mach_mcf_isa_b_mac 21
+#define bfd_mach_mcf_isa_b_emac 22
+#define bfd_mach_mcf_isa_b_float 23
+#define bfd_mach_mcf_isa_b_float_mac 24
+#define bfd_mach_mcf_isa_b_float_emac 25
+#define bfd_mach_mcf_isa_c 26
+#define bfd_mach_mcf_isa_c_mac 27
+#define bfd_mach_mcf_isa_c_emac 28
+#define bfd_mach_mcf_isa_c_nodiv 29
+#define bfd_mach_mcf_isa_c_nodiv_mac 30
+#define bfd_mach_mcf_isa_c_nodiv_emac 31
+ bfd_arch_vax, /* DEC Vax */
+ bfd_arch_i960, /* Intel 960 */
+ /* The order of the following is important.
+ lower number indicates a machine type that
+ only accepts a subset of the instructions
+ available to machines with higher numbers.
+ The exception is the "ca", which is
+ incompatible with all other machines except
+ "core". */
+
+#define bfd_mach_i960_core 1
+#define bfd_mach_i960_ka_sa 2
+#define bfd_mach_i960_kb_sb 3
+#define bfd_mach_i960_mc 4
+#define bfd_mach_i960_xa 5
+#define bfd_mach_i960_ca 6
+#define bfd_mach_i960_jx 7
+#define bfd_mach_i960_hx 8
+
+ bfd_arch_or32, /* OpenRISC 32 */
+
+ bfd_arch_sparc, /* SPARC */
+#define bfd_mach_sparc 1
+/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
+#define bfd_mach_sparc_sparclet 2
+#define bfd_mach_sparc_sparclite 3
+#define bfd_mach_sparc_v8plus 4
+#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
+#define bfd_mach_sparc_sparclite_le 6
+#define bfd_mach_sparc_v9 7
+#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
+#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
+#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
+/* Nonzero if MACH has the v9 instruction set. */
+#define bfd_mach_sparc_v9_p(mach) \
+ ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+ && (mach) != bfd_mach_sparc_sparclite_le)
+/* Nonzero if MACH is a 64 bit sparc architecture. */
+#define bfd_mach_sparc_64bit_p(mach) \
+ ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+ bfd_arch_spu, /* PowerPC SPU */
+#define bfd_mach_spu 256
+ bfd_arch_mips, /* MIPS Rxxxx */
+#define bfd_mach_mips3000 3000
+#define bfd_mach_mips3900 3900
+#define bfd_mach_mips4000 4000
+#define bfd_mach_mips4010 4010
+#define bfd_mach_mips4100 4100
+#define bfd_mach_mips4111 4111
+#define bfd_mach_mips4120 4120
+#define bfd_mach_mips4300 4300
+#define bfd_mach_mips4400 4400
+#define bfd_mach_mips4600 4600
+#define bfd_mach_mips4650 4650
+#define bfd_mach_mips5000 5000
+#define bfd_mach_mips5400 5400
+#define bfd_mach_mips5500 5500
+#define bfd_mach_mips6000 6000
+#define bfd_mach_mips7000 7000
+#define bfd_mach_mips8000 8000
+#define bfd_mach_mips9000 9000
+#define bfd_mach_mips10000 10000
+#define bfd_mach_mips12000 12000
+#define bfd_mach_mips14000 14000
+#define bfd_mach_mips16000 16000
+#define bfd_mach_mips16 16
+#define bfd_mach_mips5 5
+#define bfd_mach_mips_loongson_2e 3001
+#define bfd_mach_mips_loongson_2f 3002
+#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
+#define bfd_mach_mips_octeon 6501
+#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
+#define bfd_mach_mipsisa32 32
+#define bfd_mach_mipsisa32r2 33
+#define bfd_mach_mipsisa64 64
+#define bfd_mach_mipsisa64r2 65
+ bfd_arch_i386, /* Intel 386 */
+#define bfd_mach_i386_i386 1
+#define bfd_mach_i386_i8086 2
+#define bfd_mach_i386_i386_intel_syntax 3
+#define bfd_mach_x86_64 64
+#define bfd_mach_x86_64_intel_syntax 65
+ bfd_arch_l1om, /* Intel L1OM */
+#define bfd_mach_l1om 66
+#define bfd_mach_l1om_intel_syntax 67
+ bfd_arch_we32k, /* AT&T WE32xxx */
+ bfd_arch_tahoe, /* CCI/Harris Tahoe */
+ bfd_arch_i860, /* Intel 860 */
+ bfd_arch_i370, /* IBM 360/370 Mainframes */
+ bfd_arch_romp, /* IBM ROMP PC/RT */
+ bfd_arch_convex, /* Convex */
+ bfd_arch_m88k, /* Motorola 88xxx */
+ bfd_arch_m98k, /* Motorola 98xxx */
+ bfd_arch_pyramid, /* Pyramid Technology */
+ bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */
+#define bfd_mach_h8300 1
+#define bfd_mach_h8300h 2
+#define bfd_mach_h8300s 3
+#define bfd_mach_h8300hn 4
+#define bfd_mach_h8300sn 5
+#define bfd_mach_h8300sx 6
+#define bfd_mach_h8300sxn 7
+ bfd_arch_pdp11, /* DEC PDP-11 */
+ bfd_arch_plugin,
+ bfd_arch_powerpc, /* PowerPC */
+#define bfd_mach_ppc 32
+#define bfd_mach_ppc64 64
+#define bfd_mach_ppc_403 403
+#define bfd_mach_ppc_403gc 4030
+#define bfd_mach_ppc_405 405
+#define bfd_mach_ppc_505 505
+#define bfd_mach_ppc_601 601
+#define bfd_mach_ppc_602 602
+#define bfd_mach_ppc_603 603
+#define bfd_mach_ppc_ec603e 6031
+#define bfd_mach_ppc_604 604
+#define bfd_mach_ppc_620 620
+#define bfd_mach_ppc_630 630
+#define bfd_mach_ppc_750 750
+#define bfd_mach_ppc_860 860
+#define bfd_mach_ppc_a35 35
+#define bfd_mach_ppc_rs64ii 642
+#define bfd_mach_ppc_rs64iii 643
+#define bfd_mach_ppc_7400 7400
+#define bfd_mach_ppc_e500 500
+#define bfd_mach_ppc_e500mc 5001
+ bfd_arch_rs6000, /* IBM RS/6000 */
+#define bfd_mach_rs6k 6000
+#define bfd_mach_rs6k_rs1 6001
+#define bfd_mach_rs6k_rsc 6003
+#define bfd_mach_rs6k_rs2 6002
+ bfd_arch_hppa, /* HP PA RISC */
+#define bfd_mach_hppa10 10
+#define bfd_mach_hppa11 11
+#define bfd_mach_hppa20 20
+#define bfd_mach_hppa20w 25
+ bfd_arch_d10v, /* Mitsubishi D10V */
+#define bfd_mach_d10v 1
+#define bfd_mach_d10v_ts2 2
+#define bfd_mach_d10v_ts3 3
+ bfd_arch_d30v, /* Mitsubishi D30V */
+ bfd_arch_dlx, /* DLX */
+ bfd_arch_m68hc11, /* Motorola 68HC11 */
+ bfd_arch_m68hc12, /* Motorola 68HC12 */
+#define bfd_mach_m6812_default 0
+#define bfd_mach_m6812 1
+#define bfd_mach_m6812s 2
+ bfd_arch_z8k, /* Zilog Z8000 */
+#define bfd_mach_z8001 1
+#define bfd_mach_z8002 2
+ bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */
+ bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */
+#define bfd_mach_sh 1
+#define bfd_mach_sh2 0x20
+#define bfd_mach_sh_dsp 0x2d
+#define bfd_mach_sh2a 0x2a
+#define bfd_mach_sh2a_nofpu 0x2b
+#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
+#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
+#define bfd_mach_sh2a_or_sh4 0x2a3
+#define bfd_mach_sh2a_or_sh3e 0x2a4
+#define bfd_mach_sh2e 0x2e
+#define bfd_mach_sh3 0x30
+#define bfd_mach_sh3_nommu 0x31
+#define bfd_mach_sh3_dsp 0x3d
+#define bfd_mach_sh3e 0x3e
+#define bfd_mach_sh4 0x40
+#define bfd_mach_sh4_nofpu 0x41
+#define bfd_mach_sh4_nommu_nofpu 0x42
+#define bfd_mach_sh4a 0x4a
+#define bfd_mach_sh4a_nofpu 0x4b
+#define bfd_mach_sh4al_dsp 0x4d
+#define bfd_mach_sh5 0x50
+ bfd_arch_alpha, /* Dec Alpha */
+#define bfd_mach_alpha_ev4 0x10
+#define bfd_mach_alpha_ev5 0x20
+#define bfd_mach_alpha_ev6 0x30
+ bfd_arch_arm, /* Advanced Risc Machines ARM. */
+#define bfd_mach_arm_unknown 0
+#define bfd_mach_arm_2 1
+#define bfd_mach_arm_2a 2
+#define bfd_mach_arm_3 3
+#define bfd_mach_arm_3M 4
+#define bfd_mach_arm_4 5
+#define bfd_mach_arm_4T 6
+#define bfd_mach_arm_5 7
+#define bfd_mach_arm_5T 8
+#define bfd_mach_arm_5TE 9
+#define bfd_mach_arm_XScale 10
+#define bfd_mach_arm_ep9312 11
+#define bfd_mach_arm_iWMMXt 12
+#define bfd_mach_arm_iWMMXt2 13
+ bfd_arch_ns32k, /* National Semiconductors ns32000 */
+ bfd_arch_w65, /* WDC 65816 */
+ bfd_arch_tic30, /* Texas Instruments TMS320C30 */
+ bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */
+#define bfd_mach_tic3x 30
+#define bfd_mach_tic4x 40
+ bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
+ bfd_arch_tic80, /* TI TMS320c80 (MVP) */
+ bfd_arch_v850, /* NEC V850 */
+#define bfd_mach_v850 1
+#define bfd_mach_v850e 'E'
+#define bfd_mach_v850e1 '1'
+ bfd_arch_arc, /* ARC Cores */
+#define bfd_mach_arc_5 5
+#define bfd_mach_arc_6 6
+#define bfd_mach_arc_7 7
+#define bfd_mach_arc_8 8
+ bfd_arch_m32c, /* Renesas M16C/M32C. */
+#define bfd_mach_m16c 0x75
+#define bfd_mach_m32c 0x78
+ bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */
+#define bfd_mach_m32r 1 /* For backwards compatibility. */
+#define bfd_mach_m32rx 'x'
+#define bfd_mach_m32r2 '2'
+ bfd_arch_mn10200, /* Matsushita MN10200 */
+ bfd_arch_mn10300, /* Matsushita MN10300 */
+#define bfd_mach_mn10300 300
+#define bfd_mach_am33 330
+#define bfd_mach_am33_2 332
+ bfd_arch_fr30,
+#define bfd_mach_fr30 0x46523330
+ bfd_arch_frv,
+#define bfd_mach_frv 1
+#define bfd_mach_frvsimple 2
+#define bfd_mach_fr300 300
+#define bfd_mach_fr400 400
+#define bfd_mach_fr450 450
+#define bfd_mach_frvtomcat 499 /* fr500 prototype */
+#define bfd_mach_fr500 500
+#define bfd_mach_fr550 550
+ bfd_arch_moxie, /* The moxie processor */
+#define bfd_mach_moxie 1
+ bfd_arch_mcore,
+ bfd_arch_mep,
+#define bfd_mach_mep 1
+#define bfd_mach_mep_h1 0x6831
+#define bfd_mach_mep_c5 0x6335
+ bfd_arch_ia64, /* HP/Intel ia64 */
+#define bfd_mach_ia64_elf64 64
+#define bfd_mach_ia64_elf32 32
+ bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
+#define bfd_mach_ip2022 1
+#define bfd_mach_ip2022ext 2
+ bfd_arch_iq2000, /* Vitesse IQ2000. */
+#define bfd_mach_iq2000 1
+#define bfd_mach_iq10 2
+ bfd_arch_mt,
+#define bfd_mach_ms1 1
+#define bfd_mach_mrisc2 2
+#define bfd_mach_ms2 3
+ bfd_arch_pj,
+ bfd_arch_avr, /* Atmel AVR microcontrollers. */
+#define bfd_mach_avr1 1
+#define bfd_mach_avr2 2
+#define bfd_mach_avr25 25
+#define bfd_mach_avr3 3
+#define bfd_mach_avr31 31
+#define bfd_mach_avr35 35
+#define bfd_mach_avr4 4
+#define bfd_mach_avr5 5
+#define bfd_mach_avr51 51
+#define bfd_mach_avr6 6
+ bfd_arch_bfin, /* ADI Blackfin */
+#define bfd_mach_bfin 1
+ bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
+#define bfd_mach_cr16 1
+ bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
+#define bfd_mach_cr16c 1
+ bfd_arch_crx, /* National Semiconductor CRX. */
+#define bfd_mach_crx 1
+ bfd_arch_cris, /* Axis CRIS */
+#define bfd_mach_cris_v0_v10 255
+#define bfd_mach_cris_v32 32
+#define bfd_mach_cris_v10_v32 1032
+ bfd_arch_s390, /* IBM s390 */
+#define bfd_mach_s390_31 31
+#define bfd_mach_s390_64 64
+ bfd_arch_score, /* Sunplus score */
+#define bfd_mach_score3 3
+#define bfd_mach_score7 7
+ bfd_arch_openrisc, /* OpenRISC */
+ bfd_arch_mmix, /* Donald Knuth's educational processor. */
+ bfd_arch_xstormy16,
+#define bfd_mach_xstormy16 1
+ bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
+#define bfd_mach_msp11 11
+#define bfd_mach_msp110 110
+#define bfd_mach_msp12 12
+#define bfd_mach_msp13 13
+#define bfd_mach_msp14 14
+#define bfd_mach_msp15 15
+#define bfd_mach_msp16 16
+#define bfd_mach_msp21 21
+#define bfd_mach_msp31 31
+#define bfd_mach_msp32 32
+#define bfd_mach_msp33 33
+#define bfd_mach_msp41 41
+#define bfd_mach_msp42 42
+#define bfd_mach_msp43 43
+#define bfd_mach_msp44 44
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+#define bfd_mach_xc16x 1
+#define bfd_mach_xc16xl 2
+#define bfd_mach_xc16xs 3
+ bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
+#define bfd_mach_xtensa 1
+ bfd_arch_maxq, /* Dallas MAXQ 10/20 */
+#define bfd_mach_maxq10 10
+#define bfd_mach_maxq20 20
+ bfd_arch_z80,
+#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
+#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
+#define bfd_mach_z80full 7 /* All undocumented instructions. */
+#define bfd_mach_r800 11 /* R800: successor with multiplication. */
+ bfd_arch_lm32, /* Lattice Mico32 */
+#define bfd_mach_lm32 1
+ bfd_arch_microblaze,/* Xilinx MicroBlaze. */
+ bfd_arch_last
+ };
+
+typedef struct bfd_arch_info
+{
+ int bits_per_word;
+ int bits_per_address;
+ int bits_per_byte;
+ enum bfd_architecture arch;
+ unsigned long mach;
+ const char *arch_name;
+ const char *printable_name;
+ unsigned int section_align_power;
+ /* TRUE if this is the default machine for the architecture.
+ The default arch should be the first entry for an arch so that
+ all the entries for that arch can be accessed via <<next>>. */
+ bfd_boolean the_default;
+ const struct bfd_arch_info * (*compatible)
+ (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
+
+ bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
+
+ const struct bfd_arch_info *next;
+}
+bfd_arch_info_type;
+
+const char *bfd_printable_name (bfd *abfd);
+
+const bfd_arch_info_type *bfd_scan_arch (const char *string);
+
+const char **bfd_arch_list (void);
+
+const bfd_arch_info_type *bfd_arch_get_compatible
+ (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
+
+void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
+
+enum bfd_architecture bfd_get_arch (bfd *abfd);
+
+unsigned long bfd_get_mach (bfd *abfd);
+
+unsigned int bfd_arch_bits_per_byte (bfd *abfd);
+
+unsigned int bfd_arch_bits_per_address (bfd *abfd);
+
+const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
+
+const bfd_arch_info_type *bfd_lookup_arch
+ (enum bfd_architecture arch, unsigned long machine);
+
+const char *bfd_printable_arch_mach
+ (enum bfd_architecture arch, unsigned long machine);
+
+unsigned int bfd_octets_per_byte (bfd *abfd);
+
+unsigned int bfd_arch_mach_octets_per_byte
+ (enum bfd_architecture arch, unsigned long machine);
+
+/* Extracted from reloc.c. */
+typedef enum bfd_reloc_status
+{
+ /* No errors detected. */
+ bfd_reloc_ok,
+
+ /* The relocation was performed, but there was an overflow. */
+ bfd_reloc_overflow,
+
+ /* The address to relocate was not within the section supplied. */
+ bfd_reloc_outofrange,
+
+ /* Used by special functions. */
+ bfd_reloc_continue,
+
+ /* Unsupported relocation size requested. */
+ bfd_reloc_notsupported,
+
+ /* Unused. */
+ bfd_reloc_other,
+
+ /* The symbol to relocate against was undefined. */
+ bfd_reloc_undefined,
+
+ /* The relocation was performed, but may not be ok - presently
+ generated only when linking i960 coff files with i960 b.out
+ symbols. If this type is returned, the error_message argument
+ to bfd_perform_relocation will be set. */
+ bfd_reloc_dangerous
+ }
+ bfd_reloc_status_type;
+
+
+typedef struct reloc_cache_entry
+{
+ /* A pointer into the canonical table of pointers. */
+ struct bfd_symbol **sym_ptr_ptr;
+
+ /* offset in section. */
+ bfd_size_type address;
+
+ /* addend for relocation value. */
+ bfd_vma addend;
+
+ /* Pointer to how to perform the required relocation. */
+ reloc_howto_type *howto;
+
+}
+arelent;
+
+enum complain_overflow
+{
+ /* Do not complain on overflow. */
+ complain_overflow_dont,
+
+ /* Complain if the value overflows when considered as a signed
+ number one bit larger than the field. ie. A bitfield of N bits
+ is allowed to represent -2**n to 2**n-1. */
+ complain_overflow_bitfield,
+
+ /* Complain if the value overflows when considered as a signed
+ number. */
+ complain_overflow_signed,
+
+ /* Complain if the value overflows when considered as an
+ unsigned number. */
+ complain_overflow_unsigned
+};
+
+struct reloc_howto_struct
+{
+ /* The type field has mainly a documentary use - the back end can
+ do what it wants with it, though normally the back end's
+ external idea of what a reloc number is stored
+ in this field. For example, a PC relative word relocation
+ in a coff environment has the type 023 - because that's
+ what the outside world calls a R_PCRWORD reloc. */
+ unsigned int type;
+
+ /* The value the final relocation is shifted right by. This drops
+ unwanted data from the relocation. */
+ unsigned int rightshift;
+
+ /* The size of the item to be relocated. This is *not* a
+ power-of-two measure. To get the number of bytes operated
+ on by a type of relocation, use bfd_get_reloc_size. */
+ int size;
+
+ /* The number of bits in the item to be relocated. This is used
+ when doing overflow checking. */
+ unsigned int bitsize;
+
+ /* Notes that the relocation is relative to the location in the
+ data section of the addend. The relocation function will
+ subtract from the relocation value the address of the location
+ being relocated. */
+ bfd_boolean pc_relative;
+
+ /* The bit position of the reloc value in the destination.
+ The relocated value is left shifted by this amount. */
+ unsigned int bitpos;
+
+ /* What type of overflow error should be checked for when
+ relocating. */
+ enum complain_overflow complain_on_overflow;
+
+ /* If this field is non null, then the supplied function is
+ called rather than the normal function. This allows really
+ strange relocation methods to be accommodated (e.g., i960 callj
+ instructions). */
+ bfd_reloc_status_type (*special_function)
+ (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
+ bfd *, char **);
+
+ /* The textual name of the relocation type. */
+ char *name;
+
+ /* Some formats record a relocation addend in the section contents
+ rather than with the relocation. For ELF formats this is the
+ distinction between USE_REL and USE_RELA (though the code checks
+ for USE_REL == 1/0). The value of this field is TRUE if the
+ addend is recorded with the section contents; when performing a
+ partial link (ld -r) the section contents (the data) will be
+ modified. The value of this field is FALSE if addends are
+ recorded with the relocation (in arelent.addend); when performing
+ a partial link the relocation will be modified.
+ All relocations for all ELF USE_RELA targets should set this field
+ to FALSE (values of TRUE should be looked on with suspicion).
+ However, the converse is not true: not all relocations of all ELF
+ USE_REL targets set this field to TRUE. Why this is so is peculiar
+ to each particular target. For relocs that aren't used in partial
+ links (e.g. GOT stuff) it doesn't matter what this is set to. */
+ bfd_boolean partial_inplace;
+
+ /* src_mask selects the part of the instruction (or data) to be used
+ in the relocation sum. If the target relocations don't have an
+ addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
+ dst_mask to extract the addend from the section contents. If
+ relocations do have an addend in the reloc, eg. ELF USE_RELA, this
+ field should be zero. Non-zero values for ELF USE_RELA targets are
+ bogus as in those cases the value in the dst_mask part of the
+ section contents should be treated as garbage. */
+ bfd_vma src_mask;
+
+ /* dst_mask selects which parts of the instruction (or data) are
+ replaced with a relocated value. */
+ bfd_vma dst_mask;
+
+ /* When some formats create PC relative instructions, they leave
+ the value of the pc of the place being relocated in the offset
+ slot of the instruction, so that a PC relative relocation can
+ be made just by adding in an ordinary offset (e.g., sun3 a.out).
+ Some formats leave the displacement part of an instruction
+ empty (e.g., m88k bcs); this flag signals the fact. */
+ bfd_boolean pcrel_offset;
+};
+
+#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
+ { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
+#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
+ HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
+ NAME, FALSE, 0, 0, IN)
+
+#define EMPTY_HOWTO(C) \
+ HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
+ NULL, FALSE, 0, 0, FALSE)
+
+#define HOWTO_PREPARE(relocation, symbol) \
+ { \
+ if (symbol != NULL) \
+ { \
+ if (bfd_is_com_section (symbol->section)) \
+ { \
+ relocation = 0; \
+ } \
+ else \
+ { \
+ relocation = symbol->value; \
+ } \
+ } \
+ }
+
+unsigned int bfd_get_reloc_size (reloc_howto_type *);
+
+typedef struct relent_chain
+{
+ arelent relent;
+ struct relent_chain *next;
+}
+arelent_chain;
+
+bfd_reloc_status_type bfd_check_overflow
+ (enum complain_overflow how,
+ unsigned int bitsize,
+ unsigned int rightshift,
+ unsigned int addrsize,
+ bfd_vma relocation);
+
+bfd_reloc_status_type bfd_perform_relocation
+ (bfd *abfd,
+ arelent *reloc_entry,
+ void *data,
+ asection *input_section,
+ bfd *output_bfd,
+ char **error_message);
+
+bfd_reloc_status_type bfd_install_relocation
+ (bfd *abfd,
+ arelent *reloc_entry,
+ void *data, bfd_vma data_start,
+ asection *input_section,
+ char **error_message);
+
+enum bfd_reloc_code_real {
+ _dummy_first_bfd_reloc_code_real,
+
+
+/* Basic absolute relocations of N bits. */
+ BFD_RELOC_64,
+ BFD_RELOC_32,
+ BFD_RELOC_26,
+ BFD_RELOC_24,
+ BFD_RELOC_16,
+ BFD_RELOC_14,
+ BFD_RELOC_8,
+
+/* PC-relative relocations. Sometimes these are relative to the address
+of the relocation itself; sometimes they are relative to the start of
+the section containing the relocation. It depends on the specific target.
+
+The 24-bit relocation is used in some Intel 960 configurations. */
+ BFD_RELOC_64_PCREL,
+ BFD_RELOC_32_PCREL,
+ BFD_RELOC_24_PCREL,
+ BFD_RELOC_16_PCREL,
+ BFD_RELOC_12_PCREL,
+ BFD_RELOC_8_PCREL,
+
+/* Section relative relocations. Some targets need this for DWARF2. */
+ BFD_RELOC_32_SECREL,
+
+/* For ELF. */
+ BFD_RELOC_32_GOT_PCREL,
+ BFD_RELOC_16_GOT_PCREL,
+ BFD_RELOC_8_GOT_PCREL,
+ BFD_RELOC_32_GOTOFF,
+ BFD_RELOC_16_GOTOFF,
+ BFD_RELOC_LO16_GOTOFF,
+ BFD_RELOC_HI16_GOTOFF,
+ BFD_RELOC_HI16_S_GOTOFF,
+ BFD_RELOC_8_GOTOFF,
+ BFD_RELOC_64_PLT_PCREL,
+ BFD_RELOC_32_PLT_PCREL,
+ BFD_RELOC_24_PLT_PCREL,
+ BFD_RELOC_16_PLT_PCREL,
+ BFD_RELOC_8_PLT_PCREL,
+ BFD_RELOC_64_PLTOFF,
+ BFD_RELOC_32_PLTOFF,
+ BFD_RELOC_16_PLTOFF,
+ BFD_RELOC_LO16_PLTOFF,
+ BFD_RELOC_HI16_PLTOFF,
+ BFD_RELOC_HI16_S_PLTOFF,
+ BFD_RELOC_8_PLTOFF,
+
+/* Relocations used by 68K ELF. */
+ BFD_RELOC_68K_GLOB_DAT,
+ BFD_RELOC_68K_JMP_SLOT,
+ BFD_RELOC_68K_RELATIVE,
+ BFD_RELOC_68K_TLS_GD32,
+ BFD_RELOC_68K_TLS_GD16,
+ BFD_RELOC_68K_TLS_GD8,
+ BFD_RELOC_68K_TLS_LDM32,
+ BFD_RELOC_68K_TLS_LDM16,
+ BFD_RELOC_68K_TLS_LDM8,
+ BFD_RELOC_68K_TLS_LDO32,
+ BFD_RELOC_68K_TLS_LDO16,
+ BFD_RELOC_68K_TLS_LDO8,
+ BFD_RELOC_68K_TLS_IE32,
+ BFD_RELOC_68K_TLS_IE16,
+ BFD_RELOC_68K_TLS_IE8,
+ BFD_RELOC_68K_TLS_LE32,
+ BFD_RELOC_68K_TLS_LE16,
+ BFD_RELOC_68K_TLS_LE8,
+
+/* Linkage-table relative. */
+ BFD_RELOC_32_BASEREL,
+ BFD_RELOC_16_BASEREL,
+ BFD_RELOC_LO16_BASEREL,
+ BFD_RELOC_HI16_BASEREL,
+ BFD_RELOC_HI16_S_BASEREL,
+ BFD_RELOC_8_BASEREL,
+ BFD_RELOC_RVA,
+
+/* Absolute 8-bit relocation, but used to form an address like 0xFFnn. */
+ BFD_RELOC_8_FFnn,
+
+/* These PC-relative relocations are stored as word displacements --
+i.e., byte displacements shifted right two bits. The 30-bit word
+displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
+SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
+signed 16-bit displacement is used on the MIPS, and the 23-bit
+displacement is used on the Alpha. */
+ BFD_RELOC_32_PCREL_S2,
+ BFD_RELOC_16_PCREL_S2,
+ BFD_RELOC_23_PCREL_S2,
+
+/* High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
+the target word. These are used on the SPARC. */
+ BFD_RELOC_HI22,
+ BFD_RELOC_LO10,
+
+/* For systems that allocate a Global Pointer register, these are
+displacements off that register. These relocation types are
+handled specially, because the value the register will have is
+decided relatively late. */
+ BFD_RELOC_GPREL16,
+ BFD_RELOC_GPREL32,
+
+/* Reloc types used for i960/b.out. */
+ BFD_RELOC_I960_CALLJ,
+
+/* SPARC ELF relocations. There is probably some overlap with other
+relocation types already defined. */
+ BFD_RELOC_NONE,
+ BFD_RELOC_SPARC_WDISP22,
+ BFD_RELOC_SPARC22,
+ BFD_RELOC_SPARC13,
+ BFD_RELOC_SPARC_GOT10,
+ BFD_RELOC_SPARC_GOT13,
+ BFD_RELOC_SPARC_GOT22,
+ BFD_RELOC_SPARC_PC10,
+ BFD_RELOC_SPARC_PC22,
+ BFD_RELOC_SPARC_WPLT30,
+ BFD_RELOC_SPARC_COPY,
+ BFD_RELOC_SPARC_GLOB_DAT,
+ BFD_RELOC_SPARC_JMP_SLOT,
+ BFD_RELOC_SPARC_RELATIVE,
+ BFD_RELOC_SPARC_UA16,
+ BFD_RELOC_SPARC_UA32,
+ BFD_RELOC_SPARC_UA64,
+ BFD_RELOC_SPARC_GOTDATA_HIX22,
+ BFD_RELOC_SPARC_GOTDATA_LOX10,
+ BFD_RELOC_SPARC_GOTDATA_OP_HIX22,
+ BFD_RELOC_SPARC_GOTDATA_OP_LOX10,
+ BFD_RELOC_SPARC_GOTDATA_OP,
+
+/* I think these are specific to SPARC a.out (e.g., Sun 4). */
+ BFD_RELOC_SPARC_BASE13,
+ BFD_RELOC_SPARC_BASE22,
+
+/* SPARC64 relocations */
+#define BFD_RELOC_SPARC_64 BFD_RELOC_64
+ BFD_RELOC_SPARC_10,
+ BFD_RELOC_SPARC_11,
+ BFD_RELOC_SPARC_OLO10,
+ BFD_RELOC_SPARC_HH22,
+ BFD_RELOC_SPARC_HM10,
+ BFD_RELOC_SPARC_LM22,
+ BFD_RELOC_SPARC_PC_HH22,
+ BFD_RELOC_SPARC_PC_HM10,
+ BFD_RELOC_SPARC_PC_LM22,
+ BFD_RELOC_SPARC_WDISP16,
+ BFD_RELOC_SPARC_WDISP19,
+ BFD_RELOC_SPARC_7,
+ BFD_RELOC_SPARC_6,
+ BFD_RELOC_SPARC_5,
+#define BFD_RELOC_SPARC_DISP64 BFD_RELOC_64_PCREL
+ BFD_RELOC_SPARC_PLT32,
+ BFD_RELOC_SPARC_PLT64,
+ BFD_RELOC_SPARC_HIX22,
+ BFD_RELOC_SPARC_LOX10,
+ BFD_RELOC_SPARC_H44,
+ BFD_RELOC_SPARC_M44,
+ BFD_RELOC_SPARC_L44,
+ BFD_RELOC_SPARC_REGISTER,
+
+/* SPARC little endian relocation */
+ BFD_RELOC_SPARC_REV32,
+
+/* SPARC TLS relocations */
+ BFD_RELOC_SPARC_TLS_GD_HI22,
+ BFD_RELOC_SPARC_TLS_GD_LO10,
+ BFD_RELOC_SPARC_TLS_GD_ADD,
+ BFD_RELOC_SPARC_TLS_GD_CALL,
+ BFD_RELOC_SPARC_TLS_LDM_HI22,
+ BFD_RELOC_SPARC_TLS_LDM_LO10,
+ BFD_RELOC_SPARC_TLS_LDM_ADD,
+ BFD_RELOC_SPARC_TLS_LDM_CALL,
+ BFD_RELOC_SPARC_TLS_LDO_HIX22,
+ BFD_RELOC_SPARC_TLS_LDO_LOX10,
+ BFD_RELOC_SPARC_TLS_LDO_ADD,
+ BFD_RELOC_SPARC_TLS_IE_HI22,
+ BFD_RELOC_SPARC_TLS_IE_LO10,
+ BFD_RELOC_SPARC_TLS_IE_LD,
+ BFD_RELOC_SPARC_TLS_IE_LDX,
+ BFD_RELOC_SPARC_TLS_IE_ADD,
+ BFD_RELOC_SPARC_TLS_LE_HIX22,
+ BFD_RELOC_SPARC_TLS_LE_LOX10,
+ BFD_RELOC_SPARC_TLS_DTPMOD32,
+ BFD_RELOC_SPARC_TLS_DTPMOD64,
+ BFD_RELOC_SPARC_TLS_DTPOFF32,
+ BFD_RELOC_SPARC_TLS_DTPOFF64,
+ BFD_RELOC_SPARC_TLS_TPOFF32,
+ BFD_RELOC_SPARC_TLS_TPOFF64,
+
+/* SPU Relocations. */
+ BFD_RELOC_SPU_IMM7,
+ BFD_RELOC_SPU_IMM8,
+ BFD_RELOC_SPU_IMM10,
+ BFD_RELOC_SPU_IMM10W,
+ BFD_RELOC_SPU_IMM16,
+ BFD_RELOC_SPU_IMM16W,
+ BFD_RELOC_SPU_IMM18,
+ BFD_RELOC_SPU_PCREL9a,
+ BFD_RELOC_SPU_PCREL9b,
+ BFD_RELOC_SPU_PCREL16,
+ BFD_RELOC_SPU_LO16,
+ BFD_RELOC_SPU_HI16,
+ BFD_RELOC_SPU_PPU32,
+ BFD_RELOC_SPU_PPU64,
+ BFD_RELOC_SPU_ADD_PIC,
+
+/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+"addend" in some special way.
+For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
+writing; when reading, it will be the absolute section symbol. The
+addend is the displacement in bytes of the "lda" instruction from
+the "ldah" instruction (which is at the address of this reloc). */
+ BFD_RELOC_ALPHA_GPDISP_HI16,
+
+/* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
+with GPDISP_HI16 relocs. The addend is ignored when writing the
+relocations out, and is filled in with the file's GP value on
+reading, for convenience. */
+ BFD_RELOC_ALPHA_GPDISP_LO16,
+
+/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+relocation except that there is no accompanying GPDISP_LO16
+relocation. */
+ BFD_RELOC_ALPHA_GPDISP,
+
+/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
+the assembler turns it into a LDQ instruction to load the address of
+the symbol, and then fills in a register in the real instruction.
+
+The LITERAL reloc, at the LDQ instruction, refers to the .lita
+section symbol. The addend is ignored when writing, but is filled
+in with the file's GP value on reading, for convenience, as with the
+GPDISP_LO16 reloc.
+
+The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
+It should refer to the symbol to be referenced, as with 16_GOTOFF,
+but it generates output not based on the position within the .got
+section, but relative to the GP value chosen for the file during the
+final link stage.
+
+The LITUSE reloc, on the instruction using the loaded address, gives
+information to the linker that it might be able to use to optimize
+away some literal section references. The symbol is ignored (read
+as the absolute section symbol), and the "addend" indicates the type
+of instruction using the register:
+1 - "memory" fmt insn
+2 - byte-manipulation (byte offset reg)
+3 - jsr (target of branch) */
+ BFD_RELOC_ALPHA_LITERAL,
+ BFD_RELOC_ALPHA_ELF_LITERAL,
+ BFD_RELOC_ALPHA_LITUSE,
+
+/* The HINT relocation indicates a value that should be filled into the
+"hint" field of a jmp/jsr/ret instruction, for possible branch-
+prediction logic which may be provided on some processors. */
+ BFD_RELOC_ALPHA_HINT,
+
+/* The LINKAGE relocation outputs a linkage pair in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_LINKAGE,
+
+/* The CODEADDR relocation outputs a STO_CA in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_CODEADDR,
+
+/* The GPREL_HI/LO relocations together form a 32-bit offset from the
+GP register. */
+ BFD_RELOC_ALPHA_GPREL_HI16,
+ BFD_RELOC_ALPHA_GPREL_LO16,
+
+/* Like BFD_RELOC_23_PCREL_S2, except that the source and target must
+share a common GP, and the target address is adjusted for
+STO_ALPHA_STD_GPLOAD. */
+ BFD_RELOC_ALPHA_BRSGP,
+
+/* The NOP relocation outputs a NOP if the longword displacement
+between two procedure entry points is < 2^21. */
+ BFD_RELOC_ALPHA_NOP,
+
+/* The BSR relocation outputs a BSR if the longword displacement
+between two procedure entry points is < 2^21. */
+ BFD_RELOC_ALPHA_BSR,
+
+/* The LDA relocation outputs a LDA if the longword displacement
+between two procedure entry points is < 2^16. */
+ BFD_RELOC_ALPHA_LDA,
+
+/* The BOH relocation outputs a BSR if the longword displacement
+between two procedure entry points is < 2^21, or else a hint. */
+ BFD_RELOC_ALPHA_BOH,
+
+/* Alpha thread-local storage relocations. */
+ BFD_RELOC_ALPHA_TLSGD,
+ BFD_RELOC_ALPHA_TLSLDM,
+ BFD_RELOC_ALPHA_DTPMOD64,
+ BFD_RELOC_ALPHA_GOTDTPREL16,
+ BFD_RELOC_ALPHA_DTPREL64,
+ BFD_RELOC_ALPHA_DTPREL_HI16,
+ BFD_RELOC_ALPHA_DTPREL_LO16,
+ BFD_RELOC_ALPHA_DTPREL16,
+ BFD_RELOC_ALPHA_GOTTPREL16,
+ BFD_RELOC_ALPHA_TPREL64,
+ BFD_RELOC_ALPHA_TPREL_HI16,
+ BFD_RELOC_ALPHA_TPREL_LO16,
+ BFD_RELOC_ALPHA_TPREL16,
+
+/* Bits 27..2 of the relocation address shifted right 2 bits;
+simple reloc otherwise. */
+ BFD_RELOC_MIPS_JMP,
+
+/* The MIPS16 jump instruction. */
+ BFD_RELOC_MIPS16_JMP,
+
+/* MIPS16 GP relative reloc. */
+ BFD_RELOC_MIPS16_GPREL,
+
+/* High 16 bits of 32-bit value; simple reloc. */
+ BFD_RELOC_HI16,
+
+/* High 16 bits of 32-bit value but the low 16 bits will be sign
+extended and added to form the final result. If the low 16
+bits form a negative number, we need to add one to the high value
+to compensate for the borrow when the low bits are added. */
+ BFD_RELOC_HI16_S,
+
+/* Low 16 bits. */
+ BFD_RELOC_LO16,
+
+/* High 16 bits of 32-bit pc-relative value */
+ BFD_RELOC_HI16_PCREL,
+
+/* High 16 bits of 32-bit pc-relative value, adjusted */
+ BFD_RELOC_HI16_S_PCREL,
+
+/* Low 16 bits of pc-relative value */
+ BFD_RELOC_LO16_PCREL,
+
+/* Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
+16-bit immediate fields */
+ BFD_RELOC_MIPS16_GOT16,
+ BFD_RELOC_MIPS16_CALL16,
+
+/* MIPS16 high 16 bits of 32-bit value. */
+ BFD_RELOC_MIPS16_HI16,
+
+/* MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
+extended and added to form the final result. If the low 16
+bits form a negative number, we need to add one to the high value
+to compensate for the borrow when the low bits are added. */
+ BFD_RELOC_MIPS16_HI16_S,
+
+/* MIPS16 low 16 bits. */
+ BFD_RELOC_MIPS16_LO16,
+
+/* Relocation against a MIPS literal section. */
+ BFD_RELOC_MIPS_LITERAL,
+
+/* MIPS ELF relocations. */
+ BFD_RELOC_MIPS_GOT16,
+ BFD_RELOC_MIPS_CALL16,
+ BFD_RELOC_MIPS_GOT_HI16,
+ BFD_RELOC_MIPS_GOT_LO16,
+ BFD_RELOC_MIPS_CALL_HI16,
+ BFD_RELOC_MIPS_CALL_LO16,
+ BFD_RELOC_MIPS_SUB,
+ BFD_RELOC_MIPS_GOT_PAGE,
+ BFD_RELOC_MIPS_GOT_OFST,
+ BFD_RELOC_MIPS_GOT_DISP,
+ BFD_RELOC_MIPS_SHIFT5,
+ BFD_RELOC_MIPS_SHIFT6,
+ BFD_RELOC_MIPS_INSERT_A,
+ BFD_RELOC_MIPS_INSERT_B,
+ BFD_RELOC_MIPS_DELETE,
+ BFD_RELOC_MIPS_HIGHEST,
+ BFD_RELOC_MIPS_HIGHER,
+ BFD_RELOC_MIPS_SCN_DISP,
+ BFD_RELOC_MIPS_REL16,
+ BFD_RELOC_MIPS_RELGOT,
+ BFD_RELOC_MIPS_JALR,
+ BFD_RELOC_MIPS_TLS_DTPMOD32,
+ BFD_RELOC_MIPS_TLS_DTPREL32,
+ BFD_RELOC_MIPS_TLS_DTPMOD64,
+ BFD_RELOC_MIPS_TLS_DTPREL64,
+ BFD_RELOC_MIPS_TLS_GD,
+ BFD_RELOC_MIPS_TLS_LDM,
+ BFD_RELOC_MIPS_TLS_DTPREL_HI16,
+ BFD_RELOC_MIPS_TLS_DTPREL_LO16,
+ BFD_RELOC_MIPS_TLS_GOTTPREL,
+ BFD_RELOC_MIPS_TLS_TPREL32,
+ BFD_RELOC_MIPS_TLS_TPREL64,
+ BFD_RELOC_MIPS_TLS_TPREL_HI16,
+ BFD_RELOC_MIPS_TLS_TPREL_LO16,
+
+
+/* MIPS ELF relocations (VxWorks and PLT extensions). */
+ BFD_RELOC_MIPS_COPY,
+ BFD_RELOC_MIPS_JUMP_SLOT,
+
+
+/* Moxie ELF relocations. */
+ BFD_RELOC_MOXIE_10_PCREL,
+
+
+/* Fujitsu Frv Relocations. */
+ BFD_RELOC_FRV_LABEL16,
+ BFD_RELOC_FRV_LABEL24,
+ BFD_RELOC_FRV_LO16,
+ BFD_RELOC_FRV_HI16,
+ BFD_RELOC_FRV_GPREL12,
+ BFD_RELOC_FRV_GPRELU12,
+ BFD_RELOC_FRV_GPREL32,
+ BFD_RELOC_FRV_GPRELHI,
+ BFD_RELOC_FRV_GPRELLO,
+ BFD_RELOC_FRV_GOT12,
+ BFD_RELOC_FRV_GOTHI,
+ BFD_RELOC_FRV_GOTLO,
+ BFD_RELOC_FRV_FUNCDESC,
+ BFD_RELOC_FRV_FUNCDESC_GOT12,
+ BFD_RELOC_FRV_FUNCDESC_GOTHI,
+ BFD_RELOC_FRV_FUNCDESC_GOTLO,
+ BFD_RELOC_FRV_FUNCDESC_VALUE,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
+ BFD_RELOC_FRV_GOTOFF12,
+ BFD_RELOC_FRV_GOTOFFHI,
+ BFD_RELOC_FRV_GOTOFFLO,
+ BFD_RELOC_FRV_GETTLSOFF,
+ BFD_RELOC_FRV_TLSDESC_VALUE,
+ BFD_RELOC_FRV_GOTTLSDESC12,
+ BFD_RELOC_FRV_GOTTLSDESCHI,
+ BFD_RELOC_FRV_GOTTLSDESCLO,
+ BFD_RELOC_FRV_TLSMOFF12,
+ BFD_RELOC_FRV_TLSMOFFHI,
+ BFD_RELOC_FRV_TLSMOFFLO,
+ BFD_RELOC_FRV_GOTTLSOFF12,
+ BFD_RELOC_FRV_GOTTLSOFFHI,
+ BFD_RELOC_FRV_GOTTLSOFFLO,
+ BFD_RELOC_FRV_TLSOFF,
+ BFD_RELOC_FRV_TLSDESC_RELAX,
+ BFD_RELOC_FRV_GETTLSOFF_RELAX,
+ BFD_RELOC_FRV_TLSOFF_RELAX,
+ BFD_RELOC_FRV_TLSMOFF,
+
+
+/* This is a 24bit GOT-relative reloc for the mn10300. */
+ BFD_RELOC_MN10300_GOTOFF24,
+
+/* This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT32,
+
+/* This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT24,
+
+/* This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT16,
+
+/* Copy symbol at runtime. */
+ BFD_RELOC_MN10300_COPY,
+
+/* Create GOT entry. */
+ BFD_RELOC_MN10300_GLOB_DAT,
+
+/* Create PLT entry. */
+ BFD_RELOC_MN10300_JMP_SLOT,
+
+/* Adjust by program base. */
+ BFD_RELOC_MN10300_RELATIVE,
+
+/* Together with another reloc targeted at the same location,
+allows for a value that is the difference of two symbols
+in the same section. */
+ BFD_RELOC_MN10300_SYM_DIFF,
+
+/* The addend of this reloc is an alignment power that must
+be honoured at the offset's location, regardless of linker
+relaxation. */
+ BFD_RELOC_MN10300_ALIGN,
+
+
+/* i386/elf relocations */
+ BFD_RELOC_386_GOT32,
+ BFD_RELOC_386_PLT32,
+ BFD_RELOC_386_COPY,
+ BFD_RELOC_386_GLOB_DAT,
+ BFD_RELOC_386_JUMP_SLOT,
+ BFD_RELOC_386_RELATIVE,
+ BFD_RELOC_386_GOTOFF,
+ BFD_RELOC_386_GOTPC,
+ BFD_RELOC_386_TLS_TPOFF,
+ BFD_RELOC_386_TLS_IE,
+ BFD_RELOC_386_TLS_GOTIE,
+ BFD_RELOC_386_TLS_LE,
+ BFD_RELOC_386_TLS_GD,
+ BFD_RELOC_386_TLS_LDM,
+ BFD_RELOC_386_TLS_LDO_32,
+ BFD_RELOC_386_TLS_IE_32,
+ BFD_RELOC_386_TLS_LE_32,
+ BFD_RELOC_386_TLS_DTPMOD32,
+ BFD_RELOC_386_TLS_DTPOFF32,
+ BFD_RELOC_386_TLS_TPOFF32,
+ BFD_RELOC_386_TLS_GOTDESC,
+ BFD_RELOC_386_TLS_DESC_CALL,
+ BFD_RELOC_386_TLS_DESC,
+ BFD_RELOC_386_IRELATIVE,
+
+/* x86-64/elf relocations */
+ BFD_RELOC_X86_64_GOT32,
+ BFD_RELOC_X86_64_PLT32,
+ BFD_RELOC_X86_64_COPY,
+ BFD_RELOC_X86_64_GLOB_DAT,
+ BFD_RELOC_X86_64_JUMP_SLOT,
+ BFD_RELOC_X86_64_RELATIVE,
+ BFD_RELOC_X86_64_GOTPCREL,
+ BFD_RELOC_X86_64_32S,
+ BFD_RELOC_X86_64_DTPMOD64,
+ BFD_RELOC_X86_64_DTPOFF64,
+ BFD_RELOC_X86_64_TPOFF64,
+ BFD_RELOC_X86_64_TLSGD,
+ BFD_RELOC_X86_64_TLSLD,
+ BFD_RELOC_X86_64_DTPOFF32,
+ BFD_RELOC_X86_64_GOTTPOFF,
+ BFD_RELOC_X86_64_TPOFF32,
+ BFD_RELOC_X86_64_GOTOFF64,
+ BFD_RELOC_X86_64_GOTPC32,
+ BFD_RELOC_X86_64_GOT64,
+ BFD_RELOC_X86_64_GOTPCREL64,
+ BFD_RELOC_X86_64_GOTPC64,
+ BFD_RELOC_X86_64_GOTPLT64,
+ BFD_RELOC_X86_64_PLTOFF64,
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC,
+ BFD_RELOC_X86_64_TLSDESC_CALL,
+ BFD_RELOC_X86_64_TLSDESC,
+ BFD_RELOC_X86_64_IRELATIVE,
+
+/* ns32k relocations */
+ BFD_RELOC_NS32K_IMM_8,
+ BFD_RELOC_NS32K_IMM_16,
+ BFD_RELOC_NS32K_IMM_32,
+ BFD_RELOC_NS32K_IMM_8_PCREL,
+ BFD_RELOC_NS32K_IMM_16_PCREL,
+ BFD_RELOC_NS32K_IMM_32_PCREL,
+ BFD_RELOC_NS32K_DISP_8,
+ BFD_RELOC_NS32K_DISP_16,
+ BFD_RELOC_NS32K_DISP_32,
+ BFD_RELOC_NS32K_DISP_8_PCREL,
+ BFD_RELOC_NS32K_DISP_16_PCREL,
+ BFD_RELOC_NS32K_DISP_32_PCREL,
+
+/* PDP11 relocations */
+ BFD_RELOC_PDP11_DISP_8_PCREL,
+ BFD_RELOC_PDP11_DISP_6_PCREL,
+
+/* Picojava relocs. Not all of these appear in object files. */
+ BFD_RELOC_PJ_CODE_HI16,
+ BFD_RELOC_PJ_CODE_LO16,
+ BFD_RELOC_PJ_CODE_DIR16,
+ BFD_RELOC_PJ_CODE_DIR32,
+ BFD_RELOC_PJ_CODE_REL16,
+ BFD_RELOC_PJ_CODE_REL32,
+
+/* Power(rs6000) and PowerPC relocations. */
+ BFD_RELOC_PPC_B26,
+ BFD_RELOC_PPC_BA26,
+ BFD_RELOC_PPC_TOC16,
+ BFD_RELOC_PPC_B16,
+ BFD_RELOC_PPC_B16_BRTAKEN,
+ BFD_RELOC_PPC_B16_BRNTAKEN,
+ BFD_RELOC_PPC_BA16,
+ BFD_RELOC_PPC_BA16_BRTAKEN,
+ BFD_RELOC_PPC_BA16_BRNTAKEN,
+ BFD_RELOC_PPC_COPY,
+ BFD_RELOC_PPC_GLOB_DAT,
+ BFD_RELOC_PPC_JMP_SLOT,
+ BFD_RELOC_PPC_RELATIVE,
+ BFD_RELOC_PPC_LOCAL24PC,
+ BFD_RELOC_PPC_EMB_NADDR32,
+ BFD_RELOC_PPC_EMB_NADDR16,
+ BFD_RELOC_PPC_EMB_NADDR16_LO,
+ BFD_RELOC_PPC_EMB_NADDR16_HI,
+ BFD_RELOC_PPC_EMB_NADDR16_HA,
+ BFD_RELOC_PPC_EMB_SDAI16,
+ BFD_RELOC_PPC_EMB_SDA2I16,
+ BFD_RELOC_PPC_EMB_SDA2REL,
+ BFD_RELOC_PPC_EMB_SDA21,
+ BFD_RELOC_PPC_EMB_MRKREF,
+ BFD_RELOC_PPC_EMB_RELSEC16,
+ BFD_RELOC_PPC_EMB_RELST_LO,
+ BFD_RELOC_PPC_EMB_RELST_HI,
+ BFD_RELOC_PPC_EMB_RELST_HA,
+ BFD_RELOC_PPC_EMB_BIT_FLD,
+ BFD_RELOC_PPC_EMB_RELSDA,
+ BFD_RELOC_PPC64_HIGHER,
+ BFD_RELOC_PPC64_HIGHER_S,
+ BFD_RELOC_PPC64_HIGHEST,
+ BFD_RELOC_PPC64_HIGHEST_S,
+ BFD_RELOC_PPC64_TOC16_LO,
+ BFD_RELOC_PPC64_TOC16_HI,
+ BFD_RELOC_PPC64_TOC16_HA,
+ BFD_RELOC_PPC64_TOC,
+ BFD_RELOC_PPC64_PLTGOT16,
+ BFD_RELOC_PPC64_PLTGOT16_LO,
+ BFD_RELOC_PPC64_PLTGOT16_HI,
+ BFD_RELOC_PPC64_PLTGOT16_HA,
+ BFD_RELOC_PPC64_ADDR16_DS,
+ BFD_RELOC_PPC64_ADDR16_LO_DS,
+ BFD_RELOC_PPC64_GOT16_DS,
+ BFD_RELOC_PPC64_GOT16_LO_DS,
+ BFD_RELOC_PPC64_PLT16_LO_DS,
+ BFD_RELOC_PPC64_SECTOFF_DS,
+ BFD_RELOC_PPC64_SECTOFF_LO_DS,
+ BFD_RELOC_PPC64_TOC16_DS,
+ BFD_RELOC_PPC64_TOC16_LO_DS,
+ BFD_RELOC_PPC64_PLTGOT16_DS,
+ BFD_RELOC_PPC64_PLTGOT16_LO_DS,
+
+/* PowerPC and PowerPC64 thread-local storage relocations. */
+ BFD_RELOC_PPC_TLS,
+ BFD_RELOC_PPC_TLSGD,
+ BFD_RELOC_PPC_TLSLD,
+ BFD_RELOC_PPC_DTPMOD,
+ BFD_RELOC_PPC_TPREL16,
+ BFD_RELOC_PPC_TPREL16_LO,
+ BFD_RELOC_PPC_TPREL16_HI,
+ BFD_RELOC_PPC_TPREL16_HA,
+ BFD_RELOC_PPC_TPREL,
+ BFD_RELOC_PPC_DTPREL16,
+ BFD_RELOC_PPC_DTPREL16_LO,
+ BFD_RELOC_PPC_DTPREL16_HI,
+ BFD_RELOC_PPC_DTPREL16_HA,
+ BFD_RELOC_PPC_DTPREL,
+ BFD_RELOC_PPC_GOT_TLSGD16,
+ BFD_RELOC_PPC_GOT_TLSGD16_LO,
+ BFD_RELOC_PPC_GOT_TLSGD16_HI,
+ BFD_RELOC_PPC_GOT_TLSGD16_HA,
+ BFD_RELOC_PPC_GOT_TLSLD16,
+ BFD_RELOC_PPC_GOT_TLSLD16_LO,
+ BFD_RELOC_PPC_GOT_TLSLD16_HI,
+ BFD_RELOC_PPC_GOT_TLSLD16_HA,
+ BFD_RELOC_PPC_GOT_TPREL16,
+ BFD_RELOC_PPC_GOT_TPREL16_LO,
+ BFD_RELOC_PPC_GOT_TPREL16_HI,
+ BFD_RELOC_PPC_GOT_TPREL16_HA,
+ BFD_RELOC_PPC_GOT_DTPREL16,
+ BFD_RELOC_PPC_GOT_DTPREL16_LO,
+ BFD_RELOC_PPC_GOT_DTPREL16_HI,
+ BFD_RELOC_PPC_GOT_DTPREL16_HA,
+ BFD_RELOC_PPC64_TPREL16_DS,
+ BFD_RELOC_PPC64_TPREL16_LO_DS,
+ BFD_RELOC_PPC64_TPREL16_HIGHER,
+ BFD_RELOC_PPC64_TPREL16_HIGHERA,
+ BFD_RELOC_PPC64_TPREL16_HIGHEST,
+ BFD_RELOC_PPC64_TPREL16_HIGHESTA,
+ BFD_RELOC_PPC64_DTPREL16_DS,
+ BFD_RELOC_PPC64_DTPREL16_LO_DS,
+ BFD_RELOC_PPC64_DTPREL16_HIGHER,
+ BFD_RELOC_PPC64_DTPREL16_HIGHERA,
+ BFD_RELOC_PPC64_DTPREL16_HIGHEST,
+ BFD_RELOC_PPC64_DTPREL16_HIGHESTA,
+
+/* IBM 370/390 relocations */
+ BFD_RELOC_I370_D12,
+
+/* The type of reloc used to build a constructor table - at the moment
+probably a 32 bit wide absolute relocation, but the target can choose.
+It generally does map to one of the other relocation types. */
+ BFD_RELOC_CTOR,
+
+/* ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
+not stored in the instruction. */
+ BFD_RELOC_ARM_PCREL_BRANCH,
+
+/* ARM 26 bit pc-relative branch. The lowest bit must be zero and is
+not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+field in the instruction. */
+ BFD_RELOC_ARM_PCREL_BLX,
+
+/* Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
+not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+field in the instruction. */
+ BFD_RELOC_THUMB_PCREL_BLX,
+
+/* ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction. */
+ BFD_RELOC_ARM_PCREL_CALL,
+
+/* ARM 26-bit pc-relative branch for B or conditional BL instruction. */
+ BFD_RELOC_ARM_PCREL_JUMP,
+
+/* Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
+The lowest bit must be zero and is not stored in the instruction.
+Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
+"nn" one smaller in all cases. Note further that BRANCH23
+corresponds to R_ARM_THM_CALL. */
+ BFD_RELOC_THUMB_PCREL_BRANCH7,
+ BFD_RELOC_THUMB_PCREL_BRANCH9,
+ BFD_RELOC_THUMB_PCREL_BRANCH12,
+ BFD_RELOC_THUMB_PCREL_BRANCH20,
+ BFD_RELOC_THUMB_PCREL_BRANCH23,
+ BFD_RELOC_THUMB_PCREL_BRANCH25,
+
+/* 12-bit immediate offset, used in ARM-format ldr and str instructions. */
+ BFD_RELOC_ARM_OFFSET_IMM,
+
+/* 5-bit immediate offset, used in Thumb-format ldr and str instructions. */
+ BFD_RELOC_ARM_THUMB_OFFSET,
+
+/* Pc-relative or absolute relocation depending on target. Used for
+entries in .init_array sections. */
+ BFD_RELOC_ARM_TARGET1,
+
+/* Read-only segment base relative address. */
+ BFD_RELOC_ARM_ROSEGREL32,
+
+/* Data segment base relative address. */
+ BFD_RELOC_ARM_SBREL32,
+
+/* This reloc is used for references to RTTI data from exception handling
+tables. The actual definition depends on the target. It may be a
+pc-relative or some form of GOT-indirect relocation. */
+ BFD_RELOC_ARM_TARGET2,
+
+/* 31-bit PC relative address. */
+ BFD_RELOC_ARM_PREL31,
+
+/* Low and High halfword relocations for MOVW and MOVT instructions. */
+ BFD_RELOC_ARM_MOVW,
+ BFD_RELOC_ARM_MOVT,
+ BFD_RELOC_ARM_MOVW_PCREL,
+ BFD_RELOC_ARM_MOVT_PCREL,
+ BFD_RELOC_ARM_THUMB_MOVW,
+ BFD_RELOC_ARM_THUMB_MOVT,
+ BFD_RELOC_ARM_THUMB_MOVW_PCREL,
+ BFD_RELOC_ARM_THUMB_MOVT_PCREL,
+
+/* Relocations for setting up GOTs and PLTs for shared libraries. */
+ BFD_RELOC_ARM_JUMP_SLOT,
+ BFD_RELOC_ARM_GLOB_DAT,
+ BFD_RELOC_ARM_GOT32,
+ BFD_RELOC_ARM_PLT32,
+ BFD_RELOC_ARM_RELATIVE,
+ BFD_RELOC_ARM_GOTOFF,
+ BFD_RELOC_ARM_GOTPC,
+ BFD_RELOC_ARM_GOT_PREL,
+
+/* ARM thread-local storage relocations. */
+ BFD_RELOC_ARM_TLS_GD32,
+ BFD_RELOC_ARM_TLS_LDO32,
+ BFD_RELOC_ARM_TLS_LDM32,
+ BFD_RELOC_ARM_TLS_DTPOFF32,
+ BFD_RELOC_ARM_TLS_DTPMOD32,
+ BFD_RELOC_ARM_TLS_TPOFF32,
+ BFD_RELOC_ARM_TLS_IE32,
+ BFD_RELOC_ARM_TLS_LE32,
+
+/* ARM group relocations. */
+ BFD_RELOC_ARM_ALU_PC_G0_NC,
+ BFD_RELOC_ARM_ALU_PC_G0,
+ BFD_RELOC_ARM_ALU_PC_G1_NC,
+ BFD_RELOC_ARM_ALU_PC_G1,
+ BFD_RELOC_ARM_ALU_PC_G2,
+ BFD_RELOC_ARM_LDR_PC_G0,
+ BFD_RELOC_ARM_LDR_PC_G1,
+ BFD_RELOC_ARM_LDR_PC_G2,
+ BFD_RELOC_ARM_LDRS_PC_G0,
+ BFD_RELOC_ARM_LDRS_PC_G1,
+ BFD_RELOC_ARM_LDRS_PC_G2,
+ BFD_RELOC_ARM_LDC_PC_G0,
+ BFD_RELOC_ARM_LDC_PC_G1,
+ BFD_RELOC_ARM_LDC_PC_G2,
+ BFD_RELOC_ARM_ALU_SB_G0_NC,
+ BFD_RELOC_ARM_ALU_SB_G0,
+ BFD_RELOC_ARM_ALU_SB_G1_NC,
+ BFD_RELOC_ARM_ALU_SB_G1,
+ BFD_RELOC_ARM_ALU_SB_G2,
+ BFD_RELOC_ARM_LDR_SB_G0,
+ BFD_RELOC_ARM_LDR_SB_G1,
+ BFD_RELOC_ARM_LDR_SB_G2,
+ BFD_RELOC_ARM_LDRS_SB_G0,
+ BFD_RELOC_ARM_LDRS_SB_G1,
+ BFD_RELOC_ARM_LDRS_SB_G2,
+ BFD_RELOC_ARM_LDC_SB_G0,
+ BFD_RELOC_ARM_LDC_SB_G1,
+ BFD_RELOC_ARM_LDC_SB_G2,
+
+/* Annotation of BX instructions. */
+ BFD_RELOC_ARM_V4BX,
+
+/* These relocs are only used within the ARM assembler. They are not
+(at present) written to any object files. */
+ BFD_RELOC_ARM_IMMEDIATE,
+ BFD_RELOC_ARM_ADRL_IMMEDIATE,
+ BFD_RELOC_ARM_T32_IMMEDIATE,
+ BFD_RELOC_ARM_T32_ADD_IMM,
+ BFD_RELOC_ARM_T32_IMM12,
+ BFD_RELOC_ARM_T32_ADD_PC12,
+ BFD_RELOC_ARM_SHIFT_IMM,
+ BFD_RELOC_ARM_SMC,
+ BFD_RELOC_ARM_SWI,
+ BFD_RELOC_ARM_MULTI,
+ BFD_RELOC_ARM_CP_OFF_IMM,
+ BFD_RELOC_ARM_CP_OFF_IMM_S2,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2,
+ BFD_RELOC_ARM_ADR_IMM,
+ BFD_RELOC_ARM_LDR_IMM,
+ BFD_RELOC_ARM_LITERAL,
+ BFD_RELOC_ARM_IN_POOL,
+ BFD_RELOC_ARM_OFFSET_IMM8,
+ BFD_RELOC_ARM_T32_OFFSET_U8,
+ BFD_RELOC_ARM_T32_OFFSET_IMM,
+ BFD_RELOC_ARM_HWLITERAL,
+ BFD_RELOC_ARM_THUMB_ADD,
+ BFD_RELOC_ARM_THUMB_IMM,
+ BFD_RELOC_ARM_THUMB_SHIFT,
+
+/* Renesas / SuperH SH relocs. Not all of these appear in object files. */
+ BFD_RELOC_SH_PCDISP8BY2,
+ BFD_RELOC_SH_PCDISP12BY2,
+ BFD_RELOC_SH_IMM3,
+ BFD_RELOC_SH_IMM3U,
+ BFD_RELOC_SH_DISP12,
+ BFD_RELOC_SH_DISP12BY2,
+ BFD_RELOC_SH_DISP12BY4,
+ BFD_RELOC_SH_DISP12BY8,
+ BFD_RELOC_SH_DISP20,
+ BFD_RELOC_SH_DISP20BY8,
+ BFD_RELOC_SH_IMM4,
+ BFD_RELOC_SH_IMM4BY2,
+ BFD_RELOC_SH_IMM4BY4,
+ BFD_RELOC_SH_IMM8,
+ BFD_RELOC_SH_IMM8BY2,
+ BFD_RELOC_SH_IMM8BY4,
+ BFD_RELOC_SH_PCRELIMM8BY2,
+ BFD_RELOC_SH_PCRELIMM8BY4,
+ BFD_RELOC_SH_SWITCH16,
+ BFD_RELOC_SH_SWITCH32,
+ BFD_RELOC_SH_USES,
+ BFD_RELOC_SH_COUNT,
+ BFD_RELOC_SH_ALIGN,
+ BFD_RELOC_SH_CODE,
+ BFD_RELOC_SH_DATA,
+ BFD_RELOC_SH_LABEL,
+ BFD_RELOC_SH_LOOP_START,
+ BFD_RELOC_SH_LOOP_END,
+ BFD_RELOC_SH_COPY,
+ BFD_RELOC_SH_GLOB_DAT,
+ BFD_RELOC_SH_JMP_SLOT,
+ BFD_RELOC_SH_RELATIVE,
+ BFD_RELOC_SH_GOTPC,
+ BFD_RELOC_SH_GOT_LOW16,
+ BFD_RELOC_SH_GOT_MEDLOW16,
+ BFD_RELOC_SH_GOT_MEDHI16,
+ BFD_RELOC_SH_GOT_HI16,
+ BFD_RELOC_SH_GOTPLT_LOW16,
+ BFD_RELOC_SH_GOTPLT_MEDLOW16,
+ BFD_RELOC_SH_GOTPLT_MEDHI16,
+ BFD_RELOC_SH_GOTPLT_HI16,
+ BFD_RELOC_SH_PLT_LOW16,
+ BFD_RELOC_SH_PLT_MEDLOW16,
+ BFD_RELOC_SH_PLT_MEDHI16,
+ BFD_RELOC_SH_PLT_HI16,
+ BFD_RELOC_SH_GOTOFF_LOW16,
+ BFD_RELOC_SH_GOTOFF_MEDLOW16,
+ BFD_RELOC_SH_GOTOFF_MEDHI16,
+ BFD_RELOC_SH_GOTOFF_HI16,
+ BFD_RELOC_SH_GOTPC_LOW16,
+ BFD_RELOC_SH_GOTPC_MEDLOW16,
+ BFD_RELOC_SH_GOTPC_MEDHI16,
+ BFD_RELOC_SH_GOTPC_HI16,
+ BFD_RELOC_SH_COPY64,
+ BFD_RELOC_SH_GLOB_DAT64,
+ BFD_RELOC_SH_JMP_SLOT64,
+ BFD_RELOC_SH_RELATIVE64,
+ BFD_RELOC_SH_GOT10BY4,
+ BFD_RELOC_SH_GOT10BY8,
+ BFD_RELOC_SH_GOTPLT10BY4,
+ BFD_RELOC_SH_GOTPLT10BY8,
+ BFD_RELOC_SH_GOTPLT32,
+ BFD_RELOC_SH_SHMEDIA_CODE,
+ BFD_RELOC_SH_IMMU5,
+ BFD_RELOC_SH_IMMS6,
+ BFD_RELOC_SH_IMMS6BY32,
+ BFD_RELOC_SH_IMMU6,
+ BFD_RELOC_SH_IMMS10,
+ BFD_RELOC_SH_IMMS10BY2,
+ BFD_RELOC_SH_IMMS10BY4,
+ BFD_RELOC_SH_IMMS10BY8,
+ BFD_RELOC_SH_IMMS16,
+ BFD_RELOC_SH_IMMU16,
+ BFD_RELOC_SH_IMM_LOW16,
+ BFD_RELOC_SH_IMM_LOW16_PCREL,
+ BFD_RELOC_SH_IMM_MEDLOW16,
+ BFD_RELOC_SH_IMM_MEDLOW16_PCREL,
+ BFD_RELOC_SH_IMM_MEDHI16,
+ BFD_RELOC_SH_IMM_MEDHI16_PCREL,
+ BFD_RELOC_SH_IMM_HI16,
+ BFD_RELOC_SH_IMM_HI16_PCREL,
+ BFD_RELOC_SH_PT_16,
+ BFD_RELOC_SH_TLS_GD_32,
+ BFD_RELOC_SH_TLS_LD_32,
+ BFD_RELOC_SH_TLS_LDO_32,
+ BFD_RELOC_SH_TLS_IE_32,
+ BFD_RELOC_SH_TLS_LE_32,
+ BFD_RELOC_SH_TLS_DTPMOD32,
+ BFD_RELOC_SH_TLS_DTPOFF32,
+ BFD_RELOC_SH_TLS_TPOFF32,
+
+/* ARC Cores relocs.
+ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
+not stored in the instruction. The high 20 bits are installed in bits 26
+through 7 of the instruction. */
+ BFD_RELOC_ARC_B22_PCREL,
+
+/* ARC 26 bit absolute branch. The lowest two bits must be zero and are not
+stored in the instruction. The high 24 bits are installed in bits 23
+through 0. */
+ BFD_RELOC_ARC_B26,
+
+/* ADI Blackfin 16 bit immediate absolute reloc. */
+ BFD_RELOC_BFIN_16_IMM,
+
+/* ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. */
+ BFD_RELOC_BFIN_16_HIGH,
+
+/* ADI Blackfin 'a' part of LSETUP. */
+ BFD_RELOC_BFIN_4_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_5_PCREL,
+
+/* ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. */
+ BFD_RELOC_BFIN_16_LOW,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_10_PCREL,
+
+/* ADI Blackfin 'b' part of LSETUP. */
+ BFD_RELOC_BFIN_11_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP,
+
+/* ADI Blackfin Short jump, pcrel. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP_S,
+
+/* ADI Blackfin Call.x not implemented. */
+ BFD_RELOC_BFIN_24_PCREL_CALL_X,
+
+/* ADI Blackfin Long Jump pcrel. */
+ BFD_RELOC_BFIN_24_PCREL_JUMP_L,
+
+/* ADI Blackfin FD-PIC relocations. */
+ BFD_RELOC_BFIN_GOT17M4,
+ BFD_RELOC_BFIN_GOTHI,
+ BFD_RELOC_BFIN_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC,
+ BFD_RELOC_BFIN_FUNCDESC_GOT17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC_VALUE,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO,
+ BFD_RELOC_BFIN_GOTOFF17M4,
+ BFD_RELOC_BFIN_GOTOFFHI,
+ BFD_RELOC_BFIN_GOTOFFLO,
+
+/* ADI Blackfin GOT relocation. */
+ BFD_RELOC_BFIN_GOT,
+
+/* ADI Blackfin PLTPC relocation. */
+ BFD_RELOC_BFIN_PLTPC,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PUSH,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_CONST,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_SUB,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MULT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_DIV,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MOD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_RSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_AND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_OR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_XOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LAND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LEN,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_NEG,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_COMP,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_HWPAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADDR,
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_10_PCREL_R,
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. This is the same as the previous reloc
+except it is in the left container, i.e.,
+shifted left 15 bits. */
+ BFD_RELOC_D10V_10_PCREL_L,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18_PCREL,
+
+/* Mitsubishi D30V relocs.
+This is a 6-bit absolute reloc. */
+ BFD_RELOC_D30V_6,
+
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_9_PCREL,
+
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_9_PCREL_R,
+
+/* This is a 12-bit absolute reloc with the
+right 3 bitsassumed to be 0. */
+ BFD_RELOC_D30V_15,
+
+/* This is a 12-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_15_PCREL,
+
+/* This is a 12-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_15_PCREL_R,
+
+/* This is an 18-bit absolute reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_21,
+
+/* This is an 18-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_21_PCREL,
+
+/* This is an 18-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_21_PCREL_R,
+
+/* This is a 32-bit absolute reloc. */
+ BFD_RELOC_D30V_32,
+
+/* This is a 32-bit pc-relative reloc. */
+ BFD_RELOC_D30V_32_PCREL,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_HI16_S,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_LO16,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_JMP26,
+
+/* Renesas M16C/M32C Relocations. */
+ BFD_RELOC_M32C_HI8,
+ BFD_RELOC_M32C_RL_JUMP,
+ BFD_RELOC_M32C_RL_1ADDR,
+ BFD_RELOC_M32C_RL_2ADDR,
+
+/* Renesas M32R (formerly Mitsubishi M32R) relocs.
+This is a 24 bit absolute address. */
+ BFD_RELOC_M32R_24,
+
+/* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_10_PCREL,
+
+/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_18_PCREL,
+
+/* This is a 26-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_26_PCREL,
+
+/* This is a 16-bit reloc containing the high 16 bits of an address
+used when the lower 16 bits are treated as unsigned. */
+ BFD_RELOC_M32R_HI16_ULO,
+
+/* This is a 16-bit reloc containing the high 16 bits of an address
+used when the lower 16 bits are treated as signed. */
+ BFD_RELOC_M32R_HI16_SLO,
+
+/* This is a 16-bit reloc containing the lower 16 bits of an address. */
+ BFD_RELOC_M32R_LO16,
+
+/* This is a 16-bit reloc containing the small data area offset for use in
+add3, load, and store instructions. */
+ BFD_RELOC_M32R_SDA16,
+
+/* For PIC. */
+ BFD_RELOC_M32R_GOT24,
+ BFD_RELOC_M32R_26_PLTREL,
+ BFD_RELOC_M32R_COPY,
+ BFD_RELOC_M32R_GLOB_DAT,
+ BFD_RELOC_M32R_JMP_SLOT,
+ BFD_RELOC_M32R_RELATIVE,
+ BFD_RELOC_M32R_GOTOFF,
+ BFD_RELOC_M32R_GOTOFF_HI_ULO,
+ BFD_RELOC_M32R_GOTOFF_HI_SLO,
+ BFD_RELOC_M32R_GOTOFF_LO,
+ BFD_RELOC_M32R_GOTPC24,
+ BFD_RELOC_M32R_GOT16_HI_ULO,
+ BFD_RELOC_M32R_GOT16_HI_SLO,
+ BFD_RELOC_M32R_GOT16_LO,
+ BFD_RELOC_M32R_GOTPC_HI_ULO,
+ BFD_RELOC_M32R_GOTPC_HI_SLO,
+ BFD_RELOC_M32R_GOTPC_LO,
+
+/* This is a 9-bit reloc */
+ BFD_RELOC_V850_9_PCREL,
+
+/* This is a 22-bit reloc */
+ BFD_RELOC_V850_22_PCREL,
+
+/* This is a 16 bit offset from the short data area pointer. */
+ BFD_RELOC_V850_SDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+short data area pointer. */
+ BFD_RELOC_V850_SDA_15_16_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer. */
+ BFD_RELOC_V850_ZDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+zero data area pointer. */
+ BFD_RELOC_V850_ZDA_15_16_OFFSET,
+
+/* This is an 8 bit offset (of which only 6 bits are used) from the
+tiny data area pointer. */
+ BFD_RELOC_V850_TDA_6_8_OFFSET,
+
+/* This is an 8bit offset (of which only 7 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_7_8_OFFSET,
+
+/* This is a 7 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_7_7_OFFSET,
+
+/* This is a 16 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_16_16_OFFSET,
+
+/* This is a 5 bit offset (of which only 4 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_4_5_OFFSET,
+
+/* This is a 4 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_4_4_OFFSET,
+
+/* This is a 16 bit offset from the short data area pointer, with the
+bits placed non-contiguously in the instruction. */
+ BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer, with the
+bits placed non-contiguously in the instruction. */
+ BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET,
+
+/* This is a 6 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_6_7_OFFSET,
+
+/* This is a 16 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_16_16_OFFSET,
+
+/* Used for relaxing indirect function calls. */
+ BFD_RELOC_V850_LONGCALL,
+
+/* Used for relaxing indirect jumps. */
+ BFD_RELOC_V850_LONGJUMP,
+
+/* Used to maintain alignment whilst relaxing. */
+ BFD_RELOC_V850_ALIGN,
+
+/* This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
+instructions. */
+ BFD_RELOC_V850_LO16_SPLIT_OFFSET,
+
+/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_32_PCREL,
+
+/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_16_PCREL,
+
+/* This is a 8bit DP reloc for the tms320c30, where the most
+significant 8 bits of a 24 bit word are placed into the least
+significant 8 bits of the opcode. */
+ BFD_RELOC_TIC30_LDP,
+
+/* This is a 7bit reloc for the tms320c54x, where the least
+significant 7 bits of a 16 bit word are placed into the least
+significant 7 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTLS7,
+
+/* This is a 9bit DP reloc for the tms320c54x, where the most
+significant 9 bits of a 16 bit word are placed into the least
+significant 9 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTMS9,
+
+/* This is an extended address 23-bit reloc for the tms320c54x. */
+ BFD_RELOC_TIC54X_23,
+
+/* This is a 16-bit reloc for the tms320c54x, where the least
+significant 16 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_16_OF_23,
+
+/* This is a reloc for the tms320c54x, where the most
+significant 7 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_MS7_OF_23,
+
+/* This is a 48 bit reloc for the FR30 that stores 32 bits. */
+ BFD_RELOC_FR30_48,
+
+/* This is a 32 bit reloc for the FR30 that stores 20 bits split up into
+two sections. */
+ BFD_RELOC_FR30_20,
+
+/* This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
+4 bits. */
+ BFD_RELOC_FR30_6_IN_4,
+
+/* This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
+into 8 bits. */
+ BFD_RELOC_FR30_8_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
+into 8 bits. */
+ BFD_RELOC_FR30_9_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
+into 8 bits. */
+ BFD_RELOC_FR30_10_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
+short offset into 8 bits. */
+ BFD_RELOC_FR30_9_PCREL,
+
+/* This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
+short offset into 11 bits. */
+ BFD_RELOC_FR30_12_PCREL,
+
+/* Motorola Mcore relocations. */
+ BFD_RELOC_MCORE_PCREL_IMM8BY4,
+ BFD_RELOC_MCORE_PCREL_IMM11BY2,
+ BFD_RELOC_MCORE_PCREL_IMM4BY2,
+ BFD_RELOC_MCORE_PCREL_32,
+ BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2,
+ BFD_RELOC_MCORE_RVA,
+
+/* Toshiba Media Processor Relocations. */
+ BFD_RELOC_MEP_8,
+ BFD_RELOC_MEP_16,
+ BFD_RELOC_MEP_32,
+ BFD_RELOC_MEP_PCREL8A2,
+ BFD_RELOC_MEP_PCREL12A2,
+ BFD_RELOC_MEP_PCREL17A2,
+ BFD_RELOC_MEP_PCREL24A2,
+ BFD_RELOC_MEP_PCABS24A2,
+ BFD_RELOC_MEP_LOW16,
+ BFD_RELOC_MEP_HI16U,
+ BFD_RELOC_MEP_HI16S,
+ BFD_RELOC_MEP_GPREL,
+ BFD_RELOC_MEP_TPREL,
+ BFD_RELOC_MEP_TPREL7,
+ BFD_RELOC_MEP_TPREL7A2,
+ BFD_RELOC_MEP_TPREL7A4,
+ BFD_RELOC_MEP_UIMM24,
+ BFD_RELOC_MEP_ADDR24A4,
+ BFD_RELOC_MEP_GNU_VTINHERIT,
+ BFD_RELOC_MEP_GNU_VTENTRY,
+
+
+/* These are relocations for the GETA instruction. */
+ BFD_RELOC_MMIX_GETA,
+ BFD_RELOC_MMIX_GETA_1,
+ BFD_RELOC_MMIX_GETA_2,
+ BFD_RELOC_MMIX_GETA_3,
+
+/* These are relocations for a conditional branch instruction. */
+ BFD_RELOC_MMIX_CBRANCH,
+ BFD_RELOC_MMIX_CBRANCH_J,
+ BFD_RELOC_MMIX_CBRANCH_1,
+ BFD_RELOC_MMIX_CBRANCH_2,
+ BFD_RELOC_MMIX_CBRANCH_3,
+
+/* These are relocations for the PUSHJ instruction. */
+ BFD_RELOC_MMIX_PUSHJ,
+ BFD_RELOC_MMIX_PUSHJ_1,
+ BFD_RELOC_MMIX_PUSHJ_2,
+ BFD_RELOC_MMIX_PUSHJ_3,
+ BFD_RELOC_MMIX_PUSHJ_STUBBABLE,
+
+/* These are relocations for the JMP instruction. */
+ BFD_RELOC_MMIX_JMP,
+ BFD_RELOC_MMIX_JMP_1,
+ BFD_RELOC_MMIX_JMP_2,
+ BFD_RELOC_MMIX_JMP_3,
+
+/* This is a relocation for a relative address as in a GETA instruction or
+a branch. */
+ BFD_RELOC_MMIX_ADDR19,
+
+/* This is a relocation for a relative address as in a JMP instruction. */
+ BFD_RELOC_MMIX_ADDR27,
+
+/* This is a relocation for an instruction field that may be a general
+register or a value 0..255. */
+ BFD_RELOC_MMIX_REG_OR_BYTE,
+
+/* This is a relocation for an instruction field that may be a general
+register. */
+ BFD_RELOC_MMIX_REG,
+
+/* This is a relocation for two instruction fields holding a register and
+an offset, the equivalent of the relocation. */
+ BFD_RELOC_MMIX_BASE_PLUS_OFFSET,
+
+/* This relocation is an assertion that the expression is not allocated as
+a global register. It does not modify contents. */
+ BFD_RELOC_MMIX_LOCAL,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit pc relative
+short offset into 7 bits. */
+ BFD_RELOC_AVR_7_PCREL,
+
+/* This is a 16 bit reloc for the AVR that stores 13 bit pc relative
+short offset into 12 bits. */
+ BFD_RELOC_AVR_13_PCREL,
+
+/* This is a 16 bit reloc for the AVR that stores 17 bit value (usually
+program memory address) into 16 bits. */
+ BFD_RELOC_AVR_16_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_LO8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HI8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of program memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HH8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(usually data memory address) into 8 bit immediate value of SUBI insn. */
+ BFD_RELOC_AVR_LO8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 8 bit of data memory address) into 8 bit immediate value of
+SUBI insn. */
+ BFD_RELOC_AVR_HI8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(most high 8 bit of program memory address) into 8 bit immediate value
+of LDI or SUBI insn. */
+ BFD_RELOC_AVR_HH8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_LO8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value
+(command address) into 8 bit immediate value of LDI insn. If the address
+is beyond the 128k boundary, the linker inserts a jump stub for this reloc
+in the lower 128k. */
+ BFD_RELOC_AVR_LO8_LDI_GS,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HI8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of command address) into 8 bit immediate value of LDI insn. If the address
+is beyond the 128k boundary, the linker inserts a jump stub for this reloc
+below 128k. */
+ BFD_RELOC_AVR_HI8_LDI_GS,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HH8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(usually command address) into 8 bit immediate value of SUBI insn. */
+ BFD_RELOC_AVR_LO8_LDI_PM_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 8 bit of 16 bit command address) into 8 bit immediate value
+of SUBI insn. */
+ BFD_RELOC_AVR_HI8_LDI_PM_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 6 bit of 22 bit command address) into 8 bit immediate
+value of SUBI insn. */
+ BFD_RELOC_AVR_HH8_LDI_PM_NEG,
+
+/* This is a 32 bit reloc for the AVR that stores 23 bit value
+into 22 bits. */
+ BFD_RELOC_AVR_CALL,
+
+/* This is a 16 bit reloc for the AVR that stores all needed bits
+for absolute addressing with ldi with overflow check to linktime */
+ BFD_RELOC_AVR_LDI,
+
+/* This is a 6 bit reloc for the AVR that stores offset for ldd/std
+instructions */
+ BFD_RELOC_AVR_6,
+
+/* This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
+instructions */
+ BFD_RELOC_AVR_6_ADIW,
+
+/* Direct 12 bit. */
+ BFD_RELOC_390_12,
+
+/* 12 bit GOT offset. */
+ BFD_RELOC_390_GOT12,
+
+/* 32 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT32,
+
+/* Copy symbol at runtime. */
+ BFD_RELOC_390_COPY,
+
+/* Create GOT entry. */
+ BFD_RELOC_390_GLOB_DAT,
+
+/* Create PLT entry. */
+ BFD_RELOC_390_JMP_SLOT,
+
+/* Adjust by program base. */
+ BFD_RELOC_390_RELATIVE,
+
+/* 32 bit PC relative offset to GOT. */
+ BFD_RELOC_390_GOTPC,
+
+/* 16 bit GOT offset. */
+ BFD_RELOC_390_GOT16,
+
+/* PC relative 16 bit shifted by 1. */
+ BFD_RELOC_390_PC16DBL,
+
+/* 16 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT16DBL,
+
+/* PC relative 32 bit shifted by 1. */
+ BFD_RELOC_390_PC32DBL,
+
+/* 32 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT32DBL,
+
+/* 32 bit PC rel. GOT shifted by 1. */
+ BFD_RELOC_390_GOTPCDBL,
+
+/* 64 bit GOT offset. */
+ BFD_RELOC_390_GOT64,
+
+/* 64 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT64,
+
+/* 32 bit rel. offset to GOT entry. */
+ BFD_RELOC_390_GOTENT,
+
+/* 64 bit offset to GOT. */
+ BFD_RELOC_390_GOTOFF64,
+
+/* 12-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT12,
+
+/* 16-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT16,
+
+/* 32-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT32,
+
+/* 64-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT64,
+
+/* 32-bit rel. offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLTENT,
+
+/* 16-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF16,
+
+/* 32-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF32,
+
+/* 64-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF64,
+
+/* s390 tls relocations. */
+ BFD_RELOC_390_TLS_LOAD,
+ BFD_RELOC_390_TLS_GDCALL,
+ BFD_RELOC_390_TLS_LDCALL,
+ BFD_RELOC_390_TLS_GD32,
+ BFD_RELOC_390_TLS_GD64,
+ BFD_RELOC_390_TLS_GOTIE12,
+ BFD_RELOC_390_TLS_GOTIE32,
+ BFD_RELOC_390_TLS_GOTIE64,
+ BFD_RELOC_390_TLS_LDM32,
+ BFD_RELOC_390_TLS_LDM64,
+ BFD_RELOC_390_TLS_IE32,
+ BFD_RELOC_390_TLS_IE64,
+ BFD_RELOC_390_TLS_IEENT,
+ BFD_RELOC_390_TLS_LE32,
+ BFD_RELOC_390_TLS_LE64,
+ BFD_RELOC_390_TLS_LDO32,
+ BFD_RELOC_390_TLS_LDO64,
+ BFD_RELOC_390_TLS_DTPMOD,
+ BFD_RELOC_390_TLS_DTPOFF,
+ BFD_RELOC_390_TLS_TPOFF,
+
+/* Long displacement extension. */
+ BFD_RELOC_390_20,
+ BFD_RELOC_390_GOT20,
+ BFD_RELOC_390_GOTPLT20,
+ BFD_RELOC_390_TLS_GOTIE20,
+
+/* Score relocations
+Low 16 bit for load/store */
+ BFD_RELOC_SCORE_GPREL15,
+
+/* This is a 24-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_DUMMY2,
+ BFD_RELOC_SCORE_JMP,
+
+/* This is a 19-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_BRANCH,
+
+/* This is a 32-bit reloc for 48-bit instructions. */
+ BFD_RELOC_SCORE_IMM30,
+
+/* This is a 32-bit reloc for 48-bit instructions. */
+ BFD_RELOC_SCORE_IMM32,
+
+/* This is a 11-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE16_JMP,
+
+/* This is a 8-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE16_BRANCH,
+
+/* This is a 9-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_BCMP,
+
+/* Undocumented Score relocs */
+ BFD_RELOC_SCORE_GOT15,
+ BFD_RELOC_SCORE_GOT_LO16,
+ BFD_RELOC_SCORE_CALL15,
+ BFD_RELOC_SCORE_DUMMY_HI16,
+
+/* Scenix IP2K - 9-bit register number / data address */
+ BFD_RELOC_IP2K_FR9,
+
+/* Scenix IP2K - 4-bit register/data bank number */
+ BFD_RELOC_IP2K_BANK,
+
+/* Scenix IP2K - low 13 bits of instruction word address */
+ BFD_RELOC_IP2K_ADDR16CJP,
+
+/* Scenix IP2K - high 3 bits of instruction word address */
+ BFD_RELOC_IP2K_PAGE3,
+
+/* Scenix IP2K - ext/low/high 8 bits of data address */
+ BFD_RELOC_IP2K_LO8DATA,
+ BFD_RELOC_IP2K_HI8DATA,
+ BFD_RELOC_IP2K_EX8DATA,
+
+/* Scenix IP2K - low/high 8 bits of instruction word address */
+ BFD_RELOC_IP2K_LO8INSN,
+ BFD_RELOC_IP2K_HI8INSN,
+
+/* Scenix IP2K - even/odd PC modifier to modify snb pcl.0 */
+ BFD_RELOC_IP2K_PC_SKIP,
+
+/* Scenix IP2K - 16 bit word address in text section. */
+ BFD_RELOC_IP2K_TEXT,
+
+/* Scenix IP2K - 7-bit sp or dp offset */
+ BFD_RELOC_IP2K_FR_OFFSET,
+
+/* Scenix VPE4K coprocessor - data/insn-space addressing */
+ BFD_RELOC_VPE4KMATH_DATA,
+ BFD_RELOC_VPE4KMATH_INSN,
+
+/* These two relocations are used by the linker to determine which of
+the entries in a C++ virtual function table are actually used. When
+the --gc-sections option is given, the linker will zero out the entries
+that are not used, so that the code for those functions need not be
+included in the output.
+
+VTABLE_INHERIT is a zero-space relocation used to describe to the
+linker the inheritance tree of a C++ virtual function table. The
+relocation's symbol should be the parent class' vtable, and the
+relocation should be located at the child vtable.
+
+VTABLE_ENTRY is a zero-space relocation that describes the use of a
+virtual function table entry. The reloc's symbol should refer to the
+table of the class mentioned in the code. Off of that base, an offset
+describes the entry that is being used. For Rela hosts, this offset
+is stored in the reloc's addend. For Rel hosts, we are forced to put
+this offset in the reloc's section offset. */
+ BFD_RELOC_VTABLE_INHERIT,
+ BFD_RELOC_VTABLE_ENTRY,
+
+/* Intel IA64 Relocations. */
+ BFD_RELOC_IA64_IMM14,
+ BFD_RELOC_IA64_IMM22,
+ BFD_RELOC_IA64_IMM64,
+ BFD_RELOC_IA64_DIR32MSB,
+ BFD_RELOC_IA64_DIR32LSB,
+ BFD_RELOC_IA64_DIR64MSB,
+ BFD_RELOC_IA64_DIR64LSB,
+ BFD_RELOC_IA64_GPREL22,
+ BFD_RELOC_IA64_GPREL64I,
+ BFD_RELOC_IA64_GPREL32MSB,
+ BFD_RELOC_IA64_GPREL32LSB,
+ BFD_RELOC_IA64_GPREL64MSB,
+ BFD_RELOC_IA64_GPREL64LSB,
+ BFD_RELOC_IA64_LTOFF22,
+ BFD_RELOC_IA64_LTOFF64I,
+ BFD_RELOC_IA64_PLTOFF22,
+ BFD_RELOC_IA64_PLTOFF64I,
+ BFD_RELOC_IA64_PLTOFF64MSB,
+ BFD_RELOC_IA64_PLTOFF64LSB,
+ BFD_RELOC_IA64_FPTR64I,
+ BFD_RELOC_IA64_FPTR32MSB,
+ BFD_RELOC_IA64_FPTR32LSB,
+ BFD_RELOC_IA64_FPTR64MSB,
+ BFD_RELOC_IA64_FPTR64LSB,
+ BFD_RELOC_IA64_PCREL21B,
+ BFD_RELOC_IA64_PCREL21BI,
+ BFD_RELOC_IA64_PCREL21M,
+ BFD_RELOC_IA64_PCREL21F,
+ BFD_RELOC_IA64_PCREL22,
+ BFD_RELOC_IA64_PCREL60B,
+ BFD_RELOC_IA64_PCREL64I,
+ BFD_RELOC_IA64_PCREL32MSB,
+ BFD_RELOC_IA64_PCREL32LSB,
+ BFD_RELOC_IA64_PCREL64MSB,
+ BFD_RELOC_IA64_PCREL64LSB,
+ BFD_RELOC_IA64_LTOFF_FPTR22,
+ BFD_RELOC_IA64_LTOFF_FPTR64I,
+ BFD_RELOC_IA64_LTOFF_FPTR32MSB,
+ BFD_RELOC_IA64_LTOFF_FPTR32LSB,
+ BFD_RELOC_IA64_LTOFF_FPTR64MSB,
+ BFD_RELOC_IA64_LTOFF_FPTR64LSB,
+ BFD_RELOC_IA64_SEGREL32MSB,
+ BFD_RELOC_IA64_SEGREL32LSB,
+ BFD_RELOC_IA64_SEGREL64MSB,
+ BFD_RELOC_IA64_SEGREL64LSB,
+ BFD_RELOC_IA64_SECREL32MSB,
+ BFD_RELOC_IA64_SECREL32LSB,
+ BFD_RELOC_IA64_SECREL64MSB,
+ BFD_RELOC_IA64_SECREL64LSB,
+ BFD_RELOC_IA64_REL32MSB,
+ BFD_RELOC_IA64_REL32LSB,
+ BFD_RELOC_IA64_REL64MSB,
+ BFD_RELOC_IA64_REL64LSB,
+ BFD_RELOC_IA64_LTV32MSB,
+ BFD_RELOC_IA64_LTV32LSB,
+ BFD_RELOC_IA64_LTV64MSB,
+ BFD_RELOC_IA64_LTV64LSB,
+ BFD_RELOC_IA64_IPLTMSB,
+ BFD_RELOC_IA64_IPLTLSB,
+ BFD_RELOC_IA64_COPY,
+ BFD_RELOC_IA64_LTOFF22X,
+ BFD_RELOC_IA64_LDXMOV,
+ BFD_RELOC_IA64_TPREL14,
+ BFD_RELOC_IA64_TPREL22,
+ BFD_RELOC_IA64_TPREL64I,
+ BFD_RELOC_IA64_TPREL64MSB,
+ BFD_RELOC_IA64_TPREL64LSB,
+ BFD_RELOC_IA64_LTOFF_TPREL22,
+ BFD_RELOC_IA64_DTPMOD64MSB,
+ BFD_RELOC_IA64_DTPMOD64LSB,
+ BFD_RELOC_IA64_LTOFF_DTPMOD22,
+ BFD_RELOC_IA64_DTPREL14,
+ BFD_RELOC_IA64_DTPREL22,
+ BFD_RELOC_IA64_DTPREL64I,
+ BFD_RELOC_IA64_DTPREL32MSB,
+ BFD_RELOC_IA64_DTPREL32LSB,
+ BFD_RELOC_IA64_DTPREL64MSB,
+ BFD_RELOC_IA64_DTPREL64LSB,
+ BFD_RELOC_IA64_LTOFF_DTPREL22,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bit high part of an absolute address. */
+ BFD_RELOC_M68HC11_HI8,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bit low part of an absolute address. */
+ BFD_RELOC_M68HC11_LO8,
+
+/* Motorola 68HC11 reloc.
+This is the 3 bit of a value. */
+ BFD_RELOC_M68HC11_3B,
+
+/* Motorola 68HC11 reloc.
+This reloc marks the beginning of a jump/call instruction.
+It is used for linker relaxation to correctly identify beginning
+of instruction and change some branches to use PC-relative
+addressing mode. */
+ BFD_RELOC_M68HC11_RL_JUMP,
+
+/* Motorola 68HC11 reloc.
+This reloc marks a group of several instructions that gcc generates
+and for which the linker relaxation pass can modify and/or remove
+some of them. */
+ BFD_RELOC_M68HC11_RL_GROUP,
+
+/* Motorola 68HC11 reloc.
+This is the 16-bit lower part of an address. It is used for 'call'
+instruction to specify the symbol address without any special
+transformation (due to memory bank window). */
+ BFD_RELOC_M68HC11_LO16,
+
+/* Motorola 68HC11 reloc.
+This is a 8-bit reloc that specifies the page number of an address.
+It is used by 'call' instruction to specify the page number of
+the symbol. */
+ BFD_RELOC_M68HC11_PAGE,
+
+/* Motorola 68HC11 reloc.
+This is a 24-bit reloc that represents the address with a 16-bit
+value and a 8-bit page number. The symbol address is transformed
+to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
+ BFD_RELOC_M68HC11_24,
+
+/* Motorola 68HC12 reloc.
+This is the 5 bits of a value. */
+ BFD_RELOC_M68HC12_5B,
+
+/* NS CR16C Relocations. */
+ BFD_RELOC_16C_NUM08,
+ BFD_RELOC_16C_NUM08_C,
+ BFD_RELOC_16C_NUM16,
+ BFD_RELOC_16C_NUM16_C,
+ BFD_RELOC_16C_NUM32,
+ BFD_RELOC_16C_NUM32_C,
+ BFD_RELOC_16C_DISP04,
+ BFD_RELOC_16C_DISP04_C,
+ BFD_RELOC_16C_DISP08,
+ BFD_RELOC_16C_DISP08_C,
+ BFD_RELOC_16C_DISP16,
+ BFD_RELOC_16C_DISP16_C,
+ BFD_RELOC_16C_DISP24,
+ BFD_RELOC_16C_DISP24_C,
+ BFD_RELOC_16C_DISP24a,
+ BFD_RELOC_16C_DISP24a_C,
+ BFD_RELOC_16C_REG04,
+ BFD_RELOC_16C_REG04_C,
+ BFD_RELOC_16C_REG04a,
+ BFD_RELOC_16C_REG04a_C,
+ BFD_RELOC_16C_REG14,
+ BFD_RELOC_16C_REG14_C,
+ BFD_RELOC_16C_REG16,
+ BFD_RELOC_16C_REG16_C,
+ BFD_RELOC_16C_REG20,
+ BFD_RELOC_16C_REG20_C,
+ BFD_RELOC_16C_ABS20,
+ BFD_RELOC_16C_ABS20_C,
+ BFD_RELOC_16C_ABS24,
+ BFD_RELOC_16C_ABS24_C,
+ BFD_RELOC_16C_IMM04,
+ BFD_RELOC_16C_IMM04_C,
+ BFD_RELOC_16C_IMM16,
+ BFD_RELOC_16C_IMM16_C,
+ BFD_RELOC_16C_IMM20,
+ BFD_RELOC_16C_IMM20_C,
+ BFD_RELOC_16C_IMM24,
+ BFD_RELOC_16C_IMM24_C,
+ BFD_RELOC_16C_IMM32,
+ BFD_RELOC_16C_IMM32_C,
+
+/* NS CR16 Relocations. */
+ BFD_RELOC_CR16_NUM8,
+ BFD_RELOC_CR16_NUM16,
+ BFD_RELOC_CR16_NUM32,
+ BFD_RELOC_CR16_NUM32a,
+ BFD_RELOC_CR16_REGREL0,
+ BFD_RELOC_CR16_REGREL4,
+ BFD_RELOC_CR16_REGREL4a,
+ BFD_RELOC_CR16_REGREL14,
+ BFD_RELOC_CR16_REGREL14a,
+ BFD_RELOC_CR16_REGREL16,
+ BFD_RELOC_CR16_REGREL20,
+ BFD_RELOC_CR16_REGREL20a,
+ BFD_RELOC_CR16_ABS20,
+ BFD_RELOC_CR16_ABS24,
+ BFD_RELOC_CR16_IMM4,
+ BFD_RELOC_CR16_IMM8,
+ BFD_RELOC_CR16_IMM16,
+ BFD_RELOC_CR16_IMM20,
+ BFD_RELOC_CR16_IMM24,
+ BFD_RELOC_CR16_IMM32,
+ BFD_RELOC_CR16_IMM32a,
+ BFD_RELOC_CR16_DISP4,
+ BFD_RELOC_CR16_DISP8,
+ BFD_RELOC_CR16_DISP16,
+ BFD_RELOC_CR16_DISP20,
+ BFD_RELOC_CR16_DISP24,
+ BFD_RELOC_CR16_DISP24a,
+ BFD_RELOC_CR16_SWITCH8,
+ BFD_RELOC_CR16_SWITCH16,
+ BFD_RELOC_CR16_SWITCH32,
+ BFD_RELOC_CR16_GOT_REGREL20,
+ BFD_RELOC_CR16_GOTC_REGREL20,
+ BFD_RELOC_CR16_GLOB_DAT,
+
+/* NS CRX Relocations. */
+ BFD_RELOC_CRX_REL4,
+ BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP,
+ BFD_RELOC_CRX_REL16,
+ BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32,
+ BFD_RELOC_CRX_REGREL12,
+ BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28,
+ BFD_RELOC_CRX_REGREL32,
+ BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32,
+ BFD_RELOC_CRX_NUM8,
+ BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32,
+ BFD_RELOC_CRX_IMM16,
+ BFD_RELOC_CRX_IMM32,
+ BFD_RELOC_CRX_SWITCH8,
+ BFD_RELOC_CRX_SWITCH16,
+ BFD_RELOC_CRX_SWITCH32,
+
+/* These relocs are only used within the CRIS assembler. They are not
+(at present) written to any object files. */
+ BFD_RELOC_CRIS_BDISP8,
+ BFD_RELOC_CRIS_UNSIGNED_5,
+ BFD_RELOC_CRIS_SIGNED_6,
+ BFD_RELOC_CRIS_UNSIGNED_6,
+ BFD_RELOC_CRIS_SIGNED_8,
+ BFD_RELOC_CRIS_UNSIGNED_8,
+ BFD_RELOC_CRIS_SIGNED_16,
+ BFD_RELOC_CRIS_UNSIGNED_16,
+ BFD_RELOC_CRIS_LAPCQ_OFFSET,
+ BFD_RELOC_CRIS_UNSIGNED_4,
+
+/* Relocs used in ELF shared libraries for CRIS. */
+ BFD_RELOC_CRIS_COPY,
+ BFD_RELOC_CRIS_GLOB_DAT,
+ BFD_RELOC_CRIS_JUMP_SLOT,
+ BFD_RELOC_CRIS_RELATIVE,
+
+/* 32-bit offset to symbol-entry within GOT. */
+ BFD_RELOC_CRIS_32_GOT,
+
+/* 16-bit offset to symbol-entry within GOT. */
+ BFD_RELOC_CRIS_16_GOT,
+
+/* 32-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_CRIS_32_GOTPLT,
+
+/* 16-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_CRIS_16_GOTPLT,
+
+/* 32-bit offset to symbol, relative to GOT. */
+ BFD_RELOC_CRIS_32_GOTREL,
+
+/* 32-bit offset to symbol with PLT entry, relative to GOT. */
+ BFD_RELOC_CRIS_32_PLT_GOTREL,
+
+/* 32-bit offset to symbol with PLT entry, relative to this relocation. */
+ BFD_RELOC_CRIS_32_PLT_PCREL,
+
+/* Relocs used in TLS code for CRIS. */
+ BFD_RELOC_CRIS_32_GOT_GD,
+ BFD_RELOC_CRIS_16_GOT_GD,
+ BFD_RELOC_CRIS_32_GD,
+ BFD_RELOC_CRIS_DTP,
+ BFD_RELOC_CRIS_32_DTPREL,
+ BFD_RELOC_CRIS_16_DTPREL,
+ BFD_RELOC_CRIS_32_GOT_TPREL,
+ BFD_RELOC_CRIS_16_GOT_TPREL,
+ BFD_RELOC_CRIS_32_TPREL,
+ BFD_RELOC_CRIS_16_TPREL,
+ BFD_RELOC_CRIS_DTPMOD,
+ BFD_RELOC_CRIS_32_IE,
+
+/* Intel i860 Relocations. */
+ BFD_RELOC_860_COPY,
+ BFD_RELOC_860_GLOB_DAT,
+ BFD_RELOC_860_JUMP_SLOT,
+ BFD_RELOC_860_RELATIVE,
+ BFD_RELOC_860_PC26,
+ BFD_RELOC_860_PLT26,
+ BFD_RELOC_860_PC16,
+ BFD_RELOC_860_LOW0,
+ BFD_RELOC_860_SPLIT0,
+ BFD_RELOC_860_LOW1,
+ BFD_RELOC_860_SPLIT1,
+ BFD_RELOC_860_LOW2,
+ BFD_RELOC_860_SPLIT2,
+ BFD_RELOC_860_LOW3,
+ BFD_RELOC_860_LOGOT0,
+ BFD_RELOC_860_SPGOT0,
+ BFD_RELOC_860_LOGOT1,
+ BFD_RELOC_860_SPGOT1,
+ BFD_RELOC_860_LOGOTOFF0,
+ BFD_RELOC_860_SPGOTOFF0,
+ BFD_RELOC_860_LOGOTOFF1,
+ BFD_RELOC_860_SPGOTOFF1,
+ BFD_RELOC_860_LOGOTOFF2,
+ BFD_RELOC_860_LOGOTOFF3,
+ BFD_RELOC_860_LOPC,
+ BFD_RELOC_860_HIGHADJ,
+ BFD_RELOC_860_HAGOT,
+ BFD_RELOC_860_HAGOTOFF,
+ BFD_RELOC_860_HAPC,
+ BFD_RELOC_860_HIGH,
+ BFD_RELOC_860_HIGOT,
+ BFD_RELOC_860_HIGOTOFF,
+
+/* OpenRISC Relocations. */
+ BFD_RELOC_OPENRISC_ABS_26,
+ BFD_RELOC_OPENRISC_REL_26,
+
+/* H8 elf Relocations. */
+ BFD_RELOC_H8_DIR16A8,
+ BFD_RELOC_H8_DIR16R8,
+ BFD_RELOC_H8_DIR24A8,
+ BFD_RELOC_H8_DIR24R8,
+ BFD_RELOC_H8_DIR32A16,
+
+/* Sony Xstormy16 Relocations. */
+ BFD_RELOC_XSTORMY16_REL_12,
+ BFD_RELOC_XSTORMY16_12,
+ BFD_RELOC_XSTORMY16_24,
+ BFD_RELOC_XSTORMY16_FPTR16,
+
+/* Self-describing complex relocations. */
+ BFD_RELOC_RELC,
+
+
+/* Infineon Relocations. */
+ BFD_RELOC_XC16X_PAG,
+ BFD_RELOC_XC16X_POF,
+ BFD_RELOC_XC16X_SEG,
+ BFD_RELOC_XC16X_SOF,
+
+/* Relocations used by VAX ELF. */
+ BFD_RELOC_VAX_GLOB_DAT,
+ BFD_RELOC_VAX_JMP_SLOT,
+ BFD_RELOC_VAX_RELATIVE,
+
+/* Morpho MT - 16 bit immediate relocation. */
+ BFD_RELOC_MT_PC16,
+
+/* Morpho MT - Hi 16 bits of an address. */
+ BFD_RELOC_MT_HI16,
+
+/* Morpho MT - Low 16 bits of an address. */
+ BFD_RELOC_MT_LO16,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTINHERIT,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTENTRY,
+
+/* Morpho MT - 8 bit immediate relocation. */
+ BFD_RELOC_MT_PCINSN8,
+
+/* msp430 specific relocation codes */
+ BFD_RELOC_MSP430_10_PCREL,
+ BFD_RELOC_MSP430_16_PCREL,
+ BFD_RELOC_MSP430_16,
+ BFD_RELOC_MSP430_16_PCREL_BYTE,
+ BFD_RELOC_MSP430_16_BYTE,
+ BFD_RELOC_MSP430_2X_PCREL,
+ BFD_RELOC_MSP430_RL_PCREL,
+
+/* IQ2000 Relocations. */
+ BFD_RELOC_IQ2000_OFFSET_16,
+ BFD_RELOC_IQ2000_OFFSET_21,
+ BFD_RELOC_IQ2000_UHI16,
+
+/* Special Xtensa relocation used only by PLT entries in ELF shared
+objects to indicate that the runtime linker should set the value
+to one of its own internal functions or data structures. */
+ BFD_RELOC_XTENSA_RTLD,
+
+/* Xtensa relocations for ELF shared objects. */
+ BFD_RELOC_XTENSA_GLOB_DAT,
+ BFD_RELOC_XTENSA_JMP_SLOT,
+ BFD_RELOC_XTENSA_RELATIVE,
+
+/* Xtensa relocation used in ELF object files for symbols that may require
+PLT entries. Otherwise, this is just a generic 32-bit relocation. */
+ BFD_RELOC_XTENSA_PLT,
+
+/* Xtensa relocations to mark the difference of two local symbols.
+These are only needed to support linker relaxation and can be ignored
+when not relaxing. The field is set to the value of the difference
+assuming no relaxation. The relocation encodes the position of the
+first symbol so the linker can determine whether to adjust the field
+value. */
+ BFD_RELOC_XTENSA_DIFF8,
+ BFD_RELOC_XTENSA_DIFF16,
+ BFD_RELOC_XTENSA_DIFF32,
+
+/* Generic Xtensa relocations for instruction operands. Only the slot
+number is encoded in the relocation. The relocation applies to the
+last PC-relative immediate operand, or if there are no PC-relative
+immediates, to the last immediate operand. */
+ BFD_RELOC_XTENSA_SLOT0_OP,
+ BFD_RELOC_XTENSA_SLOT1_OP,
+ BFD_RELOC_XTENSA_SLOT2_OP,
+ BFD_RELOC_XTENSA_SLOT3_OP,
+ BFD_RELOC_XTENSA_SLOT4_OP,
+ BFD_RELOC_XTENSA_SLOT5_OP,
+ BFD_RELOC_XTENSA_SLOT6_OP,
+ BFD_RELOC_XTENSA_SLOT7_OP,
+ BFD_RELOC_XTENSA_SLOT8_OP,
+ BFD_RELOC_XTENSA_SLOT9_OP,
+ BFD_RELOC_XTENSA_SLOT10_OP,
+ BFD_RELOC_XTENSA_SLOT11_OP,
+ BFD_RELOC_XTENSA_SLOT12_OP,
+ BFD_RELOC_XTENSA_SLOT13_OP,
+ BFD_RELOC_XTENSA_SLOT14_OP,
+
+/* Alternate Xtensa relocations. Only the slot is encoded in the
+relocation. The meaning of these relocations is opcode-specific. */
+ BFD_RELOC_XTENSA_SLOT0_ALT,
+ BFD_RELOC_XTENSA_SLOT1_ALT,
+ BFD_RELOC_XTENSA_SLOT2_ALT,
+ BFD_RELOC_XTENSA_SLOT3_ALT,
+ BFD_RELOC_XTENSA_SLOT4_ALT,
+ BFD_RELOC_XTENSA_SLOT5_ALT,
+ BFD_RELOC_XTENSA_SLOT6_ALT,
+ BFD_RELOC_XTENSA_SLOT7_ALT,
+ BFD_RELOC_XTENSA_SLOT8_ALT,
+ BFD_RELOC_XTENSA_SLOT9_ALT,
+ BFD_RELOC_XTENSA_SLOT10_ALT,
+ BFD_RELOC_XTENSA_SLOT11_ALT,
+ BFD_RELOC_XTENSA_SLOT12_ALT,
+ BFD_RELOC_XTENSA_SLOT13_ALT,
+ BFD_RELOC_XTENSA_SLOT14_ALT,
+
+/* Xtensa relocations for backward compatibility. These have all been
+replaced by BFD_RELOC_XTENSA_SLOT0_OP. */
+ BFD_RELOC_XTENSA_OP0,
+ BFD_RELOC_XTENSA_OP1,
+ BFD_RELOC_XTENSA_OP2,
+
+/* Xtensa relocation to mark that the assembler expanded the
+instructions from an original target. The expansion size is
+encoded in the reloc size. */
+ BFD_RELOC_XTENSA_ASM_EXPAND,
+
+/* Xtensa relocation to mark that the linker should simplify
+assembler-expanded instructions. This is commonly used
+internally by the linker after analysis of a
+BFD_RELOC_XTENSA_ASM_EXPAND. */
+ BFD_RELOC_XTENSA_ASM_SIMPLIFY,
+
+/* Xtensa TLS relocations. */
+ BFD_RELOC_XTENSA_TLSDESC_FN,
+ BFD_RELOC_XTENSA_TLSDESC_ARG,
+ BFD_RELOC_XTENSA_TLS_DTPOFF,
+ BFD_RELOC_XTENSA_TLS_TPOFF,
+ BFD_RELOC_XTENSA_TLS_FUNC,
+ BFD_RELOC_XTENSA_TLS_ARG,
+ BFD_RELOC_XTENSA_TLS_CALL,
+
+/* 8 bit signed offset in (ix+d) or (iy+d). */
+ BFD_RELOC_Z80_DISP8,
+
+/* DJNZ offset. */
+ BFD_RELOC_Z8K_DISP7,
+
+/* CALR offset. */
+ BFD_RELOC_Z8K_CALLR,
+
+/* 4 bit value. */
+ BFD_RELOC_Z8K_IMM4L,
+
+/* Lattice Mico32 relocations. */
+ BFD_RELOC_LM32_CALL,
+ BFD_RELOC_LM32_BRANCH,
+ BFD_RELOC_LM32_16_GOT,
+ BFD_RELOC_LM32_GOTOFF_HI16,
+ BFD_RELOC_LM32_GOTOFF_LO16,
+ BFD_RELOC_LM32_COPY,
+ BFD_RELOC_LM32_GLOB_DAT,
+ BFD_RELOC_LM32_JMP_SLOT,
+ BFD_RELOC_LM32_RELATIVE,
+
+/* Difference between two section addreses. Must be followed by a
+BFD_RELOC_MACH_O_PAIR. */
+ BFD_RELOC_MACH_O_SECTDIFF,
+
+/* Mach-O generic relocations. */
+ BFD_RELOC_MACH_O_PAIR,
+
+/* This is a 32 bit reloc for the microblaze that stores the
+low 16 bits of a value */
+ BFD_RELOC_MICROBLAZE_32_LO,
+
+/* This is a 32 bit pc-relative reloc for the microblaze that
+stores the low 16 bits of a value */
+ BFD_RELOC_MICROBLAZE_32_LO_PCREL,
+
+/* This is a 32 bit reloc for the microblaze that stores a
+value relative to the read-only small data area anchor */
+ BFD_RELOC_MICROBLAZE_32_ROSDA,
+
+/* This is a 32 bit reloc for the microblaze that stores a
+value relative to the read-write small data area anchor */
+ BFD_RELOC_MICROBLAZE_32_RWSDA,
+
+/* This is a 32 bit reloc for the microblaze to handle
+expressions of the form "Symbol Op Symbol" */
+ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). No relocation is
+done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64_NONE,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+PC-relative GOT offset */
+ BFD_RELOC_MICROBLAZE_64_GOTPC,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+GOT offset */
+ BFD_RELOC_MICROBLAZE_64_GOT,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+PC-relative offset into PLT */
+ BFD_RELOC_MICROBLAZE_64_PLT,
+
+/* This is a 64 bit reloc that stores the 32 bit GOT relative
+value in two words (with an imm instruction). The relocation is
+relative offset from _GLOBAL_OFFSET_TABLE_ */
+ BFD_RELOC_MICROBLAZE_64_GOTOFF,
+
+/* This is a 32 bit reloc that stores the 32 bit GOT relative
+value in a word. The relocation is relative offset from */
+ BFD_RELOC_MICROBLAZE_32_GOTOFF,
+
+/* This is used to tell the dynamic linker to copy the value out of
+the dynamic object into the runtime process image. */
+ BFD_RELOC_MICROBLAZE_COPY,
+ BFD_RELOC_UNUSED };
+typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
+reloc_howto_type *bfd_reloc_type_lookup
+ (bfd *abfd, bfd_reloc_code_real_type code);
+reloc_howto_type *bfd_reloc_name_lookup
+ (bfd *abfd, const char *reloc_name);
+
+const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
+
+/* Extracted from syms.c. */
+
+typedef struct bfd_symbol
+{
+ /* A pointer to the BFD which owns the symbol. This information
+ is necessary so that a back end can work out what additional
+ information (invisible to the application writer) is carried
+ with the symbol.
+
+ This field is *almost* redundant, since you can use section->owner
+ instead, except that some symbols point to the global sections
+ bfd_{abs,com,und}_section. This could be fixed by making
+ these globals be per-bfd (or per-target-flavor). FIXME. */
+ struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */
+
+ /* The text of the symbol. The name is left alone, and not copied; the
+ application may not alter it. */
+ const char *name;
+
+ /* The value of the symbol. This really should be a union of a
+ numeric value with a pointer, since some flags indicate that
+ a pointer to another symbol is stored here. */
+ symvalue value;
+
+ /* Attributes of a symbol. */
+#define BSF_NO_FLAGS 0x00
+
+ /* The symbol has local scope; <<static>> in <<C>>. The value
+ is the offset into the section of the data. */
+#define BSF_LOCAL (1 << 0)
+
+ /* The symbol has global scope; initialized data in <<C>>. The
+ value is the offset into the section of the data. */
+#define BSF_GLOBAL (1 << 1)
+
+ /* The symbol has global scope and is exported. The value is
+ the offset into the section of the data. */
+#define BSF_EXPORT BSF_GLOBAL /* No real difference. */
+
+ /* A normal C symbol would be one of:
+ <<BSF_LOCAL>>, <<BSF_COMMON>>, <<BSF_UNDEFINED>> or
+ <<BSF_GLOBAL>>. */
+
+ /* The symbol is a debugging record. The value has an arbitrary
+ meaning, unless BSF_DEBUGGING_RELOC is also set. */
+#define BSF_DEBUGGING (1 << 2)
+
+ /* The symbol denotes a function entry point. Used in ELF,
+ perhaps others someday. */
+#define BSF_FUNCTION (1 << 3)
+
+ /* Used by the linker. */
+#define BSF_KEEP (1 << 5)
+#define BSF_KEEP_G (1 << 6)
+
+ /* A weak global symbol, overridable without warnings by
+ a regular global symbol of the same name. */
+#define BSF_WEAK (1 << 7)
+
+ /* This symbol was created to point to a section, e.g. ELF's
+ STT_SECTION symbols. */
+#define BSF_SECTION_SYM (1 << 8)
+
+ /* The symbol used to be a common symbol, but now it is
+ allocated. */
+#define BSF_OLD_COMMON (1 << 9)
+
+ /* In some files the type of a symbol sometimes alters its
+ location in an output file - ie in coff a <<ISFCN>> symbol
+ which is also <<C_EXT>> symbol appears where it was
+ declared and not at the end of a section. This bit is set
+ by the target BFD part to convey this information. */
+#define BSF_NOT_AT_END (1 << 10)
+
+ /* Signal that the symbol is the label of constructor section. */
+#define BSF_CONSTRUCTOR (1 << 11)
+
+ /* Signal that the symbol is a warning symbol. The name is a
+ warning. The name of the next symbol is the one to warn about;
+ if a reference is made to a symbol with the same name as the next
+ symbol, a warning is issued by the linker. */
+#define BSF_WARNING (1 << 12)
+
+ /* Signal that the symbol is indirect. This symbol is an indirect
+ pointer to the symbol with the same name as the next symbol. */
+#define BSF_INDIRECT (1 << 13)
+
+ /* BSF_FILE marks symbols that contain a file name. This is used
+ for ELF STT_FILE symbols. */
+#define BSF_FILE (1 << 14)
+
+ /* Symbol is from dynamic linking information. */
+#define BSF_DYNAMIC (1 << 15)
+
+ /* The symbol denotes a data object. Used in ELF, and perhaps
+ others someday. */
+#define BSF_OBJECT (1 << 16)
+
+ /* This symbol is a debugging symbol. The value is the offset
+ into the section of the data. BSF_DEBUGGING should be set
+ as well. */
+#define BSF_DEBUGGING_RELOC (1 << 17)
+
+ /* This symbol is thread local. Used in ELF. */
+#define BSF_THREAD_LOCAL (1 << 18)
+
+ /* This symbol represents a complex relocation expression,
+ with the expression tree serialized in the symbol name. */
+#define BSF_RELC (1 << 19)
+
+ /* This symbol represents a signed complex relocation expression,
+ with the expression tree serialized in the symbol name. */
+#define BSF_SRELC (1 << 20)
+
+ /* This symbol was created by bfd_get_synthetic_symtab. */
+#define BSF_SYNTHETIC (1 << 21)
+
+ /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT.
+ The dynamic linker will compute the value of this symbol by
+ calling the function that it points to. BSF_FUNCTION must
+ also be also set. */
+#define BSF_GNU_INDIRECT_FUNCTION (1 << 22)
+ /* This symbol is a globally unique data object. The dynamic linker
+ will make sure that in the entire process there is just one symbol
+ with this name and type in use. BSF_OBJECT must also be set. */
+#define BSF_GNU_UNIQUE (1 << 23)
+
+ flagword flags;
+
+ /* A pointer to the section to which this symbol is
+ relative. This will always be non NULL, there are special
+ sections for undefined and absolute symbols. */
+ struct bfd_section *section;
+
+ /* Back end special data. */
+ union
+ {
+ void *p;
+ bfd_vma i;
+ }
+ udata;
+}
+asymbol;
+
+#define bfd_get_symtab_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
+
+bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
+
+bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
+
+#define bfd_is_local_label_name(abfd, name) \
+ BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
+
+bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym);
+
+#define bfd_is_target_special_symbol(abfd, sym) \
+ BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym))
+
+#define bfd_canonicalize_symtab(abfd, location) \
+ BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
+
+bfd_boolean bfd_set_symtab
+ (bfd *abfd, asymbol **location, unsigned int count);
+
+void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
+
+#define bfd_make_empty_symbol(abfd) \
+ BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
+
+asymbol *_bfd_generic_make_empty_symbol (bfd *);
+
+#define bfd_make_debug_symbol(abfd,ptr,size) \
+ BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
+
+int bfd_decode_symclass (asymbol *symbol);
+
+bfd_boolean bfd_is_undefined_symclass (int symclass);
+
+void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
+
+bfd_boolean bfd_copy_private_symbol_data
+ (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
+
+#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
+ BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
+ (ibfd, isymbol, obfd, osymbol))
+
+/* Extracted from bfd.c. */
+enum bfd_direction
+ {
+ no_direction = 0,
+ read_direction = 1,
+ write_direction = 2,
+ both_direction = 3
+ };
+
+struct bfd
+{
+ /* A unique identifier of the BFD */
+ unsigned int id;
+
+ /* The filename the application opened the BFD with. */
+ const char *filename;
+
+ /* A pointer to the target jump table. */
+ const struct bfd_target *xvec;
+
+ /* The IOSTREAM, and corresponding IO vector that provide access
+ to the file backing the BFD. */
+ void *iostream;
+ const struct bfd_iovec *iovec;
+
+ /* The caching routines use these to maintain a
+ least-recently-used list of BFDs. */
+ struct bfd *lru_prev, *lru_next;
+
+ /* When a file is closed by the caching routines, BFD retains
+ state information on the file here... */
+ ufile_ptr where;
+
+ /* File modified time, if mtime_set is TRUE. */
+ long mtime;
+
+ /* Reserved for an unimplemented file locking extension. */
+ int ifd;
+
+ /* The format which belongs to the BFD. (object, core, etc.) */
+ bfd_format format;
+
+ /* The direction with which the BFD was opened. */
+ enum bfd_direction direction;
+
+ /* Format_specific flags. */
+ flagword flags;
+
+ /* Values that may appear in the flags field of a BFD. These also
+ appear in the object_flags field of the bfd_target structure, where
+ they indicate the set of flags used by that backend (not all flags
+ are meaningful for all object file formats) (FIXME: at the moment,
+ the object_flags values have mostly just been copied from backend
+ to another, and are not necessarily correct). */
+
+#define BFD_NO_FLAGS 0x00
+
+ /* BFD contains relocation entries. */
+#define HAS_RELOC 0x01
+
+ /* BFD is directly executable. */
+#define EXEC_P 0x02
+
+ /* BFD has line number information (basically used for F_LNNO in a
+ COFF header). */
+#define HAS_LINENO 0x04
+
+ /* BFD has debugging information. */
+#define HAS_DEBUG 0x08
+
+ /* BFD has symbols. */
+#define HAS_SYMS 0x10
+
+ /* BFD has local symbols (basically used for F_LSYMS in a COFF
+ header). */
+#define HAS_LOCALS 0x20
+
+ /* BFD is a dynamic object. */
+#define DYNAMIC 0x40
+
+ /* Text section is write protected (if D_PAGED is not set, this is
+ like an a.out NMAGIC file) (the linker sets this by default, but
+ clears it for -r or -N). */
+#define WP_TEXT 0x80
+
+ /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the
+ linker sets this by default, but clears it for -r or -n or -N). */
+#define D_PAGED 0x100
+
+ /* BFD is relaxable (this means that bfd_relax_section may be able to
+ do something) (sometimes bfd_relax_section can do something even if
+ this is not set). */
+#define BFD_IS_RELAXABLE 0x200
+
+ /* This may be set before writing out a BFD to request using a
+ traditional format. For example, this is used to request that when
+ writing out an a.out object the symbols not be hashed to eliminate
+ duplicates. */
+#define BFD_TRADITIONAL_FORMAT 0x400
+
+ /* This flag indicates that the BFD contents are actually cached
+ in memory. If this is set, iostream points to a bfd_in_memory
+ struct. */
+#define BFD_IN_MEMORY 0x800
+
+ /* The sections in this BFD specify a memory page. */
+#define HAS_LOAD_PAGE 0x1000
+
+ /* This BFD has been created by the linker and doesn't correspond
+ to any input file. */
+#define BFD_LINKER_CREATED 0x2000
+
+ /* This may be set before writing out a BFD to request that it
+ be written using values for UIDs, GIDs, timestamps, etc. that
+ will be consistent from run to run. */
+#define BFD_DETERMINISTIC_OUTPUT 0x4000
+
+ /* Currently my_archive is tested before adding origin to
+ anything. I believe that this can become always an add of
+ origin, with origin set to 0 for non archive files. */
+ ufile_ptr origin;
+
+ /* The origin in the archive of the proxy entry. This will
+ normally be the same as origin, except for thin archives,
+ when it will contain the current offset of the proxy in the
+ thin archive rather than the offset of the bfd in its actual
+ container. */
+ ufile_ptr proxy_origin;
+
+ /* A hash table for section names. */
+ struct bfd_hash_table section_htab;
+
+ /* Pointer to linked list of sections. */
+ struct bfd_section *sections;
+
+ /* The last section on the section list. */
+ struct bfd_section *section_last;
+
+ /* The number of sections. */
+ unsigned int section_count;
+
+ /* Stuff only useful for object files:
+ The start address. */
+ bfd_vma start_address;
+
+ /* Used for input and output. */
+ unsigned int symcount;
+
+ /* Symbol table for output BFD (with symcount entries).
+ Also used by the linker to cache input BFD symbols. */
+ struct bfd_symbol **outsymbols;
+
+ /* Used for slurped dynamic symbol tables. */
+ unsigned int dynsymcount;
+
+ /* Pointer to structure which contains architecture information. */
+ const struct bfd_arch_info *arch_info;
+
+ /* Stuff only useful for archives. */
+ void *arelt_data;
+ struct bfd *my_archive; /* The containing archive BFD. */
+ struct bfd *archive_next; /* The next BFD in the archive. */
+ struct bfd *archive_head; /* The first BFD in the archive. */
+ struct bfd *nested_archives; /* List of nested archive in a flattened
+ thin archive. */
+
+ /* A chain of BFD structures involved in a link. */
+ struct bfd *link_next;
+
+ /* A field used by _bfd_generic_link_add_archive_symbols. This will
+ be used only for archive elements. */
+ int archive_pass;
+
+ /* Used by the back end to hold private data. */
+ union
+ {
+ struct aout_data_struct *aout_data;
+ struct artdata *aout_ar_data;
+ struct _oasys_data *oasys_obj_data;
+ struct _oasys_ar_data *oasys_ar_data;
+ struct coff_tdata *coff_obj_data;
+ struct pe_tdata *pe_obj_data;
+ struct xcoff_tdata *xcoff_obj_data;
+ struct ecoff_tdata *ecoff_obj_data;
+ struct ieee_data_struct *ieee_data;
+ struct ieee_ar_data_struct *ieee_ar_data;
+ struct srec_data_struct *srec_data;
+ struct verilog_data_struct *verilog_data;
+ struct ihex_data_struct *ihex_data;
+ struct tekhex_data_struct *tekhex_data;
+ struct elf_obj_tdata *elf_obj_data;
+ struct nlm_obj_tdata *nlm_obj_data;
+ struct bout_data_struct *bout_data;
+ struct mmo_data_struct *mmo_data;
+ struct sun_core_struct *sun_core_data;
+ struct sco5_core_struct *sco5_core_data;
+ struct trad_core_struct *trad_core_data;
+ struct som_data_struct *som_data;
+ struct hpux_core_struct *hpux_core_data;
+ struct hppabsd_core_struct *hppabsd_core_data;
+ struct sgi_core_struct *sgi_core_data;
+ struct lynx_core_struct *lynx_core_data;
+ struct osf_core_struct *osf_core_data;
+ struct cisco_core_struct *cisco_core_data;
+ struct versados_data_struct *versados_data;
+ struct netbsd_core_struct *netbsd_core_data;
+ struct mach_o_data_struct *mach_o_data;
+ struct mach_o_fat_data_struct *mach_o_fat_data;
+ struct plugin_data_struct *plugin_data;
+ struct bfd_pef_data_struct *pef_data;
+ struct bfd_pef_xlib_data_struct *pef_xlib_data;
+ struct bfd_sym_data_struct *sym_data;
+ void *any;
+ }
+ tdata;
+
+ /* Used by the application to hold private data. */
+ void *usrdata;
+
+ /* Where all the allocated stuff under this BFD goes. This is a
+ struct objalloc *, but we use void * to avoid requiring the inclusion
+ of objalloc.h. */
+ void *memory;
+
+ /* Is the file descriptor being cached? That is, can it be closed as
+ needed, and re-opened when accessed later? */
+ unsigned int cacheable : 1;
+
+ /* Marks whether there was a default target specified when the
+ BFD was opened. This is used to select which matching algorithm
+ to use to choose the back end. */
+ unsigned int target_defaulted : 1;
+
+ /* ... and here: (``once'' means at least once). */
+ unsigned int opened_once : 1;
+
+ /* Set if we have a locally maintained mtime value, rather than
+ getting it from the file each time. */
+ unsigned int mtime_set : 1;
+
+ /* Flag set if symbols from this BFD should not be exported. */
+ unsigned int no_export : 1;
+
+ /* Remember when output has begun, to stop strange things
+ from happening. */
+ unsigned int output_has_begun : 1;
+
+ /* Have archive map. */
+ unsigned int has_armap : 1;
+
+ /* Set if this is a thin archive. */
+ unsigned int is_thin_archive : 1;
+};
+
+typedef enum bfd_error
+{
+ bfd_error_no_error = 0,
+ bfd_error_system_call,
+ bfd_error_invalid_target,
+ bfd_error_wrong_format,
+ bfd_error_wrong_object_format,
+ bfd_error_invalid_operation,
+ bfd_error_no_memory,
+ bfd_error_no_symbols,
+ bfd_error_no_armap,
+ bfd_error_no_more_archived_files,
+ bfd_error_malformed_archive,
+ bfd_error_file_not_recognized,
+ bfd_error_file_ambiguously_recognized,
+ bfd_error_no_contents,
+ bfd_error_nonrepresentable_section,
+ bfd_error_no_debug_section,
+ bfd_error_bad_value,
+ bfd_error_file_truncated,
+ bfd_error_file_too_big,
+ bfd_error_on_input,
+ bfd_error_invalid_error_code
+}
+bfd_error_type;
+
+bfd_error_type bfd_get_error (void);
+
+void bfd_set_error (bfd_error_type error_tag, ...);
+
+const char *bfd_errmsg (bfd_error_type error_tag);
+
+void bfd_perror (const char *message);
+
+typedef void (*bfd_error_handler_type) (const char *, ...);
+
+bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
+
+void bfd_set_error_program_name (const char *);
+
+bfd_error_handler_type bfd_get_error_handler (void);
+
+long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
+
+long bfd_canonicalize_reloc
+ (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
+
+void bfd_set_reloc
+ (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
+
+bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
+
+int bfd_get_arch_size (bfd *abfd);
+
+int bfd_get_sign_extend_vma (bfd *abfd);
+
+bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
+
+unsigned int bfd_get_gp_size (bfd *abfd);
+
+void bfd_set_gp_size (bfd *abfd, unsigned int i);
+
+bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
+
+bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_copy_private_header_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_copy_private_header_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_copy_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_merge_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
+
+#define bfd_set_private_flags(abfd, flags) \
+ BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
+#define bfd_sizeof_headers(abfd, info) \
+ BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info))
+
+#define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \
+ BFD_SEND (abfd, _bfd_find_nearest_line, \
+ (abfd, sec, syms, off, file, func, line))
+
+#define bfd_find_line(abfd, syms, sym, file, line) \
+ BFD_SEND (abfd, _bfd_find_line, \
+ (abfd, syms, sym, file, line))
+
+#define bfd_find_inliner_info(abfd, file, func, line) \
+ BFD_SEND (abfd, _bfd_find_inliner_info, \
+ (abfd, file, func, line))
+
+#define bfd_debug_info_start(abfd) \
+ BFD_SEND (abfd, _bfd_debug_info_start, (abfd))
+
+#define bfd_debug_info_end(abfd) \
+ BFD_SEND (abfd, _bfd_debug_info_end, (abfd))
+
+#define bfd_debug_info_accumulate(abfd, section) \
+ BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
+
+#define bfd_stat_arch_elt(abfd, stat) \
+ BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
+
+#define bfd_update_armap_timestamp(abfd) \
+ BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd))
+
+#define bfd_set_arch_mach(abfd, arch, mach)\
+ BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach))
+
+#define bfd_relax_section(abfd, section, link_info, again) \
+ BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again))
+
+#define bfd_gc_sections(abfd, link_info) \
+ BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
+
+#define bfd_merge_sections(abfd, link_info) \
+ BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
+
+#define bfd_is_group_section(abfd, sec) \
+ BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec))
+
+#define bfd_discard_group(abfd, sec) \
+ BFD_SEND (abfd, _bfd_discard_group, (abfd, sec))
+
+#define bfd_link_hash_table_create(abfd) \
+ BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd))
+
+#define bfd_link_hash_table_free(abfd, hash) \
+ BFD_SEND (abfd, _bfd_link_hash_table_free, (hash))
+
+#define bfd_link_add_symbols(abfd, info) \
+ BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info))
+
+#define bfd_link_just_syms(abfd, sec, info) \
+ BFD_SEND (abfd, _bfd_link_just_syms, (sec, info))
+
+#define bfd_final_link(abfd, info) \
+ BFD_SEND (abfd, _bfd_final_link, (abfd, info))
+
+#define bfd_free_cached_info(abfd) \
+ BFD_SEND (abfd, _bfd_free_cached_info, (abfd))
+
+#define bfd_get_dynamic_symtab_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd))
+
+#define bfd_print_private_bfd_data(abfd, file)\
+ BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file))
+
+#define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \
+ BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols))
+
+#define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \
+ BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \
+ dyncount, dynsyms, ret))
+
+#define bfd_get_dynamic_reloc_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd))
+
+#define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \
+ BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms))
+
+extern bfd_byte *bfd_get_relocated_section_contents
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
+ bfd_boolean, asymbol **);
+
+bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
+
+struct bfd_preserve
+{
+ void *marker;
+ void *tdata;
+ flagword flags;
+ const struct bfd_arch_info *arch_info;
+ struct bfd_section *sections;
+ struct bfd_section *section_last;
+ unsigned int section_count;
+ struct bfd_hash_table section_htab;
+};
+
+bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *);
+
+void bfd_preserve_restore (bfd *, struct bfd_preserve *);
+
+void bfd_preserve_finish (bfd *, struct bfd_preserve *);
+
+bfd_vma bfd_emul_get_maxpagesize (const char *);
+
+void bfd_emul_set_maxpagesize (const char *, bfd_vma);
+
+bfd_vma bfd_emul_get_commonpagesize (const char *);
+
+void bfd_emul_set_commonpagesize (const char *, bfd_vma);
+
+char *bfd_demangle (bfd *, const char *, int);
+
+/* Extracted from archive.c. */
+symindex bfd_get_next_mapent
+ (bfd *abfd, symindex previous, carsym **sym);
+
+bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
+
+bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
+
+/* Extracted from corefile.c. */
+const char *bfd_core_file_failing_command (bfd *abfd);
+
+int bfd_core_file_failing_signal (bfd *abfd);
+
+bfd_boolean core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
+bfd_boolean generic_core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
+/* Extracted from targets.c. */
+#define BFD_SEND(bfd, message, arglist) \
+ ((*((bfd)->xvec->message)) arglist)
+
+#ifdef DEBUG_BFD_SEND
+#undef BFD_SEND
+#define BFD_SEND(bfd, message, arglist) \
+ (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+ ((*((bfd)->xvec->message)) arglist) : \
+ (bfd_assert (__FILE__,__LINE__), NULL))
+#endif
+#define BFD_SEND_FMT(bfd, message, arglist) \
+ (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist)
+
+#ifdef DEBUG_BFD_SEND
+#undef BFD_SEND_FMT
+#define BFD_SEND_FMT(bfd, message, arglist) \
+ (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+ (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \
+ (bfd_assert (__FILE__,__LINE__), NULL))
+#endif
+
+enum bfd_flavour
+{
+ bfd_target_unknown_flavour,
+ bfd_target_aout_flavour,
+ bfd_target_coff_flavour,
+ bfd_target_ecoff_flavour,
+ bfd_target_xcoff_flavour,
+ bfd_target_elf_flavour,
+ bfd_target_ieee_flavour,
+ bfd_target_nlm_flavour,
+ bfd_target_oasys_flavour,
+ bfd_target_tekhex_flavour,
+ bfd_target_srec_flavour,
+ bfd_target_verilog_flavour,
+ bfd_target_ihex_flavour,
+ bfd_target_som_flavour,
+ bfd_target_os9k_flavour,
+ bfd_target_versados_flavour,
+ bfd_target_msdos_flavour,
+ bfd_target_ovax_flavour,
+ bfd_target_evax_flavour,
+ bfd_target_mmo_flavour,
+ bfd_target_mach_o_flavour,
+ bfd_target_pef_flavour,
+ bfd_target_pef_xlib_flavour,
+ bfd_target_sym_flavour
+};
+
+enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
+
+/* Forward declaration. */
+typedef struct bfd_link_info _bfd_link_info;
+
+typedef struct bfd_target
+{
+ /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */
+ char *name;
+
+ /* The "flavour" of a back end is a general indication about
+ the contents of a file. */
+ enum bfd_flavour flavour;
+
+ /* The order of bytes within the data area of a file. */
+ enum bfd_endian byteorder;
+
+ /* The order of bytes within the header parts of a file. */
+ enum bfd_endian header_byteorder;
+
+ /* A mask of all the flags which an executable may have set -
+ from the set <<BFD_NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>. */
+ flagword object_flags;
+
+ /* A mask of all the flags which a section may have set - from
+ the set <<SEC_NO_FLAGS>>, <<SEC_ALLOC>>, ...<<SET_NEVER_LOAD>>. */
+ flagword section_flags;
+
+ /* The character normally found at the front of a symbol.
+ (if any), perhaps `_'. */
+ char symbol_leading_char;
+
+ /* The pad character for file names within an archive header. */
+ char ar_pad_char;
+
+ /* The maximum number of characters in an archive header. */
+ unsigned short ar_max_namelen;
+
+ /* Entries for byte swapping for data. These are different from the
+ other entry points, since they don't take a BFD as the first argument.
+ Certain other handlers could do the same. */
+ bfd_uint64_t (*bfd_getx64) (const void *);
+ bfd_int64_t (*bfd_getx_signed_64) (const void *);
+ void (*bfd_putx64) (bfd_uint64_t, void *);
+ bfd_vma (*bfd_getx32) (const void *);
+ bfd_signed_vma (*bfd_getx_signed_32) (const void *);
+ void (*bfd_putx32) (bfd_vma, void *);
+ bfd_vma (*bfd_getx16) (const void *);
+ bfd_signed_vma (*bfd_getx_signed_16) (const void *);
+ void (*bfd_putx16) (bfd_vma, void *);
+
+ /* Byte swapping for the headers. */
+ bfd_uint64_t (*bfd_h_getx64) (const void *);
+ bfd_int64_t (*bfd_h_getx_signed_64) (const void *);
+ void (*bfd_h_putx64) (bfd_uint64_t, void *);
+ bfd_vma (*bfd_h_getx32) (const void *);
+ bfd_signed_vma (*bfd_h_getx_signed_32) (const void *);
+ void (*bfd_h_putx32) (bfd_vma, void *);
+ bfd_vma (*bfd_h_getx16) (const void *);
+ bfd_signed_vma (*bfd_h_getx_signed_16) (const void *);
+ void (*bfd_h_putx16) (bfd_vma, void *);
+
+ /* Format dependent routines: these are vectors of entry points
+ within the target vector structure, one for each format to check. */
+
+ /* Check the format of a file being read. Return a <<bfd_target *>> or zero. */
+ const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *);
+
+ /* Set the format of a file being written. */
+ bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *);
+
+ /* Write cached information into a file being written, at <<bfd_close>>. */
+ bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *);
+
+
+ /* Generic entry points. */
+#define BFD_JUMP_TABLE_GENERIC(NAME) \
+ NAME##_close_and_cleanup, \
+ NAME##_bfd_free_cached_info, \
+ NAME##_new_section_hook, \
+ NAME##_get_section_contents, \
+ NAME##_get_section_contents_in_window
+
+ /* Called when the BFD is being closed to do any necessary cleanup. */
+ bfd_boolean (*_close_and_cleanup) (bfd *);
+ /* Ask the BFD to free all cached information. */
+ bfd_boolean (*_bfd_free_cached_info) (bfd *);
+ /* Called when a new section is created. */
+ bfd_boolean (*_new_section_hook) (bfd *, sec_ptr);
+ /* Read the contents of a section. */
+ bfd_boolean (*_bfd_get_section_contents)
+ (bfd *, sec_ptr, void *, file_ptr, bfd_size_type);
+ bfd_boolean (*_bfd_get_section_contents_in_window)
+ (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type);
+
+ /* Entry points to copy private data. */
+#define BFD_JUMP_TABLE_COPY(NAME) \
+ NAME##_bfd_copy_private_bfd_data, \
+ NAME##_bfd_merge_private_bfd_data, \
+ _bfd_generic_init_private_section_data, \
+ NAME##_bfd_copy_private_section_data, \
+ NAME##_bfd_copy_private_symbol_data, \
+ NAME##_bfd_copy_private_header_data, \
+ NAME##_bfd_set_private_flags, \
+ NAME##_bfd_print_private_bfd_data
+
+ /* Called to copy BFD general private data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *);
+ /* Called to merge BFD general private data from one object file
+ to a common output file when linking. */
+ bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
+ /* Called to initialize BFD private section data from one object file
+ to another. */
+#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
+ BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
+ bfd_boolean (*_bfd_init_private_section_data)
+ (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
+ /* Called to copy BFD private section data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_section_data)
+ (bfd *, sec_ptr, bfd *, sec_ptr);
+ /* Called to copy BFD private symbol data from one symbol
+ to another. */
+ bfd_boolean (*_bfd_copy_private_symbol_data)
+ (bfd *, asymbol *, bfd *, asymbol *);
+ /* Called to copy BFD private header data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_header_data)
+ (bfd *, bfd *);
+ /* Called to set private backend flags. */
+ bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword);
+
+ /* Called to print private BFD data. */
+ bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *);
+
+ /* Core file entry points. */
+#define BFD_JUMP_TABLE_CORE(NAME) \
+ NAME##_core_file_failing_command, \
+ NAME##_core_file_failing_signal, \
+ NAME##_core_file_matches_executable_p
+
+ char * (*_core_file_failing_command) (bfd *);
+ int (*_core_file_failing_signal) (bfd *);
+ bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *);
+
+ /* Archive entry points. */
+#define BFD_JUMP_TABLE_ARCHIVE(NAME) \
+ NAME##_slurp_armap, \
+ NAME##_slurp_extended_name_table, \
+ NAME##_construct_extended_name_table, \
+ NAME##_truncate_arname, \
+ NAME##_write_armap, \
+ NAME##_read_ar_hdr, \
+ NAME##_openr_next_archived_file, \
+ NAME##_get_elt_at_index, \
+ NAME##_generic_stat_arch_elt, \
+ NAME##_update_armap_timestamp
+
+ bfd_boolean (*_bfd_slurp_armap) (bfd *);
+ bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *);
+ bfd_boolean (*_bfd_construct_extended_name_table)
+ (bfd *, char **, bfd_size_type *, const char **);
+ void (*_bfd_truncate_arname) (bfd *, const char *, char *);
+ bfd_boolean (*write_armap)
+ (bfd *, unsigned int, struct orl *, unsigned int, int);
+ void * (*_bfd_read_ar_hdr_fn) (bfd *);
+ bfd * (*openr_next_archived_file) (bfd *, bfd *);
+#define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i))
+ bfd * (*_bfd_get_elt_at_index) (bfd *, symindex);
+ int (*_bfd_stat_arch_elt) (bfd *, struct stat *);
+ bfd_boolean (*_bfd_update_armap_timestamp) (bfd *);
+
+ /* Entry points used for symbols. */
+#define BFD_JUMP_TABLE_SYMBOLS(NAME) \
+ NAME##_get_symtab_upper_bound, \
+ NAME##_canonicalize_symtab, \
+ NAME##_make_empty_symbol, \
+ NAME##_print_symbol, \
+ NAME##_get_symbol_info, \
+ NAME##_bfd_is_local_label_name, \
+ NAME##_bfd_is_target_special_symbol, \
+ NAME##_get_lineno, \
+ NAME##_find_nearest_line, \
+ _bfd_generic_find_line, \
+ NAME##_find_inliner_info, \
+ NAME##_bfd_make_debug_symbol, \
+ NAME##_read_minisymbols, \
+ NAME##_minisymbol_to_symbol
+
+ long (*_bfd_get_symtab_upper_bound) (bfd *);
+ long (*_bfd_canonicalize_symtab)
+ (bfd *, struct bfd_symbol **);
+ struct bfd_symbol *
+ (*_bfd_make_empty_symbol) (bfd *);
+ void (*_bfd_print_symbol)
+ (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type);
+#define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e))
+ void (*_bfd_get_symbol_info)
+ (bfd *, struct bfd_symbol *, symbol_info *);
+#define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e))
+ bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *);
+ bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *);
+ alent * (*_get_lineno) (bfd *, struct bfd_symbol *);
+ bfd_boolean (*_bfd_find_nearest_line)
+ (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
+ const char **, const char **, unsigned int *);
+ bfd_boolean (*_bfd_find_line)
+ (bfd *, struct bfd_symbol **, struct bfd_symbol *,
+ const char **, unsigned int *);
+ bfd_boolean (*_bfd_find_inliner_info)
+ (bfd *, const char **, const char **, unsigned int *);
+ /* Back-door to allow format-aware applications to create debug symbols
+ while using BFD for everything else. Currently used by the assembler
+ when creating COFF files. */
+ asymbol * (*_bfd_make_debug_symbol)
+ (bfd *, void *, unsigned long size);
+#define bfd_read_minisymbols(b, d, m, s) \
+ BFD_SEND (b, _read_minisymbols, (b, d, m, s))
+ long (*_read_minisymbols)
+ (bfd *, bfd_boolean, void **, unsigned int *);
+#define bfd_minisymbol_to_symbol(b, d, m, f) \
+ BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f))
+ asymbol * (*_minisymbol_to_symbol)
+ (bfd *, bfd_boolean, const void *, asymbol *);
+
+ /* Routines for relocs. */
+#define BFD_JUMP_TABLE_RELOCS(NAME) \
+ NAME##_get_reloc_upper_bound, \
+ NAME##_canonicalize_reloc, \
+ NAME##_bfd_reloc_type_lookup, \
+ NAME##_bfd_reloc_name_lookup
+
+ long (*_get_reloc_upper_bound) (bfd *, sec_ptr);
+ long (*_bfd_canonicalize_reloc)
+ (bfd *, sec_ptr, arelent **, struct bfd_symbol **);
+ /* See documentation on reloc types. */
+ reloc_howto_type *
+ (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
+ reloc_howto_type *
+ (*reloc_name_lookup) (bfd *, const char *);
+
+
+ /* Routines used when writing an object file. */
+#define BFD_JUMP_TABLE_WRITE(NAME) \
+ NAME##_set_arch_mach, \
+ NAME##_set_section_contents
+
+ bfd_boolean (*_bfd_set_arch_mach)
+ (bfd *, enum bfd_architecture, unsigned long);
+ bfd_boolean (*_bfd_set_section_contents)
+ (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type);
+
+ /* Routines used by the linker. */
+#define BFD_JUMP_TABLE_LINK(NAME) \
+ NAME##_sizeof_headers, \
+ NAME##_bfd_get_relocated_section_contents, \
+ NAME##_bfd_relax_section, \
+ NAME##_bfd_link_hash_table_create, \
+ NAME##_bfd_link_hash_table_free, \
+ NAME##_bfd_link_add_symbols, \
+ NAME##_bfd_link_just_syms, \
+ NAME##_bfd_final_link, \
+ NAME##_bfd_link_split_section, \
+ NAME##_bfd_gc_sections, \
+ NAME##_bfd_merge_sections, \
+ NAME##_bfd_is_group_section, \
+ NAME##_bfd_discard_group, \
+ NAME##_section_already_linked, \
+ NAME##_bfd_define_common_symbol
+
+ int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *);
+ bfd_byte * (*_bfd_get_relocated_section_contents)
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *,
+ bfd_byte *, bfd_boolean, struct bfd_symbol **);
+
+ bfd_boolean (*_bfd_relax_section)
+ (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *);
+
+ /* Create a hash table for the linker. Different backends store
+ different information in this table. */
+ struct bfd_link_hash_table *
+ (*_bfd_link_hash_table_create) (bfd *);
+
+ /* Release the memory associated with the linker hash table. */
+ void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *);
+
+ /* Add symbols from this object file into the hash table. */
+ bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *);
+
+ /* Indicate that we are only retrieving symbol values from this section. */
+ void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
+
+ /* Do a link based on the link_order structures attached to each
+ section of the BFD. */
+ bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
+
+ /* Should this section be split up into smaller pieces during linking. */
+ bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *);
+
+ /* Remove sections that are not referenced from the output. */
+ bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
+
+ /* Attempt to merge SEC_MERGE sections. */
+ bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
+
+ /* Is this section a member of a group? */
+ bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *);
+
+ /* Discard members of a group. */
+ bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *);
+
+ /* Check if SEC has been already linked during a reloceatable or
+ final link. */
+ void (*_section_already_linked) (bfd *, struct bfd_section *,
+ struct bfd_link_info *);
+
+ /* Define a common symbol. */
+ bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *,
+ struct bfd_link_hash_entry *);
+
+ /* Routines to handle dynamic symbols and relocs. */
+#define BFD_JUMP_TABLE_DYNAMIC(NAME) \
+ NAME##_get_dynamic_symtab_upper_bound, \
+ NAME##_canonicalize_dynamic_symtab, \
+ NAME##_get_synthetic_symtab, \
+ NAME##_get_dynamic_reloc_upper_bound, \
+ NAME##_canonicalize_dynamic_reloc
+
+ /* Get the amount of memory required to hold the dynamic symbols. */
+ long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *);
+ /* Read in the dynamic symbols. */
+ long (*_bfd_canonicalize_dynamic_symtab)
+ (bfd *, struct bfd_symbol **);
+ /* Create synthetized symbols. */
+ long (*_bfd_get_synthetic_symtab)
+ (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **,
+ struct bfd_symbol **);
+ /* Get the amount of memory required to hold the dynamic relocs. */
+ long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *);
+ /* Read in the dynamic relocs. */
+ long (*_bfd_canonicalize_dynamic_reloc)
+ (bfd *, arelent **, struct bfd_symbol **);
+
+ /* Opposite endian version of this target. */
+ const struct bfd_target * alternative_target;
+
+ /* Data for use by back-end routines, which isn't
+ generic enough to belong in this structure. */
+ const void *backend_data;
+
+} bfd_target;
+
+bfd_boolean bfd_set_default_target (const char *name);
+
+const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
+
+const char ** bfd_target_list (void);
+
+const bfd_target *bfd_search_for_target
+ (int (*search_func) (const bfd_target *, void *),
+ void *);
+
+/* Extracted from format.c. */
+bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
+
+bfd_boolean bfd_check_format_matches
+ (bfd *abfd, bfd_format format, char ***matching);
+
+bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
+
+const char *bfd_format_string (bfd_format format);
+
+/* Extracted from linker.c. */
+bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
+
+#define bfd_link_split_section(abfd, sec) \
+ BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
+
+void bfd_section_already_linked (bfd *abfd, asection *sec,
+ struct bfd_link_info *info);
+
+#define bfd_section_already_linked(abfd, sec, info) \
+ BFD_SEND (abfd, _section_already_linked, (abfd, sec, info))
+
+bfd_boolean bfd_generic_define_common_symbol
+ (bfd *output_bfd, struct bfd_link_info *info,
+ struct bfd_link_hash_entry *h);
+
+#define bfd_define_common_symbol(output_bfd, info, h) \
+ BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h))
+
+struct bfd_elf_version_tree * bfd_find_version_for_sym
+ (struct bfd_elf_version_tree *verdefs,
+ const char *sym_name, bfd_boolean *hide);
+
+/* Extracted from simple.c. */
+bfd_byte *bfd_simple_get_relocated_section_contents
+ (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table);
+
+/* Extracted from compress.c. */
+bfd_boolean bfd_uncompress_section_contents
+ (bfd_byte **buffer, bfd_size_type *size);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h
new file mode 100644
index 0000000..61cfc7a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h
@@ -0,0 +1,784 @@
+/* bfdlink.h -- header file for BFD link routines
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#ifndef BFDLINK_H
+#define BFDLINK_H
+
+/* Which symbols to strip during a link. */
+enum bfd_link_strip
+{
+ strip_none, /* Don't strip any symbols. */
+ strip_debugger, /* Strip debugging symbols. */
+ strip_some, /* keep_hash is the list of symbols to keep. */
+ strip_all /* Strip all symbols. */
+};
+
+/* Which local symbols to discard during a link. This is irrelevant
+ if strip_all is used. */
+enum bfd_link_discard
+{
+ discard_sec_merge, /* Discard local temporary symbols in SEC_MERGE
+ sections. */
+ discard_none, /* Don't discard any locals. */
+ discard_l, /* Discard local temporary symbols. */
+ discard_all /* Discard all locals. */
+};
+
+/* Describes the type of hash table entry structure being used.
+ Different hash table structure have different fields and so
+ support different linking features. */
+enum bfd_link_hash_table_type
+ {
+ bfd_link_generic_hash_table,
+ bfd_link_elf_hash_table
+ };
+
+/* These are the possible types of an entry in the BFD link hash
+ table. */
+
+enum bfd_link_hash_type
+{
+ bfd_link_hash_new, /* Symbol is new. */
+ bfd_link_hash_undefined, /* Symbol seen before, but undefined. */
+ bfd_link_hash_undefweak, /* Symbol is weak and undefined. */
+ bfd_link_hash_defined, /* Symbol is defined. */
+ bfd_link_hash_defweak, /* Symbol is weak and defined. */
+ bfd_link_hash_common, /* Symbol is common. */
+ bfd_link_hash_indirect, /* Symbol is an indirect link. */
+ bfd_link_hash_warning /* Like indirect, but warn if referenced. */
+};
+
+enum bfd_link_common_skip_ar_aymbols
+{
+ bfd_link_common_skip_none,
+ bfd_link_common_skip_text,
+ bfd_link_common_skip_data,
+ bfd_link_common_skip_all
+};
+
+struct bfd_link_hash_common_entry
+ {
+ unsigned int alignment_power; /* Alignment. */
+ asection *section; /* Symbol section. */
+ };
+
+/* The linking routines use a hash table which uses this structure for
+ its elements. */
+
+struct bfd_link_hash_entry
+{
+ /* Base hash table entry structure. */
+ struct bfd_hash_entry root;
+
+ /* Type of this entry. */
+ enum bfd_link_hash_type type;
+
+ /* A union of information depending upon the type. */
+ union
+ {
+ /* Nothing is kept for bfd_hash_new. */
+ /* bfd_link_hash_undefined, bfd_link_hash_undefweak. */
+ struct
+ {
+ /* Undefined and common symbols are kept in a linked list through
+ this field. This field is present in all of the union element
+ so that we don't need to remove entries from the list when we
+ change their type. Removing entries would either require the
+ list to be doubly linked, which would waste more memory, or
+ require a traversal. When an undefined or common symbol is
+ created, it should be added to this list, the head of which is in
+ the link hash table itself. As symbols are defined, they need
+ not be removed from the list; anything which reads the list must
+ doublecheck the symbol type.
+
+ Weak symbols are not kept on this list.
+
+ Defined and defweak symbols use this field as a reference marker.
+ If the field is not NULL, or this structure is the tail of the
+ undefined symbol list, the symbol has been referenced. If the
+ symbol is undefined and becomes defined, this field will
+ automatically be non-NULL since the symbol will have been on the
+ undefined symbol list. */
+ struct bfd_link_hash_entry *next;
+ bfd *abfd; /* BFD symbol was found in. */
+ bfd *weak; /* BFD weak symbol was found in. */
+ } undef;
+ /* bfd_link_hash_defined, bfd_link_hash_defweak. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ asection *section; /* Symbol section. */
+ bfd_vma value; /* Symbol value. */
+ } def;
+ /* bfd_link_hash_indirect, bfd_link_hash_warning. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ struct bfd_link_hash_entry *link; /* Real symbol. */
+ const char *warning; /* Warning (bfd_link_hash_warning only). */
+ } i;
+ /* bfd_link_hash_common. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ /* The linker needs to know three things about common
+ symbols: the size, the alignment, and the section in
+ which the symbol should be placed. We store the size
+ here, and we allocate a small structure to hold the
+ section and the alignment. The alignment is stored as a
+ power of two. We don't store all the information
+ directly because we don't want to increase the size of
+ the union; this structure is a major space user in the
+ linker. */
+ struct bfd_link_hash_common_entry *p;
+ bfd_size_type size; /* Common symbol size. */
+ } c;
+ } u;
+};
+
+/* This is the link hash table. It is a derived class of
+ bfd_hash_table. */
+
+struct bfd_link_hash_table
+{
+ /* The hash table itself. */
+ struct bfd_hash_table table;
+ /* A linked list of undefined and common symbols, linked through the
+ next field in the bfd_link_hash_entry structure. */
+ struct bfd_link_hash_entry *undefs;
+ /* Entries are added to the tail of the undefs list. */
+ struct bfd_link_hash_entry *undefs_tail;
+ /* The type of the link hash table. */
+ enum bfd_link_hash_table_type type;
+};
+
+/* Look up an entry in a link hash table. If FOLLOW is TRUE, this
+ follows bfd_link_hash_indirect and bfd_link_hash_warning links to
+ the real symbol. */
+extern struct bfd_link_hash_entry *bfd_link_hash_lookup
+ (struct bfd_link_hash_table *, const char *, bfd_boolean create,
+ bfd_boolean copy, bfd_boolean follow);
+
+/* Look up an entry in the main linker hash table if the symbol might
+ be wrapped. This should only be used for references to an
+ undefined symbol, not for definitions of a symbol. */
+
+extern struct bfd_link_hash_entry *bfd_wrapped_link_hash_lookup
+ (bfd *, struct bfd_link_info *, const char *, bfd_boolean,
+ bfd_boolean, bfd_boolean);
+
+/* Traverse a link hash table. */
+extern void bfd_link_hash_traverse
+ (struct bfd_link_hash_table *,
+ bfd_boolean (*) (struct bfd_link_hash_entry *, void *),
+ void *);
+
+/* Add an entry to the undefs list. */
+extern void bfd_link_add_undef
+ (struct bfd_link_hash_table *, struct bfd_link_hash_entry *);
+
+/* Remove symbols from the undefs list that don't belong there. */
+extern void bfd_link_repair_undef_list
+ (struct bfd_link_hash_table *table);
+
+/* Read symbols and cache symbol pointer array in outsymbols. */
+extern bfd_boolean bfd_generic_link_read_symbols (bfd *);
+
+struct bfd_sym_chain
+{
+ struct bfd_sym_chain *next;
+ const char *name;
+};
+
+/* How to handle unresolved symbols.
+ There are four possibilities which are enumerated below: */
+enum report_method
+{
+ /* This is the initial value when then link_info structure is created.
+ It allows the various stages of the linker to determine whether they
+ allowed to set the value. */
+ RM_NOT_YET_SET = 0,
+ RM_IGNORE,
+ RM_GENERATE_WARNING,
+ RM_GENERATE_ERROR
+};
+
+struct bfd_elf_dynamic_list;
+
+/* This structure holds all the information needed to communicate
+ between BFD and the linker when doing a link. */
+
+struct bfd_link_info
+{
+ /* TRUE if BFD should generate a relocatable object file. */
+ unsigned int relocatable: 1;
+
+ /* TRUE if BFD should generate relocation information in the final
+ executable. */
+ unsigned int emitrelocations: 1;
+
+ /* TRUE if BFD should generate a "task linked" object file,
+ similar to relocatable but also with globals converted to
+ statics. */
+ unsigned int task_link: 1;
+
+ /* TRUE if BFD should generate a shared object. */
+ unsigned int shared: 1;
+
+ /* TRUE if BFD should pre-bind symbols in a shared object. */
+ unsigned int symbolic: 1;
+
+ /* TRUE if BFD should export all symbols in the dynamic symbol table
+ of an executable, rather than only those used. */
+ unsigned int export_dynamic: 1;
+
+ /* TRUE if shared objects should be linked directly, not shared. */
+ unsigned int static_link: 1;
+
+ /* TRUE if the output file should be in a traditional format. This
+ is equivalent to the setting of the BFD_TRADITIONAL_FORMAT flag
+ on the output file, but may be checked when reading the input
+ files. */
+ unsigned int traditional_format: 1;
+
+ /* TRUE if we want to produced optimized output files. This might
+ need much more time and therefore must be explicitly selected. */
+ unsigned int optimize: 1;
+
+ /* TRUE if ok to have multiple definition. */
+ unsigned int allow_multiple_definition: 1;
+
+ /* TRUE if ok to have version with no definition. */
+ unsigned int allow_undefined_version: 1;
+
+ /* TRUE if a default symbol version should be created and used for
+ exported symbols. */
+ unsigned int create_default_symver: 1;
+
+ /* TRUE if a default symbol version should be created and used for
+ imported symbols. */
+ unsigned int default_imported_symver: 1;
+
+ /* TRUE if symbols should be retained in memory, FALSE if they
+ should be freed and reread. */
+ unsigned int keep_memory: 1;
+
+ /* TRUE if every symbol should be reported back via the notice
+ callback. */
+ unsigned int notice_all: 1;
+
+ /* TRUE if executable should not contain copy relocs.
+ Setting this true may result in a non-sharable text segment. */
+ unsigned int nocopyreloc: 1;
+
+ /* TRUE if the new ELF dynamic tags are enabled. */
+ unsigned int new_dtags: 1;
+
+ /* TRUE if non-PLT relocs should be merged into one reloc section
+ and sorted so that relocs against the same symbol come together. */
+ unsigned int combreloc: 1;
+
+ /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment
+ should be created. */
+ unsigned int eh_frame_hdr: 1;
+
+ /* TRUE if global symbols in discarded sections should be stripped. */
+ unsigned int strip_discarded: 1;
+
+ /* TRUE if generating a position independent executable. */
+ unsigned int pie: 1;
+
+ /* TRUE if generating an executable, position independent or not. */
+ unsigned int executable : 1;
+
+ /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W|PF_X
+ flags. */
+ unsigned int execstack: 1;
+
+ /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W
+ flags. */
+ unsigned int noexecstack: 1;
+
+ /* TRUE if PT_GNU_RELRO segment should be created. */
+ unsigned int relro: 1;
+
+ /* TRUE if we should warn when adding a DT_TEXTREL to a shared object. */
+ unsigned int warn_shared_textrel: 1;
+
+ /* TRUE if we should warn alternate ELF machine code. */
+ unsigned int warn_alternate_em: 1;
+
+ /* TRUE if unreferenced sections should be removed. */
+ unsigned int gc_sections: 1;
+
+ /* TRUE if user shoudl be informed of removed unreferenced sections. */
+ unsigned int print_gc_sections: 1;
+
+ /* TRUE if .hash section should be created. */
+ unsigned int emit_hash: 1;
+
+ /* TRUE if .gnu.hash section should be created. */
+ unsigned int emit_gnu_hash: 1;
+
+ /* If TRUE reduce memory overheads, at the expense of speed. This will
+ cause map file generation to use an O(N^2) algorithm and disable
+ caching ELF symbol buffer. */
+ unsigned int reduce_memory_overheads: 1;
+
+ /* TRUE if all data symbols should be dynamic. */
+ unsigned int dynamic_data: 1;
+
+ /* TRUE if some symbols have to be dynamic, controlled by
+ --dynamic-list command line options. */
+ unsigned int dynamic: 1;
+
+ /* Non-NULL if .note.gnu.build-id section should be created. */
+ char *emit_note_gnu_build_id;
+
+ /* What to do with unresolved symbols in an object file.
+ When producing executables the default is GENERATE_ERROR.
+ When producing shared libraries the default is IGNORE. The
+ assumption with shared libraries is that the reference will be
+ resolved at load/execution time. */
+ enum report_method unresolved_syms_in_objects;
+
+ /* What to do with unresolved symbols in a shared library.
+ The same defaults apply. */
+ enum report_method unresolved_syms_in_shared_libs;
+
+ /* Which symbols to strip. */
+ enum bfd_link_strip strip;
+
+ /* Which local symbols to discard. */
+ enum bfd_link_discard discard;
+
+ /* Criteria for skipping symbols when detemining
+ whether to include an object from an archive. */
+ enum bfd_link_common_skip_ar_aymbols common_skip_ar_aymbols;
+
+ /* Char that may appear as the first char of a symbol, but should be
+ skipped (like symbol_leading_char) when looking up symbols in
+ wrap_hash. Used by PowerPC Linux for 'dot' symbols. */
+ char wrap_char;
+
+ /* Separator between archive and filename in linker script filespecs. */
+ char path_separator;
+
+ /* Function callbacks. */
+ const struct bfd_link_callbacks *callbacks;
+
+ /* Hash table handled by BFD. */
+ struct bfd_link_hash_table *hash;
+
+ /* Hash table of symbols to keep. This is NULL unless strip is
+ strip_some. */
+ struct bfd_hash_table *keep_hash;
+
+ /* Hash table of symbols to report back via the notice callback. If
+ this is NULL, and notice_all is FALSE, then no symbols are
+ reported back. */
+ struct bfd_hash_table *notice_hash;
+
+ /* Hash table of symbols which are being wrapped (the --wrap linker
+ option). If this is NULL, no symbols are being wrapped. */
+ struct bfd_hash_table *wrap_hash;
+
+ /* The output BFD. */
+ bfd *output_bfd;
+
+ /* The list of input BFD's involved in the link. These are chained
+ together via the link_next field. */
+ bfd *input_bfds;
+ bfd **input_bfds_tail;
+
+ /* If a symbol should be created for each input BFD, this is section
+ where those symbols should be placed. It must be a section in
+ the output BFD. It may be NULL, in which case no such symbols
+ will be created. This is to support CREATE_OBJECT_SYMBOLS in the
+ linker command language. */
+ asection *create_object_symbols_section;
+
+ /* List of global symbol names that are starting points for marking
+ sections against garbage collection. */
+ struct bfd_sym_chain *gc_sym_list;
+
+ /* If a base output file is wanted, then this points to it */
+ void *base_file;
+
+ /* The function to call when the executable or shared object is
+ loaded. */
+ const char *init_function;
+
+ /* The function to call when the executable or shared object is
+ unloaded. */
+ const char *fini_function;
+
+ /* Number of relaxation passes. Usually only one relaxation pass
+ is needed. But a backend can have as many relaxation passes as
+ necessary. During bfd_relax_section call, it is set to the
+ current pass, starting from 0. */
+ int relax_pass;
+
+ /* Number of relaxation trips. This number is incremented every
+ time the relaxation pass is restarted due to a previous
+ relaxation returning true in *AGAIN. */
+ int relax_trip;
+
+ /* Non-zero if auto-import thunks for DATA items in pei386 DLLs
+ should be generated/linked against. Set to 1 if this feature
+ is explicitly requested by the user, -1 if enabled by default. */
+ int pei386_auto_import;
+
+ /* Non-zero if runtime relocs for DATA items with non-zero addends
+ in pei386 DLLs should be generated. Set to 1 if this feature
+ is explicitly requested by the user, -1 if enabled by default. */
+ int pei386_runtime_pseudo_reloc;
+
+ /* How many spare .dynamic DT_NULL entries should be added? */
+ unsigned int spare_dynamic_tags;
+
+ /* May be used to set DT_FLAGS for ELF. */
+ bfd_vma flags;
+
+ /* May be used to set DT_FLAGS_1 for ELF. */
+ bfd_vma flags_1;
+
+ /* Start and end of RELRO region. */
+ bfd_vma relro_start, relro_end;
+
+ /* List of symbols should be dynamic. */
+ struct bfd_elf_dynamic_list *dynamic_list;
+};
+
+/* This structures holds a set of callback functions. These are called
+ by the BFD linker routines. Except for the info functions, the first
+ argument to each callback function is the bfd_link_info structure
+ being used and each function returns a boolean value. If the
+ function returns FALSE, then the BFD function which called it should
+ return with a failure indication. */
+
+struct bfd_link_callbacks
+{
+ /* A function which is called when an object is added from an
+ archive. ABFD is the archive element being added. NAME is the
+ name of the symbol which caused the archive element to be pulled
+ in. */
+ bfd_boolean (*add_archive_element)
+ (struct bfd_link_info *, bfd *abfd, const char *name);
+ /* A function which is called when a symbol is found with multiple
+ definitions. NAME is the symbol which is defined multiple times.
+ OBFD is the old BFD, OSEC is the old section, OVAL is the old
+ value, NBFD is the new BFD, NSEC is the new section, and NVAL is
+ the new value. OBFD may be NULL. OSEC and NSEC may be
+ bfd_com_section or bfd_ind_section. */
+ bfd_boolean (*multiple_definition)
+ (struct bfd_link_info *, const char *name,
+ bfd *obfd, asection *osec, bfd_vma oval,
+ bfd *nbfd, asection *nsec, bfd_vma nval);
+ /* A function which is called when a common symbol is defined
+ multiple times. NAME is the symbol appearing multiple times.
+ OBFD is the BFD of the existing symbol; it may be NULL if this is
+ not known. OTYPE is the type of the existing symbol, which may
+ be bfd_link_hash_defined, bfd_link_hash_defweak,
+ bfd_link_hash_common, or bfd_link_hash_indirect. If OTYPE is
+ bfd_link_hash_common, OSIZE is the size of the existing symbol.
+ NBFD is the BFD of the new symbol. NTYPE is the type of the new
+ symbol, one of bfd_link_hash_defined, bfd_link_hash_common, or
+ bfd_link_hash_indirect. If NTYPE is bfd_link_hash_common, NSIZE
+ is the size of the new symbol. */
+ bfd_boolean (*multiple_common)
+ (struct bfd_link_info *, const char *name,
+ bfd *obfd, enum bfd_link_hash_type otype, bfd_vma osize,
+ bfd *nbfd, enum bfd_link_hash_type ntype, bfd_vma nsize);
+ /* A function which is called to add a symbol to a set. ENTRY is
+ the link hash table entry for the set itself (e.g.,
+ __CTOR_LIST__). RELOC is the relocation to use for an entry in
+ the set when generating a relocatable file, and is also used to
+ get the size of the entry when generating an executable file.
+ ABFD, SEC and VALUE identify the value to add to the set. */
+ bfd_boolean (*add_to_set)
+ (struct bfd_link_info *, struct bfd_link_hash_entry *entry,
+ bfd_reloc_code_real_type reloc, bfd *abfd, asection *sec, bfd_vma value);
+ /* A function which is called when the name of a g++ constructor or
+ destructor is found. This is only called by some object file
+ formats. CONSTRUCTOR is TRUE for a constructor, FALSE for a
+ destructor. This will use BFD_RELOC_CTOR when generating a
+ relocatable file. NAME is the name of the symbol found. ABFD,
+ SECTION and VALUE are the value of the symbol. */
+ bfd_boolean (*constructor)
+ (struct bfd_link_info *, bfd_boolean constructor, const char *name,
+ bfd *abfd, asection *sec, bfd_vma value);
+ /* A function which is called to issue a linker warning. For
+ example, this is called when there is a reference to a warning
+ symbol. WARNING is the warning to be issued. SYMBOL is the name
+ of the symbol which triggered the warning; it may be NULL if
+ there is none. ABFD, SECTION and ADDRESS identify the location
+ which trigerred the warning; either ABFD or SECTION or both may
+ be NULL if the location is not known. */
+ bfd_boolean (*warning)
+ (struct bfd_link_info *, const char *warning, const char *symbol,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a relocation is attempted against
+ an undefined symbol. NAME is the symbol which is undefined.
+ ABFD, SECTION and ADDRESS identify the location from which the
+ reference is made. FATAL indicates whether an undefined symbol is
+ a fatal error or not. In some cases SECTION may be NULL. */
+ bfd_boolean (*undefined_symbol)
+ (struct bfd_link_info *, const char *name, bfd *abfd,
+ asection *section, bfd_vma address, bfd_boolean fatal);
+ /* A function which is called when a reloc overflow occurs. ENTRY is
+ the link hash table entry for the symbol the reloc is against.
+ NAME is the name of the local symbol or section the reloc is
+ against, RELOC_NAME is the name of the relocation, and ADDEND is
+ any addend that is used. ABFD, SECTION and ADDRESS identify the
+ location at which the overflow occurs; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*reloc_overflow)
+ (struct bfd_link_info *, struct bfd_link_hash_entry *entry,
+ const char *name, const char *reloc_name, bfd_vma addend,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a dangerous reloc is performed.
+ MESSAGE is an appropriate message.
+ ABFD, SECTION and ADDRESS identify the location at which the
+ problem occurred; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*reloc_dangerous)
+ (struct bfd_link_info *, const char *message,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a reloc is found to be attached
+ to a symbol which is not being written out. NAME is the name of
+ the symbol. ABFD, SECTION and ADDRESS identify the location of
+ the reloc; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*unattached_reloc)
+ (struct bfd_link_info *, const char *name,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a symbol in notice_hash is
+ defined or referenced. NAME is the symbol. ABFD, SECTION and
+ ADDRESS are the value of the symbol. If SECTION is
+ bfd_und_section, this is a reference. */
+ bfd_boolean (*notice)
+ (struct bfd_link_info *, const char *name,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* Error or warning link info message. */
+ void (*einfo)
+ (const char *fmt, ...);
+ /* General link info message. */
+ void (*info)
+ (const char *fmt, ...);
+ /* Message to be printed in linker map file. */
+ void (*minfo)
+ (const char *fmt, ...);
+ /* This callback provides a chance for users of the BFD library to
+ override its decision about whether to place two adjacent sections
+ into the same segment. */
+ bfd_boolean (*override_segment_assignment)
+ (struct bfd_link_info *, bfd * abfd,
+ asection * current_section, asection * previous_section,
+ bfd_boolean new_segment);
+};
+
+/* The linker builds link_order structures which tell the code how to
+ include input data in the output file. */
+
+/* These are the types of link_order structures. */
+
+enum bfd_link_order_type
+{
+ bfd_undefined_link_order, /* Undefined. */
+ bfd_indirect_link_order, /* Built from a section. */
+ bfd_data_link_order, /* Set to explicit data. */
+ bfd_section_reloc_link_order, /* Relocate against a section. */
+ bfd_symbol_reloc_link_order /* Relocate against a symbol. */
+};
+
+/* This is the link_order structure itself. These form a chain
+ attached to the output section whose contents they are describing. */
+
+struct bfd_link_order
+{
+ /* Next link_order in chain. */
+ struct bfd_link_order *next;
+ /* Type of link_order. */
+ enum bfd_link_order_type type;
+ /* Offset within output section. */
+ bfd_vma offset;
+ /* Size within output section. */
+ bfd_size_type size;
+ /* Type specific information. */
+ union
+ {
+ struct
+ {
+ /* Section to include. If this is used, then
+ section->output_section must be the section the
+ link_order is attached to, section->output_offset must
+ equal the link_order offset field, and section->size
+ must equal the link_order size field. Maybe these
+ restrictions should be relaxed someday. */
+ asection *section;
+ } indirect;
+ struct
+ {
+ /* Size of contents, or zero when contents size == size
+ within output section.
+ A non-zero value allows filling of the output section
+ with an arbitrary repeated pattern. */
+ unsigned int size;
+ /* Data to put into file. */
+ bfd_byte *contents;
+ } data;
+ struct
+ {
+ /* Description of reloc to generate. Used for
+ bfd_section_reloc_link_order and
+ bfd_symbol_reloc_link_order. */
+ struct bfd_link_order_reloc *p;
+ } reloc;
+ } u;
+};
+
+/* A linker order of type bfd_section_reloc_link_order or
+ bfd_symbol_reloc_link_order means to create a reloc against a
+ section or symbol, respectively. This is used to implement -Ur to
+ generate relocs for the constructor tables. The
+ bfd_link_order_reloc structure describes the reloc that BFD should
+ create. It is similar to a arelent, but I didn't use arelent
+ because the linker does not know anything about most symbols, and
+ any asymbol structure it creates will be partially meaningless.
+ This information could logically be in the bfd_link_order struct,
+ but I didn't want to waste the space since these types of relocs
+ are relatively rare. */
+
+struct bfd_link_order_reloc
+{
+ /* Reloc type. */
+ bfd_reloc_code_real_type reloc;
+
+ union
+ {
+ /* For type bfd_section_reloc_link_order, this is the section
+ the reloc should be against. This must be a section in the
+ output BFD, not any of the input BFDs. */
+ asection *section;
+ /* For type bfd_symbol_reloc_link_order, this is the name of the
+ symbol the reloc should be against. */
+ const char *name;
+ } u;
+
+ /* Addend to use. The object file should contain zero. The BFD
+ backend is responsible for filling in the contents of the object
+ file correctly. For some object file formats (e.g., COFF) the
+ addend must be stored into in the object file, and for some
+ (e.g., SPARC a.out) it is kept in the reloc. */
+ bfd_vma addend;
+};
+
+/* Allocate a new link_order for a section. */
+extern struct bfd_link_order *bfd_new_link_order (bfd *, asection *);
+
+/* These structures are used to describe version information for the
+ ELF linker. These structures could be manipulated entirely inside
+ BFD, but it would be a pain. Instead, the regular linker sets up
+ these structures, and then passes them into BFD. */
+
+/* Glob pattern for a version. */
+
+struct bfd_elf_version_expr
+{
+ /* Next glob pattern for this version. */
+ struct bfd_elf_version_expr *next;
+ /* Glob pattern. */
+ const char *pattern;
+ /* Set if pattern is not a glob. */
+ unsigned int literal : 1;
+ /* Defined by ".symver". */
+ unsigned int symver : 1;
+ /* Defined by version script. */
+ unsigned int script : 1;
+ /* Pattern type. */
+#define BFD_ELF_VERSION_C_TYPE 1
+#define BFD_ELF_VERSION_CXX_TYPE 2
+#define BFD_ELF_VERSION_JAVA_TYPE 4
+ unsigned int mask : 3;
+};
+
+struct bfd_elf_version_expr_head
+{
+ /* List of all patterns, both wildcards and non-wildcards. */
+ struct bfd_elf_version_expr *list;
+ /* Hash table for non-wildcards. */
+ void *htab;
+ /* Remaining patterns. */
+ struct bfd_elf_version_expr *remaining;
+ /* What kind of pattern types are present in list (bitmask). */
+ unsigned int mask;
+};
+
+/* Version dependencies. */
+
+struct bfd_elf_version_deps
+{
+ /* Next dependency for this version. */
+ struct bfd_elf_version_deps *next;
+ /* The version which this version depends upon. */
+ struct bfd_elf_version_tree *version_needed;
+};
+
+/* A node in the version tree. */
+
+struct bfd_elf_version_tree
+{
+ /* Next version. */
+ struct bfd_elf_version_tree *next;
+ /* Name of this version. */
+ const char *name;
+ /* Version number. */
+ unsigned int vernum;
+ /* Regular expressions for global symbols in this version. */
+ struct bfd_elf_version_expr_head globals;
+ /* Regular expressions for local symbols in this version. */
+ struct bfd_elf_version_expr_head locals;
+ /* List of versions which this version depends upon. */
+ struct bfd_elf_version_deps *deps;
+ /* Index of the version name. This is used within BFD. */
+ unsigned int name_indx;
+ /* Whether this version tree was used. This is used within BFD. */
+ int used;
+ /* Matching hook. */
+ struct bfd_elf_version_expr *(*match)
+ (struct bfd_elf_version_expr_head *head,
+ struct bfd_elf_version_expr *prev, const char *sym);
+};
+
+struct bfd_elf_dynamic_list
+{
+ struct bfd_elf_version_expr_head head;
+ struct bfd_elf_version_expr *(*match)
+ (struct bfd_elf_version_expr_head *head,
+ struct bfd_elf_version_expr *prev, const char *sym);
+};
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h
new file mode 100644
index 0000000..03a1292
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h
@@ -0,0 +1,49 @@
+/* Symbol concatenation utilities.
+
+ Copyright (C) 1998, 2000 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef SYM_CAT_H
+#define SYM_CAT_H
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define CONCAT2(a,b) a##b
+#define CONCAT3(a,b,c) a##b##c
+#define CONCAT4(a,b,c,d) a##b##c##d
+#define STRINGX(s) #s
+#else
+/* Note one should never pass extra whitespace to the CONCATn macros,
+ e.g. CONCAT2(foo, bar) because traditonal C will keep the space between
+ the two labels instead of concatenating them. Instead, make sure to
+ write CONCAT2(foo,bar). */
+#define CONCAT2(a,b) a/**/b
+#define CONCAT3(a,b,c) a/**/b/**/c
+#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d
+#define STRINGX(s) "s"
+#endif
+
+#define XCONCAT2(a,b) CONCAT2(a,b)
+#define XCONCAT3(a,b,c) CONCAT3(a,b,c)
+#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d)
+
+/* Note the layer of indirection here is typically used to allow
+ stringification of the expansion of macros. I.e. "#define foo
+ bar", "XSTRING(foo)", to yield "bar". Be aware that this only
+ works for __STDC__, not for traditional C which will still resolve
+ to "foo". */
+#define XSTRING(s) STRINGX(s)
+
+#endif /* SYM_CAT_H */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info
new file mode 100644
index 0000000..3e30d56
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info
new file mode 100644
index 0000000..6c02bc5
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir
new file mode 100644
index 0000000..797764c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir
@@ -0,0 +1,23 @@
+This is the file .../info/dir, which contains the
+topmost node of the Info hierarchy, called (dir)Top.
+The first time you invoke Info you start off looking at this node.
+
+File: dir, Node: Top This is the top of the INFO tree
+
+ This (the Directory node) gives a menu of major topics.
+ Typing "q" exits, "?" lists all Info commands, "d" returns here,
+ "h" gives a primer for first-timers,
+ "mEmacs<Return>" visits the Emacs manual, etc.
+
+ In Emacs, you can click mouse button 2 on a menu item or cross reference
+ to select it.
+
+* Menu:
+
+Software development
+* Cpp: (cpp). The GNU C preprocessor.
+* Cpplib: (cppinternals). Cpplib internals.
+* g++: (gcc). The GNU C++ compiler.
+* gcc: (gcc). The GNU Compiler Collection.
+* gccinstall: (gccinstall). Installing the GNU Compiler Collection.
+* gccint: (gccint). Internals of the GNU Compiler Collection.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info
new file mode 100644
index 0000000..670296f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info
new file mode 100644
index 0000000..bde781a
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info
new file mode 100644
index 0000000..377f866
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk
new file mode 100644
index 0000000..a86de8b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk
@@ -0,0 +1,24 @@
+# Copyright (C) 2011 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+LOCAL_PATH := $(call my-dir)
+
+LOCAL_PREBUILT_LIBS := \
+ libbfd.a \
+ libiberty.a \
+ libintl.a
+
+LOCAL_MODULE_TAGS := optional
+
+include $(BUILD_HOST_PREBUILT)
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/armv7-a/crtbegin.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/armv7-a/crtbegin.o
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new file mode 100644
index 0000000..7b96912
--- /dev/null
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README
new file mode 100644
index 0000000..7086a77
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process. They are
+system-specific, and will not work on any other kind of system. They
+are also not part of GCC. The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix. As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h
new file mode 100644
index 0000000..faaaf7b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h
@@ -0,0 +1,12176 @@
+/* ARM NEON intrinsics include file. This file is generated automatically
+ using neon-gen.ml. Please do not edit manually.
+
+ Copyright (C) 2006, 2007, 2009 Free Software Foundation, Inc.
+ Contributed by CodeSourcery.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _GCC_ARM_NEON_H
+#define _GCC_ARM_NEON_H 1
+
+#ifndef __ARM_NEON__
+#error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h
+#else
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef __builtin_neon_qi int8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_hi int16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_si int32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_di int64x1_t;
+typedef __builtin_neon_sf float32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_poly8 poly8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_poly16 poly16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_uqi uint8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_uhi uint16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_usi uint32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_udi uint64x1_t;
+typedef __builtin_neon_qi int8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_hi int16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_si int32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_di int64x2_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_sf float32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_poly8 poly8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_poly16 poly16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_uqi uint8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_uhi uint16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_usi uint32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_udi uint64x2_t __attribute__ ((__vector_size__ (16)));
+
+typedef __builtin_neon_sf float32_t;
+typedef __builtin_neon_poly8 poly8_t;
+typedef __builtin_neon_poly16 poly16_t;
+
+typedef struct int8x8x2_t
+{
+ int8x8_t val[2];
+} int8x8x2_t;
+
+typedef struct int8x16x2_t
+{
+ int8x16_t val[2];
+} int8x16x2_t;
+
+typedef struct int16x4x2_t
+{
+ int16x4_t val[2];
+} int16x4x2_t;
+
+typedef struct int16x8x2_t
+{
+ int16x8_t val[2];
+} int16x8x2_t;
+
+typedef struct int32x2x2_t
+{
+ int32x2_t val[2];
+} int32x2x2_t;
+
+typedef struct int32x4x2_t
+{
+ int32x4_t val[2];
+} int32x4x2_t;
+
+typedef struct int64x1x2_t
+{
+ int64x1_t val[2];
+} int64x1x2_t;
+
+typedef struct int64x2x2_t
+{
+ int64x2_t val[2];
+} int64x2x2_t;
+
+typedef struct uint8x8x2_t
+{
+ uint8x8_t val[2];
+} uint8x8x2_t;
+
+typedef struct uint8x16x2_t
+{
+ uint8x16_t val[2];
+} uint8x16x2_t;
+
+typedef struct uint16x4x2_t
+{
+ uint16x4_t val[2];
+} uint16x4x2_t;
+
+typedef struct uint16x8x2_t
+{
+ uint16x8_t val[2];
+} uint16x8x2_t;
+
+typedef struct uint32x2x2_t
+{
+ uint32x2_t val[2];
+} uint32x2x2_t;
+
+typedef struct uint32x4x2_t
+{
+ uint32x4_t val[2];
+} uint32x4x2_t;
+
+typedef struct uint64x1x2_t
+{
+ uint64x1_t val[2];
+} uint64x1x2_t;
+
+typedef struct uint64x2x2_t
+{
+ uint64x2_t val[2];
+} uint64x2x2_t;
+
+typedef struct float32x2x2_t
+{
+ float32x2_t val[2];
+} float32x2x2_t;
+
+typedef struct float32x4x2_t
+{
+ float32x4_t val[2];
+} float32x4x2_t;
+
+typedef struct poly8x8x2_t
+{
+ poly8x8_t val[2];
+} poly8x8x2_t;
+
+typedef struct poly8x16x2_t
+{
+ poly8x16_t val[2];
+} poly8x16x2_t;
+
+typedef struct poly16x4x2_t
+{
+ poly16x4_t val[2];
+} poly16x4x2_t;
+
+typedef struct poly16x8x2_t
+{
+ poly16x8_t val[2];
+} poly16x8x2_t;
+
+typedef struct int8x8x3_t
+{
+ int8x8_t val[3];
+} int8x8x3_t;
+
+typedef struct int8x16x3_t
+{
+ int8x16_t val[3];
+} int8x16x3_t;
+
+typedef struct int16x4x3_t
+{
+ int16x4_t val[3];
+} int16x4x3_t;
+
+typedef struct int16x8x3_t
+{
+ int16x8_t val[3];
+} int16x8x3_t;
+
+typedef struct int32x2x3_t
+{
+ int32x2_t val[3];
+} int32x2x3_t;
+
+typedef struct int32x4x3_t
+{
+ int32x4_t val[3];
+} int32x4x3_t;
+
+typedef struct int64x1x3_t
+{
+ int64x1_t val[3];
+} int64x1x3_t;
+
+typedef struct int64x2x3_t
+{
+ int64x2_t val[3];
+} int64x2x3_t;
+
+typedef struct uint8x8x3_t
+{
+ uint8x8_t val[3];
+} uint8x8x3_t;
+
+typedef struct uint8x16x3_t
+{
+ uint8x16_t val[3];
+} uint8x16x3_t;
+
+typedef struct uint16x4x3_t
+{
+ uint16x4_t val[3];
+} uint16x4x3_t;
+
+typedef struct uint16x8x3_t
+{
+ uint16x8_t val[3];
+} uint16x8x3_t;
+
+typedef struct uint32x2x3_t
+{
+ uint32x2_t val[3];
+} uint32x2x3_t;
+
+typedef struct uint32x4x3_t
+{
+ uint32x4_t val[3];
+} uint32x4x3_t;
+
+typedef struct uint64x1x3_t
+{
+ uint64x1_t val[3];
+} uint64x1x3_t;
+
+typedef struct uint64x2x3_t
+{
+ uint64x2_t val[3];
+} uint64x2x3_t;
+
+typedef struct float32x2x3_t
+{
+ float32x2_t val[3];
+} float32x2x3_t;
+
+typedef struct float32x4x3_t
+{
+ float32x4_t val[3];
+} float32x4x3_t;
+
+typedef struct poly8x8x3_t
+{
+ poly8x8_t val[3];
+} poly8x8x3_t;
+
+typedef struct poly8x16x3_t
+{
+ poly8x16_t val[3];
+} poly8x16x3_t;
+
+typedef struct poly16x4x3_t
+{
+ poly16x4_t val[3];
+} poly16x4x3_t;
+
+typedef struct poly16x8x3_t
+{
+ poly16x8_t val[3];
+} poly16x8x3_t;
+
+typedef struct int8x8x4_t
+{
+ int8x8_t val[4];
+} int8x8x4_t;
+
+typedef struct int8x16x4_t
+{
+ int8x16_t val[4];
+} int8x16x4_t;
+
+typedef struct int16x4x4_t
+{
+ int16x4_t val[4];
+} int16x4x4_t;
+
+typedef struct int16x8x4_t
+{
+ int16x8_t val[4];
+} int16x8x4_t;
+
+typedef struct int32x2x4_t
+{
+ int32x2_t val[4];
+} int32x2x4_t;
+
+typedef struct int32x4x4_t
+{
+ int32x4_t val[4];
+} int32x4x4_t;
+
+typedef struct int64x1x4_t
+{
+ int64x1_t val[4];
+} int64x1x4_t;
+
+typedef struct int64x2x4_t
+{
+ int64x2_t val[4];
+} int64x2x4_t;
+
+typedef struct uint8x8x4_t
+{
+ uint8x8_t val[4];
+} uint8x8x4_t;
+
+typedef struct uint8x16x4_t
+{
+ uint8x16_t val[4];
+} uint8x16x4_t;
+
+typedef struct uint16x4x4_t
+{
+ uint16x4_t val[4];
+} uint16x4x4_t;
+
+typedef struct uint16x8x4_t
+{
+ uint16x8_t val[4];
+} uint16x8x4_t;
+
+typedef struct uint32x2x4_t
+{
+ uint32x2_t val[4];
+} uint32x2x4_t;
+
+typedef struct uint32x4x4_t
+{
+ uint32x4_t val[4];
+} uint32x4x4_t;
+
+typedef struct uint64x1x4_t
+{
+ uint64x1_t val[4];
+} uint64x1x4_t;
+
+typedef struct uint64x2x4_t
+{
+ uint64x2_t val[4];
+} uint64x2x4_t;
+
+typedef struct float32x2x4_t
+{
+ float32x2_t val[4];
+} float32x2x4_t;
+
+typedef struct float32x4x4_t
+{
+ float32x4_t val[4];
+} float32x4x4_t;
+
+typedef struct poly8x8x4_t
+{
+ poly8x8_t val[4];
+} poly8x8x4_t;
+
+typedef struct poly8x16x4_t
+{
+ poly8x16_t val[4];
+} poly8x16x4_t;
+
+typedef struct poly16x4x4_t
+{
+ poly16x4_t val[4];
+} poly16x4x4_t;
+
+typedef struct poly16x8x4_t
+{
+ poly16x8_t val[4];
+} poly16x8x4_t;
+
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vadd_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vadddi (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vadd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vaddv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vadd_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vadddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddv2di (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vaddq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vaddv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddlv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddlv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddlv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddw_s8 (int16x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddwv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddw_s16 (int32x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddwv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddw_s32 (int64x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddwv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddw_u8 (uint16x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddwv8qi ((int16x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddw_u16 (uint32x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddwv4hi ((int32x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddw_u32 (uint64x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddwv2si ((int64x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vhadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vhadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vhadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vhadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vhadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vhadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vhaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vhaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vhaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrhadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhaddv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrhadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhaddv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrhadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhaddv2si (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrhadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrhadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrhadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhaddv2si ((int32x2_t) __a, (int32x2_t) __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrhaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhaddv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrhaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhaddv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrhaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhaddv4si (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhaddv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqadd_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqadddi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqadd_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqadddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqaddq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqaddv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqaddq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqaddv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vaddhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddhnv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vaddhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddhnv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vaddhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddhnv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vaddhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vaddhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddhnv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vaddhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddhnv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vraddhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddhnv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vraddhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddhnv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vraddhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddhnv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vraddhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vraddhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddhnv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vraddhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddhnv2di ((int64x2_t) __a, (int64x2_t) __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmul_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vmulv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmulv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmulv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmulv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmul_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vmulv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmulv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmulv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmul_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly8x8_t)__builtin_neon_vmulv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmulq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vmulv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmulv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmulv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmulv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmulq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vmulv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmulv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmulv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmulq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (poly8x16_t)__builtin_neon_vmulv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulhv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulhv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulhv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulhv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulhv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulhv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulhv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulhv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmull_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmullv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmullv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vmullv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmull_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmullv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmullv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vmullv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vmull_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly16x8_t)__builtin_neon_vmullv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmullv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqdmullv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmla_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vmlav8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmlav4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmlav2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmlav2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmla_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vmlav8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmlav4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmlav2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmlaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vmlav16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlav8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlav4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmlav4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmlaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vmlav16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlav8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlav4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlalv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlalv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlalv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlalv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmls_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vmlsv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmlsv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmlsv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmlsv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmls_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vmlsv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmlsv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmlsv2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmlsq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vmlsv16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlsv8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlsv4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmlsv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmlsq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vmlsv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlsv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlsv4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsl_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlslv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlslv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlslv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsl_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlslv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlslv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlslv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlslv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlslv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsub_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vsubdi (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vsub_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vsubv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsub_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vsubdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsubv2di (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vsubq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vsubv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsubv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsublv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsublv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsublv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsublv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsublv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsublv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubw_s8 (int16x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsubwv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubw_s16 (int32x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsubwv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubw_s32 (int64x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsubwv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubw_u8 (uint16x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsubwv8qi ((int16x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubw_u16 (uint32x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsubwv4hi ((int32x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubw_u32 (uint64x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsubwv2si ((int64x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vhsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vhsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vhsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vhsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vhsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vhsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vhsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vhsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vhsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vhsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vhsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vhsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqsub_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqsubdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqsub_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqsubdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqsubq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqsubv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqsubq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqsubv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsubhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubhnv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsubhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubhnv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsubhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubhnv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsubhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsubhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubhnv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsubhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubhnv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrsubhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubhnv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrsubhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubhnv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrsubhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubhnv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrsubhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrsubhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubhnv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsubhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubhnv2di ((int64x2_t) __a, (int64x2_t) __b, 4);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vceq_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vceqv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vceq_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vceqv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vceqq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vceqv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vceqq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vceqv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcge_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcge_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcge_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcge_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgeq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgeq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgeq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgeq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcle_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcle_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcle_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi ((int8x8_t) __b, (int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcle_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi ((int16x4_t) __b, (int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si ((int32x2_t) __b, (int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcleq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcleq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcleq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi ((int8x16_t) __b, (int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcleq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi ((int16x8_t) __b, (int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si ((int32x4_t) __b, (int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcgt_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcgt_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcgt_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcgt_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgtq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgtq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgtq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgtq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclt_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclt_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclt_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi ((int8x8_t) __b, (int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclt_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi ((int16x4_t) __b, (int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si ((int32x2_t) __b, (int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcltq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcltq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcltq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi ((int8x16_t) __b, (int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcltq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi ((int16x8_t) __b, (int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si ((int32x4_t) __b, (int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcage_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcageq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcale_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagev2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcaleq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagev4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcagt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagtv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcagtq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagtv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcalt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagtv2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcaltq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagtv4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vtst_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vtstv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vtst_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vtstv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vtst_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vtstv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vtst_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vtstv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vtstq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vtstv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vtstq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vtstv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vtstq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vtstv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vtstq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vtstv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vabd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vabdv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vabd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vabdv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vabd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vabdv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vabd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vabdv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vabd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vabdv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vabd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vabdv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vabd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vabdv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabdq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vabdv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabdq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vabdv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabdq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vabdv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vabdq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vabdv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vabdq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vabdv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabdq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vabdv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabdq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vabdv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabdl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vabdlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabdl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vabdlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vabdl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vabdlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabdl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vabdlv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabdl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vabdlv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vabdl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vabdlv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vaba_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vabav8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vaba_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vabav4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vaba_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vabav2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vaba_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vabav8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vaba_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vabav4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vaba_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vabav2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vabav16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vabav8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vabav4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vabaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vabav16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vabav8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vabav4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vabalv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vabalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vabal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vabalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vabalv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vabalv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vabal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vabalv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmax_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vmaxv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmax_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmaxv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmax_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmaxv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmax_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmaxv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmax_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vmaxv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmax_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmaxv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmax_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmaxv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmaxq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vmaxv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmaxq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmaxv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmaxq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmaxv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmaxq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmaxv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmaxq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vmaxv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmaxq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmaxv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmaxq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmaxv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmin_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vminv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmin_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vminv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmin_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vminv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmin_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vminv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmin_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vminv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmin_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vminv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmin_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vminv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vminq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vminv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vminq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vminv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vminq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vminv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vminq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vminv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vminq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vminv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vminq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vminv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vminq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vminv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpadd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpaddv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpaddl_s8 (int8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vpaddlv8qi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpaddl_s16 (int16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vpaddlv4hi (__a, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vpaddl_s32 (int32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vpaddlv2si (__a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpaddl_u8 (uint8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vpaddlv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpaddl_u16 (uint16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vpaddlv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vpaddl_u32 (uint32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vpaddlv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vpaddlq_s8 (int8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vpaddlv16qi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vpaddlq_s16 (int16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vpaddlv8hi (__a, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vpaddlq_s32 (int32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vpaddlv4si (__a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vpaddlq_u8 (uint8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vpaddlv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vpaddlq_u16 (uint16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vpaddlv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vpaddlq_u32 (uint32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vpaddlv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpadal_s8 (int16x4_t __a, int8x8_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpadalv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpadal_s16 (int32x2_t __a, int16x4_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpadalv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vpadal_s32 (int64x1_t __a, int32x2_t __b)
+{
+ return (int64x1_t)__builtin_neon_vpadalv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpadal_u8 (uint16x4_t __a, uint8x8_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpadalv8qi ((int16x4_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpadal_u16 (uint32x2_t __a, uint16x4_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpadalv4hi ((int32x2_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vpadal_u32 (uint64x1_t __a, uint32x2_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vpadalv2si ((int64x1_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vpadalq_s8 (int16x8_t __a, int8x16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vpadalv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vpadalq_s16 (int32x4_t __a, int16x8_t __b)
+{
+ return (int32x4_t)__builtin_neon_vpadalv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vpadalq_s32 (int64x2_t __a, int32x4_t __b)
+{
+ return (int64x2_t)__builtin_neon_vpadalv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vpadalq_u8 (uint16x8_t __a, uint8x16_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vpadalv16qi ((int16x8_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vpadalq_u16 (uint32x4_t __a, uint16x8_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vpadalv8hi ((int32x4_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vpadalq_u32 (uint64x2_t __a, uint32x4_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vpadalv4si ((int64x2_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpmax_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpmaxv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpmax_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpmaxv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpmax_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpmaxv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpmax_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpmaxv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpmax_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpmaxv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpmax_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpmaxv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpmax_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpmaxv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpmin_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpminv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpmin_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpminv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpmin_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpminv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpmin_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpminv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpmin_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpminv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpmin_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpminv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpmin_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpminv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrecps_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vrecpsv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrecpsq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vrecpsv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrsqrts_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vrsqrtsv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrsqrtsq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vrsqrtsv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vshlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vshlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vshlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vshldi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vshlv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vshlv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vshlv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vshldi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vshlv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vshlv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vshlv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vshlv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vshlv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vshlv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vshlv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vshlv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vshlv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vshlv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vshlv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vshldi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vshlv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vshlv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vshlv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vshldi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vshlv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vshlv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vshlv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vshlv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vshlv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vshlv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vshlv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vshlv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqshlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqshlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqshlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqshldi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshldi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqshlv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqshlv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqshlv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqshlv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqrshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqshlv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqshlv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqshlv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqrshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqshldi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqrshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshldi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqrshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqshlv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqshlv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqshlv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqrshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqshlv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqrshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshr_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshr_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshr_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshr_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshr_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshr_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshr_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshr_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshr_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshr_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshr_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshr_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshr_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshr_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshr_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshr_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshrq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshr_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshrq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshr_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshrq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshr_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshrq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshr_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshrq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshr_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshrq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshr_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshrq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshr_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshrq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshr_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshr_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshr_nv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshr_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshr_nv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshr_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshr_nv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrshr_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshr_ndi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshr_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshr_nv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshr_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshr_nv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshr_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshr_nv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrshr_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshr_ndi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrshrq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshr_nv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrshrq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshr_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrshrq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshr_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrshrq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshr_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrshrq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshr_nv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrshrq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshr_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrshrq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshr_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrshrq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshr_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshrn_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshrn_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshrn_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshrn_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshrn_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshrn_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshrn_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshrn_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshrn_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshrn_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshrn_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshrn_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshrn_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshrn_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshrn_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrn_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrn_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrn_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqrshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshrn_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshrn_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshrn_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrn_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrn_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrn_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshrun_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrun_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshrun_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrun_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshrun_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrun_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshrun_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrun_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshrun_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrun_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshrun_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrun_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshl_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshl_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshl_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshl_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshl_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshl_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshl_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshl_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshl_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshl_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshl_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshl_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshl_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshl_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshl_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshl_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshlq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshl_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshlq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshl_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshlq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshl_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshlq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshl_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshlq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshl_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshlq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshl_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshlq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshl_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshlq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshl_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshl_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshl_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshl_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshl_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshl_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshl_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqshl_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vqshl_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshl_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshl_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshl_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshl_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshl_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshl_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshl_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshl_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqshlq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vqshl_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqshlq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vqshl_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqshlq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vqshl_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqshlq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vqshl_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshlq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshl_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshlq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshl_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshlq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshl_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshlq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshl_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshlu_n_s8 (int8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlu_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshlu_n_s16 (int16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlu_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshlu_n_s32 (int32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlu_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshlu_n_s64 (int64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshlu_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshluq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlu_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshluq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlu_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshluq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlu_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshluq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlu_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshll_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshll_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshll_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshll_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshll_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshll_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshll_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshll_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshll_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshll_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshll_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshll_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsra_nv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsra_nv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsra_nv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsra_ndi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsra_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsra_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsra_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsra_ndi ((int64x1_t) __a, (int64x1_t) __b, __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsra_nv16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsra_nv8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsra_nv4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsra_nv2di (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsra_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsra_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsra_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsra_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsra_nv8qi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsra_nv4hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsra_nv2si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsra_ndi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsra_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsra_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsra_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsra_ndi ((int64x1_t) __a, (int64x1_t) __b, __c, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsra_nv16qi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsra_nv8hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsra_nv4si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsra_nv2di (__a, __b, __c, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsra_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsra_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsra_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsra_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsri_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsri_nv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsri_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsri_nv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsri_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsri_nv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsri_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsri_ndi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsri_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsri_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsri_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsri_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsri_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsri_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsri_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsri_ndi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vsri_n_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vsri_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vsri_n_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vsri_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsri_nv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsriq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsri_nv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsriq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsri_nv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsriq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsri_nv2di (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsriq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsri_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsriq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsri_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsriq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsri_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsriq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsri_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsriq_n_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vsri_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsriq_n_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vsri_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsli_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsli_nv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsli_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsli_nv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsli_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsli_nv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsli_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsli_ndi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsli_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsli_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsli_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsli_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsli_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsli_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsli_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsli_ndi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vsli_n_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vsli_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vsli_n_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vsli_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsli_nv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsliq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsli_nv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsliq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsli_nv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsliq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsli_nv2di (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsli_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsli_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsli_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsliq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsli_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsliq_n_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vsli_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsliq_n_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vsli_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vabs_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vabsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vabs_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vabsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vabs_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vabsv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vabs_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vabsv2sf (__a, 3);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vabsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vabsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vabsv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vabsq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vabsv4sf (__a, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqabs_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqabsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqabs_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqabsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqabs_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqabsv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqabsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vqabsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqabsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vqabsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqabsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vqabsv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vneg_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vnegv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vneg_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vnegv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vneg_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vnegv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vneg_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vnegv2sf (__a, 3);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vnegq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vnegv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vnegq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vnegv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vnegq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vnegv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vnegq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vnegv4sf (__a, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqneg_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqnegv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqneg_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqnegv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqneg_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqnegv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqnegq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vqnegv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqnegq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vqnegv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqnegq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vqnegv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmvn_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vmvnv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmvn_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vmvnv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmvn_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vmvnv2si (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmvn_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vmvnv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmvn_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vmvnv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmvn_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vmvnv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmvn_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vmvnv8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmvnq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vmvnv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmvnq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vmvnv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmvnq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vmvnv4si (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmvnq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vmvnv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmvnq_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vmvnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmvnq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vmvnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmvnq_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vmvnv16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcls_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vclsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcls_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vclsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcls_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vclsv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vclsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vclsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vclsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vclsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vclsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vclsv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vclz_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vclzv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vclz_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vclzv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vclz_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vclzv2si (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclz_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vclzv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclz_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vclzv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclz_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vclzv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vclzq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vclzv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vclzq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vclzv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vclzq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vclzv4si (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vclzq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vclzv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vclzq_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vclzv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vclzq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vclzv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcnt_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vcntv8qi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcnt_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vcntv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcnt_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vcntv8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcntq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vcntv16qi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcntq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vcntv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcntq_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vcntv16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrecpe_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrecpev2sf (__a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrecpe_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrecpev2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrecpeq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrecpev4sf (__a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrecpeq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrecpev4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrsqrte_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrsqrtev2sf (__a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsqrte_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrsqrtev2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrsqrteq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrsqrtev4sf (__a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrsqrteq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrsqrtev4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vget_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8_t)__builtin_neon_vget_lanev8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vget_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16_t)__builtin_neon_vget_lanev4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vget_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32_t)__builtin_neon_vget_lanev2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32_t __attribute__ ((__always_inline__))
+vget_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32_t)__builtin_neon_vget_lanev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vget_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8_t)__builtin_neon_vget_lanev8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vget_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16_t)__builtin_neon_vget_lanev4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vget_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32_t)__builtin_neon_vget_lanev2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline poly8_t __attribute__ ((__always_inline__))
+vget_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8_t)__builtin_neon_vget_lanev8qi ((int8x8_t) __a, __b, 2);
+}
+
+__extension__ static __inline poly16_t __attribute__ ((__always_inline__))
+vget_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16_t)__builtin_neon_vget_lanev4hi ((int16x4_t) __a, __b, 2);
+}
+
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vget_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64_t)__builtin_neon_vget_lanedi (__a, __b, 1);
+}
+
+__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+vget_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64_t)__builtin_neon_vget_lanedi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vgetq_lane_s8 (int8x16_t __a, const int __b)
+{
+ return (int8_t)__builtin_neon_vget_lanev16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vgetq_lane_s16 (int16x8_t __a, const int __b)
+{
+ return (int16_t)__builtin_neon_vget_lanev8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vgetq_lane_s32 (int32x4_t __a, const int __b)
+{
+ return (int32_t)__builtin_neon_vget_lanev4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32_t __attribute__ ((__always_inline__))
+vgetq_lane_f32 (float32x4_t __a, const int __b)
+{
+ return (float32_t)__builtin_neon_vget_lanev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vgetq_lane_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8_t)__builtin_neon_vget_lanev16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vgetq_lane_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16_t)__builtin_neon_vget_lanev8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vgetq_lane_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32_t)__builtin_neon_vget_lanev4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline poly8_t __attribute__ ((__always_inline__))
+vgetq_lane_p8 (poly8x16_t __a, const int __b)
+{
+ return (poly8_t)__builtin_neon_vget_lanev16qi ((int8x16_t) __a, __b, 2);
+}
+
+__extension__ static __inline poly16_t __attribute__ ((__always_inline__))
+vgetq_lane_p16 (poly16x8_t __a, const int __b)
+{
+ return (poly16_t)__builtin_neon_vget_lanev8hi ((int16x8_t) __a, __b, 2);
+}
+
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vgetq_lane_s64 (int64x2_t __a, const int __b)
+{
+ return (int64_t)__builtin_neon_vget_lanev2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+vgetq_lane_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64_t)__builtin_neon_vget_lanev2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vset_lane_s8 (int8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vset_lane_s16 (int16_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vset_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vset_lanev2si ((__builtin_neon_si) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vset_lane_f32 (float32_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vset_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vset_lane_u8 (uint8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vset_lane_u16 (uint16_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vset_lane_u32 (uint32_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vset_lanev2si ((__builtin_neon_si) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vset_lane_p8 (poly8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vset_lane_p16 (poly16_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vset_lane_s64 (int64_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vset_lanedi ((__builtin_neon_di) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vset_lane_u64 (uint64_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vset_lanedi ((__builtin_neon_di) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_s8 (int8_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_s16 (int16_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vset_lanev4si ((__builtin_neon_si) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vset_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_u8 (uint8_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_u16 (uint16_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_u32 (uint32_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vset_lanev4si ((__builtin_neon_si) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_p8 (poly8_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_p16 (poly16_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsetq_lane_s64 (int64_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vset_lanev2di ((__builtin_neon_di) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsetq_lane_u64 (uint64_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vset_lanev2di ((__builtin_neon_di) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcreate_s8 (uint64_t __a)
+{
+ return (int8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcreate_s16 (uint64_t __a)
+{
+ return (int16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcreate_s32 (uint64_t __a)
+{
+ return (int32x2_t)__builtin_neon_vcreatev2si ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vcreate_s64 (uint64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcreate_f32 (uint64_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcreatev2sf ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcreate_u8 (uint64_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcreate_u16 (uint64_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcreate_u32 (uint64_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vcreatev2si ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vcreate_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcreate_p8 (uint64_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vcreate_p16 (uint64_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vdup_n_s8 (int8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vdup_n_s16 (int16_t __a)
+{
+ return (int16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vdup_n_s32 (int32_t __a)
+{
+ return (int32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vdup_n_f32 (float32_t __a)
+{
+ return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vdup_n_u8 (uint8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vdup_n_u16 (uint16_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vdup_n_u32 (uint32_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vdup_n_p8 (poly8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vdup_n_p16 (poly16_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vdup_n_s64 (int64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vdup_n_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vdupq_n_s8 (int8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vdupq_n_s16 (int16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vdupq_n_s32 (int32_t __a)
+{
+ return (int32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vdupq_n_f32 (float32_t __a)
+{
+ return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vdupq_n_u8 (uint8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vdupq_n_u16 (uint16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vdupq_n_u32 (uint32_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vdupq_n_p8 (poly8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vdupq_n_p16 (poly16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vdupq_n_s64 (int64_t __a)
+{
+ return (int64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vdupq_n_u64 (uint64_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmov_n_s8 (int8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmov_n_s16 (int16_t __a)
+{
+ return (int16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmov_n_s32 (int32_t __a)
+{
+ return (int32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmov_n_f32 (float32_t __a)
+{
+ return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmov_n_u8 (uint8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmov_n_u16 (uint16_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmov_n_u32 (uint32_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmov_n_p8 (poly8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vmov_n_p16 (poly16_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vmov_n_s64 (int64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vmov_n_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmovq_n_s8 (int8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmovq_n_s16 (int16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmovq_n_s32 (int32_t __a)
+{
+ return (int32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmovq_n_f32 (float32_t __a)
+{
+ return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmovq_n_u8 (uint8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmovq_n_u16 (uint16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmovq_n_u32 (uint32_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmovq_n_p8 (poly8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vmovq_n_p16 (poly16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmovq_n_s64 (int64_t __a)
+{
+ return (int64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmovq_n_u64 (uint64_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vdup_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vdup_lanev8qi (__a, __b);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vdup_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vdup_lanev4hi (__a, __b);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vdup_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vdup_lanev2si (__a, __b);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vdup_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vdup_lanev2sf (__a, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vdup_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vdup_lanev8qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vdup_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vdup_lanev4hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vdup_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vdup_lanev2si ((int32x2_t) __a, __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vdup_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8x8_t)__builtin_neon_vdup_lanev8qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vdup_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16x4_t)__builtin_neon_vdup_lanev4hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vdup_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vdup_lanedi (__a, __b);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vdup_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vdup_lanedi ((int64x1_t) __a, __b);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vdup_lanev16qi (__a, __b);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vdup_lanev8hi (__a, __b);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vdup_lanev4si (__a, __b);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vdup_lanev4sf (__a, __b);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vdup_lanev16qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vdup_lanev8hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vdup_lanev4si ((int32x2_t) __a, __b);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8x16_t)__builtin_neon_vdup_lanev16qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16x8_t)__builtin_neon_vdup_lanev8hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vdupq_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vdup_lanev2di (__a, __b);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vdupq_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vdup_lanev2di ((int64x1_t) __a, __b);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcombine_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x16_t)__builtin_neon_vcombinev8qi (__a, __b);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vcombine_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x8_t)__builtin_neon_vcombinev4hi (__a, __b);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcombine_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x4_t)__builtin_neon_vcombinev2si (__a, __b);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vcombine_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x2_t)__builtin_neon_vcombinedi (__a, __b);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcombine_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x4_t)__builtin_neon_vcombinev2sf (__a, __b);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcombine_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcombinev8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcombine_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcombinev4hi ((int16x4_t) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcombine_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcombinev2si ((int32x2_t) __a, (int32x2_t) __b);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vcombine_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vcombinedi ((int64x1_t) __a, (int64x1_t) __b);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcombine_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly8x16_t)__builtin_neon_vcombinev8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vcombine_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ return (poly16x8_t)__builtin_neon_vcombinev4hi ((int16x4_t) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vget_high_s8 (int8x16_t __a)
+{
+ return (int8x8_t)__builtin_neon_vget_highv16qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vget_high_s16 (int16x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vget_highv8hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vget_high_s32 (int32x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vget_highv4si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vget_high_s64 (int64x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vget_highv2di (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vget_high_f32 (float32x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vget_highv4sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vget_high_u8 (uint8x16_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vget_highv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vget_high_u16 (uint16x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vget_highv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vget_high_u32 (uint32x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vget_highv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vget_high_u64 (uint64x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vget_highv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vget_high_p8 (poly8x16_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vget_highv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vget_high_p16 (poly16x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vget_highv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vget_low_s8 (int8x16_t __a)
+{
+ return (int8x8_t)__builtin_neon_vget_lowv16qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vget_low_s16 (int16x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vget_lowv8hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vget_low_s32 (int32x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vget_lowv4si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vget_low_s64 (int64x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vget_lowv2di (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vget_low_f32 (float32x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vget_lowv4sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vget_low_u8 (uint8x16_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vget_lowv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vget_low_u16 (uint16x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vget_low_u32 (uint32x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vget_lowv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vget_low_u64 (uint64x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vget_lowv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vget_low_p8 (poly8x16_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vget_lowv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vget_low_p16 (poly16x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvt_s32_f32 (float32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vcvtv2sf (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_f32_s32 (int32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcvtv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_f32_u32 (uint32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcvtv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvt_u32_f32 (float32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vcvtv2sf (__a, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtq_s32_f32 (float32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vcvtv4sf (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_f32_s32 (int32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vcvtv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_f32_u32 (uint32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vcvtv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtq_u32_f32 (float32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vcvtv4sf (__a, 0);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvt_n_s32_f32 (float32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vcvt_nv2sf (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_n_f32_s32 (int32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vcvt_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_n_f32_u32 (uint32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vcvt_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvt_n_u32_f32 (float32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vcvt_nv2sf (__a, __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_s32_f32 (float32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vcvt_nv4sf (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_f32_s32 (int32x4_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vcvt_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_f32_u32 (uint32x4_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vcvt_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_u32_f32 (float32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vcvt_nv4sf (__a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmovn_s16 (int16x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vmovnv8hi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmovn_s32 (int32x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vmovnv4si (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmovn_s64 (int64x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vmovnv2di (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmovn_u16 (uint16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vmovnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmovn_u32 (uint32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vmovnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmovn_u64 (uint64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vmovnv2di ((int64x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqmovn_s16 (int16x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqmovnv8hi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqmovn_s32 (int32x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqmovnv4si (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqmovn_s64 (int64x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqmovnv2di (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqmovn_u16 (uint16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vqmovnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqmovn_u32 (uint32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vqmovnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqmovn_u64 (uint64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vqmovnv2di ((int64x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqmovun_s16 (int16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vqmovunv8hi (__a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqmovun_s32 (int32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vqmovunv4si (__a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqmovun_s64 (int64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vqmovunv2di (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmovl_s8 (int8x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vmovlv8qi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmovl_s16 (int16x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vmovlv4hi (__a, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmovl_s32 (int32x2_t __a)
+{
+ return (int64x2_t)__builtin_neon_vmovlv2si (__a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmovl_u8 (uint8x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vmovlv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmovl_u16 (uint16x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vmovlv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmovl_u32 (uint32x2_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vmovlv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl1_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vtbl1v8qi (__a, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl1_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtbl1v8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl1_p8 (poly8x8_t __a, uint8x8_t __b)
+{
+ return (poly8x8_t)__builtin_neon_vtbl1v8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl2_s8 (int8x8x2_t __a, int8x8_t __b)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl2_u8 (uint8x8x2_t __a, uint8x8_t __b)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl2_p8 (poly8x8x2_t __a, uint8x8_t __b)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl3_s8 (int8x8x3_t __a, int8x8_t __b)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl3_u8 (uint8x8x3_t __a, uint8x8_t __b)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl3_p8 (poly8x8x3_t __a, uint8x8_t __b)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl4_s8 (int8x8x4_t __a, int8x8_t __b)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl4_u8 (uint8x8x4_t __a, uint8x8_t __b)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl4_p8 (poly8x8x4_t __a, uint8x8_t __b)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx1_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vtbx1v8qi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx1_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vtbx1v8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx1_p8 (poly8x8_t __a, poly8x8_t __b, uint8x8_t __c)
+{
+ return (poly8x8_t)__builtin_neon_vtbx1v8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx2_s8 (int8x8_t __a, int8x8x2_t __b, int8x8_t __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx2v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx2_u8 (uint8x8_t __a, uint8x8x2_t __b, uint8x8_t __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx2v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx2_p8 (poly8x8_t __a, poly8x8x2_t __b, uint8x8_t __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx2v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx3_s8 (int8x8_t __a, int8x8x3_t __b, int8x8_t __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx3v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx3_u8 (uint8x8_t __a, uint8x8x3_t __b, uint8x8_t __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx3v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx3_p8 (poly8x8_t __a, poly8x8x3_t __b, uint8x8_t __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx3v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx4_s8 (int8x8_t __a, int8x8x4_t __b, int8x8_t __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx4v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx4_u8 (uint8x8_t __a, uint8x8x4_t __b, uint8x8_t __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx4v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx4_p8 (poly8x8_t __a, poly8x8x4_t __b, uint8x8_t __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx4v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vmul_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vmul_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_lane_f32 (float32x2_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vmul_lanev2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_lane_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vmul_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_lane_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vmul_lanev2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vmul_lanev8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vmul_lanev4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_f32 (float32x4_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vmul_lanev4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_lane_u16 (uint16x8_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vmul_lanev8hi ((int16x8_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_u32 (uint32x4_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vmul_lanev4si ((int32x4_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x4_t)__builtin_neon_vmla_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x2_t)__builtin_neon_vmla_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_lane_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x2_t)__builtin_neon_vmla_lanev2sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_lane_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x4_t)__builtin_neon_vmla_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_lane_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x2_t)__builtin_neon_vmla_lanev2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x8_t)__builtin_neon_vmla_lanev8hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmla_lanev4si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_f32 (float32x4_t __a, float32x4_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x4_t)__builtin_neon_vmla_lanev4sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_lane_u16 (uint16x8_t __a, uint16x8_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x8_t)__builtin_neon_vmla_lanev8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_u32 (uint32x4_t __a, uint32x4_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmla_lanev4si ((int32x4_t) __a, (int32x4_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmlal_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vmlal_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_lane_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmlal_lanev4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_lane_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint64x2_t)__builtin_neon_vmlal_lanev2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vqdmlal_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vqdmlal_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x4_t)__builtin_neon_vmls_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x2_t)__builtin_neon_vmls_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_lane_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x2_t)__builtin_neon_vmls_lanev2sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_lane_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x4_t)__builtin_neon_vmls_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_lane_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x2_t)__builtin_neon_vmls_lanev2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x8_t)__builtin_neon_vmls_lanev8hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmls_lanev4si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_f32 (float32x4_t __a, float32x4_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x4_t)__builtin_neon_vmls_lanev4sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_lane_u16 (uint16x8_t __a, uint16x8_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x8_t)__builtin_neon_vmls_lanev8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_u32 (uint32x4_t __a, uint32x4_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmls_lanev4si ((int32x4_t) __a, (int32x4_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmlsl_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vmlsl_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_lane_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmlsl_lanev4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_lane_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint64x2_t)__builtin_neon_vmlsl_lanev2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vqdmlsl_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vqdmlsl_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vmull_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vmull_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_lane_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vmull_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_lane_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vmull_lanev2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmull_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmull_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_lanev8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_lanev4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_lanev8hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_lanev4si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_lanev4hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_lanev2si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmul_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmul_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_n_f32 (float32x2_t __a, float32_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_n_u16 (uint16x4_t __a, uint16_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmul_nv4hi ((int16x4_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_n_u32 (uint32x2_t __a, uint32_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmul_nv2si ((int32x2_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmul_nv8hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmul_nv4si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_n_f32 (float32x4_t __a, float32_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_n_u16 (uint16x8_t __a, uint16_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmul_nv8hi ((int16x8_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_n_u32 (uint32x4_t __a, uint32_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmul_nv4si ((int32x4_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmull_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int64x2_t)__builtin_neon_vmull_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_n_u16 (uint16x4_t __a, uint16_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmull_nv4hi ((int16x4_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_n_u32 (uint32x2_t __a, uint32_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vmull_nv2si ((int32x2_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmull_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqdmull_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_nv8hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_nv4si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_nv8hi (__a, (__builtin_neon_hi) __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_nv4si (__a, (__builtin_neon_si) __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_nv4hi (__a, (__builtin_neon_hi) __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_nv2si (__a, (__builtin_neon_si) __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmla_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmla_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmla_nv4hi ((int16x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmla_nv2si ((int32x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmla_nv8hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmla_nv4si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmla_nv8hi ((int16x8_t) __a, (int16x8_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmla_nv4si ((int32x4_t) __a, (int32x4_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlal_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlal_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlal_nv4hi ((int32x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlal_nv2si ((int64x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlal_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlal_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmls_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmls_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmls_nv4hi ((int16x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmls_nv2si ((int32x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmls_nv8hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmls_nv4si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmls_nv8hi ((int16x8_t) __a, (int16x8_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmls_nv4si ((int32x4_t) __a, (int32x4_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlsl_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlsl_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlsl_nv4hi ((int32x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlsl_nv2si ((int64x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlsl_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlsl_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vext_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vextv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vext_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vextv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vext_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vextv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vext_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vextdi (__a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vext_f32 (float32x2_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vextv2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vext_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vextv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vext_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vextv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vext_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vextv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vext_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vextdi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vext_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vextv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vext_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vextv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vextq_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vextv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vextq_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vextv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vextq_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vextv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vextq_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vextv2di (__a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vextq_f32 (float32x4_t __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vextv4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vextq_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vextv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vextq_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vextv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vextq_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vextv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vextq_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vextv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vextq_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vextv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vextq_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vextv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev64_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev64v8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrev64_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vrev64v4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrev64_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vrev64v2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrev64_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrev64v2sf (__a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev64_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev64v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrev64_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vrev64v4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrev64_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrev64v2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev64_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev64v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vrev64_p16 (poly16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vrev64v4hi ((int16x4_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev64q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev64v16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrev64q_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vrev64v8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrev64q_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vrev64v4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrev64q_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrev64v4sf (__a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev64q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev64v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrev64q_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vrev64v8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrev64q_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrev64v4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev64q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev64v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vrev64q_p16 (poly16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vrev64v8hi ((int16x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev32_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev32v8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrev32_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vrev32v4hi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev32_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev32v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrev32_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vrev32v4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev32_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev32v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vrev32_p16 (poly16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vrev32v4hi ((int16x4_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev32q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev32v16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrev32q_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vrev32v8hi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev32q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev32v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrev32q_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vrev32v8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev32q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev32v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vrev32q_p16 (poly16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vrev32v8hi ((int16x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev16_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev16v8qi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev16_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev16v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev16_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev16v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev16q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev16v16qi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev16q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev16v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev16q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev16v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vbsl_s8 (uint8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vbsl_s16 (uint16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vbsl_s32 (uint32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vbslv2si ((int32x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vbsl_s64 (uint64x1_t __a, int64x1_t __b, int64x1_t __c)
+{
+ return (int64x1_t)__builtin_neon_vbsldi ((int64x1_t) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vbsl_f32 (uint32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vbslv2sf ((int32x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vbsl_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vbsl_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vbsl_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vbslv2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vbsl_u64 (uint64x1_t __a, uint64x1_t __b, uint64x1_t __c)
+{
+ return (uint64x1_t)__builtin_neon_vbsldi ((int64x1_t) __a, (int64x1_t) __b, (int64x1_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vbsl_p8 (uint8x8_t __a, poly8x8_t __b, poly8x8_t __c)
+{
+ return (poly8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vbsl_p16 (uint16x4_t __a, poly16x4_t __b, poly16x4_t __c)
+{
+ return (poly16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vbslq_s8 (uint8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vbslq_s16 (uint16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vbslq_s32 (uint32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vbslv4si ((int32x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vbslq_s64 (uint64x2_t __a, int64x2_t __b, int64x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vbslv2di ((int64x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vbslq_f32 (uint32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vbslv4sf ((int32x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vbslq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vbslq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vbslq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vbslv4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vbslv2di ((int64x2_t) __a, (int64x2_t) __b, (int64x2_t) __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vbslq_p8 (uint8x16_t __a, poly8x16_t __b, poly8x16_t __c)
+{
+ return (poly8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vbslq_p16 (uint16x8_t __a, poly16x8_t __b, poly16x8_t __c)
+{
+ return (poly16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c);
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vtrn_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vtrn_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vtrn_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vtrnv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vtrn_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vtrnv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vtrn_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vtrn_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vtrn_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vtrnv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vtrn_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vtrn_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vtrnv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vtrnv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vtrnv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vzip_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vzipv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vzip_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vzipv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vzip_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vzipv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vzip_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vzipv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vzip_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vzipv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vzip_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vzipv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vzip_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vzipv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vzip_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vzipv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vzip_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vzipv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vzipq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vzipv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vzipq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vzipv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vzipq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vzipv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vzipq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vzipv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vzipq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vzipv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vzipq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vzipv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vzipq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vzipv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vzipq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vzipv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vzipq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vzipv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vuzp_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vuzp_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vuzp_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vuzpv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vuzp_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vuzpv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vuzp_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vuzp_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vuzp_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vuzpv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vuzp_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vuzp_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vuzpv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vuzpv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vuzpv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_s8 (const int8_t * __a)
+{
+ return (int8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_s16 (const int16_t * __a)
+{
+ return (int16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_s32 (const int32_t * __a)
+{
+ return (int32x2_t)__builtin_neon_vld1v2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_s64 (const int64_t * __a)
+{
+ return (int64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_f32 (const float32_t * __a)
+{
+ return (float32x2_t)__builtin_neon_vld1v2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_u8 (const uint8_t * __a)
+{
+ return (uint8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_u16 (const uint16_t * __a)
+{
+ return (uint16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_u32 (const uint32_t * __a)
+{
+ return (uint32x2_t)__builtin_neon_vld1v2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_u64 (const uint64_t * __a)
+{
+ return (uint64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_p8 (const poly8_t * __a)
+{
+ return (poly8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_p16 (const poly16_t * __a)
+{
+ return (poly16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_s8 (const int8_t * __a)
+{
+ return (int8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_s16 (const int16_t * __a)
+{
+ return (int16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_s32 (const int32_t * __a)
+{
+ return (int32x4_t)__builtin_neon_vld1v4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_s64 (const int64_t * __a)
+{
+ return (int64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_f32 (const float32_t * __a)
+{
+ return (float32x4_t)__builtin_neon_vld1v4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_u8 (const uint8_t * __a)
+{
+ return (uint8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_u16 (const uint16_t * __a)
+{
+ return (uint16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_u32 (const uint32_t * __a)
+{
+ return (uint32x4_t)__builtin_neon_vld1v4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_u64 (const uint64_t * __a)
+{
+ return (uint64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_p8 (const poly8_t * __a)
+{
+ return (poly8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_p16 (const poly16_t * __a)
+{
+ return (poly16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_lane_s8 (const int8_t * __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_lane_s16 (const int16_t * __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_lane_s32 (const int32_t * __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vld1_lanev2si ((const __builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_lane_f32 (const float32_t * __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vld1_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_lane_u8 (const uint8_t * __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_lane_u16 (const uint16_t * __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_lane_u32 (const uint32_t * __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vld1_lanev2si ((const __builtin_neon_si *) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_lane_p8 (const poly8_t * __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_lane_p16 (const poly16_t * __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_lane_s64 (const int64_t * __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vld1_lanedi ((const __builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_lane_u64 (const uint64_t * __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vld1_lanedi ((const __builtin_neon_di *) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_s8 (const int8_t * __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_s16 (const int16_t * __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_s32 (const int32_t * __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vld1_lanev4si ((const __builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_f32 (const float32_t * __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vld1_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_u8 (const uint8_t * __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_u16 (const uint16_t * __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_u32 (const uint32_t * __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vld1_lanev4si ((const __builtin_neon_si *) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_p8 (const poly8_t * __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_p16 (const poly16_t * __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_lane_s64 (const int64_t * __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vld1_lanev2di ((const __builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_lane_u64 (const uint64_t * __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vld1_lanev2di ((const __builtin_neon_di *) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_dup_s8 (const int8_t * __a)
+{
+ return (int8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_dup_s16 (const int16_t * __a)
+{
+ return (int16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_dup_s32 (const int32_t * __a)
+{
+ return (int32x2_t)__builtin_neon_vld1_dupv2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_dup_f32 (const float32_t * __a)
+{
+ return (float32x2_t)__builtin_neon_vld1_dupv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_dup_u8 (const uint8_t * __a)
+{
+ return (uint8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_dup_u16 (const uint16_t * __a)
+{
+ return (uint16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_dup_u32 (const uint32_t * __a)
+{
+ return (uint32x2_t)__builtin_neon_vld1_dupv2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_dup_p8 (const poly8_t * __a)
+{
+ return (poly8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_dup_p16 (const poly16_t * __a)
+{
+ return (poly16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_dup_s64 (const int64_t * __a)
+{
+ return (int64x1_t)__builtin_neon_vld1_dupdi ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_dup_u64 (const uint64_t * __a)
+{
+ return (uint64x1_t)__builtin_neon_vld1_dupdi ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_s8 (const int8_t * __a)
+{
+ return (int8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_s16 (const int16_t * __a)
+{
+ return (int16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_s32 (const int32_t * __a)
+{
+ return (int32x4_t)__builtin_neon_vld1_dupv4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_f32 (const float32_t * __a)
+{
+ return (float32x4_t)__builtin_neon_vld1_dupv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_u8 (const uint8_t * __a)
+{
+ return (uint8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_u16 (const uint16_t * __a)
+{
+ return (uint16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_u32 (const uint32_t * __a)
+{
+ return (uint32x4_t)__builtin_neon_vld1_dupv4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_p8 (const poly8_t * __a)
+{
+ return (poly8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_p16 (const poly16_t * __a)
+{
+ return (poly16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_dup_s64 (const int64_t * __a)
+{
+ return (int64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_dup_u64 (const uint64_t * __a)
+{
+ return (uint64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s8 (int8_t * __a, int8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s16 (int16_t * __a, int16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s32 (int32_t * __a, int32x2_t __b)
+{
+ __builtin_neon_vst1v2si ((__builtin_neon_si *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s64 (int64_t * __a, int64x1_t __b)
+{
+ __builtin_neon_vst1di ((__builtin_neon_di *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_f32 (float32_t * __a, float32x2_t __b)
+{
+ __builtin_neon_vst1v2sf (__a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u8 (uint8_t * __a, uint8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u16 (uint16_t * __a, uint16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u32 (uint32_t * __a, uint32x2_t __b)
+{
+ __builtin_neon_vst1v2si ((__builtin_neon_si *) __a, (int32x2_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u64 (uint64_t * __a, uint64x1_t __b)
+{
+ __builtin_neon_vst1di ((__builtin_neon_di *) __a, (int64x1_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_p8 (poly8_t * __a, poly8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_p16 (poly16_t * __a, poly16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s8 (int8_t * __a, int8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s16 (int16_t * __a, int16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s32 (int32_t * __a, int32x4_t __b)
+{
+ __builtin_neon_vst1v4si ((__builtin_neon_si *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s64 (int64_t * __a, int64x2_t __b)
+{
+ __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_f32 (float32_t * __a, float32x4_t __b)
+{
+ __builtin_neon_vst1v4sf (__a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u8 (uint8_t * __a, uint8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u16 (uint16_t * __a, uint16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u32 (uint32_t * __a, uint32x4_t __b)
+{
+ __builtin_neon_vst1v4si ((__builtin_neon_si *) __a, (int32x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u64 (uint64_t * __a, uint64x2_t __b)
+{
+ __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, (int64x2_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_p8 (poly8_t * __a, poly8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_p16 (poly16_t * __a, poly16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s8 (int8_t * __a, int8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s16 (int16_t * __a, int16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s32 (int32_t * __a, int32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2si ((__builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_f32 (float32_t * __a, float32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u8 (uint8_t * __a, uint8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u16 (uint16_t * __a, uint16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u32 (uint32_t * __a, uint32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2si ((__builtin_neon_si *) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_p8 (poly8_t * __a, poly8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_p16 (poly16_t * __a, poly16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s64 (int64_t * __a, int64x1_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u64 (uint64_t * __a, uint64x1_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s8 (int8_t * __a, int8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s16 (int16_t * __a, int16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s32 (int32_t * __a, int32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4si ((__builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_f32 (float32_t * __a, float32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u8 (uint8_t * __a, uint8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u16 (uint16_t * __a, uint16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u32 (uint32_t * __a, uint32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4si ((__builtin_neon_si *) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_p8 (poly8_t * __a, poly8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_p16 (poly16_t * __a, poly16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s64 (int64_t * __a, int64x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u64 (uint64_t * __a, uint64x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_s8 (const int8_t * __a)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_s16 (const int16_t * __a)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_s32 (const int32_t * __a)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_f32 (const float32_t * __a)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_u8 (const uint8_t * __a)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_u16 (const uint16_t * __a)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_u32 (const uint32_t * __a)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_p8 (const poly8_t * __a)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_p16 (const poly16_t * __a)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__))
+vld2_s64 (const int64_t * __a)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__))
+vld2_u64 (const uint64_t * __a)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vld2q_s8 (const int8_t * __a)
+{
+ union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vld2q_s16 (const int16_t * __a)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vld2q_s32 (const int32_t * __a)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vld2q_f32 (const float32_t * __a)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vld2q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vld2q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vld2q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vld2q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vld2q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_s8 (const int8_t * __a, int8x8x2_t __b, const int __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_s16 (const int16_t * __a, int16x4x2_t __b, const int __c)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_s32 (const int32_t * __a, int32x2x2_t __b, const int __c)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_f32 (const float32_t * __a, float32x2x2_t __b, const int __c)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_u8 (const uint8_t * __a, uint8x8x2_t __b, const int __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_u16 (const uint16_t * __a, uint16x4x2_t __b, const int __c)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_u32 (const uint32_t * __a, uint32x2x2_t __b, const int __c)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_p8 (const poly8_t * __a, poly8x8x2_t __b, const int __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_p16 (const poly16_t * __a, poly16x4x2_t __b, const int __c)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_s16 (const int16_t * __a, int16x8x2_t __b, const int __c)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_s32 (const int32_t * __a, int32x4x2_t __b, const int __c)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_f32 (const float32_t * __a, float32x4x2_t __b, const int __c)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_u16 (const uint16_t * __a, uint16x8x2_t __b, const int __c)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_u32 (const uint32_t * __a, uint32x4x2_t __b, const int __c)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_p16 (const poly16_t * __a, poly16x8x2_t __b, const int __c)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__))
+vld2_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__))
+vld2_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s8 (int8_t * __a, int8x8x2_t __b)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s16 (int16_t * __a, int16x4x2_t __b)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s32 (int32_t * __a, int32x2x2_t __b)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_f32 (float32_t * __a, float32x2x2_t __b)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u8 (uint8_t * __a, uint8x8x2_t __b)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u16 (uint16_t * __a, uint16x4x2_t __b)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u32 (uint32_t * __a, uint32x2x2_t __b)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_p8 (poly8_t * __a, poly8x8x2_t __b)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_p16 (poly16_t * __a, poly16x4x2_t __b)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s64 (int64_t * __a, int64x1x2_t __b)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u64 (uint64_t * __a, uint64x1x2_t __b)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s8 (int8_t * __a, int8x16x2_t __b)
+{
+ union { int8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s16 (int16_t * __a, int16x8x2_t __b)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s32 (int32_t * __a, int32x4x2_t __b)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_f32 (float32_t * __a, float32x4x2_t __b)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u8 (uint8_t * __a, uint8x16x2_t __b)
+{
+ union { uint8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u16 (uint16_t * __a, uint16x8x2_t __b)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u32 (uint32_t * __a, uint32x4x2_t __b)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_p8 (poly8_t * __a, poly8x16x2_t __b)
+{
+ union { poly8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_p16 (poly16_t * __a, poly16x8x2_t __b)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s8 (int8_t * __a, int8x8x2_t __b, const int __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s16 (int16_t * __a, int16x4x2_t __b, const int __c)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s32 (int32_t * __a, int32x2x2_t __b, const int __c)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_f32 (float32_t * __a, float32x2x2_t __b, const int __c)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u8 (uint8_t * __a, uint8x8x2_t __b, const int __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u16 (uint16_t * __a, uint16x4x2_t __b, const int __c)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u32 (uint32_t * __a, uint32x2x2_t __b, const int __c)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_p8 (poly8_t * __a, poly8x8x2_t __b, const int __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_p16 (poly16_t * __a, poly16x4x2_t __b, const int __c)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_s16 (int16_t * __a, int16x8x2_t __b, const int __c)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_s32 (int32_t * __a, int32x4x2_t __b, const int __c)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_f32 (float32_t * __a, float32x4x2_t __b, const int __c)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_u16 (uint16_t * __a, uint16x8x2_t __b, const int __c)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_u32 (uint32_t * __a, uint32x4x2_t __b, const int __c)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_p16 (poly16_t * __a, poly16x8x2_t __b, const int __c)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_s8 (const int8_t * __a)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_s16 (const int16_t * __a)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_s32 (const int32_t * __a)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_f32 (const float32_t * __a)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_u8 (const uint8_t * __a)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_u16 (const uint16_t * __a)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_u32 (const uint32_t * __a)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_p8 (const poly8_t * __a)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_p16 (const poly16_t * __a)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__))
+vld3_s64 (const int64_t * __a)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__))
+vld3_u64 (const uint64_t * __a)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x3_t __attribute__ ((__always_inline__))
+vld3q_s8 (const int8_t * __a)
+{
+ union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__))
+vld3q_s16 (const int16_t * __a)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__))
+vld3q_s32 (const int32_t * __a)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+vld3q_f32 (const float32_t * __a)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x3_t __attribute__ ((__always_inline__))
+vld3q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__))
+vld3q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__))
+vld3q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x3_t __attribute__ ((__always_inline__))
+vld3q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__))
+vld3q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_s8 (const int8_t * __a, int8x8x3_t __b, const int __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_s16 (const int16_t * __a, int16x4x3_t __b, const int __c)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_s32 (const int32_t * __a, int32x2x3_t __b, const int __c)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_f32 (const float32_t * __a, float32x2x3_t __b, const int __c)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_u8 (const uint8_t * __a, uint8x8x3_t __b, const int __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_u16 (const uint16_t * __a, uint16x4x3_t __b, const int __c)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_u32 (const uint32_t * __a, uint32x2x3_t __b, const int __c)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_p8 (const poly8_t * __a, poly8x8x3_t __b, const int __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_p16 (const poly16_t * __a, poly16x4x3_t __b, const int __c)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_s16 (const int16_t * __a, int16x8x3_t __b, const int __c)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_s32 (const int32_t * __a, int32x4x3_t __b, const int __c)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_f32 (const float32_t * __a, float32x4x3_t __b, const int __c)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_u16 (const uint16_t * __a, uint16x8x3_t __b, const int __c)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_u32 (const uint32_t * __a, uint32x4x3_t __b, const int __c)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_p16 (const poly16_t * __a, poly16x8x3_t __b, const int __c)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__))
+vld3_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__))
+vld3_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s8 (int8_t * __a, int8x8x3_t __b)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s16 (int16_t * __a, int16x4x3_t __b)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s32 (int32_t * __a, int32x2x3_t __b)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_f32 (float32_t * __a, float32x2x3_t __b)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u8 (uint8_t * __a, uint8x8x3_t __b)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u16 (uint16_t * __a, uint16x4x3_t __b)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u32 (uint32_t * __a, uint32x2x3_t __b)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_p8 (poly8_t * __a, poly8x8x3_t __b)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_p16 (poly16_t * __a, poly16x4x3_t __b)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s64 (int64_t * __a, int64x1x3_t __b)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u64 (uint64_t * __a, uint64x1x3_t __b)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s8 (int8_t * __a, int8x16x3_t __b)
+{
+ union { int8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s16 (int16_t * __a, int16x8x3_t __b)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s32 (int32_t * __a, int32x4x3_t __b)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_f32 (float32_t * __a, float32x4x3_t __b)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u8 (uint8_t * __a, uint8x16x3_t __b)
+{
+ union { uint8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u16 (uint16_t * __a, uint16x8x3_t __b)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u32 (uint32_t * __a, uint32x4x3_t __b)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_p8 (poly8_t * __a, poly8x16x3_t __b)
+{
+ union { poly8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_p16 (poly16_t * __a, poly16x8x3_t __b)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s8 (int8_t * __a, int8x8x3_t __b, const int __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s16 (int16_t * __a, int16x4x3_t __b, const int __c)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s32 (int32_t * __a, int32x2x3_t __b, const int __c)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_f32 (float32_t * __a, float32x2x3_t __b, const int __c)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u8 (uint8_t * __a, uint8x8x3_t __b, const int __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u16 (uint16_t * __a, uint16x4x3_t __b, const int __c)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u32 (uint32_t * __a, uint32x2x3_t __b, const int __c)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_p8 (poly8_t * __a, poly8x8x3_t __b, const int __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_p16 (poly16_t * __a, poly16x4x3_t __b, const int __c)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_s16 (int16_t * __a, int16x8x3_t __b, const int __c)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_s32 (int32_t * __a, int32x4x3_t __b, const int __c)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_u16 (uint16_t * __a, uint16x8x3_t __b, const int __c)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_u32 (uint32_t * __a, uint32x4x3_t __b, const int __c)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_p16 (poly16_t * __a, poly16x8x3_t __b, const int __c)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_s8 (const int8_t * __a)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_s16 (const int16_t * __a)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_s32 (const int32_t * __a)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_f32 (const float32_t * __a)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_u8 (const uint8_t * __a)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_u16 (const uint16_t * __a)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_u32 (const uint32_t * __a)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_p8 (const poly8_t * __a)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_p16 (const poly16_t * __a)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__))
+vld4_s64 (const int64_t * __a)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__))
+vld4_u64 (const uint64_t * __a)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x4_t __attribute__ ((__always_inline__))
+vld4q_s8 (const int8_t * __a)
+{
+ union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__))
+vld4q_s16 (const int16_t * __a)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__))
+vld4q_s32 (const int32_t * __a)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+vld4q_f32 (const float32_t * __a)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x4_t __attribute__ ((__always_inline__))
+vld4q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__))
+vld4q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__))
+vld4q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x4_t __attribute__ ((__always_inline__))
+vld4q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__))
+vld4q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_s8 (const int8_t * __a, int8x8x4_t __b, const int __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_s16 (const int16_t * __a, int16x4x4_t __b, const int __c)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_s32 (const int32_t * __a, int32x2x4_t __b, const int __c)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_f32 (const float32_t * __a, float32x2x4_t __b, const int __c)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_u8 (const uint8_t * __a, uint8x8x4_t __b, const int __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_u16 (const uint16_t * __a, uint16x4x4_t __b, const int __c)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_u32 (const uint32_t * __a, uint32x2x4_t __b, const int __c)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_p8 (const poly8_t * __a, poly8x8x4_t __b, const int __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_p16 (const poly16_t * __a, poly16x4x4_t __b, const int __c)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_s16 (const int16_t * __a, int16x8x4_t __b, const int __c)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_s32 (const int32_t * __a, int32x4x4_t __b, const int __c)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_f32 (const float32_t * __a, float32x4x4_t __b, const int __c)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_u16 (const uint16_t * __a, uint16x8x4_t __b, const int __c)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_u32 (const uint32_t * __a, uint32x4x4_t __b, const int __c)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_p16 (const poly16_t * __a, poly16x8x4_t __b, const int __c)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__))
+vld4_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__))
+vld4_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s8 (int8_t * __a, int8x8x4_t __b)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s16 (int16_t * __a, int16x4x4_t __b)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s32 (int32_t * __a, int32x2x4_t __b)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_f32 (float32_t * __a, float32x2x4_t __b)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u8 (uint8_t * __a, uint8x8x4_t __b)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u16 (uint16_t * __a, uint16x4x4_t __b)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u32 (uint32_t * __a, uint32x2x4_t __b)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_p8 (poly8_t * __a, poly8x8x4_t __b)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_p16 (poly16_t * __a, poly16x4x4_t __b)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s64 (int64_t * __a, int64x1x4_t __b)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u64 (uint64_t * __a, uint64x1x4_t __b)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s8 (int8_t * __a, int8x16x4_t __b)
+{
+ union { int8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s16 (int16_t * __a, int16x8x4_t __b)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s32 (int32_t * __a, int32x4x4_t __b)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_f32 (float32_t * __a, float32x4x4_t __b)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u8 (uint8_t * __a, uint8x16x4_t __b)
+{
+ union { uint8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u16 (uint16_t * __a, uint16x8x4_t __b)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u32 (uint32_t * __a, uint32x4x4_t __b)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_p8 (poly8_t * __a, poly8x16x4_t __b)
+{
+ union { poly8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_p16 (poly16_t * __a, poly16x8x4_t __b)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s8 (int8_t * __a, int8x8x4_t __b, const int __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s16 (int16_t * __a, int16x4x4_t __b, const int __c)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s32 (int32_t * __a, int32x2x4_t __b, const int __c)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_f32 (float32_t * __a, float32x2x4_t __b, const int __c)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u8 (uint8_t * __a, uint8x8x4_t __b, const int __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u16 (uint16_t * __a, uint16x4x4_t __b, const int __c)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u32 (uint32_t * __a, uint32x2x4_t __b, const int __c)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_p8 (poly8_t * __a, poly8x8x4_t __b, const int __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_p16 (poly16_t * __a, poly16x4x4_t __b, const int __c)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_s16 (int16_t * __a, int16x8x4_t __b, const int __c)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_s32 (int32_t * __a, int32x4x4_t __b, const int __c)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_f32 (float32_t * __a, float32x4x4_t __b, const int __c)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_u16 (uint16_t * __a, uint16x8x4_t __b, const int __c)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_u32 (uint32_t * __a, uint32x4x4_t __b, const int __c)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_p16 (poly16_t * __a, poly16x8x4_t __b, const int __c)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vand_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vandv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vand_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vandv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vand_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vandv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vand_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vanddi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vand_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vandv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vand_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vandv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vand_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vandv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vand_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vanddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vandq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vandv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vandq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vandv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vandq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vandv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vandq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vandv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vandq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vandv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vandq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vandv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vandq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vandv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vandq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vandv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vorr_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vorrv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vorr_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vorrv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vorr_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vorrv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vorr_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vorrdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vorr_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vorrv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vorr_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vorrv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vorr_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vorrv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vorr_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vorrdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vorrq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vorrv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vorrq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vorrv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vorrq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vorrv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vorrq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vorrv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vorrq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vorrv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vorrq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vorrv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vorrq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vorrv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vorrq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vorrv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+veor_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_veorv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+veor_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_veorv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+veor_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_veorv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+veor_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_veordi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+veor_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_veorv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+veor_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_veorv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+veor_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_veorv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+veor_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_veordi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+veorq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_veorv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+veorq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_veorv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+veorq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_veorv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+veorq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_veorv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+veorq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_veorv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+veorq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_veorv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+veorq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_veorv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+veorq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_veorv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vbic_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vbicv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vbic_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vbicv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vbic_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vbicv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vbic_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vbicdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vbic_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vbicv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vbic_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vbicv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vbic_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vbicv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vbic_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vbicdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vbicq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vbicv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vbicq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vbicv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vbicq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vbicv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vbicq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vbicv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vbicq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vbicv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vbicq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vbicv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vbicq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vbicv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vbicq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vbicv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vorn_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vornv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vorn_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vornv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vorn_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vornv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vorn_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vorndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vorn_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vornv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vorn_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vornv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vorn_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vornv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vorn_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vorndi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vornq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vornv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vornq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vornv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vornq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vornv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vornq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vornv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vornq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vornv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vornq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vornv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vornq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vornv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vornq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vornv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s8 (int8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s16 (int16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s32 (int32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s64 (int64x1_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_f32 (float32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u8 (uint8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u16 (uint16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u32 (uint32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u64 (uint64x1_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_p16 (poly16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s8 (int8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s16 (int16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s32 (int32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s64 (int64x2_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_f32 (float32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u8 (uint8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u16 (uint16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u32 (uint32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u64 (uint64x2_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_p16 (poly16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s8 (int8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s16 (int16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s32 (int32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s64 (int64x1_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_f32 (float32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u8 (uint8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u16 (uint16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u32 (uint32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u64 (uint64x1_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_p8 (poly8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s8 (int8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s16 (int16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s32 (int32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s64 (int64x2_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_f32 (float32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u8 (uint8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u16 (uint16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u32 (uint32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u64 (uint64x2_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_p8 (poly8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s8 (int8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s16 (int16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s32 (int32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s64 (int64x1_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u8 (uint8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u16 (uint16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u32 (uint32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u64 (uint64x1_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi ((int64x1_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_p8 (poly8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_p16 (poly16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s8 (int8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s16 (int16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s32 (int32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s64 (int64x2_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u8 (uint8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u16 (uint16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u32 (uint32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u64 (uint64x2_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_p8 (poly8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_p16 (poly16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s8 (int8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s16 (int16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s32 (int32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_f32 (float32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u8 (uint8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u16 (uint16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u32 (uint32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u64 (uint64x1_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_p8 (poly8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_p16 (poly16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s8 (int8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s16 (int16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s32 (int32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_f32 (float32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u8 (uint8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u16 (uint16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u32 (uint32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u64 (uint64x2_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_p8 (poly8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_p16 (poly16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s8 (int8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s16 (int16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s32 (int32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s64 (int64x1_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_f32 (float32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u8 (uint8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u16 (uint16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u32 (uint32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_p8 (poly8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_p16 (poly16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s8 (int8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s16 (int16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s32 (int32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s64 (int64x2_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div2di (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_f32 (float32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u8 (uint8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u16 (uint16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u32 (uint32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_p8 (poly8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_p16 (poly16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s16 (int16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s32 (int32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s64 (int64x1_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_f32 (float32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u8 (uint8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u16 (uint16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u32 (uint32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u64 (uint64x1_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_p8 (poly8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_p16 (poly16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s16 (int16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s32 (int32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s64 (int64x2_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_f32 (float32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u8 (uint8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u16 (uint16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u32 (uint32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u64 (uint64x2_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_p8 (poly8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_p16 (poly16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s8 (int8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s32 (int32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s64 (int64x1_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_f32 (float32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u8 (uint8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u16 (uint16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u32 (uint32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u64 (uint64x1_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_p8 (poly8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_p16 (poly16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s8 (int8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s32 (int32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s64 (int64x2_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_f32 (float32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u8 (uint8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u16 (uint16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u32 (uint32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u64 (uint64x2_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_p8 (poly8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_p16 (poly16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s8 (int8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s16 (int16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s64 (int64x1_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_f32 (float32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u8 (uint8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u16 (uint16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u32 (uint32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u64 (uint64x1_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_p8 (poly8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_p16 (poly16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s8 (int8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s16 (int16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s64 (int64x2_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_f32 (float32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u8 (uint8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u16 (uint16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u32 (uint32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u64 (uint64x2_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_p8 (poly8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_p16 (poly16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s8 (int8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s16 (int16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s32 (int32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s64 (int64x1_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_f32 (float32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u16 (uint16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u32 (uint32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u64 (uint64x1_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_p8 (poly8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_p16 (poly16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s8 (int8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s16 (int16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s32 (int32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s64 (int64x2_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_f32 (float32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u16 (uint16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u32 (uint32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u64 (uint64x2_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_p8 (poly8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_p16 (poly16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s8 (int8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s16 (int16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s32 (int32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s64 (int64x1_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_f32 (float32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u8 (uint8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u32 (uint32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u64 (uint64x1_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_p8 (poly8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_p16 (poly16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s8 (int8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s16 (int16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s32 (int32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s64 (int64x2_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_f32 (float32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u8 (uint8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u32 (uint32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u64 (uint64x2_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_p8 (poly8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_p16 (poly16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s8 (int8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s16 (int16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s32 (int32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2si (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s64 (int64x1_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_f32 (float32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u8 (uint8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u16 (uint16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u64 (uint64x1_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_p8 (poly8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_p16 (poly16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s8 (int8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s16 (int16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s32 (int32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4si (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s64 (int64x2_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_f32 (float32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u8 (uint8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u16 (uint16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u64 (uint64x2_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_p8 (poly8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_p16 (poly16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h
new file mode 100644
index 0000000..9969f1c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h
@@ -0,0 +1,238 @@
+/* Copyright (C) 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 5.2.4.2.2 Characteristics of floating types <float.h>
+ */
+
+#ifndef _FLOAT_H___
+#define _FLOAT_H___
+
+/* Radix of exponent representation, b. */
+#undef FLT_RADIX
+#define FLT_RADIX __FLT_RADIX__
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef FLT_MANT_DIG
+#undef DBL_MANT_DIG
+#undef LDBL_MANT_DIG
+#define FLT_MANT_DIG __FLT_MANT_DIG__
+#define DBL_MANT_DIG __DBL_MANT_DIG__
+#define LDBL_MANT_DIG __LDBL_MANT_DIG__
+
+/* Number of decimal digits, q, such that any floating-point number with q
+ decimal digits can be rounded into a floating-point number with p radix b
+ digits and back again without change to the q decimal digits,
+
+ p * log10(b) if b is a power of 10
+ floor((p - 1) * log10(b)) otherwise
+*/
+#undef FLT_DIG
+#undef DBL_DIG
+#undef LDBL_DIG
+#define FLT_DIG __FLT_DIG__
+#define DBL_DIG __DBL_DIG__
+#define LDBL_DIG __LDBL_DIG__
+
+/* Minimum int x such that FLT_RADIX**(x-1) is a normalized float, emin */
+#undef FLT_MIN_EXP
+#undef DBL_MIN_EXP
+#undef LDBL_MIN_EXP
+#define FLT_MIN_EXP __FLT_MIN_EXP__
+#define DBL_MIN_EXP __DBL_MIN_EXP__
+#define LDBL_MIN_EXP __LDBL_MIN_EXP__
+
+/* Minimum negative integer such that 10 raised to that power is in the
+ range of normalized floating-point numbers,
+
+ ceil(log10(b) * (emin - 1))
+*/
+#undef FLT_MIN_10_EXP
+#undef DBL_MIN_10_EXP
+#undef LDBL_MIN_10_EXP
+#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
+#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
+#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
+
+/* Maximum int x such that FLT_RADIX**(x-1) is a representable float, emax. */
+#undef FLT_MAX_EXP
+#undef DBL_MAX_EXP
+#undef LDBL_MAX_EXP
+#define FLT_MAX_EXP __FLT_MAX_EXP__
+#define DBL_MAX_EXP __DBL_MAX_EXP__
+#define LDBL_MAX_EXP __LDBL_MAX_EXP__
+
+/* Maximum integer such that 10 raised to that power is in the range of
+ representable finite floating-point numbers,
+
+ floor(log10((1 - b**-p) * b**emax))
+*/
+#undef FLT_MAX_10_EXP
+#undef DBL_MAX_10_EXP
+#undef LDBL_MAX_10_EXP
+#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
+#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
+#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
+
+/* Maximum representable finite floating-point number,
+
+ (1 - b**-p) * b**emax
+*/
+#undef FLT_MAX
+#undef DBL_MAX
+#undef LDBL_MAX
+#define FLT_MAX __FLT_MAX__
+#define DBL_MAX __DBL_MAX__
+#define LDBL_MAX __LDBL_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type, b**1-p. */
+#undef FLT_EPSILON
+#undef DBL_EPSILON
+#undef LDBL_EPSILON
+#define FLT_EPSILON __FLT_EPSILON__
+#define DBL_EPSILON __DBL_EPSILON__
+#define LDBL_EPSILON __LDBL_EPSILON__
+
+/* Minimum normalized positive floating-point number, b**(emin - 1). */
+#undef FLT_MIN
+#undef DBL_MIN
+#undef LDBL_MIN
+#define FLT_MIN __FLT_MIN__
+#define DBL_MIN __DBL_MIN__
+#define LDBL_MIN __LDBL_MIN__
+
+/* Addition rounds to 0: zero, 1: nearest, 2: +inf, 3: -inf, -1: unknown. */
+/* ??? This is supposed to change with calls to fesetround in <fenv.h>. */
+#undef FLT_ROUNDS
+#define FLT_ROUNDS 1
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type float and double
+ to the range and precision of the double type, evaluate
+ long double operations and constants to the range and
+ precision of the long double type
+ 2 evaluate all operations and constants to the range and
+ precision of the long double type
+
+ ??? This ought to change with the setting of the fp control word;
+ the value provided by the compiler assumes the widest setting. */
+#undef FLT_EVAL_METHOD
+#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
+
+/* Number of decimal digits, n, such that any floating-point number in the
+ widest supported floating type with pmax radix b digits can be rounded
+ to a floating-point number with n decimal digits and back again without
+ change to the value,
+
+ pmax * log10(b) if b is a power of 10
+ ceil(1 + pmax * log10(b)) otherwise
+*/
+#undef DECIMAL_DIG
+#define DECIMAL_DIG __DECIMAL_DIG__
+
+#endif /* C99 */
+
+#ifdef __STDC_WANT_DEC_FP__
+/* Draft Technical Report 24732, extension for decimal floating-point
+ arithmetic: Characteristic of decimal floating types <float.h>. */
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef DEC32_MANT_DIG
+#undef DEC64_MANT_DIG
+#undef DEC128_MANT_DIG
+#define DEC32_MANT_DIG __DEC32_MANT_DIG__
+#define DEC64_MANT_DIG __DEC64_MANT_DIG__
+#define DEC128_MANT_DIG __DEC128_MANT_DIG__
+
+/* Minimum exponent. */
+#undef DEC32_MIN_EXP
+#undef DEC64_MIN_EXP
+#undef DEC128_MIN_EXP
+#define DEC32_MIN_EXP __DEC32_MIN_EXP__
+#define DEC64_MIN_EXP __DEC64_MIN_EXP__
+#define DEC128_MIN_EXP __DEC128_MIN_EXP__
+
+/* Maximum exponent. */
+#undef DEC32_MAX_EXP
+#undef DEC64_MAX_EXP
+#undef DEC128_MAX_EXP
+#define DEC32_MAX_EXP __DEC32_MAX_EXP__
+#define DEC64_MAX_EXP __DEC64_MAX_EXP__
+#define DEC128_MAX_EXP __DEC128_MAX_EXP__
+
+/* Maximum representable finite decimal floating-point number
+ (there are 6, 15, and 33 9s after the decimal points respectively). */
+#undef DEC32_MAX
+#undef DEC64_MAX
+#undef DEC128_MAX
+#define DEC32_MAX __DEC32_MAX__
+#define DEC64_MAX __DEC64_MAX__
+#define DEC128_MAX __DEC128_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type. */
+#undef DEC32_EPSILON
+#undef DEC64_EPSILON
+#undef DEC128_EPSILON
+#define DEC32_EPSILON __DEC32_EPSILON__
+#define DEC64_EPSILON __DEC64_EPSILON__
+#define DEC128_EPSILON __DEC128_EPSILON__
+
+/* Minimum normalized positive floating-point number. */
+#undef DEC32_MIN
+#undef DEC64_MIN
+#undef DEC128_MIN
+#define DEC32_MIN __DEC32_MIN__
+#define DEC64_MIN __DEC64_MIN__
+#define DEC128_MIN __DEC128_MIN__
+
+/* Minimum subnormal positive floating-point number. */
+#undef DEC32_SUBNORMAL_MIN
+#undef DEC64_SUBNORMAL_MIN
+#undef DEC128_SUBNORMAL_MIN
+#define DEC32_SUBNORMAL_MIN __DEC32_SUBNORMAL_MIN__
+#define DEC64_SUBNORMAL_MIN __DEC64_SUBNORMAL_MIN__
+#define DEC128_SUBNORMAL_MIN __DEC128_SUBNORMAL_MIN__
+
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type _Decimal32
+ and _Decimal64 to the range and precision of the _Decimal64
+ type, evaluate _Decimal128 operations and constants to the
+ range and precision of the _Decimal128 type;
+ 2 evaluate all operations and constants to the range and
+ precision of the _Decimal128 type. */
+
+#undef DEC_EVAL_METHOD
+#define DEC_EVAL_METHOD __DEC_EVAL_METHOD__
+
+#endif /* __STDC_WANT_DEC_FP__ */
+
+#endif /* _FLOAT_H___ */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h
new file mode 100644
index 0000000..28ff9d1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h
@@ -0,0 +1,45 @@
+/* Copyright (C) 1997, 1999, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.9 Alternative spellings <iso646.h>
+ */
+
+#ifndef _ISO646_H
+#define _ISO646_H
+
+#ifndef __cplusplus
+#define and &&
+#define and_eq &=
+#define bitand &
+#define bitor |
+#define compl ~
+#define not !
+#define not_eq !=
+#define or ||
+#define or_eq |=
+#define xor ^
+#define xor_eq ^=
+#endif
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h
new file mode 100644
index 0000000..2cc500d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h
@@ -0,0 +1,1254 @@
+/* Copyright (C) 2002, 2003, 2004, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _MMINTRIN_H_INCLUDED
+#define _MMINTRIN_H_INCLUDED
+
+/* The data type intended for user use. */
+typedef unsigned long long __m64, __int64;
+
+/* Internal data types for implementing the intrinsics. */
+typedef int __v2si __attribute__ ((vector_size (8)));
+typedef short __v4hi __attribute__ ((vector_size (8)));
+typedef char __v8qi __attribute__ ((vector_size (8)));
+
+/* "Convert" __m64 and __int64 into each other. */
+static __inline __m64
+_mm_cvtsi64_m64 (__int64 __i)
+{
+ return __i;
+}
+
+static __inline __int64
+_mm_cvtm64_si64 (__m64 __i)
+{
+ return __i;
+}
+
+static __inline int
+_mm_cvtsi64_si32 (__int64 __i)
+{
+ return __i;
+}
+
+static __inline __int64
+_mm_cvtsi32_si64 (int __i)
+{
+ return __i;
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with signed saturation. */
+static __inline __m64
+_mm_packs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
+ the result, and the two 32-bit values from M2 into the upper two 16-bit
+ values of the result, all with signed saturation. */
+static __inline __m64
+_mm_packs_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+ the 64-bit value from M2 into the upper 32-bits of the result, all with
+ signed saturation for values that do not fit exactly into 32-bits. */
+static __inline __m64
+_mm_packs_pi64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackdss ((long long)__m1, (long long)__m2);
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with unsigned saturation. */
+static __inline __m64
+_mm_packs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 into the lower two 16-bit values of
+ the result, and the two 32-bit values from M2 into the upper two 16-bit
+ values of the result, all with unsigned saturation. */
+static __inline __m64
+_mm_packs_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+ the 64-bit value from M2 into the upper 32-bits of the result, all with
+ unsigned saturation for values that do not fit exactly into 32-bits. */
+static __inline __m64
+_mm_packs_pu64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackdus ((long long)__m1, (long long)__m2);
+}
+
+/* Interleave the four 8-bit values from the high half of M1 with the four
+ 8-bit values from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the high half of M1 with the two
+ 16-bit values from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the high half of M1 with the 32-bit
+ value from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Interleave the four 8-bit values from the low half of M1 with the four
+ 8-bit values from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the low half of M1 with the two
+ 16-bit values from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the low half of M1 with the 32-bit
+ value from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Take the four 8-bit values from the low half of M1, sign extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackel_pi8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, sign extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackel_pi16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it sign extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackel_pi32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, sign extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pi8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, sign extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pi16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it sign extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackeh_pi32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the low half of M1, zero extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackel_pu8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, zero extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackel_pu16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckeluh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it zero extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackel_pu32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckeluw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, zero extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pu8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, zero extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pu16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehuh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it zero extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackeh_pu32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehuw ((__v2si)__m1);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2. */
+static __inline __m64
+_mm_add_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2. */
+static __inline __m64
+_mm_add_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2. */
+static __inline __m64
+_mm_add_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1. */
+static __inline __m64
+_mm_sub_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1. */
+static __inline __m64
+_mm_sub_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1. */
+static __inline __m64
+_mm_sub_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
+ saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ signed saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+ signed saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+ four 32-bit intermediate results, which are then summed by pairs to
+ produce two 32-bit results. */
+static __inline __m64
+_mm_madd_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmadds ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+ four 32-bit intermediate results, which are then summed by pairs to
+ produce two 32-bit results. */
+static __inline __m64
+_mm_madd_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmaddu ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+ M2 and produce the high 16 bits of the 32-bit results. */
+static __inline __m64
+_mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulsm ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+ M2 and produce the high 16 bits of the 32-bit results. */
+static __inline __m64
+_mm_mulhi_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulum ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
+ the low 16 bits of the results. */
+static __inline __m64
+_mm_mullo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulul ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Shift four 16-bit values in M left by COUNT. */
+static __inline __m64
+_mm_sll_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsllh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsllhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M left by COUNT. */
+static __inline __m64
+_mm_sll_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsllw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsllwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT. */
+static __inline __m64
+_mm_sll_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wslld (__m, __count);
+}
+
+static __inline __m64
+_mm_slli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wslldi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrah ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrahi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsraw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrawi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrad (__m, __count);
+}
+
+static __inline __m64
+_mm_srai_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsradi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrlh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrlhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrlw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrlwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrld (__m, __count);
+}
+
+static __inline __m64
+_mm_srli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrldi (__m, __count);
+}
+
+/* Rotate four 16-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrorh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrorhi ((__v4hi)__m, __count);
+}
+
+/* Rotate two 32-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrorw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrorwi ((__v2si)__m, __count);
+}
+
+/* Rotate two 64-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrord (__m, __count);
+}
+
+static __inline __m64
+_mm_rori_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrordi (__m, __count);
+}
+
+/* Bit-wise AND the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_and_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wand (__m1, __m2);
+}
+
+/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
+ 64-bit value in M2. */
+static __inline __m64
+_mm_andnot_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wandn (__m1, __m2);
+}
+
+/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_or_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wor (__m1, __m2);
+}
+
+/* Bit-wise exclusive OR the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_xor_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wxor (__m1, __m2);
+}
+
+/* Compare eight 8-bit values. The result of the comparison is 0xFF if the
+ test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtub ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Compare four 16-bit values. The result of the comparison is 0xFFFF if
+ the test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtuh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if
+ the test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtuw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+ by accumulate across all elements and __A. */
+static __inline __m64
+_mm_mac_pu16 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return __builtin_arm_wmacu (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+ by accumulate across all elements and __A. */
+static __inline __m64
+_mm_mac_pi16 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return __builtin_arm_wmacs (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+ by accumulate across all elements. */
+static __inline __m64
+_mm_macz_pu16 (__m64 __A, __m64 __B)
+{
+ return __builtin_arm_wmacuz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+ by accumulate across all elements. */
+static __inline __m64
+_mm_macz_pi16 (__m64 __A, __m64 __B)
+{
+ return __builtin_arm_wmacsz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Accumulate across all unsigned 8-bit values in __A. */
+static __inline __m64
+_mm_acc_pu8 (__m64 __A)
+{
+ return __builtin_arm_waccb ((__v8qi)__A);
+}
+
+/* Accumulate across all unsigned 16-bit values in __A. */
+static __inline __m64
+_mm_acc_pu16 (__m64 __A)
+{
+ return __builtin_arm_wacch ((__v4hi)__A);
+}
+
+/* Accumulate across all unsigned 32-bit values in __A. */
+static __inline __m64
+_mm_acc_pu32 (__m64 __A)
+{
+ return __builtin_arm_waccw ((__v2si)__A);
+}
+
+static __inline __m64
+_mm_mia_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmia (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miaph_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiaph (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabb_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiabb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabt_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiabt (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatb_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiatb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatt_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiatt (__A, __B, __C);
+}
+
+/* Extract one of the elements of A and sign extend. The selector N must
+ be immediate. */
+#define _mm_extract_pi8(A, N) __builtin_arm_textrmsb ((__v8qi)(A), (N))
+#define _mm_extract_pi16(A, N) __builtin_arm_textrmsh ((__v4hi)(A), (N))
+#define _mm_extract_pi32(A, N) __builtin_arm_textrmsw ((__v2si)(A), (N))
+
+/* Extract one of the elements of A and zero extend. The selector N must
+ be immediate. */
+#define _mm_extract_pu8(A, N) __builtin_arm_textrmub ((__v8qi)(A), (N))
+#define _mm_extract_pu16(A, N) __builtin_arm_textrmuh ((__v4hi)(A), (N))
+#define _mm_extract_pu32(A, N) __builtin_arm_textrmuw ((__v2si)(A), (N))
+
+/* Inserts word D into one of the elements of A. The selector N must be
+ immediate. */
+#define _mm_insert_pi8(A, D, N) \
+ ((__m64) __builtin_arm_tinsrb ((__v8qi)(A), (D), (N)))
+#define _mm_insert_pi16(A, D, N) \
+ ((__m64) __builtin_arm_tinsrh ((__v4hi)(A), (D), (N)))
+#define _mm_insert_pi32(A, D, N) \
+ ((__m64) __builtin_arm_tinsrw ((__v2si)(A), (D), (N)))
+
+/* Compute the element-wise maximum of signed 8-bit values. */
+static __inline __m64
+_mm_max_pi8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of signed 16-bit values. */
+static __inline __m64
+_mm_max_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of signed 32-bit values. */
+static __inline __m64
+_mm_max_pi32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 8-bit values. */
+static __inline __m64
+_mm_max_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 16-bit values. */
+static __inline __m64
+_mm_max_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 32-bit values. */
+static __inline __m64
+_mm_max_pu32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values. */
+static __inline __m64
+_mm_min_pi8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values. */
+static __inline __m64
+_mm_min_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of signed 32-bit values. */
+static __inline __m64
+_mm_min_pi32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values. */
+static __inline __m64
+_mm_min_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values. */
+static __inline __m64
+_mm_min_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 32-bit values. */
+static __inline __m64
+_mm_min_pu32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Create an 8-bit mask of the signs of 8-bit values. */
+static __inline int
+_mm_movemask_pi8 (__m64 __A)
+{
+ return __builtin_arm_tmovmskb ((__v8qi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 16-bit values. */
+static __inline int
+_mm_movemask_pi16 (__m64 __A)
+{
+ return __builtin_arm_tmovmskh ((__v4hi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 32-bit values. */
+static __inline int
+_mm_movemask_pi32 (__m64 __A)
+{
+ return __builtin_arm_tmovmskw ((__v2si)__A);
+}
+
+/* Return a combination of the four 16-bit values in A. The selector
+ must be an immediate. */
+#define _mm_shuffle_pi16(A, N) \
+ ((__m64) __builtin_arm_wshufh ((__v4hi)(A), (N)))
+
+
+/* Compute the rounded averages of the unsigned 8-bit values in A and B. */
+static __inline __m64
+_mm_avg_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2br ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the rounded averages of the unsigned 16-bit values in A and B. */
+static __inline __m64
+_mm_avg_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2hr ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the averages of the unsigned 8-bit values in A and B. */
+static __inline __m64
+_mm_avg2_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2b ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the averages of the unsigned 16-bit values in A and B. */
+static __inline __m64
+_mm_avg2_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2h ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+ values in A and B. Return the value in the lower 16-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sad_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+ values in A and B. Return the value in the lower 32-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sad_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+ values in A and B. Return the value in the lower 16-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sadz_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+ values in A and B. Return the value in the lower 32-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sadz_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadhz ((__v4hi)__A, (__v4hi)__B);
+}
+
+static __inline __m64
+_mm_align_si64 (__m64 __A, __m64 __B, int __C)
+{
+ return (__m64) __builtin_arm_walign ((__v8qi)__A, (__v8qi)__B, __C);
+}
+
+/* Creates a 64-bit zero. */
+static __inline __m64
+_mm_setzero_si64 (void)
+{
+ return __builtin_arm_wzero ();
+}
+
+/* Set and Get arbitrary iWMMXt Control registers.
+ Note only registers 0-3 and 8-11 are currently defined,
+ the rest are reserved. */
+
+static __inline void
+_mm_setwcx (const int __value, const int __regno)
+{
+ switch (__regno)
+ {
+ case 0: __builtin_arm_setwcx (__value, 0); break;
+ case 1: __builtin_arm_setwcx (__value, 1); break;
+ case 2: __builtin_arm_setwcx (__value, 2); break;
+ case 3: __builtin_arm_setwcx (__value, 3); break;
+ case 8: __builtin_arm_setwcx (__value, 8); break;
+ case 9: __builtin_arm_setwcx (__value, 9); break;
+ case 10: __builtin_arm_setwcx (__value, 10); break;
+ case 11: __builtin_arm_setwcx (__value, 11); break;
+ default: break;
+ }
+}
+
+static __inline int
+_mm_getwcx (const int __regno)
+{
+ switch (__regno)
+ {
+ case 0: return __builtin_arm_getwcx (0);
+ case 1: return __builtin_arm_getwcx (1);
+ case 2: return __builtin_arm_getwcx (2);
+ case 3: return __builtin_arm_getwcx (3);
+ case 8: return __builtin_arm_getwcx (8);
+ case 9: return __builtin_arm_getwcx (9);
+ case 10: return __builtin_arm_getwcx (10);
+ case 11: return __builtin_arm_getwcx (11);
+ default: return 0;
+ }
+}
+
+/* Creates a vector of two 32-bit values; I0 is least significant. */
+static __inline __m64
+_mm_set_pi32 (int __i1, int __i0)
+{
+ union {
+ __m64 __q;
+ struct {
+ unsigned int __i0;
+ unsigned int __i1;
+ } __s;
+ } __u;
+
+ __u.__s.__i0 = __i0;
+ __u.__s.__i1 = __i1;
+
+ return __u.__q;
+}
+
+/* Creates a vector of four 16-bit values; W0 is least significant. */
+static __inline __m64
+_mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
+{
+ unsigned int __i1 = (unsigned short)__w3 << 16 | (unsigned short)__w2;
+ unsigned int __i0 = (unsigned short)__w1 << 16 | (unsigned short)__w0;
+ return _mm_set_pi32 (__i1, __i0);
+
+}
+
+/* Creates a vector of eight 8-bit values; B0 is least significant. */
+static __inline __m64
+_mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
+ char __b3, char __b2, char __b1, char __b0)
+{
+ unsigned int __i1, __i0;
+
+ __i1 = (unsigned char)__b7;
+ __i1 = __i1 << 8 | (unsigned char)__b6;
+ __i1 = __i1 << 8 | (unsigned char)__b5;
+ __i1 = __i1 << 8 | (unsigned char)__b4;
+
+ __i0 = (unsigned char)__b3;
+ __i0 = __i0 << 8 | (unsigned char)__b2;
+ __i0 = __i0 << 8 | (unsigned char)__b1;
+ __i0 = __i0 << 8 | (unsigned char)__b0;
+
+ return _mm_set_pi32 (__i1, __i0);
+}
+
+/* Similar, but with the arguments in reverse order. */
+static __inline __m64
+_mm_setr_pi32 (int __i0, int __i1)
+{
+ return _mm_set_pi32 (__i1, __i0);
+}
+
+static __inline __m64
+_mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
+{
+ return _mm_set_pi16 (__w3, __w2, __w1, __w0);
+}
+
+static __inline __m64
+_mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
+ char __b4, char __b5, char __b6, char __b7)
+{
+ return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
+}
+
+/* Creates a vector of two 32-bit values, both elements containing I. */
+static __inline __m64
+_mm_set1_pi32 (int __i)
+{
+ return _mm_set_pi32 (__i, __i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing W. */
+static __inline __m64
+_mm_set1_pi16 (short __w)
+{
+ unsigned int __i = (unsigned short)__w << 16 | (unsigned short)__w;
+ return _mm_set1_pi32 (__i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing B. */
+static __inline __m64
+_mm_set1_pi8 (char __b)
+{
+ unsigned int __w = (unsigned char)__b << 8 | (unsigned char)__b;
+ unsigned int __i = __w << 16 | __w;
+ return _mm_set1_pi32 (__i);
+}
+
+/* Convert an integer to a __m64 object. */
+static __inline __m64
+_m_from_int (int __a)
+{
+ return (__m64)__a;
+}
+
+#define _m_packsswb _mm_packs_pi16
+#define _m_packssdw _mm_packs_pi32
+#define _m_packuswb _mm_packs_pu16
+#define _m_packusdw _mm_packs_pu32
+#define _m_packssqd _mm_packs_pi64
+#define _m_packusqd _mm_packs_pu64
+#define _mm_packs_si64 _mm_packs_pi64
+#define _mm_packs_su64 _mm_packs_pu64
+#define _m_punpckhbw _mm_unpackhi_pi8
+#define _m_punpckhwd _mm_unpackhi_pi16
+#define _m_punpckhdq _mm_unpackhi_pi32
+#define _m_punpcklbw _mm_unpacklo_pi8
+#define _m_punpcklwd _mm_unpacklo_pi16
+#define _m_punpckldq _mm_unpacklo_pi32
+#define _m_punpckehsbw _mm_unpackeh_pi8
+#define _m_punpckehswd _mm_unpackeh_pi16
+#define _m_punpckehsdq _mm_unpackeh_pi32
+#define _m_punpckehubw _mm_unpackeh_pu8
+#define _m_punpckehuwd _mm_unpackeh_pu16
+#define _m_punpckehudq _mm_unpackeh_pu32
+#define _m_punpckelsbw _mm_unpackel_pi8
+#define _m_punpckelswd _mm_unpackel_pi16
+#define _m_punpckelsdq _mm_unpackel_pi32
+#define _m_punpckelubw _mm_unpackel_pu8
+#define _m_punpckeluwd _mm_unpackel_pu16
+#define _m_punpckeludq _mm_unpackel_pu32
+#define _m_paddb _mm_add_pi8
+#define _m_paddw _mm_add_pi16
+#define _m_paddd _mm_add_pi32
+#define _m_paddsb _mm_adds_pi8
+#define _m_paddsw _mm_adds_pi16
+#define _m_paddsd _mm_adds_pi32
+#define _m_paddusb _mm_adds_pu8
+#define _m_paddusw _mm_adds_pu16
+#define _m_paddusd _mm_adds_pu32
+#define _m_psubb _mm_sub_pi8
+#define _m_psubw _mm_sub_pi16
+#define _m_psubd _mm_sub_pi32
+#define _m_psubsb _mm_subs_pi8
+#define _m_psubsw _mm_subs_pi16
+#define _m_psubuw _mm_subs_pi32
+#define _m_psubusb _mm_subs_pu8
+#define _m_psubusw _mm_subs_pu16
+#define _m_psubusd _mm_subs_pu32
+#define _m_pmaddwd _mm_madd_pi16
+#define _m_pmadduwd _mm_madd_pu16
+#define _m_pmulhw _mm_mulhi_pi16
+#define _m_pmulhuw _mm_mulhi_pu16
+#define _m_pmullw _mm_mullo_pi16
+#define _m_pmacsw _mm_mac_pi16
+#define _m_pmacuw _mm_mac_pu16
+#define _m_pmacszw _mm_macz_pi16
+#define _m_pmacuzw _mm_macz_pu16
+#define _m_paccb _mm_acc_pu8
+#define _m_paccw _mm_acc_pu16
+#define _m_paccd _mm_acc_pu32
+#define _m_pmia _mm_mia_si64
+#define _m_pmiaph _mm_miaph_si64
+#define _m_pmiabb _mm_miabb_si64
+#define _m_pmiabt _mm_miabt_si64
+#define _m_pmiatb _mm_miatb_si64
+#define _m_pmiatt _mm_miatt_si64
+#define _m_psllw _mm_sll_pi16
+#define _m_psllwi _mm_slli_pi16
+#define _m_pslld _mm_sll_pi32
+#define _m_pslldi _mm_slli_pi32
+#define _m_psllq _mm_sll_si64
+#define _m_psllqi _mm_slli_si64
+#define _m_psraw _mm_sra_pi16
+#define _m_psrawi _mm_srai_pi16
+#define _m_psrad _mm_sra_pi32
+#define _m_psradi _mm_srai_pi32
+#define _m_psraq _mm_sra_si64
+#define _m_psraqi _mm_srai_si64
+#define _m_psrlw _mm_srl_pi16
+#define _m_psrlwi _mm_srli_pi16
+#define _m_psrld _mm_srl_pi32
+#define _m_psrldi _mm_srli_pi32
+#define _m_psrlq _mm_srl_si64
+#define _m_psrlqi _mm_srli_si64
+#define _m_prorw _mm_ror_pi16
+#define _m_prorwi _mm_rori_pi16
+#define _m_prord _mm_ror_pi32
+#define _m_prordi _mm_rori_pi32
+#define _m_prorq _mm_ror_si64
+#define _m_prorqi _mm_rori_si64
+#define _m_pand _mm_and_si64
+#define _m_pandn _mm_andnot_si64
+#define _m_por _mm_or_si64
+#define _m_pxor _mm_xor_si64
+#define _m_pcmpeqb _mm_cmpeq_pi8
+#define _m_pcmpeqw _mm_cmpeq_pi16
+#define _m_pcmpeqd _mm_cmpeq_pi32
+#define _m_pcmpgtb _mm_cmpgt_pi8
+#define _m_pcmpgtub _mm_cmpgt_pu8
+#define _m_pcmpgtw _mm_cmpgt_pi16
+#define _m_pcmpgtuw _mm_cmpgt_pu16
+#define _m_pcmpgtd _mm_cmpgt_pi32
+#define _m_pcmpgtud _mm_cmpgt_pu32
+#define _m_pextrb _mm_extract_pi8
+#define _m_pextrw _mm_extract_pi16
+#define _m_pextrd _mm_extract_pi32
+#define _m_pextrub _mm_extract_pu8
+#define _m_pextruw _mm_extract_pu16
+#define _m_pextrud _mm_extract_pu32
+#define _m_pinsrb _mm_insert_pi8
+#define _m_pinsrw _mm_insert_pi16
+#define _m_pinsrd _mm_insert_pi32
+#define _m_pmaxsb _mm_max_pi8
+#define _m_pmaxsw _mm_max_pi16
+#define _m_pmaxsd _mm_max_pi32
+#define _m_pmaxub _mm_max_pu8
+#define _m_pmaxuw _mm_max_pu16
+#define _m_pmaxud _mm_max_pu32
+#define _m_pminsb _mm_min_pi8
+#define _m_pminsw _mm_min_pi16
+#define _m_pminsd _mm_min_pi32
+#define _m_pminub _mm_min_pu8
+#define _m_pminuw _mm_min_pu16
+#define _m_pminud _mm_min_pu32
+#define _m_pmovmskb _mm_movemask_pi8
+#define _m_pmovmskw _mm_movemask_pi16
+#define _m_pmovmskd _mm_movemask_pi32
+#define _m_pshufw _mm_shuffle_pi16
+#define _m_pavgb _mm_avg_pu8
+#define _m_pavgw _mm_avg_pu16
+#define _m_pavg2b _mm_avg2_pu8
+#define _m_pavg2w _mm_avg2_pu16
+#define _m_psadbw _mm_sad_pu8
+#define _m_psadwd _mm_sad_pu16
+#define _m_psadzbw _mm_sadz_pu8
+#define _m_psadzwd _mm_sadz_pu16
+#define _m_paligniq _mm_align_si64
+#define _m_cvt_si2pi _mm_cvtsi64_m64
+#define _m_cvt_pi2si _mm_cvtm64_si64
+
+#endif /* _MMINTRIN_H_INCLUDED */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h
new file mode 100644
index 0000000..54dc2e7
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h
@@ -0,0 +1,130 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.15 Variable arguments <stdarg.h>
+ */
+
+#ifndef _STDARG_H
+#ifndef _ANSI_STDARG_H_
+#ifndef __need___va_list
+#define _STDARG_H
+#define _ANSI_STDARG_H_
+#endif /* not __need___va_list */
+#undef __need___va_list
+
+/* Define __gnuc_va_list. */
+
+#ifndef __GNUC_VA_LIST
+#define __GNUC_VA_LIST
+typedef __builtin_va_list __gnuc_va_list;
+#endif
+
+/* Define the standard macros for the user,
+ if this invocation was from the user program. */
+#ifdef _STDARG_H
+
+#define va_start(v,l) __builtin_va_start(v,l)
+#define va_end(v) __builtin_va_end(v)
+#define va_arg(v,l) __builtin_va_arg(v,l)
+#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L || defined(__GXX_EXPERIMENTAL_CXX0X__)
+#define va_copy(d,s) __builtin_va_copy(d,s)
+#endif
+#define __va_copy(d,s) __builtin_va_copy(d,s)
+
+/* Define va_list, if desired, from __gnuc_va_list. */
+/* We deliberately do not define va_list when called from
+ stdio.h, because ANSI C says that stdio.h is not supposed to define
+ va_list. stdio.h needs to have access to that data type,
+ but must not use that name. It should use the name __gnuc_va_list,
+ which is safe because it is reserved for the implementation. */
+
+#ifdef _HIDDEN_VA_LIST /* On OSF1, this means varargs.h is "half-loaded". */
+#undef _VA_LIST
+#endif
+
+#ifdef _BSD_VA_LIST
+#undef _BSD_VA_LIST
+#endif
+
+#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST))
+/* SVR4.2 uses _VA_LIST for an internal alias for va_list,
+ so we must avoid testing it and setting it here.
+ SVR4 uses _VA_LIST as a flag in stdarg.h, but we should
+ have no conflict with that. */
+#ifndef _VA_LIST_
+#define _VA_LIST_
+#ifdef __i860__
+#ifndef _VA_LIST
+#define _VA_LIST va_list
+#endif
+#endif /* __i860__ */
+typedef __gnuc_va_list va_list;
+#ifdef _SCO_DS
+#define __VA_LIST
+#endif
+#endif /* _VA_LIST_ */
+#else /* not __svr4__ || _SCO_DS */
+
+/* The macro _VA_LIST_ is the same thing used by this file in Ultrix.
+ But on BSD NET2 we must not test or define or undef it.
+ (Note that the comments in NET 2's ansi.h
+ are incorrect for _VA_LIST_--see stdio.h!) */
+#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT)
+/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5 */
+#ifndef _VA_LIST_DEFINED
+/* The macro _VA_LIST is used in SCO Unix 3.2. */
+#ifndef _VA_LIST
+/* The macro _VA_LIST_T_H is used in the Bull dpx2 */
+#ifndef _VA_LIST_T_H
+/* The macro __va_list__ is used by BeOS. */
+#ifndef __va_list__
+typedef __gnuc_va_list va_list;
+#endif /* not __va_list__ */
+#endif /* not _VA_LIST_T_H */
+#endif /* not _VA_LIST */
+#endif /* not _VA_LIST_DEFINED */
+#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__))
+#define _VA_LIST_
+#endif
+#ifndef _VA_LIST
+#define _VA_LIST
+#endif
+#ifndef _VA_LIST_DEFINED
+#define _VA_LIST_DEFINED
+#endif
+#ifndef _VA_LIST_T_H
+#define _VA_LIST_T_H
+#endif
+#ifndef __va_list__
+#define __va_list__
+#endif
+
+#endif /* not _VA_LIST_, except on certain systems */
+
+#endif /* not __svr4__ */
+
+#endif /* _STDARG_H */
+
+#endif /* not _ANSI_STDARG_H_ */
+#endif /* not _STDARG_H */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h
new file mode 100644
index 0000000..4ed911f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h
@@ -0,0 +1,50 @@
+/* Copyright (C) 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.16 Boolean type and values <stdbool.h>
+ */
+
+#ifndef _STDBOOL_H
+#define _STDBOOL_H
+
+#ifndef __cplusplus
+
+#define bool _Bool
+#define true 1
+#define false 0
+
+#else /* __cplusplus */
+
+/* Supporting <stdbool.h> in C++ is a GCC extension. */
+#define _Bool bool
+#define bool bool
+#define false false
+#define true true
+
+#endif /* __cplusplus */
+
+/* Signal that all the definitions are present. */
+#define __bool_true_false_are_defined 1
+
+#endif /* stdbool.h */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h
new file mode 100644
index 0000000..89e5b2e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h
@@ -0,0 +1,416 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2002, 2004, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.17 Common definitions <stddef.h>
+ */
+#if (!defined(_STDDEF_H) && !defined(_STDDEF_H_) && !defined(_ANSI_STDDEF_H) \
+ && !defined(__STDDEF_H__)) \
+ || defined(__need_wchar_t) || defined(__need_size_t) \
+ || defined(__need_ptrdiff_t) || defined(__need_NULL) \
+ || defined(__need_wint_t)
+
+/* Any one of these symbols __need_* means that GNU libc
+ wants us just to define one data type. So don't define
+ the symbols that indicate this file's entire job has been done. */
+#if (!defined(__need_wchar_t) && !defined(__need_size_t) \
+ && !defined(__need_ptrdiff_t) && !defined(__need_NULL) \
+ && !defined(__need_wint_t))
+#define _STDDEF_H
+#define _STDDEF_H_
+/* snaroff@next.com says the NeXT needs this. */
+#define _ANSI_STDDEF_H
+/* Irix 5.1 needs this. */
+#define __STDDEF_H__
+#endif
+
+#ifndef __sys_stdtypes_h
+/* This avoids lossage on SunOS but only if stdtypes.h comes first.
+ There's no way to win with the other order! Sun lossage. */
+
+/* On 4.3bsd-net2, make sure ansi.h is included, so we have
+ one less case to deal with in the following. */
+#if defined (__BSD_NET2__) || defined (____386BSD____) || (defined (__FreeBSD__) && (__FreeBSD__ < 5)) || defined(__NetBSD__)
+#include <machine/ansi.h>
+#endif
+/* On FreeBSD 5, machine/ansi.h does not exist anymore... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#include <sys/_types.h>
+#endif
+
+/* In 4.3bsd-net2, machine/ansi.h defines these symbols, which are
+ defined if the corresponding type is *not* defined.
+ FreeBSD-2.1 defines _MACHINE_ANSI_H_ instead of _ANSI_H_ */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+#if !defined(_SIZE_T_) && !defined(_BSD_SIZE_T_)
+#define _SIZE_T
+#endif
+#if !defined(_PTRDIFF_T_) && !defined(_BSD_PTRDIFF_T_)
+#define _PTRDIFF_T
+#endif
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_. */
+#if !defined(_WCHAR_T_) && !defined(_BSD_WCHAR_T_)
+#ifndef _BSD_WCHAR_T_
+#define _WCHAR_T
+#endif
+#endif
+/* Undef _FOO_T_ if we are supposed to define foo_t. */
+#if defined (__need_ptrdiff_t) || defined (_STDDEF_H_)
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#if defined (__need_size_t) || defined (_STDDEF_H_)
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#if defined (__need_wchar_t) || defined (_STDDEF_H_)
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) */
+
+/* Sequent's header files use _PTRDIFF_T_ in some conflicting way.
+ Just ignore it. */
+#if defined (__sequent__) && defined (_PTRDIFF_T_)
+#undef _PTRDIFF_T_
+#endif
+
+/* On VxWorks, <type/vxTypesBase.h> may have defined macros like
+ _TYPE_size_t which will typedef size_t. fixincludes patched the
+ vxTypesBase.h so that this macro is only defined if _GCC_SIZE_T is
+ not defined, and so that defining this macro defines _GCC_SIZE_T.
+ If we find that the macros are still defined at this point, we must
+ invoke them so that the type is defined as expected. */
+#if defined (_TYPE_ptrdiff_t) && (defined (__need_ptrdiff_t) || defined (_STDDEF_H_))
+_TYPE_ptrdiff_t;
+#undef _TYPE_ptrdiff_t
+#endif
+#if defined (_TYPE_size_t) && (defined (__need_size_t) || defined (_STDDEF_H_))
+_TYPE_size_t;
+#undef _TYPE_size_t
+#endif
+#if defined (_TYPE_wchar_t) && (defined (__need_wchar_t) || defined (_STDDEF_H_))
+_TYPE_wchar_t;
+#undef _TYPE_wchar_t
+#endif
+
+/* In case nobody has defined these types, but we aren't running under
+ GCC 2.00, make sure that __PTRDIFF_TYPE__, __SIZE_TYPE__, and
+ __WCHAR_TYPE__ have reasonable values. This can happen if the
+ parts of GCC is compiled by an older compiler, that actually
+ include gstddef.h, such as collect2. */
+
+/* Signed type of difference of two pointers. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_ptrdiff_t)
+#ifndef _PTRDIFF_T /* in case <sys/types.h> has defined it. */
+#ifndef _T_PTRDIFF_
+#ifndef _T_PTRDIFF
+#ifndef __PTRDIFF_T
+#ifndef _PTRDIFF_T_
+#ifndef _BSD_PTRDIFF_T_
+#ifndef ___int_ptrdiff_t_h
+#ifndef _GCC_PTRDIFF_T
+#define _PTRDIFF_T
+#define _T_PTRDIFF_
+#define _T_PTRDIFF
+#define __PTRDIFF_T
+#define _PTRDIFF_T_
+#define _BSD_PTRDIFF_T_
+#define ___int_ptrdiff_t_h
+#define _GCC_PTRDIFF_T
+#ifndef __PTRDIFF_TYPE__
+#define __PTRDIFF_TYPE__ long int
+#endif
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+#endif /* _GCC_PTRDIFF_T */
+#endif /* ___int_ptrdiff_t_h */
+#endif /* _BSD_PTRDIFF_T_ */
+#endif /* _PTRDIFF_T_ */
+#endif /* __PTRDIFF_T */
+#endif /* _T_PTRDIFF */
+#endif /* _T_PTRDIFF_ */
+#endif /* _PTRDIFF_T */
+
+/* If this symbol has done its job, get rid of it. */
+#undef __need_ptrdiff_t
+
+#endif /* _STDDEF_H or __need_ptrdiff_t. */
+
+/* Unsigned type of `sizeof' something. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_size_t)
+#ifndef __size_t__ /* BeOS */
+#ifndef __SIZE_T__ /* Cray Unicos/Mk */
+#ifndef _SIZE_T /* in case <sys/types.h> has defined it. */
+#ifndef _SYS_SIZE_T_H
+#ifndef _T_SIZE_
+#ifndef _T_SIZE
+#ifndef __SIZE_T
+#ifndef _SIZE_T_
+#ifndef _BSD_SIZE_T_
+#ifndef _SIZE_T_DEFINED_
+#ifndef _SIZE_T_DEFINED
+#ifndef _BSD_SIZE_T_DEFINED_ /* Darwin */
+#ifndef _SIZE_T_DECLARED /* FreeBSD 5 */
+#ifndef ___int_size_t_h
+#ifndef _GCC_SIZE_T
+#ifndef _SIZET_
+#ifndef __size_t
+#define __size_t__ /* BeOS */
+#define __SIZE_T__ /* Cray Unicos/Mk */
+#define _SIZE_T
+#define _SYS_SIZE_T_H
+#define _T_SIZE_
+#define _T_SIZE
+#define __SIZE_T
+#define _SIZE_T_
+#define _BSD_SIZE_T_
+#define _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED
+#define _BSD_SIZE_T_DEFINED_ /* Darwin */
+#define _SIZE_T_DECLARED /* FreeBSD 5 */
+#define ___int_size_t_h
+#define _GCC_SIZE_T
+#define _SIZET_
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+/* __size_t is a typedef on FreeBSD 5!, must not trash it. */
+#else
+#define __size_t
+#endif
+#ifndef __SIZE_TYPE__
+#define __SIZE_TYPE__ long unsigned int
+#endif
+#if !(defined (__GNUG__) && defined (size_t))
+typedef __SIZE_TYPE__ size_t;
+#ifdef __BEOS__
+typedef long ssize_t;
+#endif /* __BEOS__ */
+#endif /* !(defined (__GNUG__) && defined (size_t)) */
+#endif /* __size_t */
+#endif /* _SIZET_ */
+#endif /* _GCC_SIZE_T */
+#endif /* ___int_size_t_h */
+#endif /* _SIZE_T_DECLARED */
+#endif /* _BSD_SIZE_T_DEFINED_ */
+#endif /* _SIZE_T_DEFINED */
+#endif /* _SIZE_T_DEFINED_ */
+#endif /* _BSD_SIZE_T_ */
+#endif /* _SIZE_T_ */
+#endif /* __SIZE_T */
+#endif /* _T_SIZE */
+#endif /* _T_SIZE_ */
+#endif /* _SYS_SIZE_T_H */
+#endif /* _SIZE_T */
+#endif /* __SIZE_T__ */
+#endif /* __size_t__ */
+#undef __need_size_t
+#endif /* _STDDEF_H or __need_size_t. */
+
+
+/* Wide character type.
+ Locale-writers should change this as necessary to
+ be big enough to hold unique values not between 0 and 127,
+ and not (wchar_t) -1, for each defined multibyte character. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_wchar_t)
+#ifndef __wchar_t__ /* BeOS */
+#ifndef __WCHAR_T__ /* Cray Unicos/Mk */
+#ifndef _WCHAR_T
+#ifndef _T_WCHAR_
+#ifndef _T_WCHAR
+#ifndef __WCHAR_T
+#ifndef _WCHAR_T_
+#ifndef _BSD_WCHAR_T_
+#ifndef _BSD_WCHAR_T_DEFINED_ /* Darwin */
+#ifndef _BSD_RUNE_T_DEFINED_ /* Darwin */
+#ifndef _WCHAR_T_DECLARED /* FreeBSD 5 */
+#ifndef _WCHAR_T_DEFINED_
+#ifndef _WCHAR_T_DEFINED
+#ifndef _WCHAR_T_H
+#ifndef ___int_wchar_t_h
+#ifndef __INT_WCHAR_T_H
+#ifndef _GCC_WCHAR_T
+#define __wchar_t__ /* BeOS */
+#define __WCHAR_T__ /* Cray Unicos/Mk */
+#define _WCHAR_T
+#define _T_WCHAR_
+#define _T_WCHAR
+#define __WCHAR_T
+#define _WCHAR_T_
+#define _BSD_WCHAR_T_
+#define _WCHAR_T_DEFINED_
+#define _WCHAR_T_DEFINED
+#define _WCHAR_T_H
+#define ___int_wchar_t_h
+#define __INT_WCHAR_T_H
+#define _GCC_WCHAR_T
+#define _WCHAR_T_DECLARED
+
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_, and _BSD_RUNE_T_ (which, unlike the other
+ symbols in the _FOO_T_ family, stays defined even after its
+ corresponding type is defined). If we define wchar_t, then we
+ must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if
+ we undef _WCHAR_T_, then we must also define rune_t, since
+ headers like runetype.h assume that if machine/ansi.h is included,
+ and _BSD_WCHAR_T_ is not defined, then rune_t is available.
+ machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of
+ the same type." */
+#ifdef _BSD_WCHAR_T_
+#undef _BSD_WCHAR_T_
+#ifdef _BSD_RUNE_T_
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+typedef _BSD_RUNE_T_ rune_t;
+#define _BSD_WCHAR_T_DEFINED_
+#define _BSD_RUNE_T_DEFINED_ /* Darwin */
+#if defined (__FreeBSD__) && (__FreeBSD__ < 5)
+/* Why is this file so hard to maintain properly? In contrast to
+ the comment above regarding BSD/386 1.1, on FreeBSD for as long
+ as the symbol has existed, _BSD_RUNE_T_ must not stay defined or
+ redundant typedefs will occur when stdlib.h is included after this file. */
+#undef _BSD_RUNE_T_
+#endif
+#endif
+#endif
+#endif
+/* FreeBSD 5 can't be handled well using "traditional" logic above
+ since it no longer defines _BSD_RUNE_T_ yet still desires to export
+ rune_t in some cases... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+#if __BSD_VISIBLE
+#ifndef _RUNE_T_DECLARED
+typedef __rune_t rune_t;
+#define _RUNE_T_DECLARED
+#endif
+#endif
+#endif
+#endif
+
+#ifndef __WCHAR_TYPE__
+#define __WCHAR_TYPE__ int
+#endif
+#ifndef __cplusplus
+typedef __WCHAR_TYPE__ wchar_t;
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* _WCHAR_T_DECLARED */
+#endif /* _BSD_RUNE_T_DEFINED_ */
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* __WCHAR_T__ */
+#endif /* __wchar_t__ */
+#undef __need_wchar_t
+#endif /* _STDDEF_H or __need_wchar_t. */
+
+#if defined (__need_wint_t)
+#ifndef _WINT_T
+#define _WINT_T
+
+#ifndef __WINT_TYPE__
+#define __WINT_TYPE__ unsigned int
+#endif
+typedef __WINT_TYPE__ wint_t;
+#endif
+#undef __need_wint_t
+#endif
+
+/* In 4.3bsd-net2, leave these undefined to indicate that size_t, etc.
+ are already defined. */
+/* BSD/OS 3.1 and FreeBSD [23].x require the MACHINE_ANSI_H check here. */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+/* The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_
+ are probably typos and should be removed before 2.8 is released. */
+#ifdef _GCC_PTRDIFF_T_
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T_
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T_
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+/* The following ones are the real ones. */
+#ifdef _GCC_PTRDIFF_T
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* _ANSI_H_ || _MACHINE_ANSI_H_ */
+
+#endif /* __sys_stdtypes_h */
+
+/* A null pointer constant. */
+
+#if defined (_STDDEF_H) || defined (__need_NULL)
+#undef NULL /* in case <stdio.h> has defined it. */
+#ifdef __GNUG__
+#define NULL __null
+#else /* G++ */
+#ifndef __cplusplus
+#define NULL ((void *)0)
+#else /* C++ */
+#define NULL 0
+#endif /* C++ */
+#endif /* G++ */
+#endif /* NULL not defined and <stddef.h> or need NULL. */
+#undef __need_NULL
+
+#ifdef _STDDEF_H
+
+/* Offset of member MEMBER in a struct of type TYPE. */
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+
+#endif /* _STDDEF_H was defined this time */
+
+#endif /* !_STDDEF_H && !_STDDEF_H_ && !_ANSI_STDDEF_H && !__STDDEF_H__
+ || __need_XXX was not defined before */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h
new file mode 100644
index 0000000..3c3ec00
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h
@@ -0,0 +1,204 @@
+/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* ISO/IEC JTC1 SC22 WG14 N1169
+ * Date: 2006-04-04
+ * ISO/IEC TR 18037
+ * Programming languages - C - Extensions to support embedded processors
+ */
+
+#ifndef _STDFIX_H
+#define _STDFIX_H
+
+/* 7.18a.1 Introduction. */
+
+#undef fract
+#undef accum
+#undef sat
+#define fract _Fract
+#define accum _Accum
+#define sat _Sat
+
+/* 7.18a.3 Precision macros. */
+
+#undef SFRACT_FBIT
+#undef SFRACT_MIN
+#undef SFRACT_MAX
+#undef SFRACT_EPSILON
+#define SFRACT_FBIT __SFRACT_FBIT__
+#define SFRACT_MIN __SFRACT_MIN__
+#define SFRACT_MAX __SFRACT_MAX__
+#define SFRACT_EPSILON __SFRACT_EPSILON__
+
+#undef USFRACT_FBIT
+#undef USFRACT_MIN
+#undef USFRACT_MAX
+#undef USFRACT_EPSILON
+#define USFRACT_FBIT __USFRACT_FBIT__
+#define USFRACT_MIN __USFRACT_MIN__ /* GCC extension. */
+#define USFRACT_MAX __USFRACT_MAX__
+#define USFRACT_EPSILON __USFRACT_EPSILON__
+
+#undef FRACT_FBIT
+#undef FRACT_MIN
+#undef FRACT_MAX
+#undef FRACT_EPSILON
+#define FRACT_FBIT __FRACT_FBIT__
+#define FRACT_MIN __FRACT_MIN__
+#define FRACT_MAX __FRACT_MAX__
+#define FRACT_EPSILON __FRACT_EPSILON__
+
+#undef UFRACT_FBIT
+#undef UFRACT_MIN
+#undef UFRACT_MAX
+#undef UFRACT_EPSILON
+#define UFRACT_FBIT __UFRACT_FBIT__
+#define UFRACT_MIN __UFRACT_MIN__ /* GCC extension. */
+#define UFRACT_MAX __UFRACT_MAX__
+#define UFRACT_EPSILON __UFRACT_EPSILON__
+
+#undef LFRACT_FBIT
+#undef LFRACT_MIN
+#undef LFRACT_MAX
+#undef LFRACT_EPSILON
+#define LFRACT_FBIT __LFRACT_FBIT__
+#define LFRACT_MIN __LFRACT_MIN__
+#define LFRACT_MAX __LFRACT_MAX__
+#define LFRACT_EPSILON __LFRACT_EPSILON__
+
+#undef ULFRACT_FBIT
+#undef ULFRACT_MIN
+#undef ULFRACT_MAX
+#undef ULFRACT_EPSILON
+#define ULFRACT_FBIT __ULFRACT_FBIT__
+#define ULFRACT_MIN __ULFRACT_MIN__ /* GCC extension. */
+#define ULFRACT_MAX __ULFRACT_MAX__
+#define ULFRACT_EPSILON __ULFRACT_EPSILON__
+
+#undef LLFRACT_FBIT
+#undef LLFRACT_MIN
+#undef LLFRACT_MAX
+#undef LLFRACT_EPSILON
+#define LLFRACT_FBIT __LLFRACT_FBIT__ /* GCC extension. */
+#define LLFRACT_MIN __LLFRACT_MIN__ /* GCC extension. */
+#define LLFRACT_MAX __LLFRACT_MAX__ /* GCC extension. */
+#define LLFRACT_EPSILON __LLFRACT_EPSILON__ /* GCC extension. */
+
+#undef ULLFRACT_FBIT
+#undef ULLFRACT_MIN
+#undef ULLFRACT_MAX
+#undef ULLFRACT_EPSILON
+#define ULLFRACT_FBIT __ULLFRACT_FBIT__ /* GCC extension. */
+#define ULLFRACT_MIN __ULLFRACT_MIN__ /* GCC extension. */
+#define ULLFRACT_MAX __ULLFRACT_MAX__ /* GCC extension. */
+#define ULLFRACT_EPSILON __ULLFRACT_EPSILON__ /* GCC extension. */
+
+#undef SACCUM_FBIT
+#undef SACCUM_IBIT
+#undef SACCUM_MIN
+#undef SACCUM_MAX
+#undef SACCUM_EPSILON
+#define SACCUM_FBIT __SACCUM_FBIT__
+#define SACCUM_IBIT __SACCUM_IBIT__
+#define SACCUM_MIN __SACCUM_MIN__
+#define SACCUM_MAX __SACCUM_MAX__
+#define SACCUM_EPSILON __SACCUM_EPSILON__
+
+#undef USACCUM_FBIT
+#undef USACCUM_IBIT
+#undef USACCUM_MIN
+#undef USACCUM_MAX
+#undef USACCUM_EPSILON
+#define USACCUM_FBIT __USACCUM_FBIT__
+#define USACCUM_IBIT __USACCUM_IBIT__
+#define USACCUM_MIN __USACCUM_MIN__ /* GCC extension. */
+#define USACCUM_MAX __USACCUM_MAX__
+#define USACCUM_EPSILON __USACCUM_EPSILON__
+
+#undef ACCUM_FBIT
+#undef ACCUM_IBIT
+#undef ACCUM_MIN
+#undef ACCUM_MAX
+#undef ACCUM_EPSILON
+#define ACCUM_FBIT __ACCUM_FBIT__
+#define ACCUM_IBIT __ACCUM_IBIT__
+#define ACCUM_MIN __ACCUM_MIN__
+#define ACCUM_MAX __ACCUM_MAX__
+#define ACCUM_EPSILON __ACCUM_EPSILON__
+
+#undef UACCUM_FBIT
+#undef UACCUM_IBIT
+#undef UACCUM_MIN
+#undef UACCUM_MAX
+#undef UACCUM_EPSILON
+#define UACCUM_FBIT __UACCUM_FBIT__
+#define UACCUM_IBIT __UACCUM_IBIT__
+#define UACCUM_MIN __UACCUM_MIN__ /* GCC extension. */
+#define UACCUM_MAX __UACCUM_MAX__
+#define UACCUM_EPSILON __UACCUM_EPSILON__
+
+#undef LACCUM_FBIT
+#undef LACCUM_IBIT
+#undef LACCUM_MIN
+#undef LACCUM_MAX
+#undef LACCUM_EPSILON
+#define LACCUM_FBIT __LACCUM_FBIT__
+#define LACCUM_IBIT __LACCUM_IBIT__
+#define LACCUM_MIN __LACCUM_MIN__
+#define LACCUM_MAX __LACCUM_MAX__
+#define LACCUM_EPSILON __LACCUM_EPSILON__
+
+#undef ULACCUM_FBIT
+#undef ULACCUM_IBIT
+#undef ULACCUM_MIN
+#undef ULACCUM_MAX
+#undef ULACCUM_EPSILON
+#define ULACCUM_FBIT __ULACCUM_FBIT__
+#define ULACCUM_IBIT __ULACCUM_IBIT__
+#define ULACCUM_MIN __ULACCUM_MIN__ /* GCC extension. */
+#define ULACCUM_MAX __ULACCUM_MAX__
+#define ULACCUM_EPSILON __ULACCUM_EPSILON__
+
+#undef LLACCUM_FBIT
+#undef LLACCUM_IBIT
+#undef LLACCUM_MIN
+#undef LLACCUM_MAX
+#undef LLACCUM_EPSILON
+#define LLACCUM_FBIT __LLACCUM_FBIT__ /* GCC extension. */
+#define LLACCUM_IBIT __LLACCUM_IBIT__ /* GCC extension. */
+#define LLACCUM_MIN __LLACCUM_MIN__ /* GCC extension. */
+#define LLACCUM_MAX __LLACCUM_MAX__ /* GCC extension. */
+#define LLACCUM_EPSILON __LLACCUM_EPSILON__ /* GCC extension. */
+
+#undef ULLACCUM_FBIT
+#undef ULLACCUM_IBIT
+#undef ULLACCUM_MIN
+#undef ULLACCUM_MAX
+#undef ULLACCUM_EPSILON
+#define ULLACCUM_FBIT __ULLACCUM_FBIT__ /* GCC extension. */
+#define ULLACCUM_IBIT __ULLACCUM_IBIT__ /* GCC extension. */
+#define ULLACCUM_MIN __ULLACCUM_MIN__ /* GCC extension. */
+#define ULLACCUM_MAX __ULLACCUM_MAX__ /* GCC extension. */
+#define ULLACCUM_EPSILON __ULLACCUM_EPSILON__ /* GCC extension. */
+
+#endif /* _STDFIX_H */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h
new file mode 100644
index 0000000..a9ba126
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h
@@ -0,0 +1,281 @@
+/* Header file for the ARM EABI unwinder
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Paul Brook
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Language-independent unwinder header public defines. This contains both
+ ABI defined objects, and GNU support routines. */
+
+#ifndef UNWIND_ARM_H
+#define UNWIND_ARM_H
+
+#define __ARM_EABI_UNWINDER__ 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ typedef unsigned _Unwind_Word __attribute__((__mode__(__word__)));
+ typedef signed _Unwind_Sword __attribute__((__mode__(__word__)));
+ typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+ typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+ typedef _Unwind_Word _uw;
+ typedef unsigned _uw64 __attribute__((mode(__DI__)));
+ typedef unsigned _uw16 __attribute__((mode(__HI__)));
+ typedef unsigned _uw8 __attribute__((mode(__QI__)));
+
+ typedef enum
+ {
+ _URC_OK = 0, /* operation completed successfully */
+ _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+ _URC_END_OF_STACK = 5,
+ _URC_HANDLER_FOUND = 6,
+ _URC_INSTALL_CONTEXT = 7,
+ _URC_CONTINUE_UNWIND = 8,
+ _URC_FAILURE = 9 /* unspecified failure of some kind */
+ }
+ _Unwind_Reason_Code;
+
+ typedef enum
+ {
+ _US_VIRTUAL_UNWIND_FRAME = 0,
+ _US_UNWIND_FRAME_STARTING = 1,
+ _US_UNWIND_FRAME_RESUME = 2,
+ _US_ACTION_MASK = 3,
+ _US_FORCE_UNWIND = 8,
+ _US_END_OF_STACK = 16
+ }
+ _Unwind_State;
+
+ /* Provided only for for compatibility with existing code. */
+ typedef int _Unwind_Action;
+#define _UA_SEARCH_PHASE 1
+#define _UA_CLEANUP_PHASE 2
+#define _UA_HANDLER_FRAME 4
+#define _UA_FORCE_UNWIND 8
+#define _UA_END_OF_STACK 16
+#define _URC_NO_REASON _URC_OK
+
+ typedef struct _Unwind_Control_Block _Unwind_Control_Block;
+ typedef struct _Unwind_Context _Unwind_Context;
+ typedef _uw _Unwind_EHT_Header;
+
+
+ /* UCB: */
+
+ struct _Unwind_Control_Block
+ {
+ char exception_class[8];
+ void (*exception_cleanup)(_Unwind_Reason_Code, _Unwind_Control_Block *);
+ /* Unwinder cache, private fields for the unwinder's use */
+ struct
+ {
+ _uw reserved1; /* Forced unwind stop fn, 0 if not forced */
+ _uw reserved2; /* Personality routine address */
+ _uw reserved3; /* Saved callsite address */
+ _uw reserved4; /* Forced unwind stop arg */
+ _uw reserved5;
+ }
+ unwinder_cache;
+ /* Propagation barrier cache (valid after phase 1): */
+ struct
+ {
+ _uw sp;
+ _uw bitpattern[5];
+ }
+ barrier_cache;
+ /* Cleanup cache (preserved over cleanup): */
+ struct
+ {
+ _uw bitpattern[4];
+ }
+ cleanup_cache;
+ /* Pr cache (for pr's benefit): */
+ struct
+ {
+ _uw fnstart; /* function start address */
+ _Unwind_EHT_Header *ehtp; /* pointer to EHT entry header word */
+ _uw additional; /* additional data */
+ _uw reserved1;
+ }
+ pr_cache;
+ long long int :0; /* Force alignment to 8-byte boundary */
+ };
+
+ /* Virtual Register Set*/
+
+ typedef enum
+ {
+ _UVRSC_CORE = 0, /* integer register */
+ _UVRSC_VFP = 1, /* vfp */
+ _UVRSC_FPA = 2, /* fpa */
+ _UVRSC_WMMXD = 3, /* Intel WMMX data register */
+ _UVRSC_WMMXC = 4 /* Intel WMMX control register */
+ }
+ _Unwind_VRS_RegClass;
+
+ typedef enum
+ {
+ _UVRSD_UINT32 = 0,
+ _UVRSD_VFPX = 1,
+ _UVRSD_FPAX = 2,
+ _UVRSD_UINT64 = 3,
+ _UVRSD_FLOAT = 4,
+ _UVRSD_DOUBLE = 5
+ }
+ _Unwind_VRS_DataRepresentation;
+
+ typedef enum
+ {
+ _UVRSR_OK = 0,
+ _UVRSR_NOT_IMPLEMENTED = 1,
+ _UVRSR_FAILED = 2
+ }
+ _Unwind_VRS_Result;
+
+ /* Frame unwinding state. */
+ typedef struct
+ {
+ /* The current word (bytes packed msb first). */
+ _uw data;
+ /* Pointer to the next word of data. */
+ _uw *next;
+ /* The number of bytes left in this word. */
+ _uw8 bytes_left;
+ /* The number of words pointed to by ptr. */
+ _uw8 words_left;
+ }
+ __gnu_unwind_state;
+
+ typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State,
+ _Unwind_Control_Block *, _Unwind_Context *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Set(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation,
+ void *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Get(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation,
+ void *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Pop(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation);
+
+
+ /* Support functions for the PR. */
+#define _Unwind_Exception _Unwind_Control_Block
+ typedef char _Unwind_Exception_Class[8];
+
+ void * _Unwind_GetLanguageSpecificData (_Unwind_Context *);
+ _Unwind_Ptr _Unwind_GetRegionStart (_Unwind_Context *);
+
+ /* These two should never be used. */
+ _Unwind_Ptr _Unwind_GetDataRelBase (_Unwind_Context *);
+ _Unwind_Ptr _Unwind_GetTextRelBase (_Unwind_Context *);
+
+ /* Interface functions: */
+ _Unwind_Reason_Code _Unwind_RaiseException(_Unwind_Control_Block *ucbp);
+ void __attribute__((noreturn)) _Unwind_Resume(_Unwind_Control_Block *ucbp);
+ _Unwind_Reason_Code _Unwind_Resume_or_Rethrow (_Unwind_Control_Block *ucbp);
+
+ typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
+ (int, _Unwind_Action, _Unwind_Exception_Class,
+ _Unwind_Control_Block *, struct _Unwind_Context *, void *);
+ _Unwind_Reason_Code _Unwind_ForcedUnwind (_Unwind_Control_Block *,
+ _Unwind_Stop_Fn, void *);
+ /* @@@ Use unwind data to perform a stack backtrace. The trace callback
+ is called for every stack frame in the call chain, but no cleanup
+ actions are performed. */
+ typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn) (_Unwind_Context *, void *);
+ _Unwind_Reason_Code _Unwind_Backtrace(_Unwind_Trace_Fn,
+ void*);
+
+ _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *);
+ void _Unwind_Complete(_Unwind_Control_Block *ucbp);
+ void _Unwind_DeleteException (_Unwind_Exception *);
+
+ _Unwind_Reason_Code __gnu_unwind_frame (_Unwind_Control_Block *,
+ _Unwind_Context *);
+ _Unwind_Reason_Code __gnu_unwind_execute (_Unwind_Context *,
+ __gnu_unwind_state *);
+
+ /* Decode an R_ARM_TARGET2 relocation. */
+ static inline _Unwind_Word
+ _Unwind_decode_target2 (_Unwind_Word ptr)
+ {
+ _Unwind_Word tmp;
+
+ tmp = *(_Unwind_Word *) ptr;
+ /* Zero values are always NULL. */
+ if (!tmp)
+ return 0;
+
+#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
+ /* Pc-relative indirect. */
+ tmp += ptr;
+ tmp = *(_Unwind_Word *) tmp;
+#elif defined(__symbian__) || defined(__uClinux__)
+ /* Absolute pointer. Nothing more to do. */
+#else
+ /* Pc-relative pointer. */
+ tmp += ptr;
+#endif
+ return tmp;
+ }
+
+ static inline _Unwind_Word
+ _Unwind_GetGR (_Unwind_Context *context, int regno)
+ {
+ _uw val;
+ _Unwind_VRS_Get (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+ return val;
+ }
+
+ /* Return the address of the instruction, not the actual IP value. */
+#define _Unwind_GetIP(context) \
+ (_Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+#define _Unwind_GetIPInfo(context, ip_before_insn) \
+ (*ip_before_insn = 0, _Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+ static inline void
+ _Unwind_SetGR (_Unwind_Context *context, int regno, _Unwind_Word val)
+ {
+ _Unwind_VRS_Set (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+ }
+
+ /* The dwarf unwinder doesn't understand arm/thumb state. We assume the
+ landing pad uses the same instruction set as the call site. */
+#define _Unwind_SetIP(context, val) \
+ _Unwind_SetGR (context, 15, val | (_Unwind_GetGR (context, 15) & 1))
+
+/* leb128 type numbers have a potentially unlimited size.
+ The target of the following definitions of _sleb128_t and _uleb128_t
+ is to have efficient data types large enough to hold the leb128 type
+ numbers used in the unwind code. */
+typedef long _sleb128_t;
+typedef unsigned long _uleb128_t;
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* defined UNWIND_ARM_H */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h
new file mode 100644
index 0000000..4b9803e
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h
@@ -0,0 +1,7 @@
+#ifndef _VARARGS_H
+#define _VARARGS_H
+
+#error "GCC no longer implements <varargs.h>."
+#error "Revise your code to use <stdarg.h>."
+
+#endif
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list
new file mode 100644
index 0000000..092bc2b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list
@@ -0,0 +1 @@
+;
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h
new file mode 100644
index 0000000..a362802
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h
@@ -0,0 +1,8 @@
+/* syslimits.h stands for the system's own limits.h file.
+ If we can use it ok unmodified, then we install this text.
+ If fixincludes fixes it, then the fixed version is installed
+ instead of this text. */
+
+#define _GCC_NEXT_LIMITS_H /* tell gcc's limits.h to recurse */
+#include_next <limits.h>
+#undef _GCC_NEXT_LIMITS_H
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README
new file mode 100644
index 0000000..7086a77
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process. They are
+system-specific, and will not work on any other kind of system. They
+are also not part of GCC. The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix. As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h
new file mode 100644
index 0000000..30e08a7
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h
@@ -0,0 +1,125 @@
+/* This administrivia gets added to the beginning of limits.h
+ if the system has its own version of limits.h. */
+
+/* We use _GCC_LIMITS_H_ because we want this not to match
+ any macros that the system's limits.h uses for its own purposes. */
+#ifndef _GCC_LIMITS_H_ /* Terminated in limity.h. */
+#define _GCC_LIMITS_H_
+
+#ifndef _LIBC_LIMITS_H_
+/* Use "..." so that we find syslimits.h only in this same directory. */
+#include "syslimits.h"
+#endif
+#ifndef _LIMITS_H___
+#define _LIMITS_H___
+
+/* Number of bits in a `char'. */
+#undef CHAR_BIT
+#define CHAR_BIT __CHAR_BIT__
+
+/* Maximum length of a multibyte character. */
+#ifndef MB_LEN_MAX
+#define MB_LEN_MAX 1
+#endif
+
+/* Minimum and maximum values a `signed char' can hold. */
+#undef SCHAR_MIN
+#define SCHAR_MIN (-SCHAR_MAX - 1)
+#undef SCHAR_MAX
+#define SCHAR_MAX __SCHAR_MAX__
+
+/* Maximum value an `unsigned char' can hold. (Minimum is 0). */
+#undef UCHAR_MAX
+#if __SCHAR_MAX__ == __INT_MAX__
+# define UCHAR_MAX (SCHAR_MAX * 2U + 1U)
+#else
+# define UCHAR_MAX (SCHAR_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `char' can hold. */
+#ifdef __CHAR_UNSIGNED__
+# undef CHAR_MIN
+# if __SCHAR_MAX__ == __INT_MAX__
+# define CHAR_MIN 0U
+# else
+# define CHAR_MIN 0
+# endif
+# undef CHAR_MAX
+# define CHAR_MAX UCHAR_MAX
+#else
+# undef CHAR_MIN
+# define CHAR_MIN SCHAR_MIN
+# undef CHAR_MAX
+# define CHAR_MAX SCHAR_MAX
+#endif
+
+/* Minimum and maximum values a `signed short int' can hold. */
+#undef SHRT_MIN
+#define SHRT_MIN (-SHRT_MAX - 1)
+#undef SHRT_MAX
+#define SHRT_MAX __SHRT_MAX__
+
+/* Maximum value an `unsigned short int' can hold. (Minimum is 0). */
+#undef USHRT_MAX
+#if __SHRT_MAX__ == __INT_MAX__
+# define USHRT_MAX (SHRT_MAX * 2U + 1U)
+#else
+# define USHRT_MAX (SHRT_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `signed int' can hold. */
+#undef INT_MIN
+#define INT_MIN (-INT_MAX - 1)
+#undef INT_MAX
+#define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold. (Minimum is 0). */
+#undef UINT_MAX
+#define UINT_MAX (INT_MAX * 2U + 1U)
+
+/* Minimum and maximum values a `signed long int' can hold.
+ (Same as `int'). */
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX - 1L)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1UL)
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LLONG_MIN
+# define LLONG_MIN (-LLONG_MAX - 1LL)
+# undef LLONG_MAX
+# define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULLONG_MAX
+# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+#endif
+
+#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LONG_LONG_MIN
+# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL)
+# undef LONG_LONG_MAX
+# define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULONG_LONG_MAX
+# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL)
+#endif
+
+#endif /* _LIMITS_H___ */
+/* This administrivia gets added to the end of limits.h
+ if the system has its own version of limits.h. */
+
+#else /* not _GCC_LIMITS_H_ */
+
+#ifdef _GCC_NEXT_LIMITS_H
+#include_next <limits.h> /* recurse down to the real one */
+#endif
+
+#endif /* not _GCC_LIMITS_H_ */
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list
new file mode 100644
index 0000000..d28d5cc
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list
@@ -0,0 +1,2 @@
+linux
+unix
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf
new file mode 100644
index 0000000..2323958
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf
@@ -0,0 +1,5 @@
+SYSTEM_HEADER_DIR="/tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/arm-linux-androideabi-4.4.x/sysroot${sysroot_headers_suffix}/usr/include"
+OTHER_FIXINCLUDES_DIRS=""
+FIXPROTO_DEFINES=""
+STMP_FIXPROTO=""
+STMP_FIXINC="stmp-fixinc"
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a
new file mode 100644
index 0000000..44557ee
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a
new file mode 100644
index 0000000..d92896d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o
new file mode 100644
index 0000000..fea15eb
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o
new file mode 100644
index 0000000..db18d05
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o
new file mode 100644
index 0000000..fea15eb
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o
new file mode 100644
index 0000000..9872cce
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o
new file mode 100644
index 0000000..9872cce
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a
new file mode 100644
index 0000000..8d185c9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a
new file mode 100644
index 0000000..328cd3b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a
new file mode 100644
index 0000000..869edc5
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a
new file mode 100644
index 0000000..7307c29
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la
new file mode 100755
index 0000000..81a4081
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la
@@ -0,0 +1,41 @@
+# libbfd.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libbfd.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=' '
+
+# Libraries that this one depends upon.
+dependency_libs=' -lz'
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libbfd.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/lib'
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a
new file mode 100644
index 0000000..c112efb
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a
new file mode 100644
index 0000000..920d478
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1
new file mode 100755
index 0000000..d91c1f5
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus
new file mode 100755
index 0000000..bdb9492
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2
new file mode 100755
index 0000000..d58cb31
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh
new file mode 100755
index 0000000..e73aed9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh
@@ -0,0 +1,498 @@
+#!/bin/sh
+#
+# Install modified versions of certain ANSI-incompatible system header
+# files which are fixed to work correctly with ANSI C and placed in a
+# directory that GCC will search.
+#
+# See README-fixinc for more information.
+#
+# fixincludes copyright (c) 1998, 1999, 2000, 2002, 2009
+# The Free Software Foundation, Inc.
+#
+# fixincludes is free software.
+#
+# You may redistribute it and/or modify it under the terms of the
+# GNU General Public License, as published by the Free Software
+# Foundation; either version 3, or (at your option) any later version.
+#
+# fixincludes is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with fixincludes; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+#
+# # # # # # # # # # # # # # # # # # # # #
+
+# Usage: fixinc.sh output-dir input-dir
+#
+# Directory in which to store the results.
+# Fail if no arg to specify a directory for the output.
+if [ "x$1" = "x" ]
+then
+ echo fixincludes: no output directory specified
+ exit 1
+fi
+
+LIB=${1}
+shift
+
+# Make sure it exists.
+if [ ! -d $LIB ]; then
+ mkdir $LIB || {
+ echo fixincludes: output dir '`'$LIB"' cannot be created"
+ exit 1
+ }
+else
+ ( cd $LIB && touch DONE && rm DONE ) || {
+ echo fixincludes: output dir '`'$LIB"' is an invalid directory"
+ exit 1
+ }
+fi
+
+if test -z "$VERBOSE"
+then
+ VERBOSE=2
+ export VERBOSE
+else
+ case "$VERBOSE" in
+ [0-9] ) : ;;
+ * ) VERBOSE=3 ;;
+ esac
+fi
+
+# Define what target system we're fixing.
+#
+if test -r ./Makefile; then
+ target_canonical="`sed -n -e 's,^target[ ]*=[ ]*\(.*\)$,\1,p' < Makefile`"
+fi
+
+# If not from the Makefile, then try config.guess
+#
+if test -z "${target_canonical}" ; then
+ if test -x ./config.guess ; then
+ target_canonical="`config.guess`" ; fi
+ test -z "${target_canonical}" && target_canonical=unknown
+fi
+export target_canonical
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# Define PWDCMD as a command to use to get the working dir
+# in the form that we want.
+PWDCMD=${PWDCMD-pwd}
+
+case "`$PWDCMD`" in
+//*)
+ # On an Apollo, discard everything before `/usr'.
+ PWDCMD="eval pwd | sed -e 's,.*/usr/,/usr/,'"
+ ;;
+esac
+
+# Original directory.
+ORIGDIR=`${PWDCMD}`
+export ORIGDIR
+FIXINCL=`${PWDCMD}`/fixincl
+if [ ! -x $FIXINCL ] ; then
+ echo "Cannot find fixincl" >&2
+ exit 1
+fi
+export FIXINCL
+
+# Make LIB absolute only if needed to avoid problems with the amd.
+case $LIB in
+/*)
+ ;;
+*)
+ cd $LIB; LIB=`${PWDCMD}`
+ ;;
+esac
+
+if test $VERBOSE -gt 0
+then echo Fixing headers into ${LIB} for ${target_canonical} target ; fi
+
+# Determine whether this system has symbolic links.
+if test -n "$DJDIR"; then
+ LINKS=false
+elif ln -s X $LIB/ShouldNotExist 2>/dev/null; then
+ rm -f $LIB/ShouldNotExist
+ LINKS=true
+elif ln -s X /tmp/ShouldNotExist 2>/dev/null; then
+ rm -f /tmp/ShouldNotExist
+ LINKS=true
+else
+ LINKS=false
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# In the file macro_list are listed all the predefined
+# macros that are not in the C89 reserved namespace (the reserved
+# namespace is all identifiers beginnning with two underscores or one
+# underscore followed by a capital letter). A regular expression to find
+# any of those macros in a header file is written to MN_NAME_PAT.
+#
+# Note dependency on ASCII. \012 = newline.
+# tr ' ' '\n' is, alas, not portable.
+
+if test -s ${MACRO_LIST}
+then
+ if test $VERBOSE -gt 0; then
+ echo "Forbidden identifiers: `tr '\012' ' ' < ${MACRO_LIST}`"
+ fi
+ MN_NAME_PAT="`sed 's/^/\\\\</; s/$/\\\\>/; $!s/$/|/' \
+ < ${MACRO_LIST} | tr -d '\012'`"
+ export MN_NAME_PAT
+else
+ if test $VERBOSE -gt 0
+ then echo "No forbidden identifiers defined by this target" ; fi
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# Search each input directory for broken header files.
+# This loop ends near the end of the file.
+#
+if test $# -eq 0
+then
+ INPUTLIST="/usr/include"
+else
+ INPUTLIST="$@"
+fi
+
+for INPUT in ${INPUTLIST} ; do
+
+cd ${ORIGDIR}
+
+# Make sure a directory exists before changing into it,
+# otherwise Solaris2 will fail-exit the script.
+#
+if [ ! -d ${INPUT} ]; then
+ continue
+fi
+cd ${INPUT}
+
+INPUT=`${PWDCMD}`
+export INPUT
+
+#
+# # # # # # # # # # # # # # # # # # # # #
+#
+if test $VERBOSE -gt 1
+then echo Finding directories and links to directories ; fi
+
+# Find all directories and all symlinks that point to directories.
+# Put the list in $all_dirs.
+# Each time we find a symlink, add it to newdirs
+# so that we do another find within the dir the link points to.
+# Note that $all_dirs may have duplicates in it;
+# later parts of this file are supposed to ignore them.
+dirs="."
+levels=2
+all_dirs=""
+search_dirs=""
+
+while [ -n "$dirs" ] && [ $levels -gt 0 ]
+do
+ levels=`expr $levels - 1`
+ newdirs=
+ for d in $dirs
+ do
+ if test $VERBOSE -gt 1
+ then echo " Searching $INPUT/$d" ; fi
+
+ # Find all directories under $d, relative to $d, excluding $d itself.
+ # (The /. is needed after $d in case $d is a symlink.)
+ all_dirs="$all_dirs `find $d/. -type d -print | \
+ sed -e '/\/\.$/d' -e 's@/./@/@g'`"
+ # Find all links to directories.
+ # Using `-exec test -d' in find fails on some systems,
+ # and trying to run test via sh fails on others,
+ # so this is the simplest alternative left.
+ # First find all the links, then test each one.
+ theselinks=
+ $LINKS && \
+ theselinks=`find $d/. -type l -print | sed -e 's@/./@/@g'`
+ for d1 in $theselinks --dummy--
+ do
+ # If the link points to a directory,
+ # add that dir to $newdirs
+ if [ -d $d1 ]
+ then
+ all_dirs="$all_dirs $d1"
+ if [ "`ls -ld $d1 | sed -n 's/.*-> //p'`" != "." ]
+ then
+ newdirs="$newdirs $d1"
+ search_dirs="$search_dirs $d1"
+ fi
+ fi
+ done
+ done
+
+ dirs="$newdirs"
+done
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+dirs=
+if test $VERBOSE -gt 2
+then echo "All directories (including links to directories):"
+ echo $all_dirs
+fi
+
+for file in $all_dirs; do
+ rm -rf $LIB/$file
+ if [ ! -d $LIB/$file ]
+ then mkdir $LIB/$file
+ fi
+done
+mkdir $LIB/root
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# treetops gets an alternating list
+# of old directories to copy
+# and the new directories to copy to.
+treetops=". ${LIB}"
+
+if $LINKS; then
+ if test $VERBOSE -gt 1
+ then echo 'Making symbolic directory links' ; fi
+ cwd=`${PWDCMD}`
+
+ for sym_link in $search_dirs; do
+ cd ${INPUT}
+ dest=`ls -ld ${sym_link} | sed -n 's/.*-> //p'`
+
+ # In case $dest is relative, get to ${sym_link}'s dir first.
+ #
+ cd ./`echo ${sym_link} | sed 's;/[^/]*$;;'`
+
+ # Check that the target directory exists.
+ # Redirections changed to avoid bug in sh on Ultrix.
+ #
+ (cd $dest) > /dev/null 2>&1
+ if [ $? = 0 ]; then
+ cd $dest
+
+ # full_dest_dir gets the dir that the link actually leads to.
+ #
+ full_dest_dir=`${PWDCMD}`
+
+ # Canonicalize ${INPUT} now to minimize the time an
+ # automounter has to change the result of ${PWDCMD}.
+ #
+ cinput=`cd ${INPUT}; ${PWDCMD}`
+
+ # If a link points to ., make a similar link to .
+ #
+ if [ ${full_dest_dir} = ${cinput} ]; then
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' . ': Making self link' ; fi
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s . ${LIB}/${sym_link} > /dev/null 2>&1
+
+ # If link leads back into ${INPUT},
+ # make a similar link here.
+ #
+ elif expr ${full_dest_dir} : "${cinput}/.*" > /dev/null; then
+ # Y gets the actual target dir name, relative to ${INPUT}.
+ y=`echo ${full_dest_dir} | sed -n "s&${cinput}/&&p"`
+ # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+ dots=`echo "${sym_link}" |
+ sed -e 's@^./@@' -e 's@/./@/@g' -e 's@[^/][^/]*@..@g' -e 's@..$@@'`
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' $dots$y ': Making local link' ; fi
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s $dots$y ${LIB}/${sym_link} > /dev/null 2>&1
+
+ else
+ # If the link is to a dir $target outside ${INPUT},
+ # repoint the link at ${INPUT}/root$target
+ # and process $target into ${INPUT}/root$target
+ # treat this directory as if it actually contained the files.
+ #
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' root${full_dest_dir} ': Making rooted link'
+ fi
+ if [ -d $LIB/root${full_dest_dir} ]
+ then true
+ else
+ dirname=root${full_dest_dir}/
+ dirmade=.
+ cd $LIB
+ while [ x$dirname != x ]; do
+ component=`echo $dirname | sed -e 's|/.*$||'`
+ mkdir $component >/dev/null 2>&1
+ cd $component
+ dirmade=$dirmade/$component
+ dirname=`echo $dirname | sed -e 's|[^/]*/||'`
+ done
+ fi
+
+ # Duplicate directory structure created in ${LIB}/${sym_link} in new
+ # root area.
+ #
+ for file2 in $all_dirs; do
+ case $file2 in
+ ${sym_link}/*)
+ dupdir=${LIB}/root${full_dest_dir}/`echo $file2 |
+ sed -n "s|^${sym_link}/||p"`
+ if test $VERBOSE -gt 2
+ then echo "Duplicating ${sym_link}'s ${dupdir}" ; fi
+ if [ -d ${dupdir} ]
+ then true
+ else
+ mkdir ${dupdir}
+ fi
+ ;;
+ *)
+ ;;
+ esac
+ done
+
+ # Get the path from ${LIB} to ${sym_link}, accounting for symlinks.
+ #
+ parent=`echo "${sym_link}" | sed -e 's@/[^/]*$@@'`
+ libabs=`cd ${LIB}; ${PWDCMD}`
+ file2=`cd ${LIB}; cd $parent; ${PWDCMD} | sed -e "s@^${libabs}@@"`
+
+ # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+ #
+ dots=`echo "$file2" | sed -e 's@/[^/]*@../@g'`
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s ${dots}root${full_dest_dir} ${LIB}/${sym_link} > /dev/null 2>&1
+ treetops="$treetops ${sym_link} ${LIB}/root${full_dest_dir}"
+ fi
+ fi
+ done
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+required=
+set x $treetops
+shift
+while [ $# != 0 ]; do
+ # $1 is an old directory to copy, and $2 is the new directory to copy to.
+ #
+ SRCDIR=`cd ${INPUT} ; cd $1 ; ${PWDCMD}`
+ export SRCDIR
+
+ FIND_BASE=$1
+ export FIND_BASE
+ shift
+
+ DESTDIR=`cd $1;${PWDCMD}`
+ export DESTDIR
+ shift
+
+ # The same dir can appear more than once in treetops.
+ # There's no need to scan it more than once.
+ #
+ if [ -f ${DESTDIR}/DONE ]
+ then continue ; fi
+
+ touch ${DESTDIR}/DONE
+ if test $VERBOSE -gt 1
+ then echo Fixing directory ${SRCDIR} into ${DESTDIR} ; fi
+
+ # Check files which are symlinks as well as those which are files.
+ #
+ cd ${INPUT}
+ required="$required `if $LINKS; then
+ find ${FIND_BASE}/. -name '*.h' \( -type f -o -type l \) -print
+ else
+ find ${FIND_BASE}/. -name '*.h' -type f -print
+ fi | \
+ sed -e 's;/\./;/;g' -e 's;//*;/;g' | \
+ ${FIXINCL}`"
+done
+
+## Make sure that any include files referenced using double quotes
+## exist in the fixed directory. This comes last since otherwise
+## we might end up deleting some of these files "because they don't
+## need any change."
+set x `echo $required`
+shift
+while [ $# != 0 ]; do
+ newreq=
+ while [ $# != 0 ]; do
+ # $1 is the directory to copy from,
+ # $2 is the unfixed file,
+ # $3 is the fixed file name.
+ #
+ cd ${INPUT}
+ cd $1
+ if [ -f $2 ] ; then
+ if [ -r $2 ] && [ ! -r $3 ]; then
+ cp $2 $3 >/dev/null 2>&1 || echo "Can't copy $2" >&2
+ chmod +w $3 2>/dev/null
+ chmod a+r $3 2>/dev/null
+ if test $VERBOSE -gt 2
+ then echo Copied $2 ; fi
+ for include in `egrep '^[ ]*#[ ]*include[ ]*"[^/]' $3 |
+ sed -e 's/^[ ]*#[ ]*include[ ]*"\([^"]*\)".*$/\1/'`
+ do
+ dir=`echo $2 | sed -e s'|/[^/]*$||'`
+ dir2=`echo $3 | sed -e s'|/[^/]*$||'`
+ newreq="$newreq $1 $dir/$include $dir2/$include"
+ done
+ fi
+ fi
+ shift; shift; shift
+ done
+ set x $newreq
+ shift
+done
+
+if test $VERBOSE -gt 2
+then echo 'Cleaning up DONE files.' ; fi
+cd $LIB
+# Look for files case-insensitively, for the benefit of
+# DOS/Windows filesystems.
+find . -name '[Dd][Oo][Nn][Ee]' -exec rm -f '{}' ';'
+
+if test $VERBOSE -gt 1
+then echo 'Cleaning up unneeded directories:' ; fi
+cd $LIB
+all_dirs=`find . -type d \! -name '.' -print | sort -r`
+for file in $all_dirs; do
+ if rmdir $LIB/$file > /dev/null
+ then
+ test $VERBOSE -gt 3 && echo " removed $file"
+ fi
+done 2> /dev/null
+
+# On systems which don't support symlinks, `find' may barf
+# if called with "-type l" predicate. So only use that if
+# we know we should look for symlinks.
+if $LINKS; then
+ test $VERBOSE -gt 2 && echo "Removing unused symlinks"
+
+ all_dirs=`find . -type l -print`
+ for file in $all_dirs
+ do
+ if test ! -d $file
+ then
+ rm -f $file
+ test $VERBOSE -gt 3 && echo " removed $file"
+ rmdir `dirname $file` > /dev/null && \
+ test $VERBOSE -gt 3 && \
+ echo " removed `dirname $file`"
+ fi
+ done 2> /dev/null
+fi
+
+if test $VERBOSE -gt 0
+then echo fixincludes is done ; fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# End of for INPUT directories
+#
+done
+#
+# # # # # # # # # # # # # # # # # # # # #
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl
new file mode 100755
index 0000000..79b04b6
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl
Binary files differ
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders
new file mode 100755
index 0000000..030a1bf
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders
@@ -0,0 +1,109 @@
+#!/bin/sh
+
+# Copyright (C) 2002, 2007, 2009 Free Software Foundation, Inc.
+
+#This file is part of GCC.
+
+#GCC is free software; you can redistribute it and/or modify it under
+#the terms of the GNU General Public License as published by the Free
+#Software Foundation; either version 3, or (at your option) any later
+#version.
+
+#GCC is distributed in the hope that it will be useful, but WITHOUT
+#ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+#FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+#for more details.
+
+#You should have received a copy of the GNU General Public License
+#along with GCC; see the file COPYING3. If not see
+#<http://www.gnu.org/licenses/>.
+
+# Basic information
+target=arm-unknown-linux-androideabi
+target_noncanonical=arm-linux-androideabi
+version=4.4.3
+
+VERBOSE=0
+while [ x$1 = x-v ] ; do
+ shift
+ VERBOSE=`expr $VERBOSE + 1`
+done
+export VERBOSE
+
+if [ x$1 = x--help ] ; then
+ echo "Usage: mkheaders [options] [prefix [isysroot]]"
+ echo "Options:"
+ echo " -v Print more output (may be repeated for even more output)"
+ echo " --help This help"
+ echo " --version Print version information"
+ exit 0
+fi
+
+if [ x$1 = x--version ] ; then
+ echo "mkheaders (GCC) version $version"
+ echo "Copyright 2002, 2007 Free Software Foundation, Inc."
+ echo "This program is free software; you may redistribute it under the"
+ echo "terms of the GNU General Public License. This program has"
+ echo "absolutely no warranty."
+ exit 0
+fi
+
+# Common prefix for installation directories.
+if [ x$1 != x ] ; then
+ prefix=$1
+ shift
+else
+ prefix=/usr/local
+fi
+
+# Allow for alternate isysroot in which to find headers
+if [ x$1 != x ] ; then
+ isysroot=$1
+ shift
+else
+ isysroot=
+fi
+
+# Directory in which to put host dependent programs and libraries
+exec_prefix=${prefix}
+# Directory in which to put the directories used by the compiler.
+libdir=${exec_prefix}/lib
+libexecdir=${exec_prefix}/libexec
+# Directory in which the compiler finds libraries, etc.
+libsubdir=${libdir}/gcc/${target_noncanonical}/${version}
+# Directory in which the compiler finds executables
+libexecsubdir=${libexecdir}/gcc/${target_noncanonical}/${version}
+
+itoolsdir=${libexecsubdir}/install-tools
+itoolsdatadir=${libsubdir}/install-tools
+incdir=${libsubdir}/include-fixed
+mkinstalldirs="/bin/sh ${itoolsdir}/mkinstalldirs"
+
+cd ${itoolsdir}
+rm -rf ${incdir}/*
+
+for ml in `cat ${itoolsdatadir}/fixinc_list`; do
+ sysroot_headers_suffix=`echo ${ml} | sed -e 's/;.*$//'`
+ multi_dir=`echo ${ml} | sed -e 's/^[^;]*;//'`
+ subincdir=${incdir}${multi_dir}
+ . ${itoolsdatadir}/mkheaders.conf
+ if [ x${STMP_FIXINC} != x ] ; then
+ TARGET_MACHINE="${target}" target_canonical="${target}" \
+ MACRO_LIST="${itoolsdatadir}/macro_list" \
+ /bin/sh ./fixinc.sh ${subincdir} \
+ ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
+ rm -f ${subincdir}/syslimits.h
+ if [ -f ${subincdir}/limits.h ]; then
+ mv ${subincdir}/limits.h ${subincdir}/syslimits.h
+ else
+ cp ${itoolsdatadir}/gsyslimits.h ${subincdir}/syslimits.h
+ fi
+ fi
+
+ cp ${itoolsdatadir}/include${multi_dir}/limits.h ${subincdir}
+
+ if [ x${STMP_FIXPROTO} != x ] ; then
+ export FIXPROTO_DEFINES mkinstalldirs
+ /bin/sh fixproto ${subincdir} ${subincdir} ${isysroot}${SYSTEM_HEADER_DIR} || exit 1
+ fi
+done
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs
new file mode 100755
index 0000000..259dbfc
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs
@@ -0,0 +1,158 @@
+#! /bin/sh
+# mkinstalldirs --- make directory hierarchy
+
+scriptversion=2005-06-29.22
+
+# Original author: Noah Friedman <friedman@prep.ai.mit.edu>
+# Created: 1993-05-16
+# Public domain.
+#
+# This file is maintained in Automake, please report
+# bugs to <bug-automake@gnu.org> or send patches to
+# <automake-patches@gnu.org>.
+
+errstatus=0
+dirmode=
+
+usage="\
+Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ...
+
+Create each directory DIR (with mode MODE, if specified), including all
+leading file name components.
+
+Report bugs to <bug-automake@gnu.org>."
+
+# process command line arguments
+while test $# -gt 0 ; do
+ case $1 in
+ -h | --help | --h*) # -h for help
+ echo "$usage"
+ exit $?
+ ;;
+ -m) # -m PERM arg
+ shift
+ test $# -eq 0 && { echo "$usage" 1>&2; exit 1; }
+ dirmode=$1
+ shift
+ ;;
+ --version)
+ echo "$0 $scriptversion"
+ exit $?
+ ;;
+ --) # stop option processing
+ shift
+ break
+ ;;
+ -*) # unknown option
+ echo "$usage" 1>&2
+ exit 1
+ ;;
+ *) # first non-opt arg
+ break
+ ;;
+ esac
+done
+
+for file
+do
+ if test -d "$file"; then
+ shift
+ else
+ break
+ fi
+done
+
+case $# in
+ 0) exit 0 ;;
+esac
+
+# Solaris 8's mkdir -p isn't thread-safe. If you mkdir -p a/b and
+# mkdir -p a/c at the same time, both will detect that a is missing,
+# one will create a, then the other will try to create a and die with
+# a "File exists" error. This is a problem when calling mkinstalldirs
+# from a parallel make. We use --version in the probe to restrict
+# ourselves to GNU mkdir, which is thread-safe.
+case $dirmode in
+ '')
+ if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then
+ echo "mkdir -p -- $*"
+ exec mkdir -p -- "$@"
+ else
+ # On NextStep and OpenStep, the `mkdir' command does not
+ # recognize any option. It will interpret all options as
+ # directories to create, and then abort because `.' already
+ # exists.
+ test -d ./-p && rmdir ./-p
+ test -d ./--version && rmdir ./--version
+ fi
+ ;;
+ *)
+ if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 &&
+ test ! -d ./--version; then
+ echo "mkdir -m $dirmode -p -- $*"
+ exec mkdir -m "$dirmode" -p -- "$@"
+ else
+ # Clean up after NextStep and OpenStep mkdir.
+ for d in ./-m ./-p ./--version "./$dirmode";
+ do
+ test -d $d && rmdir $d
+ done
+ fi
+ ;;
+esac
+
+for file
+do
+ case $file in
+ /*) pathcomp=/ ;;
+ *) pathcomp= ;;
+ esac
+ oIFS=$IFS
+ IFS=/
+ set fnord $file
+ shift
+ IFS=$oIFS
+
+ for d
+ do
+ test "x$d" = x && continue
+
+ pathcomp=$pathcomp$d
+ case $pathcomp in
+ -*) pathcomp=./$pathcomp ;;
+ esac
+
+ if test ! -d "$pathcomp"; then
+ echo "mkdir $pathcomp"
+
+ mkdir "$pathcomp" || lasterr=$?
+
+ if test ! -d "$pathcomp"; then
+ errstatus=$lasterr
+ else
+ if test ! -z "$dirmode"; then
+ echo "chmod $dirmode $pathcomp"
+ lasterr=
+ chmod "$dirmode" "$pathcomp" || lasterr=$?
+
+ if test ! -z "$lasterr"; then
+ errstatus=$lasterr
+ fi
+ fi
+ fi
+ fi
+
+ pathcomp=$pathcomp/
+ done
+done
+
+exit $errstatus
+
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1
new file mode 100644
index 0000000..8626758
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1
@@ -0,0 +1,974 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. | will give a
+.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "CPP 1"
+.TH CPP 1 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+cpp \- The C Preprocessor
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+cpp [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-iquote\fR\fIdir\fR...]
+ [\fB\-W\fR\fIwarn\fR...]
+ [\fB\-M\fR|\fB\-MM\fR] [\fB\-MG\fR] [\fB\-MF\fR \fIfilename\fR]
+ [\fB\-MP\fR] [\fB\-MQ\fR \fItarget\fR...]
+ [\fB\-MT\fR \fItarget\fR...]
+ [\fB\-P\fR] [\fB\-fno\-working\-directory\fR]
+ [\fB\-x\fR \fIlanguage\fR] [\fB\-std=\fR\fIstandard\fR]
+ \fIinfile\fR \fIoutfile\fR
+.PP
+Only the most useful options are listed here; see below for the remainder.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The C preprocessor, often known as \fIcpp\fR, is a \fImacro processor\fR
+that is used automatically by the C compiler to transform your program
+before compilation. It is called a macro processor because it allows
+you to define \fImacros\fR, which are brief abbreviations for longer
+constructs.
+.PP
+The C preprocessor is intended to be used only with C, \*(C+, and
+Objective-C source code. In the past, it has been abused as a general
+text processor. It will choke on input which does not obey C's lexical
+rules. For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors. Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C\-family languages. If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+.PP
+Having said that, you can often get away with using cpp on things which
+are not C. Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution. \fB\-traditional\-cpp\fR
+mode preserves more white space, and is otherwise more permissive. Many
+of the problems can be avoided by writing C or \*(C+ style comments
+instead of native language comments, and keeping macros simple.
+.PP
+Wherever possible, you should use a preprocessor geared to the language
+you are writing in. Modern versions of the \s-1GNU\s0 assembler have macro
+facilities. Most high level programming languages have their own
+conditional compilation and inclusion mechanism. If all else fails,
+try a true general text processor, such as \s-1GNU\s0 M4.
+.PP
+C preprocessors vary in some details. This manual discusses the \s-1GNU\s0 C
+preprocessor, which provides a small superset of the features of \s-1ISO\s0
+Standard C. In its default mode, the \s-1GNU\s0 C preprocessor does not do a
+few things required by the standard. These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them. To get strict \s-1ISO\s0 Standard C,
+you should use the \fB\-std=c89\fR or \fB\-std=c99\fR options, depending
+on which version of the standard you want. To get all the mandatory
+diagnostics, you must also use \fB\-pedantic\fR.
+.PP
+This manual describes the behavior of the \s-1ISO\s0 preprocessor. To
+minimize gratuitous differences, where the \s-1ISO\s0 preprocessor's
+behavior does not conflict with traditional semantics, the
+traditional preprocessor should behave the same way. The various
+differences that do exist are detailed in the section \fBTraditional
+Mode\fR.
+.PP
+For clarity, unless noted otherwise, references to \fB\s-1CPP\s0\fR in this
+manual refer to \s-1GNU\s0 \s-1CPP\s0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The C preprocessor expects two file names as arguments, \fIinfile\fR and
+\&\fIoutfile\fR. The preprocessor reads \fIinfile\fR together with any
+other files it specifies with \fB#include\fR. All the output generated
+by the combined input files is written in \fIoutfile\fR.
+.PP
+Either \fIinfile\fR or \fIoutfile\fR may be \fB\-\fR, which as
+\&\fIinfile\fR means to read from standard input and as \fIoutfile\fR
+means to write to standard output. Also, if either file is omitted, it
+means the same as if \fB\-\fR had been specified for that file.
+.PP
+Unless otherwise noted, or the option ends in \fB=\fR, all options
+which take an argument may have that argument appear either immediately
+after the option, or with a space between option and argument:
+\&\fB\-Ifoo\fR and \fB\-I foo\fR have the same effect.
+.PP
+Many options have multi-letter names; therefore multiple single-letter
+options may \fInot\fR be grouped: \fB\-dM\fR is very different from
+\&\fB\-d\ \-M\fR.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+.Sp
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+.Ve
+.Sp
+.Vb 1
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+.Sp
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp -dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as \s-1MS\-DOS\s0.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes the environment variables that affect how \s-1CPP\s0
+operates. You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-I\fR, and control dependency output with options like
+\&\fB\-M\fR. These take precedence over
+environment variables, which in turn take precedence over the
+configuration of \s-1GCC\s0.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIcpp\fR, \fIgcc\fR, and
+\&\fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
+1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation. A copy of
+the license is included in the
+man page \fIgfdl\fR\|(7).
+This manual contains no Invariant Sections. The Front-Cover Texts are
+(a) (see below), and the Back-Cover Texts are (b) (see below).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1
new file mode 100644
index 0000000..709140f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1
@@ -0,0 +1,15828 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. | will give a
+.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+ [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+ [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+ [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+ [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking. The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage. For example, the \fB\-c\fR option
+says not to run the linker. Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing. Some options
+control the preprocessor and others the compiler itself. Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly. If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands. Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments. For the most part, the order
+you use doesn't matter. Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified. Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.Sh "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type. Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-no\-canonical\-prefixes
+\&\-pipe \-pass\-exit\-codes
+\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]] \fB\-\-target\-help
+\&\-\-version \-wrapper@\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
+\&\-aux\-info\fR \fIfilename\fR
+\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
+\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
+\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
+\&\-fallow\-single\-precision \-fcond\-mismatch \-flax\-vector\-conversions
+\&\-fsigned\-bitfields \-fsigned\-char
+\&\-funsigned\-bitfields \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
+\&\-fconserve\-space \-ffriend\-injection
+\&\-fno\-elide\-constructors
+\&\-fno\-enforce\-eh\-specs
+\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
+\&\-fno\-implicit\-templates
+\&\-fno\-implicit\-inline\-templates
+\&\-fno\-implement\-inlines \-fms\-extensions
+\&\-fno\-nonansi\-builtins \-fno\-operator\-names
+\&\-fno\-optional\-diags \-fpermissive
+\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
+\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
+\&\-fvisibility\-ms\-compat
+\&\-Wabi \-Wctor\-dtor\-privacy
+\&\-Wnon\-virtual\-dtor \-Wreorder
+\&\-Weffc++ \-Wstrict\-null\-sentinel
+\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
+\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
+\&\fB\-fgnu\-runtime \-fnext\-runtime
+\&\-fno\-nil\-receivers
+\&\-fobjc\-call\-cxx\-cdtors
+\&\-fobjc\-direct\-dispatch
+\&\-fobjc\-exceptions
+\&\-fobjc\-gc
+\&\-freplace\-objc\-classes
+\&\-fzero\-link
+\&\-gen\-decls
+\&\-Wassign\-intercept
+\&\-Wno\-protocol \-Wselector
+\&\-Wstrict\-selector\-match
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
+\&\fB\-fdiagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
+\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Warray\-bounds
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align \-Wcast\-qual
+\&\-Wchar\-subscripts \-Wclobbered \-Wcomment
+\&\-Wconversion \-Wcoverage\-mismatch \-Wno\-deprecated
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization
+\&\-Wno\-div\-by\-zero \-Wempty\-body \-Wenum\-compare \-Wno\-endif\-labels
+\&\-Werror \-Werror=*
+\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral
+\&\-Wformat\-security \-Wformat\-y2k
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wignored\-qualifiers
+\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
+\&\-Winit\-self \-Winline
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations
+\&\-Wlogical\-op \-Wlong\-long
+\&\-Wmain \-Wmaybe\-uninitialized \-Wmissing\-braces \-Wmissing\-field\-initializers
+\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
+\&\-Wmissing\-noreturn \-Wno\-mudflap
+\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow \-Wconversion\-null
+\&\-Woverlength\-strings \-Wpacked \-Wpacked\-bitfield\-compat \-Wpadded
+\&\-Wparentheses \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format
+\&\-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
+\&\-Wreal\-conversion \-Wredundant\-decls
+\&\-Wreturn\-type \-Wripa\-opt\-mismatch \-Wself\-assign \-Wself\-assign\-non\-pod
+\&\-Wsequence\-point \-Wshadow \-Wshadow\-compatible\-local \-Wshadow\-local
+\&\-Wsign\-compare \-Wsign\-conversion \-Wstack\-protector
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
+\&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum \-Wsync\-nand
+\&\-Wsystem\-headers \-Wtrigraphs \-Wtype\-limits \-Wundef \-Wuninitialized
+\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
+\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
+\&\-Wunused\-value \-Wunused\-variable
+\&\-Wvariadic\-macros \-Wvla
+\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
+\&\-Wmissing\-parameter\-type \-Wmissing\-prototypes \-Wnested\-externs
+\&\-Wold\-style\-declaration \-Wold\-style\-definition
+\&\-Wstrict\-prototypes \-Wtraditional \-Wtraditional\-conversion
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
+\&\-fdump\-statistics
+\&\-fdump\-tree\-all
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
+\&\-fdump\-tree\-ch
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
+\&\-fdump\-tree\-sink
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
+\&\-fenable\-icf\-debug
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose
+\&\-ftest\-coverage \-ftime\-report \-fvar\-tracking
+\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
+\&\-ggdb \-gmlt \-gstabs \-gstabs+ \-gstrict\-dwarf \-gno\-strict\-dwarf
+\&\-gvms \-gxcoff \-gxcoff+
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]
+\&\fB\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
+\&\-print\-multi\-directory \-print\-multi\-lib
+\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix
+\&\-save\-temps \-time\fR
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves
+\&\-fcgraph\-section \-fcheck\-data\-deps
+\&\-fconserve\-stack \-fcprop\-registers \-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules \-fcx\-limited\-range
+\&\-fdata\-sections \-fdce \-fdce
+\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fdse \-fdse
+\&\-fearly\-inlining \-fexpensive\-optimizations \-ffast\-math
+\&\-ffinite\-math\-only \-ffloat\-store \-fforward\-propagate
+\&\-ffunction\-sections \-ffvpt \-ffvpt\-functions=\fR\fIffvptfunctions\fR \fB\-fgcse
+\&\-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg \-fipa\-pta
+\&\-fipa\-pure\-const \-fipa\-reference \-fipa\-struct\-reorg
+\&\-fipa\-type\-escape \-fira\-algorithm=\fR\fIalgorithm\fR
+\&\fB\-fira\-region=\fR\fIregion\fR \fB\-fira\-coalesce \-fno\-ira\-share\-save\-slots
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts
+\&\-floop\-block \-floop\-interchange \-floop\-strip\-mine
+\&\-fmerge\-all\-constants \-fmerge\-constants \-fmodulo\-sched
+\&\-fmodulo\-sched\-allow\-regmoves \-fmove\-loop\-invariants \-fmudflap
+\&\-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg \-fno\-default\-inline
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls
+\&\-fpeel\-loops \-fpredictive\-commoning \-fprefetch\-loop\-arrays
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate
+\&\-fprofile\-generate=\fR\fIpath\fR \fB\-fprofile\-generate\-sampling
+\&\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values
+\&\-fpmu\-profile\-generate=\fR\fIpmuoption\fR
+\&\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR
+\&\fB\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops
+\&\-fripa \-fripa\-disallow\-asm\-modules \-fripa\-disallow\-opt\-mismatch
+\&\-fripa\-no\-promote\-always\-inline\-func \-fripa\-verbose
+\&\-frounding\-math \-fsample\-profile \-fsample\-profile\-aggregate\-using
+\&\-fsample\-profile\-use\-entry \-fsched2\-use\-superblocks
+\&\-fsched2\-use\-traces \-fsched\-spec\-load \-fsched\-spec\-load\-dangerous
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB]
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors \-fsee
+\&\-fselective\-scheduling \-fselective\-scheduling2
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop
+\&\-ftree\-copyrename \-ftree\-dce
+\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-fre \-ftree\-loop\-im
+\&\-ftree\-loop\-distribution
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize
+\&\-ftree\-lr\-shrinking
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-reassoc
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb
+\&\-fwhole\-program \-frecord\-options\-in\-elf \-fuse\-ld
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
+\&\fB\-C \-dD \-dI \-dM \-dN
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
+\&\-idirafter\fR \fIdir\fR
+\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
+\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
+\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
+\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
+\&\-P \-fworking\-directory \-remap
+\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
+\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
+\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
+\&\-T\fR \fIscript\fR \fB\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
+\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
+.IP "\fITarget Options\fR" 4
+.IX Item "Target Options"
+\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB \-EL
+\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
+\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame \-mno\-apcs\-frame
+\&\-mabi=\fR\fIname\fR
+\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
+\&\-mapcs\-float \-mno\-apcs\-float
+\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
+\&\-msched\-prolog \-mno\-sched\-prolog
+\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
+\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
+\&\-mthumb\-interwork \-mno\-thumb\-interwork
+\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
+\&\fB\-mabort\-on\-noreturn
+\&\-mlong\-calls \-mno\-long\-calls
+\&\-msingle\-pic\-base \-mno\-single\-pic\-base
+\&\-mpic\-register=\fR\fIreg\fR
+\&\fB\-mnop\-fun\-dllimport
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
+\&\-mpoke\-function\-name
+\&\-mthumb \-marm
+\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
+\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
+\&\-mtp=\fR\fIname\fR
+\&\fB\-mword\-relocations
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-mno\-interrupts
+\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]
+\&\fB\-msim \-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
+\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
+\&\-mlow\-64k \-mno\-low64k \-mstack\-check\-l1 \-mid\-shared\-library
+\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
+\&\fB\-mleaf\-id\-shared\-library \-mno\-leaf\-id\-shared\-library
+\&\-msep\-data \-mno\-sep\-data \-mlong\-calls \-mno\-long\-calls
+\&\-mfast\-fp \-minline\-plt \-mmulticore \-mcorea \-mcoreb \-msdram
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
+\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
+\&\-mstack\-align \-mdata\-align \-mconst\-align
+\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
+\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
+\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
+\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
+\&\-client_name \-compatibility_version \-current_version
+\&\-dead_strip
+\&\-dependency\-file \-dylib_file \-dylinker_install_name
+\&\-dynamic \-dynamiclib \-exported_symbols_list
+\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
+\&\-force_flat_namespace \-headerpad_max_install_names
+\&\-iframework
+\&\-image_base \-init \-install_name \-keep_private_externs
+\&\-multi_module \-multiply_defined \-multiply_defined_unused
+\&\-noall_load \-no_dead_strip_inits_and_terms
+\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
+\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
+\&\-private_bundle \-read_only_relocs \-sectalign
+\&\-sectobjectsymbols \-whyload \-seg1addr
+\&\-sectcreate \-sectobjectsymbols \-sectorder
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
+\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
+\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
+\&\-single_module \-static \-sub_library \-sub_umbrella
+\&\-twolevel_namespace \-umbrella \-undefined
+\&\-unexported_symbols_list \-weak_reference_mismatches
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
+\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
+\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
+\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
+\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mbwx \-mmax \-mfix \-mcix
+\&\-mfloat\-vax \-mfloat\-ieee
+\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
+\&\-msmall\-text \-mlarge\-text
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
+\&\-mhard\-float \-msoft\-float
+\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
+\&\-mdouble \-mno\-double
+\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
+\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
+\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
+\&\-mlibrary\-pic \-macc\-4 \-macc\-8
+\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
+\&\-moptimize\-membar \-mno\-optimize\-membar
+\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
+\&\-mvliw\-branch \-mno\-vliw\-branch
+\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
+\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
+\&\-mTLS \-mtls
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR
+\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
+\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
+\&\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
+\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
+\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
+\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
+\&\-mno\-portable\-runtime \-mno\-soft\-float
+\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
+\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
+\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
+\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mfpmath=\fR\fIunit\fR
+\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
+\&\-mno\-fp\-ret\-in\-387 \-msoft\-float
+\&\-mno\-wide\-multiply \-mrtd \-malign\-double
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mrecip
+\&\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx
+\&\-maes \-mpclmul
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-msse5 \-mlwp
+\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
+\&\-minline\-stringops\-dynamically \-minline\-compares
+\&\-mstringop\-strategy=\fR\fIalg\fR \fB\-mpush\-args \-maccumulate\-outgoing\-args
+\&\-m128bit\-long\-double \-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
+\&\-mveclibabi=\fR\fItype\fR \fB\-mpc32 \-mpc64 \-mpc80 \-mstackrealign
+\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR
+\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
+\&\fB\-mfused\-madd \-mno\-fused\-madd \-msse2avx\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
+\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
+\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
+\&\-minline\-float\-divide\-max\-throughput
+\&\-minline\-int\-divide\-min\-latency
+\&\-minline\-int\-divide\-max\-throughput
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
+\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
+\&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
+\&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
+\&\-mno\-sched\-prefer\-non\-data\-spec\-insns
+\&\-mno\-sched\-prefer\-non\-control\-spec\-insns
+\&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r
+\&\-mdebug
+\&\-malign\-loops \-mno\-align\-loops
+\&\-missue\-rate=\fR\fInumber\fR
+\&\fB\-mbranch\-cost=\fR\fInumber\fR
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
+\&\fB\-msdata=\fR\fIsdata-type\fR
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR \fB\-mcpu=\fR\fIcpu\fR \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
+\&\-m68060 \-mcpu32 \-m5200 \-m5206e \-m528x \-m5307 \-m5407
+\&\-mcfv4e \-mbitfield \-mno\-bitfield \-mc68000 \-mc68020
+\&\-mnobitfield \-mrtd \-mno\-rtd \-mdiv \-mno\-div \-mshort
+\&\-mno\-short \-mhard\-float \-m68881 \-msoft\-float \-mpcrel
+\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
+\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
+\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
+\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
+\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
+\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
+\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
+\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2
+\&\-mips64 \-mips64r2
+\&\-mips16 \-mno\-mips16 \-mflip\-mips16
+\&\-minterlink\-mips16 \-mno\-interlink\-mips16
+\&\-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
+\&\-mshared \-mno\-shared \-mplt \-mno\-plt \-mxgot \-mno\-xgot
+\&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
+\&\-msingle\-float \-mdouble\-float \-mdsp \-mno\-dsp \-mdspr2 \-mno\-dspr2
+\&\-mfpu=\fR\fIfpu-type\fR
+\&\fB\-msmartmips \-mno\-smartmips
+\&\-mpaired\-single \-mno\-paired\-single \-mdmx \-mno\-mdmx
+\&\-mips3d \-mno\-mips3d \-mmt \-mno\-mt \-mllsc \-mno\-llsc
+\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
+\&\-G\fR\fInum\fR \fB\-mlocal\-sdata \-mno\-local\-sdata
+\&\-mextern\-sdata \-mno\-extern\-sdata \-mgpopt \-mno\-gopt
+\&\-membedded\-data \-mno\-embedded\-data
+\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
+\&\-mcode\-readable=\fR\fIsetting\fR
+\&\fB\-msplit\-addresses \-mno\-split\-addresses
+\&\-mexplicit\-relocs \-mno\-explicit\-relocs
+\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
+\&\-mdivide\-traps \-mdivide\-breaks
+\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
+\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
+\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
+\&\-mfix\-r10000 \-mno\-fix\-r10000 \-mfix\-vr4120 \-mno\-fix\-vr4120
+\&\-mfix\-vr4130 \-mno\-fix\-vr4130 \-mfix\-sb1 \-mno\-fix\-sb1
+\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
+\&\-mbranch\-cost=\fR\fInum\fR \fB\-mbranch\-likely \-mno\-branch\-likely
+\&\-mfp\-exceptions \-mno\-fp\-exceptions
+\&\-mvr4130\-align \-mno\-vr4130\-align\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
+\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
+\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
+\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug \-mno\-mult\-bug
+\&\-mam33 \-mno\-am33
+\&\-mam33\-2 \-mno\-am33\-2
+\&\-mreturn\-pointer\-on\-d0
+\&\-mno\-crt0 \-mrelax\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
+\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
+\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
+\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
+\&\-mbranch\-expensive \-mbranch\-cheap
+\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
+\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
+\&\-maltivec \-mno\-altivec
+\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
+\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
+\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mnew\-mnemonics \-mold\-mnemonics
+\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
+\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
+\&\-malign\-power \-malign\-natural
+\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu
+\&\-mstring \-mno\-string \-mupdate \-mno\-update
+\&\-mavoid\-indexed\-addresses \-mno\-avoid\-indexed\-addresses
+\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
+\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
+\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
+\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
+\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
+\&\fB\-mcall\-sysv \-mcall\-netbsd
+\&\-maix\-struct\-return \-msvr4\-struct\-return
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
+\&\-misel \-mno\-isel
+\&\-misel=yes \-misel=no
+\&\-mspe \-mno\-spe
+\&\-mspe=yes \-mspe=no
+\&\-mpaired
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode
+\&\-mvrsave \-mno\-vrsave
+\&\-mmulhw \-mno\-mulhw
+\&\-mdlmzb \-mno\-dlmzb
+\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
+\&\-mprototype \-mno\-prototype
+\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
+\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mhard\-float \-msoft\-float \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mlong\-double\-64 \-mlong\-double\-128
+\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
+\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
+\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
+\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
+\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel
+\&\-mnhwloop
+\&\-muls
+\&\-mmac
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
+\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
+\&\-m5\-64media \-m5\-64media\-nofpu
+\&\-m5\-32media \-m5\-32media\-nofpu
+\&\-m5\-compact \-m5\-compact\-nofpu
+\&\-mb \-ml \-mdalign \-mrelax
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
+\&\-mieee \-mbitops \-misize \-minline\-ic_invalidate \-mpadstruct \-mspace
+\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
+\&\-minvalid\-symbols\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mcmodel=\fR\fIcode-model\fR
+\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
+\&\-mfaster\-structs \-mno\-faster\-structs
+\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
+\&\-mhard\-quad\-float \-msoft\-quad\-float
+\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
+\&\-mstack\-bias \-mno\-stack\-bias
+\&\-munaligned\-doubles \-mno\-unaligned\-doubles
+\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc
+\&\-msafe\-dma \-munsafe\-dma
+\&\-mbranch\-hints
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain
+\&\-mfixed\-range=\fR\fIregister-range\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
+\&\-mprolog\-function \-mno\-prolog\-function \-mspace
+\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
+\&\fB\-mapp\-regs \-mno\-app\-regs
+\&\-mdisable\-callt \-mno\-disable\-callt
+\&\-mv850e1
+\&\-mv850e
+\&\-mv850 \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg \-mgnu \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp \-non\-static \-Bstatic \-Bdynamic
+\&\-Xbind\-lazy \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread \-mwin32 \-mwindows\fR
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16
+\&\-mfused\-madd \-mno\-fused\-madd
+\&\-mserialize\-volatile \-mno\-serialize\-volatile
+\&\-mtext\-section\-literals \-mno\-text\-section\-literals
+\&\-mtarget\-align \-mno\-target\-align
+\&\-mlongcalls \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
+\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
+\&\-fnon\-call\-exceptions \-funwind\-tables
+\&\-fasynchronous\-unwind\-tables
+\&\-finhibit\-size\-directive \-finstrument\-functions
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...
+\&\-fno\-common \-fno\-ident
+\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
+\&\-fno\-jump\-tables
+\&\-frecord\-gcc\-switches
+\&\-freg\-struct\-return \-fshort\-enums
+\&\-fshort\-double \-fshort\-wchar
+\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
+\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
+\&\fB\-fno\-stack\-limit \-fargument\-alias \-fargument\-noalias
+\&\-fargument\-noalias\-global \-fargument\-noalias\-anything
+\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
+\&\fB\-ftrapv \-fwrapv \-fbounds\-check
+\&\-fvisibility\fR
+.Sh "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header.
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR. Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration). Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body). Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix). This option applies to all following input files until
+the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 8
+\& c c-header c-cpp-output
+\& c++ c++-header c++-cpp-output
+\& objective-c objective-c-header objective-c-cpp-output
+\& objective-c++ objective-c++-header objective-c++-cpp-output
+\& assembler assembler-with-cpp
+\& ada
+\& f77 f77-cpp-input f95 f95-cpp-input
+\& java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code. If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication. The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop. Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link. The linking
+stage simply is not done. The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble. The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper. The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR. This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation. Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and all command
+arguments are quoted. This is useful for shell scripts to capture the
+driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation. This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-combine\fR" 4
+.IX Item "-combine"
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
+language for which this is supported is C. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with \fB\-save\-temps\fR, the compiler will generate multiple
+pre-processed files
+(one for each source file), but only one (combined) \fI.o\fR or
+\&\fI.s\fR file.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept. If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool. For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers. These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options. Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed. This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\& --help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\& --help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display. One
+case where it does work however is when one of the classes is
+\&\fItarget\fR. So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\& --help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line. Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed. Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\& % gcc -Q -mabi=2 --help=target -c
+\& The following options are target specific:
+\& -mabi= 2
+\& -mabort-on-noreturn [disabled]
+\& -mapcs [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\& -Q -O2 --help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\& gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+\& gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+\& diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program. It takes a single
+comma separated list as an argument, which will be used to invoke
+the wrapper:
+.Sp
+.Vb 1
+\& gcc -c t.c -wrapper gdb,--args
+.Ve
+.Sp
+This will invoke all subprograms of gcc under \*(L"gdb \-\-args\*(R",
+thus cc1 invocation will be \*(L"gdb \-\-args cc1 ...\*(R".
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler. The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.Sh "Compiling \*(C+ Programs"
+.IX Subsection "Compiling Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library. This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations. On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.Sh "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c89\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using. It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR. Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously. For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used. Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard. This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc89\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu89\fR or \fBgnu++98\fR. By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it. For example,
+\&\fB\-std=c89\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected. The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu89 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.PD 0
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.4/c99status.html\fR> for more information. The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default. The name \fBgnu9x\fR is deprecated.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+ This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3. In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode. Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior). This option was first supported in
+\&\s-1GCC\s0 4.3. This option is not supported in C89 or gnu89 mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files. This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character). In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers. You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops. The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library. In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function. For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored. There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\& #define abs(n) __builtin_abs ((n))
+\& #define strcpy(d, s) __builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment. This implies
+\&\fB\-fbuiltin\fR. A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment. This
+implies \fB\-fno\-builtin\fR. A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>. This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling. This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option. The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling. The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler. They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments. The value of such an expression is void. This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types. This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for. This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR. Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.Sh "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in. For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\& g++ -g -frepo -O -c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking. This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated. This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option. In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does. This saves space in the executable at the
+cost of not diagnosing duplicate definitions. If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\& template <class T> auto forward(T t) -> decltype (realfn (t))
+\& {
+\& return realfn (t);
+\& }
+.Ve
+.Sp
+.Vb 4
+\& void f()
+\& {
+\& forward({1,2}); // call forward<std::initializer_list<int>>
+\& }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup. This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime. This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR. This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue. Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings. Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time. This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
+of the language, you can save some space by using this flag. Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth-n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17.
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread\-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal. When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available. This
+option exists only for testing, and should not be used by end\-users;
+it will result in inferior code and has no benefits. This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories. (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+ Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective\-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C, and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code. There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities at this point include:
+.RS 4
+.IP "*" 4
+Incorrect handling of tail-padding for bit\-fields. G++ may attempt to
+pack data into the same byte as a base class. For example:
+.Sp
+.Vb 2
+\& struct A { virtual void f(); int f1 : 1; };
+\& struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "*" 4
+Incorrect handling of tail-padding for virtual bases. G++ does not use
+tail padding when laying out virtual bases. For example:
+.Sp
+.Vb 3
+\& struct A { virtual void f(); char c1; };
+\& struct B { B(); char c2; };
+\& struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "*" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union. For
+example:
+.Sp
+.Vb 1
+\& union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "*" 4
+Empty classes can be placed at incorrect offsets. For example:
+.Sp
+.Vb 1
+\& struct A {};
+.Ve
+.Sp
+.Vb 4
+\& struct B {
+\& A a;
+\& virtual void f ();
+\& };
+.Ve
+.Sp
+.Vb 1
+\& struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero. G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "*" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\& template <typename Q>
+\& void f(typename Q::X) {}
+.Ve
+.Sp
+.Vb 2
+\& template <template <typename> class Q>
+\& void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes. The known psABI changes at this
+point include:
+.IP "*" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI. For example:
+.Sp
+.Vb 4
+\& union U {
+\& long double ld;
+\& int i;
+\& };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed. For instance:
+.Sp
+.Vb 5
+\& struct A {
+\& int i;
+\& int j;
+\& A(): j (0), i (1) { }
+\& };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect. This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "*" 4
+Item 11: Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "*" 4
+Item 12: Prefer initialization to assignment in constructors.
+.IP "*" 4
+Item 14: Make destructors virtual in base classes.
+.IP "*" 4
+Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "*" 4
+Item 23: Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "*" 4
+Item 6: Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "*" 4
+Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer. But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template. Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function. (Section
+14.5.3). Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function. Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class. For example, in:
+.Sp
+.Vb 3
+\& struct A {
+\& virtual void f();
+\& };
+.Ve
+.Sp
+.Vb 3
+\& struct B: public A {
+\& void f(int);
+\& };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\& B* b;
+\& b->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size. Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\& struct A {
+\& operator int ();
+\& A& operator = (int);
+\& };
+.Ve
+.Sp
+.Vb 5
+\& main ()
+\& {
+\& A a,b;
+\& a = b;
+\& }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.Sh "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves. See
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\& gcc -g -fgnu-runtime -O -c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime. This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime. This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (e.g.,
+\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
+is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
+to be used. Currently, this option is only available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
+thusly generated will only operate on instance variables declared in the
+current Objective-C class, and not those inherited from superclasses. It
+is the responsibility of the Objective-C runtime to invoke all such methods
+in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
+will be invoked by the runtime immediately after a new object
+instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
+be invoked immediately before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher. On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in Objective\-C,
+similar to what is offered by \*(C+ and Java. This option is
+unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
+earlier.
+.Sp
+.Vb 23
+\& @try {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+\& @catch (AnObjCClass *exc) {
+\& ...
+\& @throw expr;
+\& ...
+\& @throw;
+\& ...
+\& }
+\& @catch (AnotherClass *exc) {
+\& ...
+\& }
+\& @catch (id allOthers) {
+\& ...
+\& }
+\& @finally {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+.Ve
+.Sp
+The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
+Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
+\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
+the object caught by the \f(CW@catch\fR will be rethrown.
+.Sp
+Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme. When an object is thrown, it will be caught
+by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
+analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
+\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
+any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
+clauses (if any).
+.Sp
+The \f(CW@finally\fR clause, if present, will be executed upon exit from the
+immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
+regardless of whether any exceptions are thrown, caught or rethrown
+inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
+of the \f(CW\*(C`finally\*(C'\fR clause in Java.
+.Sp
+There are several caveats to using the new exception mechanism:
+.RS 4
+.IP "*" 4
+Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
+idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
+exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
+systems, due to additional functionality needed in the (NeXT) Objective-C
+runtime.
+.IP "*" 4
+As mentioned above, the new exceptions do not support handling
+types other than Objective-C objects. Furthermore, when used from
+Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
+exceptions at this time. This means you cannot \f(CW@throw\fR an exception
+from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
+(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
+.RE
+.RS 4
+.Sp
+The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
+blocks for thread-safe execution:
+.Sp
+.Vb 3
+\& @synchronized (ObjCClass *guard) {
+\& ...
+\& }
+.Ve
+.Sp
+Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
+first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
+object by another thread. If it has, the current thread shall wait until
+the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
+the current thread will place its own lock on it, execute the code contained in
+the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
+making \f(CW\*(C`guard\*(C'\fR available to other threads).
+.Sp
+Unlike Java, Objective-C does not allow for entire methods to be marked
+\&\f(CW@synchronized\fR. Note that throwing exceptions out of
+\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
+to be unlocked properly.
+.RE
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead. This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself. Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained. This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class. The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation. The check is performed on the list of methods
+in the final stage of compilation. Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation. Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found. A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section. This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation. This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.Sh "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...). The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported. Right now, only the \*(C+ front end can
+honor these options. However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode. Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines. This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode. Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fdiagnostics\-show\-option\fR" 4
+.IX Item "-fdiagnostics-show-option"
+This option instructs the diagnostic machinery to add text to each
+diagnostic emitted, which indicates which command line option directly
+controls that diagnostic, when such an option is known to the
+diagnostic machinery.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information. By default, this warning is enabled and is treated as an
+error. \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error. Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code\-base.
+Completely disabling the warning is not recommended.
+.Sh "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error. The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors. This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
+option to have each controllable warning amended with the option which
+controls it, to determine what to use with this option.
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations. Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR. This manual lists only one of the
+two forms, whichever is not the default. For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well. With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance. They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR. We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based. Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard. (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros. This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)
+\&\fB\-Wc++0x\-compat
+\&\-Wchar\-subscripts
+\&\-Wimplicit\-int
+\&\-Wimplicit\-function\-declaration
+\&\-Wcomment
+\&\-Wformat
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)
+\&\fB\-Wmaybe\-uninitialized
+\&\-Wmissing\-braces
+\&\-Wnonnull
+\&\-Wparentheses
+\&\-Wpointer\-sign
+\&\-Wreorder
+\&\-Wreturn\-type
+\&\-Wripa\-opt\-mismatch
+\&\-Wsequence\-point
+\&\-Wsign\-compare\fR (only in \*(C+)
+\&\fB\-Wstrict\-aliasing
+\&\-Wstrict\-overflow=1
+\&\-Wswitch
+\&\-Wtrigraphs
+\&\-Wuninitialized
+\&\-Wunknown\-pragmas
+\&\-Wunused\-function
+\&\-Wunused\-label
+\&\-Wunused\-value
+\&\-Wunused\-variable
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR. Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR. The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered
+\&\-Wempty\-body
+\&\-Wignored\-qualifiers
+\&\-Wmissing\-field\-initializers
+\&\-Wmissing\-parameter\-type\fR (C only)
+\&\fB\-Wold\-style\-declaration\fR (C only)
+\&\fB\-Woverride\-init
+\&\-Wsign\-compare
+\&\-Wtype\-limits
+\&\-Wuninitialized
+\&\-Wmaybe\-uninitialized
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) \fB
+\&\fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "*" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "*" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "*" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "*" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "*" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "*" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense. This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions. Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations. However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems. At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
+string came from untrusted input and contains \fB%n\fR. (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C, \*(C+, Objective\-C, and Objective\-\*(C+ only)" 4
+.IX Item "-Wnonnull (C, , Objective-C, and Objective- only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\& int f()
+\& {
+\& int i = i;
+\& return i;
+\& }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR" 4
+.IX Item "-Wimplicit"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR. For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types. This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed. In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\& int a[2][2] = { 0, 1, 2, 3 };
+\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
+such a case:
+.Sp
+.Vb 7
+\& {
+\& if (a)
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose. When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified. To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would
+look like this:
+.Sp
+.Vb 9
+\& {
+\& if (a)
+\& {
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+\& }
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it. These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified. All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified. However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect. Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R". If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wself\-assign\fR" 4
+.IX Item "-Wself-assign"
+Warn about self-assignment and self\-initialization. This warning is intended
+for detecting accidental self-assignment due to typos, and therefore does
+not warn on a statement that is semantically a self-assignment after
+constant folding. Here is an example of what will trigger a self-assign
+warning and what will not:
+.Sp
+.Vb 6
+\& void func()
+\& {
+\& int i = 2;
+\& int x = x; /* warn */
+\& float f = 5.0;
+\& double a[3];
+.Ve
+.Sp
+.Vb 5
+\& i = i + 0; /* not warn */
+\& f = f / 1; /* not warn */
+\& a[1] = a[1]; /* warn */
+\& i += 0; /* not warn */
+\& }
+.Ve
+.Sp
+In \*(C+ it will not warn on self-assignment of non-POD variables unless
+\&\fB\-Wself\-assign\-non\-pod\fR is also enabled.
+.IP "\fB\-Wself\-assign\-non\-pod\fR" 4
+.IX Item "-Wself-assign-non-pod"
+Warn about self-assignment of non-POD variables. This is a \*(C+\-specific
+warning and only effective when \fB\-Wself\-assign\fR is enabled.
+.Sp
+There are cases where self-assignment might be intentional. For example,
+a \*(C+ programmer might write code to test whether an overloaded
+\&\f(CW\*(C`operator=\*(C'\fR works when the same object is assigned to itself.
+One way to work around the self-assign warning in such cases when this flag
+is enabled is using the functional form \f(CW\*(C`object.operator=(object)\*(C'\fR
+instead of the assignment form \f(CW\*(C`object = object\*(C'\fR, as shown in the
+following example.
+.Sp
+.Vb 3
+\& void test_func()
+\& {
+\& MyType t;
+.Ve
+.Sp
+.Vb 3
+\& t.operator=(t); // not warn
+\& t = t; // warn
+\& }
+.Ve
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with a
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified. The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wripa\-opt\-mismatch\fR" 4
+.IX Item "-Wripa-opt-mismatch"
+When doing an \s-1FDO\s0 build with \fB\-fprofile\-use\fR and \fB\-fripa\fR,
+warn if importing an axuiliary module that was built with a different
+\&\s-1GCC\s0 command line during the profile-generate phase than the primary
+module.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used. These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+Note that a classic way to avoid \fB\-Wunused\-variable\fR warning is
+using \f(CW\*(C`x = x\*(C'\fR, but that does not work with \fB\-Wself\-assign\fR.
+Use \f(CW\*(C`(void) x\*(C'\fR or \f(CW\*(C`static_cast<void>(x)\*(C'\fR instead.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole. They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.IP "\fB\-Wmaybe\-uninitialized\fR" 4
+.IX Item "-Wmaybe-uninitialized"
+For an automatic variable, if there exists a path from the function
+entry to a use of the variable that is initialized, but there exist
+some other paths the variable is not initialized, the compiler will
+emit a warning if it can not prove the uninitialized paths do not
+happen at runtime. These warnings are made optional because \s-1GCC\s0 is
+not smart enough to see all the reasons why the code might be correct
+despite appearing to have an error. Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\& {
+\& int x;
+\& switch (y)
+\& {
+\& case 1: x = 1;
+\& break;
+\& case 2: x = 4;
+\& break;
+\& case 3: x = 5;
+\& }
+\& foo (x);
+\& }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
+warning, the user needs to provide a default case with \fIassert\fR\|(0) or
+similar code.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code. As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files. This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas. See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization. The warning does not catch all
+cases, but does attempt to catch the more common pitfalls. It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives. However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced. Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken. Warns about
+incomplete types. Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common punn+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur. Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization. Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur. Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem. To help focus on important issues, several
+warning levels are defined. No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid. For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR. This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified. For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \-O2 and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero. Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read. Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code. However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers. If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem). In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "*" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "*" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line. Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line. It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them. Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "*" 4
+A function-like macro that appears without arguments.
+.IP "*" 4
+The unary plus operator.
+.IP "*" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
+constants.) Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "*" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "*" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "*" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "*" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type. This warning is only issued if
+the base of the constant is ten. I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "*" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "*" 4
+Initialization of automatic aggregates.
+.IP "*" 4
+Identifier conflicts with labels. Traditional C lacks a separate
+namespace for labels.
+.IP "*" 4
+Initialization of unions. If the initializer is zero, the warning is
+omitted. This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "*" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa. The absence of these prototypes when compiling with traditional
+C would cause serious problems. This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "*" 4
+Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype. This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block. This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable shadows another local variable, parameter or
+global variable or whenever a built-in function is shadowed.
+.IP "\fB\-Wshadow\-local\fR" 4
+.IX Item "-Wshadow-local"
+Warn when a local variable shadows another local variable or parameter.
+.IP "\fB\-Wshadow\-compatible\-local\fR" 4
+.IX Item "-Wshadow-compatible-local"
+Warn when a local variable shadows another local variable or parameter
+whose type is compatible with that of the shadowing variable. In \*(C+,
+type compatibility here means the type of the shadowing variable can be
+converted to that of the shadowed variable. The creation of this flag
+(in addition to \fB\-Wshadow\-local\fR) is based on the idea that when
+a local variable shadows another one of incompatible type, it is most
+likely intentional, not a bug or typo, as shown in the following example:
+.Sp
+.Vb 8
+\& for (SomeIterator i = SomeObj.begin(); i != SomeObj.end(); ++i)
+\& {
+\& for (int i = 0; i < N; ++i)
+\& {
+\& ...
+\& }
+\& ...
+\& }
+.Ve
+.Sp
+Since the two variable \f(CW\*(C`i\*(C'\fR in the example above have incompatible types,
+enabling only \fB\-Wshadow\-compatible\-local\fR will not emit a warning.
+Because their types are incompatible, if a programmer accidentally uses one
+in place of the other, type checking will catch that and emit an error or
+warning. So not warning (about shadowing) in this case will not lead to
+undetected bugs. Use of this flag instead of \fB\-Wshadow\-local\fR can
+possibly reduce the number of warnings triggered by intentional shadowing.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning. In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices. With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu\-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions. In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR. This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions. For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR. This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning. These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR. This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR. Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types; confusing overload resolution for user-defined conversions; and
+conversions that will never use a type conversion operator:
+conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a reference
+to them. Warnings about conversions between signed and unsigned
+integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wconversion\-null\fR" 4
+.IX Item "-Wconversion-null"
+Warn about peculiar, but valid, conversions from/to \f(CW\*(C`NULL\*(C'\fR.
+This includes converting \f(CW\*(C`NULL\*(C'\fR to non-pointer type and
+converting the boolean value \f(CW\*(C`false\*(C'\fR to \f(CW\*(C`NULL\*(C'\fR. This warning
+is also enabled by \fB\-Wconversion\fR and only effective in \*(C+.
+.IP "\fB\-Wreal\-conversion\fR" 4
+.IX Item "-Wreal-conversion"
+Warn for implicit type conversions from real (\f(CW\*(C`double\*(C'\fR or \f(CW\*(C`float\*(C'\fR)
+to integral values.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wenum-compare ( and Objective- only)"
+Warn about a comparison between values of different enum types. This
+warning is enabled by default.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called. (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc. This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined. This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types. (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration. This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used. A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\& void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration. This warning is issued even if the definition itself
+provides a prototype. The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files. In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing. For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-noreturn\fR" 4
+.IX Item "-Wmissing-noreturn"
+Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
+Note these are only possible candidates, not absolute ones. Care should
+be taken to manually verify functions actually do not ever return before
+adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
+bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
+hosted C environments.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes. Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type. I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
+possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters. However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same. To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports. The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers. That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR. You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit. For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\& struct foo {
+\& int x;
+\& char a, b, c, d;
+\& } __attribute__((packed));
+\& struct bar {
+\& char z;
+\& struct foo f;
+\& };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR. This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout. \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\& struct foo
+\& {
+\& char a:4;
+\& char b:8;
+\& } __attribute__ ((packed));
+.Ve
+.Sp
+This warning is enabled by default. Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure. Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Wunreachable\-code\fR" 4
+.IX Item "-Wunreachable-code"
+Warn if the compiler detects that code will never be executed.
+.Sp
+This option is intended to warn when the compiler detects that at
+least a whole line of source code will never be executed, because
+some condition is never satisfied or because it is after a
+procedure that never returns.
+.Sp
+It is possible for this option to produce a warning even though there
+are circumstances under which part of the affected line can be executed,
+so care should be taken when removing apparently-unreachable code.
+.Sp
+For instance, when a function is inlined, a warning may mean that the
+line is unreachable in only one inlined copy of the function.
+.Sp
+This option is not made part of \fB\-Wall\fR because in a debugging
+version of a program there is often substantial code which checks
+correct functioning of the program and is, hopefully, unreachable
+because the program does work. Another common use of unreachable
+code is to provide behavior which is selectable at compile\-time.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function. For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function. Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined. In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.) This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-int-to-pointer-cast (C and Objective-C only)"
+Suppress warnings from casts to pointer type of an integer of a
+different size.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used. This is default. To inhibit
+the warning messages, use \fB\-Wno\-long\-long\fR. Flags
+\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
+only when \fB\-pedantic\fR flag is used.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile. The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled. This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively. Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective\-C. It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active. It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard. Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
+C99, it was raised to 4095. \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.Sh "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program. If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output. This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0. This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-2\fR" 4
+.IX Item "-gdwarf-2"
+Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
+supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
+option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
+version 3 is upward compatible with version 2, but may still cause
+problems for older debuggers.
+.IP "\fB\-gdwarf\-4\fR" 4
+.IX Item "-gdwarf-4"
+Produce debugging information in \s-1DWARF\s0 version 4 format (if that is
+supported). With this option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 4
+when they are useful, including the placement of most type information
+in separate comdat sections. The \s-1DWARF\s0 version 4 format is still a
+draft specification, and this option is currently experimental.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR. On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+This option currently disables only the output of discriminator information
+in line number tables when not using \s-1DWARF\s0 version 4.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information. The default level is 2.
+.Sp
+Level 0 produces no debug information at all. Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug. This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program. Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing. That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF2\s0.
+.IP "\fB\-gmlt\fR" 4
+.IX Item "-gmlt"
+Produce a minimal line table, with level 1 debugging information plus
+information about inlined functions and line numbers.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol. This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax
+[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files. Merging is
+not supported by all assemblers or linkers. Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time. Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented. During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns. When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file. In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking). See the documentation for those options for more details.
+.RS 4
+.IP "*" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options. For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option. You do not need to profile
+every source file in a program.
+.IP "*" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "*" 4
+Run the program on a representative workload to generate the arc profile
+information. This may be repeated any number of times. You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated. Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "*" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "*" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed. When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage. Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data. Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upperbound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upperbound. \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upperbound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upperbound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upperbound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR. This is used for debugging the RTL-based passes of the
+compiler. The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file. \fIdumpname\fR is
+generated from the name of the output file, if explicitly specified
+and it is not an executable, otherwise it is the basename of the
+source file. These switches may have different effects when
+\&\fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR. Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery. This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling. This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers. This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dm\fR" 4
+.IX Item "-dm"
+Print statistics on memory usage, at the end of the run, to
+standard error.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used. The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+Dump debugging information during parsing, to standard error.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output. This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file. The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file. The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file. If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+.PD 0
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-ipa-switch-options"
+.PD
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR controls the details
+of the dump as described for the \fB\-fdump\-tree\fR options. The
+following dumps are possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file. The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file. If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them. The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump. Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored. The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node. Usually this is not meaningful as it
+changes according to the environment and source file. Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path. When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree. By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dump the call graph of the compilation unit to a file in \s-1VCG\s0 format. The file
+name is made by appending \fI.cgraph.vcg\fR to the respective dump file name.
+This is primarily useful with \fB\-fdump\-ipa\fR.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file. The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file. The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
+file name is made by appending \fI.vcg\fR to the source file name. Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0. You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers. The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file. The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function. The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0. The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after \s-1STORE\-CCP\s0. The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination. The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination. The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation. The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy\-propagation. The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination. The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation. The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates. The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking. The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations. The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination. The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables. The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization. The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees. The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops. The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner\-most, single\-bb, single\-entry/exit loops. This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If \fIn\fR=3, alignment related information is added to the reports.
+If \fIn\fR=4, data-references related information (e.g. memory dependences,
+memory access\-patterns) is added to the reports.
+If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control\-flow).
+If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
+For \fIn\fR=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers. It is used to generate certain symbol names
+that have to be different in every compiled file. It is also used to
+place unique stamps in coverage data files and the object files that
+produce them. You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints. This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched\fR or \fI.sched2\fR
+respectively. However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info. For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file. Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.IP "\fB\-time\fR" 4
+.IX Item "-time"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence. For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done). The output looks like this:
+.Sp
+.Vb 2
+\& # cc1 0.12 0.01
+\& # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself. The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else. With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line. This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them. The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@} instead of the
+\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
+ease shell\-processing.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR. You can do
+.Sp
+.Vb 1
+\& gcc -nostdlib <files>... `gcc -print-libgcc-file-name`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation. This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options. If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else. (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit. Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared). More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.Sh "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results. Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program. Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag. Only
+optimizations that have a flag are listed.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize. Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec
+\&\-fcprop\-registers
+\&\-fdce
+\&\-fdefer\-pop
+\&\-fdelayed\-branch
+\&\-fdse
+\&\-fguess\-branch\-probability
+\&\-fif\-conversion2
+\&\-fif\-conversion
+\&\-finline\-small\-functions
+\&\-fipa\-pure\-const
+\&\-fipa\-reference
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types
+\&\-ftree\-builtin\-call\-dce
+\&\-ftree\-ccp
+\&\-ftree\-ch
+\&\-ftree\-copyrename
+\&\-ftree\-dce
+\&\-ftree\-dominator\-opts
+\&\-ftree\-dse
+\&\-ftree\-fre
+\&\-ftree\-sra
+\&\-ftree\-ter
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps
+\&\-falign\-functions \-falign\-jumps
+\&\-falign\-loops \-falign\-labels
+\&\-fcaller\-saves
+\&\-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
+\&\-fdelete\-null\-pointer\-checks
+\&\-fexpensive\-optimizations
+\&\-fgcse \-fgcse\-lm
+\&\-findirect\-inlining
+\&\-foptimize\-sibling\-calls
+\&\-fpeephole2
+\&\-fregmove
+\&\-freorder\-blocks \-freorder\-functions
+\&\-frerun\-cse\-after\-loop
+\&\-fsched\-interblock \-fsched\-spec
+\&\-fschedule\-insns \-fschedule\-insns2
+\&\-fstrict\-aliasing \-fstrict\-overflow
+\&\-ftree\-switch\-conversion
+\&\-ftree\-pre
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more. \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR and \fB\-ftree\-vectorize\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results. This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size. It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
+\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
+\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags. Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use. You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations. They are either
+activated by \fB\-O\fR options or are related to ones that are. You
+can use the following flags in the rare cases when \*(L"fine\-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only). Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns. For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0. The pass tries to combine two
+instructions and checks if the result can be simplified. If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O2\fR,
+\&\fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one. This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions. \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist. The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller). The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining. This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers. The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
+allows coarse control of this limit. \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size. In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers. This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C89. In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR. In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types. Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass. This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed. By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis. This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0. This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section. E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests. Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors. The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi\-threaded. Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads. This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found. If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently. This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path. For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks. When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves. This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination. This pass will attempt to move
+stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite. This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
+resulting code may or may not perform better than without cross\-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this. Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents. This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics. The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Use global dataflow analysis to identify and eliminate useless checks
+for null pointers. The compiler assumes that dereferencing a null
+pointer would have halted the program. If a pointer is checked after
+it has already been dereferenced, it cannot be null.
+.Sp
+In some environments, this assumption is not true, and programs can
+safely dereference null pointers. Use
+\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying. This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator. The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR. The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring. The second
+algorithm can be unimplemented for some architectures. If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator. The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR. The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-coalesce\fR" 4
+.IX Item "-fira-coalesce"
+Do optimistic register coalescing. This option might be profitable for
+architectures with big regular register files.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call. Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo\-registers. Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be. Default value is 5. If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable. This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done. This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm. Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules. This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched2\-use\-traces\fR" 4
+.IX Item "-fsched2-use-traces"
+Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
+allocation and additionally perform code duplication in order to increase the
+size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
+trace formation.
+.Sp
+This mode should produce faster but significantly longer programs. Also
+without \fB\-fbranch\-probabilities\fR the traces constructed may not
+match the reality and hurt the performance. This only makes
+sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsee\fR" 4
+.IX Item "-fsee"
+Eliminate redundant sign extension instructions and move the non-redundant
+ones to optimal placement using lazy code motion (\s-1LCM\s0).
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls. Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage. The compiler will attempt to use less
+stack space, even if that makes the program slower. This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees. This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees. The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees. This pass eliminates unnecessary
+copy operations. This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality. This transformation is
+affective for programs containing arrays of structures. Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics). Require \fB\-fipa\-type\-escape\fR
+to provide the safety of this transformation. It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR and \fB\-combine\fR to be
+enabled. Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis. This option is experimental
+and does not affect generated code.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace a m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion on trees. This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array. This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free. This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal. This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees. A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads. In this case the earlier store can be deleted. This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees. This is beneficial since it increases
+effectiveness of code motion optimizations. It also saves one jump. This flag
+is enabled by default at \fB\-O\fR and higher. It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-lr\-shrinking\fR" 4
+.IX Item "-ftree-lr-shrinking"
+Enable live range shrinking optimization on trees. This optimization is used
+to help reducing register pressure.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform linear loop transformations on tree. This flag can improve cache
+performance and allow further loop optimizations to take place.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops. Interchanging two
+nested loops switches the inner and outer loops. For example, given a
+loop like:
+.Sp
+.Vb 5
+\& DO J = 1, M
+\& DO I = 1, N
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss. This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran. To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops. Strip mining
+splits a loop into two nested loops. The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip. For example, given a loop like:
+.Sp
+.Vb 3
+\& DO I = 1, N
+\& A(I) = A(I) + C
+\& ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO II = 1, N, 4
+\& DO I = II, min (II + 3, N)
+\& A(I) = A(I) + C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran. To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops. Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches. For example, given a loop like:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\& DO II = 1, N, 64
+\& DO JJ = 1, M, 64
+\& DO I = II, min (II + 63, N)
+\& DO J = JJ, min (JJ + 63, M)
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches. This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran. To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers. This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution. This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place. For example, the loop
+.Sp
+.Vb 4
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& ENDDO
+\& DO I = 1, N
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees. This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching. The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis. Later
+optimizations then may determine the number easily. Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered. The optimization is only
+profitable on multiprocessor machines, for loops that are CPU\-intensive,
+rather than constrained e.g. by memory bandwidth. This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates. This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early. This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees. This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables. This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
+use/single def temporaries are replaced at their use location with their
+defining expression. This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees. When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed. This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees. This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated. This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks. This is
+enabled by default at \fB\-O2\fR and higher. Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration. This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect. However in cases the loop body is more complicated than
+a single basic block, this is not reliable. It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations. The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
+heuristics are based on the control flow graph. If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account. The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality. This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective. See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled. For C (and \*(C+), this activates
+optimizations based on the type of expressions. In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same. For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\& union a_union {
+\& int i;
+\& double d;
+\& };
+.Ve
+.Sp
+.Vb 5
+\& int f() {
+\& union a_union t;
+\& t.d = 3.0;
+\& return t.i;
+\& }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type\-punning\*(R") is common. Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type. So, the code above will work as
+expected. However, this code might not:
+.Sp
+.Vb 7
+\& int f() {
+\& union a_union t;
+\& int* ip;
+\& t.d = 3.0;
+\& ip = &t.i;
+\& return *ip;
+\& }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\& int f() {
+\& double d = 3.0;
+\& return ((union a_union *) &d)->i;
+\& }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled. For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen. This
+permits various optimizations. For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic. When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps. When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers. With \fB\-fwrapv\fR certain types of overflow are
+permitted. For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR. The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements. Output them in the same order that they appear in the
+input file. When this option is used, unreferenced static variables
+will not be removed. This option is intended to support existing code
+which relies on a particular ordering. For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR. When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register. This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents whole program being
+compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in a affect gets more aggressively optimized by interprocedural optimizers.
+While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of single file, in combination with option
+\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
+programs since the functions and variables become local for the whole combined
+compilation unit, not for the single source file itself.
+.Sp
+This option is not supported for Fortran programs.
+.IP "\fB\-fuse\-ld=gold\fR" 4
+.IX Item "-fuse-ld=gold"
+Use the \fBld.gold\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both\fR or \fB\-\-enable\-gold=both/ld\fR.
+.IP "\fB\-fuse\-ld=bfd\fR" 4
+.IX Item "-fuse-ld=bfd"
+Use the \fBld.bfd\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both/gold\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR
+thus the profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization. You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-generate\-sampling\fR" 4
+.IX Item "-fprofile-generate-sampling"
+Enable sampling for instrumented binaries. Instead of recording every event,
+record only every N\-th event, where N (the sampling rate) can be set either
+at compile time using
+\&\fB\-\-param profile\-generate\-sampling\-rate=\fR\fIvalue\fR, or
+at execution start time through environment variable \fB\s-1GCOV_SAMPLING_RATE\s0\fR.
+.Sp
+At this time sampling applies only to branch counters. A sampling rate of 100
+decreases instrumentated binary slowdown from up to 20x for heavily threaded
+applications down to around 2x. \fB\-fprofile\-correction\fR is always
+needed with sampling.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code. This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR. Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fpmu\-profile\-generate=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-generate=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling. This collects
+hardware counter data corresponding to \fIpmuoption\fR. Currently
+only \fIload-latency\fR and \fIbranch-mispredict\fR are supported
+using pfmon tool. You must use \fB\-fpmu\-profile\-generate\fR both
+when compiling and when linking your program. This \s-1PMU\s0 profile data
+may later be used by the compiler during optimizations as well can be
+displayed using coverage tool gcov. The params variable
+\&\*(L"pmu_profile_n_addresses\*(R" can be used to restrict \s-1PMU\s0 data collection
+to only this many addresses.
+.IP "\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-use=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling based
+optimizations. Currently only \fIload-latency\fR and
+\&\fIbranch-mispredict\fR are supported.
+.IP "\fB\-fcgraph\-section\fR" 4
+.IX Item "-fcgraph-section"
+Emit call graph edge profile counts in .note.callgraph.text sections. This is
+used in conjunction with \fB\-fprofile\-use\fR. A new .note.callgraph.text
+section is created for each function. This section lists every callee and the
+number of times it is called. The params variable
+\&\*(L"note\-cgraph\-section\-edge\-threshold\*(R" can be used to only list edges above a
+certain threshold.
+.IP "\fB\-fripa\fR" 4
+.IX Item "-fripa"
+Perform dynamic inter-procedural analysis. This is used in conjunction with
+the \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR options.
+During the \fB\-fprofile\-generate\fR phase, this flag turns on some additional
+instrumentation code that enables dynamic call-graph analysis.
+During the \fB\-fprofile\-use\fR phase, this flag enables cross-module
+optimizations such as inlining.
+.IP "\fB\-fripa\-disallow\-asm\-modules\fR" 4
+.IX Item "-fripa-disallow-asm-modules"
+During profile\-gen, if this flag is enabled, and the module has asm statements,
+arrange so that a bit recording this information will be set in the profile
+feedback data file.
+During profile\-use, if this flag is enabled, and the same bit in auxiliary
+module's profile feedback data is set, don't import this auxiliary module.
+If this is the primary module, don't export it.
+.IP "\fB\-fripa\-disallow\-opt\-mismatch\fR" 4
+.IX Item "-fripa-disallow-opt-mismatch"
+Don't import an auxiliary module, if the \s-1GCC\s0 command line options used for this
+auxiliary module during the profile-generate stage were different from those used
+for the primary module. Note that any mismatches in warning-related options are
+ignored for this comparison.
+.IP "\fB\-fripa\-verbose\fR" 4
+.IX Item "-fripa-verbose"
+Enable printing of verbose information about dynamic inter-procedural optimizations.
+This is used in conjunction with the \fB\-fripa\fR.
+.IP "\fB\-fripa\-no\-promote\-always\-inline\-func\fR" 4
+.IX Item "-fripa-no-promote-always-inline-func"
+Do not promote static functions with always inline attribute in \s-1LIPO\s0 compilation.
+.IP "\fB\-fsample\-profile\fR" 4
+.IX Item "-fsample-profile"
+.PD 0
+.IP "\fB\-fsample\-profile=\fR\fIpath\fR" 4
+.IX Item "-fsample-profile=path"
+.PD
+Enable profile feedback directed optimizations using profiles obtained
+via sampling, and optimizations generally profitable only with profile
+feedback available.
+.IP "\fB\-fsample\-profile\-use\-entry\fR" 4
+.IX Item "-fsample-profile-use-entry"
+Use the entry count to annotate the entry basic block. This will improve the
+profile precision for \s-1LBR\s0 based sampling.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fB\-fsample\-profile\-aggregate\-using=\fR\fImethod\fR" 4
+.IX Item "-fsample-profile-aggregate-using=method"
+Select the method for (average or maximum) for converting
+instruction-level profiles into basic block level profiles.
+.IP "\fB\-frecord\-options\-in\-elf\fR" 4
+.IX Item "-frecord-options-in-elf"
+Record the command line options in the .note elf section for sample \s-1FDO\s0 to
+do module grouping.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic. These options trade off between speed and
+correctness. All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
+x86 architecture. For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point. Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt. A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards. When used at link\-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result. \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR. May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect. Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations. For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination. Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero. \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps. These traps include division by zero, overflow,
+underflow, inexact result and invalid operation. This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect. Setting this option may
+allow faster code if one relies on \*(L"non\-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior. This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations. This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode. This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations. Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division. Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case. The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules. Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options. This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken. When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file. The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization. Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
+notes to instructions for their later usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-ffvpt\fR" 4
+.IX Item "-ffvpt"
+If combined with \fB\-fvpt and \-ffvpt_functions\fR, it instructs the
+compiler to add a code to gather information about math library calls.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of function calls
+using precalculated values of common inputs.
+.IP "\fB\-ffvpt\-functions=\fR\fIffvptfunctions\fR" 4
+.IX Item "-ffvpt-functions=ffvptfunctions"
+This options takes a comma separated list of math functions to be
+profiled/optimized by \fB\-ffvpt\fR. The special name \*(L"all\*(R" can be
+used to specify all supported math functions. Currently, exp, log,
+pow, and sqrt are supported.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations). This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback). It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections. The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space. Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so. When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks. This is done by adding a guard variable to functions with
+vulnerable objects. This includes functions that call alloca, and
+functions with buffers larger than 8 bytes. The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-stack\-protector\fR
+or \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR or
+\&\fB\-fstack\-protector\fR are found.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\& static int a, b, c;
+\& int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\& int foo (void)
+\& {
+\& register int *xr = &x;
+\& return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+\& }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done. For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions. You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer. The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBsra-max-structure-size\fR" 4
+.IX Item "sra-max-structure-size"
+The maximum structure size, in bytes, at which the scalar replacement
+of aggregates (\s-1SRA\s0) optimization will perform block copies. The
+default value, 0, implies that \s-1GCC\s0 will select the most appropriate
+size itself.
+.IP "\fBsra-field-structure-ratio\fR" 4
+.IX Item "sra-field-structure-ratio"
+The threshold ratio (as a percentage) between instantiated fields and
+the complete structure size. We say that if the ratio of the number
+of bytes in instantiated fields to the number of bytes in the complete
+structure exceeds this parameter, then block copies are not used. The
+default is 75.
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program. This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-cost-outcome\fR" 4
+.IX Item "predictable-branch-cost-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block. Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them. This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched. The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping. The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto. To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible. Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored. The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot. If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching. Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information. Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time. This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization. If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-passes\fR" 4
+.IX Item "max-gcse-passes"
+The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over. Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining. This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 450.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated. To those functions, a different
+(potentially more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 450.
+.IP "\fBinline-limit-increase-with-profile\fR" 4
+.IX Item "inline-limit-increase-with-profile"
+When profile information is available, such as when compiling
+with \fB\-fprofile\-use\fR, the maximum function size
+limits \fB\-\-param max-inline-insns-single\fR
+and \fB\-\-param max-inline-insns-auto\fR are increased by this percentage
+amount. Profile information increases the selectivity and quality of the
+inlining decisions, so having a larger set of candidate functions available
+for inlining can improve performance.
+The default value is 100.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions. For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit. Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time. If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane. For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size. Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation. The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames. While inlining the algorithm is trying
+to not grow past this limit too much. Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression. This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents). The default value is
+10.
+.IP "\fBmin-count-fraction-for-inline-cold\fR" 4
+.IX Item "min-count-fraction-for-inline-cold"
+Generally cold callsites are not candidates for inlining. However, if
+the callee contains hot code then inlining can propagate useful
+context to this hot region. This parameter, given as a fraction of
+the global maximum count, specifies the minimum expected count in the
+callee called from a cold callsite for the callsite to be considered
+for inlining, where the expected count in the callee from a callsite is
+the maximum count of any basic block in the callee times the callsite
+count divided by the callee count.
+.IP "\fBinline-call-cost\fR" 4
+.IX Item "inline-call-cost"
+Specify cost of call instruction relative to simple arithmetics operations
+(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
+functions and at the same time increases size of leaf function that is believed to
+reduce function size by being inlined. In effect it increases amount of
+inlining for code having large abstraction penalty (many functions that just
+pass the arguments to other functions) and decrease inlining for code with low
+abstraction penalty. The default value is 12.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used. The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization. The default value is 0.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+.PD 0
+.IP "\fBmax-completely-peeled-insns-feedback\fR" 4
+.IX Item "max-completely-peeled-insns-feedback"
+.PD
+The maximum number of insns of a completely peeled loop.
+.Sp
+The \fBmax-completely-peeled-insns-feedback\fR is used only when profile
+feedback is available and the loop is hot. Because of the real profiles, this
+value may set to be larger for hot loops.
+.IP "\fBmax-once-peeled-insns\fR" 4
+.IX Item "max-once-peeled-insns"
+.PD 0
+.IP "\fBmax-once-peeled-insns-feedback\fR" 4
+.IX Item "max-once-peeled-insns-feedback"
+.PD
+The maximum number of insns of a peeled loop that rolls only once.
+The \fBmax-once-peeled-insns-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value
+may set to be larger for hot loops.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+.PD 0
+.IP "\fBmax-completely-peel-times-feedback\fR" 4
+.IX Item "max-completely-peel-times-feedback"
+.PD
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.Sp
+The \fBmax-completely-peel-times-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value may
+set to be larger for hot loops.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations. Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert. The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver. The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver. The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints. The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically. This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown. We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10. This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered. This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available. The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage. This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without. The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers. The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBmax-aliased-vops\fR" 4
+.IX Item "max-aliased-vops"
+Maximum number of virtual operands per function allowed to represent
+aliases before triggering the alias partitioning heuristic. Alias
+partitioning reduces compile times and memory consumption needed for
+aliasing at the expense of precision loss in alias information. The
+default value for this parameter is 100 for \-O1, 500 for \-O2 and 1000
+for \-O3.
+.Sp
+Notice that if a function contains more memory statements than the
+value of this parameter, it is not really possible to achieve this
+reduction. In this case, the compiler will use the number of memory
+statements as the value for \fBmax-aliased-vops\fR.
+.IP "\fBavg-aliased-vops\fR" 4
+.IX Item "avg-aliased-vops"
+Average number of virtual operands per statement allowed to represent
+aliases before triggering the alias partitioning heuristic. This
+works in conjunction with \fBmax-aliased-vops\fR. If a function
+contains more than \fBmax-aliased-vops\fR virtual operators, then
+memory symbols will be grouped into memory partitions until either the
+total number of virtual operators is below \fBmax-aliased-vops\fR
+or the average number of virtual operators per memory statement is
+below \fBavg-aliased-vops\fR. The default value for this parameter
+is 1 for \-O1 and \-O2, and 3 for \-O3.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used. Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity. This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage. The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used. Setting this parameter
+very large effectively disables garbage collection. Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination. Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler. The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler. The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling. The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations. The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling. It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling. This is the limit on the number of iterations
+through which the instruction may be pipelined. The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler. The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register. The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed. This sets the maximum
+value of a shared integer constant. The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual\-mappings\-ratio. The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis. The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes. The distance we prefetch ahead is proportional
+to this constant. Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop with an
+unknown trip count.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system. By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+. However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above. For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine. This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior. Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing. If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled. The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default. If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation. The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions. If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used. The
+algorithm do not use pseudo-register conflicts. The default value of
+the parameter is 2000.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops. Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them. The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBctrl-regpre\fR" 4
+.IX Item "ctrl-regpre"
+This is a switch to turn on live range shrinking optimization.
+.IP "\fBctrl-regpre-mode\fR" 4
+.IX Item "ctrl-regpre-mode"
+This is used as a control knob to enable different transformations in
+the live range shrinking phase. Values of 1, 2, and 4 are used to enable
+upward motion, downward motion, and tree reshaping transformations
+ respectively. The values can be bitwise ORed.
+.IP "\fBreg-pressure-min-bb-factor\fR" 4
+.IX Item "reg-pressure-min-bb-factor"
+A performance tuning knob to control register pressure. When the size
+(in the number of gimple statements) of a basic block in a loop is
+larger than the threshold specified by this parameter multiplied by the
+number of available registers, live range shrinking optimization is enabled.
+.IP "\fBreg-pressure-max-region\fR" 4
+.IX Item "reg-pressure-max-region"
+A parameter to control the maximal allowed region size for live range
+shrinking.
+.IP "\fBreg-pressure-min-tree\fR" 4
+.IX Item "reg-pressure-min-tree"
+The minimal size (number of leaves) of a tree to be reshaped in the Live
+Range Shrinking optimization.
+.IP "\fBmin-mcf-cancel-iters\fR" 4
+.IX Item "min-mcf-cancel-iters"
+The minimum number of iterations of negative cycle cancellation during
+\&\s-1MCF\s0 profile correction before early termination. This parameter is
+only useful when using \fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-mcf-high-confidence-cost-mult\fR" 4
+.IX Item "samplefdo-mcf-high-confidence-cost-mult"
+Multiply the cost used by \s-1MCF\s0 during profile correction by this factor
+for all input profile data that is determined to be high confidence.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-use-discrim\fR" 4
+.IX Item "samplefdo-use-discrim"
+When attributing samples to the \s-1CFG\s0, use discriminators to identify
+which \s-1CFG\s0 nodes correspond to which samples. This parameter is only
+useful when using \fB\-fsample\-profile\fR.
+.IP "\fBsamplefdo-large-block-thresh\fR" 4
+.IX Item "samplefdo-large-block-thresh"
+Consider a basic block large if it has more than this many gimple
+statements in it. If a block is large and has no profile samples
+attributed to it, it will be assigned a weight of 0 with high
+confidence. This parameter is only useful when using
+\&\fB\-fsample\-profile\fR.
+.IP "\fBmax-lipo-mem\fR" 4
+.IX Item "max-lipo-mem"
+When importing auxiliary modules during profile\-use, check current
+memory consumption after parsing each auxiliary module. If it exceeds
+this limit (specified in kb), don't import any more auxiliary modules.
+Specifying a value of 0 means don't enforce this limit. This parameter
+is only useful when using \fB\-fprofile\-use\fR and \fB\-fripa\fR.
+.IP "\fBprofile-generate-sampling-rate\fR" 4
+.IX Item "profile-generate-sampling-rate"
+Set the sampling rate with \fB\-fprofile\-generate\-sampling\fR.
+.RE
+.RS 4
+.RE
+.Sh "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor. If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas. However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor. You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+.Ve
+.Sp
+.Vb 1
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies. If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its filename. When
+\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
+loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0. It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location. The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp -dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters. For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them. See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??-
+\& Replacement: [ ] { } # \e ^ | ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as \s-1MS\-DOS\s0.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.Sh "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler. You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.Sh "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file. They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library. (Object files are
+distinguished from libraries by the linker according to the file
+contents.) If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking. (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files. The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined. But if the file that is found is an
+ordinary object file, it is linked in the usual fashion. The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries. In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR or \fB\-pg\fR or \fB\-p\fR
+are found.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries. On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable. Not all systems support this option. For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version. The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries. In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default. Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default. This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object. Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script. This option is supported by most
+systems using the \s-1GNU\s0 linker. On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker. You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments. For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR. Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
+commas, it is split into multiple options at the commas. You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker. When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it. You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.Sh "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files. This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories. However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that). If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored. The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker. They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor. In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed. If it is not found there, the two
+standard prefixes above are tried, and that is all. The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR. This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option. If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated. Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
+override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked. That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.Sh "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
+\&\fI<machine>\-gcc\fR when cross\-compiling, or
+\&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
+was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
+options that will switch to another cross-compiler or version.
+.IP "\fB\-b\fR \fImachine\fR" 4
+.IX Item "-b machine"
+The argument \fImachine\fR specifies the target machine for compilation.
+.Sp
+The value to use for \fImachine\fR is the same as was specified as the
+machine type when configuring \s-1GCC\s0 as a cross\-compiler. For
+example, if a cross-compiler was configured with \fBconfigure
+arm-elf\fR, meaning to compile for an arm processor with elf binaries,
+then you would specify \fB\-b arm-elf\fR to run that cross compiler.
+Because there are other options beginning with \fB\-b\fR, the
+configuration must contain a hyphen, or \fB\-b\fR alone should be one
+argument followed by the configuration in the next argument.
+.IP "\fB\-V\fR \fIversion\fR" 4
+.IX Item "-V version"
+The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
+This is useful when multiple versions are installed. For example,
+\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
+.PP
+The \fB\-V\fR and \fB\-b\fR options work by running the
+\&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
+use them if you can just run that directly.
+.Sh "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Earlier we discussed the standard option \fB\-b\fR which chooses among
+different installed compilers for completely different target
+machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
+.PP
+In addition, each of these target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none. A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode. This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the cpu to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics. This flag prevents code
+compiled for one cpu to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used. This option avoids
+generating these instructions. This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets. Without this option the two instruction sets cannot
+be reliably used inside one program. The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body. This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code. The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use. Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration. Note that
+the hard-float and soft-float ABIs are not link\-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order. That is, a byte order of the form \fB32107654\fR. Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a8\fR, \fBcortex\-a9\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the cpu specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code. This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-d16\fR and
+\&\fBneon\fR. \fB\-mfp\fR and \fB\-mfpe\fR
+are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
+with older versions of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the \s-1COFF\s0
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls. The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls. The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive. Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
+loading it in the prologue for each function. The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations. This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co\-processor. This option is not enabled by default, since the
+problem is only present in older Maverick implementations. The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue. The generated code is similar to this:
+.Sp
+.Vb 9
+\& t0
+\& .ascii "arm_poke_function_name", 0
+\& .align
+\& t1
+\& .word 0xff000000 + (t1 - t0)
+\& arm_poke_function_name
+\& mov ip, sp
+\& stmfd sp!, {fp, ip, lr, pc}
+\& sub fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set. The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function. This allows these functions to be called from
+non-interworking code.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not. There is a small overhead in the cost
+of executing a function pointer if this option is enabled.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer. The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor. The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-msize\fR" 4
+.IX Item "-msize"
+Output instruction sizes to the asm file.
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
+.IP "\fB\-mno\-tablejump\fR" 4
+.IX Item "-mno-tablejump"
+Do not generate tablejump insns which sometimes increase code size.
+The option is now deprecated in favor of the equivalent
+\&\fB\-fno\-jump\-tables\fR
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer. This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
+and long long will be 4 bytes. Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor. Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor. Any workarounds available for the targeted silicon revision
+will be enabled. If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled. The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision. If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined. If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete. For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined. And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in. This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large. This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries. That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries. Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime. This has an effect on certain
+anomaly workarounds. For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions. The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies. This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code. This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post\-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no\-options) arranges (eliminate arrangements) for the
+stack\-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model. The default is to
+arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack\-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code. Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library. Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch. The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory. The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR. This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used. For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode. The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable. This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch. Using this switch may require recompiling all
+other modules in a program, including system libraries. Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development. Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked. See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
+.IX Item "-allowable_client client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker. The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations. If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
+point standard. However, for full compliance, software assistance is
+required. This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option. Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting. The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode. Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode. A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect. The C library initializes this register for
+rounding towards plus infinity. Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise. This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision. This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision. The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision. The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant. You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions. If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader. Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros. Use of these macros does not allow
+optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions. This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register. This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR. With this option the data area
+is limited to just below 2GB. Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction. When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify. If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR. The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application. This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model. This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections. It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit. This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet. This option only has an effect when \s-1VLIW\s0 packing
+is enabled. It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code. It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code. Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library. This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library. This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default. When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode. This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine. Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner. This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers. If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes. This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers. This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries. This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine. The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker. Note this makes symbolic
+debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross\-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross\-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
+\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
+options are available under HP-UX and \s-1HI\-UX\s0.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
+building a shared library. It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld. The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links. It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences. This ensures that a call
+is always able to reach linker generated stubs. The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used. The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance. However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated. The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
+is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
+11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines. It also affects the operational behavior
+of the C library. Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl. There isn't an archive version of libdld.sl. Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic. On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case. The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under \s-1HP\-UX\s0. This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions. The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change. Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors. In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine. Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support. Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support. (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3dNOW!, enhanced 3dNOW!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR. The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR. The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise. Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips. See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387. Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective. For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once. This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR. Supported
+choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons. These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross\-compilation. You must make your
+own arrangements to provide suitable library functions for
+cross\-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0. The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
+generating those instructions. This option is the default on FreeBSD,
+OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
+indicates that the target cpu will always have an \s-1FPU\s0 and so the
+instruction will not need emulation. As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible. So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section. This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning. This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR. You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments. By
+default, no registers are used to pass arguments, and at most 3
+registers can be used. You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries. This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values. You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries. This includes
+the system libraries and startup modules.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits. When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default. When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more. Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry. On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary. This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary. If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties. On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned. Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack. It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size. Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-msse5\fR" 4
+.IX Item "-msse5"
+.IP "\fB\-mno\-sse5\fR" 4
+.IX Item "-mno-sse5"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1SSE4A\s0, \s-1SSE5\s0, \s-1LWP\s0,
+\&\s-1ABM\s0 or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR. Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags. In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions. String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode. While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers. The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option. Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types. This is useful for high resolution counters that could be updated
+by multiple processors (or cores). This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005. \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments. These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library. Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing. \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention. Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0. The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows. On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0. You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default. In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue. This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2. The drawback is a notable
+increase in code size. This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR. Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations. This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary. This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-minline\-compares\fR" 4
+.IX Item "-minline-compares"
+This option enables \s-1GCC\s0 to inline calls to memcmp and strcmp. The
+inlined version does a byte-by-byte comparion using a repeat string
+operation prefix.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with. The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added. Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable automatic generation of fused floating point multiply-add instructions
+if the \s-1ISA\s0 supports such instructions. The \-mfused\-madd option is on by
+default. The fused multiply-add instructions have a different
+rounding behavior compared to executing a multiply followed by an add.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix. The option \fB\-mavx\fR turns this on by default.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code. The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
+Programs can be statically or dynamically linked. This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model. The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space. Small symbols are also placed there. Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB. Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target. This is the default for \s-1HP\-UX\s0.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target. This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register. The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers. This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section. This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value. This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self\-relocatable. This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info. This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit. This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-mt\fR" 4
+.IX Item "-mt"
+.PD 0
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+.PD
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. It does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it. These are HP-UX specific flags.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits. These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ldc\fR" 4
+.IX Item "-msched-ldc"
+.PD 0
+.IP "\fB\-mno\-sched\-ldc\fR" 4
+.IX Item "-mno-sched-ldc"
+.PD
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-ldc\fR" 4
+.IX Item "-mno-sched-control-ldc"
+.PD 0
+.IP "\fB\-msched\-control\-ldc\fR" 4
+.IX Item "-msched-control-ldc"
+.PD
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
+.IX Item "-mno-sched-spec-verbose"
+.PD 0
+.IP "\fB\-msched\-spec\-verbose\fR" 4
+.IX Item "-msched-spec-verbose"
+.PD
+(Dis/En)able printing of the information about speculative motions.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O. You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation. These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers. Note that all modules in a program must
+be compiled with the same value for this option. Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R. This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area. Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections. The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops. This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache. The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture. Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR. ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target. The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR. The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51qe\fR : \fB51qe\fR" 4
+.IX Item "51qe : 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR. Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected. It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR. The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well. These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR. It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used. If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000. This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010. This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020. This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030. This is the default when the compiler is
+configured for 68030\-based systems. It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040. This is the default when the compiler is
+configured for 68040\-based systems. It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040. Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060. This is the default when the compiler is
+configured for 68060\-based systems. It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060. Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0. This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0. This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0. The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions. This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0. It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets. It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions. If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures. Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR). For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide. This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions. The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR. This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning. This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table. At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries. This code is
+larger and slower than code generated without this option. On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k. Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs. However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries. If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-nominmax\fR" 4
+.IX Item "-nominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction. (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int\-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation. Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much. The default
+value is 0x1000.
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR). Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option. The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above. In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR. Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations. The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR. By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions. This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump. \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide. You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR. This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers. For example, scalar
+floating-point values are returned in \fB$f0\fR only, not a
+\&\fB$f0\fR/\fB$f1\fR pair. The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position\-independent,
+and that can therefore be linked into shared libraries. This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position\-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker. However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects. Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations. This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR. For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR. The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k. Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs. If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions. When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs. You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively. \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR. It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+ This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0. This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes. \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C. \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR. You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section. If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition. If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option. However,
+you may wish to build a library that supports several different
+small data limits. You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR. \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR. For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data. This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections. This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so. This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections. This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators. This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction. Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code. The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0. They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions. \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR. At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch. It later aborts these instructions if the
+predicted outcome was wrong. However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads. As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted. If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data. See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted. \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround. It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\& void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively. \s-1GCC\s0 honors this
+restriction for functions it compiles itself. It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers. This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function. If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches). The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases. A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture. By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
+\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned. When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend. Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR. Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register. The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register. The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited. This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors. This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
+is the default.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors. Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses. This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory. This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0. This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive. This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive. This is the default.
+.IP "\fB\-msplit\fR" 4
+.IX Item "-msplit"
+Generate code for a system with split I&D.
+.IP "\fB\-mno\-split\fR" 4
+.IX Item "-mno-split"
+Generate code for a system without split I&D. This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax. This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR. Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type. Code
+generated with this option will run on any of the other \s-1AE\s0 types. The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type. This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0. Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register. Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used. However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code. These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type. The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations. This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support. This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other. However there is a
+large common subset of instructions supported by both. An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using. The default value of these options is
+determined when configuring \s-1GCC\s0. Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root. Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code. With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option. Unless you are building a cross\-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
+\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
+\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBe300c2\fR, \fBe300c3\fR,
+\&\fBe500mc\fR, \fBec603e\fR, \fBG3\fR, \fBG4\fR, \fBG5\fR,
+\&\fBpower\fR, \fBpower2\fR, \fBpower3\fR, \fBpower4\fR,
+\&\fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR, \fBpower7\fR
+\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor. Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec \-mfprnd \-mhard\-float \-mmfcrf \-mmultiple
+\&\-mnew\-mnemonics \-mpopcntb \-mpower \-mpower2 \-mpowerpc64
+\&\-mpowerpc\-gpopt \-mpowerpc\-gfxopt \-msingle\-float \-mdouble\-float
+\&\-msimple\-fpu \-mstring \-mmulhw \-mdlmzb \-mmfpgpr\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities. If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mswdiv\fR" 4
+.IX Item "-mswdiv"
+.PD 0
+.IP "\fB\-mno\-swdiv\fR" 4
+.IX Item "-mno-swdiv"
+.PD
+Generate code to compute division as reciprocal estimate and iterative
+refinement, creating opportunities for increased throughput. This
+feature requires: optional PowerPC Graphics instruction set for single
+precision and \s-1FRE\s0 instruction for double precision, assuming divides
+cannot generate user-visible traps, and the domain values not include
+Infinities, denormals or zero denominator.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set. You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted. An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections. This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated. Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated. Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux). The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant. The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file. The \fB\-mfull\-toc\fR option is selected by
+default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program. \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0. However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
+or both of these options. Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead. This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space. You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs. Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double. Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization. Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
+application written to use message passing with special startup code to
+enable the application to run. The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location. The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit. Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions. These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves. These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location. These instructions are generated by default. If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary. This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating is used.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440 and 464 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440 and 464 processors. This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit\-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. If you
+use \fB\-mrelocatable\fR on any module, all objects linked together must
+be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. Modules
+compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
+compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
+with modules compiled with the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode. The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode. The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable. The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling. The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass. The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups. Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups. Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement. This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-solaris\fR" 4
+.IX Item "-mcall-solaris"
+On System V.4 and embedded PowerPC systems compile code for the Solaris
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped. Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments. With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area. The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option. The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section. Put small uninitialized global
+data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however. This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section. By default, \fInum\fR is 8. The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly. On these systems, long calls are unnecessary and
+generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
+addresses represent the callee and the \*(L"branch island\*(R". The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R". The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions. This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations. When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations. When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions. This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes. Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions. For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR. When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves. When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type. Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR. Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system. This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size. Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions which most probably cause
+a stack overflow. It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays. This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation. The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode. This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available. This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+Increase IEEE-compliance of floating-point code.
+At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
+When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
+comparisons of NANs / infinities incurs extra overhead in every
+floating point comparison, therefore the default is set to
+\&\fB\-ffinite\-math\-only\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write. This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed. Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse. This strategy allows
+cse and hoisting of the inverse calculation. Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends. inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR. This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode. The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap. This will generally generate better
+scheduled code, but is unsafe on current hardware. The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop. For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1. With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register. Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid. Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions. This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross\-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross\-compilation. The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions. The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions. They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction. Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines. Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment. This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address. Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers. It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment. This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object. Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy\-on\-write, and the
+shared object is not actually shared across processes. Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.Sp
+This option is only available on SunOS and Solaris.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
+\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\& v7: cypress
+\& v8: supersparc, hypersparc
+\& sparclite: f930, f934, sparclite86x
+\& sparclet: tsc701
+\& v9: ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture. This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips. With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular cpu implementation. Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register \f(CW%g4\fR points to the base of the data segment. Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references. This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+These switches are supported in addition to the above on Solaris:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations. By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation. \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed. Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change. Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory. With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches. A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits. With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance. \fIn\fR can be a value from 0 to 10. A
+smaller \fIn\fR will insert fewer nops. 10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR. Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint. A branch hint must
+be at least 8 instructions away from the branch it is effecting. \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting. By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function. The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers. The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible. At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler. This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1. The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E. The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e and v850e1 flavors of the v850 architecture. The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs). This option switches from the former to the latter. It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries. The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker. They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls. This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls. This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets. It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behaviour for Cygwin and MinGW targets.
+.IP "\fB\-mcygwin\fR" 4
+.IX Item "-mcygwin"
+This option is available for Cygwin targets. It specifies that
+the Cygwin internal interface is to be used for predefined
+preprocessor macros, C runtime libraries and related linker
+paths and options. For Cygwin targets this is the default behaviour.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mno\-cygwin\fR" 4
+.IX Item "-mno-cygwin"
+This option is available for Cygwin targets. It specifies that
+the MinGW internal interface is to be used instead of Cygwin's, by
+setting MinGW-related predefined macros and linker paths and default
+library options.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets. It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets. It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre\-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option. This has no effect if the
+floating-point option is not also enabled. Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations. This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR. Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools. The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file. This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size. With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references. This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density. The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions. If there are not enough preceding safe density
+instructions to align a target, no widening will be performed. The
+default is \fB\-mtarget\-align\fR. These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction. This
+translation typically occurs for calls to functions in other source
+files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR. This option should be used in
+programs where the call target can potentially be out of range. This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions. Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.Sh "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
+one of the forms is listed\-\-\-the one which is not the default. You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range. This is
+currently only supported by the Java and Fortran front\-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation. This flag enables some optimizations
+and disables others. This option is enabled by default for the Java
+front\-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling. Generates extra code needed to propagate
+exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution. If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it. However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+. You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere. Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions. It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine. The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers. This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target. If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler. In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target. This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory. This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable. This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text. This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine. Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0). The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system). If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position\-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table. This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR. The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR are found.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies. This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table. On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register. The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls. It may be allocated for temporaries or
+variables that do not live across a call. Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions. It may be allocated even for temporaries or variables that
+live across a call. Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes. When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions. Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site. (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\& void __cyg_profile_func_enter (void *this_fn,
+\& void *call_site);
+\& void __cyg_profile_func_exit (void *this_fn,
+\& void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions. The profiling calls will indicate where, conceptually, the
+inline function is entered and exited. This means that addressable
+versions of such functions must be available. If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size. If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided. (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done. This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR). If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented. The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys\*(C'\fR
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW','\fR in one of
+\&\fIsym\fR, write \f(CW','\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=',,tmp'\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation. The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR). The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack. You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that. The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol. If the stack
+would grow beyond the value, a signal is raised. For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fargument\-alias\fR" 4
+.IX Item "-fargument-alias"
+.PD 0
+.IP "\fB\-fargument\-noalias\fR" 4
+.IX Item "-fargument-noalias"
+.IP "\fB\-fargument\-noalias\-global\fR" 4
+.IX Item "-fargument-noalias-global"
+.IP "\fB\-fargument\-noalias\-anything\fR" 4
+.IX Item "-fargument-noalias-anything"
+.PD
+Specify the possible relationships among parameters and between
+parameters and global data.
+.Sp
+\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
+alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
+each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
+alias each other and do not alias global storage.
+\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
+alias any other storage.
+.Sp
+Each language will automatically use whatever option is required by
+the language standard. You should not need to use these options yourself.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file. One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch. Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax. This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default ie; declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications. However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates. Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files. Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions. \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so. These locale categories can be set to any value supported by your
+installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification. \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable. If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler. No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files. For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler. One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work. On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against. Failing to supply the correct flags may lead
+to subtle defects. Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1
new file mode 100644
index 0000000..709140f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1
@@ -0,0 +1,15828 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. | will give a
+.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+ [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+ [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+ [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+ [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking. The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage. For example, the \fB\-c\fR option
+says not to run the linker. Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing. Some options
+control the preprocessor and others the compiler itself. Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly. If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands. Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments. For the most part, the order
+you use doesn't matter. Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified. Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.Sh "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type. Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-no\-canonical\-prefixes
+\&\-pipe \-pass\-exit\-codes
+\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]] \fB\-\-target\-help
+\&\-\-version \-wrapper@\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
+\&\-aux\-info\fR \fIfilename\fR
+\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
+\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
+\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
+\&\-fallow\-single\-precision \-fcond\-mismatch \-flax\-vector\-conversions
+\&\-fsigned\-bitfields \-fsigned\-char
+\&\-funsigned\-bitfields \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
+\&\-fconserve\-space \-ffriend\-injection
+\&\-fno\-elide\-constructors
+\&\-fno\-enforce\-eh\-specs
+\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
+\&\-fno\-implicit\-templates
+\&\-fno\-implicit\-inline\-templates
+\&\-fno\-implement\-inlines \-fms\-extensions
+\&\-fno\-nonansi\-builtins \-fno\-operator\-names
+\&\-fno\-optional\-diags \-fpermissive
+\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
+\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
+\&\-fvisibility\-ms\-compat
+\&\-Wabi \-Wctor\-dtor\-privacy
+\&\-Wnon\-virtual\-dtor \-Wreorder
+\&\-Weffc++ \-Wstrict\-null\-sentinel
+\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
+\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
+\&\fB\-fgnu\-runtime \-fnext\-runtime
+\&\-fno\-nil\-receivers
+\&\-fobjc\-call\-cxx\-cdtors
+\&\-fobjc\-direct\-dispatch
+\&\-fobjc\-exceptions
+\&\-fobjc\-gc
+\&\-freplace\-objc\-classes
+\&\-fzero\-link
+\&\-gen\-decls
+\&\-Wassign\-intercept
+\&\-Wno\-protocol \-Wselector
+\&\-Wstrict\-selector\-match
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
+\&\fB\-fdiagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
+\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Warray\-bounds
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align \-Wcast\-qual
+\&\-Wchar\-subscripts \-Wclobbered \-Wcomment
+\&\-Wconversion \-Wcoverage\-mismatch \-Wno\-deprecated
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization
+\&\-Wno\-div\-by\-zero \-Wempty\-body \-Wenum\-compare \-Wno\-endif\-labels
+\&\-Werror \-Werror=*
+\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral
+\&\-Wformat\-security \-Wformat\-y2k
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wignored\-qualifiers
+\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
+\&\-Winit\-self \-Winline
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations
+\&\-Wlogical\-op \-Wlong\-long
+\&\-Wmain \-Wmaybe\-uninitialized \-Wmissing\-braces \-Wmissing\-field\-initializers
+\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
+\&\-Wmissing\-noreturn \-Wno\-mudflap
+\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow \-Wconversion\-null
+\&\-Woverlength\-strings \-Wpacked \-Wpacked\-bitfield\-compat \-Wpadded
+\&\-Wparentheses \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format
+\&\-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
+\&\-Wreal\-conversion \-Wredundant\-decls
+\&\-Wreturn\-type \-Wripa\-opt\-mismatch \-Wself\-assign \-Wself\-assign\-non\-pod
+\&\-Wsequence\-point \-Wshadow \-Wshadow\-compatible\-local \-Wshadow\-local
+\&\-Wsign\-compare \-Wsign\-conversion \-Wstack\-protector
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
+\&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum \-Wsync\-nand
+\&\-Wsystem\-headers \-Wtrigraphs \-Wtype\-limits \-Wundef \-Wuninitialized
+\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
+\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
+\&\-Wunused\-value \-Wunused\-variable
+\&\-Wvariadic\-macros \-Wvla
+\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
+\&\-Wmissing\-parameter\-type \-Wmissing\-prototypes \-Wnested\-externs
+\&\-Wold\-style\-declaration \-Wold\-style\-definition
+\&\-Wstrict\-prototypes \-Wtraditional \-Wtraditional\-conversion
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
+\&\-fdump\-statistics
+\&\-fdump\-tree\-all
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
+\&\-fdump\-tree\-ch
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
+\&\-fdump\-tree\-sink
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
+\&\-fenable\-icf\-debug
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose
+\&\-ftest\-coverage \-ftime\-report \-fvar\-tracking
+\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
+\&\-ggdb \-gmlt \-gstabs \-gstabs+ \-gstrict\-dwarf \-gno\-strict\-dwarf
+\&\-gvms \-gxcoff \-gxcoff+
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]
+\&\fB\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
+\&\-print\-multi\-directory \-print\-multi\-lib
+\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix
+\&\-save\-temps \-time\fR
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves
+\&\-fcgraph\-section \-fcheck\-data\-deps
+\&\-fconserve\-stack \-fcprop\-registers \-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules \-fcx\-limited\-range
+\&\-fdata\-sections \-fdce \-fdce
+\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fdse \-fdse
+\&\-fearly\-inlining \-fexpensive\-optimizations \-ffast\-math
+\&\-ffinite\-math\-only \-ffloat\-store \-fforward\-propagate
+\&\-ffunction\-sections \-ffvpt \-ffvpt\-functions=\fR\fIffvptfunctions\fR \fB\-fgcse
+\&\-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg \-fipa\-pta
+\&\-fipa\-pure\-const \-fipa\-reference \-fipa\-struct\-reorg
+\&\-fipa\-type\-escape \-fira\-algorithm=\fR\fIalgorithm\fR
+\&\fB\-fira\-region=\fR\fIregion\fR \fB\-fira\-coalesce \-fno\-ira\-share\-save\-slots
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts
+\&\-floop\-block \-floop\-interchange \-floop\-strip\-mine
+\&\-fmerge\-all\-constants \-fmerge\-constants \-fmodulo\-sched
+\&\-fmodulo\-sched\-allow\-regmoves \-fmove\-loop\-invariants \-fmudflap
+\&\-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg \-fno\-default\-inline
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls
+\&\-fpeel\-loops \-fpredictive\-commoning \-fprefetch\-loop\-arrays
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate
+\&\-fprofile\-generate=\fR\fIpath\fR \fB\-fprofile\-generate\-sampling
+\&\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values
+\&\-fpmu\-profile\-generate=\fR\fIpmuoption\fR
+\&\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR
+\&\fB\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops
+\&\-fripa \-fripa\-disallow\-asm\-modules \-fripa\-disallow\-opt\-mismatch
+\&\-fripa\-no\-promote\-always\-inline\-func \-fripa\-verbose
+\&\-frounding\-math \-fsample\-profile \-fsample\-profile\-aggregate\-using
+\&\-fsample\-profile\-use\-entry \-fsched2\-use\-superblocks
+\&\-fsched2\-use\-traces \-fsched\-spec\-load \-fsched\-spec\-load\-dangerous
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB]
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors \-fsee
+\&\-fselective\-scheduling \-fselective\-scheduling2
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop
+\&\-ftree\-copyrename \-ftree\-dce
+\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-fre \-ftree\-loop\-im
+\&\-ftree\-loop\-distribution
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize
+\&\-ftree\-lr\-shrinking
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-reassoc
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb
+\&\-fwhole\-program \-frecord\-options\-in\-elf \-fuse\-ld
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
+\&\fB\-C \-dD \-dI \-dM \-dN
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
+\&\-idirafter\fR \fIdir\fR
+\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
+\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
+\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
+\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
+\&\-P \-fworking\-directory \-remap
+\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
+\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
+\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
+\&\-T\fR \fIscript\fR \fB\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
+\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
+.IP "\fITarget Options\fR" 4
+.IX Item "Target Options"
+\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB \-EL
+\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
+\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame \-mno\-apcs\-frame
+\&\-mabi=\fR\fIname\fR
+\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
+\&\-mapcs\-float \-mno\-apcs\-float
+\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
+\&\-msched\-prolog \-mno\-sched\-prolog
+\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
+\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
+\&\-mthumb\-interwork \-mno\-thumb\-interwork
+\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
+\&\fB\-mabort\-on\-noreturn
+\&\-mlong\-calls \-mno\-long\-calls
+\&\-msingle\-pic\-base \-mno\-single\-pic\-base
+\&\-mpic\-register=\fR\fIreg\fR
+\&\fB\-mnop\-fun\-dllimport
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
+\&\-mpoke\-function\-name
+\&\-mthumb \-marm
+\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
+\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
+\&\-mtp=\fR\fIname\fR
+\&\fB\-mword\-relocations
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-mno\-interrupts
+\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]
+\&\fB\-msim \-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
+\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
+\&\-mlow\-64k \-mno\-low64k \-mstack\-check\-l1 \-mid\-shared\-library
+\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
+\&\fB\-mleaf\-id\-shared\-library \-mno\-leaf\-id\-shared\-library
+\&\-msep\-data \-mno\-sep\-data \-mlong\-calls \-mno\-long\-calls
+\&\-mfast\-fp \-minline\-plt \-mmulticore \-mcorea \-mcoreb \-msdram
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
+\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
+\&\-mstack\-align \-mdata\-align \-mconst\-align
+\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
+\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
+\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
+\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
+\&\-client_name \-compatibility_version \-current_version
+\&\-dead_strip
+\&\-dependency\-file \-dylib_file \-dylinker_install_name
+\&\-dynamic \-dynamiclib \-exported_symbols_list
+\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
+\&\-force_flat_namespace \-headerpad_max_install_names
+\&\-iframework
+\&\-image_base \-init \-install_name \-keep_private_externs
+\&\-multi_module \-multiply_defined \-multiply_defined_unused
+\&\-noall_load \-no_dead_strip_inits_and_terms
+\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
+\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
+\&\-private_bundle \-read_only_relocs \-sectalign
+\&\-sectobjectsymbols \-whyload \-seg1addr
+\&\-sectcreate \-sectobjectsymbols \-sectorder
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
+\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
+\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
+\&\-single_module \-static \-sub_library \-sub_umbrella
+\&\-twolevel_namespace \-umbrella \-undefined
+\&\-unexported_symbols_list \-weak_reference_mismatches
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
+\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
+\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
+\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
+\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mbwx \-mmax \-mfix \-mcix
+\&\-mfloat\-vax \-mfloat\-ieee
+\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
+\&\-msmall\-text \-mlarge\-text
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
+\&\-mhard\-float \-msoft\-float
+\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
+\&\-mdouble \-mno\-double
+\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
+\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
+\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
+\&\-mlibrary\-pic \-macc\-4 \-macc\-8
+\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
+\&\-moptimize\-membar \-mno\-optimize\-membar
+\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
+\&\-mvliw\-branch \-mno\-vliw\-branch
+\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
+\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
+\&\-mTLS \-mtls
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR
+\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
+\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
+\&\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
+\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
+\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
+\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
+\&\-mno\-portable\-runtime \-mno\-soft\-float
+\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
+\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
+\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
+\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mfpmath=\fR\fIunit\fR
+\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
+\&\-mno\-fp\-ret\-in\-387 \-msoft\-float
+\&\-mno\-wide\-multiply \-mrtd \-malign\-double
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mrecip
+\&\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx
+\&\-maes \-mpclmul
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-msse5 \-mlwp
+\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
+\&\-minline\-stringops\-dynamically \-minline\-compares
+\&\-mstringop\-strategy=\fR\fIalg\fR \fB\-mpush\-args \-maccumulate\-outgoing\-args
+\&\-m128bit\-long\-double \-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
+\&\-mveclibabi=\fR\fItype\fR \fB\-mpc32 \-mpc64 \-mpc80 \-mstackrealign
+\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR
+\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
+\&\fB\-mfused\-madd \-mno\-fused\-madd \-msse2avx\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
+\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
+\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
+\&\-minline\-float\-divide\-max\-throughput
+\&\-minline\-int\-divide\-min\-latency
+\&\-minline\-int\-divide\-max\-throughput
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
+\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
+\&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
+\&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
+\&\-mno\-sched\-prefer\-non\-data\-spec\-insns
+\&\-mno\-sched\-prefer\-non\-control\-spec\-insns
+\&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r
+\&\-mdebug
+\&\-malign\-loops \-mno\-align\-loops
+\&\-missue\-rate=\fR\fInumber\fR
+\&\fB\-mbranch\-cost=\fR\fInumber\fR
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
+\&\fB\-msdata=\fR\fIsdata-type\fR
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR \fB\-mcpu=\fR\fIcpu\fR \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
+\&\-m68060 \-mcpu32 \-m5200 \-m5206e \-m528x \-m5307 \-m5407
+\&\-mcfv4e \-mbitfield \-mno\-bitfield \-mc68000 \-mc68020
+\&\-mnobitfield \-mrtd \-mno\-rtd \-mdiv \-mno\-div \-mshort
+\&\-mno\-short \-mhard\-float \-m68881 \-msoft\-float \-mpcrel
+\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
+\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
+\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
+\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
+\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
+\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
+\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
+\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2
+\&\-mips64 \-mips64r2
+\&\-mips16 \-mno\-mips16 \-mflip\-mips16
+\&\-minterlink\-mips16 \-mno\-interlink\-mips16
+\&\-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
+\&\-mshared \-mno\-shared \-mplt \-mno\-plt \-mxgot \-mno\-xgot
+\&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
+\&\-msingle\-float \-mdouble\-float \-mdsp \-mno\-dsp \-mdspr2 \-mno\-dspr2
+\&\-mfpu=\fR\fIfpu-type\fR
+\&\fB\-msmartmips \-mno\-smartmips
+\&\-mpaired\-single \-mno\-paired\-single \-mdmx \-mno\-mdmx
+\&\-mips3d \-mno\-mips3d \-mmt \-mno\-mt \-mllsc \-mno\-llsc
+\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
+\&\-G\fR\fInum\fR \fB\-mlocal\-sdata \-mno\-local\-sdata
+\&\-mextern\-sdata \-mno\-extern\-sdata \-mgpopt \-mno\-gopt
+\&\-membedded\-data \-mno\-embedded\-data
+\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
+\&\-mcode\-readable=\fR\fIsetting\fR
+\&\fB\-msplit\-addresses \-mno\-split\-addresses
+\&\-mexplicit\-relocs \-mno\-explicit\-relocs
+\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
+\&\-mdivide\-traps \-mdivide\-breaks
+\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
+\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
+\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
+\&\-mfix\-r10000 \-mno\-fix\-r10000 \-mfix\-vr4120 \-mno\-fix\-vr4120
+\&\-mfix\-vr4130 \-mno\-fix\-vr4130 \-mfix\-sb1 \-mno\-fix\-sb1
+\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
+\&\-mbranch\-cost=\fR\fInum\fR \fB\-mbranch\-likely \-mno\-branch\-likely
+\&\-mfp\-exceptions \-mno\-fp\-exceptions
+\&\-mvr4130\-align \-mno\-vr4130\-align\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
+\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
+\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
+\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug \-mno\-mult\-bug
+\&\-mam33 \-mno\-am33
+\&\-mam33\-2 \-mno\-am33\-2
+\&\-mreturn\-pointer\-on\-d0
+\&\-mno\-crt0 \-mrelax\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
+\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
+\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
+\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
+\&\-mbranch\-expensive \-mbranch\-cheap
+\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
+\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
+\&\-maltivec \-mno\-altivec
+\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
+\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
+\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mnew\-mnemonics \-mold\-mnemonics
+\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
+\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
+\&\-malign\-power \-malign\-natural
+\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu
+\&\-mstring \-mno\-string \-mupdate \-mno\-update
+\&\-mavoid\-indexed\-addresses \-mno\-avoid\-indexed\-addresses
+\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
+\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
+\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
+\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
+\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
+\&\fB\-mcall\-sysv \-mcall\-netbsd
+\&\-maix\-struct\-return \-msvr4\-struct\-return
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
+\&\-misel \-mno\-isel
+\&\-misel=yes \-misel=no
+\&\-mspe \-mno\-spe
+\&\-mspe=yes \-mspe=no
+\&\-mpaired
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode
+\&\-mvrsave \-mno\-vrsave
+\&\-mmulhw \-mno\-mulhw
+\&\-mdlmzb \-mno\-dlmzb
+\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
+\&\-mprototype \-mno\-prototype
+\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
+\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mhard\-float \-msoft\-float \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mlong\-double\-64 \-mlong\-double\-128
+\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
+\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
+\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
+\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
+\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel
+\&\-mnhwloop
+\&\-muls
+\&\-mmac
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
+\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
+\&\-m5\-64media \-m5\-64media\-nofpu
+\&\-m5\-32media \-m5\-32media\-nofpu
+\&\-m5\-compact \-m5\-compact\-nofpu
+\&\-mb \-ml \-mdalign \-mrelax
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
+\&\-mieee \-mbitops \-misize \-minline\-ic_invalidate \-mpadstruct \-mspace
+\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
+\&\-minvalid\-symbols\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mcmodel=\fR\fIcode-model\fR
+\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
+\&\-mfaster\-structs \-mno\-faster\-structs
+\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
+\&\-mhard\-quad\-float \-msoft\-quad\-float
+\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
+\&\-mstack\-bias \-mno\-stack\-bias
+\&\-munaligned\-doubles \-mno\-unaligned\-doubles
+\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc
+\&\-msafe\-dma \-munsafe\-dma
+\&\-mbranch\-hints
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain
+\&\-mfixed\-range=\fR\fIregister-range\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
+\&\-mprolog\-function \-mno\-prolog\-function \-mspace
+\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
+\&\fB\-mapp\-regs \-mno\-app\-regs
+\&\-mdisable\-callt \-mno\-disable\-callt
+\&\-mv850e1
+\&\-mv850e
+\&\-mv850 \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg \-mgnu \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp \-non\-static \-Bstatic \-Bdynamic
+\&\-Xbind\-lazy \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread \-mwin32 \-mwindows\fR
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16
+\&\-mfused\-madd \-mno\-fused\-madd
+\&\-mserialize\-volatile \-mno\-serialize\-volatile
+\&\-mtext\-section\-literals \-mno\-text\-section\-literals
+\&\-mtarget\-align \-mno\-target\-align
+\&\-mlongcalls \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
+\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
+\&\-fnon\-call\-exceptions \-funwind\-tables
+\&\-fasynchronous\-unwind\-tables
+\&\-finhibit\-size\-directive \-finstrument\-functions
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...
+\&\-fno\-common \-fno\-ident
+\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
+\&\-fno\-jump\-tables
+\&\-frecord\-gcc\-switches
+\&\-freg\-struct\-return \-fshort\-enums
+\&\-fshort\-double \-fshort\-wchar
+\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
+\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
+\&\fB\-fno\-stack\-limit \-fargument\-alias \-fargument\-noalias
+\&\-fargument\-noalias\-global \-fargument\-noalias\-anything
+\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
+\&\fB\-ftrapv \-fwrapv \-fbounds\-check
+\&\-fvisibility\fR
+.Sh "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header.
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR. Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration). Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body). Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix). This option applies to all following input files until
+the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 8
+\& c c-header c-cpp-output
+\& c++ c++-header c++-cpp-output
+\& objective-c objective-c-header objective-c-cpp-output
+\& objective-c++ objective-c++-header objective-c++-cpp-output
+\& assembler assembler-with-cpp
+\& ada
+\& f77 f77-cpp-input f95 f95-cpp-input
+\& java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code. If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication. The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop. Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link. The linking
+stage simply is not done. The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble. The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper. The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR. This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation. Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and all command
+arguments are quoted. This is useful for shell scripts to capture the
+driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation. This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-combine\fR" 4
+.IX Item "-combine"
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
+language for which this is supported is C. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with \fB\-save\-temps\fR, the compiler will generate multiple
+pre-processed files
+(one for each source file), but only one (combined) \fI.o\fR or
+\&\fI.s\fR file.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept. If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool. For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers. These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options. Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed. This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\& --help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\& --help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display. One
+case where it does work however is when one of the classes is
+\&\fItarget\fR. So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\& --help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line. Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed. Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\& % gcc -Q -mabi=2 --help=target -c
+\& The following options are target specific:
+\& -mabi= 2
+\& -mabort-on-noreturn [disabled]
+\& -mapcs [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\& -Q -O2 --help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\& gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+\& gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+\& diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program. It takes a single
+comma separated list as an argument, which will be used to invoke
+the wrapper:
+.Sp
+.Vb 1
+\& gcc -c t.c -wrapper gdb,--args
+.Ve
+.Sp
+This will invoke all subprograms of gcc under \*(L"gdb \-\-args\*(R",
+thus cc1 invocation will be \*(L"gdb \-\-args cc1 ...\*(R".
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler. The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.Sh "Compiling \*(C+ Programs"
+.IX Subsection "Compiling Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library. This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations. On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.Sh "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c89\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using. It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR. Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously. For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used. Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard. This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc89\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu89\fR or \fBgnu++98\fR. By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it. For example,
+\&\fB\-std=c89\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected. The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu89 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.PD 0
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.4/c99status.html\fR> for more information. The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default. The name \fBgnu9x\fR is deprecated.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+ This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3. In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode. Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior). This option was first supported in
+\&\s-1GCC\s0 4.3. This option is not supported in C89 or gnu89 mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files. This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character). In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers. You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops. The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library. In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function. For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored. There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\& #define abs(n) __builtin_abs ((n))
+\& #define strcpy(d, s) __builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment. This implies
+\&\fB\-fbuiltin\fR. A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment. This
+implies \fB\-fno\-builtin\fR. A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>. This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling. This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option. The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling. The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler. They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments. The value of such an expression is void. This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types. This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for. This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR. Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.Sh "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in. For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\& g++ -g -frepo -O -c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking. This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated. This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option. In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does. This saves space in the executable at the
+cost of not diagnosing duplicate definitions. If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\& template <class T> auto forward(T t) -> decltype (realfn (t))
+\& {
+\& return realfn (t);
+\& }
+.Ve
+.Sp
+.Vb 4
+\& void f()
+\& {
+\& forward({1,2}); // call forward<std::initializer_list<int>>
+\& }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup. This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime. This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR. This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue. Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings. Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time. This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
+of the language, you can save some space by using this flag. Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth-n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17.
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread\-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal. When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available. This
+option exists only for testing, and should not be used by end\-users;
+it will result in inferior code and has no benefits. This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories. (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+ Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective\-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C, and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code. There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities at this point include:
+.RS 4
+.IP "*" 4
+Incorrect handling of tail-padding for bit\-fields. G++ may attempt to
+pack data into the same byte as a base class. For example:
+.Sp
+.Vb 2
+\& struct A { virtual void f(); int f1 : 1; };
+\& struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "*" 4
+Incorrect handling of tail-padding for virtual bases. G++ does not use
+tail padding when laying out virtual bases. For example:
+.Sp
+.Vb 3
+\& struct A { virtual void f(); char c1; };
+\& struct B { B(); char c2; };
+\& struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "*" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union. For
+example:
+.Sp
+.Vb 1
+\& union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "*" 4
+Empty classes can be placed at incorrect offsets. For example:
+.Sp
+.Vb 1
+\& struct A {};
+.Ve
+.Sp
+.Vb 4
+\& struct B {
+\& A a;
+\& virtual void f ();
+\& };
+.Ve
+.Sp
+.Vb 1
+\& struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero. G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "*" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\& template <typename Q>
+\& void f(typename Q::X) {}
+.Ve
+.Sp
+.Vb 2
+\& template <template <typename> class Q>
+\& void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes. The known psABI changes at this
+point include:
+.IP "*" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI. For example:
+.Sp
+.Vb 4
+\& union U {
+\& long double ld;
+\& int i;
+\& };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed. For instance:
+.Sp
+.Vb 5
+\& struct A {
+\& int i;
+\& int j;
+\& A(): j (0), i (1) { }
+\& };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect. This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "*" 4
+Item 11: Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "*" 4
+Item 12: Prefer initialization to assignment in constructors.
+.IP "*" 4
+Item 14: Make destructors virtual in base classes.
+.IP "*" 4
+Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "*" 4
+Item 23: Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "*" 4
+Item 6: Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "*" 4
+Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer. But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template. Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function. (Section
+14.5.3). Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function. Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class. For example, in:
+.Sp
+.Vb 3
+\& struct A {
+\& virtual void f();
+\& };
+.Ve
+.Sp
+.Vb 3
+\& struct B: public A {
+\& void f(int);
+\& };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\& B* b;
+\& b->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size. Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\& struct A {
+\& operator int ();
+\& A& operator = (int);
+\& };
+.Ve
+.Sp
+.Vb 5
+\& main ()
+\& {
+\& A a,b;
+\& a = b;
+\& }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.Sh "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves. See
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\& gcc -g -fgnu-runtime -O -c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime. This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime. This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (e.g.,
+\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
+is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
+to be used. Currently, this option is only available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
+thusly generated will only operate on instance variables declared in the
+current Objective-C class, and not those inherited from superclasses. It
+is the responsibility of the Objective-C runtime to invoke all such methods
+in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
+will be invoked by the runtime immediately after a new object
+instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
+be invoked immediately before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher. On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in Objective\-C,
+similar to what is offered by \*(C+ and Java. This option is
+unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
+earlier.
+.Sp
+.Vb 23
+\& @try {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+\& @catch (AnObjCClass *exc) {
+\& ...
+\& @throw expr;
+\& ...
+\& @throw;
+\& ...
+\& }
+\& @catch (AnotherClass *exc) {
+\& ...
+\& }
+\& @catch (id allOthers) {
+\& ...
+\& }
+\& @finally {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+.Ve
+.Sp
+The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
+Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
+\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
+the object caught by the \f(CW@catch\fR will be rethrown.
+.Sp
+Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme. When an object is thrown, it will be caught
+by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
+analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
+\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
+any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
+clauses (if any).
+.Sp
+The \f(CW@finally\fR clause, if present, will be executed upon exit from the
+immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
+regardless of whether any exceptions are thrown, caught or rethrown
+inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
+of the \f(CW\*(C`finally\*(C'\fR clause in Java.
+.Sp
+There are several caveats to using the new exception mechanism:
+.RS 4
+.IP "*" 4
+Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
+idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
+exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
+systems, due to additional functionality needed in the (NeXT) Objective-C
+runtime.
+.IP "*" 4
+As mentioned above, the new exceptions do not support handling
+types other than Objective-C objects. Furthermore, when used from
+Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
+exceptions at this time. This means you cannot \f(CW@throw\fR an exception
+from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
+(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
+.RE
+.RS 4
+.Sp
+The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
+blocks for thread-safe execution:
+.Sp
+.Vb 3
+\& @synchronized (ObjCClass *guard) {
+\& ...
+\& }
+.Ve
+.Sp
+Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
+first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
+object by another thread. If it has, the current thread shall wait until
+the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
+the current thread will place its own lock on it, execute the code contained in
+the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
+making \f(CW\*(C`guard\*(C'\fR available to other threads).
+.Sp
+Unlike Java, Objective-C does not allow for entire methods to be marked
+\&\f(CW@synchronized\fR. Note that throwing exceptions out of
+\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
+to be unlocked properly.
+.RE
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead. This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself. Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained. This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class. The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation. The check is performed on the list of methods
+in the final stage of compilation. Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation. Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective\-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found. A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section. This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation. This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.Sh "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...). The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported. Right now, only the \*(C+ front end can
+honor these options. However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode. Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines. This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode. Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fdiagnostics\-show\-option\fR" 4
+.IX Item "-fdiagnostics-show-option"
+This option instructs the diagnostic machinery to add text to each
+diagnostic emitted, which indicates which command line option directly
+controls that diagnostic, when such an option is known to the
+diagnostic machinery.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information. By default, this warning is enabled and is treated as an
+error. \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error. Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code\-base.
+Completely disabling the warning is not recommended.
+.Sh "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error. The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors. This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
+option to have each controllable warning amended with the option which
+controls it, to determine what to use with this option.
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations. Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR. This manual lists only one of the
+two forms, whichever is not the default. For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well. With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance. They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR. We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based. Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard. (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros. This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)
+\&\fB\-Wc++0x\-compat
+\&\-Wchar\-subscripts
+\&\-Wimplicit\-int
+\&\-Wimplicit\-function\-declaration
+\&\-Wcomment
+\&\-Wformat
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)
+\&\fB\-Wmaybe\-uninitialized
+\&\-Wmissing\-braces
+\&\-Wnonnull
+\&\-Wparentheses
+\&\-Wpointer\-sign
+\&\-Wreorder
+\&\-Wreturn\-type
+\&\-Wripa\-opt\-mismatch
+\&\-Wsequence\-point
+\&\-Wsign\-compare\fR (only in \*(C+)
+\&\fB\-Wstrict\-aliasing
+\&\-Wstrict\-overflow=1
+\&\-Wswitch
+\&\-Wtrigraphs
+\&\-Wuninitialized
+\&\-Wunknown\-pragmas
+\&\-Wunused\-function
+\&\-Wunused\-label
+\&\-Wunused\-value
+\&\-Wunused\-variable
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR. Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR. The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered
+\&\-Wempty\-body
+\&\-Wignored\-qualifiers
+\&\-Wmissing\-field\-initializers
+\&\-Wmissing\-parameter\-type\fR (C only)
+\&\fB\-Wold\-style\-declaration\fR (C only)
+\&\fB\-Woverride\-init
+\&\-Wsign\-compare
+\&\-Wtype\-limits
+\&\-Wuninitialized
+\&\-Wmaybe\-uninitialized
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) \fB
+\&\fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "*" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "*" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "*" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "*" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "*" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "*" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense. This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions. Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations. However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems. At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
+string came from untrusted input and contains \fB%n\fR. (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C, \*(C+, Objective\-C, and Objective\-\*(C+ only)" 4
+.IX Item "-Wnonnull (C, , Objective-C, and Objective- only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\& int f()
+\& {
+\& int i = i;
+\& return i;
+\& }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR" 4
+.IX Item "-Wimplicit"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR. For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types. This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed. In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\& int a[2][2] = { 0, 1, 2, 3 };
+\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
+such a case:
+.Sp
+.Vb 7
+\& {
+\& if (a)
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose. When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified. To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would
+look like this:
+.Sp
+.Vb 9
+\& {
+\& if (a)
+\& {
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+\& }
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it. These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified. All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified. However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect. Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R". If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wself\-assign\fR" 4
+.IX Item "-Wself-assign"
+Warn about self-assignment and self\-initialization. This warning is intended
+for detecting accidental self-assignment due to typos, and therefore does
+not warn on a statement that is semantically a self-assignment after
+constant folding. Here is an example of what will trigger a self-assign
+warning and what will not:
+.Sp
+.Vb 6
+\& void func()
+\& {
+\& int i = 2;
+\& int x = x; /* warn */
+\& float f = 5.0;
+\& double a[3];
+.Ve
+.Sp
+.Vb 5
+\& i = i + 0; /* not warn */
+\& f = f / 1; /* not warn */
+\& a[1] = a[1]; /* warn */
+\& i += 0; /* not warn */
+\& }
+.Ve
+.Sp
+In \*(C+ it will not warn on self-assignment of non-POD variables unless
+\&\fB\-Wself\-assign\-non\-pod\fR is also enabled.
+.IP "\fB\-Wself\-assign\-non\-pod\fR" 4
+.IX Item "-Wself-assign-non-pod"
+Warn about self-assignment of non-POD variables. This is a \*(C+\-specific
+warning and only effective when \fB\-Wself\-assign\fR is enabled.
+.Sp
+There are cases where self-assignment might be intentional. For example,
+a \*(C+ programmer might write code to test whether an overloaded
+\&\f(CW\*(C`operator=\*(C'\fR works when the same object is assigned to itself.
+One way to work around the self-assign warning in such cases when this flag
+is enabled is using the functional form \f(CW\*(C`object.operator=(object)\*(C'\fR
+instead of the assignment form \f(CW\*(C`object = object\*(C'\fR, as shown in the
+following example.
+.Sp
+.Vb 3
+\& void test_func()
+\& {
+\& MyType t;
+.Ve
+.Sp
+.Vb 3
+\& t.operator=(t); // not warn
+\& t = t; // warn
+\& }
+.Ve
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with a
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified. The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wripa\-opt\-mismatch\fR" 4
+.IX Item "-Wripa-opt-mismatch"
+When doing an \s-1FDO\s0 build with \fB\-fprofile\-use\fR and \fB\-fripa\fR,
+warn if importing an axuiliary module that was built with a different
+\&\s-1GCC\s0 command line during the profile-generate phase than the primary
+module.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used. These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+Note that a classic way to avoid \fB\-Wunused\-variable\fR warning is
+using \f(CW\*(C`x = x\*(C'\fR, but that does not work with \fB\-Wself\-assign\fR.
+Use \f(CW\*(C`(void) x\*(C'\fR or \f(CW\*(C`static_cast<void>(x)\*(C'\fR instead.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole. They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.IP "\fB\-Wmaybe\-uninitialized\fR" 4
+.IX Item "-Wmaybe-uninitialized"
+For an automatic variable, if there exists a path from the function
+entry to a use of the variable that is initialized, but there exist
+some other paths the variable is not initialized, the compiler will
+emit a warning if it can not prove the uninitialized paths do not
+happen at runtime. These warnings are made optional because \s-1GCC\s0 is
+not smart enough to see all the reasons why the code might be correct
+despite appearing to have an error. Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\& {
+\& int x;
+\& switch (y)
+\& {
+\& case 1: x = 1;
+\& break;
+\& case 2: x = 4;
+\& break;
+\& case 3: x = 5;
+\& }
+\& foo (x);
+\& }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
+warning, the user needs to provide a default case with \fIassert\fR\|(0) or
+similar code.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code. As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files. This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas. See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization. The warning does not catch all
+cases, but does attempt to catch the more common pitfalls. It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives. However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced. Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken. Warns about
+incomplete types. Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common punn+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur. Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization. Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur. Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem. To help focus on important issues, several
+warning levels are defined. No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid. For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR. This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified. For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \-O2 and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero. Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read. Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code. However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers. If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem). In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "*" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "*" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line. Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line. It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them. Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "*" 4
+A function-like macro that appears without arguments.
+.IP "*" 4
+The unary plus operator.
+.IP "*" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
+constants.) Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "*" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "*" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "*" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "*" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type. This warning is only issued if
+the base of the constant is ten. I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "*" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "*" 4
+Initialization of automatic aggregates.
+.IP "*" 4
+Identifier conflicts with labels. Traditional C lacks a separate
+namespace for labels.
+.IP "*" 4
+Initialization of unions. If the initializer is zero, the warning is
+omitted. This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "*" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa. The absence of these prototypes when compiling with traditional
+C would cause serious problems. This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "*" 4
+Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype. This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block. This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable shadows another local variable, parameter or
+global variable or whenever a built-in function is shadowed.
+.IP "\fB\-Wshadow\-local\fR" 4
+.IX Item "-Wshadow-local"
+Warn when a local variable shadows another local variable or parameter.
+.IP "\fB\-Wshadow\-compatible\-local\fR" 4
+.IX Item "-Wshadow-compatible-local"
+Warn when a local variable shadows another local variable or parameter
+whose type is compatible with that of the shadowing variable. In \*(C+,
+type compatibility here means the type of the shadowing variable can be
+converted to that of the shadowed variable. The creation of this flag
+(in addition to \fB\-Wshadow\-local\fR) is based on the idea that when
+a local variable shadows another one of incompatible type, it is most
+likely intentional, not a bug or typo, as shown in the following example:
+.Sp
+.Vb 8
+\& for (SomeIterator i = SomeObj.begin(); i != SomeObj.end(); ++i)
+\& {
+\& for (int i = 0; i < N; ++i)
+\& {
+\& ...
+\& }
+\& ...
+\& }
+.Ve
+.Sp
+Since the two variable \f(CW\*(C`i\*(C'\fR in the example above have incompatible types,
+enabling only \fB\-Wshadow\-compatible\-local\fR will not emit a warning.
+Because their types are incompatible, if a programmer accidentally uses one
+in place of the other, type checking will catch that and emit an error or
+warning. So not warning (about shadowing) in this case will not lead to
+undetected bugs. Use of this flag instead of \fB\-Wshadow\-local\fR can
+possibly reduce the number of warnings triggered by intentional shadowing.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning. In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices. With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu\-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions. In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR. This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions. For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR. This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning. These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR. This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR. Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types; confusing overload resolution for user-defined conversions; and
+conversions that will never use a type conversion operator:
+conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a reference
+to them. Warnings about conversions between signed and unsigned
+integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wconversion\-null\fR" 4
+.IX Item "-Wconversion-null"
+Warn about peculiar, but valid, conversions from/to \f(CW\*(C`NULL\*(C'\fR.
+This includes converting \f(CW\*(C`NULL\*(C'\fR to non-pointer type and
+converting the boolean value \f(CW\*(C`false\*(C'\fR to \f(CW\*(C`NULL\*(C'\fR. This warning
+is also enabled by \fB\-Wconversion\fR and only effective in \*(C+.
+.IP "\fB\-Wreal\-conversion\fR" 4
+.IX Item "-Wreal-conversion"
+Warn for implicit type conversions from real (\f(CW\*(C`double\*(C'\fR or \f(CW\*(C`float\*(C'\fR)
+to integral values.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wenum-compare ( and Objective- only)"
+Warn about a comparison between values of different enum types. This
+warning is enabled by default.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called. (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc. This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined. This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types. (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration. This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used. A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\& void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration. This warning is issued even if the definition itself
+provides a prototype. The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files. In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing. For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-noreturn\fR" 4
+.IX Item "-Wmissing-noreturn"
+Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
+Note these are only possible candidates, not absolute ones. Care should
+be taken to manually verify functions actually do not ever return before
+adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
+bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
+hosted C environments.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes. Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type. I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
+possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters. However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same. To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports. The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers. That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR. You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit. For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\& struct foo {
+\& int x;
+\& char a, b, c, d;
+\& } __attribute__((packed));
+\& struct bar {
+\& char z;
+\& struct foo f;
+\& };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR. This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout. \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\& struct foo
+\& {
+\& char a:4;
+\& char b:8;
+\& } __attribute__ ((packed));
+.Ve
+.Sp
+This warning is enabled by default. Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure. Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Wunreachable\-code\fR" 4
+.IX Item "-Wunreachable-code"
+Warn if the compiler detects that code will never be executed.
+.Sp
+This option is intended to warn when the compiler detects that at
+least a whole line of source code will never be executed, because
+some condition is never satisfied or because it is after a
+procedure that never returns.
+.Sp
+It is possible for this option to produce a warning even though there
+are circumstances under which part of the affected line can be executed,
+so care should be taken when removing apparently-unreachable code.
+.Sp
+For instance, when a function is inlined, a warning may mean that the
+line is unreachable in only one inlined copy of the function.
+.Sp
+This option is not made part of \fB\-Wall\fR because in a debugging
+version of a program there is often substantial code which checks
+correct functioning of the program and is, hopefully, unreachable
+because the program does work. Another common use of unreachable
+code is to provide behavior which is selectable at compile\-time.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function. For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function. Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined. In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.) This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-int-to-pointer-cast (C and Objective-C only)"
+Suppress warnings from casts to pointer type of an integer of a
+different size.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used. This is default. To inhibit
+the warning messages, use \fB\-Wno\-long\-long\fR. Flags
+\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
+only when \fB\-pedantic\fR flag is used.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile. The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled. This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively. Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective\-C. It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active. It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard. Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
+C99, it was raised to 4095. \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.Sh "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program. If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output. This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0. This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-2\fR" 4
+.IX Item "-gdwarf-2"
+Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
+supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
+option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
+version 3 is upward compatible with version 2, but may still cause
+problems for older debuggers.
+.IP "\fB\-gdwarf\-4\fR" 4
+.IX Item "-gdwarf-4"
+Produce debugging information in \s-1DWARF\s0 version 4 format (if that is
+supported). With this option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 4
+when they are useful, including the placement of most type information
+in separate comdat sections. The \s-1DWARF\s0 version 4 format is still a
+draft specification, and this option is currently experimental.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR. On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+This option currently disables only the output of discriminator information
+in line number tables when not using \s-1DWARF\s0 version 4.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information. The default level is 2.
+.Sp
+Level 0 produces no debug information at all. Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug. This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program. Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing. That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF2\s0.
+.IP "\fB\-gmlt\fR" 4
+.IX Item "-gmlt"
+Produce a minimal line table, with level 1 debugging information plus
+information about inlined functions and line numbers.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol. This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax
+[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files. Merging is
+not supported by all assemblers or linkers. Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time. Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented. During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns. When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file. In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking). See the documentation for those options for more details.
+.RS 4
+.IP "*" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options. For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option. You do not need to profile
+every source file in a program.
+.IP "*" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "*" 4
+Run the program on a representative workload to generate the arc profile
+information. This may be repeated any number of times. You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated. Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "*" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "*" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed. When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage. Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data. Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upperbound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upperbound. \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upperbound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upperbound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upperbound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR. This is used for debugging the RTL-based passes of the
+compiler. The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file. \fIdumpname\fR is
+generated from the name of the output file, if explicitly specified
+and it is not an executable, otherwise it is the basename of the
+source file. These switches may have different effects when
+\&\fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR. Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery. This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling. This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers. This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dm\fR" 4
+.IX Item "-dm"
+Print statistics on memory usage, at the end of the run, to
+standard error.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used. The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+Dump debugging information during parsing, to standard error.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output. This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file. The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file. The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file. If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+.PD 0
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-ipa-switch-options"
+.PD
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR controls the details
+of the dump as described for the \fB\-fdump\-tree\fR options. The
+following dumps are possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file. The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file. If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them. The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump. Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored. The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node. Usually this is not meaningful as it
+changes according to the environment and source file. Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path. When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree. By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dump the call graph of the compilation unit to a file in \s-1VCG\s0 format. The file
+name is made by appending \fI.cgraph.vcg\fR to the respective dump file name.
+This is primarily useful with \fB\-fdump\-ipa\fR.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file. The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file. The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
+file name is made by appending \fI.vcg\fR to the source file name. Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0. You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers. The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file. The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function. The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0. The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after \s-1STORE\-CCP\s0. The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination. The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination. The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation. The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy\-propagation. The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination. The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation. The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates. The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking. The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations. The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination. The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables. The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization. The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees. The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops. The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner\-most, single\-bb, single\-entry/exit loops. This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If \fIn\fR=3, alignment related information is added to the reports.
+If \fIn\fR=4, data-references related information (e.g. memory dependences,
+memory access\-patterns) is added to the reports.
+If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control\-flow).
+If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
+For \fIn\fR=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers. It is used to generate certain symbol names
+that have to be different in every compiled file. It is also used to
+place unique stamps in coverage data files and the object files that
+produce them. You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints. This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched\fR or \fI.sched2\fR
+respectively. However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info. For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file. Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.IP "\fB\-time\fR" 4
+.IX Item "-time"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence. For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done). The output looks like this:
+.Sp
+.Vb 2
+\& # cc1 0.12 0.01
+\& # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself. The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else. With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line. This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them. The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@} instead of the
+\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
+ease shell\-processing.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR. You can do
+.Sp
+.Vb 1
+\& gcc -nostdlib <files>... `gcc -print-libgcc-file-name`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation. This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options. If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else. (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit. Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared). More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.Sh "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results. Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program. Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag. Only
+optimizations that have a flag are listed.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize. Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec
+\&\-fcprop\-registers
+\&\-fdce
+\&\-fdefer\-pop
+\&\-fdelayed\-branch
+\&\-fdse
+\&\-fguess\-branch\-probability
+\&\-fif\-conversion2
+\&\-fif\-conversion
+\&\-finline\-small\-functions
+\&\-fipa\-pure\-const
+\&\-fipa\-reference
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types
+\&\-ftree\-builtin\-call\-dce
+\&\-ftree\-ccp
+\&\-ftree\-ch
+\&\-ftree\-copyrename
+\&\-ftree\-dce
+\&\-ftree\-dominator\-opts
+\&\-ftree\-dse
+\&\-ftree\-fre
+\&\-ftree\-sra
+\&\-ftree\-ter
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps
+\&\-falign\-functions \-falign\-jumps
+\&\-falign\-loops \-falign\-labels
+\&\-fcaller\-saves
+\&\-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
+\&\-fdelete\-null\-pointer\-checks
+\&\-fexpensive\-optimizations
+\&\-fgcse \-fgcse\-lm
+\&\-findirect\-inlining
+\&\-foptimize\-sibling\-calls
+\&\-fpeephole2
+\&\-fregmove
+\&\-freorder\-blocks \-freorder\-functions
+\&\-frerun\-cse\-after\-loop
+\&\-fsched\-interblock \-fsched\-spec
+\&\-fschedule\-insns \-fschedule\-insns2
+\&\-fstrict\-aliasing \-fstrict\-overflow
+\&\-ftree\-switch\-conversion
+\&\-ftree\-pre
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more. \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR and \fB\-ftree\-vectorize\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results. This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size. It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
+\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
+\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags. Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use. You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations. They are either
+activated by \fB\-O\fR options or are related to ones that are. You
+can use the following flags in the rare cases when \*(L"fine\-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only). Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns. For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0. The pass tries to combine two
+instructions and checks if the result can be simplified. If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O2\fR,
+\&\fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one. This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions. \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist. The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller). The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining. This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers. The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
+allows coarse control of this limit. \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size. In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers. This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C89. In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR. In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types. Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass. This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed. By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis. This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0. This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section. E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests. Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors. The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi\-threaded. Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads. This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found. If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently. This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path. For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks. When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves. This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination. This pass will attempt to move
+stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite. This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
+resulting code may or may not perform better than without cross\-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this. Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents. This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics. The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Use global dataflow analysis to identify and eliminate useless checks
+for null pointers. The compiler assumes that dereferencing a null
+pointer would have halted the program. If a pointer is checked after
+it has already been dereferenced, it cannot be null.
+.Sp
+In some environments, this assumption is not true, and programs can
+safely dereference null pointers. Use
+\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying. This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator. The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR. The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring. The second
+algorithm can be unimplemented for some architectures. If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator. The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR. The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-coalesce\fR" 4
+.IX Item "-fira-coalesce"
+Do optimistic register coalescing. This option might be profitable for
+architectures with big regular register files.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call. Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo\-registers. Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be. Default value is 5. If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable. This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done. This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm. Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules. This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched2\-use\-traces\fR" 4
+.IX Item "-fsched2-use-traces"
+Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
+allocation and additionally perform code duplication in order to increase the
+size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
+trace formation.
+.Sp
+This mode should produce faster but significantly longer programs. Also
+without \fB\-fbranch\-probabilities\fR the traces constructed may not
+match the reality and hurt the performance. This only makes
+sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsee\fR" 4
+.IX Item "-fsee"
+Eliminate redundant sign extension instructions and move the non-redundant
+ones to optimal placement using lazy code motion (\s-1LCM\s0).
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls. Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage. The compiler will attempt to use less
+stack space, even if that makes the program slower. This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees. This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees. The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees. This pass eliminates unnecessary
+copy operations. This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality. This transformation is
+affective for programs containing arrays of structures. Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics). Require \fB\-fipa\-type\-escape\fR
+to provide the safety of this transformation. It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR and \fB\-combine\fR to be
+enabled. Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis. This option is experimental
+and does not affect generated code.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace a m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion on trees. This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array. This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free. This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal. This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees. A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads. In this case the earlier store can be deleted. This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees. This is beneficial since it increases
+effectiveness of code motion optimizations. It also saves one jump. This flag
+is enabled by default at \fB\-O\fR and higher. It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-lr\-shrinking\fR" 4
+.IX Item "-ftree-lr-shrinking"
+Enable live range shrinking optimization on trees. This optimization is used
+to help reducing register pressure.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform linear loop transformations on tree. This flag can improve cache
+performance and allow further loop optimizations to take place.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops. Interchanging two
+nested loops switches the inner and outer loops. For example, given a
+loop like:
+.Sp
+.Vb 5
+\& DO J = 1, M
+\& DO I = 1, N
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss. This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran. To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops. Strip mining
+splits a loop into two nested loops. The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip. For example, given a loop like:
+.Sp
+.Vb 3
+\& DO I = 1, N
+\& A(I) = A(I) + C
+\& ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO II = 1, N, 4
+\& DO I = II, min (II + 3, N)
+\& A(I) = A(I) + C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran. To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops. Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches. For example, given a loop like:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\& DO II = 1, N, 64
+\& DO JJ = 1, M, 64
+\& DO I = II, min (II + 63, N)
+\& DO J = JJ, min (JJ + 63, M)
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches. This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran. To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers. This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution. This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place. For example, the loop
+.Sp
+.Vb 4
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& ENDDO
+\& DO I = 1, N
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees. This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching. The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis. Later
+optimizations then may determine the number easily. Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered. The optimization is only
+profitable on multiprocessor machines, for loops that are CPU\-intensive,
+rather than constrained e.g. by memory bandwidth. This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates. This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early. This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees. This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables. This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
+use/single def temporaries are replaced at their use location with their
+defining expression. This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees. When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed. This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees. This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated. This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks. This is
+enabled by default at \fB\-O2\fR and higher. Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration. This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect. However in cases the loop body is more complicated than
+a single basic block, this is not reliable. It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations. The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
+heuristics are based on the control flow graph. If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account. The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality. This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective. See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled. For C (and \*(C+), this activates
+optimizations based on the type of expressions. In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same. For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\& union a_union {
+\& int i;
+\& double d;
+\& };
+.Ve
+.Sp
+.Vb 5
+\& int f() {
+\& union a_union t;
+\& t.d = 3.0;
+\& return t.i;
+\& }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type\-punning\*(R") is common. Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type. So, the code above will work as
+expected. However, this code might not:
+.Sp
+.Vb 7
+\& int f() {
+\& union a_union t;
+\& int* ip;
+\& t.d = 3.0;
+\& ip = &t.i;
+\& return *ip;
+\& }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\& int f() {
+\& double d = 3.0;
+\& return ((union a_union *) &d)->i;
+\& }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled. For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen. This
+permits various optimizations. For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic. When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps. When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers. With \fB\-fwrapv\fR certain types of overflow are
+permitted. For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR. The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements. Output them in the same order that they appear in the
+input file. When this option is used, unreferenced static variables
+will not be removed. This option is intended to support existing code
+which relies on a particular ordering. For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR. When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register. This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents whole program being
+compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in a affect gets more aggressively optimized by interprocedural optimizers.
+While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of single file, in combination with option
+\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
+programs since the functions and variables become local for the whole combined
+compilation unit, not for the single source file itself.
+.Sp
+This option is not supported for Fortran programs.
+.IP "\fB\-fuse\-ld=gold\fR" 4
+.IX Item "-fuse-ld=gold"
+Use the \fBld.gold\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both\fR or \fB\-\-enable\-gold=both/ld\fR.
+.IP "\fB\-fuse\-ld=bfd\fR" 4
+.IX Item "-fuse-ld=bfd"
+Use the \fBld.bfd\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both/gold\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR
+thus the profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization. You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-generate\-sampling\fR" 4
+.IX Item "-fprofile-generate-sampling"
+Enable sampling for instrumented binaries. Instead of recording every event,
+record only every N\-th event, where N (the sampling rate) can be set either
+at compile time using
+\&\fB\-\-param profile\-generate\-sampling\-rate=\fR\fIvalue\fR, or
+at execution start time through environment variable \fB\s-1GCOV_SAMPLING_RATE\s0\fR.
+.Sp
+At this time sampling applies only to branch counters. A sampling rate of 100
+decreases instrumentated binary slowdown from up to 20x for heavily threaded
+applications down to around 2x. \fB\-fprofile\-correction\fR is always
+needed with sampling.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code. This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR. Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fpmu\-profile\-generate=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-generate=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling. This collects
+hardware counter data corresponding to \fIpmuoption\fR. Currently
+only \fIload-latency\fR and \fIbranch-mispredict\fR are supported
+using pfmon tool. You must use \fB\-fpmu\-profile\-generate\fR both
+when compiling and when linking your program. This \s-1PMU\s0 profile data
+may later be used by the compiler during optimizations as well can be
+displayed using coverage tool gcov. The params variable
+\&\*(L"pmu_profile_n_addresses\*(R" can be used to restrict \s-1PMU\s0 data collection
+to only this many addresses.
+.IP "\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-use=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling based
+optimizations. Currently only \fIload-latency\fR and
+\&\fIbranch-mispredict\fR are supported.
+.IP "\fB\-fcgraph\-section\fR" 4
+.IX Item "-fcgraph-section"
+Emit call graph edge profile counts in .note.callgraph.text sections. This is
+used in conjunction with \fB\-fprofile\-use\fR. A new .note.callgraph.text
+section is created for each function. This section lists every callee and the
+number of times it is called. The params variable
+\&\*(L"note\-cgraph\-section\-edge\-threshold\*(R" can be used to only list edges above a
+certain threshold.
+.IP "\fB\-fripa\fR" 4
+.IX Item "-fripa"
+Perform dynamic inter-procedural analysis. This is used in conjunction with
+the \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR options.
+During the \fB\-fprofile\-generate\fR phase, this flag turns on some additional
+instrumentation code that enables dynamic call-graph analysis.
+During the \fB\-fprofile\-use\fR phase, this flag enables cross-module
+optimizations such as inlining.
+.IP "\fB\-fripa\-disallow\-asm\-modules\fR" 4
+.IX Item "-fripa-disallow-asm-modules"
+During profile\-gen, if this flag is enabled, and the module has asm statements,
+arrange so that a bit recording this information will be set in the profile
+feedback data file.
+During profile\-use, if this flag is enabled, and the same bit in auxiliary
+module's profile feedback data is set, don't import this auxiliary module.
+If this is the primary module, don't export it.
+.IP "\fB\-fripa\-disallow\-opt\-mismatch\fR" 4
+.IX Item "-fripa-disallow-opt-mismatch"
+Don't import an auxiliary module, if the \s-1GCC\s0 command line options used for this
+auxiliary module during the profile-generate stage were different from those used
+for the primary module. Note that any mismatches in warning-related options are
+ignored for this comparison.
+.IP "\fB\-fripa\-verbose\fR" 4
+.IX Item "-fripa-verbose"
+Enable printing of verbose information about dynamic inter-procedural optimizations.
+This is used in conjunction with the \fB\-fripa\fR.
+.IP "\fB\-fripa\-no\-promote\-always\-inline\-func\fR" 4
+.IX Item "-fripa-no-promote-always-inline-func"
+Do not promote static functions with always inline attribute in \s-1LIPO\s0 compilation.
+.IP "\fB\-fsample\-profile\fR" 4
+.IX Item "-fsample-profile"
+.PD 0
+.IP "\fB\-fsample\-profile=\fR\fIpath\fR" 4
+.IX Item "-fsample-profile=path"
+.PD
+Enable profile feedback directed optimizations using profiles obtained
+via sampling, and optimizations generally profitable only with profile
+feedback available.
+.IP "\fB\-fsample\-profile\-use\-entry\fR" 4
+.IX Item "-fsample-profile-use-entry"
+Use the entry count to annotate the entry basic block. This will improve the
+profile precision for \s-1LBR\s0 based sampling.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fB\-fsample\-profile\-aggregate\-using=\fR\fImethod\fR" 4
+.IX Item "-fsample-profile-aggregate-using=method"
+Select the method for (average or maximum) for converting
+instruction-level profiles into basic block level profiles.
+.IP "\fB\-frecord\-options\-in\-elf\fR" 4
+.IX Item "-frecord-options-in-elf"
+Record the command line options in the .note elf section for sample \s-1FDO\s0 to
+do module grouping.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic. These options trade off between speed and
+correctness. All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
+x86 architecture. For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point. Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt. A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards. When used at link\-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result. \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR. May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect. Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations. For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination. Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero. \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps. These traps include division by zero, overflow,
+underflow, inexact result and invalid operation. This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect. Setting this option may
+allow faster code if one relies on \*(L"non\-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior. This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations. This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode. This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations. Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division. Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case. The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules. Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options. This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken. When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file. The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization. Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
+notes to instructions for their later usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-ffvpt\fR" 4
+.IX Item "-ffvpt"
+If combined with \fB\-fvpt and \-ffvpt_functions\fR, it instructs the
+compiler to add a code to gather information about math library calls.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of function calls
+using precalculated values of common inputs.
+.IP "\fB\-ffvpt\-functions=\fR\fIffvptfunctions\fR" 4
+.IX Item "-ffvpt-functions=ffvptfunctions"
+This options takes a comma separated list of math functions to be
+profiled/optimized by \fB\-ffvpt\fR. The special name \*(L"all\*(R" can be
+used to specify all supported math functions. Currently, exp, log,
+pow, and sqrt are supported.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations). This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback). It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections. The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space. Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so. When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks. This is done by adding a guard variable to functions with
+vulnerable objects. This includes functions that call alloca, and
+functions with buffers larger than 8 bytes. The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-stack\-protector\fR
+or \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR or
+\&\fB\-fstack\-protector\fR are found.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\& static int a, b, c;
+\& int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\& int foo (void)
+\& {
+\& register int *xr = &x;
+\& return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+\& }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done. For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions. You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer. The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBsra-max-structure-size\fR" 4
+.IX Item "sra-max-structure-size"
+The maximum structure size, in bytes, at which the scalar replacement
+of aggregates (\s-1SRA\s0) optimization will perform block copies. The
+default value, 0, implies that \s-1GCC\s0 will select the most appropriate
+size itself.
+.IP "\fBsra-field-structure-ratio\fR" 4
+.IX Item "sra-field-structure-ratio"
+The threshold ratio (as a percentage) between instantiated fields and
+the complete structure size. We say that if the ratio of the number
+of bytes in instantiated fields to the number of bytes in the complete
+structure exceeds this parameter, then block copies are not used. The
+default is 75.
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program. This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-cost-outcome\fR" 4
+.IX Item "predictable-branch-cost-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block. Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them. This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched. The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping. The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto. To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible. Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored. The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot. If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching. Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information. Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time. This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization. If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-passes\fR" 4
+.IX Item "max-gcse-passes"
+The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over. Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining. This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 450.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated. To those functions, a different
+(potentially more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 450.
+.IP "\fBinline-limit-increase-with-profile\fR" 4
+.IX Item "inline-limit-increase-with-profile"
+When profile information is available, such as when compiling
+with \fB\-fprofile\-use\fR, the maximum function size
+limits \fB\-\-param max-inline-insns-single\fR
+and \fB\-\-param max-inline-insns-auto\fR are increased by this percentage
+amount. Profile information increases the selectivity and quality of the
+inlining decisions, so having a larger set of candidate functions available
+for inlining can improve performance.
+The default value is 100.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions. For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit. Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time. If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane. For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size. Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation. The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames. While inlining the algorithm is trying
+to not grow past this limit too much. Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression. This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents). The default value is
+10.
+.IP "\fBmin-count-fraction-for-inline-cold\fR" 4
+.IX Item "min-count-fraction-for-inline-cold"
+Generally cold callsites are not candidates for inlining. However, if
+the callee contains hot code then inlining can propagate useful
+context to this hot region. This parameter, given as a fraction of
+the global maximum count, specifies the minimum expected count in the
+callee called from a cold callsite for the callsite to be considered
+for inlining, where the expected count in the callee from a callsite is
+the maximum count of any basic block in the callee times the callsite
+count divided by the callee count.
+.IP "\fBinline-call-cost\fR" 4
+.IX Item "inline-call-cost"
+Specify cost of call instruction relative to simple arithmetics operations
+(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
+functions and at the same time increases size of leaf function that is believed to
+reduce function size by being inlined. In effect it increases amount of
+inlining for code having large abstraction penalty (many functions that just
+pass the arguments to other functions) and decrease inlining for code with low
+abstraction penalty. The default value is 12.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used. The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization. The default value is 0.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+.PD 0
+.IP "\fBmax-completely-peeled-insns-feedback\fR" 4
+.IX Item "max-completely-peeled-insns-feedback"
+.PD
+The maximum number of insns of a completely peeled loop.
+.Sp
+The \fBmax-completely-peeled-insns-feedback\fR is used only when profile
+feedback is available and the loop is hot. Because of the real profiles, this
+value may set to be larger for hot loops.
+.IP "\fBmax-once-peeled-insns\fR" 4
+.IX Item "max-once-peeled-insns"
+.PD 0
+.IP "\fBmax-once-peeled-insns-feedback\fR" 4
+.IX Item "max-once-peeled-insns-feedback"
+.PD
+The maximum number of insns of a peeled loop that rolls only once.
+The \fBmax-once-peeled-insns-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value
+may set to be larger for hot loops.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+.PD 0
+.IP "\fBmax-completely-peel-times-feedback\fR" 4
+.IX Item "max-completely-peel-times-feedback"
+.PD
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.Sp
+The \fBmax-completely-peel-times-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value may
+set to be larger for hot loops.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations. Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert. The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver. The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver. The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints. The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically. This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown. We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10. This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered. This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available. The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage. This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without. The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers. The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBmax-aliased-vops\fR" 4
+.IX Item "max-aliased-vops"
+Maximum number of virtual operands per function allowed to represent
+aliases before triggering the alias partitioning heuristic. Alias
+partitioning reduces compile times and memory consumption needed for
+aliasing at the expense of precision loss in alias information. The
+default value for this parameter is 100 for \-O1, 500 for \-O2 and 1000
+for \-O3.
+.Sp
+Notice that if a function contains more memory statements than the
+value of this parameter, it is not really possible to achieve this
+reduction. In this case, the compiler will use the number of memory
+statements as the value for \fBmax-aliased-vops\fR.
+.IP "\fBavg-aliased-vops\fR" 4
+.IX Item "avg-aliased-vops"
+Average number of virtual operands per statement allowed to represent
+aliases before triggering the alias partitioning heuristic. This
+works in conjunction with \fBmax-aliased-vops\fR. If a function
+contains more than \fBmax-aliased-vops\fR virtual operators, then
+memory symbols will be grouped into memory partitions until either the
+total number of virtual operators is below \fBmax-aliased-vops\fR
+or the average number of virtual operators per memory statement is
+below \fBavg-aliased-vops\fR. The default value for this parameter
+is 1 for \-O1 and \-O2, and 3 for \-O3.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used. Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity. This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage. The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used. Setting this parameter
+very large effectively disables garbage collection. Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination. Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler. The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler. The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling. The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations. The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling. It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling. This is the limit on the number of iterations
+through which the instruction may be pipelined. The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler. The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register. The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed. This sets the maximum
+value of a shared integer constant. The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual\-mappings\-ratio. The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis. The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes. The distance we prefetch ahead is proportional
+to this constant. Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop with an
+unknown trip count.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system. By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+. However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above. For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine. This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior. Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing. If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled. The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default. If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation. The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions. If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used. The
+algorithm do not use pseudo-register conflicts. The default value of
+the parameter is 2000.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops. Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them. The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBctrl-regpre\fR" 4
+.IX Item "ctrl-regpre"
+This is a switch to turn on live range shrinking optimization.
+.IP "\fBctrl-regpre-mode\fR" 4
+.IX Item "ctrl-regpre-mode"
+This is used as a control knob to enable different transformations in
+the live range shrinking phase. Values of 1, 2, and 4 are used to enable
+upward motion, downward motion, and tree reshaping transformations
+ respectively. The values can be bitwise ORed.
+.IP "\fBreg-pressure-min-bb-factor\fR" 4
+.IX Item "reg-pressure-min-bb-factor"
+A performance tuning knob to control register pressure. When the size
+(in the number of gimple statements) of a basic block in a loop is
+larger than the threshold specified by this parameter multiplied by the
+number of available registers, live range shrinking optimization is enabled.
+.IP "\fBreg-pressure-max-region\fR" 4
+.IX Item "reg-pressure-max-region"
+A parameter to control the maximal allowed region size for live range
+shrinking.
+.IP "\fBreg-pressure-min-tree\fR" 4
+.IX Item "reg-pressure-min-tree"
+The minimal size (number of leaves) of a tree to be reshaped in the Live
+Range Shrinking optimization.
+.IP "\fBmin-mcf-cancel-iters\fR" 4
+.IX Item "min-mcf-cancel-iters"
+The minimum number of iterations of negative cycle cancellation during
+\&\s-1MCF\s0 profile correction before early termination. This parameter is
+only useful when using \fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-mcf-high-confidence-cost-mult\fR" 4
+.IX Item "samplefdo-mcf-high-confidence-cost-mult"
+Multiply the cost used by \s-1MCF\s0 during profile correction by this factor
+for all input profile data that is determined to be high confidence.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-use-discrim\fR" 4
+.IX Item "samplefdo-use-discrim"
+When attributing samples to the \s-1CFG\s0, use discriminators to identify
+which \s-1CFG\s0 nodes correspond to which samples. This parameter is only
+useful when using \fB\-fsample\-profile\fR.
+.IP "\fBsamplefdo-large-block-thresh\fR" 4
+.IX Item "samplefdo-large-block-thresh"
+Consider a basic block large if it has more than this many gimple
+statements in it. If a block is large and has no profile samples
+attributed to it, it will be assigned a weight of 0 with high
+confidence. This parameter is only useful when using
+\&\fB\-fsample\-profile\fR.
+.IP "\fBmax-lipo-mem\fR" 4
+.IX Item "max-lipo-mem"
+When importing auxiliary modules during profile\-use, check current
+memory consumption after parsing each auxiliary module. If it exceeds
+this limit (specified in kb), don't import any more auxiliary modules.
+Specifying a value of 0 means don't enforce this limit. This parameter
+is only useful when using \fB\-fprofile\-use\fR and \fB\-fripa\fR.
+.IP "\fBprofile-generate-sampling-rate\fR" 4
+.IX Item "profile-generate-sampling-rate"
+Set the sampling rate with \fB\-fprofile\-generate\-sampling\fR.
+.RE
+.RS 4
+.RE
+.Sh "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor. If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas. However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor. You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+.Ve
+.Sp
+.Vb 1
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies. If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its filename. When
+\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
+loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0. It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location. The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp -dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters. For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them. See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??-
+\& Replacement: [ ] { } # \e ^ | ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as \s-1MS\-DOS\s0.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.Sh "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler. You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.Sh "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file. They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library. (Object files are
+distinguished from libraries by the linker according to the file
+contents.) If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking. (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files. The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined. But if the file that is found is an
+ordinary object file, it is linked in the usual fashion. The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries. In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR or \fB\-pg\fR or \fB\-p\fR
+are found.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries. On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable. Not all systems support this option. For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version. The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries. In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default. Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default. This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object. Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script. This option is supported by most
+systems using the \s-1GNU\s0 linker. On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker. You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments. For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR. Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
+commas, it is split into multiple options at the commas. You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker. When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it. You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.Sh "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files. This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories. However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that). If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored. The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker. They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor. In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed. If it is not found there, the two
+standard prefixes above are tried, and that is all. The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR. This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option. If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated. Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
+override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked. That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.Sh "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
+\&\fI<machine>\-gcc\fR when cross\-compiling, or
+\&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
+was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
+options that will switch to another cross-compiler or version.
+.IP "\fB\-b\fR \fImachine\fR" 4
+.IX Item "-b machine"
+The argument \fImachine\fR specifies the target machine for compilation.
+.Sp
+The value to use for \fImachine\fR is the same as was specified as the
+machine type when configuring \s-1GCC\s0 as a cross\-compiler. For
+example, if a cross-compiler was configured with \fBconfigure
+arm-elf\fR, meaning to compile for an arm processor with elf binaries,
+then you would specify \fB\-b arm-elf\fR to run that cross compiler.
+Because there are other options beginning with \fB\-b\fR, the
+configuration must contain a hyphen, or \fB\-b\fR alone should be one
+argument followed by the configuration in the next argument.
+.IP "\fB\-V\fR \fIversion\fR" 4
+.IX Item "-V version"
+The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
+This is useful when multiple versions are installed. For example,
+\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
+.PP
+The \fB\-V\fR and \fB\-b\fR options work by running the
+\&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
+use them if you can just run that directly.
+.Sh "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Earlier we discussed the standard option \fB\-b\fR which chooses among
+different installed compilers for completely different target
+machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
+.PP
+In addition, each of these target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none. A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode. This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the cpu to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics. This flag prevents code
+compiled for one cpu to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used. This option avoids
+generating these instructions. This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets. Without this option the two instruction sets cannot
+be reliably used inside one program. The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body. This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code. The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use. Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration. Note that
+the hard-float and soft-float ABIs are not link\-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order. That is, a byte order of the form \fB32107654\fR. Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a8\fR, \fBcortex\-a9\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the cpu specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code. This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-d16\fR and
+\&\fBneon\fR. \fB\-mfp\fR and \fB\-mfpe\fR
+are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
+with older versions of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the \s-1COFF\s0
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls. The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls. The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive. Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
+loading it in the prologue for each function. The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations. This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co\-processor. This option is not enabled by default, since the
+problem is only present in older Maverick implementations. The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue. The generated code is similar to this:
+.Sp
+.Vb 9
+\& t0
+\& .ascii "arm_poke_function_name", 0
+\& .align
+\& t1
+\& .word 0xff000000 + (t1 - t0)
+\& arm_poke_function_name
+\& mov ip, sp
+\& stmfd sp!, {fp, ip, lr, pc}
+\& sub fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set. The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function. This allows these functions to be called from
+non-interworking code.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not. There is a small overhead in the cost
+of executing a function pointer if this option is enabled.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer. The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor. The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-msize\fR" 4
+.IX Item "-msize"
+Output instruction sizes to the asm file.
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
+.IP "\fB\-mno\-tablejump\fR" 4
+.IX Item "-mno-tablejump"
+Do not generate tablejump insns which sometimes increase code size.
+The option is now deprecated in favor of the equivalent
+\&\fB\-fno\-jump\-tables\fR
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer. This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
+and long long will be 4 bytes. Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor. Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor. Any workarounds available for the targeted silicon revision
+will be enabled. If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled. The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision. If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined. If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete. For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined. And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in. This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large. This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries. That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries. Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime. This has an effect on certain
+anomaly workarounds. For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions. The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies. This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code. This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post\-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no\-options) arranges (eliminate arrangements) for the
+stack\-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model. The default is to
+arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack\-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code. Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library. Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch. The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory. The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR. This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used. For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode. The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable. This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch. Using this switch may require recompiling all
+other modules in a program, including system libraries. Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development. Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked. See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
+.IX Item "-allowable_client client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker. The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations. If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
+point standard. However, for full compliance, software assistance is
+required. This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option. Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting. The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode. Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode. A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect. The C library initializes this register for
+rounding towards plus infinity. Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise. This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision. This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision. The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision. The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant. You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions. If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader. Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros. Use of these macros does not allow
+optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions. This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register. This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR. With this option the data area
+is limited to just below 2GB. Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction. When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify. If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR. The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application. This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model. This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections. It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit. This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet. This option only has an effect when \s-1VLIW\s0 packing
+is enabled. It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code. It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code. Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library. This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library. This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default. When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode. This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine. Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner. This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers. If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes. This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers. This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries. This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine. The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker. Note this makes symbolic
+debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross\-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross\-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
+\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
+options are available under HP-UX and \s-1HI\-UX\s0.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
+building a shared library. It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld. The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links. It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences. This ensures that a call
+is always able to reach linker generated stubs. The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used. The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance. However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated. The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
+is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
+11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines. It also affects the operational behavior
+of the C library. Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl. There isn't an archive version of libdld.sl. Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic. On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case. The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under \s-1HP\-UX\s0. This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions. The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change. Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors. In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine. Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support. Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support. (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3dNOW!, enhanced 3dNOW!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR. The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR. The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise. Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips. See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387. Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective. For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once. This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR. Supported
+choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons. These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross\-compilation. You must make your
+own arrangements to provide suitable library functions for
+cross\-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0. The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
+generating those instructions. This option is the default on FreeBSD,
+OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
+indicates that the target cpu will always have an \s-1FPU\s0 and so the
+instruction will not need emulation. As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible. So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section. This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning. This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR. You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments. By
+default, no registers are used to pass arguments, and at most 3
+registers can be used. You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries. This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values. You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries. This includes
+the system libraries and startup modules.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits. When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default. When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more. Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry. On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary. This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary. If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties. On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned. Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack. It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size. Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-msse5\fR" 4
+.IX Item "-msse5"
+.IP "\fB\-mno\-sse5\fR" 4
+.IX Item "-mno-sse5"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1SSE4A\s0, \s-1SSE5\s0, \s-1LWP\s0,
+\&\s-1ABM\s0 or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR. Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags. In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions. String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode. While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers. The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option. Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types. This is useful for high resolution counters that could be updated
+by multiple processors (or cores). This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005. \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments. These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library. Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing. \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention. Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0. The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows. On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0. You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default. In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue. This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2. The drawback is a notable
+increase in code size. This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR. Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations. This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary. This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-minline\-compares\fR" 4
+.IX Item "-minline-compares"
+This option enables \s-1GCC\s0 to inline calls to memcmp and strcmp. The
+inlined version does a byte-by-byte comparion using a repeat string
+operation prefix.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with. The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added. Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable automatic generation of fused floating point multiply-add instructions
+if the \s-1ISA\s0 supports such instructions. The \-mfused\-madd option is on by
+default. The fused multiply-add instructions have a different
+rounding behavior compared to executing a multiply followed by an add.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix. The option \fB\-mavx\fR turns this on by default.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code. The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
+Programs can be statically or dynamically linked. This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model. The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space. Small symbols are also placed there. Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB. Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target. This is the default for \s-1HP\-UX\s0.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target. This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register. The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers. This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section. This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value. This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self\-relocatable. This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info. This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit. This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-mt\fR" 4
+.IX Item "-mt"
+.PD 0
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+.PD
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. It does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it. These are HP-UX specific flags.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits. These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ldc\fR" 4
+.IX Item "-msched-ldc"
+.PD 0
+.IP "\fB\-mno\-sched\-ldc\fR" 4
+.IX Item "-mno-sched-ldc"
+.PD
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-ldc\fR" 4
+.IX Item "-mno-sched-control-ldc"
+.PD 0
+.IP "\fB\-msched\-control\-ldc\fR" 4
+.IX Item "-msched-control-ldc"
+.PD
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
+.IX Item "-mno-sched-spec-verbose"
+.PD 0
+.IP "\fB\-msched\-spec\-verbose\fR" 4
+.IX Item "-msched-spec-verbose"
+.PD
+(Dis/En)able printing of the information about speculative motions.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O. You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation. These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers. Note that all modules in a program must
+be compiled with the same value for this option. Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R. This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area. Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections. The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops. This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache. The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture. Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR. ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target. The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR. The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51qe\fR : \fB51qe\fR" 4
+.IX Item "51qe : 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR. Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected. It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR. The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well. These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR. It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used. If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000. This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010. This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020. This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030. This is the default when the compiler is
+configured for 68030\-based systems. It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040. This is the default when the compiler is
+configured for 68040\-based systems. It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040. Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060. This is the default when the compiler is
+configured for 68060\-based systems. It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060. Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0. This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0. This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0. The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions. This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0. It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets. It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions. If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures. Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR). For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide. This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions. The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR. This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning. This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table. At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries. This code is
+larger and slower than code generated without this option. On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k. Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs. However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries. If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-nominmax\fR" 4
+.IX Item "-nominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction. (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int\-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation. Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much. The default
+value is 0x1000.
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR). Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option. The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above. In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR. Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations. The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR. By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions. This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump. \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide. You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR. This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers. For example, scalar
+floating-point values are returned in \fB$f0\fR only, not a
+\&\fB$f0\fR/\fB$f1\fR pair. The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position\-independent,
+and that can therefore be linked into shared libraries. This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position\-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker. However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects. Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations. This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR. For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR. The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k. Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs. If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions. When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs. You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively. \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR. It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+ This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0. This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes. \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C. \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR. You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section. If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition. If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option. However,
+you may wish to build a library that supports several different
+small data limits. You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR. \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR. For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data. This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections. This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so. This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections. This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators. This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction. Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code. The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0. They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions. \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR. At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch. It later aborts these instructions if the
+predicted outcome was wrong. However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads. As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted. If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data. See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted. \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround. It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\& void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively. \s-1GCC\s0 honors this
+restriction for functions it compiles itself. It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers. This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function. If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches). The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases. A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture. By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
+\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned. When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend. Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR. Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register. The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register. The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited. This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors. This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
+is the default.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors. Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses. This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory. This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0. This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive. This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive. This is the default.
+.IP "\fB\-msplit\fR" 4
+.IX Item "-msplit"
+Generate code for a system with split I&D.
+.IP "\fB\-mno\-split\fR" 4
+.IX Item "-mno-split"
+Generate code for a system without split I&D. This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax. This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR. Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type. Code
+generated with this option will run on any of the other \s-1AE\s0 types. The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type. This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0. Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register. Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used. However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code. These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type. The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations. This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support. This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other. However there is a
+large common subset of instructions supported by both. An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using. The default value of these options is
+determined when configuring \s-1GCC\s0. Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root. Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code. With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option. Unless you are building a cross\-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
+\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
+\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBe300c2\fR, \fBe300c3\fR,
+\&\fBe500mc\fR, \fBec603e\fR, \fBG3\fR, \fBG4\fR, \fBG5\fR,
+\&\fBpower\fR, \fBpower2\fR, \fBpower3\fR, \fBpower4\fR,
+\&\fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR, \fBpower7\fR
+\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor. Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec \-mfprnd \-mhard\-float \-mmfcrf \-mmultiple
+\&\-mnew\-mnemonics \-mpopcntb \-mpower \-mpower2 \-mpowerpc64
+\&\-mpowerpc\-gpopt \-mpowerpc\-gfxopt \-msingle\-float \-mdouble\-float
+\&\-msimple\-fpu \-mstring \-mmulhw \-mdlmzb \-mmfpgpr\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities. If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mswdiv\fR" 4
+.IX Item "-mswdiv"
+.PD 0
+.IP "\fB\-mno\-swdiv\fR" 4
+.IX Item "-mno-swdiv"
+.PD
+Generate code to compute division as reciprocal estimate and iterative
+refinement, creating opportunities for increased throughput. This
+feature requires: optional PowerPC Graphics instruction set for single
+precision and \s-1FRE\s0 instruction for double precision, assuming divides
+cannot generate user-visible traps, and the domain values not include
+Infinities, denormals or zero denominator.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set. You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted. An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections. This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated. Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated. Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux). The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant. The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file. The \fB\-mfull\-toc\fR option is selected by
+default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program. \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0. However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
+or both of these options. Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead. This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space. You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs. Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double. Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization. Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
+application written to use message passing with special startup code to
+enable the application to run. The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location. The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit. Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions. These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves. These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location. These instructions are generated by default. If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary. This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating is used.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440 and 464 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440 and 464 processors. This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit\-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. If you
+use \fB\-mrelocatable\fR on any module, all objects linked together must
+be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. Modules
+compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
+compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
+with modules compiled with the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode. The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode. The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable. The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling. The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass. The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups. Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups. Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement. This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-solaris\fR" 4
+.IX Item "-mcall-solaris"
+On System V.4 and embedded PowerPC systems compile code for the Solaris
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped. Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments. With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area. The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option. The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section. Put small uninitialized global
+data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however. This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section. By default, \fInum\fR is 8. The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly. On these systems, long calls are unnecessary and
+generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
+addresses represent the callee and the \*(L"branch island\*(R". The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R". The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions. This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations. When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations. When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions. This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes. Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions. For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR. When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves. When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type. Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR. Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system. This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size. Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions which most probably cause
+a stack overflow. It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays. This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation. The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode. This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available. This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+Increase IEEE-compliance of floating-point code.
+At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
+When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
+comparisons of NANs / infinities incurs extra overhead in every
+floating point comparison, therefore the default is set to
+\&\fB\-ffinite\-math\-only\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write. This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed. Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse. This strategy allows
+cse and hoisting of the inverse calculation. Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends. inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR. This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode. The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap. This will generally generate better
+scheduled code, but is unsafe on current hardware. The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop. For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1. With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register. Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid. Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions. This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross\-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross\-compilation. The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions. The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions. They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction. Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines. Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment. This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address. Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers. It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment. This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object. Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy\-on\-write, and the
+shared object is not actually shared across processes. Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.Sp
+This option is only available on SunOS and Solaris.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
+\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\& v7: cypress
+\& v8: supersparc, hypersparc
+\& sparclite: f930, f934, sparclite86x
+\& sparclet: tsc701
+\& v9: ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture. This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips. With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular cpu implementation. Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register \f(CW%g4\fR points to the base of the data segment. Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references. This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+These switches are supported in addition to the above on Solaris:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations. By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation. \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed. Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change. Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory. With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches. A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits. With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance. \fIn\fR can be a value from 0 to 10. A
+smaller \fIn\fR will insert fewer nops. 10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR. Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint. A branch hint must
+be at least 8 instructions away from the branch it is effecting. \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting. By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function. The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers. The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible. At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler. This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1. The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E. The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e and v850e1 flavors of the v850 architecture. The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs). This option switches from the former to the latter. It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries. The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker. They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls. This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls. This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets. It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behaviour for Cygwin and MinGW targets.
+.IP "\fB\-mcygwin\fR" 4
+.IX Item "-mcygwin"
+This option is available for Cygwin targets. It specifies that
+the Cygwin internal interface is to be used for predefined
+preprocessor macros, C runtime libraries and related linker
+paths and options. For Cygwin targets this is the default behaviour.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mno\-cygwin\fR" 4
+.IX Item "-mno-cygwin"
+This option is available for Cygwin targets. It specifies that
+the MinGW internal interface is to be used instead of Cygwin's, by
+setting MinGW-related predefined macros and linker paths and default
+library options.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets. It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets. It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre\-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option. This has no effect if the
+floating-point option is not also enabled. Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations. This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR. Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools. The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file. This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size. With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references. This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density. The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions. If there are not enough preceding safe density
+instructions to align a target, no widening will be performed. The
+default is \fB\-mtarget\-align\fR. These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction. This
+translation typically occurs for calls to functions in other source
+files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR. This option should be used in
+programs where the call target can potentially be out of range. This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions. Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.Sh "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
+one of the forms is listed\-\-\-the one which is not the default. You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range. This is
+currently only supported by the Java and Fortran front\-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation. This flag enables some optimizations
+and disables others. This option is enabled by default for the Java
+front\-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling. Generates extra code needed to propagate
+exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution. If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it. However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+. You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere. Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions. It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine. The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers. This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target. If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler. In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target. This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory. This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable. This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text. This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine. Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0). The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system). If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position\-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table. This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR. The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR are found.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies. This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table. On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register. The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls. It may be allocated for temporaries or
+variables that do not live across a call. Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions. It may be allocated even for temporaries or variables that
+live across a call. Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes. When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions. Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site. (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\& void __cyg_profile_func_enter (void *this_fn,
+\& void *call_site);
+\& void __cyg_profile_func_exit (void *this_fn,
+\& void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions. The profiling calls will indicate where, conceptually, the
+inline function is entered and exited. This means that addressable
+versions of such functions must be available. If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size. If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided. (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done. This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR). If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented. The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys\*(C'\fR
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW','\fR in one of
+\&\fIsym\fR, write \f(CW','\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=',,tmp'\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation. The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR). The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack. You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that. The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol. If the stack
+would grow beyond the value, a signal is raised. For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fargument\-alias\fR" 4
+.IX Item "-fargument-alias"
+.PD 0
+.IP "\fB\-fargument\-noalias\fR" 4
+.IX Item "-fargument-noalias"
+.IP "\fB\-fargument\-noalias\-global\fR" 4
+.IX Item "-fargument-noalias-global"
+.IP "\fB\-fargument\-noalias\-anything\fR" 4
+.IX Item "-fargument-noalias-anything"
+.PD
+Specify the possible relationships among parameters and between
+parameters and global data.
+.Sp
+\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
+alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
+each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
+alias each other and do not alias global storage.
+\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
+alias any other storage.
+.Sp
+Each language will automatically use whatever option is required by
+the language standard. You should not need to use these options yourself.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file. One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch. Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax. This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default ie; declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications. However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates. Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files. Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions. \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so. These locale categories can be set to any value supported by your
+installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification. \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable. If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler. No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files. For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler. One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work. On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against. Failing to supply the correct flags may lead
+to subtle defects. Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1
new file mode 100644
index 0000000..b812343
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1
@@ -0,0 +1,654 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. | will give a
+.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCOV 1"
+.TH GCOV 1 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+gcov \- coverage testing tool
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcov [\fB\-v\fR|\fB\-\-version\fR] [\fB\-h\fR|\fB\-\-help\fR]
+ [\fB\-a\fR|\fB\-\-all\-blocks\fR]
+ [\fB\-b\fR|\fB\-\-branch\-probabilities\fR]
+ [\fB\-c\fR|\fB\-\-branch\-counts\fR]
+ [\fB\-m\fR|\fB\-\-pmu\-profile\fR]
+ [\fB\-n\fR|\fB\-\-no\-output\fR]
+ [\fB\-l\fR|\fB\-\-long\-file\-names\fR]
+ [\fB\-p\fR|\fB\-\-preserve\-paths\fR]
+ [\fB\-q\fR|\fB\-\-pmu_profile\-path\fR]
+ [\fB\-f\fR|\fB\-\-function\-summaries\fR]
+ [\fB\-o\fR|\fB\-\-object\-directory\fR \fIdirectory|file\fR] \fIsourcefiles\fR
+ [\fB\-u\fR|\fB\-\-unconditional\-branches\fR]
+ [\fB\-i\fR|\fB\-\-intermediate\-format\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgcov\fR is a test coverage program. Use it in concert with \s-1GCC\s0
+to analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program. You can use
+\&\fBgcov\fR as a profiling tool to help discover where your
+optimization efforts will best affect your code. You can also use
+\&\fBgcov\fR along with the other profiling tool, \fBgprof\fR, to
+assess which parts of your code use the greatest amount of computing
+time.
+.PP
+Profiling tools help you analyze your code's performance. Using a
+profiler such as \fBgcov\fR or \fBgprof\fR, you can find out some
+basic performance statistics, such as:
+.IP "\(bu" 4
+how often each line of code executes
+.IP "\(bu" 4
+what lines of code are actually executed
+.IP "\(bu" 4
+how much computing time each section of code uses
+.PP
+Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+\&\fBgcov\fR helps you determine where to work on optimization.
+.PP
+Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite. Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+.PP
+You should compile your code without optimization if you plan to use
+\&\fBgcov\fR because the optimization, by combining some lines of code
+into one function, may not give you as much information as you need to
+look for `hot spots' where the code is using a great deal of computer
+time. Likewise, because \fBgcov\fR accumulates statistics by line (at
+the lowest resolution), it works best with a programming style that
+places only one statement on each line. If you use complicated macros
+that expand to loops or to other control structures, the statistics are
+less helpful\-\-\-they only report on the line where the macro call
+appears. If your complex macros behave like functions, you can replace
+them with inline functions to solve this problem.
+.PP
+\&\fBgcov\fR creates a logfile called \fI\fIsourcefile\fI.gcov\fR which
+indicates how many times each line of a source file \fI\fIsourcefile\fI.c\fR
+has executed. You can use these logfiles along with \fBgprof\fR to aid
+in fine-tuning the performance of your programs. \fBgprof\fR gives
+timing information you can use along with the information you get from
+\&\fBgcov\fR.
+.PP
+\&\fBgcov\fR works only on code compiled with \s-1GCC\s0. It is not
+compatible with any other profiling or test coverage mechanism.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display help about using \fBgcov\fR (on the standard output), and
+exit without doing any further processing.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the \fBgcov\fR version number (on the standard output),
+and exit without doing any further processing.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\-blocks\fR" 4
+.IX Item "--all-blocks"
+.PD
+Write individual execution counts for every basic block. Normally gcov
+outputs execution counts only for the main blocks of a line. With this
+option you can determine if blocks within a single line are not being
+executed.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-branch\-probabilities\fR" 4
+.IX Item "--branch-probabilities"
+.PD
+Write branch frequencies to the output file, and write branch summary
+info to the standard output. This option allows you to see how often
+each branch in your program was taken. Unconditional branches will not
+be shown, unless the \fB\-u\fR option is given.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-branch\-counts\fR" 4
+.IX Item "--branch-counts"
+.PD
+Write branch frequencies as the number of branches taken, rather than
+the percentage of branches taken.
+.IP "\fB\-m\fR" 4
+.IX Item "-m"
+.PD 0
+.IP "\fB\-\-pmu\-profile\fR" 4
+.IX Item "--pmu-profile"
+.PD
+Output the additional \s-1PMU\s0 profile information if available.
+.IP "\fB\-q\fR" 4
+.IX Item "-q"
+.PD 0
+.IP "\fB\-\-pmu_profile\-path\fR" 4
+.IX Item "--pmu_profile-path"
+.PD
+\&\s-1PMU\s0 profile path (default \fIpmuprofile.gcda\fR).
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-output\fR" 4
+.IX Item "--no-output"
+.PD
+Do not create the \fBgcov\fR output file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-long\-file\-names\fR" 4
+.IX Item "--long-file-names"
+.PD
+Create long file names for included source files. For example, if the
+header file \fIx.h\fR contains code, and was included in the file
+\&\fIa.c\fR, then running \fBgcov\fR on the file \fIa.c\fR will produce
+an output file called \fIa.c##x.h.gcov\fR instead of \fIx.h.gcov\fR.
+This can be useful if \fIx.h\fR is included in multiple source
+files. If you use the \fB\-p\fR option, both the including and
+included file names will be complete path names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-paths\fR" 4
+.IX Item "--preserve-paths"
+.PD
+Preserve complete path information in the names of generated
+\&\fI.gcov\fR files. Without this option, just the filename component is
+used. With this option, all directories are used, with \fB/\fR characters
+translated to \fB#\fR characters, \fI.\fR directory components
+removed and \fI..\fR
+components renamed to \fB^\fR. This is useful if sourcefiles are in several
+different directories. It also affects the \fB\-l\fR option.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-function\-summaries\fR" 4
+.IX Item "--function-summaries"
+.PD
+Output summaries for each function in addition to the file level summary.
+.IP "\fB\-o\fR \fIdirectory|file\fR" 4
+.IX Item "-o directory|file"
+.PD 0
+.IP "\fB\-\-object\-directory\fR \fIdirectory\fR" 4
+.IX Item "--object-directory directory"
+.IP "\fB\-\-object\-file\fR \fIfile\fR" 4
+.IX Item "--object-file file"
+.PD
+Specify either the directory containing the gcov data files, or the
+object path name. The \fI.gcno\fR, and
+\&\fI.gcda\fR data files are searched for using this option. If a directory
+is specified, the data files are in that directory and named after the
+source file name, without its extension. If a file is specified here,
+the data files are named after that file, without its extension. If this
+option is not supplied, it defaults to the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unconditional\-branches\fR" 4
+.IX Item "--unconditional-branches"
+.PD
+When branch probabilities are given, include those of unconditional branches.
+Unconditional branches are normally not interesting.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-intermediate\-format\fR" 4
+.IX Item "--intermediate-format"
+.PD
+Output gcov file in an intermediate text format that can be used by
+\&\fBlcov\fR or other applications. It will output a single *.gcov file per
+*gcda file. No source code required.
+.PP
+\&\fBgcov\fR should be run with the current directory the same as that
+when you invoked the compiler. Otherwise it will not be able to locate
+the source files. \fBgcov\fR produces files called
+\&\fI\fImangledname\fI.gcov\fR in the current directory. These contain
+the coverage information of the source file they correspond to.
+One \fI.gcov\fR file is produced for each source file containing code,
+which was compiled to produce the data files. The \fImangledname\fR part
+of the output file name is usually simply the source file name, but can
+be something more complicated if the \fB\-l\fR or \fB\-p\fR options are
+given. Refer to those options for details.
+.PP
+The \fI.gcov\fR files contain the \fB:\fR separated fields along with
+program source code. The format is
+.PP
+.Vb 1
+\& <execution_count>:<line_number>:<source line text>
+.Ve
+.PP
+Additional block information may succeed each line, when requested by
+command line option. The \fIexecution_count\fR is \fB\-\fR for lines
+containing no code and \fB#####\fR for lines which were never executed.
+Some lines of information at the start have \fIline_number\fR of zero.
+.PP
+The preamble lines are of the form
+.PP
+.Vb 1
+\& -:0:<tag>:<value>
+.Ve
+.PP
+The ordering and number of these preamble lines will be augmented as
+\&\fBgcov\fR development progresses \-\-\- do not rely on them remaining
+unchanged. Use \fItag\fR to locate a particular preamble line.
+.PP
+The additional block information is of the form
+.PP
+.Vb 1
+\& <tag> <information>
+.Ve
+.PP
+The \fIinformation\fR is human readable, but designed to be simple
+enough for machine parsing too.
+.PP
+When printing percentages, 0% and 100% are only printed when the values
+are \fIexactly\fR 0% and 100% respectively. Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+.PP
+When using \fBgcov\fR, you must first compile your program with two
+special \s-1GCC\s0 options: \fB\-fprofile\-arcs \-ftest\-coverage\fR.
+This tells the compiler to generate additional information needed by
+gcov (basically a flow graph of the program) and also includes
+additional code in the object files for generating the extra profiling
+information needed by gcov. These additional files are placed in the
+directory where the object file is located.
+.PP
+Running the program will cause profile output to be generated. For each
+source file compiled with \fB\-fprofile\-arcs\fR, an accompanying
+\&\fI.gcda\fR file will be placed in the object file directory.
+.PP
+Running \fBgcov\fR with your program's source file names as arguments
+will now produce a listing of the code along with frequency of execution
+for each line. For example, if your program is called \fItmp.c\fR, this
+is what you see when you use the basic \fBgcov\fR facility:
+.PP
+.Vb 5
+\& $ gcc -fprofile-arcs -ftest-coverage tmp.c
+\& $ a.out
+\& $ gcov tmp.c
+\& 90.00% of 10 source lines executed in file tmp.c
+\& Creating tmp.c.gcov.
+.Ve
+.PP
+The file \fItmp.c.gcov\fR contains output from \fBgcov\fR.
+Here is a sample:
+.PP
+.Vb 22
+\& -: 0:Source:tmp.c
+\& -: 0:Graph:tmp.gcno
+\& -: 0:Data:tmp.gcda
+\& -: 0:Runs:1
+\& -: 0:Programs:1
+\& -: 1:#include <stdio.h>
+\& -: 2:
+\& -: 3:int main (void)
+\& 1: 4:{
+\& 1: 5: int i, total;
+\& -: 6:
+\& 1: 7: total = 0;
+\& -: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& 10: 10: total += i;
+\& -: 11:
+\& 1: 12: if (total != 45)
+\& #####: 13: printf ("Failure\en");
+\& -: 14: else
+\& 1: 15: printf ("Success\en");
+\& 1: 16: return 0;
+\& -: 17:}
+.Ve
+.PP
+When you use the \fB\-a\fR option, you will get individual block
+counts, and the output looks like this:
+.PP
+.Vb 29
+\& -: 0:Source:tmp.c
+\& -: 0:Graph:tmp.gcno
+\& -: 0:Data:tmp.gcda
+\& -: 0:Runs:1
+\& -: 0:Programs:1
+\& -: 1:#include <stdio.h>
+\& -: 2:
+\& -: 3:int main (void)
+\& 1: 4:{
+\& 1: 4-block 0
+\& 1: 5: int i, total;
+\& -: 6:
+\& 1: 7: total = 0;
+\& -: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& 11: 9-block 0
+\& 10: 10: total += i;
+\& 10: 10-block 0
+\& -: 11:
+\& 1: 12: if (total != 45)
+\& 1: 12-block 0
+\& #####: 13: printf ("Failure\en");
+\& $$$$$: 13-block 0
+\& -: 14: else
+\& 1: 15: printf ("Success\en");
+\& 1: 15-block 0
+\& 1: 16: return 0;
+\& 1: 16-block 0
+\& -: 17:}
+.Ve
+.PP
+In this mode, each basic block is only shown on one line \*(-- the last
+line of the block. A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown
+to contain code, unless previous blocks end on those lines.
+The total execution count of a line is shown and subsequent lines show
+the execution counts for individual blocks that end on that line. After each
+block, the branch and call counts of the block will be shown, if the
+\&\fB\-b\fR option is given.
+.PP
+Because of the way \s-1GCC\s0 instruments calls, a call count can be shown
+after a line with no individual blocks.
+As you can see, line 13 contains a basic block that was not executed.
+.PP
+When you use the \fB\-b\fR option, your output looks like this:
+.PP
+.Vb 6
+\& $ gcov -b tmp.c
+\& 90.00% of 10 source lines executed in file tmp.c
+\& 80.00% of 5 branches executed in file tmp.c
+\& 80.00% of 5 branches taken at least once in file tmp.c
+\& 50.00% of 2 calls executed in file tmp.c
+\& Creating tmp.c.gcov.
+.Ve
+.PP
+Here is a sample of a resulting \fItmp.c.gcov\fR file:
+.PP
+.Vb 29
+\& -: 0:Source:tmp.c
+\& -: 0:Graph:tmp.gcno
+\& -: 0:Data:tmp.gcda
+\& -: 0:Runs:1
+\& -: 0:Programs:1
+\& -: 1:#include <stdio.h>
+\& -: 2:
+\& -: 3:int main (void)
+\& function main called 1 returned 1 blocks executed 75%
+\& 1: 4:{
+\& 1: 5: int i, total;
+\& -: 6:
+\& 1: 7: total = 0;
+\& -: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& branch 0 taken 91% (fallthrough)
+\& branch 1 taken 9%
+\& 10: 10: total += i;
+\& -: 11:
+\& 1: 12: if (total != 45)
+\& branch 0 taken 0% (fallthrough)
+\& branch 1 taken 100%
+\& #####: 13: printf ("Failure\en");
+\& call 0 never executed
+\& -: 14: else
+\& 1: 15: printf ("Success\en");
+\& call 0 called 1 returned 100%
+\& 1: 16: return 0;
+\& -: 17:}
+.Ve
+.PP
+For each function, a line is printed showing how many times the function
+is called, how many times it returns and what percentage of the
+function's blocks were executed.
+.PP
+For each basic block, a line is printed after the last line of the basic
+block describing the branch or call that ends the basic block. There can
+be multiple branches and calls listed for a single source line if there
+are multiple basic blocks that end on that line. In this case, the
+branches and calls are each given a number. There is no simple way to map
+these branches and calls back to source constructs. In general, though,
+the lowest numbered branch or call will correspond to the leftmost construct
+on the source line.
+.PP
+For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed. Otherwise, the
+message \*(L"never executed\*(R" is printed.
+.PP
+For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed. This will usually be
+100%, but may be less for functions that call \f(CW\*(C`exit\*(C'\fR or \f(CW\*(C`longjmp\*(C'\fR,
+and thus may not return every time they are called.
+.PP
+The execution counts are cumulative. If the example program were
+executed again without removing the \fI.gcda\fR file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s). This is potentially useful in
+several ways. For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+.PP
+The data in the \fI.gcda\fR files is saved immediately before the program
+exits. For each source file compiled with \fB\-fprofile\-arcs\fR, the
+profiling code first attempts to read in an existing \fI.gcda\fR file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file. It then adds in the
+new execution counts and finally writes the data to the file.
+.Sh "Using \fBgcov\fP with \s-1GCC\s0 Optimization"
+.IX Subsection "Using gcov with GCC Optimization"
+If you plan to use \fBgcov\fR to help optimize your code, you must
+first compile your program with two special \s-1GCC\s0 options:
+\&\fB\-fprofile\-arcs \-ftest\-coverage\fR. Aside from that, you can use any
+other \s-1GCC\s0 options; but if you want to prove that every single line
+in your program was executed, you should not compile with optimization
+at the same time. On some machines the optimizer can eliminate some
+simple code lines by combining them with other lines. For example, code
+like this:
+.PP
+.Vb 4
+\& if (a != b)
+\& c = 1;
+\& else
+\& c = 0;
+.Ve
+.PP
+can be compiled into one instruction on some machines. In this case,
+there is no way for \fBgcov\fR to calculate separate execution counts
+for each line because there isn't separate code for each line. Hence
+the \fBgcov\fR output looks like this if you compiled the program with
+optimization:
+.PP
+.Vb 4
+\& 100: 12:if (a != b)
+\& 100: 13: c = 1;
+\& 100: 14:else
+\& 100: 15: c = 0;
+.Ve
+.PP
+The output shows that this block of code, combined by optimization,
+executed 100 times. In one sense this result is correct, because there
+was only one instruction representing all four of these lines. However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+.PP
+Inlineable functions can create unexpected line counts. Line counts are
+shown for the source code of the inlineable function, but what is shown
+depends on where the function is inlined, or if it is not inlined at all.
+.PP
+If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it. If
+\&\fIfileA.o\fR and \fIfileB.o\fR both contain out of line bodies of a
+particular inlineable function, they will also both contain coverage
+counts for that function. When \fIfileA.o\fR and \fIfileB.o\fR are
+linked together, the linker will, on many systems, select one of those
+out of line bodies for all calls to that function, and remove or ignore
+the other. Unfortunately, it will not remove the coverage counters for
+the unused function body. Hence when instrumented, all but one use of
+that function will show zero counts.
+.PP
+If the function is inlined in several places, the block structure in
+each location might not be the same. For instance, a condition might
+now be calculable at compile time in some instances. Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+2008 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7
new file mode 100644
index 0000000..7444160
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7
@@ -0,0 +1,185 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
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+\fB\\$1\fR
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+.if n .sp
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+.de Vb \" Begin verbatim text
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+..
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+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
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+. de IX
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+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
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+.\" Fear. Run. Save yourself. No user-serviceable parts.
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+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "FSF-FUNDING 7"
+.TH FSF-FUNDING 7 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+fsf\-funding \- Funding Free Software
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "Funding Free Software"
+.IX Subsection "Funding Free Software"
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development. The most effective approach known is to encourage
+commercial redistributors to donate.
+.PP
+Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers\-\-\-the Free Software Foundation, and others.
+.PP
+The way to convince distributors to do this is to demand it and expect
+it from them. So when you compare distributors, judge them partly by
+how much they give to free software development. Show distributors
+they must compete to be the one who gives the most.
+.PP
+To make this approach work, you must insist on numbers that you can
+compare, such as, \*(L"We will donate ten dollars to the Frobnitz project
+for each disk sold.\*(R" Don't be satisfied with a vague promise, such as
+\&\*(L"A portion of the profits are donated,\*(R" since it doesn't give a basis
+for comparison.
+.PP
+Even a precise fraction \*(L"of the profits from this disk\*(R" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is \f(CW$50\fR, ten percent of the profit is probably
+less than a dollar; it might be a few cents, or nothing at all.
+.PP
+Some redistributors do development work themselves. This is useful too;
+but to keep everyone honest, you need to inquire how much they do, and
+what kind. Some kinds of development make much more long-term
+difference than others. For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much. Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new \s-1CPU\s0 to the \s-1GNU\s0 Compiler Collection contribute more;
+major new features or packages contribute the most.
+.PP
+By establishing the idea that supporting further development is \*(L"the
+proper thing to do\*(R" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1994 Free Software Foundation, Inc.
+Verbatim copying and redistribution of this section is permitted
+without royalty; alteration is not permitted.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7
new file mode 100644
index 0000000..c5c67e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7
@@ -0,0 +1,561 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
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+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
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+..
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+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
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+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
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+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
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+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
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+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
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+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
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+\{\
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+. ds th \o'bp'
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+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GFDL 7"
+.TH GFDL 7 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+gfdl \- GNU Free Documentation License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "\s-1GNU\s0 Free Documentation License"
+.IX Subsection "GNU Free Documentation License"
+.Sh "Version 1.2, November 2002"
+.IX Subsection "Version 1.2, November 2002"
+.Vb 2
+\& Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+\& 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+.Ve
+.PP
+.Vb 2
+\& Everyone is permitted to copy and distribute verbatim copies
+\& of this license document, but changing it is not allowed.
+.Ve
+.IP "0." 4
+\&\s-1PREAMBLE\s0
+.Sp
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document \fIfree\fR in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+.Sp
+This License is a kind of \*(L"copyleft\*(R", which means that derivative
+works of the document must themselves be free in the same sense. It
+complements the \s-1GNU\s0 General Public License, which is a copyleft
+license designed for free software.
+.Sp
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does. But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book. We recommend this License
+principally for works whose purpose is instruction or reference.
+.IP "1." 4
+\&\s-1APPLICABILITY\s0 \s-1AND\s0 \s-1DEFINITIONS\s0
+.Sp
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License. Such a notice grants a
+world\-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein. The \*(L"Document\*(R", below,
+refers to any such manual or work. Any member of the public is a
+licensee, and is addressed as \*(L"you\*(R". You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+.Sp
+A \*(L"Modified Version\*(R" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+.Sp
+A \*(L"Secondary Section\*(R" is a named appendix or a front-matter section
+of the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall
+subject (or to related matters) and contains nothing that could fall
+directly within that overall subject. (Thus, if the Document is in
+part a textbook of mathematics, a Secondary Section may not explain
+any mathematics.) The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+.Sp
+The \*(L"Invariant Sections\*(R" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License. If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant. The Document may contain zero
+Invariant Sections. If the Document does not identify any Invariant
+Sections then there are none.
+.Sp
+The \*(L"Cover Texts\*(R" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License. A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+.Sp
+A \*(L"Transparent\*(R" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters. A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text. A copy that is not \*(L"Transparent\*(R" is called \*(L"Opaque\*(R".
+.Sp
+Examples of suitable formats for Transparent copies include plain
+\&\s-1ASCII\s0 without markup, Texinfo input format, LaTeX input
+format, \f(CW@acronym\fR{\s-1SGML\s0} or \f(CW@acronym\fR{\s-1XML\s0} using a publicly available
+\&\f(CW@acronym\fR{\s-1DTD\s0}, and standard-conforming simple \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} designed for human modification. Examples
+of transparent image formats include \f(CW@acronym\fR{\s-1PNG\s0}, \f(CW@acronym\fR{\s-1XCF\s0} and
+\&\f(CW@acronym\fR{\s-1JPG\s0}. Opaque formats include proprietary formats that can be
+read and edited only by proprietary word processors, \f(CW@acronym\fR{\s-1SGML\s0} or
+\&\f(CW@acronym\fR{\s-1XML\s0} for which the \f(CW@acronym\fR{\s-1DTD\s0} and/or processing tools are
+not generally available, and the machine-generated \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} produced by some word processors for
+output purposes only.
+.Sp
+The \*(L"Title Page\*(R" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page. For works in
+formats which do not have any title page as such, \*(L"Title Page\*(R" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+.Sp
+A section \*(L"Entitled \s-1XYZ\s0\*(R" means a named subunit of the Document whose
+title either is precisely \s-1XYZ\s0 or contains \s-1XYZ\s0 in parentheses following
+text that translates \s-1XYZ\s0 in another language. (Here \s-1XYZ\s0 stands for a
+specific section name mentioned below, such as \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", \*(L"Endorsements\*(R", or \*(L"History\*(R".) To \*(L"Preserve the Title\*(R"
+of such a section when you modify the Document means that it remains a
+section \*(L"Entitled \s-1XYZ\s0\*(R" according to this definition.
+.Sp
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document. These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+.IP "2." 4
+\&\s-1VERBATIM\s0 \s-1COPYING\s0
+.Sp
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License. You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute. However, you may accept
+compensation in exchange for copies. If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+.Sp
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+.IP "3." 4
+\&\s-1COPYING\s0 \s-1IN\s0 \s-1QUANTITY\s0
+.Sp
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover. Both covers must also clearly and legibly identify
+you as the publisher of these copies. The front cover must present
+the full title with all words of the title equally prominent and
+visible. You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+.Sp
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+.Sp
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+.Sp
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+.IP "4." 4
+\&\s-1MODIFICATIONS\s0
+.Sp
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it. In addition, you must do these things in the Modified Version:
+.RS 4
+.IP "A." 4
+Use in the Title Page (and on the covers, if any) a title distinct
+from that of the Document, and from those of previous versions
+(which should, if there were any, be listed in the History section
+of the Document). You may use the same title as a previous version
+if the original publisher of that version gives permission.
+.IP "B." 4
+List on the Title Page, as authors, one or more persons or entities
+responsible for authorship of the modifications in the Modified
+Version, together with at least five of the principal authors of the
+Document (all of its principal authors, if it has fewer than five),
+unless they release you from this requirement.
+.IP "C." 4
+State on the Title page the name of the publisher of the
+Modified Version, as the publisher.
+.IP "D." 4
+Preserve all the copyright notices of the Document.
+.IP "E." 4
+Add an appropriate copyright notice for your modifications
+adjacent to the other copyright notices.
+.IP "F." 4
+Include, immediately after the copyright notices, a license notice
+giving the public permission to use the Modified Version under the
+terms of this License, in the form shown in the Addendum below.
+.IP "G." 4
+Preserve in that license notice the full lists of Invariant Sections
+and required Cover Texts given in the Document's license notice.
+.IP "H." 4
+Include an unaltered copy of this License.
+.IP "I." 4
+Preserve the section Entitled \*(L"History\*(R", Preserve its Title, and add
+to it an item stating at least the title, year, new authors, and
+publisher of the Modified Version as given on the Title Page. If
+there is no section Entitled \*(L"History\*(R" in the Document, create one
+stating the title, year, authors, and publisher of the Document as
+given on its Title Page, then add an item describing the Modified
+Version as stated in the previous sentence.
+.IP "J." 4
+Preserve the network location, if any, given in the Document for
+public access to a Transparent copy of the Document, and likewise
+the network locations given in the Document for previous versions
+it was based on. These may be placed in the \*(L"History\*(R" section.
+You may omit a network location for a work that was published at
+least four years before the Document itself, or if the original
+publisher of the version it refers to gives permission.
+.IP "K." 4
+For any section Entitled \*(L"Acknowledgements\*(R" or \*(L"Dedications\*(R", Preserve
+the Title of the section, and preserve in the section all the
+substance and tone of each of the contributor acknowledgements and/or
+dedications given therein.
+.IP "L." 4
+Preserve all the Invariant Sections of the Document,
+unaltered in their text and in their titles. Section numbers
+or the equivalent are not considered part of the section titles.
+.IP "M." 4
+Delete any section Entitled \*(L"Endorsements\*(R". Such a section
+may not be included in the Modified Version.
+.IP "N." 4
+Do not retitle any existing section to be Entitled \*(L"Endorsements\*(R" or
+to conflict in title with any Invariant Section.
+.IP "O." 4
+Preserve any Warranty Disclaimers.
+.RE
+.RS 4
+.Sp
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant. To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+.Sp
+You may add a section Entitled \*(L"Endorsements\*(R", provided it contains
+nothing but endorsements of your Modified Version by various
+parties\-\-\-for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+.Sp
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version. Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity. If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+.Sp
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+.RE
+.IP "5." 4
+\&\s-1COMBINING\s0 \s-1DOCUMENTS\s0
+.Sp
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+.Sp
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy. If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+.Sp
+In the combination, you must combine any sections Entitled \*(L"History\*(R"
+in the various original documents, forming one section Entitled
+\&\*(L"History\*(R"; likewise combine any sections Entitled \*(L"Acknowledgements\*(R",
+and any sections Entitled \*(L"Dedications\*(R". You must delete all
+sections Entitled \*(L"Endorsements.\*(R"
+.IP "6." 4
+\&\s-1COLLECTIONS\s0 \s-1OF\s0 \s-1DOCUMENTS\s0
+.Sp
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+.Sp
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+.IP "7." 4
+\&\s-1AGGREGATION\s0 \s-1WITH\s0 \s-1INDEPENDENT\s0 \s-1WORKS\s0
+.Sp
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an \*(L"aggregate\*(R" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+.Sp
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+.IP "8." 4
+\&\s-1TRANSLATION\s0
+.Sp
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections. You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers. In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+.Sp
+If a section in the Document is Entitled \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", or \*(L"History\*(R", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+.IP "9." 4
+\&\s-1TERMINATION\s0
+.Sp
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License. Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License. However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+.IP "10." 4
+.IX Item "10."
+\&\s-1FUTURE\s0 \s-1REVISIONS\s0 \s-1OF\s0 \s-1THIS\s0 \s-1LICENSE\s0
+.Sp
+The Free Software Foundation may publish new, revised versions
+of the \s-1GNU\s0 Free Documentation License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns. See
+<\fBhttp://www.gnu.org/copyleft/\fR>.
+.Sp
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation. If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+.Sh "\s-1ADDENDUM:\s0 How to use this License for your documents"
+.IX Subsection "ADDENDUM: How to use this License for your documents"
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+.PP
+.Vb 7
+\& Copyright (C) <year> <your name>.
+\& Permission is granted to copy, distribute and/or modify this document
+\& under the terms of the GNU Free Documentation License, Version 1.2
+\& or any later version published by the Free Software Foundation;
+\& with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+\& Texts. A copy of the license is included in the section entitled "GNU
+\& Free Documentation License".
+.Ve
+.PP
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the \*(L"with...Texts.\*(R" line with this:
+.PP
+.Vb 3
+\& with the Invariant Sections being <list their titles>, with
+\& the Front-Cover Texts being <list>, and with the Back-Cover Texts
+\& being <list>.
+.Ve
+.PP
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+.PP
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the \s-1GNU\s0 General Public License,
+to permit their use in free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+51 Franklin Street, Fifth Floor, Boston, \s-1MA\s0 02110\-1301, \s-1USA\s0
+.PP
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7
new file mode 100644
index 0000000..cfb4b1f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7
@@ -0,0 +1,835 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
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+.PP
+\fB\\$1\fR
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+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
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+.\" entries marked with X<> in POD. Of course, you'll have to process the
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+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
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+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
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+. ds #[ \f1
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+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
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+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPL 7"
+.TH GPL 7 " " "gcc-4.4.3" "GNU"
+.SH "NAME"
+gpl \- GNU General Public License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "\s-1GNU\s0 General Public License"
+.IX Subsection "GNU General Public License"
+.Sh "Version 3, 29 June 2007"
+.IX Subsection "Version 3, 29 June 2007"
+.Vb 1
+\& Copyright (c) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+.Ve
+.PP
+.Vb 2
+\& Everyone is permitted to copy and distribute verbatim copies of this
+\& license document, but changing it is not allowed.
+.Ve
+.Sh "Preamble"
+.IX Subsection "Preamble"
+The \s-1GNU\s0 General Public License is a free, copyleft license for
+software and other kinds of works.
+.PP
+The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works. By contrast,
+the \s-1GNU\s0 General Public License is intended to guarantee your freedom
+to share and change all versions of a program\*(--to make sure it remains
+free software for all its users. We, the Free Software Foundation,
+use the \s-1GNU\s0 General Public License for most of our software; it
+applies also to any other work released this way by its authors. You
+can apply it to your programs, too.
+.PP
+When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+.PP
+To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights. Therefore, you
+have certain responsibilities if you distribute copies of the
+software, or if you modify it: responsibilities to respect the freedom
+of others.
+.PP
+For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received. You must make sure that they, too,
+receive or can get the source code. And you must show them these
+terms so they know their rights.
+.PP
+Developers that use the \s-1GNU\s0 \s-1GPL\s0 protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+.PP
+For the developers' and authors' protection, the \s-1GPL\s0 clearly explains
+that there is no warranty for this free software. For both users' and
+authors' sake, the \s-1GPL\s0 requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+.PP
+Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so. This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software. The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the \s-1GPL\s0 to prohibit the
+practice for those products. If such problems arise substantially in
+other domains, we stand ready to extend this provision to those
+domains in future versions of the \s-1GPL\s0, as needed to protect the
+freedom of users.
+.PP
+Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish
+to avoid the special danger that patents applied to a free program
+could make it effectively proprietary. To prevent this, the \s-1GPL\s0
+assures that patents cannot be used to render the program non\-free.
+.PP
+The precise terms and conditions for copying, distribution and
+modification follow.
+.Sh "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "TERMS AND CONDITIONS"
+.IP "0. Definitions." 4
+.IX Item "0. Definitions."
+\&\*(L"This License\*(R" refers to version 3 of the \s-1GNU\s0 General Public License.
+.Sp
+\&\*(L"Copyright\*(R" also means copyright-like laws that apply to other kinds
+of works, such as semiconductor masks.
+.Sp
+\&\*(L"The Program\*(R" refers to any copyrightable work licensed under this
+License. Each licensee is addressed as \*(L"you\*(R". \*(L"Licensees\*(R" and
+\&\*(L"recipients\*(R" may be individuals or organizations.
+.Sp
+To \*(L"modify\*(R" a work means to copy from or adapt all or part of the work
+in a fashion requiring copyright permission, other than the making of
+an exact copy. The resulting work is called a \*(L"modified version\*(R" of
+the earlier work or a work \*(L"based on\*(R" the earlier work.
+.Sp
+A \*(L"covered work\*(R" means either the unmodified Program or a work based
+on the Program.
+.Sp
+To \*(L"propagate\*(R" a work means to do anything with it that, without
+permission, would make you directly or secondarily liable for
+infringement under applicable copyright law, except executing it on a
+computer or modifying a private copy. Propagation includes copying,
+distribution (with or without modification), making available to the
+public, and in some countries other activities as well.
+.Sp
+To \*(L"convey\*(R" a work means any kind of propagation that enables other
+parties to make or receive copies. Mere interaction with a user
+through a computer network, with no transfer of a copy, is not
+conveying.
+.Sp
+An interactive user interface displays \*(L"Appropriate Legal Notices\*(R" to
+the extent that it includes a convenient and prominently visible
+feature that (1) displays an appropriate copyright notice, and (2)
+tells the user that there is no warranty for the work (except to the
+extent that warranties are provided), that licensees may convey the
+work under this License, and how to view a copy of this License. If
+the interface presents a list of user commands or options, such as a
+menu, a prominent item in the list meets this criterion.
+.IP "1. Source Code." 4
+.IX Item "1. Source Code."
+The \*(L"source code\*(R" for a work means the preferred form of the work for
+making modifications to it. \*(L"Object code\*(R" means any non-source form
+of a work.
+.Sp
+A \*(L"Standard Interface\*(R" means an interface that either is an official
+standard defined by a recognized standards body, or, in the case of
+interfaces specified for a particular programming language, one that
+is widely used among developers working in that language.
+.Sp
+The \*(L"System Libraries\*(R" of an executable work include anything, other
+than the work as a whole, that (a) is included in the normal form of
+packaging a Major Component, but which is not part of that Major
+Component, and (b) serves only to enable use of the work with that
+Major Component, or to implement a Standard Interface for which an
+implementation is available to the public in source code form. A
+\&\*(L"Major Component\*(R", in this context, means a major essential component
+(kernel, window system, and so on) of the specific operating system
+(if any) on which the executable work runs, or a compiler used to
+produce the work, or an object code interpreter used to run it.
+.Sp
+The \*(L"Corresponding Source\*(R" for a work in object code form means all
+the source code needed to generate, install, and (for an executable
+work) run the object code and to modify the work, including scripts to
+control those activities. However, it does not include the work's
+System Libraries, or general-purpose tools or generally available free
+programs which are used unmodified in performing those activities but
+which are not part of the work. For example, Corresponding Source
+includes interface definition files associated with source files for
+the work, and the source code for shared libraries and dynamically
+linked subprograms that the work is specifically designed to require,
+such as by intimate data communication or control flow between those
+subprograms and other parts of the work.
+.Sp
+The Corresponding Source need not include anything that users can
+regenerate automatically from other parts of the Corresponding Source.
+.Sp
+The Corresponding Source for a work in source code form is that same
+work.
+.IP "2. Basic Permissions." 4
+.IX Item "2. Basic Permissions."
+All rights granted under this License are granted for the term of
+copyright on the Program, and are irrevocable provided the stated
+conditions are met. This License explicitly affirms your unlimited
+permission to run the unmodified Program. The output from running a
+covered work is covered by this License only if the output, given its
+content, constitutes a covered work. This License acknowledges your
+rights of fair use or other equivalent, as provided by copyright law.
+.Sp
+You may make, run and propagate covered works that you do not convey,
+without conditions so long as your license otherwise remains in force.
+You may convey covered works to others for the sole purpose of having
+them make modifications exclusively for you, or provide you with
+facilities for running those works, provided that you comply with the
+terms of this License in conveying all material for which you do not
+control copyright. Those thus making or running the covered works for
+you must do so exclusively on your behalf, under your direction and
+control, on terms that prohibit them from making any copies of your
+copyrighted material outside their relationship with you.
+.Sp
+Conveying under any other circumstances is permitted solely under the
+conditions stated below. Sublicensing is not allowed; section 10
+makes it unnecessary.
+.IP "3. Protecting Users' Legal Rights From Anti-Circumvention Law." 4
+.IX Item "3. Protecting Users' Legal Rights From Anti-Circumvention Law."
+No covered work shall be deemed part of an effective technological
+measure under any applicable law fulfilling obligations under article
+11 of the \s-1WIPO\s0 copyright treaty adopted on 20 December 1996, or
+similar laws prohibiting or restricting circumvention of such
+measures.
+.Sp
+When you convey a covered work, you waive any legal power to forbid
+circumvention of technological measures to the extent such
+circumvention is effected by exercising rights under this License with
+respect to the covered work, and you disclaim any intention to limit
+operation or modification of the work as a means of enforcing, against
+the work's users, your or third parties' legal rights to forbid
+circumvention of technological measures.
+.IP "4. Conveying Verbatim Copies." 4
+.IX Item "4. Conveying Verbatim Copies."
+You may convey verbatim copies of the Program's source code as you
+receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice;
+keep intact all notices stating that this License and any
+non-permissive terms added in accord with section 7 apply to the code;
+keep intact all notices of the absence of any warranty; and give all
+recipients a copy of this License along with the Program.
+.Sp
+You may charge any price or no price for each copy that you convey,
+and you may offer support or warranty protection for a fee.
+.IP "5. Conveying Modified Source Versions." 4
+.IX Item "5. Conveying Modified Source Versions."
+You may convey a work based on the Program, or the modifications to
+produce it from the Program, in the form of source code under the
+terms of section 4, provided that you also meet all of these
+conditions:
+.RS 4
+.IP "a." 4
+The work must carry prominent notices stating that you modified it,
+and giving a relevant date.
+.IP "b." 4
+The work must carry prominent notices stating that it is released
+under this License and any conditions added under section 7. This
+requirement modifies the requirement in section 4 to \*(L"keep intact all
+notices\*(R".
+.IP "c." 4
+You must license the entire work, as a whole, under this License to
+anyone who comes into possession of a copy. This License will
+therefore apply, along with any applicable section 7 additional terms,
+to the whole of the work, and all its parts, regardless of how they
+are packaged. This License gives no permission to license the work in
+any other way, but it does not invalidate such permission if you have
+separately received it.
+.IP "d." 4
+If the work has interactive user interfaces, each must display
+Appropriate Legal Notices; however, if the Program has interactive
+interfaces that do not display Appropriate Legal Notices, your work
+need not make them do so.
+.RE
+.RS 4
+.Sp
+A compilation of a covered work with other separate and independent
+works, which are not by their nature extensions of the covered work,
+and which are not combined with it such as to form a larger program,
+in or on a volume of a storage or distribution medium, is called an
+\&\*(L"aggregate\*(R" if the compilation and its resulting copyright are not
+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit. Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+.RE
+.IP "6. Conveying Non-Source Forms." 4
+.IX Item "6. Conveying Non-Source Forms."
+You may convey a covered work in object code form under the terms of
+sections 4 and 5, provided that you also convey the machine-readable
+Corresponding Source under the terms of this License, in one of these
+ways:
+.RS 4
+.IP "a." 4
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by the
+Corresponding Source fixed on a durable physical medium customarily
+used for software interchange.
+.IP "b." 4
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by a written
+offer, valid for at least three years and valid for as long as you
+offer spare parts or customer support for that product model, to give
+anyone who possesses the object code either (1) a copy of the
+Corresponding Source for all the software in the product that is
+covered by this License, on a durable physical medium customarily used
+for software interchange, for a price no more than your reasonable
+cost of physically performing this conveying of source, or (2) access
+to copy the Corresponding Source from a network server at no charge.
+.IP "c." 4
+Convey individual copies of the object code with a copy of the written
+offer to provide the Corresponding Source. This alternative is
+allowed only occasionally and noncommercially, and only if you
+received the object code with such an offer, in accord with subsection
+6b.
+.IP "d." 4
+Convey the object code by offering access from a designated place
+(gratis or for a charge), and offer equivalent access to the
+Corresponding Source in the same way through the same place at no
+further charge. You need not require recipients to copy the
+Corresponding Source along with the object code. If the place to copy
+the object code is a network server, the Corresponding Source may be
+on a different server (operated by you or a third party) that supports
+equivalent copying facilities, provided you maintain clear directions
+next to the object code saying where to find the Corresponding Source.
+Regardless of what server hosts the Corresponding Source, you remain
+obligated to ensure that it is available for as long as needed to
+satisfy these requirements.
+.IP "e." 4
+Convey the object code using peer-to-peer transmission, provided you
+inform other peers where the object code and Corresponding Source of
+the work are being offered to the general public at no charge under
+subsection 6d.
+.RE
+.RS 4
+.Sp
+A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+.Sp
+A \*(L"User Product\*(R" is either (1) a \*(L"consumer product\*(R", which means any
+tangible personal property which is normally used for personal,
+family, or household purposes, or (2) anything designed or sold for
+incorporation into a dwelling. In determining whether a product is a
+consumer product, doubtful cases shall be resolved in favor of
+coverage. For a particular product received by a particular user,
+\&\*(L"normally used\*(R" refers to a typical or common use of that class of
+product, regardless of the status of the particular user or of the way
+in which the particular user actually uses, or expects or is expected
+to use, the product. A product is a consumer product regardless of
+whether the product has substantial commercial, industrial or
+non-consumer uses, unless such uses represent the only significant
+mode of use of the product.
+.Sp
+\&\*(L"Installation Information\*(R" for a User Product means any methods,
+procedures, authorization keys, or other information required to
+install and execute modified versions of a covered work in that User
+Product from a modified version of its Corresponding Source. The
+information must suffice to ensure that the continued functioning of
+the modified object code is in no case prevented or interfered with
+solely because modification has been made.
+.Sp
+If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information. But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in \s-1ROM\s0).
+.Sp
+The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or
+updates for a work that has been modified or installed by the
+recipient, or for the User Product in which it has been modified or
+installed. Access to a network may be denied when the modification
+itself materially and adversely affects the operation of the network
+or violates the rules and protocols for communication across the
+network.
+.Sp
+Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+.RE
+.IP "7. Additional Terms." 4
+.IX Item "7. Additional Terms."
+\&\*(L"Additional permissions\*(R" are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law. If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+.Sp
+When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it. (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.) You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+.Sp
+Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders
+of that material) supplement the terms of this License with terms:
+.RS 4
+.IP "a." 4
+Disclaiming warranty or limiting liability differently from the terms
+of sections 15 and 16 of this License; or
+.IP "b." 4
+Requiring preservation of specified reasonable legal notices or author
+attributions in that material or in the Appropriate Legal Notices
+displayed by works containing it; or
+.IP "c." 4
+Prohibiting misrepresentation of the origin of that material, or
+requiring that modified versions of such material be marked in
+reasonable ways as different from the original version; or
+.IP "d." 4
+Limiting the use for publicity purposes of names of licensors or
+authors of the material; or
+.IP "e." 4
+Declining to grant rights under trademark law for use of some trade
+names, trademarks, or service marks; or
+.IP "f." 4
+Requiring indemnification of licensors and authors of that material by
+anyone who conveys the material (or modified versions of it) with
+contractual assumptions of liability to the recipient, for any
+liability that these contractual assumptions directly impose on those
+licensors and authors.
+.RE
+.RS 4
+.Sp
+All other non-permissive additional terms are considered \*(L"further
+restrictions\*(R" within the meaning of section 10. If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term. If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+.Sp
+If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+.Sp
+Additional terms, permissive or non\-permissive, may be stated in the
+form of a separately written license, or stated as exceptions; the
+above requirements apply either way.
+.RE
+.IP "8. Termination." 4
+.IX Item "8. Termination."
+You may not propagate or modify a covered work except as expressly
+provided under this License. Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+.Sp
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+.Sp
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+.Sp
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License. If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+.IP "9. Acceptance Not Required for Having Copies." 4
+.IX Item "9. Acceptance Not Required for Having Copies."
+You are not required to accept this License in order to receive or run
+a copy of the Program. Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance. However,
+nothing other than this License grants you permission to propagate or
+modify any covered work. These actions infringe copyright if you do
+not accept this License. Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+.IP "10. Automatic Licensing of Downstream Recipients." 4
+.IX Item "10. Automatic Licensing of Downstream Recipients."
+Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License. You are not responsible
+for enforcing compliance by third parties with this License.
+.Sp
+An \*(L"entity transaction\*(R" is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations. If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+.Sp
+You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License. For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+.IP "11. Patents." 4
+.IX Item "11. Patents."
+A \*(L"contributor\*(R" is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based. The
+work thus licensed is called the contributor's \*(L"contributor version\*(R".
+.Sp
+A contributor's \*(L"essential patent claims\*(R" are all patent claims owned
+or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version. For
+purposes of this definition, \*(L"control\*(R" includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
+this License.
+.Sp
+Each contributor grants you a non\-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+.Sp
+In the following three paragraphs, a \*(L"patent license\*(R" is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement). To \*(L"grant\*(R" such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+.Sp
+If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients. \*(L"Knowingly relying\*(R" means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+.Sp
+If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+.Sp
+A patent license is \*(L"discriminatory\*(R" if it does not include within the
+scope of its coverage, prohibits the exercise of, or is conditioned on
+the non-exercise of one or more of the rights that are specifically
+granted under this License. You may not convey a covered work if you
+are a party to an arrangement with a third party that is in the
+business of distributing software, under which you make payment to the
+third party based on the extent of your activity of conveying the
+work, and under which the third party grants, to any of the parties
+who would receive the covered work from you, a discriminatory patent
+license (a) in connection with copies of the covered work conveyed by
+you (or copies made from those copies), or (b) primarily for and in
+connection with specific products or compilations that contain the
+covered work, unless you entered into that arrangement, or that patent
+license was granted, prior to 28 March 2007.
+.Sp
+Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+.IP "12. No Surrender of Others' Freedom." 4
+.IX Item "12. No Surrender of Others' Freedom."
+If conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot convey
+a covered work so as to satisfy simultaneously your obligations under
+this License and any other pertinent obligations, then as a
+consequence you may not convey it at all. For example, if you agree
+to terms that obligate you to collect a royalty for further conveying
+from those to whom you convey the Program, the only way you could
+satisfy both those terms and this License would be to refrain entirely
+from conveying the Program.
+.IP "13. Use with the \s-1GNU\s0 Affero General Public License." 4
+.IX Item "13. Use with the GNU Affero General Public License."
+Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the \s-1GNU\s0 Affero General Public License into a single
+combined work, and to convey the resulting work. The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the \s-1GNU\s0 Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.
+.IP "14. Revised Versions of this License." 4
+.IX Item "14. Revised Versions of this License."
+The Free Software Foundation may publish revised and/or new versions
+of the \s-1GNU\s0 General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+.Sp
+Each version is given a distinguishing version number. If the Program
+specifies that a certain numbered version of the \s-1GNU\s0 General Public
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that numbered version or
+of any later version published by the Free Software Foundation. If
+the Program does not specify a version number of the \s-1GNU\s0 General
+Public License, you may choose any version ever published by the Free
+Software Foundation.
+.Sp
+If the Program specifies that a proxy can decide which future versions
+of the \s-1GNU\s0 General Public License can be used, that proxy's public
+statement of acceptance of a version permanently authorizes you to
+choose that version for the Program.
+.Sp
+Later license versions may give you additional or different
+permissions. However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+.IP "15. Disclaimer of Warranty." 4
+.IX Item "15. Disclaimer of Warranty."
+\&\s-1THERE\s0 \s-1IS\s0 \s-1NO\s0 \s-1WARRANTY\s0 \s-1FOR\s0 \s-1THE\s0 \s-1PROGRAM\s0, \s-1TO\s0 \s-1THE\s0 \s-1EXTENT\s0 \s-1PERMITTED\s0 \s-1BY\s0
+\&\s-1APPLICABLE\s0 \s-1LAW\s0. \s-1EXCEPT\s0 \s-1WHEN\s0 \s-1OTHERWISE\s0 \s-1STATED\s0 \s-1IN\s0 \s-1WRITING\s0 \s-1THE\s0 \s-1COPYRIGHT\s0
+\&\s-1HOLDERS\s0 \s-1AND/OR\s0 \s-1OTHER\s0 \s-1PARTIES\s0 \s-1PROVIDE\s0 \s-1THE\s0 \s-1PROGRAM\s0 \*(L"\s-1AS\s0 \s-1IS\s0\*(R" \s-1WITHOUT\s0
+\&\s-1WARRANTY\s0 \s-1OF\s0 \s-1ANY\s0 \s-1KIND\s0, \s-1EITHER\s0 \s-1EXPRESSED\s0 \s-1OR\s0 \s-1IMPLIED\s0, \s-1INCLUDING\s0, \s-1BUT\s0 \s-1NOT\s0
+\&\s-1LIMITED\s0 \s-1TO\s0, \s-1THE\s0 \s-1IMPLIED\s0 \s-1WARRANTIES\s0 \s-1OF\s0 \s-1MERCHANTABILITY\s0 \s-1AND\s0 \s-1FITNESS\s0 \s-1FOR\s0
+A \s-1PARTICULAR\s0 \s-1PURPOSE\s0. \s-1THE\s0 \s-1ENTIRE\s0 \s-1RISK\s0 \s-1AS\s0 \s-1TO\s0 \s-1THE\s0 \s-1QUALITY\s0 \s-1AND\s0
+\&\s-1PERFORMANCE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1IS\s0 \s-1WITH\s0 \s-1YOU\s0. \s-1SHOULD\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1PROVE\s0
+\&\s-1DEFECTIVE\s0, \s-1YOU\s0 \s-1ASSUME\s0 \s-1THE\s0 \s-1COST\s0 \s-1OF\s0 \s-1ALL\s0 \s-1NECESSARY\s0 \s-1SERVICING\s0, \s-1REPAIR\s0 \s-1OR\s0
+\&\s-1CORRECTION\s0.
+.IP "16. Limitation of Liability." 4
+.IX Item "16. Limitation of Liability."
+\&\s-1IN\s0 \s-1NO\s0 \s-1EVENT\s0 \s-1UNLESS\s0 \s-1REQUIRED\s0 \s-1BY\s0 \s-1APPLICABLE\s0 \s-1LAW\s0 \s-1OR\s0 \s-1AGREED\s0 \s-1TO\s0 \s-1IN\s0 \s-1WRITING\s0
+\&\s-1WILL\s0 \s-1ANY\s0 \s-1COPYRIGHT\s0 \s-1HOLDER\s0, \s-1OR\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PARTY\s0 \s-1WHO\s0 \s-1MODIFIES\s0 \s-1AND/OR\s0
+\&\s-1CONVEYS\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1AS\s0 \s-1PERMITTED\s0 \s-1ABOVE\s0, \s-1BE\s0 \s-1LIABLE\s0 \s-1TO\s0 \s-1YOU\s0 \s-1FOR\s0 \s-1DAMAGES\s0,
+\&\s-1INCLUDING\s0 \s-1ANY\s0 \s-1GENERAL\s0, \s-1SPECIAL\s0, \s-1INCIDENTAL\s0 \s-1OR\s0 \s-1CONSEQUENTIAL\s0 \s-1DAMAGES\s0
+\&\s-1ARISING\s0 \s-1OUT\s0 \s-1OF\s0 \s-1THE\s0 \s-1USE\s0 \s-1OR\s0 \s-1INABILITY\s0 \s-1TO\s0 \s-1USE\s0 \s-1THE\s0 \s-1PROGRAM\s0 (\s-1INCLUDING\s0 \s-1BUT\s0
+\&\s-1NOT\s0 \s-1LIMITED\s0 \s-1TO\s0 \s-1LOSS\s0 \s-1OF\s0 \s-1DATA\s0 \s-1OR\s0 \s-1DATA\s0 \s-1BEING\s0 \s-1RENDERED\s0 \s-1INACCURATE\s0 \s-1OR\s0
+\&\s-1LOSSES\s0 \s-1SUSTAINED\s0 \s-1BY\s0 \s-1YOU\s0 \s-1OR\s0 \s-1THIRD\s0 \s-1PARTIES\s0 \s-1OR\s0 A \s-1FAILURE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0
+\&\s-1TO\s0 \s-1OPERATE\s0 \s-1WITH\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PROGRAMS\s0), \s-1EVEN\s0 \s-1IF\s0 \s-1SUCH\s0 \s-1HOLDER\s0 \s-1OR\s0 \s-1OTHER\s0
+\&\s-1PARTY\s0 \s-1HAS\s0 \s-1BEEN\s0 \s-1ADVISED\s0 \s-1OF\s0 \s-1THE\s0 \s-1POSSIBILITY\s0 \s-1OF\s0 \s-1SUCH\s0 \s-1DAMAGES\s0.
+.IP "17. Interpretation of Sections 15 and 16." 4
+.IX Item "17. Interpretation of Sections 15 and 16."
+If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+.Sh "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "END OF TERMS AND CONDITIONS"
+.Sh "How to Apply These Terms to Your New Programs"
+.IX Subsection "How to Apply These Terms to Your New Programs"
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+.PP
+To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the \*(L"copyright\*(R" line and a pointer to where the full notice is found.
+.PP
+.Vb 2
+\& <one line to give the program's name and a brief idea of what it does.>
+\& Copyright (C) <year> <name of author>
+.Ve
+.PP
+.Vb 4
+\& This program is free software: you can redistribute it and/or modify
+\& it under the terms of the GNU General Public License as published by
+\& the Free Software Foundation, either version 3 of the License, or (at
+\& your option) any later version.
+.Ve
+.PP
+.Vb 4
+\& This program is distributed in the hope that it will be useful, but
+\& WITHOUT ANY WARRANTY; without even the implied warranty of
+\& MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+\& General Public License for more details.
+.Ve
+.PP
+.Vb 2
+\& You should have received a copy of the GNU General Public License
+\& along with this program. If not, see <http://www.gnu.org/licenses/>.
+.Ve
+.PP
+Also add information on how to contact you by electronic and paper mail.
+.PP
+If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+.PP
+.Vb 4
+\& <program> Copyright (C) <year> <name of author>
+\& This program comes with ABSOLUTELY NO WARRANTY; for details type "show w".
+\& This is free software, and you are welcome to redistribute it
+\& under certain conditions; type "show c" for details.
+.Ve
+.PP
+The hypothetical commands \fBshow w\fR and \fBshow c\fR should show
+the appropriate parts of the General Public License. Of course, your
+program's commands might be different; for a \s-1GUI\s0 interface, you would
+use an \*(L"about box\*(R".
+.PP
+You should also get your employer (if you work as a programmer) or school,
+if any, to sign a \*(L"copyright disclaimer\*(R" for the program, if necessary.
+For more information on this, and how to apply and follow the \s-1GNU\s0 \s-1GPL\s0, see
+<\fBhttp://www.gnu.org/licenses/\fR>.
+.PP
+The \s-1GNU\s0 General Public License does not permit incorporating your
+program into proprietary programs. If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library. If this is what you want to do, use
+the \s-1GNU\s0 Lesser General Public License instead of this License. But
+first, please read <\fBhttp://www.gnu.org/philosophy/why\-not\-lgpl.html\fR>.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2007 Free Software Foundation, Inc.
+.PP
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml
new file mode 100644
index 0000000..d2befa7
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml
@@ -0,0 +1,314 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/x86/include/asm/unistd_64.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="read" number="0"/>
+ <syscall name="write" number="1"/>
+ <syscall name="open" number="2"/>
+ <syscall name="close" number="3"/>
+ <syscall name="stat" number="4"/>
+ <syscall name="fstat" number="5"/>
+ <syscall name="lstat" number="6"/>
+ <syscall name="poll" number="7"/>
+ <syscall name="lseek" number="8"/>
+ <syscall name="mmap" number="9"/>
+ <syscall name="mprotect" number="10"/>
+ <syscall name="munmap" number="11"/>
+ <syscall name="brk" number="12"/>
+ <syscall name="rt_sigaction" number="13"/>
+ <syscall name="rt_sigprocmask" number="14"/>
+ <syscall name="rt_sigreturn" number="15"/>
+ <syscall name="ioctl" number="16"/>
+ <syscall name="pread64" number="17"/>
+ <syscall name="pwrite64" number="18"/>
+ <syscall name="readv" number="19"/>
+ <syscall name="writev" number="20"/>
+ <syscall name="access" number="21"/>
+ <syscall name="pipe" number="22"/>
+ <syscall name="select" number="23"/>
+ <syscall name="sched_yield" number="24"/>
+ <syscall name="mremap" number="25"/>
+ <syscall name="msync" number="26"/>
+ <syscall name="mincore" number="27"/>
+ <syscall name="madvise" number="28"/>
+ <syscall name="shmget" number="29"/>
+ <syscall name="shmat" number="30"/>
+ <syscall name="shmctl" number="31"/>
+ <syscall name="dup" number="32"/>
+ <syscall name="dup2" number="33"/>
+ <syscall name="pause" number="34"/>
+ <syscall name="nanosleep" number="35"/>
+ <syscall name="getitimer" number="36"/>
+ <syscall name="alarm" number="37"/>
+ <syscall name="setitimer" number="38"/>
+ <syscall name="getpid" number="39"/>
+ <syscall name="sendfile" number="40"/>
+ <syscall name="socket" number="41"/>
+ <syscall name="connect" number="42"/>
+ <syscall name="accept" number="43"/>
+ <syscall name="sendto" number="44"/>
+ <syscall name="recvfrom" number="45"/>
+ <syscall name="sendmsg" number="46"/>
+ <syscall name="recvmsg" number="47"/>
+ <syscall name="shutdown" number="48"/>
+ <syscall name="bind" number="49"/>
+ <syscall name="listen" number="50"/>
+ <syscall name="getsockname" number="51"/>
+ <syscall name="getpeername" number="52"/>
+ <syscall name="socketpair" number="53"/>
+ <syscall name="setsockopt" number="54"/>
+ <syscall name="getsockopt" number="55"/>
+ <syscall name="clone" number="56"/>
+ <syscall name="fork" number="57"/>
+ <syscall name="vfork" number="58"/>
+ <syscall name="execve" number="59"/>
+ <syscall name="exit" number="60"/>
+ <syscall name="wait4" number="61"/>
+ <syscall name="kill" number="62"/>
+ <syscall name="uname" number="63"/>
+ <syscall name="semget" number="64"/>
+ <syscall name="semop" number="65"/>
+ <syscall name="semctl" number="66"/>
+ <syscall name="shmdt" number="67"/>
+ <syscall name="msgget" number="68"/>
+ <syscall name="msgsnd" number="69"/>
+ <syscall name="msgrcv" number="70"/>
+ <syscall name="msgctl" number="71"/>
+ <syscall name="fcntl" number="72"/>
+ <syscall name="flock" number="73"/>
+ <syscall name="fsync" number="74"/>
+ <syscall name="fdatasync" number="75"/>
+ <syscall name="truncate" number="76"/>
+ <syscall name="ftruncate" number="77"/>
+ <syscall name="getdents" number="78"/>
+ <syscall name="getcwd" number="79"/>
+ <syscall name="chdir" number="80"/>
+ <syscall name="fchdir" number="81"/>
+ <syscall name="rename" number="82"/>
+ <syscall name="mkdir" number="83"/>
+ <syscall name="rmdir" number="84"/>
+ <syscall name="creat" number="85"/>
+ <syscall name="link" number="86"/>
+ <syscall name="unlink" number="87"/>
+ <syscall name="symlink" number="88"/>
+ <syscall name="readlink" number="89"/>
+ <syscall name="chmod" number="90"/>
+ <syscall name="fchmod" number="91"/>
+ <syscall name="chown" number="92"/>
+ <syscall name="fchown" number="93"/>
+ <syscall name="lchown" number="94"/>
+ <syscall name="umask" number="95"/>
+ <syscall name="gettimeofday" number="96"/>
+ <syscall name="getrlimit" number="97"/>
+ <syscall name="getrusage" number="98"/>
+ <syscall name="sysinfo" number="99"/>
+ <syscall name="times" number="100"/>
+ <syscall name="ptrace" number="101"/>
+ <syscall name="getuid" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="getgid" number="104"/>
+ <syscall name="setuid" number="105"/>
+ <syscall name="setgid" number="106"/>
+ <syscall name="geteuid" number="107"/>
+ <syscall name="getegid" number="108"/>
+ <syscall name="setpgid" number="109"/>
+ <syscall name="getppid" number="110"/>
+ <syscall name="getpgrp" number="111"/>
+ <syscall name="setsid" number="112"/>
+ <syscall name="setreuid" number="113"/>
+ <syscall name="setregid" number="114"/>
+ <syscall name="getgroups" number="115"/>
+ <syscall name="setgroups" number="116"/>
+ <syscall name="setresuid" number="117"/>
+ <syscall name="getresuid" number="118"/>
+ <syscall name="setresgid" number="119"/>
+ <syscall name="getresgid" number="120"/>
+ <syscall name="getpgid" number="121"/>
+ <syscall name="setfsuid" number="122"/>
+ <syscall name="setfsgid" number="123"/>
+ <syscall name="getsid" number="124"/>
+ <syscall name="capget" number="125"/>
+ <syscall name="capset" number="126"/>
+ <syscall name="rt_sigpending" number="127"/>
+ <syscall name="rt_sigtimedwait" number="128"/>
+ <syscall name="rt_sigqueueinfo" number="129"/>
+ <syscall name="rt_sigsuspend" number="130"/>
+ <syscall name="sigaltstack" number="131"/>
+ <syscall name="utime" number="132"/>
+ <syscall name="mknod" number="133"/>
+ <syscall name="uselib" number="134"/>
+ <syscall name="personality" number="135"/>
+ <syscall name="ustat" number="136"/>
+ <syscall name="statfs" number="137"/>
+ <syscall name="fstatfs" number="138"/>
+ <syscall name="sysfs" number="139"/>
+ <syscall name="getpriority" number="140"/>
+ <syscall name="setpriority" number="141"/>
+ <syscall name="sched_setparam" number="142"/>
+ <syscall name="sched_getparam" number="143"/>
+ <syscall name="sched_setscheduler" number="144"/>
+ <syscall name="sched_getscheduler" number="145"/>
+ <syscall name="sched_get_priority_max" number="146"/>
+ <syscall name="sched_get_priority_min" number="147"/>
+ <syscall name="sched_rr_get_interval" number="148"/>
+ <syscall name="mlock" number="149"/>
+ <syscall name="munlock" number="150"/>
+ <syscall name="mlockall" number="151"/>
+ <syscall name="munlockall" number="152"/>
+ <syscall name="vhangup" number="153"/>
+ <syscall name="modify_ldt" number="154"/>
+ <syscall name="pivot_root" number="155"/>
+ <syscall name="_sysctl" number="156"/>
+ <syscall name="prctl" number="157"/>
+ <syscall name="arch_prctl" number="158"/>
+ <syscall name="adjtimex" number="159"/>
+ <syscall name="setrlimit" number="160"/>
+ <syscall name="chroot" number="161"/>
+ <syscall name="sync" number="162"/>
+ <syscall name="acct" number="163"/>
+ <syscall name="settimeofday" number="164"/>
+ <syscall name="mount" number="165"/>
+ <syscall name="umount2" number="166"/>
+ <syscall name="swapon" number="167"/>
+ <syscall name="swapoff" number="168"/>
+ <syscall name="reboot" number="169"/>
+ <syscall name="sethostname" number="170"/>
+ <syscall name="setdomainname" number="171"/>
+ <syscall name="iopl" number="172"/>
+ <syscall name="ioperm" number="173"/>
+ <syscall name="create_module" number="174"/>
+ <syscall name="init_module" number="175"/>
+ <syscall name="delete_module" number="176"/>
+ <syscall name="get_kernel_syms" number="177"/>
+ <syscall name="query_module" number="178"/>
+ <syscall name="quotactl" number="179"/>
+ <syscall name="nfsservctl" number="180"/>
+ <syscall name="getpmsg" number="181"/>
+ <syscall name="putpmsg" number="182"/>
+ <syscall name="afs_syscall" number="183"/>
+ <syscall name="tuxcall" number="184"/>
+ <syscall name="security" number="185"/>
+ <syscall name="gettid" number="186"/>
+ <syscall name="readahead" number="187"/>
+ <syscall name="setxattr" number="188"/>
+ <syscall name="lsetxattr" number="189"/>
+ <syscall name="fsetxattr" number="190"/>
+ <syscall name="getxattr" number="191"/>
+ <syscall name="lgetxattr" number="192"/>
+ <syscall name="fgetxattr" number="193"/>
+ <syscall name="listxattr" number="194"/>
+ <syscall name="llistxattr" number="195"/>
+ <syscall name="flistxattr" number="196"/>
+ <syscall name="removexattr" number="197"/>
+ <syscall name="lremovexattr" number="198"/>
+ <syscall name="fremovexattr" number="199"/>
+ <syscall name="tkill" number="200"/>
+ <syscall name="time" number="201"/>
+ <syscall name="futex" number="202"/>
+ <syscall name="sched_setaffinity" number="203"/>
+ <syscall name="sched_getaffinity" number="204"/>
+ <syscall name="set_thread_area" number="205"/>
+ <syscall name="io_setup" number="206"/>
+ <syscall name="io_destroy" number="207"/>
+ <syscall name="io_getevents" number="208"/>
+ <syscall name="io_submit" number="209"/>
+ <syscall name="io_cancel" number="210"/>
+ <syscall name="get_thread_area" number="211"/>
+ <syscall name="lookup_dcookie" number="212"/>
+ <syscall name="epoll_create" number="213"/>
+ <syscall name="epoll_ctl_old" number="214"/>
+ <syscall name="epoll_wait_old" number="215"/>
+ <syscall name="remap_file_pages" number="216"/>
+ <syscall name="getdents64" number="217"/>
+ <syscall name="set_tid_address" number="218"/>
+ <syscall name="restart_syscall" number="219"/>
+ <syscall name="semtimedop" number="220"/>
+ <syscall name="fadvise64" number="221"/>
+ <syscall name="timer_create" number="222"/>
+ <syscall name="timer_settime" number="223"/>
+ <syscall name="timer_gettime" number="224"/>
+ <syscall name="timer_getoverrun" number="225"/>
+ <syscall name="timer_delete" number="226"/>
+ <syscall name="clock_settime" number="227"/>
+ <syscall name="clock_gettime" number="228"/>
+ <syscall name="clock_getres" number="229"/>
+ <syscall name="clock_nanosleep" number="230"/>
+ <syscall name="exit_group" number="231"/>
+ <syscall name="epoll_wait" number="232"/>
+ <syscall name="epoll_ctl" number="233"/>
+ <syscall name="tgkill" number="234"/>
+ <syscall name="utimes" number="235"/>
+ <syscall name="vserver" number="236"/>
+ <syscall name="mbind" number="237"/>
+ <syscall name="set_mempolicy" number="238"/>
+ <syscall name="get_mempolicy" number="239"/>
+ <syscall name="mq_open" number="240"/>
+ <syscall name="mq_unlink" number="241"/>
+ <syscall name="mq_timedsend" number="242"/>
+ <syscall name="mq_timedreceive" number="243"/>
+ <syscall name="mq_notify" number="244"/>
+ <syscall name="mq_getsetattr" number="245"/>
+ <syscall name="kexec_load" number="246"/>
+ <syscall name="waitid" number="247"/>
+ <syscall name="add_key" number="248"/>
+ <syscall name="request_key" number="249"/>
+ <syscall name="keyctl" number="250"/>
+ <syscall name="ioprio_set" number="251"/>
+ <syscall name="ioprio_get" number="252"/>
+ <syscall name="inotify_init" number="253"/>
+ <syscall name="inotify_add_watch" number="254"/>
+ <syscall name="inotify_rm_watch" number="255"/>
+ <syscall name="migrate_pages" number="256"/>
+ <syscall name="openat" number="257"/>
+ <syscall name="mkdirat" number="258"/>
+ <syscall name="mknodat" number="259"/>
+ <syscall name="fchownat" number="260"/>
+ <syscall name="futimesat" number="261"/>
+ <syscall name="newfstatat" number="262"/>
+ <syscall name="unlinkat" number="263"/>
+ <syscall name="renameat" number="264"/>
+ <syscall name="linkat" number="265"/>
+ <syscall name="symlinkat" number="266"/>
+ <syscall name="readlinkat" number="267"/>
+ <syscall name="fchmodat" number="268"/>
+ <syscall name="faccessat" number="269"/>
+ <syscall name="pselect6" number="270"/>
+ <syscall name="ppoll" number="271"/>
+ <syscall name="unshare" number="272"/>
+ <syscall name="set_robust_list" number="273"/>
+ <syscall name="get_robust_list" number="274"/>
+ <syscall name="splice" number="275"/>
+ <syscall name="tee" number="276"/>
+ <syscall name="sync_file_range" number="277"/>
+ <syscall name="vmsplice" number="278"/>
+ <syscall name="move_pages" number="279"/>
+ <syscall name="utimensat" number="280"/>
+ <syscall name="epoll_pwait" number="281"/>
+ <syscall name="signalfd" number="282"/>
+ <syscall name="timerfd_create" number="283"/>
+ <syscall name="eventfd" number="284"/>
+ <syscall name="fallocate" number="285"/>
+ <syscall name="timerfd_settime" number="286"/>
+ <syscall name="timerfd_gettime" number="287"/>
+ <syscall name="accept4" number="288"/>
+ <syscall name="signalfd4" number="289"/>
+ <syscall name="eventfd2" number="290"/>
+ <syscall name="epoll_create1" number="291"/>
+ <syscall name="dup3" number="292"/>
+ <syscall name="pipe2" number="293"/>
+ <syscall name="inotify_init1" number="294"/>
+ <syscall name="preadv" number="295"/>
+ <syscall name="pwritev" number="296"/>
+</syscalls_info>
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd
new file mode 100644
index 0000000..865eba6
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd
@@ -0,0 +1,14 @@
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- The root element of a syscall info is <syscalls-info>. -->
+
+<!ELEMENT syscalls-info (syscall*)>
+
+<!ELEMENT syscall EMPTY>
+<!ATTLIST syscall
+ name CDATA #REQUIRED
+ number CDATA #REQUIRED>
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml
new file mode 100644
index 0000000..c79ad9c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml
@@ -0,0 +1,340 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/x86/include/asm/unistd_32.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86old" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="vm86" number="166"/>
+ <syscall name="query_module" number="167"/>
+ <syscall name="poll" number="168"/>
+ <syscall name="nfsservctl" number="169"/>
+ <syscall name="setresgid" number="170"/>
+ <syscall name="getresgid" number="171"/>
+ <syscall name="prctl" number="172"/>
+ <syscall name="rt_sigreturn" number="173"/>
+ <syscall name="rt_sigaction" number="174"/>
+ <syscall name="rt_sigprocmask" number="175"/>
+ <syscall name="rt_sigpending" number="176"/>
+ <syscall name="rt_sigtimedwait" number="177"/>
+ <syscall name="rt_sigqueueinfo" number="178"/>
+ <syscall name="rt_sigsuspend" number="179"/>
+ <syscall name="pread64" number="180"/>
+ <syscall name="pwrite64" number="181"/>
+ <syscall name="chown" number="182"/>
+ <syscall name="getcwd" number="183"/>
+ <syscall name="capget" number="184"/>
+ <syscall name="capset" number="185"/>
+ <syscall name="sigaltstack" number="186"/>
+ <syscall name="sendfile" number="187"/>
+ <syscall name="getpmsg" number="188"/>
+ <syscall name="putpmsg" number="189"/>
+ <syscall name="vfork" number="190"/>
+ <syscall name="ugetrlimit" number="191"/>
+ <syscall name="mmap2" number="192"/>
+ <syscall name="truncate64" number="193"/>
+ <syscall name="ftruncate64" number="194"/>
+ <syscall name="stat64" number="195"/>
+ <syscall name="lstat64" number="196"/>
+ <syscall name="fstat64" number="197"/>
+ <syscall name="lchown32" number="198"/>
+ <syscall name="getuid32" number="199"/>
+ <syscall name="getgid32" number="200"/>
+ <syscall name="geteuid32" number="201"/>
+ <syscall name="getegid32" number="202"/>
+ <syscall name="setreuid32" number="203"/>
+ <syscall name="setregid32" number="204"/>
+ <syscall name="getgroups32" number="205"/>
+ <syscall name="setgroups32" number="206"/>
+ <syscall name="fchown32" number="207"/>
+ <syscall name="setresuid32" number="208"/>
+ <syscall name="getresuid32" number="209"/>
+ <syscall name="setresgid32" number="210"/>
+ <syscall name="getresgid32" number="211"/>
+ <syscall name="chown32" number="212"/>
+ <syscall name="setuid32" number="213"/>
+ <syscall name="setgid32" number="214"/>
+ <syscall name="setfsuid32" number="215"/>
+ <syscall name="setfsgid32" number="216"/>
+ <syscall name="pivot_root" number="217"/>
+ <syscall name="mincore" number="218"/>
+ <syscall name="madvise" number="219"/>
+ <syscall name="madvise1" number="220"/>
+ <syscall name="getdents64" number="221"/>
+ <syscall name="fcntl64" number="222"/>
+ <syscall name="gettid" number="224"/>
+ <syscall name="readahead" number="225"/>
+ <syscall name="setxattr" number="226"/>
+ <syscall name="lsetxattr" number="227"/>
+ <syscall name="fsetxattr" number="228"/>
+ <syscall name="getxattr" number="229"/>
+ <syscall name="lgetxattr" number="230"/>
+ <syscall name="fgetxattr" number="231"/>
+ <syscall name="listxattr" number="232"/>
+ <syscall name="llistxattr" number="233"/>
+ <syscall name="flistxattr" number="234"/>
+ <syscall name="removexattr" number="235"/>
+ <syscall name="lremovexattr" number="236"/>
+ <syscall name="fremovexattr" number="237"/>
+ <syscall name="tkill" number="238"/>
+ <syscall name="sendfile64" number="239"/>
+ <syscall name="futex" number="240"/>
+ <syscall name="sched_setaffinity" number="241"/>
+ <syscall name="sched_getaffinity" number="242"/>
+ <syscall name="set_thread_area" number="243"/>
+ <syscall name="get_thread_area" number="244"/>
+ <syscall name="io_setup" number="245"/>
+ <syscall name="io_destroy" number="246"/>
+ <syscall name="io_getevents" number="247"/>
+ <syscall name="io_submit" number="248"/>
+ <syscall name="io_cancel" number="249"/>
+ <syscall name="fadvise64" number="250"/>
+ <syscall name="exit_group" number="252"/>
+ <syscall name="lookup_dcookie" number="253"/>
+ <syscall name="epoll_create" number="254"/>
+ <syscall name="epoll_ctl" number="255"/>
+ <syscall name="epoll_wait" number="256"/>
+ <syscall name="remap_file_pages" number="257"/>
+ <syscall name="set_tid_address" number="258"/>
+ <syscall name="timer_create" number="259"/>
+ <syscall name="timer_settime" number="260"/>
+ <syscall name="timer_gettime" number="261"/>
+ <syscall name="timer_getoverrun" number="262"/>
+ <syscall name="timer_delete" number="263"/>
+ <syscall name="clock_settime" number="264"/>
+ <syscall name="clock_gettime" number="265"/>
+ <syscall name="clock_getres" number="266"/>
+ <syscall name="clock_nanosleep" number="267"/>
+ <syscall name="statfs64" number="268"/>
+ <syscall name="fstatfs64" number="269"/>
+ <syscall name="tgkill" number="270"/>
+ <syscall name="utimes" number="271"/>
+ <syscall name="fadvise64_64" number="272"/>
+ <syscall name="vserver" number="273"/>
+ <syscall name="mbind" number="274"/>
+ <syscall name="get_mempolicy" number="275"/>
+ <syscall name="set_mempolicy" number="276"/>
+ <syscall name="mq_open" number="277"/>
+ <syscall name="mq_unlink" number="278"/>
+ <syscall name="mq_timedsend" number="279"/>
+ <syscall name="mq_timedreceive" number="280"/>
+ <syscall name="mq_notify" number="281"/>
+ <syscall name="mq_getsetattr" number="282"/>
+ <syscall name="kexec_load" number="283"/>
+ <syscall name="waitid" number="284"/>
+ <syscall name="add_key" number="286"/>
+ <syscall name="request_key" number="287"/>
+ <syscall name="keyctl" number="288"/>
+ <syscall name="ioprio_set" number="289"/>
+ <syscall name="ioprio_get" number="290"/>
+ <syscall name="inotify_init" number="291"/>
+ <syscall name="inotify_add_watch" number="292"/>
+ <syscall name="inotify_rm_watch" number="293"/>
+ <syscall name="migrate_pages" number="294"/>
+ <syscall name="openat" number="295"/>
+ <syscall name="mkdirat" number="296"/>
+ <syscall name="mknodat" number="297"/>
+ <syscall name="fchownat" number="298"/>
+ <syscall name="futimesat" number="299"/>
+ <syscall name="fstatat64" number="300"/>
+ <syscall name="unlinkat" number="301"/>
+ <syscall name="renameat" number="302"/>
+ <syscall name="linkat" number="303"/>
+ <syscall name="symlinkat" number="304"/>
+ <syscall name="readlinkat" number="305"/>
+ <syscall name="fchmodat" number="306"/>
+ <syscall name="faccessat" number="307"/>
+ <syscall name="pselect6" number="308"/>
+ <syscall name="ppoll" number="309"/>
+ <syscall name="unshare" number="310"/>
+ <syscall name="set_robust_list" number="311"/>
+ <syscall name="get_robust_list" number="312"/>
+ <syscall name="splice" number="313"/>
+ <syscall name="sync_file_range" number="314"/>
+ <syscall name="tee" number="315"/>
+ <syscall name="vmsplice" number="316"/>
+ <syscall name="move_pages" number="317"/>
+ <syscall name="getcpu" number="318"/>
+ <syscall name="epoll_pwait" number="319"/>
+ <syscall name="utimensat" number="320"/>
+ <syscall name="signalfd" number="321"/>
+ <syscall name="timerfd_create" number="322"/>
+ <syscall name="eventfd" number="323"/>
+ <syscall name="fallocate" number="324"/>
+ <syscall name="timerfd_settime" number="325"/>
+</syscalls_info>
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml
new file mode 100644
index 0000000..876e0b6
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml
@@ -0,0 +1,310 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/powerpc/include/asm/unistd.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="query_module" number="166"/>
+ <syscall name="poll" number="167"/>
+ <syscall name="nfsservctl" number="168"/>
+ <syscall name="setresgid" number="169"/>
+ <syscall name="getresgid" number="170"/>
+ <syscall name="prctl" number="171"/>
+ <syscall name="rt_sigreturn" number="172"/>
+ <syscall name="rt_sigaction" number="173"/>
+ <syscall name="rt_sigprocmask" number="174"/>
+ <syscall name="rt_sigpending" number="175"/>
+ <syscall name="rt_sigtimedwait" number="176"/>
+ <syscall name="rt_sigqueueinfo" number="177"/>
+ <syscall name="rt_sigsuspend" number="178"/>
+ <syscall name="pread64" number="179"/>
+ <syscall name="pwrite64" number="180"/>
+ <syscall name="chown" number="181"/>
+ <syscall name="getcwd" number="182"/>
+ <syscall name="capget" number="183"/>
+ <syscall name="capset" number="184"/>
+ <syscall name="sigaltstack" number="185"/>
+ <syscall name="sendfile" number="186"/>
+ <syscall name="getpmsg" number="187"/>
+ <syscall name="putpmsg" number="188"/>
+ <syscall name="vfork" number="189"/>
+ <syscall name="ugetrlimit" number="190"/>
+ <syscall name="readahead" number="191"/>
+ <syscall name="mmap2" number="192"/>
+ <syscall name="truncate64" number="193"/>
+ <syscall name="ftruncate64" number="194"/>
+ <syscall name="stat64" number="195"/>
+ <syscall name="lstat64" number="196"/>
+ <syscall name="fstat64" number="197"/>
+ <syscall name="pciconfig_read" number="198"/>
+ <syscall name="pciconfig_write" number="199"/>
+ <syscall name="pciconfig_iobase" number="200"/>
+ <syscall name="multiplexer" number="201"/>
+ <syscall name="getdents64" number="202"/>
+ <syscall name="pivot_root" number="203"/>
+ <syscall name="fcntl64" number="204"/>
+ <syscall name="madvise" number="205"/>
+ <syscall name="mincore" number="206"/>
+ <syscall name="gettid" number="207"/>
+ <syscall name="tkill" number="208"/>
+ <syscall name="setxattr" number="209"/>
+ <syscall name="lsetxattr" number="210"/>
+ <syscall name="fsetxattr" number="211"/>
+ <syscall name="getxattr" number="212"/>
+ <syscall name="lgetxattr" number="213"/>
+ <syscall name="fgetxattr" number="214"/>
+ <syscall name="listxattr" number="215"/>
+ <syscall name="llistxattr" number="216"/>
+ <syscall name="flistxattr" number="217"/>
+ <syscall name="removexattr" number="218"/>
+ <syscall name="lremovexattr" number="219"/>
+ <syscall name="fremovexattr" number="220"/>
+ <syscall name="futex" number="221"/>
+ <syscall name="sched_setaffinity" number="222"/>
+ <syscall name="sched_getaffinity" number="223"/>
+ <syscall name="tuxcall" number="225"/>
+ <syscall name="sendfile64" number="226"/>
+ <syscall name="io_setup" number="227"/>
+ <syscall name="io_destroy" number="228"/>
+ <syscall name="io_getevents" number="229"/>
+ <syscall name="io_submit" number="230"/>
+ <syscall name="io_cancel" number="231"/>
+ <syscall name="set_tid_address" number="232"/>
+ <syscall name="fadvise64" number="233"/>
+ <syscall name="exit_group" number="234"/>
+ <syscall name="lookup_dcookie" number="235"/>
+ <syscall name="epoll_create" number="236"/>
+ <syscall name="epoll_ctl" number="237"/>
+ <syscall name="epoll_wait" number="238"/>
+ <syscall name="remap_file_pages" number="239"/>
+ <syscall name="timer_create" number="240"/>
+ <syscall name="timer_settime" number="241"/>
+ <syscall name="timer_gettime" number="242"/>
+ <syscall name="timer_getoverrun" number="243"/>
+ <syscall name="timer_delete" number="244"/>
+ <syscall name="clock_settime" number="245"/>
+ <syscall name="clock_gettime" number="246"/>
+ <syscall name="clock_getres" number="247"/>
+ <syscall name="clock_nanosleep" number="248"/>
+ <syscall name="swapcontext" number="249"/>
+ <syscall name="tgkill" number="250"/>
+ <syscall name="utimes" number="251"/>
+ <syscall name="statfs64" number="252"/>
+ <syscall name="fstatfs64" number="253"/>
+ <syscall name="fadvise64_64" number="254"/>
+ <syscall name="rtas" number="255"/>
+ <syscall name="sys_debug_setcontext" number="256"/>
+ <syscall name="mbind" number="259"/>
+ <syscall name="get_mempolicy" number="260"/>
+ <syscall name="set_mempolicy" number="261"/>
+ <syscall name="mq_open" number="262"/>
+ <syscall name="mq_unlink" number="263"/>
+ <syscall name="mq_timedsend" number="264"/>
+ <syscall name="mq_timedreceive" number="265"/>
+ <syscall name="mq_notify" number="266"/>
+ <syscall name="mq_getsetattr" number="267"/>
+ <syscall name="kexec_load" number="268"/>
+ <syscall name="add_key" number="269"/>
+ <syscall name="request_key" number="270"/>
+ <syscall name="keyctl" number="271"/>
+ <syscall name="waitid" number="272"/>
+ <syscall name="ioprio_set" number="273"/>
+ <syscall name="ioprio_get" number="274"/>
+ <syscall name="inotify_init" number="275"/>
+ <syscall name="inotify_add_watch" number="276"/>
+ <syscall name="inotify_rm_watch" number="277"/>
+ <syscall name="spu_run" number="278"/>
+ <syscall name="spu_create" number="279"/>
+ <syscall name="pselect6" number="280"/>
+ <syscall name="ppoll" number="281"/>
+ <syscall name="unshare" number="282"/>
+ <syscall name="openat" number="286"/>
+ <syscall name="mkdirat" number="287"/>
+ <syscall name="mknodat" number="288"/>
+ <syscall name="fchownat" number="289"/>
+ <syscall name="futimesat" number="290"/>
+ <syscall name="fstatat64" number="291"/>
+ <syscall name="unlinkat" number="292"/>
+ <syscall name="renameat" number="293"/>
+ <syscall name="linkat" number="294"/>
+ <syscall name="symlinkat" number="295"/>
+ <syscall name="readlinkat" number="296"/>
+ <syscall name="fchmodat" number="297"/>
+ <syscall name="faccessat" number="298"/>
+</syscalls_info>
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml
new file mode 100644
index 0000000..d81d065
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml
@@ -0,0 +1,295 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/powerpc/include/asm/unistd.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="query_module" number="166"/>
+ <syscall name="poll" number="167"/>
+ <syscall name="nfsservctl" number="168"/>
+ <syscall name="setresgid" number="169"/>
+ <syscall name="getresgid" number="170"/>
+ <syscall name="prctl" number="171"/>
+ <syscall name="rt_sigreturn" number="172"/>
+ <syscall name="rt_sigaction" number="173"/>
+ <syscall name="rt_sigprocmask" number="174"/>
+ <syscall name="rt_sigpending" number="175"/>
+ <syscall name="rt_sigtimedwait" number="176"/>
+ <syscall name="rt_sigqueueinfo" number="177"/>
+ <syscall name="rt_sigsuspend" number="178"/>
+ <syscall name="pread64" number="179"/>
+ <syscall name="pwrite64" number="180"/>
+ <syscall name="chown" number="181"/>
+ <syscall name="getcwd" number="182"/>
+ <syscall name="capget" number="183"/>
+ <syscall name="capset" number="184"/>
+ <syscall name="sigaltstack" number="185"/>
+ <syscall name="sendfile" number="186"/>
+ <syscall name="getpmsg" number="187"/>
+ <syscall name="putpmsg" number="188"/>
+ <syscall name="vfork" number="189"/>
+ <syscall name="ugetrlimit" number="190"/>
+ <syscall name="readahead" number="191"/>
+ <syscall name="pciconfig_read" number="198"/>
+ <syscall name="pciconfig_write" number="199"/>
+ <syscall name="pciconfig_iobase" number="200"/>
+ <syscall name="multiplexer" number="201"/>
+ <syscall name="getdents64" number="202"/>
+ <syscall name="pivot_root" number="203"/>
+ <syscall name="madvise" number="205"/>
+ <syscall name="mincore" number="206"/>
+ <syscall name="gettid" number="207"/>
+ <syscall name="tkill" number="208"/>
+ <syscall name="setxattr" number="209"/>
+ <syscall name="lsetxattr" number="210"/>
+ <syscall name="fsetxattr" number="211"/>
+ <syscall name="getxattr" number="212"/>
+ <syscall name="lgetxattr" number="213"/>
+ <syscall name="fgetxattr" number="214"/>
+ <syscall name="listxattr" number="215"/>
+ <syscall name="llistxattr" number="216"/>
+ <syscall name="flistxattr" number="217"/>
+ <syscall name="removexattr" number="218"/>
+ <syscall name="lremovexattr" number="219"/>
+ <syscall name="fremovexattr" number="220"/>
+ <syscall name="futex" number="221"/>
+ <syscall name="sched_setaffinity" number="222"/>
+ <syscall name="sched_getaffinity" number="223"/>
+ <syscall name="tuxcall" number="225"/>
+ <syscall name="io_setup" number="227"/>
+ <syscall name="io_destroy" number="228"/>
+ <syscall name="io_getevents" number="229"/>
+ <syscall name="io_submit" number="230"/>
+ <syscall name="io_cancel" number="231"/>
+ <syscall name="set_tid_address" number="232"/>
+ <syscall name="fadvise64" number="233"/>
+ <syscall name="exit_group" number="234"/>
+ <syscall name="lookup_dcookie" number="235"/>
+ <syscall name="epoll_create" number="236"/>
+ <syscall name="epoll_ctl" number="237"/>
+ <syscall name="epoll_wait" number="238"/>
+ <syscall name="remap_file_pages" number="239"/>
+ <syscall name="timer_create" number="240"/>
+ <syscall name="timer_settime" number="241"/>
+ <syscall name="timer_gettime" number="242"/>
+ <syscall name="timer_getoverrun" number="243"/>
+ <syscall name="timer_delete" number="244"/>
+ <syscall name="clock_settime" number="245"/>
+ <syscall name="clock_gettime" number="246"/>
+ <syscall name="clock_getres" number="247"/>
+ <syscall name="clock_nanosleep" number="248"/>
+ <syscall name="swapcontext" number="249"/>
+ <syscall name="tgkill" number="250"/>
+ <syscall name="utimes" number="251"/>
+ <syscall name="statfs64" number="252"/>
+ <syscall name="fstatfs64" number="253"/>
+ <syscall name="rtas" number="255"/>
+ <syscall name="sys_debug_setcontext" number="256"/>
+ <syscall name="mbind" number="259"/>
+ <syscall name="get_mempolicy" number="260"/>
+ <syscall name="set_mempolicy" number="261"/>
+ <syscall name="mq_open" number="262"/>
+ <syscall name="mq_unlink" number="263"/>
+ <syscall name="mq_timedsend" number="264"/>
+ <syscall name="mq_timedreceive" number="265"/>
+ <syscall name="mq_notify" number="266"/>
+ <syscall name="mq_getsetattr" number="267"/>
+ <syscall name="kexec_load" number="268"/>
+ <syscall name="add_key" number="269"/>
+ <syscall name="request_key" number="270"/>
+ <syscall name="keyctl" number="271"/>
+ <syscall name="waitid" number="272"/>
+ <syscall name="ioprio_set" number="273"/>
+ <syscall name="ioprio_get" number="274"/>
+ <syscall name="inotify_init" number="275"/>
+ <syscall name="inotify_add_watch" number="276"/>
+ <syscall name="inotify_rm_watch" number="277"/>
+ <syscall name="spu_run" number="278"/>
+ <syscall name="spu_create" number="279"/>
+ <syscall name="pselect6" number="280"/>
+ <syscall name="ppoll" number="281"/>
+ <syscall name="unshare" number="282"/>
+ <syscall name="unlinkat" number="286"/>
+ <syscall name="renameat" number="287"/>
+ <syscall name="linkat" number="288"/>
+ <syscall name="symlinkat" number="289"/>
+ <syscall name="readlinkat" number="290"/>
+ <syscall name="fchmodat" number="291"/>
+ <syscall name="faccessat" number="292"/>
+</syscalls_info>
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info
new file mode 100644
index 0000000..aac1f9b
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info
@@ -0,0 +1,1138 @@
+This is annotate.info, produced by makeinfo version 4.8 from
+/tmp/android-build-b1a4f38d56038d5f3847fea7c8c86b90/src/build/../gdb/gdb-7.1.x/gdb/doc/annotate.texinfo.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Annotate: (annotate). The obsolete annotation interface.
+END-INFO-DIR-ENTRY
+
+ Copyright (C) 1994, 1995, 2000, 2001, 2003, 2004, 2005, 2007, 2008,
+2009, 2010 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.1 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ This file documents GDB's obsolete annotations.
+
+ Copyright (C) 1994, 1995, 2000, 2001, 2003, 2004, 2005, 2007, 2008,
+2009, 2010 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.1 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: annotate.info, Node: Top, Next: Annotations Overview, Up: (dir)
+
+GDB Annotations
+***************
+
+This document describes the obsolete level two annotation interface
+implemented in older GDB versions.
+
+* Menu:
+
+* Annotations Overview:: What annotations are; the general syntax.
+* Limitations:: Limitations of the annotation interface.
+* Migrating to GDB/MI:: Migrating to GDB/MI
+* Server Prefix:: Issuing a command without affecting user state.
+* Value Annotations:: Values are marked as such.
+* Frame Annotations:: Stack frames are annotated.
+* Displays:: GDB can be told to display something periodically.
+* Prompting:: Annotations marking GDB's need for input.
+* Errors:: Annotations for error messages.
+* Breakpoint Info:: Information on breakpoints.
+* Invalidation:: Some annotations describe things now invalid.
+* Annotations for Running::
+ Whether the program is running, how it stopped, etc.
+* Source Annotations:: Annotations describing source code.
+* Multi-threaded Apps:: An annotation that reports multi-threadedness.
+
+* GNU Free Documentation License::
+
+
+File: annotate.info, Node: Annotations Overview, Next: Limitations, Prev: Top, Up: Top
+
+1 What is an Annotation?
+************************
+
+To produce obsolete level two annotations, start GDB with the
+`--annotate=2' option.
+
+ Annotations start with a newline character, two `control-z'
+characters, and the name of the annotation. If there is no additional
+information associated with this annotation, the name of the annotation
+is followed immediately by a newline. If there is additional
+information, the name of the annotation is followed by a space, the
+additional information, and a newline. The additional information
+cannot contain newline characters.
+
+ Any output not beginning with a newline and two `control-z'
+characters denotes literal output from GDB. Currently there is no need
+for GDB to output a newline followed by two `control-z' characters, but
+if there was such a need, the annotations could be extended with an
+`escape' annotation which means those three characters as output.
+
+ A simple example of starting up GDB with annotations is:
+
+ $ gdb --annotate=2
+ GNU GDB 5.0
+ Copyright 2000 Free Software Foundation, Inc.
+ GDB is free software, covered by the GNU General Public License,
+ and you are welcome to change it and/or distribute copies of it
+ under certain conditions.
+ Type "show copying" to see the conditions.
+ There is absolutely no warranty for GDB. Type "show warranty"
+ for details.
+ This GDB was configured as "sparc-sun-sunos4.1.3"
+
+ ^Z^Zpre-prompt
+ (gdb)
+ ^Z^Zprompt
+ quit
+
+ ^Z^Zpost-prompt
+ $
+
+ Here `quit' is input to GDB; the rest is output from GDB. The three
+lines beginning `^Z^Z' (where `^Z' denotes a `control-z' character) are
+annotations; the rest is output from GDB.
+
+
+File: annotate.info, Node: Limitations, Next: Migrating to GDB/MI, Prev: Annotations Overview, Up: Top
+
+2 Limitations of the Annotation Interface
+*****************************************
+
+The level two annotations mechanism is known to have a number of
+technical and architectural limitations. As a consequence, in 2001,
+with the release of GDB 5.1 and the addition of GDB/MI, the annotation
+interface was marked as deprecated.
+
+ This chapter discusses the known problems.
+
+2.1 Dependant on CLI output
+===========================
+
+The annotation interface works by interspersing markups with GDB normal
+command-line interpreter output. Unfortunately, this makes the
+annotation client dependant on not just the annotations, but also the
+CLI output. This is because the client is forced to assume that
+specific GDB commands provide specific information. Any change to
+GDB's CLI output modifies or removes that information and,
+consequently, likely breaks the client.
+
+ Since the GDB/MI output is independent of the CLI, it does not have
+this problem.
+
+2.2 Scalability
+===============
+
+The annotation interface relies on value annotations (*note Value
+Annotations::) and the display mechanism as a way of obtaining
+up-to-date value information. These mechanisms are not scalable.
+
+ In a graphical environment, where many values can be displayed
+simultaneously, a serious performance problem occurs when the client
+tries to first extract from GDB, and then re-display, all those values.
+The client should instead only request and update the values that
+changed.
+
+ The GDB/MI Variable Objects provide just that mechanism.
+
+2.3 Correctness
+===============
+
+The annotation interface assumes that a variable's value can only be
+changed when the target is running. This assumption is not correct. A
+single assignment to a single variable can result in the entire target,
+and all displayed values, needing an update.
+
+ The GDB/MI Variable Objects include a mechanism for efficiently
+reporting such changes.
+
+2.4 Reliability
+===============
+
+The GDB/MI interface includes a dedicated test directory
+(`gdb/gdb.mi'), and any addition or fix to GDB/MI must include
+testsuite changes.
+
+2.5 Maintainability
+===================
+
+The annotation mechanism was implemented by interspersing CLI print
+statements with various annotations. As a consequence, any CLI output
+change can alter the annotation output.
+
+ Since the GDB/MI output is independent of the CLI, and the GDB/MI is
+increasingly implemented independent of the CLI code, its long term
+maintenance is much easier.
+
+
+File: annotate.info, Node: Migrating to GDB/MI, Next: Server Prefix, Prev: Limitations, Up: Top
+
+3 Migrating to GDB/MI
+*********************
+
+By using the `interp mi' command, it is possible for annotation clients
+to invoke GDB/MI commands, and hence access the GDB/MI. By doing this,
+existing annotation clients have a migration path from this obsolete
+interface to GDB/MI.
+
+
+File: annotate.info, Node: Server Prefix, Next: Value Annotations, Prev: Migrating to GDB/MI, Up: Top
+
+4 The Server Prefix
+*******************
+
+To issue a command to GDB without affecting certain aspects of the
+state which is seen by users, prefix it with `server '. This means
+that this command will not affect the command history, nor will it
+affect GDB's notion of which command to repeat if <RET> is pressed on a
+line by itself.
+
+ The server prefix does not affect the recording of values into the
+value history; to print a value without recording it into the value
+history, use the `output' command instead of the `print' command.
+
+
+File: annotate.info, Node: Value Annotations, Next: Frame Annotations, Prev: Server Prefix, Up: Top
+
+5 Values
+********
+
+_Value Annotations have been removed. GDB/MI instead provides Variable
+Objects._
+
+ When a value is printed in various contexts, GDB uses annotations to
+delimit the value from the surrounding text.
+
+ If a value is printed using `print' and added to the value history,
+the annotation looks like
+
+ ^Z^Zvalue-history-begin HISTORY-NUMBER VALUE-FLAGS
+ HISTORY-STRING
+ ^Z^Zvalue-history-value
+ THE-VALUE
+ ^Z^Zvalue-history-end
+
+where HISTORY-NUMBER is the number it is getting in the value history,
+HISTORY-STRING is a string, such as `$5 = ', which introduces the value
+to the user, THE-VALUE is the output corresponding to the value itself,
+and VALUE-FLAGS is `*' for a value which can be dereferenced and `-'
+for a value which cannot.
+
+ If the value is not added to the value history (it is an invalid
+float or it is printed with the `output' command), the annotation is
+similar:
+
+ ^Z^Zvalue-begin VALUE-FLAGS
+ THE-VALUE
+ ^Z^Zvalue-end
+
+ When GDB prints an argument to a function (for example, in the output
+from the `backtrace' command), it annotates it as follows:
+
+ ^Z^Zarg-begin
+ ARGUMENT-NAME
+ ^Z^Zarg-name-end
+ SEPARATOR-STRING
+ ^Z^Zarg-value VALUE-FLAGS
+ THE-VALUE
+ ^Z^Zarg-end
+
+where ARGUMENT-NAME is the name of the argument, SEPARATOR-STRING is
+text which separates the name from the value for the user's benefit
+(such as `='), and VALUE-FLAGS and THE-VALUE have the same meanings as
+in a `value-history-begin' annotation.
+
+ When printing a structure, GDB annotates it as follows:
+
+ ^Z^Zfield-begin VALUE-FLAGS
+ FIELD-NAME
+ ^Z^Zfield-name-end
+ SEPARATOR-STRING
+ ^Z^Zfield-value
+ THE-VALUE
+ ^Z^Zfield-end
+
+where FIELD-NAME is the name of the field, SEPARATOR-STRING is text
+which separates the name from the value for the user's benefit (such as
+`='), and VALUE-FLAGS and THE-VALUE have the same meanings as in a
+`value-history-begin' annotation.
+
+ When printing an array, GDB annotates it as follows:
+
+ ^Z^Zarray-section-begin ARRAY-INDEX VALUE-FLAGS
+
+where ARRAY-INDEX is the index of the first element being annotated and
+VALUE-FLAGS has the same meaning as in a `value-history-begin'
+annotation. This is followed by any number of elements, where is
+element can be either a single element:
+
+ `,' WHITESPACE ; omitted for the first element
+ THE-VALUE
+ ^Z^Zelt
+
+ or a repeated element
+
+ `,' WHITESPACE ; omitted for the first element
+ THE-VALUE
+ ^Z^Zelt-rep NUMBER-OF-REPETITIONS
+ REPETITION-STRING
+ ^Z^Zelt-rep-end
+
+ In both cases, THE-VALUE is the output for the value of the element
+and WHITESPACE can contain spaces, tabs, and newlines. In the repeated
+case, NUMBER-OF-REPETITIONS is the number of consecutive array elements
+which contain that value, and REPETITION-STRING is a string which is
+designed to convey to the user that repetition is being depicted.
+
+ Once all the array elements have been output, the array annotation is
+ended with
+
+ ^Z^Zarray-section-end
+
+
+File: annotate.info, Node: Frame Annotations, Next: Displays, Prev: Value Annotations, Up: Top
+
+6 Frames
+********
+
+_Value Annotations have been removed. GDB/MI instead provides a number
+of frame commands._
+
+ _Frame annotations are no longer available. The GDB/MI provides
+`-stack-list-arguments', `-stack-list-locals', and `-stack-list-frames'
+commands._
+
+ Whenever GDB prints a frame, it annotates it. For example, this
+applies to frames printed when GDB stops, output from commands such as
+`backtrace' or `up', etc.
+
+ The frame annotation begins with
+
+ ^Z^Zframe-begin LEVEL ADDRESS
+ LEVEL-STRING
+
+where LEVEL is the number of the frame (0 is the innermost frame, and
+other frames have positive numbers), ADDRESS is the address of the code
+executing in that frame, and LEVEL-STRING is a string designed to
+convey the level to the user. ADDRESS is in the form `0x' followed by
+one or more lowercase hex digits (note that this does not depend on the
+language). The frame ends with
+
+ ^Z^Zframe-end
+
+ Between these annotations is the main body of the frame, which can
+consist of
+
+ * ^Z^Zfunction-call
+ FUNCTION-CALL-STRING
+
+ where FUNCTION-CALL-STRING is text designed to convey to the user
+ that this frame is associated with a function call made by GDB to a
+ function in the program being debugged.
+
+ * ^Z^Zsignal-handler-caller
+ SIGNAL-HANDLER-CALLER-STRING
+
+ where SIGNAL-HANDLER-CALLER-STRING is text designed to convey to
+ the user that this frame is associated with whatever mechanism is
+ used by this operating system to call a signal handler (it is the
+ frame which calls the signal handler, not the frame for the signal
+ handler itself).
+
+ * A normal frame.
+
+ This can optionally (depending on whether this is thought of as
+ interesting information for the user to see) begin with
+
+ ^Z^Zframe-address
+ ADDRESS
+ ^Z^Zframe-address-end
+ SEPARATOR-STRING
+
+ where ADDRESS is the address executing in the frame (the same
+ address as in the `frame-begin' annotation, but printed in a form
+ which is intended for user consumption--in particular, the syntax
+ varies depending on the language), and SEPARATOR-STRING is a string
+ intended to separate this address from what follows for the user's
+ benefit.
+
+ Then comes
+
+ ^Z^Zframe-function-name
+ FUNCTION-NAME
+ ^Z^Zframe-args
+ ARGUMENTS
+
+ where FUNCTION-NAME is the name of the function executing in the
+ frame, or `??' if not known, and ARGUMENTS are the arguments to
+ the frame, with parentheses around them (each argument is annotated
+ individually as well, *note Value Annotations::).
+
+ If source information is available, a reference to it is then
+ printed:
+
+ ^Z^Zframe-source-begin
+ SOURCE-INTRO-STRING
+ ^Z^Zframe-source-file
+ FILENAME
+ ^Z^Zframe-source-file-end
+ :
+ ^Z^Zframe-source-line
+ LINE-NUMBER
+ ^Z^Zframe-source-end
+
+ where SOURCE-INTRO-STRING separates for the user's benefit the
+ reference from the text which precedes it, FILENAME is the name of
+ the source file, and LINE-NUMBER is the line number within that
+ file (the first line is line 1).
+
+ If GDB prints some information about where the frame is from (which
+ library, which load segment, etc.; currently only done on the
+ RS/6000), it is annotated with
+
+ ^Z^Zframe-where
+ INFORMATION
+
+ Then, if source is to actually be displayed for this frame (for
+ example, this is not true for output from the `backtrace'
+ command), then a `source' annotation (*note Source Annotations::)
+ is displayed. Unlike most annotations, this is output instead of
+ the normal text which would be output, not in addition.
+
+
+File: annotate.info, Node: Displays, Next: Prompting, Prev: Frame Annotations, Up: Top
+
+7 Displays
+**********
+
+_Display Annotations have been removed. GDB/MI instead provides
+Variable Objects._
+
+ When GDB is told to display something using the `display' command,
+the results of the display are annotated:
+
+ ^Z^Zdisplay-begin
+ NUMBER
+ ^Z^Zdisplay-number-end
+ NUMBER-SEPARATOR
+ ^Z^Zdisplay-format
+ FORMAT
+ ^Z^Zdisplay-expression
+ EXPRESSION
+ ^Z^Zdisplay-expression-end
+ EXPRESSION-SEPARATOR
+ ^Z^Zdisplay-value
+ VALUE
+ ^Z^Zdisplay-end
+
+where NUMBER is the number of the display, NUMBER-SEPARATOR is intended
+to separate the number from what follows for the user, FORMAT includes
+information such as the size, format, or other information about how
+the value is being displayed, EXPRESSION is the expression being
+displayed, EXPRESSION-SEPARATOR is intended to separate the expression
+from the text that follows for the user, and VALUE is the actual value
+being displayed.
+
+
+File: annotate.info, Node: Prompting, Next: Errors, Prev: Displays, Up: Top
+
+8 Annotation for GDB Input
+**************************
+
+When GDB prompts for input, it annotates this fact so it is possible to
+know when to send output, when the output from a given command is over,
+etc.
+
+ Different kinds of input each have a different "input type". Each
+input type has three annotations: a `pre-' annotation, which denotes
+the beginning of any prompt which is being output, a plain annotation,
+which denotes the end of the prompt, and then a `post-' annotation
+which denotes the end of any echo which may (or may not) be associated
+with the input. For example, the `prompt' input type features the
+following annotations:
+
+ ^Z^Zpre-prompt
+ ^Z^Zprompt
+ ^Z^Zpost-prompt
+
+ The input types are
+
+`prompt'
+ When GDB is prompting for a command (the main GDB prompt).
+
+`commands'
+ When GDB prompts for a set of commands, like in the `commands'
+ command. The annotations are repeated for each command which is
+ input.
+
+`overload-choice'
+ When GDB wants the user to select between various overloaded
+ functions.
+
+`query'
+ When GDB wants the user to confirm a potentially dangerous
+ operation.
+
+`prompt-for-continue'
+ When GDB is asking the user to press return to continue. Note:
+ Don't expect this to work well; instead use `set height 0' to
+ disable prompting. This is because the counting of lines is buggy
+ in the presence of annotations.
+
+
+File: annotate.info, Node: Errors, Next: Breakpoint Info, Prev: Prompting, Up: Top
+
+9 Errors
+********
+
+ ^Z^Zquit
+
+ This annotation occurs right before GDB responds to an interrupt.
+
+ ^Z^Zerror
+
+ This annotation occurs right before GDB responds to an error.
+
+ Quit and error annotations indicate that any annotations which GDB
+was in the middle of may end abruptly. For example, if a
+`value-history-begin' annotation is followed by a `error', one cannot
+expect to receive the matching `value-history-end'. One cannot expect
+not to receive it either, however; an error annotation does not
+necessarily mean that GDB is immediately returning all the way to the
+top level.
+
+ A quit or error annotation may be preceded by
+
+ ^Z^Zerror-begin
+
+ Any output between that and the quit or error annotation is the error
+message.
+
+ Warning messages are not yet annotated.
+
+
+File: annotate.info, Node: Breakpoint Info, Next: Invalidation, Prev: Errors, Up: Top
+
+10 Information on Breakpoints
+*****************************
+
+_Breakpoint Annotations have been removed. GDB/MI instead provides
+breakpoint commands._
+
+ The output from the `info breakpoints' command is annotated as
+follows:
+
+ ^Z^Zbreakpoints-headers
+ HEADER-ENTRY
+ ^Z^Zbreakpoints-table
+
+where HEADER-ENTRY has the same syntax as an entry (see below) but
+instead of containing data, it contains strings which are intended to
+convey the meaning of each field to the user. This is followed by any
+number of entries. If a field does not apply for this entry, it is
+omitted. Fields may contain trailing whitespace. Each entry consists
+of:
+
+ ^Z^Zrecord
+ ^Z^Zfield 0
+ NUMBER
+ ^Z^Zfield 1
+ TYPE
+ ^Z^Zfield 2
+ DISPOSITION
+ ^Z^Zfield 3
+ ENABLE
+ ^Z^Zfield 4
+ ADDRESS
+ ^Z^Zfield 5
+ WHAT
+ ^Z^Zfield 6
+ FRAME
+ ^Z^Zfield 7
+ CONDITION
+ ^Z^Zfield 8
+ IGNORE-COUNT
+ ^Z^Zfield 9
+ COMMANDS
+
+ Note that ADDRESS is intended for user consumption--the syntax
+varies depending on the language.
+
+ The output ends with
+
+ ^Z^Zbreakpoints-table-end
+
+
+File: annotate.info, Node: Invalidation, Next: Annotations for Running, Prev: Breakpoint Info, Up: Top
+
+11 Invalidation Notices
+***********************
+
+The following annotations say that certain pieces of state may have
+changed.
+
+`^Z^Zframes-invalid'
+ The frames (for example, output from the `backtrace' command) may
+ have changed.
+
+`^Z^Zbreakpoints-invalid'
+ The breakpoints may have changed. For example, the user just
+ added or deleted a breakpoint.
+
+
+File: annotate.info, Node: Annotations for Running, Next: Source Annotations, Prev: Invalidation, Up: Top
+
+12 Running the Program
+**********************
+
+When the program starts executing due to a GDB command such as `step'
+or `continue',
+
+ ^Z^Zstarting
+
+ is output. When the program stops,
+
+ ^Z^Zstopped
+
+ is output. Before the `stopped' annotation, a variety of
+annotations describe how the program stopped.
+
+`^Z^Zexited EXIT-STATUS'
+ The program exited, and EXIT-STATUS is the exit status (zero for
+ successful exit, otherwise nonzero).
+
+`^Z^Zsignalled'
+ The program exited with a signal. After the `^Z^Zsignalled', the
+ annotation continues:
+
+ INTRO-TEXT
+ ^Z^Zsignal-name
+ NAME
+ ^Z^Zsignal-name-end
+ MIDDLE-TEXT
+ ^Z^Zsignal-string
+ STRING
+ ^Z^Zsignal-string-end
+ END-TEXT
+
+ where NAME is the name of the signal, such as `SIGILL' or
+ `SIGSEGV', and STRING is the explanation of the signal, such as
+ `Illegal Instruction' or `Segmentation fault'. INTRO-TEXT,
+ MIDDLE-TEXT, and END-TEXT are for the user's benefit and have no
+ particular format.
+
+`^Z^Zsignal'
+ The syntax of this annotation is just like `signalled', but GDB is
+ just saying that the program received the signal, not that it was
+ terminated with it.
+
+`^Z^Zbreakpoint NUMBER'
+ The program hit breakpoint number NUMBER.
+
+`^Z^Zwatchpoint NUMBER'
+ The program hit watchpoint number NUMBER.
+
+
+File: annotate.info, Node: Source Annotations, Next: Multi-threaded Apps, Prev: Annotations for Running, Up: Top
+
+13 Displaying Source
+********************
+
+The following annotation is used instead of displaying source code:
+
+ ^Z^Zsource FILENAME:LINE:CHARACTER:MIDDLE:ADDR
+
+ where FILENAME is an absolute file name indicating which source
+file, LINE is the line number within that file (where 1 is the first
+line in the file), CHARACTER is the character position within the file
+(where 0 is the first character in the file) (for most debug formats
+this will necessarily point to the beginning of a line), MIDDLE is
+`middle' if ADDR is in the middle of the line, or `beg' if ADDR is at
+the beginning of the line, and ADDR is the address in the target
+program associated with the source which is being displayed. ADDR is
+in the form `0x' followed by one or more lowercase hex digits (note
+that this does not depend on the language).
+
+
+File: annotate.info, Node: Multi-threaded Apps, Next: GNU Free Documentation License, Prev: Source Annotations, Up: Top
+
+14 Multi-threaded Applications
+******************************
+
+The following annotations report thread related changes of state.
+
+`^Z^Znew-thread'
+ This annotation is issued once for each thread that is created
+ apart from the main thread, which is not reported.
+
+`^Z^Zthread-changed'
+ The selected thread has changed. This may occur at the request of
+ the user with the `thread' command, or as a result of execution,
+ e.g., another thread hits a breakpoint.
+
+
+
+File: annotate.info, Node: GNU Free Documentation License, Prev: Multi-threaded Apps, Up: Top
+
+15 GNU Free Documentation License
+*********************************
+
+ Version 1.2, November 2002
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ 0. PREAMBLE
+
+ The purpose of this License is to make a manual, textbook, or other
+ functional and useful document "free" in the sense of freedom: to
+ assure everyone the effective freedom to copy and redistribute it,
+ with or without modifying it, either commercially or
+ noncommercially. Secondarily, this License preserves for the
+ author and publisher a way to get credit for their work, while not
+ being considered responsible for modifications made by others.
+
+ This License is a kind of "copyleft", which means that derivative
+ works of the document must themselves be free in the same sense.
+ It complements the GNU General Public License, which is a copyleft
+ license designed for free software.
+
+ We have designed this License in order to use it for manuals for
+ free software, because free software needs free documentation: a
+ free program should come with manuals providing the same freedoms
+ that the software does. But this License is not limited to
+ software manuals; it can be used for any textual work, regardless
+ of subject matter or whether it is published as a printed book.
+ We recommend this License principally for works whose purpose is
+ instruction or reference.
+
+ 1. APPLICABILITY AND DEFINITIONS
+
+ This License applies to any manual or other work, in any medium,
+ that contains a notice placed by the copyright holder saying it
+ can be distributed under the terms of this License. Such a notice
+ grants a world-wide, royalty-free license, unlimited in duration,
+ to use that work under the conditions stated herein. The
+ "Document", below, refers to any such manual or work. Any member
+ of the public is a licensee, and is addressed as "you". You
+ accept the license if you copy, modify or distribute the work in a
+ way requiring permission under copyright law.
+
+ A "Modified Version" of the Document means any work containing the
+ Document or a portion of it, either copied verbatim, or with
+ modifications and/or translated into another language.
+
+ A "Secondary Section" is a named appendix or a front-matter section
+ of the Document that deals exclusively with the relationship of the
+ publishers or authors of the Document to the Document's overall
+ subject (or to related matters) and contains nothing that could
+ fall directly within that overall subject. (Thus, if the Document
+ is in part a textbook of mathematics, a Secondary Section may not
+ explain any mathematics.) The relationship could be a matter of
+ historical connection with the subject or with related matters, or
+ of legal, commercial, philosophical, ethical or political position
+ regarding them.
+
+ The "Invariant Sections" are certain Secondary Sections whose
+ titles are designated, as being those of Invariant Sections, in
+ the notice that says that the Document is released under this
+ License. If a section does not fit the above definition of
+ Secondary then it is not allowed to be designated as Invariant.
+ The Document may contain zero Invariant Sections. If the Document
+ does not identify any Invariant Sections then there are none.
+
+ The "Cover Texts" are certain short passages of text that are
+ listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+ that says that the Document is released under this License. A
+ Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+ be at most 25 words.
+
+ A "Transparent" copy of the Document means a machine-readable copy,
+ represented in a format whose specification is available to the
+ general public, that is suitable for revising the document
+ straightforwardly with generic text editors or (for images
+ composed of pixels) generic paint programs or (for drawings) some
+ widely available drawing editor, and that is suitable for input to
+ text formatters or for automatic translation to a variety of
+ formats suitable for input to text formatters. A copy made in an
+ otherwise Transparent file format whose markup, or absence of
+ markup, has been arranged to thwart or discourage subsequent
+ modification by readers is not Transparent. An image format is
+ not Transparent if used for any substantial amount of text. A
+ copy that is not "Transparent" is called "Opaque".
+
+ Examples of suitable formats for Transparent copies include plain
+ ASCII without markup, Texinfo input format, LaTeX input format,
+ SGML or XML using a publicly available DTD, and
+ standard-conforming simple HTML, PostScript or PDF designed for
+ human modification. Examples of transparent image formats include
+ PNG, XCF and JPG. Opaque formats include proprietary formats that
+ can be read and edited only by proprietary word processors, SGML or
+ XML for which the DTD and/or processing tools are not generally
+ available, and the machine-generated HTML, PostScript or PDF
+ produced by some word processors for output purposes only.
+
+ The "Title Page" means, for a printed book, the title page itself,
+ plus such following pages as are needed to hold, legibly, the
+ material this License requires to appear in the title page. For
+ works in formats which do not have any title page as such, "Title
+ Page" means the text near the most prominent appearance of the
+ work's title, preceding the beginning of the body of the text.
+
+ A section "Entitled XYZ" means a named subunit of the Document
+ whose title either is precisely XYZ or contains XYZ in parentheses
+ following text that translates XYZ in another language. (Here XYZ
+ stands for a specific section name mentioned below, such as
+ "Acknowledgements", "Dedications", "Endorsements", or "History".)
+ To "Preserve the Title" of such a section when you modify the
+ Document means that it remains a section "Entitled XYZ" according
+ to this definition.
+
+ The Document may include Warranty Disclaimers next to the notice
+ which states that this License applies to the Document. These
+ Warranty Disclaimers are considered to be included by reference in
+ this License, but only as regards disclaiming warranties: any other
+ implication that these Warranty Disclaimers may have is void and
+ has no effect on the meaning of this License.
+
+ 2. VERBATIM COPYING
+
+ You may copy and distribute the Document in any medium, either
+ commercially or noncommercially, provided that this License, the
+ copyright notices, and the license notice saying this License
+ applies to the Document are reproduced in all copies, and that you
+ add no other conditions whatsoever to those of this License. You
+ may not use technical measures to obstruct or control the reading
+ or further copying of the copies you make or distribute. However,
+ you may accept compensation in exchange for copies. If you
+ distribute a large enough number of copies you must also follow
+ the conditions in section 3.
+
+ You may also lend copies, under the same conditions stated above,
+ and you may publicly display copies.
+
+ 3. COPYING IN QUANTITY
+
+ If you publish printed copies (or copies in media that commonly
+ have printed covers) of the Document, numbering more than 100, and
+ the Document's license notice requires Cover Texts, you must
+ enclose the copies in covers that carry, clearly and legibly, all
+ these Cover Texts: Front-Cover Texts on the front cover, and
+ Back-Cover Texts on the back cover. Both covers must also clearly
+ and legibly identify you as the publisher of these copies. The
+ front cover must present the full title with all words of the
+ title equally prominent and visible. You may add other material
+ on the covers in addition. Copying with changes limited to the
+ covers, as long as they preserve the title of the Document and
+ satisfy these conditions, can be treated as verbatim copying in
+ other respects.
+
+ If the required texts for either cover are too voluminous to fit
+ legibly, you should put the first ones listed (as many as fit
+ reasonably) on the actual cover, and continue the rest onto
+ adjacent pages.
+
+ If you publish or distribute Opaque copies of the Document
+ numbering more than 100, you must either include a
+ machine-readable Transparent copy along with each Opaque copy, or
+ state in or with each Opaque copy a computer-network location from
+ which the general network-using public has access to download
+ using public-standard network protocols a complete Transparent
+ copy of the Document, free of added material. If you use the
+ latter option, you must take reasonably prudent steps, when you
+ begin distribution of Opaque copies in quantity, to ensure that
+ this Transparent copy will remain thus accessible at the stated
+ location until at least one year after the last time you
+ distribute an Opaque copy (directly or through your agents or
+ retailers) of that edition to the public.
+
+ It is requested, but not required, that you contact the authors of
+ the Document well before redistributing any large number of
+ copies, to give them a chance to provide you with an updated
+ version of the Document.
+
+ 4. MODIFICATIONS
+
+ You may copy and distribute a Modified Version of the Document
+ under the conditions of sections 2 and 3 above, provided that you
+ release the Modified Version under precisely this License, with
+ the Modified Version filling the role of the Document, thus
+ licensing distribution and modification of the Modified Version to
+ whoever possesses a copy of it. In addition, you must do these
+ things in the Modified Version:
+
+ A. Use in the Title Page (and on the covers, if any) a title
+ distinct from that of the Document, and from those of
+ previous versions (which should, if there were any, be listed
+ in the History section of the Document). You may use the
+ same title as a previous version if the original publisher of
+ that version gives permission.
+
+ B. List on the Title Page, as authors, one or more persons or
+ entities responsible for authorship of the modifications in
+ the Modified Version, together with at least five of the
+ principal authors of the Document (all of its principal
+ authors, if it has fewer than five), unless they release you
+ from this requirement.
+
+ C. State on the Title page the name of the publisher of the
+ Modified Version, as the publisher.
+
+ D. Preserve all the copyright notices of the Document.
+
+ E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+
+ F. Include, immediately after the copyright notices, a license
+ notice giving the public permission to use the Modified
+ Version under the terms of this License, in the form shown in
+ the Addendum below.
+
+ G. Preserve in that license notice the full lists of Invariant
+ Sections and required Cover Texts given in the Document's
+ license notice.
+
+ H. Include an unaltered copy of this License.
+
+ I. Preserve the section Entitled "History", Preserve its Title,
+ and add to it an item stating at least the title, year, new
+ authors, and publisher of the Modified Version as given on
+ the Title Page. If there is no section Entitled "History" in
+ the Document, create one stating the title, year, authors,
+ and publisher of the Document as given on its Title Page,
+ then add an item describing the Modified Version as stated in
+ the previous sentence.
+
+ J. Preserve the network location, if any, given in the Document
+ for public access to a Transparent copy of the Document, and
+ likewise the network locations given in the Document for
+ previous versions it was based on. These may be placed in
+ the "History" section. You may omit a network location for a
+ work that was published at least four years before the
+ Document itself, or if the original publisher of the version
+ it refers to gives permission.
+
+ K. For any section Entitled "Acknowledgements" or "Dedications",
+ Preserve the Title of the section, and preserve in the
+ section all the substance and tone of each of the contributor
+ acknowledgements and/or dedications given therein.
+
+ L. Preserve all the Invariant Sections of the Document,
+ unaltered in their text and in their titles. Section numbers
+ or the equivalent are not considered part of the section
+ titles.
+
+ M. Delete any section Entitled "Endorsements". Such a section
+ may not be included in the Modified Version.
+
+ N. Do not retitle any existing section to be Entitled
+ "Endorsements" or to conflict in title with any Invariant
+ Section.
+
+ O. Preserve any Warranty Disclaimers.
+
+ If the Modified Version includes new front-matter sections or
+ appendices that qualify as Secondary Sections and contain no
+ material copied from the Document, you may at your option
+ designate some or all of these sections as invariant. To do this,
+ add their titles to the list of Invariant Sections in the Modified
+ Version's license notice. These titles must be distinct from any
+ other section titles.
+
+ You may add a section Entitled "Endorsements", provided it contains
+ nothing but endorsements of your Modified Version by various
+ parties--for example, statements of peer review or that the text
+ has been approved by an organization as the authoritative
+ definition of a standard.
+
+ You may add a passage of up to five words as a Front-Cover Text,
+ and a passage of up to 25 words as a Back-Cover Text, to the end
+ of the list of Cover Texts in the Modified Version. Only one
+ passage of Front-Cover Text and one of Back-Cover Text may be
+ added by (or through arrangements made by) any one entity. If the
+ Document already includes a cover text for the same cover,
+ previously added by you or by arrangement made by the same entity
+ you are acting on behalf of, you may not add another; but you may
+ replace the old one, on explicit permission from the previous
+ publisher that added the old one.
+
+ The author(s) and publisher(s) of the Document do not by this
+ License give permission to use their names for publicity for or to
+ assert or imply endorsement of any Modified Version.
+
+ 5. COMBINING DOCUMENTS
+
+ You may combine the Document with other documents released under
+ this License, under the terms defined in section 4 above for
+ modified versions, provided that you include in the combination
+ all of the Invariant Sections of all of the original documents,
+ unmodified, and list them all as Invariant Sections of your
+ combined work in its license notice, and that you preserve all
+ their Warranty Disclaimers.
+
+ The combined work need only contain one copy of this License, and
+ multiple identical Invariant Sections may be replaced with a single
+ copy. If there are multiple Invariant Sections with the same name
+ but different contents, make the title of each such section unique
+ by adding at the end of it, in parentheses, the name of the
+ original author or publisher of that section if known, or else a
+ unique number. Make the same adjustment to the section titles in
+ the list of Invariant Sections in the license notice of the
+ combined work.
+
+ In the combination, you must combine any sections Entitled
+ "History" in the various original documents, forming one section
+ Entitled "History"; likewise combine any sections Entitled
+ "Acknowledgements", and any sections Entitled "Dedications". You
+ must delete all sections Entitled "Endorsements."
+
+ 6. COLLECTIONS OF DOCUMENTS
+
+ You may make a collection consisting of the Document and other
+ documents released under this License, and replace the individual
+ copies of this License in the various documents with a single copy
+ that is included in the collection, provided that you follow the
+ rules of this License for verbatim copying of each of the
+ documents in all other respects.
+
+ You may extract a single document from such a collection, and
+ distribute it individually under this License, provided you insert
+ a copy of this License into the extracted document, and follow
+ this License in all other respects regarding verbatim copying of
+ that document.
+
+ 7. AGGREGATION WITH INDEPENDENT WORKS
+
+ A compilation of the Document or its derivatives with other
+ separate and independent documents or works, in or on a volume of
+ a storage or distribution medium, is called an "aggregate" if the
+ copyright resulting from the compilation is not used to limit the
+ legal rights of the compilation's users beyond what the individual
+ works permit. When the Document is included in an aggregate, this
+ License does not apply to the other works in the aggregate which
+ are not themselves derivative works of the Document.
+
+ If the Cover Text requirement of section 3 is applicable to these
+ copies of the Document, then if the Document is less than one half
+ of the entire aggregate, the Document's Cover Texts may be placed
+ on covers that bracket the Document within the aggregate, or the
+ electronic equivalent of covers if the Document is in electronic
+ form. Otherwise they must appear on printed covers that bracket
+ the whole aggregate.
+
+ 8. TRANSLATION
+
+ Translation is considered a kind of modification, so you may
+ distribute translations of the Document under the terms of section
+ 4. Replacing Invariant Sections with translations requires special
+ permission from their copyright holders, but you may include
+ translations of some or all Invariant Sections in addition to the
+ original versions of these Invariant Sections. You may include a
+ translation of this License, and all the license notices in the
+ Document, and any Warranty Disclaimers, provided that you also
+ include the original English version of this License and the
+ original versions of those notices and disclaimers. In case of a
+ disagreement between the translation and the original version of
+ this License or a notice or disclaimer, the original version will
+ prevail.
+
+ If a section in the Document is Entitled "Acknowledgements",
+ "Dedications", or "History", the requirement (section 4) to
+ Preserve its Title (section 1) will typically require changing the
+ actual title.
+
+ 9. TERMINATION
+
+ You may not copy, modify, sublicense, or distribute the Document
+ except as expressly provided for under this License. Any other
+ attempt to copy, modify, sublicense or distribute the Document is
+ void, and will automatically terminate your rights under this
+ License. However, parties who have received copies, or rights,
+ from you under this License will not have their licenses
+ terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+ The Free Software Foundation may publish new, revised versions of
+ the GNU Free Documentation License from time to time. Such new
+ versions will be similar in spirit to the present version, but may
+ differ in detail to address new problems or concerns. See
+ `http://www.gnu.org/copyleft/'.
+
+ Each version of the License is given a distinguishing version
+ number. If the Document specifies that a particular numbered
+ version of this License "or any later version" applies to it, you
+ have the option of following the terms and conditions either of
+ that specified version or of any later version that has been
+ published (not as a draft) by the Free Software Foundation. If
+ the Document does not specify a version number of this License,
+ you may choose any version ever published (not as a draft) by the
+ Free Software Foundation.
+
+15.1 ADDENDUM: How to use this License for your documents
+=========================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+ Copyright (C) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+ Texts. A copy of the license is included in the section entitled ``GNU
+ Free Documentation License''.
+
+ If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+ with the Invariant Sections being LIST THEIR TITLES, with
+ the Front-Cover Texts being LIST, and with the Back-Cover Texts
+ being LIST.
+
+ If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+ If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+
+Tag Table:
+Node: Top1367
+Node: Annotations Overview2537
+Node: Limitations4336
+Node: Migrating to GDB/MI6921
+Node: Server Prefix7304
+Node: Value Annotations7950
+Node: Frame Annotations11120
+Node: Displays15019
+Node: Prompting16050
+Node: Errors17553
+Node: Breakpoint Info18443
+Node: Invalidation19668
+Node: Annotations for Running20147
+Node: Source Annotations21660
+Node: Multi-threaded Apps22606
+Node: GNU Free Documentation License23215
+
+End Tag Table
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@@ -0,0 +1,47 @@
+This is the file .../info/dir, which contains the
+topmost node of the Info hierarchy, called (dir)Top.
+The first time you invoke Info you start off looking at this node.
+
+File: dir, Node: Top This is the top of the INFO tree
+
+ This (the Directory node) gives a menu of major topics.
+ Typing "q" exits, "?" lists all Info commands, "d" returns here,
+ "h" gives a primer for first-timers,
+ "mEmacs<Return>" visits the Emacs manual, etc.
+
+ In Emacs, you can click mouse button 2 on a menu item or cross reference
+ to select it.
+
+* Menu:
+
+Miscellaneous
+* As: (as). The GNU assembler.
+* Bfd: (bfd). The Binary File Descriptor library.
+* Gas: (as). The GNU assembler.
+* Ld: (ld). The GNU linker.
+* gprof: (gprof). Profiling your program's execution
+
+Individual utilities
+* addr2line: (binutils)addr2line. Convert addresses to file and line.
+* ar: (binutils)ar. Create, modify, and extract from archives.
+* c++filt: (binutils)c++filt. Filter to demangle encoded C++ symbols.
+* cxxfilt: (binutils)c++filt. MS-DOS name for c++filt.
+* dlltool: (binutils)dlltool. Create files needed to build and use DLLs.
+* nlmconv: (binutils)nlmconv. Converts object code into an NLM.
+* nm: (binutils)nm. List symbols from object files.
+* objcopy: (binutils)objcopy. Copy and translate object files.
+* objdump: (binutils)objdump. Display information from object files.
+* ranlib: (binutils)ranlib. Generate index to archive contents.
+* readelf: (binutils)readelf. Display the contents of ELF format files.
+* size: (binutils)size. List section sizes and total size.
+* strings: (binutils)strings. List printable strings from files.
+* strip: (binutils)strip. Discard symbols.
+* windmc: (binutils)windmc. Generator for Windows message resources.
+* windres: (binutils)windres. Manipulate Windows resources.
+
+Software development
+* Annotate: (annotate). The obsolete annotation interface.
+* Binutils: (binutils). The GNU binary utilities.
+* Gdb: (gdb). The GNU debugger.
+* Gdb-Internals: (gdbint). The GNU debugger's internals.
+* Stabs: (stabs). The "stabs" debugging information format.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gdb.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gdb.info
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diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gprof.info b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gprof.info
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+This is gprof.info, produced by makeinfo version 4.8 from gprof.texi.
+
+START-INFO-DIR-ENTRY
+* gprof: (gprof). Profiling your program's execution
+END-INFO-DIR-ENTRY
+
+ This file documents the gprof profiler of the GNU system.
+
+ Copyright (C) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008,
+2009 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: gprof.info, Node: Top, Next: Introduction, Up: (dir)
+
+Profiling a Program: Where Does It Spend Its Time?
+**************************************************
+
+This manual describes the GNU profiler, `gprof', and how you can use it
+to determine which parts of a program are taking most of the execution
+time. We assume that you know how to write, compile, and execute
+programs. GNU `gprof' was written by Jay Fenlason.
+
+ This manual is for `gprof' (GNU Binutils) version 2.20.
+
+ This document is distributed under the terms of the GNU Free
+Documentation License version 1.3. A copy of the license is included
+in the section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* Introduction:: What profiling means, and why it is useful.
+
+* Compiling:: How to compile your program for profiling.
+* Executing:: Executing your program to generate profile data
+* Invoking:: How to run `gprof', and its options
+
+* Output:: Interpreting `gprof''s output
+
+* Inaccuracy:: Potential problems you should be aware of
+* How do I?:: Answers to common questions
+* Incompatibilities:: (between GNU `gprof' and Unix `gprof'.)
+* Details:: Details of how profiling is done
+* GNU Free Documentation License:: GNU Free Documentation License
+
+
+File: gprof.info, Node: Introduction, Next: Compiling, Prev: Top, Up: Top
+
+1 Introduction to Profiling
+***************************
+
+Profiling allows you to learn where your program spent its time and
+which functions called which other functions while it was executing.
+This information can show you which pieces of your program are slower
+than you expected, and might be candidates for rewriting to make your
+program execute faster. It can also tell you which functions are being
+called more or less often than you expected. This may help you spot
+bugs that had otherwise been unnoticed.
+
+ Since the profiler uses information collected during the actual
+execution of your program, it can be used on programs that are too
+large or too complex to analyze by reading the source. However, how
+your program is run will affect the information that shows up in the
+profile data. If you don't use some feature of your program while it
+is being profiled, no profile information will be generated for that
+feature.
+
+ Profiling has several steps:
+
+ * You must compile and link your program with profiling enabled.
+ *Note Compiling a Program for Profiling: Compiling.
+
+ * You must execute your program to generate a profile data file.
+ *Note Executing the Program: Executing.
+
+ * You must run `gprof' to analyze the profile data. *Note `gprof'
+ Command Summary: Invoking.
+
+ The next three chapters explain these steps in greater detail.
+
+ Several forms of output are available from the analysis.
+
+ The "flat profile" shows how much time your program spent in each
+function, and how many times that function was called. If you simply
+want to know which functions burn most of the cycles, it is stated
+concisely here. *Note The Flat Profile: Flat Profile.
+
+ The "call graph" shows, for each function, which functions called
+it, which other functions it called, and how many times. There is also
+an estimate of how much time was spent in the subroutines of each
+function. This can suggest places where you might try to eliminate
+function calls that use a lot of time. *Note The Call Graph: Call
+Graph.
+
+ The "annotated source" listing is a copy of the program's source
+code, labeled with the number of times each line of the program was
+executed. *Note The Annotated Source Listing: Annotated Source.
+
+ To better understand how profiling works, you may wish to read a
+description of its implementation. *Note Implementation of Profiling:
+Implementation.
+
+
+File: gprof.info, Node: Compiling, Next: Executing, Prev: Introduction, Up: Top
+
+2 Compiling a Program for Profiling
+***********************************
+
+The first step in generating profile information for your program is to
+compile and link it with profiling enabled.
+
+ To compile a source file for profiling, specify the `-pg' option when
+you run the compiler. (This is in addition to the options you normally
+use.)
+
+ To link the program for profiling, if you use a compiler such as `cc'
+to do the linking, simply specify `-pg' in addition to your usual
+options. The same option, `-pg', alters either compilation or linking
+to do what is necessary for profiling. Here are examples:
+
+ cc -g -c myprog.c utils.c -pg
+ cc -o myprog myprog.o utils.o -pg
+
+ The `-pg' option also works with a command that both compiles and
+links:
+
+ cc -o myprog myprog.c utils.c -g -pg
+
+ Note: The `-pg' option must be part of your compilation options as
+well as your link options. If it is not then no call-graph data will
+be gathered and when you run `gprof' you will get an error message like
+this:
+
+ gprof: gmon.out file is missing call-graph data
+
+ If you add the `-Q' switch to suppress the printing of the call
+graph data you will still be able to see the time samples:
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls Ts/call Ts/call name
+ 44.12 0.07 0.07 zazLoop
+ 35.29 0.14 0.06 main
+ 20.59 0.17 0.04 bazMillion
+
+ If you run the linker `ld' directly instead of through a compiler
+such as `cc', you may have to specify a profiling startup file
+`gcrt0.o' as the first input file instead of the usual startup file
+`crt0.o'. In addition, you would probably want to specify the
+profiling C library, `libc_p.a', by writing `-lc_p' instead of the
+usual `-lc'. This is not absolutely necessary, but doing this gives
+you number-of-calls information for standard library functions such as
+`read' and `open'. For example:
+
+ ld -o myprog /lib/gcrt0.o myprog.o utils.o -lc_p
+
+ If you are running the program on a system which supports shared
+libraries you may run into problems with the profiling support code in
+a shared library being called before that library has been fully
+initialised. This is usually detected by the program encountering a
+segmentation fault as soon as it is run. The solution is to link
+against a static version of the library containing the profiling
+support code, which for `gcc' users can be done via the `-static' or
+`-static-libgcc' command line option. For example:
+
+ gcc -g -pg -static-libgcc myprog.c utils.c -o myprog
+
+ If you compile only some of the modules of the program with `-pg',
+you can still profile the program, but you won't get complete
+information about the modules that were compiled without `-pg'. The
+only information you get for the functions in those modules is the
+total time spent in them; there is no record of how many times they
+were called, or from where. This will not affect the flat profile
+(except that the `calls' field for the functions will be blank), but
+will greatly reduce the usefulness of the call graph.
+
+ If you wish to perform line-by-line profiling you should use the
+`gcov' tool instead of `gprof'. See that tool's manual or info pages
+for more details of how to do this.
+
+ Note, older versions of `gcc' produce line-by-line profiling
+information that works with `gprof' rather than `gcov' so there is
+still support for displaying this kind of information in `gprof'. *Note
+Line-by-line Profiling: Line-by-line.
+
+ It also worth noting that `gcc' implements a
+`-finstrument-functions' command line option which will insert calls to
+special user supplied instrumentation routines at the entry and exit of
+every function in their program. This can be used to implement an
+alternative profiling scheme.
+
+
+File: gprof.info, Node: Executing, Next: Invoking, Prev: Compiling, Up: Top
+
+3 Executing the Program
+***********************
+
+Once the program is compiled for profiling, you must run it in order to
+generate the information that `gprof' needs. Simply run the program as
+usual, using the normal arguments, file names, etc. The program should
+run normally, producing the same output as usual. It will, however, run
+somewhat slower than normal because of the time spent collecting and
+writing the profile data.
+
+ The way you run the program--the arguments and input that you give
+it--may have a dramatic effect on what the profile information shows.
+The profile data will describe the parts of the program that were
+activated for the particular input you use. For example, if the first
+command you give to your program is to quit, the profile data will show
+the time used in initialization and in cleanup, but not much else.
+
+ Your program will write the profile data into a file called
+`gmon.out' just before exiting. If there is already a file called
+`gmon.out', its contents are overwritten. There is currently no way to
+tell the program to write the profile data under a different name, but
+you can rename the file afterwards if you are concerned that it may be
+overwritten.
+
+ In order to write the `gmon.out' file properly, your program must
+exit normally: by returning from `main' or by calling `exit'. Calling
+the low-level function `_exit' does not write the profile data, and
+neither does abnormal termination due to an unhandled signal.
+
+ The `gmon.out' file is written in the program's _current working
+directory_ at the time it exits. This means that if your program calls
+`chdir', the `gmon.out' file will be left in the last directory your
+program `chdir''d to. If you don't have permission to write in this
+directory, the file is not written, and you will get an error message.
+
+ Older versions of the GNU profiling library may also write a file
+called `bb.out'. This file, if present, contains an human-readable
+listing of the basic-block execution counts. Unfortunately, the
+appearance of a human-readable `bb.out' means the basic-block counts
+didn't get written into `gmon.out'. The Perl script `bbconv.pl',
+included with the `gprof' source distribution, will convert a `bb.out'
+file into a format readable by `gprof'. Invoke it like this:
+
+ bbconv.pl < bb.out > BH-DATA
+
+ This translates the information in `bb.out' into a form that `gprof'
+can understand. But you still need to tell `gprof' about the existence
+of this translated information. To do that, include BB-DATA on the
+`gprof' command line, _along with `gmon.out'_, like this:
+
+ gprof OPTIONS EXECUTABLE-FILE gmon.out BB-DATA [YET-MORE-PROFILE-DATA-FILES...] [> OUTFILE]
+
+
+File: gprof.info, Node: Invoking, Next: Output, Prev: Executing, Up: Top
+
+4 `gprof' Command Summary
+*************************
+
+After you have a profile data file `gmon.out', you can run `gprof' to
+interpret the information in it. The `gprof' program prints a flat
+profile and a call graph on standard output. Typically you would
+redirect the output of `gprof' into a file with `>'.
+
+ You run `gprof' like this:
+
+ gprof OPTIONS [EXECUTABLE-FILE [PROFILE-DATA-FILES...]] [> OUTFILE]
+
+Here square-brackets indicate optional arguments.
+
+ If you omit the executable file name, the file `a.out' is used. If
+you give no profile data file name, the file `gmon.out' is used. If
+any file is not in the proper format, or if the profile data file does
+not appear to belong to the executable file, an error message is
+printed.
+
+ You can give more than one profile data file by entering all their
+names after the executable file name; then the statistics in all the
+data files are summed together.
+
+ The order of these options does not matter.
+
+* Menu:
+
+* Output Options:: Controlling `gprof''s output style
+* Analysis Options:: Controlling how `gprof' analyzes its data
+* Miscellaneous Options::
+* Deprecated Options:: Options you no longer need to use, but which
+ have been retained for compatibility
+* Symspecs:: Specifying functions to include or exclude
+
+
+File: gprof.info, Node: Output Options, Next: Analysis Options, Up: Invoking
+
+4.1 Output Options
+==================
+
+These options specify which of several output formats `gprof' should
+produce.
+
+ Many of these options take an optional "symspec" to specify
+functions to be included or excluded. These options can be specified
+multiple times, with different symspecs, to include or exclude sets of
+symbols. *Note Symspecs: Symspecs.
+
+ Specifying any of these options overrides the default (`-p -q'),
+which prints a flat profile and call graph analysis for all functions.
+
+`-A[SYMSPEC]'
+`--annotated-source[=SYMSPEC]'
+ The `-A' option causes `gprof' to print annotated source code. If
+ SYMSPEC is specified, print output only for matching symbols.
+ *Note The Annotated Source Listing: Annotated Source.
+
+`-b'
+`--brief'
+ If the `-b' option is given, `gprof' doesn't print the verbose
+ blurbs that try to explain the meaning of all of the fields in the
+ tables. This is useful if you intend to print out the output, or
+ are tired of seeing the blurbs.
+
+`-C[SYMSPEC]'
+`--exec-counts[=SYMSPEC]'
+ The `-C' option causes `gprof' to print a tally of functions and
+ the number of times each was called. If SYMSPEC is specified,
+ print tally only for matching symbols.
+
+ If the profile data file contains basic-block count records,
+ specifying the `-l' option, along with `-C', will cause basic-block
+ execution counts to be tallied and displayed.
+
+`-i'
+`--file-info'
+ The `-i' option causes `gprof' to display summary information
+ about the profile data file(s) and then exit. The number of
+ histogram, call graph, and basic-block count records is displayed.
+
+`-I DIRS'
+`--directory-path=DIRS'
+ The `-I' option specifies a list of search directories in which to
+ find source files. Environment variable GPROF_PATH can also be
+ used to convey this information. Used mostly for annotated source
+ output.
+
+`-J[SYMSPEC]'
+`--no-annotated-source[=SYMSPEC]'
+ The `-J' option causes `gprof' not to print annotated source code.
+ If SYMSPEC is specified, `gprof' prints annotated source, but
+ excludes matching symbols.
+
+`-L'
+`--print-path'
+ Normally, source filenames are printed with the path component
+ suppressed. The `-L' option causes `gprof' to print the full
+ pathname of source filenames, which is determined from symbolic
+ debugging information in the image file and is relative to the
+ directory in which the compiler was invoked.
+
+`-p[SYMSPEC]'
+`--flat-profile[=SYMSPEC]'
+ The `-p' option causes `gprof' to print a flat profile. If
+ SYMSPEC is specified, print flat profile only for matching symbols.
+ *Note The Flat Profile: Flat Profile.
+
+`-P[SYMSPEC]'
+`--no-flat-profile[=SYMSPEC]'
+ The `-P' option causes `gprof' to suppress printing a flat profile.
+ If SYMSPEC is specified, `gprof' prints a flat profile, but
+ excludes matching symbols.
+
+`-q[SYMSPEC]'
+`--graph[=SYMSPEC]'
+ The `-q' option causes `gprof' to print the call graph analysis.
+ If SYMSPEC is specified, print call graph only for matching symbols
+ and their children. *Note The Call Graph: Call Graph.
+
+`-Q[SYMSPEC]'
+`--no-graph[=SYMSPEC]'
+ The `-Q' option causes `gprof' to suppress printing the call graph.
+ If SYMSPEC is specified, `gprof' prints a call graph, but excludes
+ matching symbols.
+
+`-t'
+`--table-length=NUM'
+ The `-t' option causes the NUM most active source lines in each
+ source file to be listed when source annotation is enabled. The
+ default is 10.
+
+`-y'
+`--separate-files'
+ This option affects annotated source output only. Normally,
+ `gprof' prints annotated source files to standard-output. If this
+ option is specified, annotated source for a file named
+ `path/FILENAME' is generated in the file `FILENAME-ann'. If the
+ underlying file system would truncate `FILENAME-ann' so that it
+ overwrites the original `FILENAME', `gprof' generates annotated
+ source in the file `FILENAME.ann' instead (if the original file
+ name has an extension, that extension is _replaced_ with `.ann').
+
+`-Z[SYMSPEC]'
+`--no-exec-counts[=SYMSPEC]'
+ The `-Z' option causes `gprof' not to print a tally of functions
+ and the number of times each was called. If SYMSPEC is specified,
+ print tally, but exclude matching symbols.
+
+`-r'
+`--function-ordering'
+ The `--function-ordering' option causes `gprof' to print a
+ suggested function ordering for the program based on profiling
+ data. This option suggests an ordering which may improve paging,
+ tlb and cache behavior for the program on systems which support
+ arbitrary ordering of functions in an executable.
+
+ The exact details of how to force the linker to place functions in
+ a particular order is system dependent and out of the scope of this
+ manual.
+
+`-R MAP_FILE'
+`--file-ordering MAP_FILE'
+ The `--file-ordering' option causes `gprof' to print a suggested
+ .o link line ordering for the program based on profiling data.
+ This option suggests an ordering which may improve paging, tlb and
+ cache behavior for the program on systems which do not support
+ arbitrary ordering of functions in an executable.
+
+ Use of the `-a' argument is highly recommended with this option.
+
+ The MAP_FILE argument is a pathname to a file which provides
+ function name to object file mappings. The format of the file is
+ similar to the output of the program `nm'.
+
+ c-parse.o:00000000 T yyparse
+ c-parse.o:00000004 C yyerrflag
+ c-lang.o:00000000 T maybe_objc_method_name
+ c-lang.o:00000000 T print_lang_statistics
+ c-lang.o:00000000 T recognize_objc_keyword
+ c-decl.o:00000000 T print_lang_identifier
+ c-decl.o:00000000 T print_lang_type
+ ...
+
+ To create a MAP_FILE with GNU `nm', type a command like `nm
+ --extern-only --defined-only -v --print-file-name program-name'.
+
+`-T'
+`--traditional'
+ The `-T' option causes `gprof' to print its output in
+ "traditional" BSD style.
+
+`-w WIDTH'
+`--width=WIDTH'
+ Sets width of output lines to WIDTH. Currently only used when
+ printing the function index at the bottom of the call graph.
+
+`-x'
+`--all-lines'
+ This option affects annotated source output only. By default,
+ only the lines at the beginning of a basic-block are annotated.
+ If this option is specified, every line in a basic-block is
+ annotated by repeating the annotation for the first line. This
+ behavior is similar to `tcov''s `-a'.
+
+`--demangle[=STYLE]'
+`--no-demangle'
+ These options control whether C++ symbol names should be demangled
+ when printing output. The default is to demangle symbols. The
+ `--no-demangle' option may be used to turn off demangling.
+ Different compilers have different mangling styles. The optional
+ demangling style argument can be used to choose an appropriate
+ demangling style for your compiler.
+
+
+File: gprof.info, Node: Analysis Options, Next: Miscellaneous Options, Prev: Output Options, Up: Invoking
+
+4.2 Analysis Options
+====================
+
+`-a'
+`--no-static'
+ The `-a' option causes `gprof' to suppress the printing of
+ statically declared (private) functions. (These are functions
+ whose names are not listed as global, and which are not visible
+ outside the file/function/block where they were defined.) Time
+ spent in these functions, calls to/from them, etc., will all be
+ attributed to the function that was loaded directly before it in
+ the executable file. This option affects both the flat profile
+ and the call graph.
+
+`-c'
+`--static-call-graph'
+ The `-c' option causes the call graph of the program to be
+ augmented by a heuristic which examines the text space of the
+ object file and identifies function calls in the binary machine
+ code. Since normal call graph records are only generated when
+ functions are entered, this option identifies children that could
+ have been called, but never were. Calls to functions that were
+ not compiled with profiling enabled are also identified, but only
+ if symbol table entries are present for them. Calls to dynamic
+ library routines are typically _not_ found by this option.
+ Parents or children identified via this heuristic are indicated in
+ the call graph with call counts of `0'.
+
+`-D'
+`--ignore-non-functions'
+ The `-D' option causes `gprof' to ignore symbols which are not
+ known to be functions. This option will give more accurate
+ profile data on systems where it is supported (Solaris and HPUX for
+ example).
+
+`-k FROM/TO'
+ The `-k' option allows you to delete from the call graph any arcs
+ from symbols matching symspec FROM to those matching symspec TO.
+
+`-l'
+`--line'
+ The `-l' option enables line-by-line profiling, which causes
+ histogram hits to be charged to individual source code lines,
+ instead of functions. This feature only works with programs
+ compiled by older versions of the `gcc' compiler. Newer versions
+ of `gcc' are designed to work with the `gcov' tool instead.
+
+ If the program was compiled with basic-block counting enabled,
+ this option will also identify how many times each line of code
+ was executed. While line-by-line profiling can help isolate where
+ in a large function a program is spending its time, it also
+ significantly increases the running time of `gprof', and magnifies
+ statistical inaccuracies. *Note Statistical Sampling Error:
+ Sampling Error.
+
+`-m NUM'
+`--min-count=NUM'
+ This option affects execution count output only. Symbols that are
+ executed less than NUM times are suppressed.
+
+`-nSYMSPEC'
+`--time=SYMSPEC'
+ The `-n' option causes `gprof', in its call graph analysis, to
+ only propagate times for symbols matching SYMSPEC.
+
+`-NSYMSPEC'
+`--no-time=SYMSPEC'
+ The `-n' option causes `gprof', in its call graph analysis, not to
+ propagate times for symbols matching SYMSPEC.
+
+`-SFILENAME'
+`--external-symbol-table=FILENAME'
+ The `-S' option causes `gprof' to read an external symbol table
+ file, such as `/proc/kallsyms', rather than read the symbol table
+ from the given object file (the default is `a.out'). This is useful
+ for profiling kernel modules.
+
+`-z'
+`--display-unused-functions'
+ If you give the `-z' option, `gprof' will mention all functions in
+ the flat profile, even those that were never called, and that had
+ no time spent in them. This is useful in conjunction with the
+ `-c' option for discovering which routines were never called.
+
+
+
+File: gprof.info, Node: Miscellaneous Options, Next: Deprecated Options, Prev: Analysis Options, Up: Invoking
+
+4.3 Miscellaneous Options
+=========================
+
+`-d[NUM]'
+`--debug[=NUM]'
+ The `-d NUM' option specifies debugging options. If NUM is not
+ specified, enable all debugging. *Note Debugging `gprof':
+ Debugging.
+
+`-h'
+`--help'
+ The `-h' option prints command line usage.
+
+`-ONAME'
+`--file-format=NAME'
+ Selects the format of the profile data files. Recognized formats
+ are `auto' (the default), `bsd', `4.4bsd', `magic', and `prof'
+ (not yet supported).
+
+`-s'
+`--sum'
+ The `-s' option causes `gprof' to summarize the information in the
+ profile data files it read in, and write out a profile data file
+ called `gmon.sum', which contains all the information from the
+ profile data files that `gprof' read in. The file `gmon.sum' may
+ be one of the specified input files; the effect of this is to
+ merge the data in the other input files into `gmon.sum'.
+
+ Eventually you can run `gprof' again without `-s' to analyze the
+ cumulative data in the file `gmon.sum'.
+
+`-v'
+`--version'
+ The `-v' flag causes `gprof' to print the current version number,
+ and then exit.
+
+
+
+File: gprof.info, Node: Deprecated Options, Next: Symspecs, Prev: Miscellaneous Options, Up: Invoking
+
+4.4 Deprecated Options
+======================
+
+ These options have been replaced with newer versions that use
+ symspecs.
+
+`-e FUNCTION_NAME'
+ The `-e FUNCTION' option tells `gprof' to not print information
+ about the function FUNCTION_NAME (and its children...) in the call
+ graph. The function will still be listed as a child of any
+ functions that call it, but its index number will be shown as
+ `[not printed]'. More than one `-e' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-e' option.
+
+`-E FUNCTION_NAME'
+ The `-E FUNCTION' option works like the `-e' option, but time
+ spent in the function (and children who were not called from
+ anywhere else), will not be used to compute the
+ percentages-of-time for the call graph. More than one `-E' option
+ may be given; only one FUNCTION_NAME may be indicated with each
+ `-E' option.
+
+`-f FUNCTION_NAME'
+ The `-f FUNCTION' option causes `gprof' to limit the call graph to
+ the function FUNCTION_NAME and its children (and their
+ children...). More than one `-f' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-f' option.
+
+`-F FUNCTION_NAME'
+ The `-F FUNCTION' option works like the `-f' option, but only time
+ spent in the function and its children (and their children...)
+ will be used to determine total-time and percentages-of-time for
+ the call graph. More than one `-F' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-F' option. The `-F'
+ option overrides the `-E' option.
+
+
+ Note that only one function can be specified with each `-e', `-E',
+`-f' or `-F' option. To specify more than one function, use multiple
+options. For example, this command:
+
+ gprof -e boring -f foo -f bar myprogram > gprof.output
+
+lists in the call graph all functions that were reached from either
+`foo' or `bar' and were not reachable from `boring'.
+
+
+File: gprof.info, Node: Symspecs, Prev: Deprecated Options, Up: Invoking
+
+4.5 Symspecs
+============
+
+Many of the output options allow functions to be included or excluded
+using "symspecs" (symbol specifications), which observe the following
+syntax:
+
+ filename_containing_a_dot
+ | funcname_not_containing_a_dot
+ | linenumber
+ | ( [ any_filename ] `:' ( any_funcname | linenumber ) )
+
+ Here are some sample symspecs:
+
+`main.c'
+ Selects everything in file `main.c'--the dot in the string tells
+ `gprof' to interpret the string as a filename, rather than as a
+ function name. To select a file whose name does not contain a
+ dot, a trailing colon should be specified. For example, `odd:' is
+ interpreted as the file named `odd'.
+
+`main'
+ Selects all functions named `main'.
+
+ Note that there may be multiple instances of the same function name
+ because some of the definitions may be local (i.e., static).
+ Unless a function name is unique in a program, you must use the
+ colon notation explained below to specify a function from a
+ specific source file.
+
+ Sometimes, function names contain dots. In such cases, it is
+ necessary to add a leading colon to the name. For example,
+ `:.mul' selects function `.mul'.
+
+ In some object file formats, symbols have a leading underscore.
+ `gprof' will normally not print these underscores. When you name a
+ symbol in a symspec, you should type it exactly as `gprof' prints
+ it in its output. For example, if the compiler produces a symbol
+ `_main' from your `main' function, `gprof' still prints it as
+ `main' in its output, so you should use `main' in symspecs.
+
+`main.c:main'
+ Selects function `main' in file `main.c'.
+
+`main.c:134'
+ Selects line 134 in file `main.c'.
+
+
+File: gprof.info, Node: Output, Next: Inaccuracy, Prev: Invoking, Up: Top
+
+5 Interpreting `gprof''s Output
+*******************************
+
+`gprof' can produce several different output styles, the most important
+of which are described below. The simplest output styles (file
+information, execution count, and function and file ordering) are not
+described here, but are documented with the respective options that
+trigger them. *Note Output Options: Output Options.
+
+* Menu:
+
+* Flat Profile:: The flat profile shows how much time was spent
+ executing directly in each function.
+* Call Graph:: The call graph shows which functions called which
+ others, and how much time each function used
+ when its subroutine calls are included.
+* Line-by-line:: `gprof' can analyze individual source code lines
+* Annotated Source:: The annotated source listing displays source code
+ labeled with execution counts
+
+
+File: gprof.info, Node: Flat Profile, Next: Call Graph, Up: Output
+
+5.1 The Flat Profile
+====================
+
+The "flat profile" shows the total amount of time your program spent
+executing each function. Unless the `-z' option is given, functions
+with no apparent time spent in them, and no apparent calls to them, are
+not mentioned. Note that if a function was not compiled for profiling,
+and didn't run long enough to show up on the program counter histogram,
+it will be indistinguishable from a function that was never called.
+
+ This is part of a flat profile for a small program:
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls ms/call ms/call name
+ 33.34 0.02 0.02 7208 0.00 0.00 open
+ 16.67 0.03 0.01 244 0.04 0.12 offtime
+ 16.67 0.04 0.01 8 1.25 1.25 memccpy
+ 16.67 0.05 0.01 7 1.43 1.43 write
+ 16.67 0.06 0.01 mcount
+ 0.00 0.06 0.00 236 0.00 0.00 tzset
+ 0.00 0.06 0.00 192 0.00 0.00 tolower
+ 0.00 0.06 0.00 47 0.00 0.00 strlen
+ 0.00 0.06 0.00 45 0.00 0.00 strchr
+ 0.00 0.06 0.00 1 0.00 50.00 main
+ 0.00 0.06 0.00 1 0.00 0.00 memcpy
+ 0.00 0.06 0.00 1 0.00 10.11 print
+ 0.00 0.06 0.00 1 0.00 0.00 profil
+ 0.00 0.06 0.00 1 0.00 50.00 report
+ ...
+
+The functions are sorted first by decreasing run-time spent in them,
+then by decreasing number of calls, then alphabetically by name. The
+functions `mcount' and `profil' are part of the profiling apparatus and
+appear in every flat profile; their time gives a measure of the amount
+of overhead due to profiling.
+
+ Just before the column headers, a statement appears indicating how
+much time each sample counted as. This "sampling period" estimates the
+margin of error in each of the time figures. A time figure that is not
+much larger than this is not reliable. In this example, each sample
+counted as 0.01 seconds, suggesting a 100 Hz sampling rate. The
+program's total execution time was 0.06 seconds, as indicated by the
+`cumulative seconds' field. Since each sample counted for 0.01
+seconds, this means only six samples were taken during the run. Two of
+the samples occurred while the program was in the `open' function, as
+indicated by the `self seconds' field. Each of the other four samples
+occurred one each in `offtime', `memccpy', `write', and `mcount'.
+Since only six samples were taken, none of these values can be regarded
+as particularly reliable. In another run, the `self seconds' field for
+`mcount' might well be `0.00' or `0.02'. *Note Statistical Sampling
+Error: Sampling Error, for a complete discussion.
+
+ The remaining functions in the listing (those whose `self seconds'
+field is `0.00') didn't appear in the histogram samples at all.
+However, the call graph indicated that they were called, so therefore
+they are listed, sorted in decreasing order by the `calls' field.
+Clearly some time was spent executing these functions, but the paucity
+of histogram samples prevents any determination of how much time each
+took.
+
+ Here is what the fields in each line mean:
+
+`% time'
+ This is the percentage of the total execution time your program
+ spent in this function. These should all add up to 100%.
+
+`cumulative seconds'
+ This is the cumulative total number of seconds the computer spent
+ executing this functions, plus the time spent in all the functions
+ above this one in this table.
+
+`self seconds'
+ This is the number of seconds accounted for by this function alone.
+ The flat profile listing is sorted first by this number.
+
+`calls'
+ This is the total number of times the function was called. If the
+ function was never called, or the number of times it was called
+ cannot be determined (probably because the function was not
+ compiled with profiling enabled), the "calls" field is blank.
+
+`self ms/call'
+ This represents the average number of milliseconds spent in this
+ function per call, if this function is profiled. Otherwise, this
+ field is blank for this function.
+
+`total ms/call'
+ This represents the average number of milliseconds spent in this
+ function and its descendants per call, if this function is
+ profiled. Otherwise, this field is blank for this function. This
+ is the only field in the flat profile that uses call graph
+ analysis.
+
+`name'
+ This is the name of the function. The flat profile is sorted by
+ this field alphabetically after the "self seconds" and "calls"
+ fields are sorted.
+
+
+File: gprof.info, Node: Call Graph, Next: Line-by-line, Prev: Flat Profile, Up: Output
+
+5.2 The Call Graph
+==================
+
+The "call graph" shows how much time was spent in each function and its
+children. From this information, you can find functions that, while
+they themselves may not have used much time, called other functions
+that did use unusual amounts of time.
+
+ Here is a sample call from a small program. This call came from the
+same `gprof' run as the flat profile example in the previous section.
+
+ granularity: each sample hit covers 2 byte(s) for 20.00% of 0.05 seconds
+
+ index % time self children called name
+ <spontaneous>
+ [1] 100.0 0.00 0.05 start [1]
+ 0.00 0.05 1/1 main [2]
+ 0.00 0.00 1/2 on_exit [28]
+ 0.00 0.00 1/1 exit [59]
+ -----------------------------------------------
+ 0.00 0.05 1/1 start [1]
+ [2] 100.0 0.00 0.05 1 main [2]
+ 0.00 0.05 1/1 report [3]
+ -----------------------------------------------
+ 0.00 0.05 1/1 main [2]
+ [3] 100.0 0.00 0.05 1 report [3]
+ 0.00 0.03 8/8 timelocal [6]
+ 0.00 0.01 1/1 print [9]
+ 0.00 0.01 9/9 fgets [12]
+ 0.00 0.00 12/34 strncmp <cycle 1> [40]
+ 0.00 0.00 8/8 lookup [20]
+ 0.00 0.00 1/1 fopen [21]
+ 0.00 0.00 8/8 chewtime [24]
+ 0.00 0.00 8/16 skipspace [44]
+ -----------------------------------------------
+ [4] 59.8 0.01 0.02 8+472 <cycle 2 as a whole> [4]
+ 0.01 0.02 244+260 offtime <cycle 2> [7]
+ 0.00 0.00 236+1 tzset <cycle 2> [26]
+ -----------------------------------------------
+
+ The lines full of dashes divide this table into "entries", one for
+each function. Each entry has one or more lines.
+
+ In each entry, the primary line is the one that starts with an index
+number in square brackets. The end of this line says which function
+the entry is for. The preceding lines in the entry describe the
+callers of this function and the following lines describe its
+subroutines (also called "children" when we speak of the call graph).
+
+ The entries are sorted by time spent in the function and its
+subroutines.
+
+ The internal profiling function `mcount' (*note The Flat Profile:
+Flat Profile.) is never mentioned in the call graph.
+
+* Menu:
+
+* Primary:: Details of the primary line's contents.
+* Callers:: Details of caller-lines' contents.
+* Subroutines:: Details of subroutine-lines' contents.
+* Cycles:: When there are cycles of recursion,
+ such as `a' calls `b' calls `a'...
+
+
+File: gprof.info, Node: Primary, Next: Callers, Up: Call Graph
+
+5.2.1 The Primary Line
+----------------------
+
+The "primary line" in a call graph entry is the line that describes the
+function which the entry is about and gives the overall statistics for
+this function.
+
+ For reference, we repeat the primary line from the entry for function
+`report' in our main example, together with the heading line that shows
+the names of the fields:
+
+ index % time self children called name
+ ...
+ [3] 100.0 0.00 0.05 1 report [3]
+
+ Here is what the fields in the primary line mean:
+
+`index'
+ Entries are numbered with consecutive integers. Each function
+ therefore has an index number, which appears at the beginning of
+ its primary line.
+
+ Each cross-reference to a function, as a caller or subroutine of
+ another, gives its index number as well as its name. The index
+ number guides you if you wish to look for the entry for that
+ function.
+
+`% time'
+ This is the percentage of the total time that was spent in this
+ function, including time spent in subroutines called from this
+ function.
+
+ The time spent in this function is counted again for the callers of
+ this function. Therefore, adding up these percentages is
+ meaningless.
+
+`self'
+ This is the total amount of time spent in this function. This
+ should be identical to the number printed in the `seconds' field
+ for this function in the flat profile.
+
+`children'
+ This is the total amount of time spent in the subroutine calls
+ made by this function. This should be equal to the sum of all the
+ `self' and `children' entries of the children listed directly
+ below this function.
+
+`called'
+ This is the number of times the function was called.
+
+ If the function called itself recursively, there are two numbers,
+ separated by a `+'. The first number counts non-recursive calls,
+ and the second counts recursive calls.
+
+ In the example above, the function `report' was called once from
+ `main'.
+
+`name'
+ This is the name of the current function. The index number is
+ repeated after it.
+
+ If the function is part of a cycle of recursion, the cycle number
+ is printed between the function's name and the index number (*note
+ How Mutually Recursive Functions Are Described: Cycles.). For
+ example, if function `gnurr' is part of cycle number one, and has
+ index number twelve, its primary line would be end like this:
+
+ gnurr <cycle 1> [12]
+
+
+File: gprof.info, Node: Callers, Next: Subroutines, Prev: Primary, Up: Call Graph
+
+5.2.2 Lines for a Function's Callers
+------------------------------------
+
+A function's entry has a line for each function it was called by.
+These lines' fields correspond to the fields of the primary line, but
+their meanings are different because of the difference in context.
+
+ For reference, we repeat two lines from the entry for the function
+`report', the primary line and one caller-line preceding it, together
+with the heading line that shows the names of the fields:
+
+ index % time self children called name
+ ...
+ 0.00 0.05 1/1 main [2]
+ [3] 100.0 0.00 0.05 1 report [3]
+
+ Here are the meanings of the fields in the caller-line for `report'
+called from `main':
+
+`self'
+ An estimate of the amount of time spent in `report' itself when it
+ was called from `main'.
+
+`children'
+ An estimate of the amount of time spent in subroutines of `report'
+ when `report' was called from `main'.
+
+ The sum of the `self' and `children' fields is an estimate of the
+ amount of time spent within calls to `report' from `main'.
+
+`called'
+ Two numbers: the number of times `report' was called from `main',
+ followed by the total number of non-recursive calls to `report'
+ from all its callers.
+
+`name and index number'
+ The name of the caller of `report' to which this line applies,
+ followed by the caller's index number.
+
+ Not all functions have entries in the call graph; some options to
+ `gprof' request the omission of certain functions. When a caller
+ has no entry of its own, it still has caller-lines in the entries
+ of the functions it calls.
+
+ If the caller is part of a recursion cycle, the cycle number is
+ printed between the name and the index number.
+
+ If the identity of the callers of a function cannot be determined, a
+dummy caller-line is printed which has `<spontaneous>' as the "caller's
+name" and all other fields blank. This can happen for signal handlers.
+
+
+File: gprof.info, Node: Subroutines, Next: Cycles, Prev: Callers, Up: Call Graph
+
+5.2.3 Lines for a Function's Subroutines
+----------------------------------------
+
+A function's entry has a line for each of its subroutines--in other
+words, a line for each other function that it called. These lines'
+fields correspond to the fields of the primary line, but their meanings
+are different because of the difference in context.
+
+ For reference, we repeat two lines from the entry for the function
+`main', the primary line and a line for a subroutine, together with the
+heading line that shows the names of the fields:
+
+ index % time self children called name
+ ...
+ [2] 100.0 0.00 0.05 1 main [2]
+ 0.00 0.05 1/1 report [3]
+
+ Here are the meanings of the fields in the subroutine-line for `main'
+calling `report':
+
+`self'
+ An estimate of the amount of time spent directly within `report'
+ when `report' was called from `main'.
+
+`children'
+ An estimate of the amount of time spent in subroutines of `report'
+ when `report' was called from `main'.
+
+ The sum of the `self' and `children' fields is an estimate of the
+ total time spent in calls to `report' from `main'.
+
+`called'
+ Two numbers, the number of calls to `report' from `main' followed
+ by the total number of non-recursive calls to `report'. This
+ ratio is used to determine how much of `report''s `self' and
+ `children' time gets credited to `main'. *Note Estimating
+ `children' Times: Assumptions.
+
+`name'
+ The name of the subroutine of `main' to which this line applies,
+ followed by the subroutine's index number.
+
+ If the caller is part of a recursion cycle, the cycle number is
+ printed between the name and the index number.
+
+
+File: gprof.info, Node: Cycles, Prev: Subroutines, Up: Call Graph
+
+5.2.4 How Mutually Recursive Functions Are Described
+----------------------------------------------------
+
+The graph may be complicated by the presence of "cycles of recursion"
+in the call graph. A cycle exists if a function calls another function
+that (directly or indirectly) calls (or appears to call) the original
+function. For example: if `a' calls `b', and `b' calls `a', then `a'
+and `b' form a cycle.
+
+ Whenever there are call paths both ways between a pair of functions,
+they belong to the same cycle. If `a' and `b' call each other and `b'
+and `c' call each other, all three make one cycle. Note that even if
+`b' only calls `a' if it was not called from `a', `gprof' cannot
+determine this, so `a' and `b' are still considered a cycle.
+
+ The cycles are numbered with consecutive integers. When a function
+belongs to a cycle, each time the function name appears in the call
+graph it is followed by `<cycle NUMBER>'.
+
+ The reason cycles matter is that they make the time values in the
+call graph paradoxical. The "time spent in children" of `a' should
+include the time spent in its subroutine `b' and in `b''s
+subroutines--but one of `b''s subroutines is `a'! How much of `a''s
+time should be included in the children of `a', when `a' is indirectly
+recursive?
+
+ The way `gprof' resolves this paradox is by creating a single entry
+for the cycle as a whole. The primary line of this entry describes the
+total time spent directly in the functions of the cycle. The
+"subroutines" of the cycle are the individual functions of the cycle,
+and all other functions that were called directly by them. The
+"callers" of the cycle are the functions, outside the cycle, that
+called functions in the cycle.
+
+ Here is an example portion of a call graph which shows a cycle
+containing functions `a' and `b'. The cycle was entered by a call to
+`a' from `main'; both `a' and `b' called `c'.
+
+ index % time self children called name
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
+ 1.02 0 3 b <cycle 1> [4]
+ 0.75 0 2 a <cycle 1> [5]
+ ----------------------------------------
+ 3 a <cycle 1> [5]
+ [4] 52.85 1.02 0 0 b <cycle 1> [4]
+ 2 a <cycle 1> [5]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ 2 b <cycle 1> [4]
+ [5] 38.86 0.75 0 1 a <cycle 1> [5]
+ 3 b <cycle 1> [4]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+
+(The entire call graph for this program contains in addition an entry
+for `main', which calls `a', and an entry for `c', with callers `a' and
+`b'.)
+
+ index % time self children called name
+ <spontaneous>
+ [1] 100.00 0 1.93 0 start [1]
+ 0.16 1.77 1/1 main [2]
+ ----------------------------------------
+ 0.16 1.77 1/1 start [1]
+ [2] 100.00 0.16 1.77 1 main [2]
+ 1.77 0 1/1 a <cycle 1> [5]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
+ 1.02 0 3 b <cycle 1> [4]
+ 0.75 0 2 a <cycle 1> [5]
+ 0 0 6/6 c [6]
+ ----------------------------------------
+ 3 a <cycle 1> [5]
+ [4] 52.85 1.02 0 0 b <cycle 1> [4]
+ 2 a <cycle 1> [5]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ 2 b <cycle 1> [4]
+ [5] 38.86 0.75 0 1 a <cycle 1> [5]
+ 3 b <cycle 1> [4]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 0 0 3/6 b <cycle 1> [4]
+ 0 0 3/6 a <cycle 1> [5]
+ [6] 0.00 0 0 6 c [6]
+ ----------------------------------------
+
+ The `self' field of the cycle's primary line is the total time spent
+in all the functions of the cycle. It equals the sum of the `self'
+fields for the individual functions in the cycle, found in the entry in
+the subroutine lines for these functions.
+
+ The `children' fields of the cycle's primary line and subroutine
+lines count only subroutines outside the cycle. Even though `a' calls
+`b', the time spent in those calls to `b' is not counted in `a''s
+`children' time. Thus, we do not encounter the problem of what to do
+when the time in those calls to `b' includes indirect recursive calls
+back to `a'.
+
+ The `children' field of a caller-line in the cycle's entry estimates
+the amount of time spent _in the whole cycle_, and its other
+subroutines, on the times when that caller called a function in the
+cycle.
+
+ The `called' field in the primary line for the cycle has two numbers:
+first, the number of times functions in the cycle were called by
+functions outside the cycle; second, the number of times they were
+called by functions in the cycle (including times when a function in
+the cycle calls itself). This is a generalization of the usual split
+into non-recursive and recursive calls.
+
+ The `called' field of a subroutine-line for a cycle member in the
+cycle's entry says how many time that function was called from
+functions in the cycle. The total of all these is the second number in
+the primary line's `called' field.
+
+ In the individual entry for a function in a cycle, the other
+functions in the same cycle can appear as subroutines and as callers.
+These lines show how many times each function in the cycle called or
+was called from each other function in the cycle. The `self' and
+`children' fields in these lines are blank because of the difficulty of
+defining meanings for them when recursion is going on.
+
+
+File: gprof.info, Node: Line-by-line, Next: Annotated Source, Prev: Call Graph, Up: Output
+
+5.3 Line-by-line Profiling
+==========================
+
+`gprof''s `-l' option causes the program to perform "line-by-line"
+profiling. In this mode, histogram samples are assigned not to
+functions, but to individual lines of source code. This only works
+with programs compiled with older versions of the `gcc' compiler.
+Newer versions of `gcc' use a different program - `gcov' - to display
+line-by-line profiling information.
+
+ With the older versions of `gcc' the program usually has to be
+compiled with a `-g' option, in addition to `-pg', in order to generate
+debugging symbols for tracking source code lines. Note, in much older
+versions of `gcc' the program had to be compiled with the `-a' command
+line option as well.
+
+ The flat profile is the most useful output table in line-by-line
+mode. The call graph isn't as useful as normal, since the current
+version of `gprof' does not propagate call graph arcs from source code
+lines to the enclosing function. The call graph does, however, show
+each line of code that called each function, along with a count.
+
+ Here is a section of `gprof''s output, without line-by-line
+profiling. Note that `ct_init' accounted for four histogram hits, and
+13327 calls to `init_block'.
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls us/call us/call name
+ 30.77 0.13 0.04 6335 6.31 6.31 ct_init
+
+
+ Call graph (explanation follows)
+
+
+ granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+ index % time self children called name
+
+ 0.00 0.00 1/13496 name_too_long
+ 0.00 0.00 40/13496 deflate
+ 0.00 0.00 128/13496 deflate_fast
+ 0.00 0.00 13327/13496 ct_init
+ [7] 0.0 0.00 0.00 13496 init_block
+
+ Now let's look at some of `gprof''s output from the same program run,
+this time with line-by-line profiling enabled. Note that `ct_init''s
+four histogram hits are broken down into four lines of source code--one
+hit occurred on each of lines 349, 351, 382 and 385. In the call graph,
+note how `ct_init''s 13327 calls to `init_block' are broken down into
+one call from line 396, 3071 calls from line 384, 3730 calls from line
+385, and 6525 calls from 387.
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self
+ time seconds seconds calls name
+ 7.69 0.10 0.01 ct_init (trees.c:349)
+ 7.69 0.11 0.01 ct_init (trees.c:351)
+ 7.69 0.12 0.01 ct_init (trees.c:382)
+ 7.69 0.13 0.01 ct_init (trees.c:385)
+
+
+ Call graph (explanation follows)
+
+
+ granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+ % time self children called name
+
+ 0.00 0.00 1/13496 name_too_long (gzip.c:1440)
+ 0.00 0.00 1/13496 deflate (deflate.c:763)
+ 0.00 0.00 1/13496 ct_init (trees.c:396)
+ 0.00 0.00 2/13496 deflate (deflate.c:727)
+ 0.00 0.00 4/13496 deflate (deflate.c:686)
+ 0.00 0.00 5/13496 deflate (deflate.c:675)
+ 0.00 0.00 12/13496 deflate (deflate.c:679)
+ 0.00 0.00 16/13496 deflate (deflate.c:730)
+ 0.00 0.00 128/13496 deflate_fast (deflate.c:654)
+ 0.00 0.00 3071/13496 ct_init (trees.c:384)
+ 0.00 0.00 3730/13496 ct_init (trees.c:385)
+ 0.00 0.00 6525/13496 ct_init (trees.c:387)
+ [6] 0.0 0.00 0.00 13496 init_block (trees.c:408)
+
+
+File: gprof.info, Node: Annotated Source, Prev: Line-by-line, Up: Output
+
+5.4 The Annotated Source Listing
+================================
+
+`gprof''s `-A' option triggers an annotated source listing, which lists
+the program's source code, each function labeled with the number of
+times it was called. You may also need to specify the `-I' option, if
+`gprof' can't find the source code files.
+
+ With older versions of `gcc' compiling with `gcc ... -g -pg -a'
+augments your program with basic-block counting code, in addition to
+function counting code. This enables `gprof' to determine how many
+times each line of code was executed. With newer versions of `gcc'
+support for displaying basic-block counts is provided by the `gcov'
+program.
+
+ For example, consider the following function, taken from gzip, with
+line numbers added:
+
+ 1 ulg updcrc(s, n)
+ 2 uch *s;
+ 3 unsigned n;
+ 4 {
+ 5 register ulg c;
+ 6
+ 7 static ulg crc = (ulg)0xffffffffL;
+ 8
+ 9 if (s == NULL) {
+ 10 c = 0xffffffffL;
+ 11 } else {
+ 12 c = crc;
+ 13 if (n) do {
+ 14 c = crc_32_tab[...];
+ 15 } while (--n);
+ 16 }
+ 17 crc = c;
+ 18 return c ^ 0xffffffffL;
+ 19 }
+
+ `updcrc' has at least five basic-blocks. One is the function
+itself. The `if' statement on line 9 generates two more basic-blocks,
+one for each branch of the `if'. A fourth basic-block results from the
+`if' on line 13, and the contents of the `do' loop form the fifth
+basic-block. The compiler may also generate additional basic-blocks to
+handle various special cases.
+
+ A program augmented for basic-block counting can be analyzed with
+`gprof -l -A'. The `-x' option is also helpful, to ensure that each
+line of code is labeled at least once. Here is `updcrc''s annotated
+source listing for a sample `gzip' run:
+
+ ulg updcrc(s, n)
+ uch *s;
+ unsigned n;
+ 2 ->{
+ register ulg c;
+
+ static ulg crc = (ulg)0xffffffffL;
+
+ 2 -> if (s == NULL) {
+ 1 -> c = 0xffffffffL;
+ 1 -> } else {
+ 1 -> c = crc;
+ 1 -> if (n) do {
+ 26312 -> c = crc_32_tab[...];
+ 26312,1,26311 -> } while (--n);
+ }
+ 2 -> crc = c;
+ 2 -> return c ^ 0xffffffffL;
+ 2 ->}
+
+ In this example, the function was called twice, passing once through
+each branch of the `if' statement. The body of the `do' loop was
+executed a total of 26312 times. Note how the `while' statement is
+annotated. It began execution 26312 times, once for each iteration
+through the loop. One of those times (the last time) it exited, while
+it branched back to the beginning of the loop 26311 times.
+
+
+File: gprof.info, Node: Inaccuracy, Next: How do I?, Prev: Output, Up: Top
+
+6 Inaccuracy of `gprof' Output
+******************************
+
+* Menu:
+
+* Sampling Error:: Statistical margins of error
+* Assumptions:: Estimating children times
+
+
+File: gprof.info, Node: Sampling Error, Next: Assumptions, Up: Inaccuracy
+
+6.1 Statistical Sampling Error
+==============================
+
+The run-time figures that `gprof' gives you are based on a sampling
+process, so they are subject to statistical inaccuracy. If a function
+runs only a small amount of time, so that on the average the sampling
+process ought to catch that function in the act only once, there is a
+pretty good chance it will actually find that function zero times, or
+twice.
+
+ By contrast, the number-of-calls and basic-block figures are derived
+by counting, not sampling. They are completely accurate and will not
+vary from run to run if your program is deterministic.
+
+ The "sampling period" that is printed at the beginning of the flat
+profile says how often samples are taken. The rule of thumb is that a
+run-time figure is accurate if it is considerably bigger than the
+sampling period.
+
+ The actual amount of error can be predicted. For N samples, the
+_expected_ error is the square-root of N. For example, if the sampling
+period is 0.01 seconds and `foo''s run-time is 1 second, N is 100
+samples (1 second/0.01 seconds), sqrt(N) is 10 samples, so the expected
+error in `foo''s run-time is 0.1 seconds (10*0.01 seconds), or ten
+percent of the observed value. Again, if the sampling period is 0.01
+seconds and `bar''s run-time is 100 seconds, N is 10000 samples,
+sqrt(N) is 100 samples, so the expected error in `bar''s run-time is 1
+second, or one percent of the observed value. It is likely to vary
+this much _on the average_ from one profiling run to the next.
+(_Sometimes_ it will vary more.)
+
+ This does not mean that a small run-time figure is devoid of
+information. If the program's _total_ run-time is large, a small
+run-time for one function does tell you that that function used an
+insignificant fraction of the whole program's time. Usually this means
+it is not worth optimizing.
+
+ One way to get more accuracy is to give your program more (but
+similar) input data so it will take longer. Another way is to combine
+the data from several runs, using the `-s' option of `gprof'. Here is
+how:
+
+ 1. Run your program once.
+
+ 2. Issue the command `mv gmon.out gmon.sum'.
+
+ 3. Run your program again, the same as before.
+
+ 4. Merge the new data in `gmon.out' into `gmon.sum' with this command:
+
+ gprof -s EXECUTABLE-FILE gmon.out gmon.sum
+
+ 5. Repeat the last two steps as often as you wish.
+
+ 6. Analyze the cumulative data using this command:
+
+ gprof EXECUTABLE-FILE gmon.sum > OUTPUT-FILE
+
+
+File: gprof.info, Node: Assumptions, Prev: Sampling Error, Up: Inaccuracy
+
+6.2 Estimating `children' Times
+===============================
+
+Some of the figures in the call graph are estimates--for example, the
+`children' time values and all the time figures in caller and
+subroutine lines.
+
+ There is no direct information about these measurements in the
+profile data itself. Instead, `gprof' estimates them by making an
+assumption about your program that might or might not be true.
+
+ The assumption made is that the average time spent in each call to
+any function `foo' is not correlated with who called `foo'. If `foo'
+used 5 seconds in all, and 2/5 of the calls to `foo' came from `a',
+then `foo' contributes 2 seconds to `a''s `children' time, by
+assumption.
+
+ This assumption is usually true enough, but for some programs it is
+far from true. Suppose that `foo' returns very quickly when its
+argument is zero; suppose that `a' always passes zero as an argument,
+while other callers of `foo' pass other arguments. In this program,
+all the time spent in `foo' is in the calls from callers other than `a'.
+But `gprof' has no way of knowing this; it will blindly and incorrectly
+charge 2 seconds of time in `foo' to the children of `a'.
+
+ We hope some day to put more complete data into `gmon.out', so that
+this assumption is no longer needed, if we can figure out how. For the
+novice, the estimated figures are usually more useful than misleading.
+
+
+File: gprof.info, Node: How do I?, Next: Incompatibilities, Prev: Inaccuracy, Up: Top
+
+7 Answers to Common Questions
+*****************************
+
+How can I get more exact information about hot spots in my program?
+ Looking at the per-line call counts only tells part of the story.
+ Because `gprof' can only report call times and counts by function,
+ the best way to get finer-grained information on where the program
+ is spending its time is to re-factor large functions into sequences
+ of calls to smaller ones. Beware however that this can introduce
+ artificial hot spots since compiling with `-pg' adds a significant
+ overhead to function calls. An alternative solution is to use a
+ non-intrusive profiler, e.g. oprofile.
+
+How do I find which lines in my program were executed the most times?
+ Use the `gcov' program.
+
+How do I find which lines in my program called a particular function?
+ Use `gprof -l' and lookup the function in the call graph. The
+ callers will be broken down by function and line number.
+
+How do I analyze a program that runs for less than a second?
+ Try using a shell script like this one:
+
+ for i in `seq 1 100`; do
+ fastprog
+ mv gmon.out gmon.out.$i
+ done
+
+ gprof -s fastprog gmon.out.*
+
+ gprof fastprog gmon.sum
+
+ If your program is completely deterministic, all the call counts
+ will be simple multiples of 100 (i.e., a function called once in
+ each run will appear with a call count of 100).
+
+
+
+File: gprof.info, Node: Incompatibilities, Next: Details, Prev: How do I?, Up: Top
+
+8 Incompatibilities with Unix `gprof'
+*************************************
+
+GNU `gprof' and Berkeley Unix `gprof' use the same data file
+`gmon.out', and provide essentially the same information. But there
+are a few differences.
+
+ * GNU `gprof' uses a new, generalized file format with support for
+ basic-block execution counts and non-realtime histograms. A magic
+ cookie and version number allows `gprof' to easily identify new
+ style files. Old BSD-style files can still be read. *Note
+ Profiling Data File Format: File Format.
+
+ * For a recursive function, Unix `gprof' lists the function as a
+ parent and as a child, with a `calls' field that lists the number
+ of recursive calls. GNU `gprof' omits these lines and puts the
+ number of recursive calls in the primary line.
+
+ * When a function is suppressed from the call graph with `-e', GNU
+ `gprof' still lists it as a subroutine of functions that call it.
+
+ * GNU `gprof' accepts the `-k' with its argument in the form
+ `from/to', instead of `from to'.
+
+ * In the annotated source listing, if there are multiple basic
+ blocks on the same line, GNU `gprof' prints all of their counts,
+ separated by commas.
+
+ * The blurbs, field widths, and output formats are different. GNU
+ `gprof' prints blurbs after the tables, so that you can see the
+ tables without skipping the blurbs.
+
+
+File: gprof.info, Node: Details, Next: GNU Free Documentation License, Prev: Incompatibilities, Up: Top
+
+9 Details of Profiling
+**********************
+
+* Menu:
+
+* Implementation:: How a program collects profiling information
+* File Format:: Format of `gmon.out' files
+* Internals:: `gprof''s internal operation
+* Debugging:: Using `gprof''s `-d' option
+
+
+File: gprof.info, Node: Implementation, Next: File Format, Up: Details
+
+9.1 Implementation of Profiling
+===============================
+
+Profiling works by changing how every function in your program is
+compiled so that when it is called, it will stash away some information
+about where it was called from. From this, the profiler can figure out
+what function called it, and can count how many times it was called.
+This change is made by the compiler when your program is compiled with
+the `-pg' option, which causes every function to call `mcount' (or
+`_mcount', or `__mcount', depending on the OS and compiler) as one of
+its first operations.
+
+ The `mcount' routine, included in the profiling library, is
+responsible for recording in an in-memory call graph table both its
+parent routine (the child) and its parent's parent. This is typically
+done by examining the stack frame to find both the address of the
+child, and the return address in the original parent. Since this is a
+very machine-dependent operation, `mcount' itself is typically a short
+assembly-language stub routine that extracts the required information,
+and then calls `__mcount_internal' (a normal C function) with two
+arguments--`frompc' and `selfpc'. `__mcount_internal' is responsible
+for maintaining the in-memory call graph, which records `frompc',
+`selfpc', and the number of times each of these call arcs was traversed.
+
+ GCC Version 2 provides a magical function
+(`__builtin_return_address'), which allows a generic `mcount' function
+to extract the required information from the stack frame. However, on
+some architectures, most notably the SPARC, using this builtin can be
+very computationally expensive, and an assembly language version of
+`mcount' is used for performance reasons.
+
+ Number-of-calls information for library routines is collected by
+using a special version of the C library. The programs in it are the
+same as in the usual C library, but they were compiled with `-pg'. If
+you link your program with `gcc ... -pg', it automatically uses the
+profiling version of the library.
+
+ Profiling also involves watching your program as it runs, and
+keeping a histogram of where the program counter happens to be every
+now and then. Typically the program counter is looked at around 100
+times per second of run time, but the exact frequency may vary from
+system to system.
+
+ This is done is one of two ways. Most UNIX-like operating systems
+provide a `profil()' system call, which registers a memory array with
+the kernel, along with a scale factor that determines how the program's
+address space maps into the array. Typical scaling values cause every
+2 to 8 bytes of address space to map into a single array slot. On
+every tick of the system clock (assuming the profiled program is
+running), the value of the program counter is examined and the
+corresponding slot in the memory array is incremented. Since this is
+done in the kernel, which had to interrupt the process anyway to handle
+the clock interrupt, very little additional system overhead is required.
+
+ However, some operating systems, most notably Linux 2.0 (and
+earlier), do not provide a `profil()' system call. On such a system,
+arrangements are made for the kernel to periodically deliver a signal
+to the process (typically via `setitimer()'), which then performs the
+same operation of examining the program counter and incrementing a slot
+in the memory array. Since this method requires a signal to be
+delivered to user space every time a sample is taken, it uses
+considerably more overhead than kernel-based profiling. Also, due to
+the added delay required to deliver the signal, this method is less
+accurate as well.
+
+ A special startup routine allocates memory for the histogram and
+either calls `profil()' or sets up a clock signal handler. This
+routine (`monstartup') can be invoked in several ways. On Linux
+systems, a special profiling startup file `gcrt0.o', which invokes
+`monstartup' before `main', is used instead of the default `crt0.o'.
+Use of this special startup file is one of the effects of using `gcc
+... -pg' to link. On SPARC systems, no special startup files are used.
+Rather, the `mcount' routine, when it is invoked for the first time
+(typically when `main' is called), calls `monstartup'.
+
+ If the compiler's `-a' option was used, basic-block counting is also
+enabled. Each object file is then compiled with a static array of
+counts, initially zero. In the executable code, every time a new
+basic-block begins (i.e., when an `if' statement appears), an extra
+instruction is inserted to increment the corresponding count in the
+array. At compile time, a paired array was constructed that recorded
+the starting address of each basic-block. Taken together, the two
+arrays record the starting address of every basic-block, along with the
+number of times it was executed.
+
+ The profiling library also includes a function (`mcleanup') which is
+typically registered using `atexit()' to be called as the program
+exits, and is responsible for writing the file `gmon.out'. Profiling
+is turned off, various headers are output, and the histogram is
+written, followed by the call-graph arcs and the basic-block counts.
+
+ The output from `gprof' gives no indication of parts of your program
+that are limited by I/O or swapping bandwidth. This is because samples
+of the program counter are taken at fixed intervals of the program's
+run time. Therefore, the time measurements in `gprof' output say
+nothing about time that your program was not running. For example, a
+part of the program that creates so much data that it cannot all fit in
+physical memory at once may run very slowly due to thrashing, but
+`gprof' will say it uses little time. On the other hand, sampling by
+run time has the advantage that the amount of load due to other users
+won't directly affect the output you get.
+
+
+File: gprof.info, Node: File Format, Next: Internals, Prev: Implementation, Up: Details
+
+9.2 Profiling Data File Format
+==============================
+
+The old BSD-derived file format used for profile data does not contain a
+magic cookie that allows to check whether a data file really is a
+`gprof' file. Furthermore, it does not provide a version number, thus
+rendering changes to the file format almost impossible. GNU `gprof'
+uses a new file format that provides these features. For backward
+compatibility, GNU `gprof' continues to support the old BSD-derived
+format, but not all features are supported with it. For example,
+basic-block execution counts cannot be accommodated by the old file
+format.
+
+ The new file format is defined in header file `gmon_out.h'. It
+consists of a header containing the magic cookie and a version number,
+as well as some spare bytes available for future extensions. All data
+in a profile data file is in the native format of the target for which
+the profile was collected. GNU `gprof' adapts automatically to the
+byte-order in use.
+
+ In the new file format, the header is followed by a sequence of
+records. Currently, there are three different record types: histogram
+records, call-graph arc records, and basic-block execution count
+records. Each file can contain any number of each record type. When
+reading a file, GNU `gprof' will ensure records of the same type are
+compatible with each other and compute the union of all records. For
+example, for basic-block execution counts, the union is simply the sum
+of all execution counts for each basic-block.
+
+9.2.1 Histogram Records
+-----------------------
+
+Histogram records consist of a header that is followed by an array of
+bins. The header contains the text-segment range that the histogram
+spans, the size of the histogram in bytes (unlike in the old BSD
+format, this does not include the size of the header), the rate of the
+profiling clock, and the physical dimension that the bin counts
+represent after being scaled by the profiling clock rate. The physical
+dimension is specified in two parts: a long name of up to 15 characters
+and a single character abbreviation. For example, a histogram
+representing real-time would specify the long name as "seconds" and the
+abbreviation as "s". This feature is useful for architectures that
+support performance monitor hardware (which, fortunately, is becoming
+increasingly common). For example, under DEC OSF/1, the "uprofile"
+command can be used to produce a histogram of, say, instruction cache
+misses. In this case, the dimension in the histogram header could be
+set to "i-cache misses" and the abbreviation could be set to "1"
+(because it is simply a count, not a physical dimension). Also, the
+profiling rate would have to be set to 1 in this case.
+
+ Histogram bins are 16-bit numbers and each bin represent an equal
+amount of text-space. For example, if the text-segment is one thousand
+bytes long and if there are ten bins in the histogram, each bin
+represents one hundred bytes.
+
+9.2.2 Call-Graph Records
+------------------------
+
+Call-graph records have a format that is identical to the one used in
+the BSD-derived file format. It consists of an arc in the call graph
+and a count indicating the number of times the arc was traversed during
+program execution. Arcs are specified by a pair of addresses: the
+first must be within caller's function and the second must be within
+the callee's function. When performing profiling at the function
+level, these addresses can point anywhere within the respective
+function. However, when profiling at the line-level, it is better if
+the addresses are as close to the call-site/entry-point as possible.
+This will ensure that the line-level call-graph is able to identify
+exactly which line of source code performed calls to a function.
+
+9.2.3 Basic-Block Execution Count Records
+-----------------------------------------
+
+Basic-block execution count records consist of a header followed by a
+sequence of address/count pairs. The header simply specifies the
+length of the sequence. In an address/count pair, the address
+identifies a basic-block and the count specifies the number of times
+that basic-block was executed. Any address within the basic-address can
+be used.
+
+
+File: gprof.info, Node: Internals, Next: Debugging, Prev: File Format, Up: Details
+
+9.3 `gprof''s Internal Operation
+================================
+
+Like most programs, `gprof' begins by processing its options. During
+this stage, it may building its symspec list (`sym_ids.c:sym_id_add'),
+if options are specified which use symspecs. `gprof' maintains a
+single linked list of symspecs, which will eventually get turned into
+12 symbol tables, organized into six include/exclude pairs--one pair
+each for the flat profile (INCL_FLAT/EXCL_FLAT), the call graph arcs
+(INCL_ARCS/EXCL_ARCS), printing in the call graph
+(INCL_GRAPH/EXCL_GRAPH), timing propagation in the call graph
+(INCL_TIME/EXCL_TIME), the annotated source listing
+(INCL_ANNO/EXCL_ANNO), and the execution count listing
+(INCL_EXEC/EXCL_EXEC).
+
+ After option processing, `gprof' finishes building the symspec list
+by adding all the symspecs in `default_excluded_list' to the exclude
+lists EXCL_TIME and EXCL_GRAPH, and if line-by-line profiling is
+specified, EXCL_FLAT as well. These default excludes are not added to
+EXCL_ANNO, EXCL_ARCS, and EXCL_EXEC.
+
+ Next, the BFD library is called to open the object file, verify that
+it is an object file, and read its symbol table (`core.c:core_init'),
+using `bfd_canonicalize_symtab' after mallocing an appropriately sized
+array of symbols. At this point, function mappings are read (if the
+`--file-ordering' option has been specified), and the core text space
+is read into memory (if the `-c' option was given).
+
+ `gprof''s own symbol table, an array of Sym structures, is now built.
+This is done in one of two ways, by one of two routines, depending on
+whether line-by-line profiling (`-l' option) has been enabled. For
+normal profiling, the BFD canonical symbol table is scanned. For
+line-by-line profiling, every text space address is examined, and a new
+symbol table entry gets created every time the line number changes. In
+either case, two passes are made through the symbol table--one to count
+the size of the symbol table required, and the other to actually read
+the symbols. In between the two passes, a single array of type `Sym'
+is created of the appropriate length. Finally,
+`symtab.c:symtab_finalize' is called to sort the symbol table and
+remove duplicate entries (entries with the same memory address).
+
+ The symbol table must be a contiguous array for two reasons. First,
+the `qsort' library function (which sorts an array) will be used to
+sort the symbol table. Also, the symbol lookup routine
+(`symtab.c:sym_lookup'), which finds symbols based on memory address,
+uses a binary search algorithm which requires the symbol table to be a
+sorted array. Function symbols are indicated with an `is_func' flag.
+Line number symbols have no special flags set. Additionally, a symbol
+can have an `is_static' flag to indicate that it is a local symbol.
+
+ With the symbol table read, the symspecs can now be translated into
+Syms (`sym_ids.c:sym_id_parse'). Remember that a single symspec can
+match multiple symbols. An array of symbol tables (`syms') is created,
+each entry of which is a symbol table of Syms to be included or
+excluded from a particular listing. The master symbol table and the
+symspecs are examined by nested loops, and every symbol that matches a
+symspec is inserted into the appropriate syms table. This is done
+twice, once to count the size of each required symbol table, and again
+to build the tables, which have been malloced between passes. From now
+on, to determine whether a symbol is on an include or exclude symspec
+list, `gprof' simply uses its standard symbol lookup routine on the
+appropriate table in the `syms' array.
+
+ Now the profile data file(s) themselves are read
+(`gmon_io.c:gmon_out_read'), first by checking for a new-style
+`gmon.out' header, then assuming this is an old-style BSD `gmon.out' if
+the magic number test failed.
+
+ New-style histogram records are read by `hist.c:hist_read_rec'. For
+the first histogram record, allocate a memory array to hold all the
+bins, and read them in. When multiple profile data files (or files
+with multiple histogram records) are read, the memory ranges of each
+pair of histogram records must be either equal, or non-overlapping.
+For each pair of histogram records, the resolution (memory region size
+divided by the number of bins) must be the same. The time unit must be
+the same for all histogram records. If the above containts are met, all
+histograms for the same memory range are merged.
+
+ As each call graph record is read (`call_graph.c:cg_read_rec'), the
+parent and child addresses are matched to symbol table entries, and a
+call graph arc is created by `cg_arcs.c:arc_add', unless the arc fails
+a symspec check against INCL_ARCS/EXCL_ARCS. As each arc is added, a
+linked list is maintained of the parent's child arcs, and of the child's
+parent arcs. Both the child's call count and the arc's call count are
+incremented by the record's call count.
+
+ Basic-block records are read (`basic_blocks.c:bb_read_rec'), but
+only if line-by-line profiling has been selected. Each basic-block
+address is matched to a corresponding line symbol in the symbol table,
+and an entry made in the symbol's bb_addr and bb_calls arrays. Again,
+if multiple basic-block records are present for the same address, the
+call counts are cumulative.
+
+ A gmon.sum file is dumped, if requested (`gmon_io.c:gmon_out_write').
+
+ If histograms were present in the data files, assign them to symbols
+(`hist.c:hist_assign_samples') by iterating over all the sample bins
+and assigning them to symbols. Since the symbol table is sorted in
+order of ascending memory addresses, we can simple follow along in the
+symbol table as we make our pass over the sample bins. This step
+includes a symspec check against INCL_FLAT/EXCL_FLAT. Depending on the
+histogram scale factor, a sample bin may span multiple symbols, in
+which case a fraction of the sample count is allocated to each symbol,
+proportional to the degree of overlap. This effect is rare for normal
+profiling, but overlaps are more common during line-by-line profiling,
+and can cause each of two adjacent lines to be credited with half a
+hit, for example.
+
+ If call graph data is present, `cg_arcs.c:cg_assemble' is called.
+First, if `-c' was specified, a machine-dependent routine (`find_call')
+scans through each symbol's machine code, looking for subroutine call
+instructions, and adding them to the call graph with a zero call count.
+A topological sort is performed by depth-first numbering all the
+symbols (`cg_dfn.c:cg_dfn'), so that children are always numbered less
+than their parents, then making a array of pointers into the symbol
+table and sorting it into numerical order, which is reverse topological
+order (children appear before parents). Cycles are also detected at
+this point, all members of which are assigned the same topological
+number. Two passes are now made through this sorted array of symbol
+pointers. The first pass, from end to beginning (parents to children),
+computes the fraction of child time to propagate to each parent and a
+print flag. The print flag reflects symspec handling of
+INCL_GRAPH/EXCL_GRAPH, with a parent's include or exclude (print or no
+print) property being propagated to its children, unless they
+themselves explicitly appear in INCL_GRAPH or EXCL_GRAPH. A second
+pass, from beginning to end (children to parents) actually propagates
+the timings along the call graph, subject to a check against
+INCL_TIME/EXCL_TIME. With the print flag, fractions, and timings now
+stored in the symbol structures, the topological sort array is now
+discarded, and a new array of pointers is assembled, this time sorted
+by propagated time.
+
+ Finally, print the various outputs the user requested, which is now
+fairly straightforward. The call graph (`cg_print.c:cg_print') and
+flat profile (`hist.c:hist_print') are regurgitations of values already
+computed. The annotated source listing
+(`basic_blocks.c:print_annotated_source') uses basic-block information,
+if present, to label each line of code with call counts, otherwise only
+the function call counts are presented.
+
+ The function ordering code is marginally well documented in the
+source code itself (`cg_print.c'). Basically, the functions with the
+most use and the most parents are placed first, followed by other
+functions with the most use, followed by lower use functions, followed
+by unused functions at the end.
+
+
+File: gprof.info, Node: Debugging, Prev: Internals, Up: Details
+
+9.4 Debugging `gprof'
+=====================
+
+If `gprof' was compiled with debugging enabled, the `-d' option
+triggers debugging output (to stdout) which can be helpful in
+understanding its operation. The debugging number specified is
+interpreted as a sum of the following options:
+
+2 - Topological sort
+ Monitor depth-first numbering of symbols during call graph analysis
+
+4 - Cycles
+ Shows symbols as they are identified as cycle heads
+
+16 - Tallying
+ As the call graph arcs are read, show each arc and how the total
+ calls to each function are tallied
+
+32 - Call graph arc sorting
+ Details sorting individual parents/children within each call graph
+ entry
+
+64 - Reading histogram and call graph records
+ Shows address ranges of histograms as they are read, and each call
+ graph arc
+
+128 - Symbol table
+ Reading, classifying, and sorting the symbol table from the object
+ file. For line-by-line profiling (`-l' option), also shows line
+ numbers being assigned to memory addresses.
+
+256 - Static call graph
+ Trace operation of `-c' option
+
+512 - Symbol table and arc table lookups
+ Detail operation of lookup routines
+
+1024 - Call graph propagation
+ Shows how function times are propagated along the call graph
+
+2048 - Basic-blocks
+ Shows basic-block records as they are read from profile data (only
+ meaningful with `-l' option)
+
+4096 - Symspecs
+ Shows symspec-to-symbol pattern matching operation
+
+8192 - Annotate source
+ Tracks operation of `-A' option
+
+
+File: gprof.info, Node: GNU Free Documentation License, Prev: Details, Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+ Version 1.3, 3 November 2008
+
+ Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+ `http://fsf.org/'
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ 0. PREAMBLE
+
+ The purpose of this License is to make a manual, textbook, or other
+ functional and useful document "free" in the sense of freedom: to
+ assure everyone the effective freedom to copy and redistribute it,
+ with or without modifying it, either commercially or
+ noncommercially. Secondarily, this License preserves for the
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+ being considered responsible for modifications made by others.
+
+ This License is a kind of "copyleft", which means that derivative
+ works of the document must themselves be free in the same sense.
+ It complements the GNU General Public License, which is a copyleft
+ license designed for free software.
+
+ We have designed this License in order to use it for manuals for
+ free software, because free software needs free documentation: a
+ free program should come with manuals providing the same freedoms
+ that the software does. But this License is not limited to
+ software manuals; it can be used for any textual work, regardless
+ of subject matter or whether it is published as a printed book.
+ We recommend this License principally for works whose purpose is
+ instruction or reference.
+
+ 1. APPLICABILITY AND DEFINITIONS
+
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+Tag Table:
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+End Tag Table
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@@ -0,0 +1,273 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "ADDR2LINE 1"
+.TH ADDR2LINE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+addr2line \- convert addresses into file names and line numbers.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+addr2line [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]]
+ [\fB\-e\fR \fIfilename\fR|\fB\-\-exe=\fR\fIfilename\fR]
+ [\fB\-f\fR|\fB\-\-functions\fR] [\fB\-s\fR|\fB\-\-basename\fR]
+ [\fB\-i\fR|\fB\-\-inlines\fR]
+ [\fB\-j\fR|\fB\-\-section=\fR\fIname\fR]
+ [\fB\-H\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [addr addr ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBaddr2line\fR translates addresses into file names and line numbers.
+Given an address in an executable or an offset in a section of a relocatable
+object, it uses the debugging information to figure out which file name and
+line number are associated with it.
+.PP
+The executable or relocatable object to use is specified with the \fB\-e\fR
+option. The default is the file \fIa.out\fR. The section in the relocatable
+object to use is specified with the \fB\-j\fR option.
+.PP
+\&\fBaddr2line\fR has two modes of operation.
+.PP
+In the first, hexadecimal addresses are specified on the command line,
+and \fBaddr2line\fR displays the file name and line number for each
+address.
+.PP
+In the second, \fBaddr2line\fR reads hexadecimal addresses from
+standard input, and prints the file name and line number for each
+address on standard output. In this mode, \fBaddr2line\fR may be used
+in a pipe to convert dynamically chosen addresses.
+.PP
+The format of the output is \fB\s-1FILENAME:LINENO\s0\fR. The file name and
+line number for each address is printed on a separate line. If the
+\&\fB\-f\fR option is used, then each \fB\s-1FILENAME:LINENO\s0\fR line is
+preceded by a \fB\s-1FUNCTIONNAME\s0\fR line which is the name of the function
+containing the address.
+.PP
+If the file name or function name can not be determined,
+\&\fBaddr2line\fR will print two question marks in their place. If the
+line number can not be determined, \fBaddr2line\fR will print 0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-exe=\fR\fIfilename\fR" 4
+.IX Item "--exe=filename"
+.PD
+Specify the name of the executable for which addresses should be
+translated. The default file is \fIa.out\fR.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-functions\fR" 4
+.IX Item "--functions"
+.PD
+Display function names as well as file and line number information.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-basenames\fR" 4
+.IX Item "--basenames"
+.PD
+Display only the base of each file name.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-inlines\fR" 4
+.IX Item "--inlines"
+.PD
+If the address belongs to a function that was inlined, the source
+information for all enclosing scopes back to the first non-inlined
+function will also be printed. For example, if \f(CW\*(C`main\*(C'\fR inlines
+\&\f(CW\*(C`callee1\*(C'\fR which inlines \f(CW\*(C`callee2\*(C'\fR, and address is from
+\&\f(CW\*(C`callee2\*(C'\fR, the source information for \f(CW\*(C`callee1\*(C'\fR and \f(CW\*(C`main\*(C'\fR
+will also be printed.
+.IP "\fB\-j\fR" 4
+.IX Item "-j"
+.PD 0
+.IP "\fB\-\-section\fR" 4
+.IX Item "--section"
+.PD
+Read offsets relative to the specified section instead of absolute addresses.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1
new file mode 100644
index 0000000..9fa94e1
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1
@@ -0,0 +1,429 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AR 1"
+.TH AR 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ar \- create, modify, and extract from archives
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ar [\fB\-\-plugin\fR \fIname\fR] [\fB\-X32_64\fR] [\fB\-\fR]\fIp\fR[\fImod\fR [\fIrelpos\fR] [\fIcount\fR]] \fIarchive\fR [\fImember\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBar\fR program creates, modifies, and extracts from
+archives. An \fIarchive\fR is a single file holding a collection of
+other files in a structure that makes it possible to retrieve
+the original individual files (called \fImembers\fR of the archive).
+.PP
+The original files' contents, mode (permissions), timestamp, owner, and
+group are preserved in the archive, and can be restored on
+extraction.
+.PP
+\&\s-1GNU\s0 \fBar\fR can maintain archives whose members have names of any
+length; however, depending on how \fBar\fR is configured on your
+system, a limit on member-name length may be imposed for compatibility
+with archive formats maintained with other tools. If it exists, the
+limit is often 15 characters (typical of formats related to a.out) or 16
+characters (typical of formats related to coff).
+.PP
+\&\fBar\fR is considered a binary utility because archives of this sort
+are most often used as \fIlibraries\fR holding commonly needed
+subroutines.
+.PP
+\&\fBar\fR creates an index to the symbols defined in relocatable
+object modules in the archive when you specify the modifier \fBs\fR.
+Once created, this index is updated in the archive whenever \fBar\fR
+makes a change to its contents (save for the \fBq\fR update operation).
+An archive with such an index speeds up linking to the library, and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index
+table. If an archive lacks the table, another form of \fBar\fR called
+\&\fBranlib\fR can be used to add just the table.
+.PP
+\&\s-1GNU\s0 \fBar\fR can optionally create a \fIthin\fR archive,
+which contains a symbol index and references to the original copies
+of the member files of the archives. Such an archive is useful
+for building libraries for use within a local build, where the
+relocatable objects are expected to remain available, and copying the
+contents of each object would only waste time and space. Thin archives
+are also \fIflattened\fR, so that adding one or more archives to a
+thin archive will add the elements of the nested archive individually.
+The paths to the elements of the archive are stored relative to the
+archive itself.
+.PP
+\&\s-1GNU\s0 \fBar\fR is designed to be compatible with two different
+facilities. You can control its activity using command-line options,
+like the different varieties of \fBar\fR on Unix systems; or, if you
+specify the single command-line option \fB\-M\fR, you can control it
+with a script supplied via standard input, like the \s-1MRI\s0 \*(L"librarian\*(R"
+program.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+\&\s-1GNU\s0 \fBar\fR allows you to mix the operation code \fIp\fR and modifier
+flags \fImod\fR in any order, within the first command-line argument.
+.PP
+If you wish, you may begin the first command-line argument with a
+dash.
+.PP
+The \fIp\fR keyletter specifies what operation to execute; it may be
+any of the following, but you must specify only one of them:
+.IP "\fBd\fR" 4
+.IX Item "d"
+\&\fIDelete\fR modules from the archive. Specify the names of modules to
+be deleted as \fImember\fR...; the archive is untouched if you
+specify no files to delete.
+.Sp
+If you specify the \fBv\fR modifier, \fBar\fR lists each module
+as it is deleted.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Use this operation to \fImove\fR members in an archive.
+.Sp
+The ordering of members in an archive can make a difference in how
+programs are linked using the library, if a symbol is defined in more
+than one member.
+.Sp
+If no modifiers are used with \f(CW\*(C`m\*(C'\fR, any members you name in the
+\&\fImember\fR arguments are moved to the \fIend\fR of the archive;
+you can use the \fBa\fR, \fBb\fR, or \fBi\fR modifiers to move them to a
+specified place instead.
+.IP "\fBp\fR" 4
+.IX Item "p"
+\&\fIPrint\fR the specified members of the archive, to the standard
+output file. If the \fBv\fR modifier is specified, show the member
+name before copying its contents to standard output.
+.Sp
+If you specify no \fImember\fR arguments, all the files in the archive are
+printed.
+.IP "\fBq\fR" 4
+.IX Item "q"
+\&\fIQuick append\fR; Historically, add the files \fImember\fR... to the end of
+\&\fIarchive\fR, without checking for replacement.
+.Sp
+The modifiers \fBa\fR, \fBb\fR, and \fBi\fR do \fInot\fR affect this
+operation; new members are always placed at the end of the archive.
+.Sp
+The modifier \fBv\fR makes \fBar\fR list each file as it is appended.
+.Sp
+Since the point of this operation is speed, the archive's symbol table
+index is not updated, even if it already existed; you can use \fBar s\fR or
+\&\fBranlib\fR explicitly to update the symbol table index.
+.Sp
+However, too many different systems assume quick append rebuilds the
+index, so \s-1GNU\s0 \fBar\fR implements \fBq\fR as a synonym for \fBr\fR.
+.IP "\fBr\fR" 4
+.IX Item "r"
+Insert the files \fImember\fR... into \fIarchive\fR (with
+\&\fIreplacement\fR). This operation differs from \fBq\fR in that any
+previously existing members are deleted if their names match those being
+added.
+.Sp
+If one of the files named in \fImember\fR... does not exist, \fBar\fR
+displays an error message, and leaves undisturbed any existing members
+of the archive matching that name.
+.Sp
+By default, new members are added at the end of the file; but you may
+use one of the modifiers \fBa\fR, \fBb\fR, or \fBi\fR to request
+placement relative to some existing member.
+.Sp
+The modifier \fBv\fR used with this operation elicits a line of
+output for each file inserted, along with one of the letters \fBa\fR or
+\&\fBr\fR to indicate whether the file was appended (no old member
+deleted) or replaced.
+.IP "\fBt\fR" 4
+.IX Item "t"
+Display a \fItable\fR listing the contents of \fIarchive\fR, or those
+of the files listed in \fImember\fR... that are present in the
+archive. Normally only the member name is shown; if you also want to
+see the modes (permissions), timestamp, owner, group, and size, you can
+request that by also specifying the \fBv\fR modifier.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are listed.
+.Sp
+If there is more than one file with the same name (say, \fBfie\fR) in
+an archive (say \fBb.a\fR), \fBar t b.a fie\fR lists only the
+first instance; to see them all, you must ask for a complete
+listing\-\-\-in our example, \fBar t b.a\fR.
+.IP "\fBx\fR" 4
+.IX Item "x"
+\&\fIExtract\fR members (named \fImember\fR) from the archive. You can
+use the \fBv\fR modifier with this operation, to request that
+\&\fBar\fR list each name as it extracts it.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are extracted.
+.Sp
+Files cannot be extracted from a thin archive.
+.PP
+A number of modifiers (\fImod\fR) may immediately follow the \fIp\fR
+keyletter, to specify variations on an operation's behavior:
+.IP "\fBa\fR" 4
+.IX Item "a"
+Add new files \fIafter\fR an existing member of the
+archive. If you use the modifier \fBa\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification.
+.IP "\fBb\fR" 4
+.IX Item "b"
+Add new files \fIbefore\fR an existing member of the
+archive. If you use the modifier \fBb\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification. (same as \fBi\fR).
+.IP "\fBc\fR" 4
+.IX Item "c"
+\&\fICreate\fR the archive. The specified \fIarchive\fR is always
+created if it did not exist, when you request an update. But a warning is
+issued unless you specify in advance that you expect to create it, by
+using this modifier.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Operate in \fIdeterministic\fR mode. When adding files and the archive
+index use zero for UIDs, GIDs, timestamps, and use consistent file modes
+for all files. When this option is used, if \fBar\fR is used with
+identical options and identical input files, multiple runs will create
+identical output files regardless of the input files' owners, groups,
+file modes, or modification times.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Truncate names in the archive. \s-1GNU\s0 \fBar\fR will normally permit file
+names of any length. This will cause it to create archives which are
+not compatible with the native \fBar\fR program on some systems. If
+this is a concern, the \fBf\fR modifier may be used to truncate file
+names when putting them in the archive.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Insert new files \fIbefore\fR an existing member of the
+archive. If you use the modifier \fBi\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification. (same as \fBb\fR).
+.IP "\fBl\fR" 4
+.IX Item "l"
+This modifier is accepted but not used.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Uses the \fIcount\fR parameter. This is used if there are multiple
+entries in the archive with the same name. Extract or delete instance
+\&\fIcount\fR of the given name from the archive.
+.IP "\fBo\fR" 4
+.IX Item "o"
+Preserve the \fIoriginal\fR dates of members when extracting them. If
+you do not specify this modifier, files extracted from the archive
+are stamped with the time of extraction.
+.IP "\fBP\fR" 4
+.IX Item "P"
+Use the full path name when matching names in the archive. \s-1GNU\s0
+\&\fBar\fR can not create an archive with a full path name (such archives
+are not \s-1POSIX\s0 complaint), but other archive creators can. This option
+will cause \s-1GNU\s0 \fBar\fR to match file names using a complete path
+name, which can be convenient when extracting a single file from an
+archive created by another tool.
+.IP "\fBs\fR" 4
+.IX Item "s"
+Write an object-file index into the archive, or update an existing one,
+even if no other change is made to the archive. You may use this modifier
+flag either with any operation, or alone. Running \fBar s\fR on an
+archive is equivalent to running \fBranlib\fR on it.
+.IP "\fBS\fR" 4
+.IX Item "S"
+Do not generate an archive symbol table. This can speed up building a
+large library in several steps. The resulting archive can not be used
+with the linker. In order to build a symbol table, you must omit the
+\&\fBS\fR modifier on the last execution of \fBar\fR, or you must run
+\&\fBranlib\fR on the archive.
+.IP "\fBT\fR" 4
+.IX Item "T"
+Make the specified \fIarchive\fR a \fIthin\fR archive. If it already
+exists and is a regular archive, the existing members must be present
+in the same directory as \fIarchive\fR.
+.IP "\fBu\fR" 4
+.IX Item "u"
+Normally, \fBar r\fR... inserts all files
+listed into the archive. If you would like to insert \fIonly\fR those
+of the files you list that are newer than existing members of the same
+names, use this modifier. The \fBu\fR modifier is allowed only for the
+operation \fBr\fR (replace). In particular, the combination \fBqu\fR is
+not allowed, since checking the timestamps would lose any speed
+advantage from the operation \fBq\fR.
+.IP "\fBv\fR" 4
+.IX Item "v"
+This modifier requests the \fIverbose\fR version of an operation. Many
+operations display additional information, such as filenames processed,
+when the modifier \fBv\fR is appended.
+.IP "\fBV\fR" 4
+.IX Item "V"
+This modifier shows the version number of \fBar\fR.
+.PP
+\&\fBar\fR ignores an initial option spelt \fB\-X32_64\fR, for
+compatibility with \s-1AIX\s0. The behaviour produced by this option is the
+default for \s-1GNU\s0 \fBar\fR. \fBar\fR does not support any of the other
+\&\fB\-X\fR options; in particular, it does not support \fB\-X32\fR
+which is the default for \s-1AIX\s0 \fBar\fR.
+.PP
+The optional command line switch \fB\-\-plugin\fR \fIname\fR causes
+\&\fBar\fR to load the plugin called \fIname\fR which adds support
+for more file formats. This option is only available if the toolchain
+has been built with plugin support enabled.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1
new file mode 100644
index 0000000..d3c1b6f
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1
@@ -0,0 +1,1200 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. | will give a
+.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AS 1"
+.TH AS 1 "2011-03-23" "binutils-2.20.1" "GNU Development Tools"
+.SH "NAME"
+AS \- the portable GNU assembler.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+as [\fB\-a\fR[\fBcdghlns\fR][=\fIfile\fR]] [\fB\-\-alternate\fR] [\fB\-D\fR]
+ [\fB\-\-debug\-prefix\-map\fR \fIold\fR=\fInew\fR]
+ [\fB\-\-defsym\fR \fIsym\fR=\fIval\fR] [\fB\-f\fR] [\fB\-g\fR] [\fB\-\-gstabs\fR]
+ [\fB\-\-gstabs+\fR] [\fB\-\-gdwarf\-2\fR] [\fB\-\-help\fR] [\fB\-I\fR \fIdir\fR] [\fB\-J\fR]
+ [\fB\-K\fR] [\fB\-L\fR] [\fB\-\-listing\-lhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-lhs\-width2\fR=\fI\s-1NUM\s0\fR] [\fB\-\-listing\-rhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-cont\-lines\fR=\fI\s-1NUM\s0\fR] [\fB\-\-keep\-locals\fR] [\fB\-o\fR
+ \fIobjfile\fR] [\fB\-R\fR] [\fB\-\-reduce\-memory\-overheads\fR] [\fB\-\-statistics\fR]
+ [\fB\-v\fR] [\fB\-version\fR] [\fB\-\-version\fR] [\fB\-W\fR] [\fB\-\-warn\fR]
+ [\fB\-\-fatal\-warnings\fR] [\fB\-w\fR] [\fB\-x\fR] [\fB\-Z\fR] [\fB@\fR\fI\s-1FILE\s0\fR]
+ [\fB\-\-target\-help\fR] [\fItarget-options\fR]
+ [\fB\-\-\fR|\fIfiles\fR ...]
+.PP
+\&\fITarget Alpha options:\fR
+ [\fB\-m\fR\fIcpu\fR]
+ [\fB\-mdebug\fR | \fB\-no\-mdebug\fR]
+ [\fB\-replace\fR | \fB\-noreplace\fR]
+ [\fB\-relax\fR] [\fB\-g\fR] [\fB\-G\fR\fIsize\fR]
+ [\fB\-F\fR] [\fB\-32addr\fR]
+.PP
+\&\fITarget \s-1ARC\s0 options:\fR
+ [\fB\-marc[5|6|7|8]\fR]
+ [\fB\-EB\fR|\fB\-EL\fR]
+.PP
+\&\fITarget \s-1ARM\s0 options:\fR
+ [\fB\-mcpu\fR=\fIprocessor\fR[+\fIextension\fR...]]
+ [\fB\-march\fR=\fIarchitecture\fR[+\fIextension\fR...]]
+ [\fB\-mfpu\fR=\fIfloating-point-format\fR]
+ [\fB\-mfloat\-abi\fR=\fIabi\fR]
+ [\fB\-meabi\fR=\fIver\fR]
+ [\fB\-mthumb\fR]
+ [\fB\-EB\fR|\fB\-EL\fR]
+ [\fB\-mapcs\-32\fR|\fB\-mapcs\-26\fR|\fB\-mapcs\-float\fR|
+ \fB\-mapcs\-reentrant\fR]
+ [\fB\-mthumb\-interwork\fR] [\fB\-k\fR]
+.PP
+\&\fITarget \s-1CRIS\s0 options:\fR
+ [\fB\-\-underscore\fR | \fB\-\-no\-underscore\fR]
+ [\fB\-\-pic\fR] [\fB\-N\fR]
+ [\fB\-\-emulation=criself\fR | \fB\-\-emulation=crisaout\fR]
+ [\fB\-\-march=v0_v10\fR | \fB\-\-march=v10\fR | \fB\-\-march=v32\fR | \fB\-\-march=common_v10_v32\fR]
+.PP
+\&\fITarget D10V options:\fR
+ [\fB\-O\fR]
+.PP
+\&\fITarget D30V options:\fR
+ [\fB\-O\fR|\fB\-n\fR|\fB\-N\fR]
+.PP
+\&\fITarget H8/300 options:\fR
+ [\-h\-tick\-hex]
+.PP
+\&\fITarget i386 options:\fR
+ [\fB\-\-32\fR|\fB\-\-64\fR] [\fB\-n\fR]
+ [\fB\-march\fR=\fI\s-1CPU\s0\fR[+\fI\s-1EXTENSION\s0\fR...]] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR]
+.PP
+\&\fITarget i960 options:\fR
+ [\fB\-ACA\fR|\fB\-ACA_A\fR|\fB\-ACB\fR|\fB\-ACC\fR|\fB\-AKA\fR|\fB\-AKB\fR|
+ \fB\-AKC\fR|\fB\-AMC\fR]
+ [\fB\-b\fR] [\fB\-no\-relax\fR]
+.PP
+\&\fITarget \s-1IA\-64\s0 options:\fR
+ [\fB\-mconstant\-gp\fR|\fB\-mauto\-pic\fR]
+ [\fB\-milp32\fR|\fB\-milp64\fR|\fB\-mlp64\fR|\fB\-mp64\fR]
+ [\fB\-mle\fR|\fBmbe\fR]
+ [\fB\-mtune=itanium1\fR|\fB\-mtune=itanium2\fR]
+ [\fB\-munwind\-check=warning\fR|\fB\-munwind\-check=error\fR]
+ [\fB\-mhint.b=ok\fR|\fB\-mhint.b=warning\fR|\fB\-mhint.b=error\fR]
+ [\fB\-x\fR|\fB\-xexplicit\fR] [\fB\-xauto\fR] [\fB\-xdebug\fR]
+.PP
+\&\fITarget \s-1IP2K\s0 options:\fR
+ [\fB\-mip2022\fR|\fB\-mip2022ext\fR]
+.PP
+\&\fITarget M32C options:\fR
+ [\fB\-m32c\fR|\fB\-m16c\fR] [\-relax] [\-h\-tick\-hex]
+.PP
+\&\fITarget M32R options:\fR
+ [\fB\-\-m32rx\fR|\fB\-\-[no\-]warn\-explicit\-parallel\-conflicts\fR|
+ \fB\-\-W[n]p\fR]
+.PP
+\&\fITarget M680X0 options:\fR
+ [\fB\-l\fR] [\fB\-m68000\fR|\fB\-m68010\fR|\fB\-m68020\fR|...]
+.PP
+\&\fITarget M68HC11 options:\fR
+ [\fB\-m68hc11\fR|\fB\-m68hc12\fR|\fB\-m68hcs12\fR]
+ [\fB\-mshort\fR|\fB\-mlong\fR]
+ [\fB\-mshort\-double\fR|\fB\-mlong\-double\fR]
+ [\fB\-\-force\-long\-branches\fR] [\fB\-\-short\-branches\fR]
+ [\fB\-\-strict\-direct\-mode\fR] [\fB\-\-print\-insn\-syntax\fR]
+ [\fB\-\-print\-opcodes\fR] [\fB\-\-generate\-example\fR]
+.PP
+\&\fITarget \s-1MCORE\s0 options:\fR
+ [\fB\-jsri2bsr\fR] [\fB\-sifilter\fR] [\fB\-relax\fR]
+ [\fB\-mcpu=[210|340]\fR]
+\&\fITarget \s-1MICROBLAZE\s0 options:\fR
+.PP
+\&\fITarget \s-1MIPS\s0 options:\fR
+ [\fB\-nocpp\fR] [\fB\-EL\fR] [\fB\-EB\fR] [\fB\-O\fR[\fIoptimization level\fR]]
+ [\fB\-g\fR[\fIdebug level\fR]] [\fB\-G\fR \fInum\fR] [\fB\-KPIC\fR] [\fB\-call_shared\fR]
+ [\fB\-non_shared\fR] [\fB\-xgot\fR [\fB\-mvxworks\-pic\fR]
+ [\fB\-mabi\fR=\fI\s-1ABI\s0\fR] [\fB\-32\fR] [\fB\-n32\fR] [\fB\-64\fR] [\fB\-mfp32\fR] [\fB\-mgp32\fR]
+ [\fB\-march\fR=\fI\s-1CPU\s0\fR] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR] [\fB\-mips1\fR] [\fB\-mips2\fR]
+ [\fB\-mips3\fR] [\fB\-mips4\fR] [\fB\-mips5\fR] [\fB\-mips32\fR] [\fB\-mips32r2\fR]
+ [\fB\-mips64\fR] [\fB\-mips64r2\fR]
+ [\fB\-construct\-floats\fR] [\fB\-no\-construct\-floats\fR]
+ [\fB\-trap\fR] [\fB\-no\-break\fR] [\fB\-break\fR] [\fB\-no\-trap\fR]
+ [\fB\-mfix7000\fR] [\fB\-mno\-fix7000\fR]
+ [\fB\-mips16\fR] [\fB\-no\-mips16\fR]
+ [\fB\-msmartmips\fR] [\fB\-mno\-smartmips\fR]
+ [\fB\-mips3d\fR] [\fB\-no\-mips3d\fR]
+ [\fB\-mdmx\fR] [\fB\-no\-mdmx\fR]
+ [\fB\-mdsp\fR] [\fB\-mno\-dsp\fR]
+ [\fB\-mdspr2\fR] [\fB\-mno\-dspr2\fR]
+ [\fB\-mmt\fR] [\fB\-mno\-mt\fR]
+ [\fB\-mdebug\fR] [\fB\-no\-mdebug\fR]
+ [\fB\-mpdr\fR] [\fB\-mno\-pdr\fR]
+.PP
+\&\fITarget \s-1MMIX\s0 options:\fR
+ [\fB\-\-fixed\-special\-register\-names\fR] [\fB\-\-globalize\-symbols\fR]
+ [\fB\-\-gnu\-syntax\fR] [\fB\-\-relax\fR] [\fB\-\-no\-predefined\-symbols\fR]
+ [\fB\-\-no\-expand\fR] [\fB\-\-no\-merge\-gregs\fR] [\fB\-x\fR]
+ [\fB\-\-linker\-allocated\-gregs\fR]
+.PP
+\&\fITarget \s-1PDP11\s0 options:\fR
+ [\fB\-mpic\fR|\fB\-mno\-pic\fR] [\fB\-mall\fR] [\fB\-mno\-extensions\fR]
+ [\fB\-m\fR\fIextension\fR|\fB\-mno\-\fR\fIextension\fR]
+ [\fB\-m\fR\fIcpu\fR] [\fB\-m\fR\fImachine\fR]
+.PP
+\&\fITarget picoJava options:\fR
+ [\fB\-mb\fR|\fB\-me\fR]
+.PP
+\&\fITarget PowerPC options:\fR
+ [\fB\-mpwrx\fR|\fB\-mpwr2\fR|\fB\-mpwr\fR|\fB\-m601\fR|\fB\-mppc\fR|\fB\-mppc32\fR|\fB\-m603\fR|\fB\-m604\fR|
+ \fB\-m403\fR|\fB\-m405\fR|\fB\-mppc64\fR|\fB\-m620\fR|\fB\-mppc64bridge\fR|\fB\-mbooke\fR]
+ [\fB\-mcom\fR|\fB\-many\fR|\fB\-maltivec\fR|\fB\-mvsx\fR] [\fB\-memb\fR]
+ [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+ [\fB\-mrelocatable\fR|\fB\-mrelocatable\-lib\fR]
+ [\fB\-mlittle\fR|\fB\-mlittle\-endian\fR|\fB\-mbig\fR|\fB\-mbig\-endian\fR]
+ [\fB\-msolaris\fR|\fB\-mno\-solaris\fR]
+.PP
+\&\fITarget s390 options:\fR
+ [\fB\-m31\fR|\fB\-m64\fR] [\fB\-mesa\fR|\fB\-mzarch\fR] [\fB\-march\fR=\fI\s-1CPU\s0\fR]
+ [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+ [\fB\-mwarn\-areg\-zero\fR]
+.PP
+\&\fITarget \s-1SCORE\s0 options:\fR
+ [\fB\-EB\fR][\fB\-EL\fR][\fB\-FIXDD\fR][\fB\-NWARN\fR]
+ [\fB\-SCORE5\fR][\fB\-SCORE5U\fR][\fB\-SCORE7\fR][\fB\-SCORE3\fR]
+ [\fB\-march=score7\fR][\fB\-march=score3\fR]
+ [\fB\-USE_R1\fR][\fB\-KPIC\fR][\fB\-O0\fR][\fB\-G\fR \fInum\fR][\fB\-V\fR]
+.PP
+\&\fITarget \s-1SPARC\s0 options:\fR
+ [\fB\-Av6\fR|\fB\-Av7\fR|\fB\-Av8\fR|\fB\-Asparclet\fR|\fB\-Asparclite\fR
+ \fB\-Av8plus\fR|\fB\-Av8plusa\fR|\fB\-Av9\fR|\fB\-Av9a\fR]
+ [\fB\-xarch=v8plus\fR|\fB\-xarch=v8plusa\fR] [\fB\-bump\fR]
+ [\fB\-32\fR|\fB\-64\fR]
+.PP
+\&\fITarget \s-1TIC54X\s0 options:\fR
+ [\fB\-mcpu=54[123589]\fR|\fB\-mcpu=54[56]lp\fR] [\fB\-mfar\-mode\fR|\fB\-mf\fR]
+ [\fB\-merrors\-to\-file\fR \fI<filename>\fR|\fB\-me\fR \fI<filename>\fR]
+.PP
+\&\fITarget Z80 options:\fR
+ [\fB\-z80\fR] [\fB\-r800\fR]
+ [ \fB\-ignore\-undocumented\-instructions\fR] [\fB\-Wnud\fR]
+ [ \fB\-ignore\-unportable\-instructions\fR] [\fB\-Wnup\fR]
+ [ \fB\-warn\-undocumented\-instructions\fR] [\fB\-Wud\fR]
+ [ \fB\-warn\-unportable\-instructions\fR] [\fB\-Wup\fR]
+ [ \fB\-forbid\-undocumented\-instructions\fR] [\fB\-Fud\fR]
+ [ \fB\-forbid\-unportable\-instructions\fR] [\fB\-Fup\fR]
+.PP
+\&\fITarget Xtensa options:\fR
+ [\fB\-\-[no\-]text\-section\-literals\fR] [\fB\-\-[no\-]absolute\-literals\fR]
+ [\fB\-\-[no\-]target\-align\fR] [\fB\-\-[no\-]longcalls\fR]
+ [\fB\-\-[no\-]transform\fR]
+ [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBas\fR is really a family of assemblers.
+If you use (or have used) the \s-1GNU\s0 assembler on one architecture, you
+should find a fairly similar environment when you use it on another
+architecture. Each version has much in common with the others,
+including object file formats, most assembler directives (often called
+\&\fIpseudo-ops\fR) and assembler syntax.
+.PP
+\&\fBas\fR is primarily intended to assemble the output of the
+\&\s-1GNU\s0 C compiler \f(CW\*(C`gcc\*(C'\fR for use by the linker
+\&\f(CW\*(C`ld\*(C'\fR. Nevertheless, we've tried to make \fBas\fR
+assemble correctly everything that other assemblers for the same
+machine would assemble.
+Any exceptions are documented explicitly.
+This doesn't mean \fBas\fR always uses the same syntax as another
+assembler for the same architecture; for example, we know of several
+incompatible versions of 680x0 assembly language syntax.
+.PP
+Each time you run \fBas\fR it assembles exactly one source
+program. The source program is made up of one or more files.
+(The standard input is also a file.)
+.PP
+You give \fBas\fR a command line that has zero or more input file
+names. The input files are read (from left file name to right). A
+command line argument (in any position) that has no special meaning
+is taken to be an input file name.
+.PP
+If you give \fBas\fR no file names it attempts to read one input file
+from the \fBas\fR standard input, which is normally your terminal. You
+may have to type \fBctl-D\fR to tell \fBas\fR there is no more program
+to assemble.
+.PP
+Use \fB\-\-\fR if you need to explicitly name the standard input file
+in your command line.
+.PP
+If the source is empty, \fBas\fR produces a small, empty object
+file.
+.PP
+\&\fBas\fR may write warnings and error messages to the standard error
+file (usually your terminal). This should not happen when a compiler
+runs \fBas\fR automatically. Warnings report an assumption made so
+that \fBas\fR could keep assembling a flawed program; errors report a
+grave problem that stops the assembly.
+.PP
+If you are invoking \fBas\fR via the \s-1GNU\s0 C compiler,
+you can use the \fB\-Wa\fR option to pass arguments through to the assembler.
+The assembler arguments must be separated from each other (and the \fB\-Wa\fR)
+by commas. For example:
+.PP
+.Vb 1
+\& gcc -c -g -O -Wa,-alh,-L file.c
+.Ve
+.PP
+This passes two options to the assembler: \fB\-alh\fR (emit a listing to
+standard output with high-level and assembly source) and \fB\-L\fR (retain
+local symbols in the symbol table).
+.PP
+Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
+command-line options are automatically passed to the assembler by the compiler.
+(You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see
+precisely what options it passes to each compilation pass, including the
+assembler.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a[cdghlmns]\fR" 4
+.IX Item "-a[cdghlmns]"
+Turn on listings, in any of a variety of ways:
+.RS 4
+.IP "\fB\-ac\fR" 4
+.IX Item "-ac"
+omit false conditionals
+.IP "\fB\-ad\fR" 4
+.IX Item "-ad"
+omit debugging directives
+.IP "\fB\-ag\fR" 4
+.IX Item "-ag"
+include general information, like as version and options passed
+.IP "\fB\-ah\fR" 4
+.IX Item "-ah"
+include high-level source
+.IP "\fB\-al\fR" 4
+.IX Item "-al"
+include assembly
+.IP "\fB\-am\fR" 4
+.IX Item "-am"
+include macro expansions
+.IP "\fB\-an\fR" 4
+.IX Item "-an"
+omit forms processing
+.IP "\fB\-as\fR" 4
+.IX Item "-as"
+include symbols
+.IP "\fB=file\fR" 4
+.IX Item "=file"
+set the name of the listing file
+.RE
+.RS 4
+.Sp
+You may combine these options; for example, use \fB\-aln\fR for assembly
+listing without forms processing. The \fB=file\fR option, if used, must be
+the last one. By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
+.RE
+.IP "\fB\-\-alternate\fR" 4
+.IX Item "--alternate"
+Begin in alternate macro mode.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+Ignored. This option is accepted for script compatibility with calls to
+other assemblers.
+.IP "\fB\-\-debug\-prefix\-map\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--debug-prefix-map old=new"
+When assembling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-\-defsym\fR \fIsym\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--defsym sym=value"
+Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
+\&\fIvalue\fR must be an integer constant. As in C, a leading \fB0x\fR
+indicates a hexadecimal value, and a leading \fB0\fR indicates an octal
+value. The value of the symbol can be overridden inside a source file via the
+use of a \f(CW\*(C`.set\*(C'\fR pseudo\-op.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+\&\*(L"fast\*(R"\-\-\-skip whitespace and comment preprocessing (assume source is
+compiler output).
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-gen\-debug\fR" 4
+.IX Item "--gen-debug"
+.PD
+Generate debugging information for each assembler source line using whichever
+debug format is preferred by the target. This currently means either \s-1STABS\s0,
+\&\s-1ECOFF\s0 or \s-1DWARF2\s0.
+.IP "\fB\-\-gstabs\fR" 4
+.IX Item "--gstabs"
+Generate stabs debugging information for each assembler line. This
+may help debugging assembler code, if the debugger can handle it.
+.IP "\fB\-\-gstabs+\fR" 4
+.IX Item "--gstabs+"
+Generate stabs debugging information for each assembler line, with \s-1GNU\s0
+extensions that probably only gdb can handle, and that could make other
+debuggers crash or refuse to read your program. This
+may help debugging assembler code. Currently the only \s-1GNU\s0 extension is
+the location of the current working directory at assembling time.
+.IP "\fB\-\-gdwarf\-2\fR" 4
+.IX Item "--gdwarf-2"
+Generate \s-1DWARF2\s0 debugging information for each assembler line. This
+may help debugging assembler code, if the debugger can handle it. Note\-\-\-this
+option is only supported by some targets, not all of them.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command line options and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options and exit.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives.
+.IP "\fB\-J\fR" 4
+.IX Item "-J"
+Don't warn about signed overflow.
+.IP "\fB\-K\fR" 4
+.IX Item "-K"
+Issue warnings when difference tables altered for long displacements.
+.IP "\fB\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.IP "\fB\-\-keep\-locals\fR" 4
+.IX Item "--keep-locals"
+.PD
+Keep (in the symbol table) local symbols. These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.
+.IP "\fB\-\-listing\-lhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width=number"
+Set the maximum width, in words, of the output data column for an assembler
+listing to \fInumber\fR.
+.IP "\fB\-\-listing\-lhs\-width2=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width2=number"
+Set the maximum width, in words, of the output data column for continuation
+lines in an assembler listing to \fInumber\fR.
+.IP "\fB\-\-listing\-rhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-rhs-width=number"
+Set the maximum width of an input source line, as displayed in a listing, to
+\&\fInumber\fR bytes.
+.IP "\fB\-\-listing\-cont\-lines=\fR\fInumber\fR" 4
+.IX Item "--listing-cont-lines=number"
+Set the maximum number of lines printed in a listing for a single line of input
+to \fInumber\fR + 1.
+.IP "\fB\-o\fR \fIobjfile\fR" 4
+.IX Item "-o objfile"
+Name the object-file output from \fBas\fR \fIobjfile\fR.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+Fold the data section into the text section.
+.Sp
+Set the default size of \s-1GAS\s0's hash tables to a prime number close to
+\&\fInumber\fR. Increasing this value can reduce the length of time it takes the
+assembler to perform its tasks, at the expense of increasing the assembler's
+memory requirements. Similarly reducing this value can reduce the memory
+requirements at the expense of speed.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces \s-1GAS\s0's memory requirements, at the expense of making the
+assembly processes slower. Currently this switch is a synonym for
+\&\fB\-\-hash\-size=4051\fR, but in the future it may have other effects as well.
+.IP "\fB\-\-statistics\fR" 4
+.IX Item "--statistics"
+Print the maximum space (in bytes) and total time (in seconds) used by
+assembly.
+.IP "\fB\-\-strip\-local\-absolute\fR" 4
+.IX Item "--strip-local-absolute"
+Remove local absolute symbols from the outgoing symbol table.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD
+Print the \fBas\fR version.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the \fBas\fR version and exit.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-no\-warn\fR" 4
+.IX Item "--no-warn"
+.PD
+Suppress warning messages.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+Treat warnings as errors.
+.IP "\fB\-\-warn\fR" 4
+.IX Item "--warn"
+Don't suppress warning messages or treat them as errors.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Ignored.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+Ignored.
+.IP "\fB\-Z\fR" 4
+.IX Item "-Z"
+Generate an object file even after errors.
+.IP "\fB\-\- |\fR \fIfiles\fR \fB...\fR" 4
+.IX Item "-- | files ..."
+Standard input, or source files to assemble.
+.PP
+The following options are available when as is configured for
+an \s-1ARC\s0 processor.
+.IP "\fB\-marc[5|6|7|8]\fR" 4
+.IX Item "-marc[5|6|7|8]"
+This option selects the core processor variant.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.PP
+The following options are available when as is configured for the \s-1ARM\s0
+processor family.
+.IP "\fB\-mcpu=\fR\fIprocessor\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-mcpu=processor[+extension...]"
+Specify which \s-1ARM\s0 processor variant is the target.
+.IP "\fB\-march=\fR\fIarchitecture\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-march=architecture[+extension...]"
+Specify which \s-1ARM\s0 architecture variant is used by the target.
+.IP "\fB\-mfpu=\fR\fIfloating-point-format\fR" 4
+.IX Item "-mfpu=floating-point-format"
+Select which Floating Point architecture is the target.
+.IP "\fB\-mfloat\-abi=\fR\fIabi\fR" 4
+.IX Item "-mfloat-abi=abi"
+Select which floating point \s-1ABI\s0 is in use.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Enable Thumb only instruction decoding.
+.IP "\fB\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant\fR" 4
+.IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant"
+Select which procedure calling convention is in use.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Specify that the code has been generated with interworking between Thumb and
+\&\s-1ARM\s0 code in mind.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+Specify that \s-1PIC\s0 code has been generated.
+.PP
+See the info pages for documentation of the CRIS-specific options.
+.PP
+The following options are available when as is configured for
+a D10V processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.PP
+The following options are available when as is configured for a D30V
+processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+Warn when nops are generated.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+Warn when a nop after a 32\-bit multiply instruction is generated.
+.PP
+The following options are available when as is configured for the
+Intel 80960 processor.
+.IP "\fB\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\fR" 4
+.IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC"
+Specify which variant of the 960 architecture is the target.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+Add code to collect statistics about branches taken.
+.IP "\fB\-no\-relax\fR" 4
+.IX Item "-no-relax"
+Do not alter compare-and-branch instructions for long displacements;
+error if necessary.
+.PP
+The following options are available when as is configured for the
+Ubicom \s-1IP2K\s0 series.
+.IP "\fB\-mip2022ext\fR" 4
+.IX Item "-mip2022ext"
+Specifies that the extended \s-1IP2022\s0 instructions are allowed.
+.IP "\fB\-mip2022\fR" 4
+.IX Item "-mip2022"
+Restores the default behaviour, which restricts the permitted instructions to
+just the basic \s-1IP2022\s0 ones.
+.PP
+The following options are available when as is configured for the
+Renesas M32C and M16C processors.
+.IP "\fB\-m32c\fR" 4
+.IX Item "-m32c"
+Assemble M32C instructions.
+.IP "\fB\-m16c\fR" 4
+.IX Item "-m16c"
+Assemble M16C instructions (the default).
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Enable support for link-time relaxations.
+.IP "\fB\-h\-tick\-hex\fR" 4
+.IX Item "-h-tick-hex"
+Support H'00 style hex constants in addition to 0x00 style.
+.PP
+The following options are available when as is configured for the
+Renesas M32R (formerly Mitsubishi M32R) series.
+.IP "\fB\-\-m32rx\fR" 4
+.IX Item "--m32rx"
+Specify which processor in the M32R family is the target. The default
+is normally the M32R, but this option changes it to the M32RX.
+.IP "\fB\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\fR" 4
+.IX Item "--warn-explicit-parallel-conflicts or --Wp"
+Produce warning messages when questionable parallel constructs are
+encountered.
+.IP "\fB\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\fR" 4
+.IX Item "--no-warn-explicit-parallel-conflicts or --Wnp"
+Do not produce warning messages when questionable parallel constructs are
+encountered.
+.PP
+The following options are available when as is configured for the
+Motorola 68000 series.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+Shorten references to undefined symbols, to one word instead of two.
+.IP "\fB\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\fR" 4
+.IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030"
+.PD 0
+.IP "\fB| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\fR" 4
+.IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332"
+.IP "\fB| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\fR" 4
+.IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200"
+.PD
+Specify what processor in the 68000 family is the target. The default
+is normally the 68020, but this can be changed at configuration time.
+.IP "\fB\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\fR" 4
+.IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882"
+The target machine does (or does not) have a floating-point coprocessor.
+The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
+the basic 68000 is not compatible with the 68881, a combination of the
+two can be specified, since it's possible to do emulation of the
+coprocessor instructions with the main processor.
+.IP "\fB\-m68851 | \-mno\-68851\fR" 4
+.IX Item "-m68851 | -mno-68851"
+The target machine does (or does not) have a memory-management
+unit coprocessor. The default is to assume an \s-1MMU\s0 for 68020 and up.
+.PP
+For details about the \s-1PDP\-11\s0 machine dependent features options,
+see \fBPDP\-11\-Options\fR.
+.IP "\fB\-mpic | \-mno\-pic\fR" 4
+.IX Item "-mpic | -mno-pic"
+Generate position-independent (or position\-dependent) code. The
+default is \fB\-mpic\fR.
+.IP "\fB\-mall\fR" 4
+.IX Item "-mall"
+.PD 0
+.IP "\fB\-mall\-extensions\fR" 4
+.IX Item "-mall-extensions"
+.PD
+Enable all instruction set extensions. This is the default.
+.IP "\fB\-mno\-extensions\fR" 4
+.IX Item "-mno-extensions"
+Disable all instruction set extensions.
+.IP "\fB\-m\fR\fIextension\fR \fB| \-mno\-\fR\fIextension\fR" 4
+.IX Item "-mextension | -mno-extension"
+Enable (or disable) a particular instruction set extension.
+.IP "\fB\-m\fR\fIcpu\fR" 4
+.IX Item "-mcpu"
+Enable the instruction set extensions supported by a particular \s-1CPU\s0, and
+disable all other extensions.
+.IP "\fB\-m\fR\fImachine\fR" 4
+.IX Item "-mmachine"
+Enable the instruction set extensions supported by a particular machine
+model, and disable all other extensions.
+.PP
+The following options are available when as is configured for
+a picoJava processor.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Generate \*(L"little endian\*(R" format output.
+.PP
+The following options are available when as is configured for the
+Motorola 68HC11 or 68HC12 series.
+.IP "\fB\-m68hc11 | \-m68hc12 | \-m68hcs12\fR" 4
+.IX Item "-m68hc11 | -m68hc12 | -m68hcs12"
+Specify what processor is the target. The default is
+defined by the configuration option when building the assembler.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Specify to use the 16\-bit integer \s-1ABI\s0.
+.IP "\fB\-mlong\fR" 4
+.IX Item "-mlong"
+Specify to use the 32\-bit integer \s-1ABI\s0.
+.IP "\fB\-mshort\-double\fR" 4
+.IX Item "-mshort-double"
+Specify to use the 32\-bit double \s-1ABI\s0.
+.IP "\fB\-mlong\-double\fR" 4
+.IX Item "-mlong-double"
+Specify to use the 64\-bit double \s-1ABI\s0.
+.IP "\fB\-\-force\-long\-branches\fR" 4
+.IX Item "--force-long-branches"
+Relative branches are turned into absolute ones. This concerns
+conditional branches, unconditional branches and branches to a
+sub routine.
+.IP "\fB\-S | \-\-short\-branches\fR" 4
+.IX Item "-S | --short-branches"
+Do not turn relative branches into absolute ones
+when the offset is out of range.
+.IP "\fB\-\-strict\-direct\-mode\fR" 4
+.IX Item "--strict-direct-mode"
+Do not turn the direct addressing mode into extended addressing mode
+when the instruction does not support direct addressing mode.
+.IP "\fB\-\-print\-insn\-syntax\fR" 4
+.IX Item "--print-insn-syntax"
+Print the syntax of instruction in case of error.
+.IP "\fB\-\-print\-opcodes\fR" 4
+.IX Item "--print-opcodes"
+print the list of instructions with syntax and then exit.
+.IP "\fB\-\-generate\-example\fR" 4
+.IX Item "--generate-example"
+print an example of instruction for each possible instruction and then exit.
+This option is only useful for testing \fBas\fR.
+.PP
+The following options are available when \fBas\fR is configured
+for the \s-1SPARC\s0 architecture:
+.IP "\fB\-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite\fR" 4
+.IX Item "-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite"
+.PD 0
+.IP "\fB\-Av8plus | \-Av8plusa | \-Av9 | \-Av9a\fR" 4
+.IX Item "-Av8plus | -Av8plusa | -Av9 | -Av9a"
+.PD
+Explicitly select a variant of the \s-1SPARC\s0 architecture.
+.Sp
+\&\fB\-Av8plus\fR and \fB\-Av8plusa\fR select a 32 bit environment.
+\&\fB\-Av9\fR and \fB\-Av9a\fR select a 64 bit environment.
+.Sp
+\&\fB\-Av8plusa\fR and \fB\-Av9a\fR enable the \s-1SPARC\s0 V9 instruction set with
+UltraSPARC extensions.
+.IP "\fB\-xarch=v8plus | \-xarch=v8plusa\fR" 4
+.IX Item "-xarch=v8plus | -xarch=v8plusa"
+For compatibility with the Solaris v9 assembler. These options are
+equivalent to \-Av8plus and \-Av8plusa, respectively.
+.IP "\fB\-bump\fR" 4
+.IX Item "-bump"
+Warn when the assembler switches to another architecture.
+.PP
+The following options are available when as is configured for the 'c54x
+architecture.
+.IP "\fB\-mfar\-mode\fR" 4
+.IX Item "-mfar-mode"
+Enable extended addressing mode. All addresses and relocations will assume
+extended addressing (usually 23 bits).
+.IP "\fB\-mcpu=\fR\fI\s-1CPU_VERSION\s0\fR" 4
+.IX Item "-mcpu=CPU_VERSION"
+Sets the \s-1CPU\s0 version being compiled for.
+.IP "\fB\-merrors\-to\-file\fR \fI\s-1FILENAME\s0\fR" 4
+.IX Item "-merrors-to-file FILENAME"
+Redirect error output to a file, for broken systems which don't support such
+behaviour in the shell.
+.PP
+The following options are available when as is configured for
+a \s-1MIPS\s0 processor.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+This option sets the largest size of an object that can be referenced
+implicitly with the \f(CW\*(C`gp\*(C'\fR register. It is only accepted for targets that
+use \s-1ECOFF\s0 format, such as a DECstation running Ultrix. The default value is 8.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate \*(L"little endian\*(R" format output.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+.PD 0
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+.IP "\fB\-mips5\fR" 4
+.IX Item "-mips5"
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+.PD
+Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level.
+\&\fB\-mips1\fR is an alias for \fB\-march=r3000\fR, \fB\-mips2\fR is an
+alias for \fB\-march=r6000\fR, \fB\-mips3\fR is an alias for
+\&\fB\-march=r4000\fR and \fB\-mips4\fR is an alias for \fB\-march=r8000\fR.
+\&\fB\-mips5\fR, \fB\-mips32\fR, \fB\-mips32r2\fR, \fB\-mips64\fR, and
+\&\fB\-mips64r2\fR
+correspond to generic
+\&\fB\s-1MIPS\s0 V\fR, \fB\s-1MIPS32\s0\fR, \fB\s-1MIPS32\s0 Release 2\fR, \fB\s-1MIPS64\s0\fR,
+and \fB\s-1MIPS64\s0 Release 2\fR
+\&\s-1ISA\s0 processors, respectively.
+.IP "\fB\-march=\fR\fI\s-1CPU\s0\fR" 4
+.IX Item "-march=CPU"
+Generate code for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mtune=\fR\fIcpu\fR" 4
+.IX Item "-mtune=cpu"
+Schedule and tune for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mfix7000\fR" 4
+.IX Item "-mfix7000"
+.PD 0
+.IP "\fB\-mno\-fix7000\fR" 4
+.IX Item "-mno-fix7000"
+.PD
+Cause nops to be inserted if the read of the destination register
+of an mfhi or mflo instruction occurs in the following two instructions.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-no\-mdebug\fR" 4
+.IX Item "-no-mdebug"
+.PD
+Cause stabs-style debugging output to go into an ECOFF-style .mdebug
+section instead of the standard \s-1ELF\s0 .stabs sections.
+.IP "\fB\-mpdr\fR" 4
+.IX Item "-mpdr"
+.PD 0
+.IP "\fB\-mno\-pdr\fR" 4
+.IX Item "-mno-pdr"
+.PD
+Control generation of \f(CW\*(C`.pdr\*(C'\fR sections.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+.PD 0
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+.PD
+The register sizes are normally inferred from the \s-1ISA\s0 and \s-1ABI\s0, but these
+flags force a certain group of registers to be treated as 32 bits wide at
+all times. \fB\-mgp32\fR controls the size of general-purpose registers
+and \fB\-mfp32\fR controls the size of floating-point registers.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-no\-mips16\fR" 4
+.IX Item "-no-mips16"
+.PD
+Generate code for the \s-1MIPS\s0 16 processor. This is equivalent to putting
+\&\f(CW\*(C`.set mips16\*(C'\fR at the start of the assembly file. \fB\-no\-mips16\fR
+turns off this option.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Enables the SmartMIPS extension to the \s-1MIPS32\s0 instruction set. This is
+equivalent to putting \f(CW\*(C`.set smartmips\*(C'\fR at the start of the assembly file.
+\&\fB\-mno\-smartmips\fR turns off this option.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-no\-mips3d\fR" 4
+.IX Item "-no-mips3d"
+.PD
+Generate code for the \s-1MIPS\-3D\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MIPS\-3D\s0 instructions.
+\&\fB\-no\-mips3d\fR turns off this option.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-no\-mdmx\fR" 4
+.IX Item "-no-mdmx"
+.PD
+Generate code for the \s-1MDMX\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MDMX\s0 instructions.
+\&\fB\-no\-mdmx\fR turns off this option.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Generate code for the \s-1DSP\s0 Release 1 Application Specific Extension.
+This tells the assembler to accept \s-1DSP\s0 Release 1 instructions.
+\&\fB\-mno\-dsp\fR turns off this option.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Generate code for the \s-1DSP\s0 Release 2 Application Specific Extension.
+This option implies \-mdsp.
+This tells the assembler to accept \s-1DSP\s0 Release 2 instructions.
+\&\fB\-mno\-dspr2\fR turns off this option.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Generate code for the \s-1MT\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MT\s0 instructions.
+\&\fB\-mno\-mt\fR turns off this option.
+.IP "\fB\-\-construct\-floats\fR" 4
+.IX Item "--construct-floats"
+.PD 0
+.IP "\fB\-\-no\-construct\-floats\fR" 4
+.IX Item "--no-construct-floats"
+.PD
+The \fB\-\-no\-construct\-floats\fR option disables the construction of
+double width floating point constants by loading the two halves of the
+value into the two single width floating point registers that make up
+the double width register. By default \fB\-\-construct\-floats\fR is
+selected, allowing construction of these floating point constants.
+.IP "\fB\-\-emulation=\fR\fIname\fR" 4
+.IX Item "--emulation=name"
+This option causes \fBas\fR to emulate \fBas\fR configured
+for some other target, in all respects, including output format (choosing
+between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate
+debugging information or store symbol table information, and default
+endianness. The available configuration names are: \fBmipsecoff\fR,
+\&\fBmipself\fR, \fBmipslecoff\fR, \fBmipsbecoff\fR, \fBmipslelf\fR,
+\&\fBmipsbelf\fR. The first two do not alter the default endianness from that
+of the primary target for which the assembler was configured; the others change
+the default to little\- or big-endian as indicated by the \fBb\fR or \fBl\fR
+in the name. Using \fB\-EB\fR or \fB\-EL\fR will override the endianness
+selection in any case.
+.Sp
+This option is currently supported only when the primary target
+\&\fBas\fR is configured for is a \s-1MIPS\s0 \s-1ELF\s0 or \s-1ECOFF\s0 target.
+Furthermore, the primary target or others specified with
+\&\fB\-\-enable\-targets=...\fR at configuration time must include support for
+the other format, if both are to be available. For example, the Irix 5
+configuration includes support for both.
+.Sp
+Eventually, this option will support more configurations, with more
+fine-grained control over the assembler's behavior, and will be supported for
+more processors.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+\&\fBas\fR ignores this option. It is accepted for compatibility with
+the native tools.
+.IP "\fB\-\-trap\fR" 4
+.IX Item "--trap"
+.PD 0
+.IP "\fB\-\-no\-trap\fR" 4
+.IX Item "--no-trap"
+.IP "\fB\-\-break\fR" 4
+.IX Item "--break"
+.IP "\fB\-\-no\-break\fR" 4
+.IX Item "--no-break"
+.PD
+Control how to deal with multiplication overflow and division by zero.
+\&\fB\-\-trap\fR or \fB\-\-no\-break\fR (which are synonyms) take a trap exception
+(and only work for Instruction Set Architecture level 2 and higher);
+\&\fB\-\-break\fR or \fB\-\-no\-trap\fR (also synonyms, and the default) take a
+break exception.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+When this option is used, \fBas\fR will issue a warning every
+time it generates a nop instruction from a macro.
+.PP
+The following options are available when as is configured for
+an MCore processor.
+.IP "\fB\-jsri2bsr\fR" 4
+.IX Item "-jsri2bsr"
+.PD 0
+.IP "\fB\-nojsri2bsr\fR" 4
+.IX Item "-nojsri2bsr"
+.PD
+Enable or disable the \s-1JSRI\s0 to \s-1BSR\s0 transformation. By default this is enabled.
+The command line option \fB\-nojsri2bsr\fR can be used to disable it.
+.IP "\fB\-sifilter\fR" 4
+.IX Item "-sifilter"
+.PD 0
+.IP "\fB\-nosifilter\fR" 4
+.IX Item "-nosifilter"
+.PD
+Enable or disable the silicon filter behaviour. By default this is disabled.
+The default can be overridden by the \fB\-sifilter\fR command line option.
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Alter jump instructions for long displacements.
+.IP "\fB\-mcpu=[210|340]\fR" 4
+.IX Item "-mcpu=[210|340]"
+Select the cpu type on the target hardware. This controls which instructions
+can be assembled.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Assemble for a big endian target.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Assemble for a little endian target.
+.PP
+See the info pages for documentation of the MMIX-specific options.
+.PP
+The following options are available when as is configured for the s390
+processor family.
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Select the word size, either 31/32 bits or 64 bits.
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD 0
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD
+Select the architecture mode, either the Enterprise System
+Architecture (esa) or the z/Architecture mode (zarch).
+.IP "\fB\-march=\fR\fIprocessor\fR" 4
+.IX Item "-march=processor"
+Specify which s390 processor variant is the target, \fBg6\fR, \fBg6\fR,
+\&\fBz900\fR, \fBz990\fR, \fBz9\-109\fR, \fBz9\-ec\fR, or \fBz10\fR.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+Allow or disallow symbolic names for registers.
+.IP "\fB\-mwarn\-areg\-zero\fR" 4
+.IX Item "-mwarn-areg-zero"
+Warn whenever the operand for a base or index register has been specified
+but evaluates to zero.
+.PP
+The following options are available when as is configured for
+an Xtensa processor.
+.IP "\fB\-\-text\-section\-literals | \-\-no\-text\-section\-literals\fR" 4
+.IX Item "--text-section-literals | --no-text-section-literals"
+With \fB\-\-text\-section\-literals\fR, literal pools are interspersed
+in the text section. The default is
+\&\fB\-\-no\-text\-section\-literals\fR, which places literals in a
+separate section in the output file. These options only affect literals
+referenced via PC-relative \f(CW\*(C`L32R\*(C'\fR instructions; literals for
+absolute mode \f(CW\*(C`L32R\*(C'\fR instructions are handled separately.
+.IP "\fB\-\-absolute\-literals | \-\-no\-absolute\-literals\fR" 4
+.IX Item "--absolute-literals | --no-absolute-literals"
+Indicate to the assembler whether \f(CW\*(C`L32R\*(C'\fR instructions use absolute
+or PC-relative addressing. The default is to assume absolute addressing
+if the Xtensa processor includes the absolute \f(CW\*(C`L32R\*(C'\fR addressing
+option. Otherwise, only the PC-relative \f(CW\*(C`L32R\*(C'\fR mode can be used.
+.IP "\fB\-\-target\-align | \-\-no\-target\-align\fR" 4
+.IX Item "--target-align | --no-target-align"
+Enable or disable automatic alignment to reduce branch penalties at the
+expense of some code density. The default is \fB\-\-target\-align\fR.
+.IP "\fB\-\-longcalls | \-\-no\-longcalls\fR" 4
+.IX Item "--longcalls | --no-longcalls"
+Enable or disable transformation of call instructions to allow calls
+across a greater range of addresses. The default is
+\&\fB\-\-no\-longcalls\fR.
+.IP "\fB\-\-transform | \-\-no\-transform\fR" 4
+.IX Item "--transform | --no-transform"
+Enable or disable all assembler transformations of Xtensa instructions.
+The default is \fB\-\-transform\fR;
+\&\fB\-\-no\-transform\fR should be used only in the rare cases when the
+instructions must be exactly as specified in the assembly source.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR" 4
+.IX Item "--rename-section oldname=newname"
+When generating output sections, rename the \fIoldname\fR section to
+\&\fInewname\fR.
+.PP
+The following options are available when as is configured for
+a Z80 family processor.
+.IP "\fB\-z80\fR" 4
+.IX Item "-z80"
+Assemble for Z80 processor.
+.IP "\fB\-r800\fR" 4
+.IX Item "-r800"
+Assemble for R800 processor.
+.IP "\fB\-ignore\-undocumented\-instructions\fR" 4
+.IX Item "-ignore-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wnud\fR" 4
+.IX Item "-Wnud"
+.PD
+Assemble undocumented Z80 instructions that also work on R800 without warning.
+.IP "\fB\-ignore\-unportable\-instructions\fR" 4
+.IX Item "-ignore-unportable-instructions"
+.PD 0
+.IP "\fB\-Wnup\fR" 4
+.IX Item "-Wnup"
+.PD
+Assemble all undocumented Z80 instructions without warning.
+.IP "\fB\-warn\-undocumented\-instructions\fR" 4
+.IX Item "-warn-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wud\fR" 4
+.IX Item "-Wud"
+.PD
+Issue a warning for undocumented Z80 instructions that also work on R800.
+.IP "\fB\-warn\-unportable\-instructions\fR" 4
+.IX Item "-warn-unportable-instructions"
+.PD 0
+.IP "\fB\-Wup\fR" 4
+.IX Item "-Wup"
+.PD
+Issue a warning for undocumented Z80 instructions that do not work on R800.
+.IP "\fB\-forbid\-undocumented\-instructions\fR" 4
+.IX Item "-forbid-undocumented-instructions"
+.PD 0
+.IP "\fB\-Fud\fR" 4
+.IX Item "-Fud"
+.PD
+Treat all undocumented instructions as errors.
+.IP "\fB\-forbid\-unportable\-instructions\fR" 4
+.IX Item "-forbid-unportable-instructions"
+.PD 0
+.IP "\fB\-Fup\fR" 4
+.IX Item "-Fup"
+.PD
+Treat undocumented Z80 instructions that do not work on R800 as errors.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1
new file mode 100644
index 0000000..76c7e0d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1
@@ -0,0 +1,345 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "C++FILT 1"
+.TH C++FILT 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+c++filt \- Demangle C++ and Java symbols.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+c++filt [\fB\-_\fR|\fB\-\-strip\-underscores\fR]
+ [\fB\-n\fR|\fB\-\-no\-strip\-underscores\fR]
+ [\fB\-p\fR|\fB\-\-no\-params\fR]
+ [\fB\-t\fR|\fB\-\-types\fR]
+ [\fB\-i\fR|\fB\-\-no\-verbose\fR]
+ [\fB\-s\fR \fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+ [\fB\-\-help\fR] [\fB\-\-version\fR] [\fIsymbol\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \*(C+ and Java languages provide function overloading, which means
+that you can write many functions with the same name, providing that
+each function takes parameters of different types. In order to be
+able to distinguish these similarly named functions \*(C+ and Java
+encode them into a low-level assembler name which uniquely identifies
+each different version. This process is known as \fImangling\fR. The
+\&\fBc++filt\fR
+[1]
+program does the inverse mapping: it decodes (\fIdemangles\fR) low-level
+names into user-level names so that they can be read.
+.PP
+Every alphanumeric word (consisting of letters, digits, underscores,
+dollars, or periods) seen in the input is a potential mangled name.
+If the name decodes into a \*(C+ name, the \*(C+ name replaces the
+low-level name in the output, otherwise the original word is output.
+In this way you can pass an entire assembler source file, containing
+mangled names, through \fBc++filt\fR and see the same source file
+containing demangled names.
+.PP
+You can also use \fBc++filt\fR to decipher individual symbols by
+passing them on the command line:
+.PP
+.Vb 1
+\& c++filt <symbol>
+.Ve
+.PP
+If no \fIsymbol\fR arguments are given, \fBc++filt\fR reads symbol
+names from the standard input instead. All the results are printed on
+the standard output. The difference between reading names from the
+command line versus reading names from the standard input is that
+command line arguments are expected to be just mangled names and no
+checking is performed to separate them from surrounding text. Thus
+for example:
+.PP
+.Vb 1
+\& c++filt \-n _Z1fv
+.Ve
+.PP
+will work and demangle the name to \*(L"f()\*(R" whereas:
+.PP
+.Vb 1
+\& c++filt \-n _Z1fv,
+.Ve
+.PP
+will not work. (Note the extra comma at the end of the mangled
+name which makes it invalid). This command however will work:
+.PP
+.Vb 1
+\& echo _Z1fv, | c++filt \-n
+.Ve
+.PP
+and will display \*(L"f(),\*(R", i.e., the demangled name followed by a
+trailing comma. This behaviour is because when the names are read
+from the standard input it is expected that they might be part of an
+assembler source file where there might be extra, extraneous
+characters trailing after a mangled name. For example:
+.PP
+.Vb 1
+\& .type _Z1fv, @function
+.Ve
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-_\fR" 4
+.IX Item "-_"
+.PD 0
+.IP "\fB\-\-strip\-underscores\fR" 4
+.IX Item "--strip-underscores"
+.PD
+On some systems, both the C and \*(C+ compilers put an underscore in front
+of every name. For example, the C name \f(CW\*(C`foo\*(C'\fR gets the low-level
+name \f(CW\*(C`_foo\*(C'\fR. This option removes the initial underscore. Whether
+\&\fBc++filt\fR removes the underscore by default is target dependent.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-strip\-underscores\fR" 4
+.IX Item "--no-strip-underscores"
+.PD
+Do not remove the initial underscore.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-params\fR" 4
+.IX Item "--no-params"
+.PD
+When demangling the name of a function, do not display the types of
+the function's parameters.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-types\fR" 4
+.IX Item "--types"
+.PD
+Attempt to demangle types as well as function names. This is disabled
+by default since mangled types are normally only used internally in
+the compiler, and they can be confused with non-mangled names. For example,
+a function called \*(L"a\*(R" treated as a mangled type name would be
+demangled to \*(L"signed char\*(R".
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-no\-verbose\fR" 4
+.IX Item "--no-verbose"
+.PD
+Do not include implementation details (if any) in the demangled
+output.
+.IP "\fB\-s\fR \fIformat\fR" 4
+.IX Item "-s format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+\&\fBc++filt\fR can decode various methods of mangling, used by
+different compilers. The argument to this option selects which
+method it uses:
+.RS 4
+.ie n .IP """auto""" 4
+.el .IP "\f(CWauto\fR" 4
+.IX Item "auto"
+Automatic selection based on executable (the default method)
+.ie n .IP """gnu""" 4
+.el .IP "\f(CWgnu\fR" 4
+.IX Item "gnu"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++)
+.ie n .IP """lucid""" 4
+.el .IP "\f(CWlucid\fR" 4
+.IX Item "lucid"
+the one used by the Lucid compiler (lcc)
+.ie n .IP """arm""" 4
+.el .IP "\f(CWarm\fR" 4
+.IX Item "arm"
+the one specified by the \*(C+ Annotated Reference Manual
+.ie n .IP """hp""" 4
+.el .IP "\f(CWhp\fR" 4
+.IX Item "hp"
+the one used by the \s-1HP\s0 compiler (aCC)
+.ie n .IP """edg""" 4
+.el .IP "\f(CWedg\fR" 4
+.IX Item "edg"
+the one used by the \s-1EDG\s0 compiler
+.ie n .IP """gnu\-v3""" 4
+.el .IP "\f(CWgnu\-v3\fR" 4
+.IX Item "gnu-v3"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++) with the V3 \s-1ABI\s0.
+.ie n .IP """java""" 4
+.el .IP "\f(CWjava\fR" 4
+.IX Item "java"
+the one used by the \s-1GNU\s0 Java compiler (gcj)
+.ie n .IP """gnat""" 4
+.el .IP "\f(CWgnat\fR" 4
+.IX Item "gnat"
+the one used by the \s-1GNU\s0 Ada compiler (\s-1GNAT\s0).
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the options to \fBc++filt\fR and exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the version number of \fBc++filt\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+MS-DOS does not allow \f(CW\*(C`+\*(C'\fR characters in file names, so on
+MS-DOS this program is named \fB\s-1CXXFILT\s0\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1
new file mode 100644
index 0000000..5d9dd27
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1
@@ -0,0 +1,529 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
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+.PP
+\fB\\$1\fR
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+..
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+.if t .sp .5v
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+..
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+'br\}
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+. ds -- \|\(em\|
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+. ds R" ''
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+.\" Escape single quotes in literal strings from groff's Unicode transform.
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+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
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+..
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+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
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+. ds #V .6m
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+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
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+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "DLLTOOL 1"
+.TH DLLTOOL 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+dlltool \- Create files needed to build and use DLLs.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+dlltool [\fB\-d\fR|\fB\-\-input\-def\fR \fIdef-file-name\fR]
+ [\fB\-b\fR|\fB\-\-base\-file\fR \fIbase-file-name\fR]
+ [\fB\-e\fR|\fB\-\-output\-exp\fR \fIexports-file-name\fR]
+ [\fB\-z\fR|\fB\-\-output\-def\fR \fIdef-file-name\fR]
+ [\fB\-l\fR|\fB\-\-output\-lib\fR \fIlibrary-file-name\fR]
+ [\fB\-y\fR|\fB\-\-output\-delaylib\fR \fIlibrary-file-name\fR]
+ [\fB\-\-export\-all\-symbols\fR] [\fB\-\-no\-export\-all\-symbols\fR]
+ [\fB\-\-exclude\-symbols\fR \fIlist\fR]
+ [\fB\-\-no\-default\-excludes\fR]
+ [\fB\-S\fR|\fB\-\-as\fR \fIpath-to-assembler\fR] [\fB\-f\fR|\fB\-\-as\-flags\fR \fIoptions\fR]
+ [\fB\-D\fR|\fB\-\-dllname\fR \fIname\fR] [\fB\-m\fR|\fB\-\-machine\fR \fImachine\fR]
+ [\fB\-a\fR|\fB\-\-add\-indirect\fR]
+ [\fB\-U\fR|\fB\-\-add\-underscore\fR] [\fB\-\-add\-stdcall\-underscore\fR]
+ [\fB\-k\fR|\fB\-\-kill\-at\fR] [\fB\-A\fR|\fB\-\-add\-stdcall\-alias\fR]
+ [\fB\-p\fR|\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR]
+ [\fB\-x\fR|\fB\-\-no\-idata4\fR] [\fB\-c\fR|\fB\-\-no\-idata5\fR]
+ [\fB\-\-use\-nul\-prefixed\-import\-tables\fR]
+ [\fB\-I\fR|\fB\-\-identify\fR \fIlibrary-file-name\fR] [\fB\-\-identify\-strict\fR]
+ [\fB\-i\fR|\fB\-\-interwork\fR]
+ [\fB\-n\fR|\fB\-\-nodelete\fR] [\fB\-t\fR|\fB\-\-temp\-prefix\fR \fIprefix\fR]
+ [\fB\-v\fR|\fB\-\-verbose\fR]
+ [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [object\-file ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBdlltool\fR reads its inputs, which can come from the \fB\-d\fR and
+\&\fB\-b\fR options as well as object files specified on the command
+line. It then processes these inputs and if the \fB\-e\fR option has
+been specified it creates a exports file. If the \fB\-l\fR option
+has been specified it creates a library file and if the \fB\-z\fR option
+has been specified it creates a def file. Any or all of the \fB\-e\fR,
+\&\fB\-l\fR and \fB\-z\fR options can be present in one invocation of
+dlltool.
+.PP
+When creating a \s-1DLL\s0, along with the source for the \s-1DLL\s0, it is necessary
+to have three other files. \fBdlltool\fR can help with the creation of
+these files.
+.PP
+The first file is a \fI.def\fR file which specifies which functions are
+exported from the \s-1DLL\s0, which functions the \s-1DLL\s0 imports, and so on. This
+is a text file and can be created by hand, or \fBdlltool\fR can be used
+to create it using the \fB\-z\fR option. In this case \fBdlltool\fR
+will scan the object files specified on its command line looking for
+those functions which have been specially marked as being exported and
+put entries for them in the \fI.def\fR file it creates.
+.PP
+In order to mark a function as being exported from a \s-1DLL\s0, it needs to
+have an \fB\-export:<name_of_function>\fR entry in the \fB.drectve\fR
+section of the object file. This can be done in C by using the
+\&\fIasm()\fR operator:
+.PP
+.Vb 2
+\& asm (".section .drectve");
+\& asm (".ascii \e"\-export:my_func\e"");
+\&
+\& int my_func (void) { ... }
+.Ve
+.PP
+The second file needed for \s-1DLL\s0 creation is an exports file. This file
+is linked with the object files that make up the body of the \s-1DLL\s0 and it
+handles the interface between the \s-1DLL\s0 and the outside world. This is a
+binary file and it can be created by giving the \fB\-e\fR option to
+\&\fBdlltool\fR when it is creating or reading in a \fI.def\fR file.
+.PP
+The third file needed for \s-1DLL\s0 creation is the library file that programs
+will link with in order to access the functions in the \s-1DLL\s0 (an `import
+library'). This file can be created by giving the \fB\-l\fR option to
+dlltool when it is creating or reading in a \fI.def\fR file.
+.PP
+If the \fB\-y\fR option is specified, dlltool generates a delay-import
+library that can be used instead of the normal import library to allow
+a program to link to the dll only as soon as an imported function is
+called for the first time. The resulting executable will need to be
+linked to the static delayimp library containing _\|\fI_delayLoadHelper2()\fR,
+which in turn will import LoadLibraryA and GetProcAddress from kernel32.
+.PP
+\&\fBdlltool\fR builds the library file by hand, but it builds the
+exports file by creating temporary files containing assembler statements
+and then assembling these. The \fB\-S\fR command line option can be
+used to specify the path to the assembler that dlltool will use,
+and the \fB\-f\fR option can be used to pass specific flags to that
+assembler. The \fB\-n\fR can be used to prevent dlltool from deleting
+these temporary assembler files when it is done, and if \fB\-n\fR is
+specified twice then this will prevent dlltool from deleting the
+temporary object files it used to build the library.
+.PP
+Here is an example of creating a \s-1DLL\s0 from a source file \fBdll.c\fR and
+also creating a program (from an object file called \fBprogram.o\fR)
+that uses that \s-1DLL:\s0
+.PP
+.Vb 4
+\& gcc \-c dll.c
+\& dlltool \-e exports.o \-l dll.lib dll.o
+\& gcc dll.o exports.o \-o dll.dll
+\& gcc program.o dll.lib \-o program
+.Ve
+.PP
+\&\fBdlltool\fR may also be used to query an existing import library
+to determine the name of the \s-1DLL\s0 to which it is associated. See the
+description of the \fB\-I\fR or \fB\-\-identify\fR option.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-d\fR \fIfilename\fR" 4
+.IX Item "-d filename"
+.PD 0
+.IP "\fB\-\-input\-def\fR \fIfilename\fR" 4
+.IX Item "--input-def filename"
+.PD
+Specifies the name of a \fI.def\fR file to be read in and processed.
+.IP "\fB\-b\fR \fIfilename\fR" 4
+.IX Item "-b filename"
+.PD 0
+.IP "\fB\-\-base\-file\fR \fIfilename\fR" 4
+.IX Item "--base-file filename"
+.PD
+Specifies the name of a base file to be read in and processed. The
+contents of this file will be added to the relocation section in the
+exports file generated by dlltool.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-output\-exp\fR \fIfilename\fR" 4
+.IX Item "--output-exp filename"
+.PD
+Specifies the name of the export file to be created by dlltool.
+.IP "\fB\-z\fR \fIfilename\fR" 4
+.IX Item "-z filename"
+.PD 0
+.IP "\fB\-\-output\-def\fR \fIfilename\fR" 4
+.IX Item "--output-def filename"
+.PD
+Specifies the name of the \fI.def\fR file to be created by dlltool.
+.IP "\fB\-l\fR \fIfilename\fR" 4
+.IX Item "-l filename"
+.PD 0
+.IP "\fB\-\-output\-lib\fR \fIfilename\fR" 4
+.IX Item "--output-lib filename"
+.PD
+Specifies the name of the library file to be created by dlltool.
+.IP "\fB\-y\fR \fIfilename\fR" 4
+.IX Item "-y filename"
+.PD 0
+.IP "\fB\-\-output\-delaylib\fR \fIfilename\fR" 4
+.IX Item "--output-delaylib filename"
+.PD
+Specifies the name of the delay-import library file to be created by dlltool.
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+Treat all global and weak defined symbols found in the input object
+files as symbols to be exported. There is a small list of symbols which
+are not exported by default; see the \fB\-\-no\-default\-excludes\fR
+option. You may add to the list of symbols to not export by using the
+\&\fB\-\-exclude\-symbols\fR option.
+.IP "\fB\-\-no\-export\-all\-symbols\fR" 4
+.IX Item "--no-export-all-symbols"
+Only export symbols explicitly listed in an input \fI.def\fR file or in
+\&\fB.drectve\fR sections in the input object files. This is the default
+behaviour. The \fB.drectve\fR sections are created by \fBdllexport\fR
+attributes in the source code.
+.IP "\fB\-\-exclude\-symbols\fR \fIlist\fR" 4
+.IX Item "--exclude-symbols list"
+Do not export the symbols in \fIlist\fR. This is a list of symbol names
+separated by comma or colon characters. The symbol names should not
+contain a leading underscore. This is only meaningful when
+\&\fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-\-no\-default\-excludes\fR" 4
+.IX Item "--no-default-excludes"
+When \fB\-\-export\-all\-symbols\fR is used, it will by default avoid
+exporting certain special symbols. The current list of symbols to avoid
+exporting is \fBDllMain@12\fR, \fBDllEntryPoint@0\fR,
+\&\fBimpure_ptr\fR. You may use the \fB\-\-no\-default\-excludes\fR option
+to go ahead and export these special symbols. This is only meaningful
+when \fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-S\fR \fIpath\fR" 4
+.IX Item "-S path"
+.PD 0
+.IP "\fB\-\-as\fR \fIpath\fR" 4
+.IX Item "--as path"
+.PD
+Specifies the path, including the filename, of the assembler to be used
+to create the exports file.
+.IP "\fB\-f\fR \fIoptions\fR" 4
+.IX Item "-f options"
+.PD 0
+.IP "\fB\-\-as\-flags\fR \fIoptions\fR" 4
+.IX Item "--as-flags options"
+.PD
+Specifies any specific command line options to be passed to the
+assembler when building the exports file. This option will work even if
+the \fB\-S\fR option is not used. This option only takes one argument,
+and if it occurs more than once on the command line, then later
+occurrences will override earlier occurrences. So if it is necessary to
+pass multiple options to the assembler they should be enclosed in
+double quotes.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+.PD 0
+.IP "\fB\-\-dll\-name\fR \fIname\fR" 4
+.IX Item "--dll-name name"
+.PD
+Specifies the name to be stored in the \fI.def\fR file as the name of
+the \s-1DLL\s0 when the \fB\-e\fR option is used. If this option is not
+present, then the filename given to the \fB\-e\fR option will be
+used as the name of the \s-1DLL\s0.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-machine\fR \fImachine\fR" 4
+.IX Item "-machine machine"
+.PD
+Specifies the type of machine for which the library file should be
+built. \fBdlltool\fR has a built in default type, depending upon how
+it was created, but this option can be used to override that. This is
+normally only useful when creating DLLs for an \s-1ARM\s0 processor, when the
+contents of the \s-1DLL\s0 are actually encode using Thumb instructions.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-add\-indirect\fR" 4
+.IX Item "--add-indirect"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add a section which allows the exported functions to be
+referenced without using the import library. Whatever the hell that
+means!
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-add\-underscore\fR" 4
+.IX Item "--add-underscore"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of \fIall\fR exported symbols.
+.IP "\fB\-\-add\-stdcall\-underscore\fR" 4
+.IX Item "--add-stdcall-underscore"
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of exported \fIstdcall\fR
+functions. Variable names and non-stdcall function names are not modified.
+This option is useful when creating GNU-compatible import libs for third
+party DLLs that were built with MS-Windows tools.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+.PD 0
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should not append the string \fB@ <number>\fR. These numbers are
+called ordinal numbers and they represent another way of accessing the
+function in a \s-1DLL\s0, other than by name.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add aliases for stdcall symbols without \fB@ <number>\fR
+in addition to the symbols with \fB@ <number>\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR" 4
+.IX Item "--ext-prefix-alias prefix"
+.PD
+Causes \fBdlltool\fR to create external aliases for all \s-1DLL\s0
+imports with the specified prefix. The aliases are created for both
+external and import symbols with no leading underscore.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-no\-idata4\fR" 4
+.IX Item "--no-idata4"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata4\*(C'\fR section. This is for compatibility
+with certain operating systems.
+.IP "\fB\-\-use\-nul\-prefixed\-import\-tables\fR" 4
+.IX Item "--use-nul-prefixed-import-tables"
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should prefix the \f(CW\*(C`.idata4\*(C'\fR and \f(CW\*(C`.idata5\*(C'\fR by zero an
+element. This emulates old gnu import library generation of
+\&\f(CW\*(C`dlltool\*(C'\fR. By default this option is turned off.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-no\-idata5\fR" 4
+.IX Item "--no-idata5"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata5\*(C'\fR section. This is for compatibility
+with certain operating systems.
+.IP "\fB\-I\fR \fIfilename\fR" 4
+.IX Item "-I filename"
+.PD 0
+.IP "\fB\-\-identify\fR \fIfilename\fR" 4
+.IX Item "--identify filename"
+.PD
+Specifies that \fBdlltool\fR should inspect the import library
+indicated by \fIfilename\fR and report, on \f(CW\*(C`stdout\*(C'\fR, the name(s)
+of the associated \s-1DLL\s0(s). This can be performed in addition to any
+other operations indicated by the other options and arguments.
+\&\fBdlltool\fR fails if the import library does not exist or is not
+actually an import library. See also \fB\-\-identify\-strict\fR.
+.IP "\fB\-\-identify\-strict\fR" 4
+.IX Item "--identify-strict"
+Modifies the behavior of the \fB\-\-identify\fR option, such
+that an error is reported if \fIfilename\fR is associated with
+more than one \s-1DLL\s0.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-interwork\fR" 4
+.IX Item "--interwork"
+.PD
+Specifies that \fBdlltool\fR should mark the objects in the library
+file and exports file that it produces as supporting interworking
+between \s-1ARM\s0 and Thumb code.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nodelete\fR" 4
+.IX Item "--nodelete"
+.PD
+Makes \fBdlltool\fR preserve the temporary assembler files it used to
+create the exports file. If this option is repeated then dlltool will
+also preserve the temporary object files it uses to create the library
+file.
+.IP "\fB\-t\fR \fIprefix\fR" 4
+.IX Item "-t prefix"
+.PD 0
+.IP "\fB\-\-temp\-prefix\fR \fIprefix\fR" 4
+.IX Item "--temp-prefix prefix"
+.PD
+Makes \fBdlltool\fR use \fIprefix\fR when constructing the names of
+temporary assembler and object files. By default, the temp file prefix
+is generated from the pid.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Make dlltool describe what it is doing.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Displays dlltool's version number and then exits.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+The Info pages for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1
new file mode 100644
index 0000000..548b46d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1
@@ -0,0 +1,381 @@
+.\" Copyright (C) 1991, 1999, 2010 Free Software Foundation, Inc.
+.\" See section COPYING for conditions for redistribution
+.\" $Id: gdb.1,v 1.4 1999/01/05 00:50:50 jsm Exp $
+.TH gdb 1 "22may2002" "GNU Tools" "GNU Tools"
+.SH NAME
+gdb \- The GNU Debugger
+.SH SYNOPSIS
+.na
+.TP
+.B gdb
+.RB "[\|" \-help "\|]"
+.RB "[\|" \-nx "\|]"
+.RB "[\|" \-q "\|]"
+.RB "[\|" \-batch "\|]"
+.RB "[\|" \-cd=\c
+.I dir\c
+\|]
+.RB "[\|" \-f "\|]"
+.RB "[\|" "\-b\ "\c
+.IR bps "\|]"
+.RB "[\|" "\-tty="\c
+.IR dev "\|]"
+.RB "[\|" "\-s "\c
+.I symfile\c
+\&\|]
+.RB "[\|" "\-e "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-se "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-c "\c
+.I core\c
+\&\|]
+.RB "[\|" "\-x "\c
+.I cmds\c
+\&\|]
+.RB "[\|" "\-d "\c
+.I dir\c
+\&\|]
+.RB "[\|" \c
+.I prog\c
+.RB "[\|" \c
+.IR core \||\| procID\c
+\&\|]\&\|]
+.ad b
+.SH DESCRIPTION
+The purpose of a debugger such as GDB is to allow you to see what is
+going on ``inside'' another program while it executes\(em\&or what another
+program was doing at the moment it crashed.
+
+GDB can do four main kinds of things (plus other things in support of
+these) to help you catch bugs in the act:
+
+.TP
+\ \ \ \(bu
+Start your program, specifying anything that might affect its behavior.
+
+.TP
+\ \ \ \(bu
+Make your program stop on specified conditions.
+
+.TP
+\ \ \ \(bu
+Examine what has happened, when your program has stopped.
+
+.TP
+\ \ \ \(bu
+Change things in your program, so you can experiment with correcting the
+effects of one bug and go on to learn about another.
+.PP
+
+You can use GDB to debug programs written in C, C++, and Modula-2.
+Fortran support will be added when a GNU Fortran compiler is ready.
+
+GDB is invoked with the shell command \c
+.B gdb\c
+\&. Once started, it reads
+commands from the terminal until you tell it to exit with the GDB
+command \c
+.B quit\c
+\&. You can get online help from \c
+.B gdb\c
+\& itself
+by using the command \c
+.B help\c
+\&.
+
+You can run \c
+.B gdb\c
+\& with no arguments or options; but the most
+usual way to start GDB is with one argument or two, specifying an
+executable program as the argument:
+.sp
+.br
+gdb\ program
+.br
+.sp
+
+You can also start with both an executable program and a core file specified:
+.sp
+.br
+gdb\ program\ core
+.br
+.sp
+
+You can, instead, specify a process ID as a second argument, if you want
+to debug a running process:
+.sp
+.br
+gdb\ program\ 1234
+.br
+.sp
+
+would attach GDB to process \c
+.B 1234\c
+\& (unless you also have a file
+named `\|\c
+.B 1234\c
+\&\|'; GDB does check for a core file first).
+
+Here are some of the most frequently needed GDB commands:
+.TP
+.B break \fR[\|\fIfile\fB:\fR\|]\fIfunction
+\&
+Set a breakpoint at \c
+.I function\c
+\& (in \c
+.I file\c
+\&).
+.TP
+.B run \fR[\|\fIarglist\fR\|]
+Start your program (with \c
+.I arglist\c
+\&, if specified).
+.TP
+.B bt
+Backtrace: display the program stack.
+.TP
+.BI print " expr"\c
+\&
+Display the value of an expression.
+.TP
+.B c
+Continue running your program (after stopping, e.g. at a breakpoint).
+.TP
+.B next
+Execute next program line (after stopping); step \c
+.I over\c
+\& any
+function calls in the line.
+.TP
+.B edit \fR[\|\fIfile\fB:\fR\|]\fIfunction
+look at the program line where it is presently stopped.
+.TP
+.B list \fR[\|\fIfile\fB:\fR\|]\fIfunction
+type the text of the program in the vicinity of where it is presently stopped.
+.TP
+.B step
+Execute next program line (after stopping); step \c
+.I into\c
+\& any
+function calls in the line.
+.TP
+.B help \fR[\|\fIname\fR\|]
+Show information about GDB command \c
+.I name\c
+\&, or general information
+about using GDB.
+.TP
+.B quit
+Exit from GDB.
+.PP
+For full details on GDB, see \c
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+\&, by Richard M. Stallman and Roland H. Pesch. The same text is available online
+as the \c
+.B gdb\c
+\& entry in the \c
+.B info\c
+\& program.
+.SH OPTIONS
+Any arguments other than options specify an executable
+file and core file (or process ID); that is, the first argument
+encountered with no
+associated option flag is equivalent to a `\|\c
+.B \-se\c
+\&\|' option, and the
+second, if any, is equivalent to a `\|\c
+.B \-c\c
+\&\|' option if it's the name of a file. Many options have
+both long and short forms; both are shown here. The long forms are also
+recognized if you truncate them, so long as enough of the option is
+present to be unambiguous. (If you prefer, you can flag option
+arguments with `\|\c
+.B +\c
+\&\|' rather than `\|\c
+.B \-\c
+\&\|', though we illustrate the
+more usual convention.)
+
+All the options and command line arguments you give are processed
+in sequential order. The order makes a difference when the
+`\|\c
+.B \-x\c
+\&\|' option is used.
+
+.TP
+.B \-help
+.TP
+.B \-h
+List all options, with brief explanations.
+
+.TP
+.BI "\-symbols=" "file"\c
+.TP
+.BI "\-s " "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\&.
+
+.TP
+.B \-write
+Enable writing into executable and core files.
+
+.TP
+.BI "\-exec=" "file"\c
+.TP
+.BI "\-e " "file"\c
+\&
+Use file \c
+.I file\c
+\& as the executable file to execute when
+appropriate, and for examining pure data in conjunction with a core
+dump.
+
+.TP
+.BI "\-se=" "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\& and use it as the executable
+file.
+
+.TP
+.BI "\-core=" "file"\c
+.TP
+.BI "\-c " "file"\c
+\&
+Use file \c
+.I file\c
+\& as a core dump to examine.
+
+.TP
+.BI "\-command=" "file"\c
+.TP
+.BI "\-x " "file"\c
+\&
+Execute GDB commands from file \c
+.I file\c
+\&.
+
+.TP
+.BI "\-directory=" "directory"\c
+.TP
+.BI "\-d " "directory"\c
+\&
+Add \c
+.I directory\c
+\& to the path to search for source files.
+.PP
+
+.TP
+.B \-nx
+.TP
+.B \-n
+Do not execute commands from any `\|\c
+.B .gdbinit\c
+\&\|' initialization files.
+Normally, the commands in these files are executed after all the
+command options and arguments have been processed.
+
+
+.TP
+.B \-quiet
+.TP
+.B \-q
+``Quiet''. Do not print the introductory and copyright messages. These
+messages are also suppressed in batch mode.
+
+.TP
+.B \-batch
+Run in batch mode. Exit with status \c
+.B 0\c
+\& after processing all the command
+files specified with `\|\c
+.B \-x\c
+\&\|' (and `\|\c
+.B .gdbinit\c
+\&\|', if not inhibited).
+Exit with nonzero status if an error occurs in executing the GDB
+commands in the command files.
+
+Batch mode may be useful for running GDB as a filter, for example to
+download and run a program on another computer; in order to make this
+more useful, the message
+.sp
+.br
+Program\ exited\ normally.
+.br
+.sp
+
+(which is ordinarily issued whenever a program running under GDB control
+terminates) is not issued when running in batch mode.
+
+.TP
+.BI "\-cd=" "directory"\c
+\&
+Run GDB using \c
+.I directory\c
+\& as its working directory,
+instead of the current directory.
+
+.TP
+.B \-fullname
+.TP
+.B \-f
+Emacs sets this option when it runs GDB as a subprocess. It tells GDB
+to output the full file name and line number in a standard,
+recognizable fashion each time a stack frame is displayed (which
+includes each time the program stops). This recognizable format looks
+like two `\|\c
+.B \032\c
+\&\|' characters, followed by the file name, line number
+and character position separated by colons, and a newline. The
+Emacs-to-GDB interface program uses the two `\|\c
+.B \032\c
+\&\|' characters as
+a signal to display the source code for the frame.
+
+.TP
+.BI "\-b " "bps"\c
+\&
+Set the line speed (baud rate or bits per second) of any serial
+interface used by GDB for remote debugging.
+
+.TP
+.BI "\-tty=" "device"\c
+\&
+Run using \c
+.I device\c
+\& for your program's standard input and output.
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch, July 1991.
+.SH COPYING
+Copyright (c) 1991, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+.PP
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided that the
+entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+.PP
+Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions, except that this permission notice may be included in
+translations approved by the Free Software Foundation instead of in
+the original English.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1
new file mode 100644
index 0000000..548b46d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1
@@ -0,0 +1,381 @@
+.\" Copyright (C) 1991, 1999, 2010 Free Software Foundation, Inc.
+.\" See section COPYING for conditions for redistribution
+.\" $Id: gdb.1,v 1.4 1999/01/05 00:50:50 jsm Exp $
+.TH gdb 1 "22may2002" "GNU Tools" "GNU Tools"
+.SH NAME
+gdb \- The GNU Debugger
+.SH SYNOPSIS
+.na
+.TP
+.B gdb
+.RB "[\|" \-help "\|]"
+.RB "[\|" \-nx "\|]"
+.RB "[\|" \-q "\|]"
+.RB "[\|" \-batch "\|]"
+.RB "[\|" \-cd=\c
+.I dir\c
+\|]
+.RB "[\|" \-f "\|]"
+.RB "[\|" "\-b\ "\c
+.IR bps "\|]"
+.RB "[\|" "\-tty="\c
+.IR dev "\|]"
+.RB "[\|" "\-s "\c
+.I symfile\c
+\&\|]
+.RB "[\|" "\-e "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-se "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-c "\c
+.I core\c
+\&\|]
+.RB "[\|" "\-x "\c
+.I cmds\c
+\&\|]
+.RB "[\|" "\-d "\c
+.I dir\c
+\&\|]
+.RB "[\|" \c
+.I prog\c
+.RB "[\|" \c
+.IR core \||\| procID\c
+\&\|]\&\|]
+.ad b
+.SH DESCRIPTION
+The purpose of a debugger such as GDB is to allow you to see what is
+going on ``inside'' another program while it executes\(em\&or what another
+program was doing at the moment it crashed.
+
+GDB can do four main kinds of things (plus other things in support of
+these) to help you catch bugs in the act:
+
+.TP
+\ \ \ \(bu
+Start your program, specifying anything that might affect its behavior.
+
+.TP
+\ \ \ \(bu
+Make your program stop on specified conditions.
+
+.TP
+\ \ \ \(bu
+Examine what has happened, when your program has stopped.
+
+.TP
+\ \ \ \(bu
+Change things in your program, so you can experiment with correcting the
+effects of one bug and go on to learn about another.
+.PP
+
+You can use GDB to debug programs written in C, C++, and Modula-2.
+Fortran support will be added when a GNU Fortran compiler is ready.
+
+GDB is invoked with the shell command \c
+.B gdb\c
+\&. Once started, it reads
+commands from the terminal until you tell it to exit with the GDB
+command \c
+.B quit\c
+\&. You can get online help from \c
+.B gdb\c
+\& itself
+by using the command \c
+.B help\c
+\&.
+
+You can run \c
+.B gdb\c
+\& with no arguments or options; but the most
+usual way to start GDB is with one argument or two, specifying an
+executable program as the argument:
+.sp
+.br
+gdb\ program
+.br
+.sp
+
+You can also start with both an executable program and a core file specified:
+.sp
+.br
+gdb\ program\ core
+.br
+.sp
+
+You can, instead, specify a process ID as a second argument, if you want
+to debug a running process:
+.sp
+.br
+gdb\ program\ 1234
+.br
+.sp
+
+would attach GDB to process \c
+.B 1234\c
+\& (unless you also have a file
+named `\|\c
+.B 1234\c
+\&\|'; GDB does check for a core file first).
+
+Here are some of the most frequently needed GDB commands:
+.TP
+.B break \fR[\|\fIfile\fB:\fR\|]\fIfunction
+\&
+Set a breakpoint at \c
+.I function\c
+\& (in \c
+.I file\c
+\&).
+.TP
+.B run \fR[\|\fIarglist\fR\|]
+Start your program (with \c
+.I arglist\c
+\&, if specified).
+.TP
+.B bt
+Backtrace: display the program stack.
+.TP
+.BI print " expr"\c
+\&
+Display the value of an expression.
+.TP
+.B c
+Continue running your program (after stopping, e.g. at a breakpoint).
+.TP
+.B next
+Execute next program line (after stopping); step \c
+.I over\c
+\& any
+function calls in the line.
+.TP
+.B edit \fR[\|\fIfile\fB:\fR\|]\fIfunction
+look at the program line where it is presently stopped.
+.TP
+.B list \fR[\|\fIfile\fB:\fR\|]\fIfunction
+type the text of the program in the vicinity of where it is presently stopped.
+.TP
+.B step
+Execute next program line (after stopping); step \c
+.I into\c
+\& any
+function calls in the line.
+.TP
+.B help \fR[\|\fIname\fR\|]
+Show information about GDB command \c
+.I name\c
+\&, or general information
+about using GDB.
+.TP
+.B quit
+Exit from GDB.
+.PP
+For full details on GDB, see \c
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+\&, by Richard M. Stallman and Roland H. Pesch. The same text is available online
+as the \c
+.B gdb\c
+\& entry in the \c
+.B info\c
+\& program.
+.SH OPTIONS
+Any arguments other than options specify an executable
+file and core file (or process ID); that is, the first argument
+encountered with no
+associated option flag is equivalent to a `\|\c
+.B \-se\c
+\&\|' option, and the
+second, if any, is equivalent to a `\|\c
+.B \-c\c
+\&\|' option if it's the name of a file. Many options have
+both long and short forms; both are shown here. The long forms are also
+recognized if you truncate them, so long as enough of the option is
+present to be unambiguous. (If you prefer, you can flag option
+arguments with `\|\c
+.B +\c
+\&\|' rather than `\|\c
+.B \-\c
+\&\|', though we illustrate the
+more usual convention.)
+
+All the options and command line arguments you give are processed
+in sequential order. The order makes a difference when the
+`\|\c
+.B \-x\c
+\&\|' option is used.
+
+.TP
+.B \-help
+.TP
+.B \-h
+List all options, with brief explanations.
+
+.TP
+.BI "\-symbols=" "file"\c
+.TP
+.BI "\-s " "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\&.
+
+.TP
+.B \-write
+Enable writing into executable and core files.
+
+.TP
+.BI "\-exec=" "file"\c
+.TP
+.BI "\-e " "file"\c
+\&
+Use file \c
+.I file\c
+\& as the executable file to execute when
+appropriate, and for examining pure data in conjunction with a core
+dump.
+
+.TP
+.BI "\-se=" "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\& and use it as the executable
+file.
+
+.TP
+.BI "\-core=" "file"\c
+.TP
+.BI "\-c " "file"\c
+\&
+Use file \c
+.I file\c
+\& as a core dump to examine.
+
+.TP
+.BI "\-command=" "file"\c
+.TP
+.BI "\-x " "file"\c
+\&
+Execute GDB commands from file \c
+.I file\c
+\&.
+
+.TP
+.BI "\-directory=" "directory"\c
+.TP
+.BI "\-d " "directory"\c
+\&
+Add \c
+.I directory\c
+\& to the path to search for source files.
+.PP
+
+.TP
+.B \-nx
+.TP
+.B \-n
+Do not execute commands from any `\|\c
+.B .gdbinit\c
+\&\|' initialization files.
+Normally, the commands in these files are executed after all the
+command options and arguments have been processed.
+
+
+.TP
+.B \-quiet
+.TP
+.B \-q
+``Quiet''. Do not print the introductory and copyright messages. These
+messages are also suppressed in batch mode.
+
+.TP
+.B \-batch
+Run in batch mode. Exit with status \c
+.B 0\c
+\& after processing all the command
+files specified with `\|\c
+.B \-x\c
+\&\|' (and `\|\c
+.B .gdbinit\c
+\&\|', if not inhibited).
+Exit with nonzero status if an error occurs in executing the GDB
+commands in the command files.
+
+Batch mode may be useful for running GDB as a filter, for example to
+download and run a program on another computer; in order to make this
+more useful, the message
+.sp
+.br
+Program\ exited\ normally.
+.br
+.sp
+
+(which is ordinarily issued whenever a program running under GDB control
+terminates) is not issued when running in batch mode.
+
+.TP
+.BI "\-cd=" "directory"\c
+\&
+Run GDB using \c
+.I directory\c
+\& as its working directory,
+instead of the current directory.
+
+.TP
+.B \-fullname
+.TP
+.B \-f
+Emacs sets this option when it runs GDB as a subprocess. It tells GDB
+to output the full file name and line number in a standard,
+recognizable fashion each time a stack frame is displayed (which
+includes each time the program stops). This recognizable format looks
+like two `\|\c
+.B \032\c
+\&\|' characters, followed by the file name, line number
+and character position separated by colons, and a newline. The
+Emacs-to-GDB interface program uses the two `\|\c
+.B \032\c
+\&\|' characters as
+a signal to display the source code for the frame.
+
+.TP
+.BI "\-b " "bps"\c
+\&
+Set the line speed (baud rate or bits per second) of any serial
+interface used by GDB for remote debugging.
+
+.TP
+.BI "\-tty=" "device"\c
+\&
+Run using \c
+.I device\c
+\& for your program's standard input and output.
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch, July 1991.
+.SH COPYING
+Copyright (c) 1991, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+.PP
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided that the
+entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+.PP
+Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions, except that this permission notice may be included in
+translations approved by the Free Software Foundation instead of in
+the original English.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1
new file mode 100644
index 0000000..536c6a2
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1
@@ -0,0 +1,772 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPROF 1"
+.TH GPROF 1 "2009-10-16" "binutils-2.20" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gprof \- display call graph profile data
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gprof [ \-[abcDhilLrsTvwxyz] ] [ \-[ACeEfFJnNOpPqQZ][\fIname\fR] ]
+ [ \-I \fIdirs\fR ] [ \-d[\fInum\fR] ] [ \-k \fIfrom/to\fR ]
+ [ \-m \fImin-count\fR ] [ \-R \fImap_file\fR ] [ \-t \fItable-length\fR ]
+ [ \-\-[no\-]annotated\-source[=\fIname\fR] ]
+ [ \-\-[no\-]exec\-counts[=\fIname\fR] ]
+ [ \-\-[no\-]flat\-profile[=\fIname\fR] ] [ \-\-[no\-]graph[=\fIname\fR] ]
+ [ \-\-[no\-]time=\fIname\fR] [ \-\-all\-lines ] [ \-\-brief ]
+ [ \-\-debug[=\fIlevel\fR] ] [ \-\-function\-ordering ]
+ [ \-\-file\-ordering \fImap_file\fR ] [ \-\-directory\-path=\fIdirs\fR ]
+ [ \-\-display\-unused\-functions ] [ \-\-file\-format=\fIname\fR ]
+ [ \-\-file\-info ] [ \-\-help ] [ \-\-line ] [ \-\-min\-count=\fIn\fR ]
+ [ \-\-no\-static ] [ \-\-print\-path ] [ \-\-separate\-files ]
+ [ \-\-static\-call\-graph ] [ \-\-sum ] [ \-\-table\-length=\fIlen\fR ]
+ [ \-\-traditional ] [ \-\-version ] [ \-\-width=\fIn\fR ]
+ [ \-\-ignore\-non\-functions ] [ \-\-demangle[=\fI\s-1STYLE\s0\fR] ]
+ [ \-\-no\-demangle ] [\-\-external\-symbol\-table=name]
+ [ \fIimage-file\fR ] [ \fIprofile-file\fR ... ]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`gprof\*(C'\fR produces an execution profile of C, Pascal, or Fortran77
+programs. The effect of called routines is incorporated in the profile
+of each caller. The profile data is taken from the call graph profile file
+(\fIgmon.out\fR default) which is created by programs
+that are compiled with the \fB\-pg\fR option of
+\&\f(CW\*(C`cc\*(C'\fR, \f(CW\*(C`pc\*(C'\fR, and \f(CW\*(C`f77\*(C'\fR.
+The \fB\-pg\fR option also links in versions of the library routines
+that are compiled for profiling. \f(CW\*(C`Gprof\*(C'\fR reads the given object
+file (the default is \f(CW\*(C`a.out\*(C'\fR) and establishes the relation between
+its symbol table and the call graph profile from \fIgmon.out\fR.
+If more than one profile file is specified, the \f(CW\*(C`gprof\*(C'\fR
+output shows the sum of the profile information in the given profile files.
+.PP
+\&\f(CW\*(C`Gprof\*(C'\fR calculates the amount of time spent in each routine.
+Next, these times are propagated along the edges of the call graph.
+Cycles are discovered, and calls into a cycle are made to share the time
+of the cycle.
+.PP
+Several forms of output are available from the analysis.
+.PP
+The \fIflat profile\fR shows how much time your program spent in each function,
+and how many times that function was called. If you simply want to know
+which functions burn most of the cycles, it is stated concisely here.
+.PP
+The \fIcall graph\fR shows, for each function, which functions called it, which
+other functions it called, and how many times. There is also an estimate
+of how much time was spent in the subroutines of each function. This can
+suggest places where you might try to eliminate function calls that use a
+lot of time.
+.PP
+The \fIannotated source\fR listing is a copy of the program's
+source code, labeled with the number of times each line of the
+program was executed.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+These options specify which of several output formats
+\&\f(CW\*(C`gprof\*(C'\fR should produce.
+.PP
+Many of these options take an optional \fIsymspec\fR to specify
+functions to be included or excluded. These options can be
+specified multiple times, with different symspecs, to include
+or exclude sets of symbols.
+.PP
+Specifying any of these options overrides the default (\fB\-p \-q\fR),
+which prints a flat profile and call graph analysis
+for all functions.
+.ie n .IP """\-A[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-A[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-A[symspec]"
+.PD 0
+.ie n .IP """\-\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--annotated-source[=symspec]"
+.PD
+The \fB\-A\fR option causes \f(CW\*(C`gprof\*(C'\fR to print annotated source code.
+If \fIsymspec\fR is specified, print output only for matching symbols.
+.ie n .IP """\-b""" 4
+.el .IP "\f(CW\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.ie n .IP """\-\-brief""" 4
+.el .IP "\f(CW\-\-brief\fR" 4
+.IX Item "--brief"
+.PD
+If the \fB\-b\fR option is given, \f(CW\*(C`gprof\*(C'\fR doesn't print the
+verbose blurbs that try to explain the meaning of all of the fields in
+the tables. This is useful if you intend to print out the output, or
+are tired of seeing the blurbs.
+.ie n .IP """\-C[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-C[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-C[symspec]"
+.PD 0
+.ie n .IP """\-\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--exec-counts[=symspec]"
+.PD
+The \fB\-C\fR option causes \f(CW\*(C`gprof\*(C'\fR to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally only for matching symbols.
+.Sp
+If the profile data file contains basic-block count records, specifying
+the \fB\-l\fR option, along with \fB\-C\fR, will cause basic-block
+execution counts to be tallied and displayed.
+.ie n .IP """\-i""" 4
+.el .IP "\f(CW\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.ie n .IP """\-\-file\-info""" 4
+.el .IP "\f(CW\-\-file\-info\fR" 4
+.IX Item "--file-info"
+.PD
+The \fB\-i\fR option causes \f(CW\*(C`gprof\*(C'\fR to display summary information
+about the profile data file(s) and then exit. The number of histogram,
+call graph, and basic-block count records is displayed.
+.ie n .IP """\-I \f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-I \f(CIdirs\f(CW\fR" 4
+.IX Item "-I dirs"
+.PD 0
+.ie n .IP """\-\-directory\-path=\f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-\-directory\-path=\f(CIdirs\f(CW\fR" 4
+.IX Item "--directory-path=dirs"
+.PD
+The \fB\-I\fR option specifies a list of search directories in
+which to find source files. Environment variable \fI\s-1GPROF_PATH\s0\fR
+can also be used to convey this information.
+Used mostly for annotated source output.
+.ie n .IP """\-J[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-J[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-J[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-annotated-source[=symspec]"
+.PD
+The \fB\-J\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print annotated source code.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints annotated source,
+but excludes matching symbols.
+.ie n .IP """\-L""" 4
+.el .IP "\f(CW\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.ie n .IP """\-\-print\-path""" 4
+.el .IP "\f(CW\-\-print\-path\fR" 4
+.IX Item "--print-path"
+.PD
+Normally, source filenames are printed with the path
+component suppressed. The \fB\-L\fR option causes \f(CW\*(C`gprof\*(C'\fR
+to print the full pathname of
+source filenames, which is determined
+from symbolic debugging information in the image file
+and is relative to the directory in which the compiler
+was invoked.
+.ie n .IP """\-p[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-p[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-p[symspec]"
+.PD 0
+.ie n .IP """\-\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--flat-profile[=symspec]"
+.PD
+The \fB\-p\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a flat profile.
+If \fIsymspec\fR is specified, print flat profile only for matching symbols.
+.ie n .IP """\-P[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-P[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-P[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-flat-profile[=symspec]"
+.PD
+The \fB\-P\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing a flat profile.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a flat profile,
+but excludes matching symbols.
+.ie n .IP """\-q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-q[symspec]"
+.PD 0
+.ie n .IP """\-\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--graph[=symspec]"
+.PD
+The \fB\-q\fR option causes \f(CW\*(C`gprof\*(C'\fR to print the call graph analysis.
+If \fIsymspec\fR is specified, print call graph only for matching symbols
+and their children.
+.ie n .IP """\-Q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Q[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-graph[=symspec]"
+.PD
+The \fB\-Q\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing the
+call graph.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a call graph,
+but excludes matching symbols.
+.ie n .IP """\-t""" 4
+.el .IP "\f(CW\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.ie n .IP """\-\-table\-length=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-table\-length=\f(CInum\f(CW\fR" 4
+.IX Item "--table-length=num"
+.PD
+The \fB\-t\fR option causes the \fInum\fR most active source lines in
+each source file to be listed when source annotation is enabled. The
+default is 10.
+.ie n .IP """\-y""" 4
+.el .IP "\f(CW\-y\fR" 4
+.IX Item "-y"
+.PD 0
+.ie n .IP """\-\-separate\-files""" 4
+.el .IP "\f(CW\-\-separate\-files\fR" 4
+.IX Item "--separate-files"
+.PD
+This option affects annotated source output only.
+Normally, \f(CW\*(C`gprof\*(C'\fR prints annotated source files
+to standard-output. If this option is specified,
+annotated source for a file named \fIpath/\fIfilename\fI\fR
+is generated in the file \fI\fIfilename\fI\-ann\fR. If the underlying
+file system would truncate \fI\fIfilename\fI\-ann\fR so that it
+overwrites the original \fI\fIfilename\fI\fR, \f(CW\*(C`gprof\*(C'\fR generates
+annotated source in the file \fI\fIfilename\fI.ann\fR instead (if the
+original file name has an extension, that extension is \fIreplaced\fR
+with \fI.ann\fR).
+.ie n .IP """\-Z[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Z[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Z[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-exec-counts[=symspec]"
+.PD
+The \fB\-Z\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally, but exclude matching symbols.
+.ie n .IP """\-r""" 4
+.el .IP "\f(CW\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.ie n .IP """\-\-function\-ordering""" 4
+.el .IP "\f(CW\-\-function\-ordering\fR" 4
+.IX Item "--function-ordering"
+.PD
+The \fB\-\-function\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested function ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which support arbitrary
+ordering of functions in an executable.
+.Sp
+The exact details of how to force the linker to place functions
+in a particular order is system dependent and out of the scope of this
+manual.
+.ie n .IP """\-R \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-R \f(CImap_file\f(CW\fR" 4
+.IX Item "-R map_file"
+.PD 0
+.ie n .IP """\-\-file\-ordering \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-\-file\-ordering \f(CImap_file\f(CW\fR" 4
+.IX Item "--file-ordering map_file"
+.PD
+The \fB\-\-file\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested .o link line ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which do not support arbitrary
+ordering of functions in an executable.
+.Sp
+Use of the \fB\-a\fR argument is highly recommended with this option.
+.Sp
+The \fImap_file\fR argument is a pathname to a file which provides
+function name to object file mappings. The format of the file is similar to
+the output of the program \f(CW\*(C`nm\*(C'\fR.
+.Sp
+.Vb 8
+\& c\-parse.o:00000000 T yyparse
+\& c\-parse.o:00000004 C yyerrflag
+\& c\-lang.o:00000000 T maybe_objc_method_name
+\& c\-lang.o:00000000 T print_lang_statistics
+\& c\-lang.o:00000000 T recognize_objc_keyword
+\& c\-decl.o:00000000 T print_lang_identifier
+\& c\-decl.o:00000000 T print_lang_type
+\& ...
+.Ve
+.Sp
+To create a \fImap_file\fR with \s-1GNU\s0 \f(CW\*(C`nm\*(C'\fR, type a command like
+\&\f(CW\*(C`nm \-\-extern\-only \-\-defined\-only \-v \-\-print\-file\-name program\-name\*(C'\fR.
+.ie n .IP """\-T""" 4
+.el .IP "\f(CW\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.ie n .IP """\-\-traditional""" 4
+.el .IP "\f(CW\-\-traditional\fR" 4
+.IX Item "--traditional"
+.PD
+The \fB\-T\fR option causes \f(CW\*(C`gprof\*(C'\fR to print its output in
+\&\*(L"traditional\*(R" \s-1BSD\s0 style.
+.ie n .IP """\-w \f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-w \f(CIwidth\f(CW\fR" 4
+.IX Item "-w width"
+.PD 0
+.ie n .IP """\-\-width=\f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-\-width=\f(CIwidth\f(CW\fR" 4
+.IX Item "--width=width"
+.PD
+Sets width of output lines to \fIwidth\fR.
+Currently only used when printing the function index at the bottom
+of the call graph.
+.ie n .IP """\-x""" 4
+.el .IP "\f(CW\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.ie n .IP """\-\-all\-lines""" 4
+.el .IP "\f(CW\-\-all\-lines\fR" 4
+.IX Item "--all-lines"
+.PD
+This option affects annotated source output only.
+By default, only the lines at the beginning of a basic-block
+are annotated. If this option is specified, every line in
+a basic-block is annotated by repeating the annotation for the
+first line. This behavior is similar to \f(CW\*(C`tcov\*(C'\fR's \fB\-a\fR.
+.ie n .IP """\-\-demangle[=\f(CIstyle\f(CW]""" 4
+.el .IP "\f(CW\-\-demangle[=\f(CIstyle\f(CW]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.ie n .IP """\-\-no\-demangle""" 4
+.el .IP "\f(CW\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether \*(C+ symbol names should be demangled when
+printing output. The default is to demangle symbols. The
+\&\f(CW\*(C`\-\-no\-demangle\*(C'\fR option may be used to turn off demangling. Different
+compilers have different mangling styles. The optional demangling style
+argument can be used to choose an appropriate demangling style for your
+compiler.
+.Sh "Analysis Options"
+.IX Subsection "Analysis Options"
+.ie n .IP """\-a""" 4
+.el .IP "\f(CW\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.ie n .IP """\-\-no\-static""" 4
+.el .IP "\f(CW\-\-no\-static\fR" 4
+.IX Item "--no-static"
+.PD
+The \fB\-a\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress the printing of
+statically declared (private) functions. (These are functions whose
+names are not listed as global, and which are not visible outside the
+file/function/block where they were defined.) Time spent in these
+functions, calls to/from them, etc., will all be attributed to the
+function that was loaded directly before it in the executable file.
+This option affects both the flat profile and the call graph.
+.ie n .IP """\-c""" 4
+.el .IP "\f(CW\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.ie n .IP """\-\-static\-call\-graph""" 4
+.el .IP "\f(CW\-\-static\-call\-graph\fR" 4
+.IX Item "--static-call-graph"
+.PD
+The \fB\-c\fR option causes the call graph of the program to be
+augmented by a heuristic which examines the text space of the object
+file and identifies function calls in the binary machine code.
+Since normal call graph records are only generated when functions are
+entered, this option identifies children that could have been called,
+but never were. Calls to functions that were not compiled with
+profiling enabled are also identified, but only if symbol table
+entries are present for them.
+Calls to dynamic library routines are typically \fInot\fR found
+by this option.
+Parents or children identified via this heuristic
+are indicated in the call graph with call counts of \fB0\fR.
+.ie n .IP """\-D""" 4
+.el .IP "\f(CW\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.ie n .IP """\-\-ignore\-non\-functions""" 4
+.el .IP "\f(CW\-\-ignore\-non\-functions\fR" 4
+.IX Item "--ignore-non-functions"
+.PD
+The \fB\-D\fR option causes \f(CW\*(C`gprof\*(C'\fR to ignore symbols which
+are not known to be functions. This option will give more accurate
+profile data on systems where it is supported (Solaris and \s-1HPUX\s0 for
+example).
+.ie n .IP """\-k \f(CIfrom\f(CW/\f(CIto\f(CW""" 4
+.el .IP "\f(CW\-k \f(CIfrom\f(CW/\f(CIto\f(CW\fR" 4
+.IX Item "-k from/to"
+The \fB\-k\fR option allows you to delete from the call graph any arcs from
+symbols matching symspec \fIfrom\fR to those matching symspec \fIto\fR.
+.ie n .IP """\-l""" 4
+.el .IP "\f(CW\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.ie n .IP """\-\-line""" 4
+.el .IP "\f(CW\-\-line\fR" 4
+.IX Item "--line"
+.PD
+The \fB\-l\fR option enables line-by-line profiling, which causes
+histogram hits to be charged to individual source code lines,
+instead of functions. This feature only works with programs compiled
+by older versions of the \f(CW\*(C`gcc\*(C'\fR compiler. Newer versions of
+\&\f(CW\*(C`gcc\*(C'\fR are designed to work with the \f(CW\*(C`gcov\*(C'\fR tool instead.
+.Sp
+If the program was compiled with basic-block counting enabled,
+this option will also identify how many times each line of
+code was executed.
+While line-by-line profiling can help isolate where in a large function
+a program is spending its time, it also significantly increases
+the running time of \f(CW\*(C`gprof\*(C'\fR, and magnifies statistical
+inaccuracies.
+.ie n .IP """\-m \f(CInum\f(CW""" 4
+.el .IP "\f(CW\-m \f(CInum\f(CW\fR" 4
+.IX Item "-m num"
+.PD 0
+.ie n .IP """\-\-min\-count=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-min\-count=\f(CInum\f(CW\fR" 4
+.IX Item "--min-count=num"
+.PD
+This option affects execution count output only.
+Symbols that are executed less than \fInum\fR times are suppressed.
+.ie n .IP """\-n\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-n\f(CIsymspec\f(CW\fR" 4
+.IX Item "-nsymspec"
+.PD 0
+.ie n .IP """\-\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+to only propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-N\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-N\f(CIsymspec\f(CW\fR" 4
+.IX Item "-Nsymspec"
+.PD 0
+.ie n .IP """\-\-no\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-no\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--no-time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+not to propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-S\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-S\f(CIfilename\f(CW\fR" 4
+.IX Item "-Sfilename"
+.PD 0
+.ie n .IP """\-\-external\-symbol\-table=\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-\-external\-symbol\-table=\f(CIfilename\f(CW\fR" 4
+.IX Item "--external-symbol-table=filename"
+.PD
+The \fB\-S\fR option causes \f(CW\*(C`gprof\*(C'\fR to read an external symbol table
+file, such as \fI/proc/kallsyms\fR, rather than read the symbol table
+from the given object file (the default is \f(CW\*(C`a.out\*(C'\fR). This is useful
+for profiling kernel modules.
+.ie n .IP """\-z""" 4
+.el .IP "\f(CW\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.ie n .IP """\-\-display\-unused\-functions""" 4
+.el .IP "\f(CW\-\-display\-unused\-functions\fR" 4
+.IX Item "--display-unused-functions"
+.PD
+If you give the \fB\-z\fR option, \f(CW\*(C`gprof\*(C'\fR will mention all
+functions in the flat profile, even those that were never called, and
+that had no time spent in them. This is useful in conjunction with the
+\&\fB\-c\fR option for discovering which routines were never called.
+.Sh "Miscellaneous Options"
+.IX Subsection "Miscellaneous Options"
+.ie n .IP """\-d[\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-d[\f(CInum\f(CW]\fR" 4
+.IX Item "-d[num]"
+.PD 0
+.ie n .IP """\-\-debug[=\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-\-debug[=\f(CInum\f(CW]\fR" 4
+.IX Item "--debug[=num]"
+.PD
+The \fB\-d\fR \fInum\fR option specifies debugging options.
+If \fInum\fR is not specified, enable all debugging.
+.ie n .IP """\-h""" 4
+.el .IP "\f(CW\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.ie n .IP """\-\-help""" 4
+.el .IP "\f(CW\-\-help\fR" 4
+.IX Item "--help"
+.PD
+The \fB\-h\fR option prints command line usage.
+.ie n .IP """\-O\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-O\f(CIname\f(CW\fR" 4
+.IX Item "-Oname"
+.PD 0
+.ie n .IP """\-\-file\-format=\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-\-file\-format=\f(CIname\f(CW\fR" 4
+.IX Item "--file-format=name"
+.PD
+Selects the format of the profile data files. Recognized formats are
+\&\fBauto\fR (the default), \fBbsd\fR, \fB4.4bsd\fR, \fBmagic\fR, and
+\&\fBprof\fR (not yet supported).
+.ie n .IP """\-s""" 4
+.el .IP "\f(CW\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.ie n .IP """\-\-sum""" 4
+.el .IP "\f(CW\-\-sum\fR" 4
+.IX Item "--sum"
+.PD
+The \fB\-s\fR option causes \f(CW\*(C`gprof\*(C'\fR to summarize the information
+in the profile data files it read in, and write out a profile data
+file called \fIgmon.sum\fR, which contains all the information from
+the profile data files that \f(CW\*(C`gprof\*(C'\fR read in. The file \fIgmon.sum\fR
+may be one of the specified input files; the effect of this is to
+merge the data in the other input files into \fIgmon.sum\fR.
+.Sp
+Eventually you can run \f(CW\*(C`gprof\*(C'\fR again without \fB\-s\fR to analyze the
+cumulative data in the file \fIgmon.sum\fR.
+.ie n .IP """\-v""" 4
+.el .IP "\f(CW\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.ie n .IP """\-\-version""" 4
+.el .IP "\f(CW\-\-version\fR" 4
+.IX Item "--version"
+.PD
+The \fB\-v\fR flag causes \f(CW\*(C`gprof\*(C'\fR to print the current version
+number, and then exit.
+.Sh "Deprecated Options"
+.IX Subsection "Deprecated Options"
+.RS 4
+These options have been replaced with newer versions that use symspecs.
+.Sp
+\&\f(CW\*(C`\-e \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-e\fR \fIfunction\fR option tells \f(CW\*(C`gprof\*(C'\fR to not print
+information about the function \fIfunction_name\fR (and its
+children...) in the call graph. The function will still be listed
+as a child of any functions that call it, but its index number will be
+shown as \fB[not printed]\fR. More than one \fB\-e\fR option may be
+given; only one \fIfunction_name\fR may be indicated with each \fB\-e\fR
+option.
+.Sp
+\&\f(CW\*(C`\-E \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \f(CW\*(C`\-E \f(CIfunction\f(CW\*(C'\fR option works like the \f(CW\*(C`\-e\*(C'\fR option, but
+time spent in the function (and children who were not called from
+anywhere else), will not be used to compute the percentages-of-time for
+the call graph. More than one \fB\-E\fR option may be given; only one
+\&\fIfunction_name\fR may be indicated with each \fB\-E\fR option.
+.Sp
+\&\f(CW\*(C`\-f \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-f\fR \fIfunction\fR option causes \f(CW\*(C`gprof\*(C'\fR to limit the
+call graph to the function \fIfunction_name\fR and its children (and
+their children...). More than one \fB\-f\fR option may be given;
+only one \fIfunction_name\fR may be indicated with each \fB\-f\fR
+option.
+.Sp
+\&\f(CW\*(C`\-F \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-F\fR \fIfunction\fR option works like the \f(CW\*(C`\-f\*(C'\fR option, but
+only time spent in the function and its children (and their
+children...) will be used to determine total-time and
+percentages-of-time for the call graph. More than one \fB\-F\fR option
+may be given; only one \fIfunction_name\fR may be indicated with each
+\&\fB\-F\fR option. The \fB\-F\fR option overrides the \fB\-E\fR option.
+.RE
+.SH "FILES"
+.IX Header "FILES"
+.ie n .IP """\f(CIa.out\f(CW""" 4
+.el .IP "\f(CW\f(CIa.out\f(CW\fR" 4
+.IX Item "a.out"
+the namelist and text space.
+.ie n .IP """\f(CIgmon.out\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.out\f(CW\fR" 4
+.IX Item "gmon.out"
+dynamic call graph and profile.
+.ie n .IP """\f(CIgmon.sum\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.sum\f(CW\fR" 4
+.IX Item "gmon.sum"
+summarized dynamic call graph and profile.
+.SH "BUGS"
+.IX Header "BUGS"
+The granularity of the sampling is shown, but remains
+statistical at best.
+We assume that the time for each execution of a function
+can be expressed by the total time for the function divided
+by the number of times the function is called.
+Thus the time propagated along the call graph arcs to the function's
+parents is directly proportional to the number of times that
+arc is traversed.
+.PP
+Parents that are not themselves profiled will have the time of
+their profiled children propagated to them, but they will appear
+to be spontaneously invoked in the call graph listing, and will
+not have their time propagated further.
+Similarly, signal catchers, even though profiled, will appear
+to be spontaneous (although for more obscure reasons).
+Any profiled children of signal catchers should have their times
+propagated properly, unless the signal catcher was invoked during
+the execution of the profiling routine, in which case all is lost.
+.PP
+The profiled program must call \f(CW\*(C`exit\*(C'\fR(2)
+or return normally for the profiling information to be saved
+in the \fIgmon.out\fR file.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fImonitor\fR\|(3), \fIprofil\fR\|(2), \fIcc\fR\|(1), \fIprof\fR\|(1), and the Info entry for \fIgprof\fR.
+.PP
+\&\*(L"An Execution Profiler for Modular Programs\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Software \- Practice and Experience,
+Vol. 13, pp. 671\-685, 1983.
+.PP
+\&\*(L"gprof: A Call Graph Execution Profiler\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Proceedings of the \s-1SIGPLAN\s0 '82 Symposium on Compiler Construction,
+\&\s-1SIGPLAN\s0 Notices, Vol. 17, No 6, pp. 120\-126, June 1982.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
+.SH "POD ERRORS"
+.IX Header "POD ERRORS"
+Hey! \fBThe above document had some coding errors, which are explained below:\fR
+.IP "Around line 539:" 4
+.IX Item "Around line 539:"
+You can't have =items (as at line 545) unless the first thing after the =over is an =item
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1
new file mode 100644
index 0000000..6086571
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1
@@ -0,0 +1,2355 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "LD 1"
+.TH LD 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ld \- The GNU linker
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ld [\fBoptions\fR] \fIobjfile\fR ...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBld\fR combines a number of object and archive files, relocates
+their data and ties up symbol references. Usually the last step in
+compiling a program is to run \fBld\fR.
+.PP
+\&\fBld\fR accepts Linker Command Language files written in
+a superset of \s-1AT&T\s0's Link Editor Command Language syntax,
+to provide explicit and total control over the linking process.
+.PP
+This man page does not describe the command language; see the
+\&\fBld\fR entry in \f(CW\*(C`info\*(C'\fR for full details on the command
+language and on other aspects of the \s-1GNU\s0 linker.
+.PP
+This version of \fBld\fR uses the general purpose \s-1BFD\s0 libraries
+to operate on object files. This allows \fBld\fR to read, combine, and
+write object files in many different formats\-\-\-for example, \s-1COFF\s0 or
+\&\f(CW\*(C`a.out\*(C'\fR. Different formats may be linked together to produce any
+available kind of object file.
+.PP
+Aside from its flexibility, the \s-1GNU\s0 linker is more helpful than other
+linkers in providing diagnostic information. Many linkers abandon
+execution immediately upon encountering an error; whenever possible,
+\&\fBld\fR continues executing, allowing you to identify other errors
+(or, in some cases, to get an output file in spite of the error).
+.PP
+The \s-1GNU\s0 linker \fBld\fR is meant to cover a broad range of situations,
+and to be as compatible as possible with other linkers. As a result,
+you have many choices to control its behavior.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The linker supports a plethora of command-line options, but in actual
+practice few of them are used in any particular context.
+For instance, a frequent use of \fBld\fR is to link standard Unix
+object files on a standard, supported Unix system. On such a system, to
+link a file \f(CW\*(C`hello.o\*(C'\fR:
+.PP
+.Vb 1
+\& ld \-o <output> /lib/crt0.o hello.o \-lc
+.Ve
+.PP
+This tells \fBld\fR to produce a file called \fIoutput\fR as the
+result of linking the file \f(CW\*(C`/lib/crt0.o\*(C'\fR with \f(CW\*(C`hello.o\*(C'\fR and
+the library \f(CW\*(C`libc.a\*(C'\fR, which will come from the standard search
+directories. (See the discussion of the \fB\-l\fR option below.)
+.PP
+Some of the command-line options to \fBld\fR may be specified at any
+point in the command line. However, options which refer to files, such
+as \fB\-l\fR or \fB\-T\fR, cause the file to be read at the point at
+which the option appears in the command line, relative to the object
+files and other file options. Repeating non-file options with a
+different argument will either have no further effect, or override prior
+occurrences (those further to the left on the command line) of that
+option. Options which may be meaningfully specified more than once are
+noted in the descriptions below.
+.PP
+Non-option arguments are object files or archives which are to be linked
+together. They may follow, precede, or be mixed in with command-line
+options, except that an object file argument may not be placed between
+an option and its argument.
+.PP
+Usually the linker is invoked with at least one object file, but you can
+specify other forms of binary input files using \fB\-l\fR, \fB\-R\fR,
+and the script command language. If \fIno\fR binary input files at all
+are specified, the linker does not produce any output, and issues the
+message \fBNo input files\fR.
+.PP
+If the linker cannot recognize the format of an object file, it will
+assume that it is a linker script. A script specified in this way
+augments the main linker script used for the link (either the default
+linker script or the one specified by using \fB\-T\fR). This feature
+permits the linker to link against a file which appears to be an object
+or an archive, but actually merely defines some symbol values, or uses
+\&\f(CW\*(C`INPUT\*(C'\fR or \f(CW\*(C`GROUP\*(C'\fR to load other objects. Specifying a
+script in this way merely augments the main linker script, with the
+extra commands placed after the main script; use the \fB\-T\fR option
+to replace the default linker script entirely, but note the effect of
+the \f(CW\*(C`INSERT\*(C'\fR command.
+.PP
+For options whose names are a single letter,
+option arguments must either follow the option letter without intervening
+whitespace, or be given as separate arguments immediately following the
+option that requires them.
+.PP
+For options whose names are multiple letters, either one dash or two can
+precede the option name; for example, \fB\-trace\-symbol\fR and
+\&\fB\-\-trace\-symbol\fR are equivalent. Note\-\-\-there is one exception to
+this rule. Multiple letter options that start with a lower case 'o' can
+only be preceded by two dashes. This is to reduce confusion with the
+\&\fB\-o\fR option. So for example \fB\-omagic\fR sets the output file
+name to \fBmagic\fR whereas \fB\-\-omagic\fR sets the \s-1NMAGIC\s0 flag on the
+output.
+.PP
+Arguments to multiple-letter options must either be separated from the
+option name by an equals sign, or be given as separate arguments
+immediately following the option that requires them. For example,
+\&\fB\-\-trace\-symbol foo\fR and \fB\-\-trace\-symbol=foo\fR are equivalent.
+Unique abbreviations of the names of multiple-letter options are
+accepted.
+.PP
+Note\-\-\-if the linker is being invoked indirectly, via a compiler driver
+(e.g. \fBgcc\fR) then all the linker command line options should be
+prefixed by \fB\-Wl,\fR (or whatever is appropriate for the particular
+compiler driver) like this:
+.PP
+.Vb 1
+\& gcc \-Wl,\-\-start\-group foo.o bar.o \-Wl,\-\-end\-group
+.Ve
+.PP
+This is important, because otherwise the compiler driver program may
+silently drop the linker options, resulting in a bad link. Confusion
+may also arise when passing options that require values through a
+driver, as the use of a space between option and argument acts as
+a separator, and causes the driver to pass only the option to the linker
+and the argument to the compiler. In this case, it is simplest to use
+the joined forms of both single\- and multiple-letter options, such as:
+.PP
+.Vb 1
+\& gcc foo.o bar.o \-Wl,\-eENTRY \-Wl,\-Map=a.map
+.Ve
+.PP
+Here is a table of the generic command line switches accepted by the \s-1GNU\s0
+linker:
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a\fR \fIkeyword\fR" 4
+.IX Item "-a keyword"
+This option is supported for \s-1HP/UX\s0 compatibility. The \fIkeyword\fR
+argument must be one of the strings \fBarchive\fR, \fBshared\fR, or
+\&\fBdefault\fR. \fB\-aarchive\fR is functionally equivalent to
+\&\fB\-Bstatic\fR, and the other two keywords are functionally equivalent
+to \fB\-Bdynamic\fR. This option may be used any number of times.
+.IP "\fB\-A\fR \fIarchitecture\fR" 4
+.IX Item "-A architecture"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fIarchitecture\fR" 4
+.IX Item "--architecture=architecture"
+.PD
+In the current release of \fBld\fR, this option is useful only for the
+Intel 960 family of architectures. In that \fBld\fR configuration, the
+\&\fIarchitecture\fR argument identifies the particular architecture in
+the 960 family, enabling some safeguards and modifying the
+archive-library search path.
+.Sp
+Future releases of \fBld\fR may support similar functionality for
+other architecture families.
+.IP "\fB\-b\fR \fIinput-format\fR" 4
+.IX Item "-b input-format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIinput-format\fR" 4
+.IX Item "--format=input-format"
+.PD
+\&\fBld\fR may be configured to support more than one kind of object
+file. If your \fBld\fR is configured this way, you can use the
+\&\fB\-b\fR option to specify the binary format for input object files
+that follow this option on the command line. Even when \fBld\fR is
+configured to support alternative object formats, you don't usually need
+to specify this, as \fBld\fR should be configured to expect as a
+default input format the most usual format on each machine.
+\&\fIinput-format\fR is a text string, the name of a particular format
+supported by the \s-1BFD\s0 libraries. (You can list the available binary
+formats with \fBobjdump \-i\fR.)
+.Sp
+You may want to use this option if you are linking files with an unusual
+binary format. You can also use \fB\-b\fR to switch formats explicitly (when
+linking object files of different formats), by including
+\&\fB\-b\fR \fIinput-format\fR before each group of object files in a
+particular format.
+.Sp
+The default format is taken from the environment variable
+\&\f(CW\*(C`GNUTARGET\*(C'\fR.
+.Sp
+You can also define the input format from a script, using the command
+\&\f(CW\*(C`TARGET\*(C'\fR;
+.IP "\fB\-c\fR \fIMRI-commandfile\fR" 4
+.IX Item "-c MRI-commandfile"
+.PD 0
+.IP "\fB\-\-mri\-script=\fR\fIMRI-commandfile\fR" 4
+.IX Item "--mri-script=MRI-commandfile"
+.PD
+For compatibility with linkers produced by \s-1MRI\s0, \fBld\fR accepts script
+files written in an alternate, restricted command language, described in
+the \s-1MRI\s0 Compatible Script Files section of \s-1GNU\s0 ld documentation.
+Introduce \s-1MRI\s0 script files with
+the option \fB\-c\fR; use the \fB\-T\fR option to run linker
+scripts written in the general-purpose \fBld\fR scripting language.
+If \fIMRI-cmdfile\fR does not exist, \fBld\fR looks for it in the directories
+specified by any \fB\-L\fR options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-dc\fR" 4
+.IX Item "-dc"
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+.PD
+These three options are equivalent; multiple forms are supported for
+compatibility with other linkers. They assign space to common symbols
+even if a relocatable output file is specified (with \fB\-r\fR). The
+script command \f(CW\*(C`FORCE_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.IP "\fB\-e\fR \fIentry\fR" 4
+.IX Item "-e entry"
+.PD 0
+.IP "\fB\-\-entry=\fR\fIentry\fR" 4
+.IX Item "--entry=entry"
+.PD
+Use \fIentry\fR as the explicit symbol for beginning execution of your
+program, rather than the default entry point. If there is no symbol
+named \fIentry\fR, the linker will try to parse \fIentry\fR as a number,
+and use that as the entry address (the number will be interpreted in
+base 10; you may use a leading \fB0x\fR for base 16, or a leading
+\&\fB0\fR for base 8).
+.IP "\fB\-\-exclude\-libs\fR \fIlib\fR\fB,\fR\fIlib\fR\fB,...\fR" 4
+.IX Item "--exclude-libs lib,lib,..."
+Specifies a list of archive libraries from which symbols should not be automatically
+exported. The library names may be delimited by commas or colons. Specifying
+\&\f(CW\*(C`\-\-exclude\-libs ALL\*(C'\fR excludes symbols in all archive libraries from
+automatic export. This option is available only for the i386 \s-1PE\s0 targeted
+port of the linker and for \s-1ELF\s0 targeted ports. For i386 \s-1PE\s0, symbols
+explicitly listed in a .def file are still exported, regardless of this
+option. For \s-1ELF\s0 targeted ports, symbols affected by this option will
+be treated as hidden.
+.IP "\fB\-\-exclude\-modules\-for\-implib\fR \fImodule\fR\fB,\fR\fImodule\fR\fB,...\fR" 4
+.IX Item "--exclude-modules-for-implib module,module,..."
+Specifies a list of object files or archive members, from which symbols
+should not be automatically exported, but which should be copied wholesale
+into the import library being generated during the link. The module names
+may be delimited by commas or colons, and must match exactly the filenames
+used by \fBld\fR to open the files; for archive members, this is simply
+the member name, but for object files the name listed must include and
+match precisely any path used to specify the input file on the linker's
+command-line. This option is available only for the i386 \s-1PE\s0 targeted port
+of the linker. Symbols explicitly listed in a .def file are still exported,
+regardless of this option.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD 0
+.IP "\fB\-\-export\-dynamic\fR" 4
+.IX Item "--export-dynamic"
+.IP "\fB\-\-no\-export\-dynamic\fR" 4
+.IX Item "--no-export-dynamic"
+.PD
+When creating a dynamically linked executable, using the \fB\-E\fR
+option or the \fB\-\-export\-dynamic\fR option causes the linker to add
+all symbols to the dynamic symbol table. The dynamic symbol table is the
+set of symbols which are visible from dynamic objects at run time.
+.Sp
+If you do not use either of these options (or use the
+\&\fB\-\-no\-export\-dynamic\fR option to restore the default behavior), the
+dynamic symbol table will normally contain only those symbols which are
+referenced by some dynamic object mentioned in the link.
+.Sp
+If you use \f(CW\*(C`dlopen\*(C'\fR to load a dynamic object which needs to refer
+back to the symbols defined by the program, rather than some other
+dynamic object, then you will probably need to use this option when
+linking the program itself.
+.Sp
+You can also use the dynamic list to control what symbols should
+be added to the dynamic symbol table if the output format supports it.
+See the description of \fB\-\-dynamic\-list\fR.
+.Sp
+Note that this option is specific to \s-1ELF\s0 targeted ports. \s-1PE\s0 targets
+support a similar function to export all symbols from a \s-1DLL\s0 or \s-1EXE\s0; see
+the description of \fB\-\-export\-all\-symbols\fR below.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Link big-endian objects. This affects the default output format.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Link little-endian objects. This affects the default output format.
+.IP "\fB\-f\fR \fIname\fR" 4
+.IX Item "-f name"
+.PD 0
+.IP "\fB\-\-auxiliary=\fR\fIname\fR" 4
+.IX Item "--auxiliary=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_AUXILIARY\s0 field
+to the specified name. This tells the dynamic linker that the symbol
+table of the shared object should be used as an auxiliary filter on the
+symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_AUXILIARY\s0 field. If
+the dynamic linker resolves any symbols from the filter object, it will
+first check whether there is a definition in the shared object
+\&\fIname\fR. If there is one, it will be used instead of the definition
+in the filter object. The shared object \fIname\fR need not exist.
+Thus the shared object \fIname\fR may be used to provide an alternative
+implementation of certain functions, perhaps for debugging or for
+machine specific performance.
+.Sp
+This option may be specified more than once. The \s-1DT_AUXILIARY\s0 entries
+will be created in the order in which they appear on the command line.
+.IP "\fB\-F\fR \fIname\fR" 4
+.IX Item "-F name"
+.PD 0
+.IP "\fB\-\-filter=\fR\fIname\fR" 4
+.IX Item "--filter=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_FILTER\s0 field to
+the specified name. This tells the dynamic linker that the symbol table
+of the shared object which is being created should be used as a filter
+on the symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_FILTER\s0 field. The
+dynamic linker will resolve symbols according to the symbol table of the
+filter object as usual, but it will actually link to the definitions
+found in the shared object \fIname\fR. Thus the filter object can be
+used to select a subset of the symbols provided by the object
+\&\fIname\fR.
+.Sp
+Some older linkers used the \fB\-F\fR option throughout a compilation
+toolchain for specifying object-file format for both input and output
+object files.
+The \s-1GNU\s0 linker uses other mechanisms for this purpose: the
+\&\fB\-b\fR, \fB\-\-format\fR, \fB\-\-oformat\fR options, the
+\&\f(CW\*(C`TARGET\*(C'\fR command in linker scripts, and the \f(CW\*(C`GNUTARGET\*(C'\fR
+environment variable.
+The \s-1GNU\s0 linker will ignore the \fB\-F\fR option when not
+creating an \s-1ELF\s0 shared object.
+.IP "\fB\-fini=\fR\fIname\fR" 4
+.IX Item "-fini=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is unloaded, by setting \s-1DT_FINI\s0 to the
+address of the function. By default, the linker uses \f(CW\*(C`_fini\*(C'\fR as
+the function to call.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Ignored. Provided for compatibility with other tools.
+.IP "\fB\-G\fR \fIvalue\fR" 4
+.IX Item "-G value"
+.PD 0
+.IP "\fB\-\-gpsize=\fR\fIvalue\fR" 4
+.IX Item "--gpsize=value"
+.PD
+Set the maximum size of objects to be optimized using the \s-1GP\s0 register to
+\&\fIsize\fR. This is only meaningful for object file formats such as
+\&\s-1MIPS\s0 \s-1ECOFF\s0 which supports putting large and small objects into different
+sections. This is ignored for other object file formats.
+.IP "\fB\-h\fR \fIname\fR" 4
+.IX Item "-h name"
+.PD 0
+.IP "\fB\-soname=\fR\fIname\fR" 4
+.IX Item "-soname=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_SONAME\s0 field to
+the specified name. When an executable is linked with a shared object
+which has a \s-1DT_SONAME\s0 field, then when the executable is run the dynamic
+linker will attempt to load the shared object specified by the \s-1DT_SONAME\s0
+field rather than the using the file name given to the linker.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+Perform an incremental link (same as option \fB\-r\fR).
+.IP "\fB\-init=\fR\fIname\fR" 4
+.IX Item "-init=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is loaded, by setting \s-1DT_INIT\s0 to the address
+of the function. By default, the linker uses \f(CW\*(C`_init\*(C'\fR as the
+function to call.
+.IP "\fB\-l\fR \fInamespec\fR" 4
+.IX Item "-l namespec"
+.PD 0
+.IP "\fB\-\-library=\fR\fInamespec\fR" 4
+.IX Item "--library=namespec"
+.PD
+Add the archive or object file specified by \fInamespec\fR to the
+list of files to link. This option may be used any number of times.
+If \fInamespec\fR is of the form \fI:\fIfilename\fI\fR, \fBld\fR
+will search the library path for a file called \fIfilename\fR, otherwise it
+will search the library path for a file called \fIlib\fInamespec\fI.a\fR.
+.Sp
+On systems which support shared libraries, \fBld\fR may also search for
+files other than \fIlib\fInamespec\fI.a\fR. Specifically, on \s-1ELF\s0
+and SunOS systems, \fBld\fR will search a directory for a library
+called \fIlib\fInamespec\fI.so\fR before searching for one called
+\&\fIlib\fInamespec\fI.a\fR. (By convention, a \f(CW\*(C`.so\*(C'\fR extension
+indicates a shared library.) Note that this behavior does not apply
+to \fI:\fIfilename\fI\fR, which always specifies a file called
+\&\fIfilename\fR.
+.Sp
+The linker will search an archive only once, at the location where it is
+specified on the command line. If the archive defines a symbol which
+was undefined in some object which appeared before the archive on the
+command line, the linker will include the appropriate file(s) from the
+archive. However, an undefined symbol in an object appearing later on
+the command line will not cause the linker to search the archive again.
+.Sp
+See the \fB\-(\fR option for a way to force the linker to search
+archives multiple times.
+.Sp
+You may list the same archive multiple times on the command line.
+.Sp
+This type of archive searching is standard for Unix linkers. However,
+if you are using \fBld\fR on \s-1AIX\s0, note that it is different from the
+behaviour of the \s-1AIX\s0 linker.
+.IP "\fB\-L\fR \fIsearchdir\fR" 4
+.IX Item "-L searchdir"
+.PD 0
+.IP "\fB\-\-library\-path=\fR\fIsearchdir\fR" 4
+.IX Item "--library-path=searchdir"
+.PD
+Add path \fIsearchdir\fR to the list of paths that \fBld\fR will search
+for archive libraries and \fBld\fR control scripts. You may use this
+option any number of times. The directories are searched in the order
+in which they are specified on the command line. Directories specified
+on the command line are searched before the default directories. All
+\&\fB\-L\fR options apply to all \fB\-l\fR options, regardless of the
+order in which the options appear. \fB\-L\fR options do not affect
+how \fBld\fR searches for a linker script unless \fB\-T\fR
+option is specified.
+.Sp
+If \fIsearchdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the \fIsysroot prefix\fR, a path specified when the linker is configured.
+.Sp
+The default set of paths searched (without being specified with
+\&\fB\-L\fR) depends on which emulation mode \fBld\fR is using, and in
+some cases also on how it was configured.
+.Sp
+The paths can also be specified in a link script with the
+\&\f(CW\*(C`SEARCH_DIR\*(C'\fR command. Directories specified this way are searched
+at the point in which the linker script appears in the command line.
+.IP "\fB\-m\fR \fIemulation\fR" 4
+.IX Item "-m emulation"
+Emulate the \fIemulation\fR linker. You can list the available
+emulations with the \fB\-\-verbose\fR or \fB\-V\fR options.
+.Sp
+If the \fB\-m\fR option is not used, the emulation is taken from the
+\&\f(CW\*(C`LDEMULATION\*(C'\fR environment variable, if that is defined.
+.Sp
+Otherwise, the default emulation depends upon how the linker was
+configured.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+.PD 0
+.IP "\fB\-\-print\-map\fR" 4
+.IX Item "--print-map"
+.PD
+Print a link map to the standard output. A link map provides
+information about the link, including the following:
+.RS 4
+.IP "\(bu" 4
+Where object files are mapped into memory.
+.IP "\(bu" 4
+How common symbols are allocated.
+.IP "\(bu" 4
+All archive members included in the link, with a mention of the symbol
+which caused the archive member to be brought in.
+.IP "\(bu" 4
+The values assigned to symbols.
+.Sp
+Note \- symbols whose values are computed by an expression which
+involves a reference to a previous value of the same symbol may not
+have correct result displayed in the link map. This is because the
+linker discards intermediate results and only retains the final value
+of an expression. Under such circumstances the linker will display
+the final value enclosed by square brackets. Thus for example a
+linker script containing:
+.Sp
+.Vb 3
+\& foo = 1
+\& foo = foo * 4
+\& foo = foo + 8
+.Ve
+.Sp
+will produce the following output in the link map if the \fB\-M\fR
+option is used:
+.Sp
+.Vb 3
+\& 0x00000001 foo = 0x1
+\& [0x0000000c] foo = (foo * 0x4)
+\& [0x0000000c] foo = (foo + 0x8)
+.Ve
+.Sp
+See \fBExpressions\fR for more information about expressions in linker
+scripts.
+.RE
+.RS 4
+.RE
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nmagic\fR" 4
+.IX Item "--nmagic"
+.PD
+Turn off page alignment of sections, and mark the output as
+\&\f(CW\*(C`NMAGIC\*(C'\fR if possible.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+.PD 0
+.IP "\fB\-\-omagic\fR" 4
+.IX Item "--omagic"
+.PD
+Set the text and data sections to be readable and writable. Also, do
+not page-align the data segment, and disable linking against shared
+libraries. If the output format supports Unix style magic numbers,
+mark the output as \f(CW\*(C`OMAGIC\*(C'\fR. Note: Although a writable text section
+is allowed for PE-COFF targets, it does not conform to the format
+specification published by Microsoft.
+.IP "\fB\-\-no\-omagic\fR" 4
+.IX Item "--no-omagic"
+This option negates most of the effects of the \fB\-N\fR option. It
+sets the text section to be read-only, and forces the data segment to
+be page-aligned. Note \- this option does not enable linking against
+shared libraries. Use \fB\-Bdynamic\fR for this.
+.IP "\fB\-o\fR \fIoutput\fR" 4
+.IX Item "-o output"
+.PD 0
+.IP "\fB\-\-output=\fR\fIoutput\fR" 4
+.IX Item "--output=output"
+.PD
+Use \fIoutput\fR as the name for the program produced by \fBld\fR; if this
+option is not specified, the name \fIa.out\fR is used by default. The
+script command \f(CW\*(C`OUTPUT\*(C'\fR can also specify the output file name.
+.IP "\fB\-O\fR \fIlevel\fR" 4
+.IX Item "-O level"
+If \fIlevel\fR is a numeric values greater than zero \fBld\fR optimizes
+the output. This might take significantly longer and therefore probably
+should only be enabled for the final binary. At the moment this
+option only affects \s-1ELF\s0 shared library generation. Future releases of
+the linker may make more use of this option. Also currently there is
+no difference in the linker's behaviour for different non-zero values
+of this option. Again this may change with future releases.
+.IP "\fB\-q\fR" 4
+.IX Item "-q"
+.PD 0
+.IP "\fB\-\-emit\-relocs\fR" 4
+.IX Item "--emit-relocs"
+.PD
+Leave relocation sections and contents in fully linked executables.
+Post link analysis and optimization tools may need this information in
+order to perform correct modifications of executables. This results
+in larger executables.
+.Sp
+This option is currently only supported on \s-1ELF\s0 platforms.
+.IP "\fB\-\-force\-dynamic\fR" 4
+.IX Item "--force-dynamic"
+Force the output file to have dynamic sections. This option is specific
+to VxWorks targets.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocatable\fR" 4
+.IX Item "--relocatable"
+.PD
+Generate relocatable output\-\-\-i.e., generate an output file that can in
+turn serve as input to \fBld\fR. This is often called \fIpartial
+linking\fR. As a side effect, in environments that support standard Unix
+magic numbers, this option also sets the output file's magic number to
+\&\f(CW\*(C`OMAGIC\*(C'\fR.
+If this option is not specified, an absolute file is produced. When
+linking \*(C+ programs, this option \fIwill not\fR resolve references to
+constructors; to do that, use \fB\-Ur\fR.
+.Sp
+When an input file does not have the same format as the output file,
+partial linking is only supported if that input file does not contain any
+relocations. Different output formats can have further restrictions; for
+example some \f(CW\*(C`a.out\*(C'\fR\-based formats do not support partial linking
+with input files in other formats at all.
+.Sp
+This option does the same thing as \fB\-i\fR.
+.IP "\fB\-R\fR \fIfilename\fR" 4
+.IX Item "-R filename"
+.PD 0
+.IP "\fB\-\-just\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--just-symbols=filename"
+.PD
+Read symbol names and their addresses from \fIfilename\fR, but do not
+relocate it or include it in the output. This allows your output file
+to refer symbolically to absolute locations of memory defined in other
+programs. You may use this option more than once.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Omit all symbol information from the output file.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Omit debugger symbol information (but not all symbols) from the output file.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-trace\fR" 4
+.IX Item "--trace"
+.PD
+Print the names of the input files as \fBld\fR processes them.
+.IP "\fB\-T\fR \fIscriptfile\fR" 4
+.IX Item "-T scriptfile"
+.PD 0
+.IP "\fB\-\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the linker script. This script replaces
+\&\fBld\fR's default linker script (rather than adding to it), so
+\&\fIcommandfile\fR must specify everything necessary to describe the
+output file. If \fIscriptfile\fR does not exist in
+the current directory, \f(CW\*(C`ld\*(C'\fR looks for it in the directories
+specified by any preceding \fB\-L\fR options. Multiple \fB\-T\fR
+options accumulate.
+.IP "\fB\-dT\fR \fIscriptfile\fR" 4
+.IX Item "-dT scriptfile"
+.PD 0
+.IP "\fB\-\-default\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--default-script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the default linker script.
+.Sp
+This option is similar to the \fB\-\-script\fR option except that
+processing of the script is delayed until after the rest of the
+command line has been processed. This allows options placed after the
+\&\fB\-\-default\-script\fR option on the command line to affect the
+behaviour of the linker script, which can be important when the linker
+command line cannot be directly controlled by the user. (eg because
+the command line is being constructed by another tool, such as
+\&\fBgcc\fR).
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+.PD 0
+.IP "\fB\-\-undefined=\fR\fIsymbol\fR" 4
+.IX Item "--undefined=symbol"
+.PD
+Force \fIsymbol\fR to be entered in the output file as an undefined
+symbol. Doing this may, for example, trigger linking of additional
+modules from standard libraries. \fB\-u\fR may be repeated with
+different option arguments to enter additional undefined symbols. This
+option is equivalent to the \f(CW\*(C`EXTERN\*(C'\fR linker script command.
+.IP "\fB\-Ur\fR" 4
+.IX Item "-Ur"
+For anything other than \*(C+ programs, this option is equivalent to
+\&\fB\-r\fR: it generates relocatable output\-\-\-i.e., an output file that can in
+turn serve as input to \fBld\fR. When linking \*(C+ programs, \fB\-Ur\fR
+\&\fIdoes\fR resolve references to constructors, unlike \fB\-r\fR.
+It does not work to use \fB\-Ur\fR on files that were themselves linked
+with \fB\-Ur\fR; once the constructor table has been built, it cannot
+be added to. Use \fB\-Ur\fR only for the last partial link, and
+\&\fB\-r\fR for the others.
+.IP "\fB\-\-unique[=\fR\fI\s-1SECTION\s0\fR\fB]\fR" 4
+.IX Item "--unique[=SECTION]"
+Creates a separate output section for every input section matching
+\&\fI\s-1SECTION\s0\fR, or if the optional wildcard \fI\s-1SECTION\s0\fR argument is
+missing, for every orphan input section. An orphan section is one not
+specifically mentioned in a linker script. You may use this option
+multiple times on the command line; It prevents the normal merging of
+input sections with the same name, overriding output section assignments
+in a linker script.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD
+Display the version number for \fBld\fR. The \fB\-V\fR option also
+lists the supported emulations.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Delete all local symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Delete all temporary local symbols. (These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.)
+.IP "\fB\-y\fR \fIsymbol\fR" 4
+.IX Item "-y symbol"
+.PD 0
+.IP "\fB\-\-trace\-symbol=\fR\fIsymbol\fR" 4
+.IX Item "--trace-symbol=symbol"
+.PD
+Print the name of each linked file in which \fIsymbol\fR appears. This
+option may be given any number of times. On many systems it is necessary
+to prepend an underscore.
+.Sp
+This option is useful when you have an undefined symbol in your link but
+don't know where the reference is coming from.
+.IP "\fB\-Y\fR \fIpath\fR" 4
+.IX Item "-Y path"
+Add \fIpath\fR to the default library search path. This option exists
+for Solaris compatibility.
+.IP "\fB\-z\fR \fIkeyword\fR" 4
+.IX Item "-z keyword"
+The recognized keywords are:
+.RS 4
+.IP "\fBcombreloc\fR" 4
+.IX Item "combreloc"
+Combines multiple reloc sections and sorts them to make dynamic symbol
+lookup caching possible.
+.IP "\fBdefs\fR" 4
+.IX Item "defs"
+Disallows undefined symbols in object files. Undefined symbols in
+shared libraries are still allowed.
+.IP "\fBexecstack\fR" 4
+.IX Item "execstack"
+Marks the object as requiring executable stack.
+.IP "\fBinitfirst\fR" 4
+.IX Item "initfirst"
+This option is only meaningful when building a shared object.
+It marks the object so that its runtime initialization will occur
+before the runtime initialization of any other objects brought into
+the process at the same time. Similarly the runtime finalization of
+the object will occur after the runtime finalization of any other
+objects.
+.IP "\fBinterpose\fR" 4
+.IX Item "interpose"
+Marks the object that its symbol table interposes before all symbols
+but the primary executable.
+.IP "\fBlazy\fR" 4
+.IX Item "lazy"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to defer function call resolution to the point when
+the function is called (lazy binding), rather than at load time.
+Lazy binding is the default.
+.IP "\fBloadfltr\fR" 4
+.IX Item "loadfltr"
+Marks the object that its filters be processed immediately at
+runtime.
+.IP "\fBmuldefs\fR" 4
+.IX Item "muldefs"
+Allows multiple definitions.
+.IP "\fBnocombreloc\fR" 4
+.IX Item "nocombreloc"
+Disables multiple reloc sections combining.
+.IP "\fBnocopyreloc\fR" 4
+.IX Item "nocopyreloc"
+Disables production of copy relocs.
+.IP "\fBnodefaultlib\fR" 4
+.IX Item "nodefaultlib"
+Marks the object that the search for dependencies of this object will
+ignore any default library search paths.
+.IP "\fBnodelete\fR" 4
+.IX Item "nodelete"
+Marks the object shouldn't be unloaded at runtime.
+.IP "\fBnodlopen\fR" 4
+.IX Item "nodlopen"
+Marks the object not available to \f(CW\*(C`dlopen\*(C'\fR.
+.IP "\fBnodump\fR" 4
+.IX Item "nodump"
+Marks the object can not be dumped by \f(CW\*(C`dldump\*(C'\fR.
+.IP "\fBnoexecstack\fR" 4
+.IX Item "noexecstack"
+Marks the object as not requiring executable stack.
+.IP "\fBnorelro\fR" 4
+.IX Item "norelro"
+Don't create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBnow\fR" 4
+.IX Item "now"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to resolve all symbols when the program is started, or
+when the shared library is linked to using dlopen, instead of
+deferring function call resolution to the point when the function is
+first called.
+.IP "\fBorigin\fR" 4
+.IX Item "origin"
+Marks the object may contain \f(CW$ORIGIN\fR.
+.IP "\fBrelro\fR" 4
+.IX Item "relro"
+Create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBmax\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "max-page-size=value"
+Set the emulation maximum page size to \fIvalue\fR.
+.IP "\fBcommon\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "common-page-size=value"
+Set the emulation common page size to \fIvalue\fR.
+.RE
+.RS 4
+.Sp
+Other keywords are ignored for Solaris compatibility.
+.RE
+.IP "\fB\-(\fR \fIarchives\fR \fB\-)\fR" 4
+.IX Item "-( archives -)"
+.PD 0
+.IP "\fB\-\-start\-group\fR \fIarchives\fR \fB\-\-end\-group\fR" 4
+.IX Item "--start-group archives --end-group"
+.PD
+The \fIarchives\fR should be a list of archive files. They may be
+either explicit file names, or \fB\-l\fR options.
+.Sp
+The specified archives are searched repeatedly until no new undefined
+references are created. Normally, an archive is searched only once in
+the order that it is specified on the command line. If a symbol in that
+archive is needed to resolve an undefined symbol referred to by an
+object in an archive that appears later on the command line, the linker
+would not be able to resolve that reference. By grouping the archives,
+they all be searched repeatedly until all possible references are
+resolved.
+.Sp
+Using this option has a significant performance cost. It is best to use
+it only when there are unavoidable circular references between two or
+more archives.
+.IP "\fB\-\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--accept-unknown-input-arch"
+.PD 0
+.IP "\fB\-\-no\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--no-accept-unknown-input-arch"
+.PD
+Tells the linker to accept input files whose architecture cannot be
+recognised. The assumption is that the user knows what they are doing
+and deliberately wants to link in these unknown input files. This was
+the default behaviour of the linker, before release 2.14. The default
+behaviour from release 2.14 onwards is to reject such input files, and
+so the \fB\-\-accept\-unknown\-input\-arch\fR option has been added to
+restore the old behaviour.
+.IP "\fB\-\-as\-needed\fR" 4
+.IX Item "--as-needed"
+.PD 0
+.IP "\fB\-\-no\-as\-needed\fR" 4
+.IX Item "--no-as-needed"
+.PD
+This option affects \s-1ELF\s0 \s-1DT_NEEDED\s0 tags for dynamic libraries mentioned
+on the command line after the \fB\-\-as\-needed\fR option. Normally,
+the linker will add a \s-1DT_NEEDED\s0 tag for each dynamic library mentioned
+on the command line, regardless of whether the library is actually
+needed. \fB\-\-as\-needed\fR causes a \s-1DT_NEEDED\s0 tag to only be emitted
+for a library that satisfies a symbol reference from regular objects
+which is undefined at the point that the library was linked, or, if
+the library is not found in the \s-1DT_NEEDED\s0 lists of other libraries
+linked up to that point, a reference from another dynamic library.
+\&\fB\-\-no\-as\-needed\fR restores the default behaviour.
+.IP "\fB\-\-add\-needed\fR" 4
+.IX Item "--add-needed"
+.PD 0
+.IP "\fB\-\-no\-add\-needed\fR" 4
+.IX Item "--no-add-needed"
+.PD
+This option affects the treatment of dynamic libraries from \s-1ELF\s0
+\&\s-1DT_NEEDED\s0 tags in dynamic libraries mentioned on the command line after
+the \fB\-\-no\-add\-needed\fR option. Normally, the linker will add
+a \s-1DT_NEEDED\s0 tag for each dynamic library from \s-1DT_NEEDED\s0 tags.
+\&\fB\-\-no\-add\-needed\fR causes \s-1DT_NEEDED\s0 tags will never be emitted
+for those libraries from \s-1DT_NEEDED\s0 tags. \fB\-\-add\-needed\fR restores
+the default behaviour.
+.IP "\fB\-assert\fR \fIkeyword\fR" 4
+.IX Item "-assert keyword"
+This option is ignored for SunOS compatibility.
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD 0
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+.IP "\fB\-call_shared\fR" 4
+.IX Item "-call_shared"
+.PD
+Link against dynamic libraries. This is only meaningful on platforms
+for which shared libraries are supported. This option is normally the
+default on such platforms. The different variants of this option are
+for compatibility with various systems. You may use this option
+multiple times on the command line: it affects library searching for
+\&\fB\-l\fR options which follow it.
+.IP "\fB\-Bgroup\fR" 4
+.IX Item "-Bgroup"
+Set the \f(CW\*(C`DF_1_GROUP\*(C'\fR flag in the \f(CW\*(C`DT_FLAGS_1\*(C'\fR entry in the dynamic
+section. This causes the runtime linker to handle lookups in this
+object and its dependencies to be performed only inside the group.
+\&\fB\-\-unresolved\-symbols=report\-all\fR is implied. This option is
+only meaningful on \s-1ELF\s0 platforms which support shared libraries.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-dn\fR" 4
+.IX Item "-dn"
+.IP "\fB\-non_shared\fR" 4
+.IX Item "-non_shared"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.PD
+Do not link against shared libraries. This is only meaningful on
+platforms for which shared libraries are supported. The different
+variants of this option are for compatibility with various systems. You
+may use this option multiple times on the command line: it affects
+library searching for \fB\-l\fR options which follow it. This
+option also implies \fB\-\-unresolved\-symbols=report\-all\fR. This
+option can be used with \fB\-shared\fR. Doing so means that a
+shared library is being created but that all of the library's external
+references must be resolved by pulling in entries from static
+libraries.
+.IP "\fB\-Bsymbolic\fR" 4
+.IX Item "-Bsymbolic"
+When creating a shared library, bind references to global symbols to the
+definition within the shared library, if any. Normally, it is possible
+for a program linked against a shared library to override the definition
+within the shared library. This option is only meaningful on \s-1ELF\s0
+platforms which support shared libraries.
+.IP "\fB\-Bsymbolic\-functions\fR" 4
+.IX Item "-Bsymbolic-functions"
+When creating a shared library, bind references to global function
+symbols to the definition within the shared library, if any.
+This option is only meaningful on \s-1ELF\s0 platforms which support shared
+libraries.
+.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4
+.IX Item "--dynamic-list=dynamic-list-file"
+Specify the name of a dynamic list file to the linker. This is
+typically used when creating shared libraries to specify a list of
+global symbols whose references shouldn't be bound to the definition
+within the shared library, or creating dynamically linked executables
+to specify a list of symbols which should be added to the symbol table
+in the executable. This option is only meaningful on \s-1ELF\s0 platforms
+which support shared libraries.
+.Sp
+The format of the dynamic list is the same as the version node without
+scope and node name. See \fB\s-1VERSION\s0\fR for more information.
+.IP "\fB\-\-dynamic\-list\-data\fR" 4
+.IX Item "--dynamic-list-data"
+Include all global data symbols to the dynamic list.
+.IP "\fB\-\-dynamic\-list\-cpp\-new\fR" 4
+.IX Item "--dynamic-list-cpp-new"
+Provide the builtin dynamic list for \*(C+ operator new and delete. It
+is mainly useful for building shared libstdc++.
+.IP "\fB\-\-dynamic\-list\-cpp\-typeinfo\fR" 4
+.IX Item "--dynamic-list-cpp-typeinfo"
+Provide the builtin dynamic list for \*(C+ runtime type identification.
+.IP "\fB\-\-check\-sections\fR" 4
+.IX Item "--check-sections"
+.PD 0
+.IP "\fB\-\-no\-check\-sections\fR" 4
+.IX Item "--no-check-sections"
+.PD
+Asks the linker \fInot\fR to check section addresses after they have
+been assigned to see if there are any overlaps. Normally the linker will
+perform this check, and if it finds any overlaps it will produce
+suitable error messages. The linker does know about, and does make
+allowances for sections in overlays. The default behaviour can be
+restored by using the command line switch \fB\-\-check\-sections\fR.
+Section overlap is not usually checked for relocatable links. You can
+force checking in that case by using the \fB\-\-check\-sections\fR
+option.
+.IP "\fB\-\-cref\fR" 4
+.IX Item "--cref"
+Output a cross reference table. If a linker map file is being
+generated, the cross reference table is printed to the map file.
+Otherwise, it is printed on the standard output.
+.Sp
+The format of the table is intentionally simple, so that it may be
+easily processed by a script if necessary. The symbols are printed out,
+sorted by name. For each symbol, a list of file names is given. If the
+symbol is defined, the first file listed is the location of the
+definition. The remaining files contain references to the symbol.
+.IP "\fB\-\-no\-define\-common\fR" 4
+.IX Item "--no-define-common"
+This option inhibits the assignment of addresses to common symbols.
+The script command \f(CW\*(C`INHIBIT_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.Sp
+The \fB\-\-no\-define\-common\fR option allows decoupling
+the decision to assign addresses to Common symbols from the choice
+of the output file type; otherwise a non-Relocatable output type
+forces assigning addresses to Common symbols.
+Using \fB\-\-no\-define\-common\fR allows Common symbols that are referenced
+from a shared library to be assigned addresses only in the main program.
+This eliminates the unused duplicate space in the shared library,
+and also prevents any possible confusion over resolving to the wrong
+duplicate when there are many dynamic modules with specialized search
+paths for runtime symbol resolution.
+.IP "\fB\-\-defsym=\fR\fIsymbol\fR\fB=\fR\fIexpression\fR" 4
+.IX Item "--defsym=symbol=expression"
+Create a global symbol in the output file, containing the absolute
+address given by \fIexpression\fR. You may use this option as many
+times as necessary to define multiple symbols in the command line. A
+limited form of arithmetic is supported for the \fIexpression\fR in this
+context: you may give a hexadecimal constant or the name of an existing
+symbol, or use \f(CW\*(C`+\*(C'\fR and \f(CW\*(C`\-\*(C'\fR to add or subtract hexadecimal
+constants or symbols. If you need more elaborate expressions, consider
+using the linker command language from a script. \fINote:\fR there should be no white
+space between \fIsymbol\fR, the equals sign ("\fB=\fR"), and
+\&\fIexpression\fR.
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether to demangle symbol names in error messages
+and other output. When the linker is told to demangle, it tries to
+present symbol names in a readable fashion: it strips leading
+underscores if they are used by the object file format, and converts \*(C+
+mangled symbol names into user readable names. Different compilers have
+different mangling styles. The optional demangling style argument can be used
+to choose an appropriate demangling style for your compiler. The linker will
+demangle by default unless the environment variable \fB\s-1COLLECT_NO_DEMANGLE\s0\fR
+is set. These options may be used to override the default.
+.IP "\fB\-I\fR\fIfile\fR" 4
+.IX Item "-Ifile"
+.PD 0
+.IP "\fB\-\-dynamic\-linker=\fR\fIfile\fR" 4
+.IX Item "--dynamic-linker=file"
+.PD
+Set the name of the dynamic linker. This is only meaningful when
+generating dynamically linked \s-1ELF\s0 executables. The default dynamic
+linker is normally correct; don't use this unless you know what you are
+doing.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+.PD 0
+.IP "\fB\-\-no\-fatal\-warnings\fR" 4
+.IX Item "--no-fatal-warnings"
+.PD
+Treat all warnings as errors. The default behaviour can be restored
+with the option \fB\-\-no\-fatal\-warnings\fR.
+.IP "\fB\-\-force\-exe\-suffix\fR" 4
+.IX Item "--force-exe-suffix"
+Make sure that an output file has a .exe suffix.
+.Sp
+If a successfully built fully linked output file does not have a
+\&\f(CW\*(C`.exe\*(C'\fR or \f(CW\*(C`.dll\*(C'\fR suffix, this option forces the linker to copy
+the output file to one of the same name with a \f(CW\*(C`.exe\*(C'\fR suffix. This
+option is useful when using unmodified Unix makefiles on a Microsoft
+Windows host, since some versions of Windows won't run an image unless
+it ends in a \f(CW\*(C`.exe\*(C'\fR suffix.
+.IP "\fB\-\-gc\-sections\fR" 4
+.IX Item "--gc-sections"
+.PD 0
+.IP "\fB\-\-no\-gc\-sections\fR" 4
+.IX Item "--no-gc-sections"
+.PD
+Enable garbage collection of unused input sections. It is ignored on
+targets that do not support this option. The default behaviour (of not
+performing this garbage collection) can be restored by specifying
+\&\fB\-\-no\-gc\-sections\fR on the command line.
+.Sp
+\&\fB\-\-gc\-sections\fR decides which input sections are used by
+examining symbols and relocations. The section containing the entry
+symbol and all sections containing symbols undefined on the
+command-line will be kept, as will sections containing symbols
+referenced by dynamic objects. Note that when building shared
+libraries, the linker must assume that any visible symbol is
+referenced. Once this initial set of sections has been determined,
+the linker recursively marks as used any section referenced by their
+relocations. See \fB\-\-entry\fR and \fB\-\-undefined\fR.
+.Sp
+This option can be set when doing a partial link (enabled with option
+\&\fB\-r\fR). In this case the root of symbols kept must be explicitely
+specified either by an \fB\-\-entry\fR or \fB\-\-undefined\fR option or by
+a \f(CW\*(C`ENTRY\*(C'\fR command in the linker script.
+.IP "\fB\-\-print\-gc\-sections\fR" 4
+.IX Item "--print-gc-sections"
+.PD 0
+.IP "\fB\-\-no\-print\-gc\-sections\fR" 4
+.IX Item "--no-print-gc-sections"
+.PD
+List all sections removed by garbage collection. The listing is
+printed on stderr. This option is only effective if garbage
+collection has been enabled via the \fB\-\-gc\-sections\fR) option. The
+default behaviour (of not listing the sections that are removed) can
+be restored by specifying \fB\-\-no\-print\-gc\-sections\fR on the command
+line.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command-line options on the standard output and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options on the standard output and exit.
+.IP "\fB\-Map=\fR\fImapfile\fR" 4
+.IX Item "-Map=mapfile"
+Print a link map to the file \fImapfile\fR. See the description of the
+\&\fB\-M\fR option, above.
+.IP "\fB\-\-no\-keep\-memory\fR" 4
+.IX Item "--no-keep-memory"
+\&\fBld\fR normally optimizes for speed over memory usage by caching the
+symbol tables of input files in memory. This option tells \fBld\fR to
+instead optimize for memory usage, by rereading the symbol tables as
+necessary. This may be required if \fBld\fR runs out of memory space
+while linking a large executable.
+.IP "\fB\-\-no\-undefined\fR" 4
+.IX Item "--no-undefined"
+.PD 0
+.IP "\fB\-z defs\fR" 4
+.IX Item "-z defs"
+.PD
+Report unresolved symbol references from regular object files. This
+is done even if the linker is creating a non-symbolic shared library.
+The switch \fB\-\-[no\-]allow\-shlib\-undefined\fR controls the
+behaviour for reporting unresolved references found in shared
+libraries being linked in.
+.IP "\fB\-\-allow\-multiple\-definition\fR" 4
+.IX Item "--allow-multiple-definition"
+.PD 0
+.IP "\fB\-z muldefs\fR" 4
+.IX Item "-z muldefs"
+.PD
+Normally when a symbol is defined multiple times, the linker will
+report a fatal error. These options allow multiple definitions and the
+first definition will be used.
+.IP "\fB\-\-allow\-shlib\-undefined\fR" 4
+.IX Item "--allow-shlib-undefined"
+.PD 0
+.IP "\fB\-\-no\-allow\-shlib\-undefined\fR" 4
+.IX Item "--no-allow-shlib-undefined"
+.PD
+Allows or disallows undefined symbols in shared libraries.
+This switch is similar to \fB\-\-no\-undefined\fR except that it
+determines the behaviour when the undefined symbols are in a
+shared library rather than a regular object file. It does not affect
+how undefined symbols in regular object files are handled.
+.Sp
+The default behaviour is to report errors for any undefined symbols
+referenced in shared libraries if the linker is being used to create
+an executable, but to allow them if the linker is being used to create
+a shared library.
+.Sp
+The reasons for allowing undefined symbol references in shared
+libraries specified at link time are that:
+.RS 4
+.IP "\(bu" 4
+A shared library specified at link time may not be the same as the one
+that is available at load time, so the symbol might actually be
+resolvable at load time.
+.IP "\(bu" 4
+There are some operating systems, eg BeOS and \s-1HPPA\s0, where undefined
+symbols in shared libraries are normal.
+.Sp
+The BeOS kernel for example patches shared libraries at load time to
+select whichever function is most appropriate for the current
+architecture. This is used, for example, to dynamically select an
+appropriate memset function.
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-no\-undefined\-version\fR" 4
+.IX Item "--no-undefined-version"
+Normally when a symbol has an undefined version, the linker will ignore
+it. This option disallows symbols with undefined version and a fatal error
+will be issued instead.
+.IP "\fB\-\-default\-symver\fR" 4
+.IX Item "--default-symver"
+Create and use a default symbol version (the soname) for unversioned
+exported symbols.
+.IP "\fB\-\-default\-imported\-symver\fR" 4
+.IX Item "--default-imported-symver"
+Create and use a default symbol version (the soname) for unversioned
+imported symbols.
+.IP "\fB\-\-no\-warn\-mismatch\fR" 4
+.IX Item "--no-warn-mismatch"
+Normally \fBld\fR will give an error if you try to link together input
+files that are mismatched for some reason, perhaps because they have
+been compiled for different processors or for different endiannesses.
+This option tells \fBld\fR that it should silently permit such possible
+errors. This option should only be used with care, in cases when you
+have taken some special action that ensures that the linker errors are
+inappropriate.
+.IP "\fB\-\-no\-warn\-search\-mismatch\fR" 4
+.IX Item "--no-warn-search-mismatch"
+Normally \fBld\fR will give a warning if it finds an incompatible
+library during a library search. This option silences the warning.
+.IP "\fB\-\-no\-whole\-archive\fR" 4
+.IX Item "--no-whole-archive"
+Turn off the effect of the \fB\-\-whole\-archive\fR option for subsequent
+archive files.
+.IP "\fB\-\-noinhibit\-exec\fR" 4
+.IX Item "--noinhibit-exec"
+Retain the executable output file whenever it is still usable.
+Normally, the linker will not produce an output file if it encounters
+errors during the link process; it exits without writing an output file
+when it issues any error whatsoever.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Only search library directories explicitly specified on the
+command line. Library directories specified in linker scripts
+(including linker scripts specified on the command line) are ignored.
+.IP "\fB\-\-oformat=\fR\fIoutput-format\fR" 4
+.IX Item "--oformat=output-format"
+\&\fBld\fR may be configured to support more than one kind of object
+file. If your \fBld\fR is configured this way, you can use the
+\&\fB\-\-oformat\fR option to specify the binary format for the output
+object file. Even when \fBld\fR is configured to support alternative
+object formats, you don't usually need to specify this, as \fBld\fR
+should be configured to produce as a default output format the most
+usual format on each machine. \fIoutput-format\fR is a text string, the
+name of a particular format supported by the \s-1BFD\s0 libraries. (You can
+list the available binary formats with \fBobjdump \-i\fR.) The script
+command \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR can also specify the output format, but
+this option overrides it.
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+.PD 0
+.IP "\fB\-\-pic\-executable\fR" 4
+.IX Item "--pic-executable"
+.PD
+Create a position independent executable. This is currently only supported on
+\&\s-1ELF\s0 platforms. Position independent executables are similar to shared
+libraries in that they are relocated by the dynamic linker to the virtual
+address the \s-1OS\s0 chooses for them (which can vary between invocations). Like
+normal dynamically linked executables they can be executed and symbols
+defined in the executable cannot be overridden by shared libraries.
+.IP "\fB\-qmagic\fR" 4
+.IX Item "-qmagic"
+This option is ignored for Linux compatibility.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+This option is ignored for \s-1SVR4\s0 compatibility.
+.IP "\fB\-\-relax\fR" 4
+.IX Item "--relax"
+An option with machine dependent effects.
+This option is only supported on a few targets.
+.Sp
+On some platforms, the \fB\-\-relax\fR option performs global
+optimizations that become possible when the linker resolves addressing
+in the program, such as relaxing address modes and synthesizing new
+instructions in the output object file.
+.Sp
+On some platforms these link time global optimizations may make symbolic
+debugging of the resulting executable impossible.
+This is known to be
+the case for the Matsushita \s-1MN10200\s0 and \s-1MN10300\s0 family of processors.
+.Sp
+On platforms where this is not supported, \fB\-\-relax\fR is accepted,
+but ignored.
+.IP "\fB\-\-retain\-symbols\-file=\fR\fIfilename\fR" 4
+.IX Item "--retain-symbols-file=filename"
+Retain \fIonly\fR the symbols listed in the file \fIfilename\fR,
+discarding all others. \fIfilename\fR is simply a flat file, with one
+symbol name per line. This option is especially useful in environments
+(such as VxWorks)
+where a large global symbol table is accumulated gradually, to conserve
+run-time memory.
+.Sp
+\&\fB\-\-retain\-symbols\-file\fR does \fInot\fR discard undefined symbols,
+or symbols needed for relocations.
+.Sp
+You may only specify \fB\-\-retain\-symbols\-file\fR once in the command
+line. It overrides \fB\-s\fR and \fB\-S\fR.
+.IP "\fB\-rpath=\fR\fIdir\fR" 4
+.IX Item "-rpath=dir"
+Add a directory to the runtime library search path. This is used when
+linking an \s-1ELF\s0 executable with shared objects. All \fB\-rpath\fR
+arguments are concatenated and passed to the runtime linker, which uses
+them to locate shared objects at runtime. The \fB\-rpath\fR option is
+also used when locating shared objects which are needed by shared
+objects explicitly included in the link; see the description of the
+\&\fB\-rpath\-link\fR option. If \fB\-rpath\fR is not used when linking an
+\&\s-1ELF\s0 executable, the contents of the environment variable
+\&\f(CW\*(C`LD_RUN_PATH\*(C'\fR will be used if it is defined.
+.Sp
+The \fB\-rpath\fR option may also be used on SunOS. By default, on
+SunOS, the linker will form a runtime search patch out of all the
+\&\fB\-L\fR options it is given. If a \fB\-rpath\fR option is used, the
+runtime search path will be formed exclusively using the \fB\-rpath\fR
+options, ignoring the \fB\-L\fR options. This can be useful when using
+gcc, which adds many \fB\-L\fR options which may be on \s-1NFS\s0 mounted
+file systems.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-rpath\-link=\fR\fIdir\fR" 4
+.IX Item "-rpath-link=dir"
+When using \s-1ELF\s0 or SunOS, one shared library may require another. This
+happens when an \f(CW\*(C`ld \-shared\*(C'\fR link includes a shared library as one
+of the input files.
+.Sp
+When the linker encounters such a dependency when doing a non-shared,
+non-relocatable link, it will automatically try to locate the required
+shared library and include it in the link, if it is not included
+explicitly. In such a case, the \fB\-rpath\-link\fR option
+specifies the first set of directories to search. The
+\&\fB\-rpath\-link\fR option may specify a sequence of directory names
+either by specifying a list of names separated by colons, or by
+appearing multiple times.
+.Sp
+This option should be used with caution as it overrides the search path
+that may have been hard compiled into a shared library. In such a case it
+is possible to use unintentionally a different search path than the
+runtime linker would do.
+.Sp
+The linker uses the following search paths to locate required shared
+libraries:
+.RS 4
+.IP "1." 4
+Any directories specified by \fB\-rpath\-link\fR options.
+.IP "2." 4
+Any directories specified by \fB\-rpath\fR options. The difference
+between \fB\-rpath\fR and \fB\-rpath\-link\fR is that directories
+specified by \fB\-rpath\fR options are included in the executable and
+used at runtime, whereas the \fB\-rpath\-link\fR option is only effective
+at link time. Searching \fB\-rpath\fR in this way is only supported
+by native linkers and cross linkers which have been configured with
+the \fB\-\-with\-sysroot\fR option.
+.IP "3." 4
+On an \s-1ELF\s0 system, for native linkers, if the \fB\-rpath\fR and
+\&\fB\-rpath\-link\fR options were not used, search the contents of the
+environment variable \f(CW\*(C`LD_RUN_PATH\*(C'\fR.
+.IP "4." 4
+On SunOS, if the \fB\-rpath\fR option was not used, search any
+directories specified using \fB\-L\fR options.
+.IP "5." 4
+For a native linker, the search the contents of the environment
+variable \f(CW\*(C`LD_LIBRARY_PATH\*(C'\fR.
+.IP "6." 4
+For a native \s-1ELF\s0 linker, the directories in \f(CW\*(C`DT_RUNPATH\*(C'\fR or
+\&\f(CW\*(C`DT_RPATH\*(C'\fR of a shared library are searched for shared
+libraries needed by it. The \f(CW\*(C`DT_RPATH\*(C'\fR entries are ignored if
+\&\f(CW\*(C`DT_RUNPATH\*(C'\fR entries exist.
+.IP "7." 4
+The default directories, normally \fI/lib\fR and \fI/usr/lib\fR.
+.IP "8." 4
+For a native linker on an \s-1ELF\s0 system, if the file \fI/etc/ld.so.conf\fR
+exists, the list of directories found in that file.
+.RE
+.RS 4
+.Sp
+If the required shared library is not found, the linker will issue a
+warning and continue with the link.
+.RE
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+.PD 0
+.IP "\fB\-Bshareable\fR" 4
+.IX Item "-Bshareable"
+.PD
+Create a shared library. This is currently only supported on \s-1ELF\s0, \s-1XCOFF\s0
+and SunOS platforms. On SunOS, the linker will automatically create a
+shared library if the \fB\-e\fR option is not used and there are
+undefined symbols in the link.
+.IP "\fB\-\-sort\-common\fR" 4
+.IX Item "--sort-common"
+.PD 0
+.IP "\fB\-\-sort\-common=ascending\fR" 4
+.IX Item "--sort-common=ascending"
+.IP "\fB\-\-sort\-common=descending\fR" 4
+.IX Item "--sort-common=descending"
+.PD
+This option tells \fBld\fR to sort the common symbols by alignment in
+ascending or descending order when it places them in the appropriate output
+sections. The symbol alignments considered are sixteen-byte or larger,
+eight-byte, four-byte, two-byte, and one-byte. This is to prevent gaps
+between symbols due to alignment constraints. If no sorting order is
+specified, then descending order is assumed.
+.IP "\fB\-\-sort\-section=name\fR" 4
+.IX Item "--sort-section=name"
+This option will apply \f(CW\*(C`SORT_BY_NAME\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-sort\-section=alignment\fR" 4
+.IX Item "--sort-section=alignment"
+This option will apply \f(CW\*(C`SORT_BY_ALIGNMENT\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-split\-by\-file[=\fR\fIsize\fR\fB]\fR" 4
+.IX Item "--split-by-file[=size]"
+Similar to \fB\-\-split\-by\-reloc\fR but creates a new output section for
+each input file when \fIsize\fR is reached. \fIsize\fR defaults to a
+size of 1 if not given.
+.IP "\fB\-\-split\-by\-reloc[=\fR\fIcount\fR\fB]\fR" 4
+.IX Item "--split-by-reloc[=count]"
+Tries to creates extra sections in the output file so that no single
+output section in the file contains more than \fIcount\fR relocations.
+This is useful when generating huge relocatable files for downloading into
+certain real time kernels with the \s-1COFF\s0 object file format; since \s-1COFF\s0
+cannot represent more than 65535 relocations in a single section. Note
+that this will fail to work with object file formats which do not
+support arbitrary sections. The linker will not split up individual
+input sections for redistribution, so if a single input section contains
+more than \fIcount\fR relocations one output section will contain that
+many relocations. \fIcount\fR defaults to a value of 32768.
+.IP "\fB\-\-stats\fR" 4
+.IX Item "--stats"
+Compute and display statistics about the operation of the linker, such
+as execution time and memory usage.
+.IP "\fB\-\-sysroot=\fR\fIdirectory\fR" 4
+.IX Item "--sysroot=directory"
+Use \fIdirectory\fR as the location of the sysroot, overriding the
+configure-time default. This option is only supported by linkers
+that were configured using \fB\-\-with\-sysroot\fR.
+.IP "\fB\-\-traditional\-format\fR" 4
+.IX Item "--traditional-format"
+For some targets, the output of \fBld\fR is different in some ways from
+the output of some existing linker. This switch requests \fBld\fR to
+use the traditional format instead.
+.Sp
+For example, on SunOS, \fBld\fR combines duplicate entries in the
+symbol string table. This can reduce the size of an output file with
+full debugging information by over 30 percent. Unfortunately, the SunOS
+\&\f(CW\*(C`dbx\*(C'\fR program can not read the resulting program (\f(CW\*(C`gdb\*(C'\fR has no
+trouble). The \fB\-\-traditional\-format\fR switch tells \fBld\fR to not
+combine duplicate entries.
+.IP "\fB\-\-section\-start=\fR\fIsectionname\fR\fB=\fR\fIorg\fR" 4
+.IX Item "--section-start=sectionname=org"
+Locate a section in the output file at the absolute
+address given by \fIorg\fR. You may use this option as many
+times as necessary to locate multiple sections in the command
+line.
+\&\fIorg\fR must be a single hexadecimal integer;
+for compatibility with other linkers, you may omit the leading
+\&\fB0x\fR usually associated with hexadecimal values. \fINote:\fR there
+should be no white space between \fIsectionname\fR, the equals
+sign ("\fB=\fR"), and \fIorg\fR.
+.IP "\fB\-Tbss=\fR\fIorg\fR" 4
+.IX Item "-Tbss=org"
+.PD 0
+.IP "\fB\-Tdata=\fR\fIorg\fR" 4
+.IX Item "-Tdata=org"
+.IP "\fB\-Ttext=\fR\fIorg\fR" 4
+.IX Item "-Ttext=org"
+.PD
+Same as \fB\-\-section\-start\fR, with \f(CW\*(C`.bss\*(C'\fR, \f(CW\*(C`.data\*(C'\fR or
+\&\f(CW\*(C`.text\*(C'\fR as the \fIsectionname\fR.
+.IP "\fB\-Ttext\-segment=\fR\fIorg\fR" 4
+.IX Item "-Ttext-segment=org"
+When creating an \s-1ELF\s0 executable or shared object, it will set the address
+of the first byte of the text segment.
+.IP "\fB\-\-unresolved\-symbols=\fR\fImethod\fR" 4
+.IX Item "--unresolved-symbols=method"
+Determine how to handle unresolved symbols. There are four possible
+values for \fBmethod\fR:
+.RS 4
+.IP "\fBignore-all\fR" 4
+.IX Item "ignore-all"
+Do not report any unresolved symbols.
+.IP "\fBreport-all\fR" 4
+.IX Item "report-all"
+Report all unresolved symbols. This is the default.
+.IP "\fBignore-in-object-files\fR" 4
+.IX Item "ignore-in-object-files"
+Report unresolved symbols that are contained in shared libraries, but
+ignore them if they come from regular object files.
+.IP "\fBignore-in-shared-libs\fR" 4
+.IX Item "ignore-in-shared-libs"
+Report unresolved symbols that come from regular object files, but
+ignore them if they come from shared libraries. This can be useful
+when creating a dynamic binary and it is known that all the shared
+libraries that it should be referencing are included on the linker's
+command line.
+.RE
+.RS 4
+.Sp
+The behaviour for shared libraries on their own can also be controlled
+by the \fB\-\-[no\-]allow\-shlib\-undefined\fR option.
+.Sp
+Normally the linker will generate an error message for each reported
+unresolved symbol but the option \fB\-\-warn\-unresolved\-symbols\fR
+can change this to a warning.
+.RE
+.IP "\fB\-\-dll\-verbose\fR" 4
+.IX Item "--dll-verbose"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Display the version number for \fBld\fR and list the linker emulations
+supported. Display which input files can and cannot be opened. Display
+the linker script being used by the linker.
+.IP "\fB\-\-version\-script=\fR\fIversion-scriptfile\fR" 4
+.IX Item "--version-script=version-scriptfile"
+Specify the name of a version script to the linker. This is typically
+used when creating shared libraries to specify additional information
+about the version hierarchy for the library being created. This option
+is only fully supported on \s-1ELF\s0 platforms which support shared libraries;
+see \fB\s-1VERSION\s0\fR. It is partially supported on \s-1PE\s0 platforms, which can
+use version scripts to filter symbol visibility in auto-export mode: any
+symbols marked \fBlocal\fR in the version script will not be exported.
+.IP "\fB\-\-warn\-common\fR" 4
+.IX Item "--warn-common"
+Warn when a common symbol is combined with another common symbol or with
+a symbol definition. Unix linkers allow this somewhat sloppy practise,
+but linkers on some other operating systems do not. This option allows
+you to find potential problems from combining global symbols.
+Unfortunately, some C libraries use this practise, so you may get some
+warnings about symbols in the libraries as well as in your programs.
+.Sp
+There are three kinds of global symbols, illustrated here by C examples:
+.RS 4
+.IP "\fBint i = 1;\fR" 4
+.IX Item "int i = 1;"
+A definition, which goes in the initialized data section of the output
+file.
+.IP "\fBextern int i;\fR" 4
+.IX Item "extern int i;"
+An undefined reference, which does not allocate space.
+There must be either a definition or a common symbol for the
+variable somewhere.
+.IP "\fBint i;\fR" 4
+.IX Item "int i;"
+A common symbol. If there are only (one or more) common symbols for a
+variable, it goes in the uninitialized data area of the output file.
+The linker merges multiple common symbols for the same variable into a
+single symbol. If they are of different sizes, it picks the largest
+size. The linker turns a common symbol into a declaration, if there is
+a definition of the same variable.
+.RE
+.RS 4
+.Sp
+The \fB\-\-warn\-common\fR option can produce five kinds of warnings.
+Each warning consists of a pair of lines: the first describes the symbol
+just encountered, and the second describes the previous symbol
+encountered with the same name. One or both of the two symbols will be
+a common symbol.
+.IP "1." 4
+Turning a common symbol into a reference, because there is already a
+definition for the symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overridden by definition
+\& <file>(<section>): warning: defined here
+.Ve
+.IP "2." 4
+Turning a common symbol into a reference, because a later definition for
+the symbol is encountered. This is the same as the previous case,
+except that the symbols are encountered in a different order.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: definition of \`<symbol>\*(Aq
+\& overriding common
+\& <file>(<section>): warning: common is here
+.Ve
+.IP "3." 4
+Merging a common symbol with a previous same-sized common symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: multiple common
+\& of \`<symbol>\*(Aq
+\& <file>(<section>): warning: previous common is here
+.Ve
+.IP "4." 4
+Merging a common symbol with a previous larger common symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overridden by larger common
+\& <file>(<section>): warning: larger common is here
+.Ve
+.IP "5." 4
+Merging a common symbol with a previous smaller common symbol. This is
+the same as the previous case, except that the symbols are
+encountered in a different order.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overriding smaller common
+\& <file>(<section>): warning: smaller common is here
+.Ve
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-warn\-constructors\fR" 4
+.IX Item "--warn-constructors"
+Warn if any global constructors are used. This is only useful for a few
+object file formats. For formats like \s-1COFF\s0 or \s-1ELF\s0, the linker can not
+detect the use of global constructors.
+.IP "\fB\-\-warn\-multiple\-gp\fR" 4
+.IX Item "--warn-multiple-gp"
+Warn if multiple global pointer values are required in the output file.
+This is only meaningful for certain processors, such as the Alpha.
+Specifically, some processors put large-valued constants in a special
+section. A special register (the global pointer) points into the middle
+of this section, so that constants can be loaded efficiently via a
+base-register relative addressing mode. Since the offset in
+base-register relative mode is fixed and relatively small (e.g., 16
+bits), this limits the maximum size of the constant pool. Thus, in
+large programs, it is often necessary to use multiple global pointer
+values in order to be able to address all possible constants. This
+option causes a warning to be issued whenever this case occurs.
+.IP "\fB\-\-warn\-once\fR" 4
+.IX Item "--warn-once"
+Only warn once for each undefined symbol, rather than once per module
+which refers to it.
+.IP "\fB\-\-warn\-section\-align\fR" 4
+.IX Item "--warn-section-align"
+Warn if the address of an output section is changed because of
+alignment. Typically, the alignment will be set by an input section.
+The address will only be changed if it not explicitly specified; that
+is, if the \f(CW\*(C`SECTIONS\*(C'\fR command does not specify a start address for
+the section.
+.IP "\fB\-\-warn\-shared\-textrel\fR" 4
+.IX Item "--warn-shared-textrel"
+Warn if the linker adds a \s-1DT_TEXTREL\s0 to a shared object.
+.IP "\fB\-\-warn\-alternate\-em\fR" 4
+.IX Item "--warn-alternate-em"
+Warn if an object has alternate \s-1ELF\s0 machine code.
+.IP "\fB\-\-warn\-unresolved\-symbols\fR" 4
+.IX Item "--warn-unresolved-symbols"
+If the linker is going to report an unresolved symbol (see the option
+\&\fB\-\-unresolved\-symbols\fR) it will normally generate an error.
+This option makes it generate a warning instead.
+.IP "\fB\-\-error\-unresolved\-symbols\fR" 4
+.IX Item "--error-unresolved-symbols"
+This restores the linker's default behaviour of generating errors when
+it is reporting unresolved symbols.
+.IP "\fB\-\-whole\-archive\fR" 4
+.IX Item "--whole-archive"
+For each archive mentioned on the command line after the
+\&\fB\-\-whole\-archive\fR option, include every object file in the archive
+in the link, rather than searching the archive for the required object
+files. This is normally used to turn an archive file into a shared
+library, forcing every object to be included in the resulting shared
+library. This option may be used more than once.
+.Sp
+Two notes when using this option from gcc: First, gcc doesn't know
+about this option, so you have to use \fB\-Wl,\-whole\-archive\fR.
+Second, don't forget to use \fB\-Wl,\-no\-whole\-archive\fR after your
+list of archives, because gcc will add its own list of archives to
+your link and you may not want this flag to affect those as well.
+.IP "\fB\-\-wrap=\fR\fIsymbol\fR" 4
+.IX Item "--wrap=symbol"
+Use a wrapper function for \fIsymbol\fR. Any undefined reference to
+\&\fIsymbol\fR will be resolved to \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. Any
+undefined reference to \f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR will be resolved to
+\&\fIsymbol\fR.
+.Sp
+This can be used to provide a wrapper for a system function. The
+wrapper function should be called \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. If it
+wishes to call the system function, it should call
+\&\f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR.
+.Sp
+Here is a trivial example:
+.Sp
+.Vb 6
+\& void *
+\& _\|_wrap_malloc (size_t c)
+\& {
+\& printf ("malloc called with %zu\en", c);
+\& return _\|_real_malloc (c);
+\& }
+.Ve
+.Sp
+If you link other code with this file using \fB\-\-wrap malloc\fR, then
+all calls to \f(CW\*(C`malloc\*(C'\fR will call the function \f(CW\*(C`_\|_wrap_malloc\*(C'\fR
+instead. The call to \f(CW\*(C`_\|_real_malloc\*(C'\fR in \f(CW\*(C`_\|_wrap_malloc\*(C'\fR will
+call the real \f(CW\*(C`malloc\*(C'\fR function.
+.Sp
+You may wish to provide a \f(CW\*(C`_\|_real_malloc\*(C'\fR function as well, so that
+links without the \fB\-\-wrap\fR option will succeed. If you do this,
+you should not put the definition of \f(CW\*(C`_\|_real_malloc\*(C'\fR in the same
+file as \f(CW\*(C`_\|_wrap_malloc\*(C'\fR; if you do, the assembler may resolve the
+call before the linker has a chance to wrap it to \f(CW\*(C`malloc\*(C'\fR.
+.IP "\fB\-\-eh\-frame\-hdr\fR" 4
+.IX Item "--eh-frame-hdr"
+Request creation of \f(CW\*(C`.eh_frame_hdr\*(C'\fR section and \s-1ELF\s0
+\&\f(CW\*(C`PT_GNU_EH_FRAME\*(C'\fR segment header.
+.IP "\fB\-\-enable\-new\-dtags\fR" 4
+.IX Item "--enable-new-dtags"
+.PD 0
+.IP "\fB\-\-disable\-new\-dtags\fR" 4
+.IX Item "--disable-new-dtags"
+.PD
+This linker can create the new dynamic tags in \s-1ELF\s0. But the older \s-1ELF\s0
+systems may not understand them. If you specify
+\&\fB\-\-enable\-new\-dtags\fR, the dynamic tags will be created as needed.
+If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
+created. By default, the new dynamic tags are not created. Note that
+those options are only available for \s-1ELF\s0 systems.
+.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4
+.IX Item "--hash-size=number"
+Set the default size of the linker's hash tables to a prime number
+close to \fInumber\fR. Increasing this value can reduce the length of
+time it takes the linker to perform its tasks, at the expense of
+increasing the linker's memory requirements. Similarly reducing this
+value can reduce the memory requirements at the expense of speed.
+.IP "\fB\-\-hash\-style=\fR\fIstyle\fR" 4
+.IX Item "--hash-style=style"
+Set the type of linker's hash table(s). \fIstyle\fR can be either
+\&\f(CW\*(C`sysv\*(C'\fR for classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR section, \f(CW\*(C`gnu\*(C'\fR for
+new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR section or \f(CW\*(C`both\*(C'\fR for both
+the classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR and new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR
+hash tables. The default is \f(CW\*(C`sysv\*(C'\fR.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces memory requirements at ld runtime, at the expense of
+linking speed. This was introduced to select the old O(n^2) algorithm
+for link map file generation, rather than the new O(n) algorithm which uses
+about 40% more memory for symbol storage.
+.Sp
+Another effect of the switch is to set the default hash table size to
+1021, which again saves memory at the cost of lengthening the linker's
+run time. This is not done however if the \fB\-\-hash\-size\fR switch
+has been used.
+.Sp
+The \fB\-\-reduce\-memory\-overheads\fR switch may be also be used to
+enable other tradeoffs in future versions of the linker.
+.IP "\fB\-\-build\-id\fR" 4
+.IX Item "--build-id"
+.PD 0
+.IP "\fB\-\-build\-id=\fR\fIstyle\fR" 4
+.IX Item "--build-id=style"
+.PD
+Request creation of \f(CW\*(C`.note.gnu.build\-id\*(C'\fR \s-1ELF\s0 note section.
+The contents of the note are unique bits identifying this linked
+file. \fIstyle\fR can be \f(CW\*(C`uuid\*(C'\fR to use 128 random bits,
+\&\f(CW\*(C`sha1\*(C'\fR to use a 160\-bit \s-1SHA1\s0 hash on the normative
+parts of the output contents, \f(CW\*(C`md5\*(C'\fR to use a 128\-bit
+\&\s-1MD5\s0 hash on the normative parts of the output contents, or
+\&\f(CW\*(C`0x\f(CIhexstring\f(CW\*(C'\fR to use a chosen bit string specified as
+an even number of hexadecimal digits (\f(CW\*(C`\-\*(C'\fR and \f(CW\*(C`:\*(C'\fR
+characters between digit pairs are ignored). If \fIstyle\fR is
+omitted, \f(CW\*(C`sha1\*(C'\fR is used.
+.Sp
+The \f(CW\*(C`md5\*(C'\fR and \f(CW\*(C`sha1\*(C'\fR styles produces an identifier
+that is always the same in an identical output file, but will be
+unique among all nonidentical output files. It is not intended
+to be compared as a checksum for the file's contents. A linked
+file may be changed later by other tools, but the build \s-1ID\s0 bit
+string identifying the original linked file does not change.
+.Sp
+Passing \f(CW\*(C`none\*(C'\fR for \fIstyle\fR disables the setting from any
+\&\f(CW\*(C`\-\-build\-id\*(C'\fR options earlier on the command line.
+.PP
+The i386 \s-1PE\s0 linker supports the \fB\-shared\fR option, which causes
+the output to be a dynamically linked library (\s-1DLL\s0) instead of a
+normal executable. You should name the output \f(CW\*(C`*.dll\*(C'\fR when you
+use this option. In addition, the linker fully supports the standard
+\&\f(CW\*(C`*.def\*(C'\fR files, which may be specified on the linker command line
+like an object file (in fact, it should precede archives it exports
+symbols from, to ensure that they get linked in, just like a normal
+object file).
+.PP
+In addition to the options common to all targets, the i386 \s-1PE\s0 linker
+support additional command line options that are specific to the i386
+\&\s-1PE\s0 target. Options that take values may be separated from their
+values by either a space or an equals sign.
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+If given, symbols with a stdcall suffix (@\fInn\fR) will be exported
+as-is and also with the suffix stripped.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-base\-file\fR \fIfile\fR" 4
+.IX Item "--base-file file"
+Use \fIfile\fR as the name of a file in which to save the base
+addresses of all the relocations needed for generating DLLs with
+\&\fIdlltool\fR.
+[This is an i386 \s-1PE\s0 specific option]
+.IP "\fB\-\-dll\fR" 4
+.IX Item "--dll"
+Create a \s-1DLL\s0 instead of a regular executable. You may also use
+\&\fB\-shared\fR or specify a \f(CW\*(C`LIBRARY\*(C'\fR in a given \f(CW\*(C`.def\*(C'\fR
+file.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-long\-section\-names\fR" 4
+.IX Item "--enable-long-section-names"
+.PD 0
+.IP "\fB\-\-disable\-long\-section\-names\fR" 4
+.IX Item "--disable-long-section-names"
+.PD
+The \s-1PE\s0 variants of the Coff object format add an extension that permits
+the use of section names longer than eight characters, the normal limit
+for Coff. By default, these names are only allowed in object files, as
+fully-linked executable images do not carry the Coff string table required
+to support the longer names. As a \s-1GNU\s0 extension, it is possible to
+allow their use in executable images as well, or to (probably pointlessly!)
+disallow it in object files, by using these two options. Executable images
+generated with these long section names are slightly non-standard, carrying
+as they do a string table, and may generate confusing output when examined
+with non-GNU PE-aware tools, such as file viewers and dumpers. However,
+\&\s-1GDB\s0 relies on the use of \s-1PE\s0 long section names to find Dwarf\-2 debug
+information sections in an executable image at runtime, and so if neither
+option is specified on the command-line, \fBld\fR will enable long
+section names, overriding the default and technically correct behaviour,
+when it finds the presence of debug information while linking an executable
+image and not stripping symbols.
+[This option is valid for all \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-enable\-stdcall\-fixup\fR" 4
+.IX Item "--enable-stdcall-fixup"
+.PD 0
+.IP "\fB\-\-disable\-stdcall\-fixup\fR" 4
+.IX Item "--disable-stdcall-fixup"
+.PD
+If the link finds a symbol that it cannot resolve, it will attempt to
+do \*(L"fuzzy linking\*(R" by looking for another defined symbol that differs
+only in the format of the symbol name (cdecl vs stdcall) and will
+resolve that symbol by linking to the match. For example, the
+undefined symbol \f(CW\*(C`_foo\*(C'\fR might be linked to the function
+\&\f(CW\*(C`_foo@12\*(C'\fR, or the undefined symbol \f(CW\*(C`_bar@16\*(C'\fR might be linked
+to the function \f(CW\*(C`_bar\*(C'\fR. When the linker does this, it prints a
+warning, since it normally should have failed to link, but sometimes
+import libraries generated from third-party dlls may need this feature
+to be usable. If you specify \fB\-\-enable\-stdcall\-fixup\fR, this
+feature is fully enabled and warnings are not printed. If you specify
+\&\fB\-\-disable\-stdcall\-fixup\fR, this feature is disabled and such
+mismatches are considered to be errors.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+If given, all global symbols in the objects used to build a \s-1DLL\s0 will
+be exported by the \s-1DLL\s0. Note that this is the default if there
+otherwise wouldn't be any exported symbols. When symbols are
+explicitly exported via \s-1DEF\s0 files or implicitly exported via function
+attributes, the default is to not export anything else unless this
+option is given. Note that the symbols \f(CW\*(C`DllMain@12\*(C'\fR,
+\&\f(CW\*(C`DllEntryPoint@0\*(C'\fR, \f(CW\*(C`DllMainCRTStartup@12\*(C'\fR, and
+\&\f(CW\*(C`impure_ptr\*(C'\fR will not be automatically
+exported. Also, symbols imported from other DLLs will not be
+re-exported, nor will symbols specifying the \s-1DLL\s0's internal layout
+such as those beginning with \f(CW\*(C`_head_\*(C'\fR or ending with
+\&\f(CW\*(C`_iname\*(C'\fR. In addition, no symbols from \f(CW\*(C`libgcc\*(C'\fR,
+\&\f(CW\*(C`libstd++\*(C'\fR, \f(CW\*(C`libmingw32\*(C'\fR, or \f(CW\*(C`crtX.o\*(C'\fR will be exported.
+Symbols whose names begin with \f(CW\*(C`_\|_rtti_\*(C'\fR or \f(CW\*(C`_\|_builtin_\*(C'\fR will
+not be exported, to help with \*(C+ DLLs. Finally, there is an
+extensive list of cygwin-private symbols that are not exported
+(obviously, this applies on when building DLLs for cygwin targets).
+These cygwin-excludes are: \f(CW\*(C`_cygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_cygwin_crt0_common@8\*(C'\fR, \f(CW\*(C`_cygwin_noncygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_fmode\*(C'\fR, \f(CW\*(C`_impure_ptr\*(C'\fR, \f(CW\*(C`cygwin_attach_dll\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain0\*(C'\fR, \f(CW\*(C`cygwin_premain1\*(C'\fR, \f(CW\*(C`cygwin_premain2\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain3\*(C'\fR, and \f(CW\*(C`environ\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-exclude\-symbols\fR \fIsymbol\fR\fB,\fR\fIsymbol\fR\fB,...\fR" 4
+.IX Item "--exclude-symbols symbol,symbol,..."
+Specifies a list of symbols which should not be automatically
+exported. The symbol names may be delimited by commas or colons.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-file\-alignment\fR" 4
+.IX Item "--file-alignment"
+Specify the file alignment. Sections in the file will always begin at
+file offsets which are multiples of this number. This defaults to
+512.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program. The default is 1Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll. This is
+the lowest memory location that will be used when your program or dll
+is loaded. To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls. The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+If given, the stdcall suffixes (@\fInn\fR) will be stripped from
+symbols before they are exported.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-large\-address\-aware\fR" 4
+.IX Item "--large-address-aware"
+If given, the appropriate bit in the \*(L"Characteristics\*(R" field of the \s-1COFF\s0
+header is set to indicate that this executable supports virtual addresses
+greater than 2 gigabytes. This should be used in conjunction with the /3GB
+or /USERVA=\fIvalue\fR megabytes switch in the \*(L"[operating systems]\*(R"
+section of the \s-1BOOT\s0.INI. Otherwise, this bit has no effect.
+[This option is specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-major\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--major-image-version value"
+Sets the major number of the \*(L"image version\*(R". Defaults to 1.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--major-os-version value"
+Sets the major number of the \*(L"os version\*(R". Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--major-subsystem-version value"
+Sets the major number of the \*(L"subsystem version\*(R". Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-image-version value"
+Sets the minor number of the \*(L"image version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-os-version value"
+Sets the minor number of the \*(L"os version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-subsystem-version value"
+Sets the minor number of the \*(L"subsystem version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-output\-def\fR \fIfile\fR" 4
+.IX Item "--output-def file"
+The linker will create the file \fIfile\fR which will contain a \s-1DEF\s0
+file corresponding to the \s-1DLL\s0 the linker is generating. This \s-1DEF\s0 file
+(which should be called \f(CW\*(C`*.def\*(C'\fR) may be used to create an import
+library with \f(CW\*(C`dlltool\*(C'\fR or may be used as a reference to
+automatically or implicitly exported symbols.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-out\-implib\fR \fIfile\fR" 4
+.IX Item "--out-implib file"
+The linker will create the file \fIfile\fR which will contain an
+import lib corresponding to the \s-1DLL\s0 the linker is generating. This
+import lib (which should be called \f(CW\*(C`*.dll.a\*(C'\fR or \f(CW\*(C`*.a\*(C'\fR
+may be used to link clients against the generated \s-1DLL\s0; this behaviour
+makes it possible to skip a separate \f(CW\*(C`dlltool\*(C'\fR import library
+creation step.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-image\-base\fR" 4
+.IX Item "--enable-auto-image-base"
+Automatically choose the image base for DLLs, unless one is specified
+using the \f(CW\*(C`\-\-image\-base\*(C'\fR argument. By using a hash generated
+from the dllname to create unique image bases for each \s-1DLL\s0, in-memory
+collisions and relocations which can delay program execution are
+avoided.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-image\-base\fR" 4
+.IX Item "--disable-auto-image-base"
+Do not automatically generate a unique image base. If there is no
+user-specified image base (\f(CW\*(C`\-\-image\-base\*(C'\fR) then use the platform
+default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-dll\-search\-prefix\fR \fIstring\fR" 4
+.IX Item "--dll-search-prefix string"
+When linking dynamically to a dll without an import library,
+search for \f(CW\*(C`<string><basename>.dll\*(C'\fR in preference to
+\&\f(CW\*(C`lib<basename>.dll\*(C'\fR. This behaviour allows easy distinction
+between DLLs built for the various \*(L"subplatforms\*(R": native, cygwin,
+uwin, pw, etc. For instance, cygwin DLLs typically use
+\&\f(CW\*(C`\-\-dll\-search\-prefix=cyg\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-import\fR" 4
+.IX Item "--enable-auto-import"
+Do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to \f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for
+\&\s-1DATA\s0 imports from DLLs, and create the necessary thunking symbols when
+building the import libraries with those \s-1DATA\s0 exports. Note: Use of the
+\&'auto\-import' extension will cause the text section of the image file
+to be made writable. This does not conform to the PE-COFF format
+specification published by Microsoft.
+.Sp
+Note \- use of the 'auto\-import' extension will also cause read only
+data which would normally be placed into the .rdata section to be
+placed into the .data section instead. This is in order to work
+around a problem with consts that is described here:
+http://www.cygwin.com/ml/cygwin/2004\-09/msg01101.html
+.Sp
+Using 'auto\-import' generally will 'just work' \*(-- but sometimes you may
+see this message:
+.Sp
+"variable '<var>' can't be auto-imported. Please read the
+documentation for ld's \f(CW\*(C`\-\-enable\-auto\-import\*(C'\fR for details."
+.Sp
+This message occurs when some (sub)expression accesses an address
+ultimately given by the sum of two constants (Win32 import tables only
+allow one). Instances where this may occur include accesses to member
+fields of struct variables imported from a \s-1DLL\s0, as well as using a
+constant index into an array variable imported from a \s-1DLL\s0. Any
+multiword variable (arrays, structs, long long, etc) may trigger
+this error condition. However, regardless of the exact data type
+of the offending exported variable, ld will always detect it, issue
+the warning, and exit.
+.Sp
+There are several ways to address this difficulty, regardless of the
+data type of the exported variable:
+.Sp
+One way is to use \-\-enable\-runtime\-pseudo\-reloc switch. This leaves the task
+of adjusting references in your client code for runtime environment, so
+this method works only when runtime environment supports this feature.
+.Sp
+A second solution is to force one of the 'constants' to be a variable \*(--
+that is, unknown and un-optimizable at compile time. For arrays,
+there are two possibilities: a) make the indexee (the array's address)
+a variable, or b) make the 'constant' index a variable. Thus:
+.Sp
+.Vb 3
+\& extern type extern_array[];
+\& extern_array[1] \-\->
+\& { volatile type *t=extern_array; t[1] }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\& extern type extern_array[];
+\& extern_array[1] \-\->
+\& { volatile int t=1; extern_array[t] }
+.Ve
+.Sp
+For structs (and most other multiword data types) the only option
+is to make the struct itself (or the long long, or the ...) variable:
+.Sp
+.Vb 3
+\& extern struct s extern_struct;
+\& extern_struct.field \-\->
+\& { volatile struct s *t=&extern_struct; t\->field }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\& extern long long extern_ll;
+\& extern_ll \-\->
+\& { volatile long long * local_ll=&extern_ll; *local_ll }
+.Ve
+.Sp
+A third method of dealing with this difficulty is to abandon
+\&'auto\-import' for the offending symbol and mark it with
+\&\f(CW\*(C`_\|_declspec(dllimport)\*(C'\fR. However, in practise that
+requires using compile-time #defines to indicate whether you are
+building a \s-1DLL\s0, building client code that will link to the \s-1DLL\s0, or
+merely building/linking to a static library. In making the choice
+between the various methods of resolving the 'direct address with
+constant offset' problem, you should consider typical real-world usage:
+.Sp
+Original:
+.Sp
+.Vb 7
+\& \-\-foo.h
+\& extern int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& printf("%d\en",arr[1]);
+\& }
+.Ve
+.Sp
+Solution 1:
+.Sp
+.Vb 9
+\& \-\-foo.h
+\& extern int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& /* This workaround is for win32 and cygwin; do not "optimize" */
+\& volatile int *parr = arr;
+\& printf("%d\en",parr[1]);
+\& }
+.Ve
+.Sp
+Solution 2:
+.Sp
+.Vb 10
+\& \-\-foo.h
+\& /* Note: auto\-export is assumed (no _\|_declspec(dllexport)) */
+\& #if (defined(_WIN32) || defined(_\|_CYGWIN_\|_)) && \e
+\& !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
+\& #define FOO_IMPORT _\|_declspec(dllimport)
+\& #else
+\& #define FOO_IMPORT
+\& #endif
+\& extern FOO_IMPORT int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& printf("%d\en",arr[1]);
+\& }
+.Ve
+.Sp
+A fourth way to avoid this problem is to re-code your
+library to use a functional interface rather than a data interface
+for the offending variables (e.g. \fIset_foo()\fR and \fIget_foo()\fR accessor
+functions).
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-import\fR" 4
+.IX Item "--disable-auto-import"
+Do not attempt to do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to
+\&\f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for \s-1DATA\s0 imports from DLLs.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--enable-runtime-pseudo-reloc"
+If your code contains expressions described in \-\-enable\-auto\-import section,
+that is, \s-1DATA\s0 imports from \s-1DLL\s0 with non-zero offset, this switch will create
+a vector of 'runtime pseudo relocations' which can be used by runtime
+environment to adjust references to such data in your client code.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--disable-runtime-pseudo-reloc"
+Do not create pseudo relocations for non-zero offset \s-1DATA\s0 imports from
+DLLs. This is the default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-extra\-pe\-debug\fR" 4
+.IX Item "--enable-extra-pe-debug"
+Show additional debug info related to auto-import symbol thunking.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-section\-alignment\fR" 4
+.IX Item "--section-alignment"
+Sets the section alignment. Sections in memory will always begin at
+addresses which are a multiple of this number. Defaults to 0x1000.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program. The default is 2Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute. The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
+the subsystem version also. Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.Sp
+The following options set flags in the \f(CW\*(C`DllCharacteristics\*(C'\fR field
+of the \s-1PE\s0 file header:
+[These options are specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-dynamicbase\fR" 4
+.IX Item "--dynamicbase"
+The image base address may be relocated using address space layout
+randomization (\s-1ASLR\s0). This feature was introduced with \s-1MS\s0 Windows
+Vista for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-forceinteg\fR" 4
+.IX Item "--forceinteg"
+Code integrity checks are enforced.
+.IP "\fB\-\-nxcompat\fR" 4
+.IX Item "--nxcompat"
+The image is compatible with the Data Execution Prevention.
+This feature was introduced with \s-1MS\s0 Windows \s-1XP\s0 \s-1SP2\s0 for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-no\-isolation\fR" 4
+.IX Item "--no-isolation"
+Although the image understands isolation, do not isolate the image.
+.IP "\fB\-\-no\-seh\fR" 4
+.IX Item "--no-seh"
+The image does not use \s-1SEH\s0. No \s-1SE\s0 handler may be called from
+this image.
+.IP "\fB\-\-no\-bind\fR" 4
+.IX Item "--no-bind"
+Do not bind this image.
+.IP "\fB\-\-wdmdriver\fR" 4
+.IX Item "--wdmdriver"
+The driver uses the \s-1MS\s0 Windows Driver Model.
+.IP "\fB\-\-tsaware\fR" 4
+.IX Item "--tsaware"
+The image is Terminal Server aware.
+.PP
+The 68HC11 and 68HC12 linkers support specific options to control the
+memory bank switching mapping and trampoline code generation.
+.IP "\fB\-\-no\-trampoline\fR" 4
+.IX Item "--no-trampoline"
+This option disables the generation of trampoline. By default a trampoline
+is generated for each far function which is called using a \f(CW\*(C`jsr\*(C'\fR
+instruction (this happens when a pointer to a far function is taken).
+.IP "\fB\-\-bank\-window\fR \fIname\fR" 4
+.IX Item "--bank-window name"
+This option indicates to the linker the name of the memory region in
+the \fB\s-1MEMORY\s0\fR specification that describes the memory bank window.
+The definition of such region is then used by the linker to compute
+paging and addresses within the memory window.
+.PP
+The following options are supported to control handling of \s-1GOT\s0 generation
+when linking for 68K targets.
+.IP "\fB\-\-got=\fR\fItype\fR" 4
+.IX Item "--got=type"
+This option tells the linker which \s-1GOT\s0 generation scheme to use.
+\&\fItype\fR should be one of \fBsingle\fR, \fBnegative\fR,
+\&\fBmultigot\fR or \fBtarget\fR. For more information refer to the
+Info entry for \fIld\fR.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+You can change the behaviour of \fBld\fR with the environment variables
+\&\f(CW\*(C`GNUTARGET\*(C'\fR,
+\&\f(CW\*(C`LDEMULATION\*(C'\fR and \f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR.
+.PP
+\&\f(CW\*(C`GNUTARGET\*(C'\fR determines the input-file object format if you don't
+use \fB\-b\fR (or its synonym \fB\-\-format\fR). Its value should be one
+of the \s-1BFD\s0 names for an input format. If there is no
+\&\f(CW\*(C`GNUTARGET\*(C'\fR in the environment, \fBld\fR uses the natural format
+of the target. If \f(CW\*(C`GNUTARGET\*(C'\fR is set to \f(CW\*(C`default\*(C'\fR then \s-1BFD\s0
+attempts to discover the input format by examining binary input files;
+this method often succeeds, but there are potential ambiguities, since
+there is no method of ensuring that the magic number used to specify
+object-file formats is unique. However, the configuration procedure for
+\&\s-1BFD\s0 on each system places the conventional format for that system first
+in the search-list, so ambiguities are resolved in favor of convention.
+.PP
+\&\f(CW\*(C`LDEMULATION\*(C'\fR determines the default emulation if you don't use the
+\&\fB\-m\fR option. The emulation can affect various aspects of linker
+behaviour, particularly the default linker script. You can list the
+available emulations with the \fB\-\-verbose\fR or \fB\-V\fR options. If
+the \fB\-m\fR option is not used, and the \f(CW\*(C`LDEMULATION\*(C'\fR environment
+variable is not defined, the default emulation depends upon how the
+linker was configured.
+.PP
+Normally, the linker will default to demangling symbols. However, if
+\&\f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR is set in the environment, then it will
+default to not demangling symbols. This environment variable is used in
+a similar fashion by the \f(CW\*(C`gcc\*(C'\fR linker wrapper program. The default
+may be overridden by the \fB\-\-demangle\fR and \fB\-\-no\-demangle\fR
+options.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjcopy\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1) and
+the Info entries for \fIbinutils\fR and
+\&\fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1
new file mode 100644
index 0000000..e01a0ca
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1
@@ -0,0 +1,251 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NLMCONV 1"
+.TH NLMCONV 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nlmconv \- converts object code into an NLM.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nlmconv [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-T\fR \fIheaderfile\fR|\fB\-\-header\-file=\fR\fIheaderfile\fR]
+ [\fB\-d\fR|\fB\-\-debug\fR] [\fB\-l\fR \fIlinker\fR|\fB\-\-linker=\fR\fIlinker\fR]
+ [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ \fIinfile\fR \fIoutfile\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBnlmconv\fR converts the relocatable \fBi386\fR object file
+\&\fIinfile\fR into the NetWare Loadable Module \fIoutfile\fR, optionally
+reading \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions
+on writing the \s-1NLM\s0 command file language used in header files, see the
+\&\fBlinkers\fR section, \fB\s-1NLMLINK\s0\fR in particular, of the \fI\s-1NLM\s0
+Development and Tools Overview\fR, which is part of the \s-1NLM\s0 Software
+Developer's Kit (\*(L"\s-1NLM\s0 \s-1SDK\s0\*(R"), available from Novell, Inc.
+\&\fBnlmconv\fR uses the \s-1GNU\s0 Binary File Descriptor library to read
+\&\fIinfile\fR;
+.PP
+\&\fBnlmconv\fR can perform a link step. In other words, you can list
+more than one object file for input if you list them in the definitions
+file (rather than simply specifying one input file on the command line).
+In this case, \fBnlmconv\fR calls the linker for you.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Object format of the input file. \fBnlmconv\fR can usually determine
+the format of a given file (so no default is necessary).
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Object format of the output file. \fBnlmconv\fR infers the output
+format based on the input format, e.g. for a \fBi386\fR input file the
+output format is \fBnlm32\-i386\fR.
+.IP "\fB\-T\fR \fIheaderfile\fR" 4
+.IX Item "-T headerfile"
+.PD 0
+.IP "\fB\-\-header\-file=\fR\fIheaderfile\fR" 4
+.IX Item "--header-file=headerfile"
+.PD
+Reads \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions on
+writing the \s-1NLM\s0 command file language used in header files, see see the
+\&\fBlinkers\fR section, of the \fI\s-1NLM\s0 Development and Tools
+Overview\fR, which is part of the \s-1NLM\s0 Software Developer's Kit, available
+from Novell, Inc.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-debug\fR" 4
+.IX Item "--debug"
+.PD
+Displays (on standard error) the linker command line used by \fBnlmconv\fR.
+.IP "\fB\-l\fR \fIlinker\fR" 4
+.IX Item "-l linker"
+.PD 0
+.IP "\fB\-\-linker=\fR\fIlinker\fR" 4
+.IX Item "--linker=linker"
+.PD
+Use \fIlinker\fR for any linking. \fIlinker\fR can be an absolute or a
+relative pathname.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBnlmconv\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1
new file mode 100644
index 0000000..edee811
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1
@@ -0,0 +1,523 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NM 1"
+.TH NM 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nm \- list symbols from object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nm [\fB\-a\fR|\fB\-\-debug\-syms\fR]
+ [\fB\-g\fR|\fB\-\-extern\-only\fR][\fB\-\-plugin\fR \fIname\fR]
+ [\fB\-B\fR] [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]] [\fB\-D\fR|\fB\-\-dynamic\fR]
+ [\fB\-S\fR|\fB\-\-print\-size\fR] [\fB\-s\fR|\fB\-\-print\-armap\fR]
+ [\fB\-A\fR|\fB\-o\fR|\fB\-\-print\-file\-name\fR][\fB\-\-special\-syms\fR]
+ [\fB\-n\fR|\fB\-v\fR|\fB\-\-numeric\-sort\fR] [\fB\-p\fR|\fB\-\-no\-sort\fR]
+ [\fB\-r\fR|\fB\-\-reverse\-sort\fR] [\fB\-\-size\-sort\fR] [\fB\-u\fR|\fB\-\-undefined\-only\fR]
+ [\fB\-t\fR \fIradix\fR|\fB\-\-radix=\fR\fIradix\fR] [\fB\-P\fR|\fB\-\-portability\fR]
+ [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-f\fR\fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+ [\fB\-\-defined\-only\fR] [\fB\-l\fR|\fB\-\-line\-numbers\fR] [\fB\-\-no\-demangle\fR]
+ [\fB\-V\fR|\fB\-\-version\fR] [\fB\-X 32_64\fR] [\fB\-\-help\fR] [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBnm\fR lists the symbols from object files \fIobjfile\fR....
+If no object files are listed as arguments, \fBnm\fR assumes the file
+\&\fIa.out\fR.
+.PP
+For each symbol, \fBnm\fR shows:
+.IP "\(bu" 4
+The symbol value, in the radix selected by options (see below), or
+hexadecimal by default.
+.IP "\(bu" 4
+The symbol type. At least the following types are used; others are, as
+well, depending on the object file format. If lowercase, the symbol is
+local; if uppercase, the symbol is global (external).
+.RS 4
+.ie n .IP """A""" 4
+.el .IP "\f(CWA\fR" 4
+.IX Item "A"
+The symbol's value is absolute, and will not be changed by further
+linking.
+.ie n .IP """B""" 4
+.el .IP "\f(CWB\fR" 4
+.IX Item "B"
+.PD 0
+.ie n .IP """b""" 4
+.el .IP "\f(CWb\fR" 4
+.IX Item "b"
+.PD
+The symbol is in the uninitialized data section (known as \s-1BSS\s0).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol is common. Common symbols are uninitialized data. When
+linking, multiple common symbols may appear with the same name. If the
+symbol is defined anywhere, the common symbols are treated as undefined
+references.
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD 0
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD
+The symbol is in the initialized data section.
+.ie n .IP """G""" 4
+.el .IP "\f(CWG\fR" 4
+.IX Item "G"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.PD
+The symbol is in an initialized data section for small objects. Some
+object file formats permit more efficient access to small data objects,
+such as a global int variable as opposed to a large global array.
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+For \s-1PE\s0 format files this indicates that the symbol is in a section
+specific to the implementation of DLLs. For \s-1ELF\s0 format files this
+indicates that the symbol is an indirect function. This is a \s-1GNU\s0
+extension to the standard set of \s-1ELF\s0 symbol types. It indicates a
+symbol which if referenced by a relocation does not evaluate to its
+address, but instead must be invoked at runtime. The runtime
+execution will then return the value to be used in the relocation.
+.ie n .IP """N""" 4
+.el .IP "\f(CWN\fR" 4
+.IX Item "N"
+The symbol is a debugging symbol.
+.ie n .IP """p""" 4
+.el .IP "\f(CWp\fR" 4
+.IX Item "p"
+The symbols is in a stack unwind section.
+.ie n .IP """R""" 4
+.el .IP "\f(CWR\fR" 4
+.IX Item "R"
+.PD 0
+.ie n .IP """r""" 4
+.el .IP "\f(CWr\fR" 4
+.IX Item "r"
+.PD
+The symbol is in a read only data section.
+.ie n .IP """S""" 4
+.el .IP "\f(CWS\fR" 4
+.IX Item "S"
+.PD 0
+.ie n .IP """s""" 4
+.el .IP "\f(CWs\fR" 4
+.IX Item "s"
+.PD
+The symbol is in an uninitialized data section for small objects.
+.ie n .IP """T""" 4
+.el .IP "\f(CWT\fR" 4
+.IX Item "T"
+.PD 0
+.ie n .IP """t""" 4
+.el .IP "\f(CWt\fR" 4
+.IX Item "t"
+.PD
+The symbol is in the text (code) section.
+.ie n .IP """U""" 4
+.el .IP "\f(CWU\fR" 4
+.IX Item "U"
+The symbol is undefined.
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+The symbol is a unique global symbol. This is a \s-1GNU\s0 extension to the
+standard set of \s-1ELF\s0 symbol bindings. For such a symbol the dynamic linker
+will make sure that in the entire process there is just one symbol with
+this name and type in use.
+.ie n .IP """V""" 4
+.el .IP "\f(CWV\fR" 4
+.IX Item "V"
+.PD 0
+.ie n .IP """v""" 4
+.el .IP "\f(CWv\fR" 4
+.IX Item "v"
+.PD
+The symbol is a weak object. When a weak defined symbol is linked with
+a normal defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the weak symbol becomes zero with no error. On some
+systems, uppercase indicates that a default value has been specified.
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+.PD 0
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+.PD
+The symbol is a weak symbol that has not been specifically tagged as a
+weak object symbol. When a weak defined symbol is linked with a normal
+defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the symbol is determined in a system-specific manner without
+error. On some systems, uppercase indicates that a default value has been
+specified.
+.ie n .IP """\-""" 4
+.el .IP "\f(CW\-\fR" 4
+.IX Item "-"
+The symbol is a stabs symbol in an a.out object file. In this case, the
+next values printed are the stabs other field, the stabs desc field, and
+the stab type. Stabs symbols are used to hold debugging information.
+.ie n .IP """?""" 4
+.el .IP "\f(CW?\fR" 4
+.IX Item "?"
+The symbol type is unknown, or object file format specific.
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+The symbol name.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Precede each symbol by the name of the input file (or archive member)
+in which it was found, rather than identifying the input file once only,
+before all of its symbols.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-debug\-syms\fR" 4
+.IX Item "--debug-syms"
+.PD
+Display all symbols, even debugger-only symbols; normally these are not
+listed.
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+The same as \fB\-\-format=bsd\fR (for compatibility with the \s-1MIPS\s0 \fBnm\fR).
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+Do not demangle low-level symbol names. This is the default.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Display the dynamic symbols rather than the normal symbols. This is
+only meaningful for dynamic objects, such as certain types of shared
+libraries.
+.IP "\fB\-f\fR \fIformat\fR" 4
+.IX Item "-f format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+Use the output format \fIformat\fR, which can be \f(CW\*(C`bsd\*(C'\fR,
+\&\f(CW\*(C`sysv\*(C'\fR, or \f(CW\*(C`posix\*(C'\fR. The default is \f(CW\*(C`bsd\*(C'\fR.
+Only the first character of \fIformat\fR is significant; it can be
+either upper or lower case.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-extern\-only\fR" 4
+.IX Item "--extern-only"
+.PD
+Display only external symbols.
+.IP "\fB\-\-plugin\fR \fIname\fR" 4
+.IX Item "--plugin name"
+Load the plugin called \fIname\fR to add support for extra target
+types. This option is only available if the toolchain has been built
+with plugin support enabled.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+For each symbol, use debugging information to try to find a filename and
+line number. For a defined symbol, look for the line number of the
+address of the symbol. For an undefined symbol, look for the line
+number of a relocation entry which refers to the symbol. If line number
+information can be found, print it after the other symbol information.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.IP "\fB\-\-numeric\-sort\fR" 4
+.IX Item "--numeric-sort"
+.PD
+Sort symbols numerically by their addresses, rather than alphabetically
+by their names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-sort\fR" 4
+.IX Item "--no-sort"
+.PD
+Do not bother to sort the symbols in any order; print them in the order
+encountered.
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+.PD 0
+.IP "\fB\-\-portability\fR" 4
+.IX Item "--portability"
+.PD
+Use the \s-1POSIX\s0.2 standard output format instead of the default format.
+Equivalent to \fB\-f posix\fR.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-print\-size\fR" 4
+.IX Item "--print-size"
+.PD
+Print both value and size of defined symbols for the \f(CW\*(C`bsd\*(C'\fR output style.
+This option has no effect for object formats that do not record symbol
+sizes, unless \fB\-\-size\-sort\fR is also used in which case a
+calculated size is displayed.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-print\-armap\fR" 4
+.IX Item "--print-armap"
+.PD
+When listing symbols from archive members, include the index: a mapping
+(stored in the archive by \fBar\fR or \fBranlib\fR) of which modules
+contain definitions for which names.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reverse\-sort\fR" 4
+.IX Item "--reverse-sort"
+.PD
+Reverse the order of the sort (whether numeric or alphabetic); let the
+last come first.
+.IP "\fB\-\-size\-sort\fR" 4
+.IX Item "--size-sort"
+Sort symbols by size. The size is computed as the difference between
+the value of the symbol and the value of the symbol with the next higher
+value. If the \f(CW\*(C`bsd\*(C'\fR output format is used the size of the symbol
+is printed, rather than the value, and \fB\-S\fR must be used in order
+both size and value to be printed.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+Display symbols which have a target-specific special meaning. These
+symbols are usually used by the target for some special processing and
+are not normally helpful when included included in the normal symbol
+lists. For example for \s-1ARM\s0 targets this option would skip the mapping
+symbols used to mark transitions between \s-1ARM\s0 code, \s-1THUMB\s0 code and
+data.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Use \fIradix\fR as the radix for printing the symbol values. It must be
+\&\fBd\fR for decimal, \fBo\fR for octal, or \fBx\fR for hexadecimal.
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify an object code format other than your system's default format.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-undefined\-only\fR" 4
+.IX Item "--undefined-only"
+.PD
+Display only undefined symbols (those external to each object file).
+.IP "\fB\-\-defined\-only\fR" 4
+.IX Item "--defined-only"
+Display only defined symbols for each object file.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBnm\fR and exit.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+This option is ignored for compatibility with the \s-1AIX\s0 version of
+\&\fBnm\fR. It takes one parameter which must be the string
+\&\fB32_64\fR. The default mode of \s-1AIX\s0 \fBnm\fR corresponds
+to \fB\-X 32\fR, which is not supported by \s-1GNU\s0 \fBnm\fR.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBnm\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1
new file mode 100644
index 0000000..cc041c0
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1
@@ -0,0 +1,935 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJCOPY 1"
+.TH OBJCOPY 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+objcopy \- copy and translate object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objcopy [\fB\-F\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-B\fR \fIbfdarch\fR|\fB\-\-binary\-architecture=\fR\fIbfdarch\fR]
+ [\fB\-S\fR|\fB\-\-strip\-all\fR]
+ [\fB\-g\fR|\fB\-\-strip\-debug\fR]
+ [\fB\-K\fR \fIsymbolname\fR|\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-N\fR \fIsymbolname\fR|\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-G\fR \fIsymbolname\fR|\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-localize\-hidden\fR]
+ [\fB\-L\fR \fIsymbolname\fR|\fB\-\-localize\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-W\fR \fIsymbolname\fR|\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-w\fR|\fB\-\-wildcard\fR]
+ [\fB\-x\fR|\fB\-\-discard\-all\fR]
+ [\fB\-X\fR|\fB\-\-discard\-locals\fR]
+ [\fB\-b\fR \fIbyte\fR|\fB\-\-byte=\fR\fIbyte\fR]
+ [\fB\-i\fR \fIinterleave\fR|\fB\-\-interleave=\fR\fIinterleave\fR]
+ [\fB\-j\fR \fIsectionname\fR|\fB\-\-only\-section=\fR\fIsectionname\fR]
+ [\fB\-R\fR \fIsectionname\fR|\fB\-\-remove\-section=\fR\fIsectionname\fR]
+ [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+ [\fB\-\-debugging\fR]
+ [\fB\-\-gap\-fill=\fR\fIval\fR]
+ [\fB\-\-pad\-to=\fR\fIaddress\fR]
+ [\fB\-\-set\-start=\fR\fIval\fR]
+ [\fB\-\-adjust\-start=\fR\fIincr\fR]
+ [\fB\-\-change\-addresses=\fR\fIincr\fR]
+ [\fB\-\-change\-section\-address\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-section\-lma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-section\-vma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-warnings\fR] [\fB\-\-no\-change\-warnings\fR]
+ [\fB\-\-set\-section\-flags\fR \fIsection\fR=\fIflags\fR]
+ [\fB\-\-add\-section\fR \fIsectionname\fR=\fIfilename\fR]
+ [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR[,\fIflags\fR]]
+ [\fB\-\-long\-section\-names\fR {enable,disable,keep}]
+ [\fB\-\-change\-leading\-char\fR] [\fB\-\-remove\-leading\-char\fR]
+ [\fB\-\-reverse\-bytes=\fR\fInum\fR]
+ [\fB\-\-srec\-len=\fR\fIival\fR] [\fB\-\-srec\-forceS3\fR]
+ [\fB\-\-redefine\-sym\fR \fIold\fR=\fInew\fR]
+ [\fB\-\-redefine\-syms=\fR\fIfilename\fR]
+ [\fB\-\-weaken\fR]
+ [\fB\-\-keep\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-strip\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-localize\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-globalize\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-weaken\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-alt\-machine\-code=\fR\fIindex\fR]
+ [\fB\-\-prefix\-symbols=\fR\fIstring\fR]
+ [\fB\-\-prefix\-sections=\fR\fIstring\fR]
+ [\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR]
+ [\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR]
+ [\fB\-\-keep\-file\-symbols\fR]
+ [\fB\-\-only\-keep\-debug\fR]
+ [\fB\-\-extract\-symbol\fR]
+ [\fB\-\-writable\-text\fR]
+ [\fB\-\-readonly\-text\fR]
+ [\fB\-\-pure\fR]
+ [\fB\-\-impure\fR]
+ [\fB\-\-file\-alignment=\fR\fInum\fR]
+ [\fB\-\-heap=\fR\fIsize\fR]
+ [\fB\-\-image\-base=\fR\fIaddress\fR]
+ [\fB\-\-section\-alignment=\fR\fInum\fR]
+ [\fB\-\-stack=\fR\fIsize\fR]
+ [\fB\-\-subsystem=\fR\fIwhich\fR:\fImajor\fR.\fIminor\fR]
+ [\fB\-v\fR|\fB\-\-verbose\fR]
+ [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-\-help\fR] [\fB\-\-info\fR]
+ \fIinfile\fR [\fIoutfile\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBobjcopy\fR utility copies the contents of an object
+file to another. \fBobjcopy\fR uses the \s-1GNU\s0 \s-1BFD\s0 Library to
+read and write the object files. It can write the destination object
+file in a format different from that of the source object file. The
+exact behavior of \fBobjcopy\fR is controlled by command-line options.
+Note that \fBobjcopy\fR should be able to copy a fully linked file
+between any two formats. However, copying a relocatable object file
+between any two formats may not work as expected.
+.PP
+\&\fBobjcopy\fR creates temporary files to do its translations and
+deletes them afterward. \fBobjcopy\fR uses \s-1BFD\s0 to do all its
+translation work; it has access to all the formats described in \s-1BFD\s0
+and thus is able to recognize most formats without being told
+explicitly.
+.PP
+\&\fBobjcopy\fR can be used to generate S\-records by using an output
+target of \fBsrec\fR (e.g., use \fB\-O srec\fR).
+.PP
+\&\fBobjcopy\fR can be used to generate a raw binary file by using an
+output target of \fBbinary\fR (e.g., use \fB\-O binary\fR). When
+\&\fBobjcopy\fR generates a raw binary file, it will essentially produce
+a memory dump of the contents of the input object file. All symbols and
+relocation information will be discarded. The memory dump will start at
+the load address of the lowest section copied into the output file.
+.PP
+When generating an S\-record or a raw binary file, it may be helpful to
+use \fB\-S\fR to remove sections containing debugging information. In
+some cases \fB\-R\fR will be useful to remove sections which contain
+information that is not needed by the binary file.
+.PP
+Note\-\-\-\fBobjcopy\fR is not able to change the endianness of its input
+files. If the input format has an endianness (some formats do not),
+\&\fBobjcopy\fR can only copy the inputs into file formats that have the
+same endianness or which have no endianness (e.g., \fBsrec\fR).
+(However, see the \fB\-\-reverse\-bytes\fR option.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fIinfile\fR" 4
+.IX Item "infile"
+.PD 0
+.IP "\fIoutfile\fR" 4
+.IX Item "outfile"
+.PD
+The input and output files, respectively.
+If you do not specify \fIoutfile\fR, \fBobjcopy\fR creates a
+temporary file and destructively renames the result with
+the name of \fIinfile\fR.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Consider the source file's object format to be \fIbfdname\fR, rather than
+attempting to deduce it.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Write the output file using the object format \fIbfdname\fR.
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Use \fIbfdname\fR as the object format for both the input and the output
+file; i.e., simply transfer data from source to destination with no
+translation.
+.IP "\fB\-B\fR \fIbfdarch\fR" 4
+.IX Item "-B bfdarch"
+.PD 0
+.IP "\fB\-\-binary\-architecture=\fR\fIbfdarch\fR" 4
+.IX Item "--binary-architecture=bfdarch"
+.PD
+Useful when transforming a raw binary input file into an object file.
+In this case the output architecture can be set to \fIbfdarch\fR. This
+option will be ignored if the input file has a known \fIbfdarch\fR. You
+can access this binary data inside a program by referencing the special
+symbols that are created by the conversion process. These symbols are
+called _binary_\fIobjfile\fR_start, _binary_\fIobjfile\fR_end and
+_binary_\fIobjfile\fR_size. e.g. you can transform a picture file into
+an object file and then access it in your code using these symbols.
+.IP "\fB\-j\fR \fIsectionname\fR" 4
+.IX Item "-j sectionname"
+.PD 0
+.IP "\fB\-\-only\-section=\fR\fIsectionname\fR" 4
+.IX Item "--only-section=sectionname"
+.PD
+Copy only the named section from the input file to the output file.
+This option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file. This
+option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Do not copy relocation and symbol information from the source file.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Do not copy debugging symbols or sections from the source file.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Strip all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped. This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Do not copy symbol \fIsymbolname\fR from the source file. This option
+may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-unneeded-symbol=symbolname"
+Do not copy symbol \fIsymbolname\fR from the source file unless it is needed
+by a relocation. This option may be given more than once.
+.IP "\fB\-G\fR \fIsymbolname\fR" 4
+.IX Item "-G symbolname"
+.PD 0
+.IP "\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-global-symbol=symbolname"
+.PD
+Keep only symbol \fIsymbolname\fR global. Make all other symbols local
+to the file, so that they are not visible externally. This option may
+be given more than once.
+.IP "\fB\-\-localize\-hidden\fR" 4
+.IX Item "--localize-hidden"
+In an \s-1ELF\s0 object, mark all symbols that have hidden or internal visibility
+as local. This option applies on top of symbol-specific localization options
+such as \fB\-L\fR.
+.IP "\fB\-L\fR \fIsymbolname\fR" 4
+.IX Item "-L symbolname"
+.PD 0
+.IP "\fB\-\-localize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--localize-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR local to the file, so that it is not
+visible externally. This option may be given more than once.
+.IP "\fB\-W\fR \fIsymbolname\fR" 4
+.IX Item "-W symbolname"
+.PD 0
+.IP "\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--weaken-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR weak. This option may be given more than once.
+.IP "\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--globalize-symbol=symbolname"
+Give symbol \fIsymbolname\fR global scoping so that it is visible
+outside of the file in which it is defined. This option may be given
+more than once.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options. The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name. If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\& \-w \-W !foo \-W fo*
+.Ve
+.Sp
+would cause objcopy to weaken all symbols that start with \*(L"fo\*(R"
+except for the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Do not copy non-global symbols from the source file.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Do not copy compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-b\fR \fIbyte\fR" 4
+.IX Item "-b byte"
+.PD 0
+.IP "\fB\-\-byte=\fR\fIbyte\fR" 4
+.IX Item "--byte=byte"
+.PD
+Keep only every \fIbyte\fRth byte of the input file (header data is not
+affected). \fIbyte\fR can be in the range from 0 to \fIinterleave\fR\-1,
+where \fIinterleave\fR is given by the \fB\-i\fR or \fB\-\-interleave\fR
+option, or the default of 4. This option is useful for creating files
+to program \s-1ROM\s0. It is typically used with an \f(CW\*(C`srec\*(C'\fR output
+target.
+.IP "\fB\-i\fR \fIinterleave\fR" 4
+.IX Item "-i interleave"
+.PD 0
+.IP "\fB\-\-interleave=\fR\fIinterleave\fR" 4
+.IX Item "--interleave=interleave"
+.PD
+Only copy one out of every \fIinterleave\fR bytes. Select which byte to
+copy with the \fB\-b\fR or \fB\-\-byte\fR option. The default is 4.
+\&\fBobjcopy\fR ignores this option if you do not specify either \fB\-b\fR or
+\&\fB\-\-byte\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Set the access and modification dates of the output file to be the same
+as those of the input file.
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+Convert debugging information, if possible. This is not the default
+because only certain debugging formats are supported, and the
+conversion process can be time consuming.
+.IP "\fB\-\-gap\-fill\fR \fIval\fR" 4
+.IX Item "--gap-fill val"
+Fill gaps between sections with \fIval\fR. This operation applies to
+the \fIload address\fR (\s-1LMA\s0) of the sections. It is done by increasing
+the size of the section with the lower address, and filling in the extra
+space created with \fIval\fR.
+.IP "\fB\-\-pad\-to\fR \fIaddress\fR" 4
+.IX Item "--pad-to address"
+Pad the output file up to the load address \fIaddress\fR. This is
+done by increasing the size of the last section. The extra space is
+filled in with the value specified by \fB\-\-gap\-fill\fR (default zero).
+.IP "\fB\-\-set\-start\fR \fIval\fR" 4
+.IX Item "--set-start val"
+Set the start address of the new file to \fIval\fR. Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-start\fR \fIincr\fR" 4
+.IX Item "--change-start incr"
+.PD 0
+.IP "\fB\-\-adjust\-start\fR \fIincr\fR" 4
+.IX Item "--adjust-start incr"
+.PD
+Change the start address by adding \fIincr\fR. Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-addresses\fR \fIincr\fR" 4
+.IX Item "--change-addresses incr"
+.PD 0
+.IP "\fB\-\-adjust\-vma\fR \fIincr\fR" 4
+.IX Item "--adjust-vma incr"
+.PD
+Change the \s-1VMA\s0 and \s-1LMA\s0 addresses of all sections, as well as the start
+address, by adding \fIincr\fR. Some object file formats do not permit
+section addresses to be changed arbitrarily. Note that this does not
+relocate the sections; if the program expects sections to be loaded at a
+certain address, and this option is used to change the sections such
+that they are loaded at a different address, the program may fail.
+.IP "\fB\-\-change\-section\-address\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-address section{=,+,-}val"
+.PD 0
+.IP "\fB\-\-adjust\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--adjust-section-vma section{=,+,-}val"
+.PD
+Set or change both the \s-1VMA\s0 address and the \s-1LMA\s0 address of the named
+\&\fIsection\fR. If \fB=\fR is used, the section address is set to
+\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the
+section address. See the comments under \fB\-\-change\-addresses\fR,
+above. If \fIsection\fR does not exist in the input file, a warning will
+be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-lma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-lma section{=,+,-}val"
+Set or change the \s-1LMA\s0 address of the named \fIsection\fR. The \s-1LMA\s0
+address is the address where the section will be loaded into memory at
+program load time. Normally this is the same as the \s-1VMA\s0 address, which
+is the address of the section at program run time, but on some systems,
+especially those where a program is held in \s-1ROM\s0, the two can be
+different. If \fB=\fR is used, the section address is set to
+\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the
+section address. See the comments under \fB\-\-change\-addresses\fR,
+above. If \fIsection\fR does not exist in the input file, a warning
+will be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-vma section{=,+,-}val"
+Set or change the \s-1VMA\s0 address of the named \fIsection\fR. The \s-1VMA\s0
+address is the address where the section will be located once the
+program has started executing. Normally this is the same as the \s-1LMA\s0
+address, which is the address where the section will be loaded into
+memory, but on some systems, especially those where a program is held in
+\&\s-1ROM\s0, the two can be different. If \fB=\fR is used, the section address
+is set to \fIval\fR. Otherwise, \fIval\fR is added to or subtracted
+from the section address. See the comments under
+\&\fB\-\-change\-addresses\fR, above. If \fIsection\fR does not exist in
+the input file, a warning will be issued, unless
+\&\fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-warnings\fR" 4
+.IX Item "--change-warnings"
+.PD 0
+.IP "\fB\-\-adjust\-warnings\fR" 4
+.IX Item "--adjust-warnings"
+.PD
+If \fB\-\-change\-section\-address\fR or \fB\-\-change\-section\-lma\fR or
+\&\fB\-\-change\-section\-vma\fR is used, and the named section does not
+exist, issue a warning. This is the default.
+.IP "\fB\-\-no\-change\-warnings\fR" 4
+.IX Item "--no-change-warnings"
+.PD 0
+.IP "\fB\-\-no\-adjust\-warnings\fR" 4
+.IX Item "--no-adjust-warnings"
+.PD
+Do not issue a warning if \fB\-\-change\-section\-address\fR or
+\&\fB\-\-adjust\-section\-lma\fR or \fB\-\-adjust\-section\-vma\fR is used, even
+if the named section does not exist.
+.IP "\fB\-\-set\-section\-flags\fR \fIsection\fR\fB=\fR\fIflags\fR" 4
+.IX Item "--set-section-flags section=flags"
+Set the flags for the named section. The \fIflags\fR argument is a
+comma separated string of flag names. The recognized names are
+\&\fBalloc\fR, \fBcontents\fR, \fBload\fR, \fBnoload\fR,
+\&\fBreadonly\fR, \fBcode\fR, \fBdata\fR, \fBrom\fR, \fBshare\fR, and
+\&\fBdebug\fR. You can set the \fBcontents\fR flag for a section which
+does not have contents, but it is not meaningful to clear the
+\&\fBcontents\fR flag of a section which does have contents\*(--just remove
+the section instead. Not all flags are meaningful for all object file
+formats.
+.IP "\fB\-\-add\-section\fR \fIsectionname\fR\fB=\fR\fIfilename\fR" 4
+.IX Item "--add-section sectionname=filename"
+Add a new section named \fIsectionname\fR while copying the file. The
+contents of the new section are taken from the file \fIfilename\fR. The
+size of the section will be the size of the file. This option only
+works on file formats which can support sections with arbitrary names.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR\fB[,\fR\fIflags\fR\fB]\fR" 4
+.IX Item "--rename-section oldname=newname[,flags]"
+Rename a section from \fIoldname\fR to \fInewname\fR, optionally
+changing the section's flags to \fIflags\fR in the process. This has
+the advantage over usng a linker script to perform the rename in that
+the output stays as an object file and does not become a linked
+executable.
+.Sp
+This option is particularly helpful when the input format is binary,
+since this will always create a section called .data. If for example,
+you wanted instead to create a section called .rodata containing binary
+data you could use the following command line to achieve it:
+.Sp
+.Vb 3
+\& objcopy \-I binary \-O <output_format> \-B <architecture> \e
+\& \-\-rename\-section .data=.rodata,alloc,load,readonly,data,contents \e
+\& <input_binary_file> <output_object_file>
+.Ve
+.IP "\fB\-\-long\-section\-names {enable,disable,keep}\fR" 4
+.IX Item "--long-section-names {enable,disable,keep}"
+Controls the handling of long section names when processing \f(CW\*(C`COFF\*(C'\fR
+and \f(CW\*(C`PE\-COFF\*(C'\fR object formats. The default behaviour, \fBkeep\fR,
+is to preserve long section names if any are present in the input file.
+The \fBenable\fR and \fBdisable\fR options forcibly enable or disable
+the use of long section names in the output object; when \fBdisable\fR
+is in effect, any long section names in the input object will be truncated.
+The \fBenable\fR option will only emit long section names if any are
+present in the inputs; this is mostly the same as \fBkeep\fR, but it
+is left undefined whether the \fBenable\fR option might force the
+creation of an empty string table in the output file.
+.IP "\fB\-\-change\-leading\-char\fR" 4
+.IX Item "--change-leading-char"
+Some object file formats use special characters at the start of
+symbols. The most common such character is underscore, which compilers
+often add before every symbol. This option tells \fBobjcopy\fR to
+change the leading character of every symbol when it converts between
+object file formats. If the object file formats use the same leading
+character, this option has no effect. Otherwise, it will add a
+character, or remove a character, or change a character, as
+appropriate.
+.IP "\fB\-\-remove\-leading\-char\fR" 4
+.IX Item "--remove-leading-char"
+If the first character of a global symbol is a special symbol leading
+character used by the object file format, remove the character. The
+most common symbol leading character is underscore. This option will
+remove a leading underscore from all global symbols. This can be useful
+if you want to link together objects of different file formats with
+different conventions for symbol names. This is different from
+\&\fB\-\-change\-leading\-char\fR because it always changes the symbol name
+when appropriate, regardless of the object file format of the output
+file.
+.IP "\fB\-\-reverse\-bytes=\fR\fInum\fR" 4
+.IX Item "--reverse-bytes=num"
+Reverse the bytes in a section with output contents. A section length must
+be evenly divisible by the value given in order for the swap to be able to
+take place. Reversing takes place before the interleaving is performed.
+.Sp
+This option is used typically in generating \s-1ROM\s0 images for problematic
+target systems. For example, on some target boards, the 32\-bit words
+fetched from 8\-bit ROMs are re-assembled in little-endian byte order
+regardless of the \s-1CPU\s0 byte order. Depending on the programming model, the
+endianness of the \s-1ROM\s0 may need to be modified.
+.Sp
+Consider a simple file with a section containing the following eight
+bytes: \f(CW12345678\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=2\fR for the above example, the bytes in the
+output file would be ordered \f(CW21436587\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=4\fR for the above example, the bytes in the
+output file would be ordered \f(CW43218765\fR.
+.Sp
+By using \fB\-\-reverse\-bytes=2\fR for the above example, followed by
+\&\fB\-\-reverse\-bytes=4\fR on the output file, the bytes in the second
+output file would be ordered \f(CW34127856\fR.
+.IP "\fB\-\-srec\-len=\fR\fIival\fR" 4
+.IX Item "--srec-len=ival"
+Meaningful only for srec output. Set the maximum length of the Srecords
+being produced to \fIival\fR. This length covers both address, data and
+crc fields.
+.IP "\fB\-\-srec\-forceS3\fR" 4
+.IX Item "--srec-forceS3"
+Meaningful only for srec output. Avoid generation of S1/S2 records,
+creating S3\-only record format.
+.IP "\fB\-\-redefine\-sym\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--redefine-sym old=new"
+Change the name of a symbol \fIold\fR, to \fInew\fR. This can be useful
+when one is trying link two things together for which you have no
+source, and there are name collisions.
+.IP "\fB\-\-redefine\-syms=\fR\fIfilename\fR" 4
+.IX Item "--redefine-syms=filename"
+Apply \fB\-\-redefine\-sym\fR to each symbol pair "\fIold\fR \fInew\fR"
+listed in the file \fIfilename\fR. \fIfilename\fR is simply a flat file,
+with one symbol pair per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-weaken\fR" 4
+.IX Item "--weaken"
+Change all global symbols in the file to be weak. This can be useful
+when building an object which will be linked against other objects using
+the \fB\-R\fR option to the linker. This option is only effective when
+using an object file format which supports weak symbols.
+.IP "\fB\-\-keep\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-symbols=filename"
+Apply \fB\-\-keep\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-symbols=filename"
+Apply \fB\-\-strip\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-unneeded-symbols=filename"
+Apply \fB\-\-strip\-unneeded\-symbol\fR option to each symbol listed in
+the file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
+symbol name per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-global-symbols=filename"
+Apply \fB\-\-keep\-global\-symbol\fR option to each symbol listed in the
+file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
+symbol name per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-localize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--localize-symbols=filename"
+Apply \fB\-\-localize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-globalize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--globalize-symbols=filename"
+Apply \fB\-\-globalize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-weaken\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--weaken-symbols=filename"
+Apply \fB\-\-weaken\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-alt\-machine\-code=\fR\fIindex\fR" 4
+.IX Item "--alt-machine-code=index"
+If the output architecture has alternate machine codes, use the
+\&\fIindex\fRth code instead of the default one. This is useful in case
+a machine is assigned an official code and the tool-chain adopts the
+new code, but other applications still depend on the original code
+being used. For \s-1ELF\s0 based architectures if the \fIindex\fR
+alternative does not exist then the value is treated as an absolute
+number to be stored in the e_machine field of the \s-1ELF\s0 header.
+.IP "\fB\-\-writable\-text\fR" 4
+.IX Item "--writable-text"
+Mark the output text as writable. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-readonly\-text\fR" 4
+.IX Item "--readonly-text"
+Make the output text write protected. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-pure\fR" 4
+.IX Item "--pure"
+Mark the output file as demand paged. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-impure\fR" 4
+.IX Item "--impure"
+Mark the output file as impure. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-prefix\-symbols=\fR\fIstring\fR" 4
+.IX Item "--prefix-symbols=string"
+Prefix all symbols in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-sections=string"
+Prefix all section names in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-alloc-sections=string"
+Prefix all the names of all allocated sections in the output file with
+\&\fIstring\fR.
+.IP "\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR" 4
+.IX Item "--add-gnu-debuglink=path-to-file"
+Creates a .gnu_debuglink section which contains a reference to \fIpath-to-file\fR
+and adds it to the output file.
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required. The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal. Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal. Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional. You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to foo.full>"
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run objcopy --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable. It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files. It
+does not make sense to use it on object files where the debugging
+information may be incomplete. Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-\-file\-alignment\fR \fInum\fR" 4
+.IX Item "--file-alignment num"
+Specify the file alignment. Sections in the file will always begin at
+file offsets which are multiples of this number. This defaults to
+512.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll. This is
+the lowest memory location that will be used when your program or dll
+is loaded. To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls. The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-section\-alignment\fR \fInum\fR" 4
+.IX Item "--section-alignment num"
+Sets the section alignment. Sections in memory will always begin at
+addresses which are a multiple of this number. Defaults to 0x1000.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute. The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, \f(CW\*(C`efi\-app\*(C'\fR, \f(CW\*(C`efi\-bsd\*(C'\fR,
+\&\f(CW\*(C`efi\-rtd\*(C'\fR, \f(CW\*(C`sal\-rtd\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
+the subsystem version also. Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-extract\-symbol\fR" 4
+.IX Item "--extract-symbol"
+Keep the file's section flags and symbols but remove all section data.
+Specifically, the option:
+.RS 4
+.IP "*<removes the contents of all sections;>" 4
+.IX Item "*<removes the contents of all sections;>"
+.PD 0
+.IP "*<sets the size of every section to zero; and>" 4
+.IX Item "*<sets the size of every section to zero; and>"
+.IP "*<sets the file's start address to zero.>" 4
+.IX Item "*<sets the file's start address to zero.>"
+.RE
+.RS 4
+.PD
+.Sp
+This option is used to build a \fI.sym\fR file for a VxWorks kernel.
+It can also be a useful way of reducing the size of a \fB\-\-just\-symbols\fR
+linker input file.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBobjcopy\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified. In the case of
+archives, \fBobjcopy \-V\fR lists all members of the archive.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBobjcopy\fR.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIld\fR\|(1), \fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1
new file mode 100644
index 0000000..3c0298d
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1
@@ -0,0 +1,803 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJDUMP 1"
+.TH OBJDUMP 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+objdump \- display information from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objdump [\fB\-a\fR|\fB\-\-archive\-headers\fR]
+ [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR] ]
+ [\fB\-d\fR|\fB\-\-disassemble\fR]
+ [\fB\-D\fR|\fB\-\-disassemble\-all\fR]
+ [\fB\-z\fR|\fB\-\-disassemble\-zeroes\fR]
+ [\fB\-EB\fR|\fB\-EL\fR|\fB\-\-endian=\fR{big | little }]
+ [\fB\-f\fR|\fB\-\-file\-headers\fR]
+ [\fB\-F\fR|\fB\-\-file\-offsets\fR]
+ [\fB\-\-file\-start\-context\fR]
+ [\fB\-g\fR|\fB\-\-debugging\fR]
+ [\fB\-e\fR|\fB\-\-debugging\-tags\fR]
+ [\fB\-h\fR|\fB\-\-section\-headers\fR|\fB\-\-headers\fR]
+ [\fB\-i\fR|\fB\-\-info\fR]
+ [\fB\-j\fR \fIsection\fR|\fB\-\-section=\fR\fIsection\fR]
+ [\fB\-l\fR|\fB\-\-line\-numbers\fR]
+ [\fB\-S\fR|\fB\-\-source\fR]
+ [\fB\-m\fR \fImachine\fR|\fB\-\-architecture=\fR\fImachine\fR]
+ [\fB\-M\fR \fIoptions\fR|\fB\-\-disassembler\-options=\fR\fIoptions\fR]
+ [\fB\-p\fR|\fB\-\-private\-headers\fR]
+ [\fB\-r\fR|\fB\-\-reloc\fR]
+ [\fB\-R\fR|\fB\-\-dynamic\-reloc\fR]
+ [\fB\-s\fR|\fB\-\-full\-contents\fR]
+ [\fB\-W[lLiaprmfFsoR]\fR|
+ \fB\-\-dwarf\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+ [\fB\-G\fR|\fB\-\-stabs\fR]
+ [\fB\-t\fR|\fB\-\-syms\fR]
+ [\fB\-T\fR|\fB\-\-dynamic\-syms\fR]
+ [\fB\-x\fR|\fB\-\-all\-headers\fR]
+ [\fB\-w\fR|\fB\-\-wide\fR]
+ [\fB\-\-start\-address=\fR\fIaddress\fR]
+ [\fB\-\-stop\-address=\fR\fIaddress\fR]
+ [\fB\-\-prefix\-addresses\fR]
+ [\fB\-\-[no\-]show\-raw\-insn\fR]
+ [\fB\-\-adjust\-vma=\fR\fIoffset\fR]
+ [\fB\-\-special\-syms\fR]
+ [\fB\-\-prefix=\fR\fIprefix\fR]
+ [\fB\-\-prefix\-strip=\fR\fIlevel\fR]
+ [\fB\-\-insn\-width=\fR\fIwidth\fR]
+ [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-H\fR|\fB\-\-help\fR]
+ \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBobjdump\fR displays information about one or more object files.
+The options control what particular information to display. This
+information is mostly useful to programmers who are working on the
+compilation tools, as opposed to programmers who just want their
+program to compile and work.
+.PP
+\&\fIobjfile\fR... are the object files to be examined. When you
+specify archives, \fBobjdump\fR shows information on each of the member
+object files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent. At least one option from the list
+\&\fB\-a,\-d,\-D,\-e,\-f,\-g,\-G,\-h,\-H,\-p,\-r,\-R,\-s,\-S,\-t,\-T,\-V,\-x\fR must be given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-archive\-header\fR" 4
+.IX Item "--archive-header"
+.PD
+If any of the \fIobjfile\fR files are archives, display the archive
+header information (in a format similar to \fBls \-l\fR). Besides the
+information you could list with \fBar tv\fR, \fBobjdump \-a\fR shows
+the object file format of each archive member.
+.IP "\fB\-\-adjust\-vma=\fR\fIoffset\fR" 4
+.IX Item "--adjust-vma=offset"
+When dumping information, first add \fIoffset\fR to all the section
+addresses. This is useful if the section addresses do not correspond to
+the symbol table, which can happen when putting sections at particular
+addresses when using a format which can not represent section addresses,
+such as a.out.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR. This option may not be necessary; \fIobjdump\fR can
+automatically recognize many formats.
+.Sp
+For example,
+.Sp
+.Vb 1
+\& objdump \-b oasys \-m vax \-h fu.o
+.Ve
+.Sp
+displays summary information from the section headers (\fB\-h\fR) of
+\&\fIfu.o\fR, which is explicitly identified (\fB\-m\fR) as a \s-1VAX\s0 object
+file in the format produced by Oasys compilers. You can list the
+formats available with the \fB\-i\fR option.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+.PD
+Display debugging information. This attempts to parse \s-1STABS\s0 and \s-1IEEE\s0
+debugging format information stored in the file and print it out using
+a C like syntax. If neither of these formats are found this option
+falls back on the \fB\-W\fR option to print any \s-1DWARF\s0 information in
+the file.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-debugging\-tags\fR" 4
+.IX Item "--debugging-tags"
+.PD
+Like \fB\-g\fR, but the information is generated in a format compatible
+with ctags tool.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-disassemble\fR" 4
+.IX Item "--disassemble"
+.PD
+Display the assembler mnemonics for the machine instructions from
+\&\fIobjfile\fR. This option only disassembles those sections which are
+expected to contain instructions.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-disassemble\-all\fR" 4
+.IX Item "--disassemble-all"
+.PD
+Like \fB\-d\fR, but disassemble the contents of all sections, not just
+those expected to contain instructions.
+.Sp
+If the target is an \s-1ARM\s0 architecture this switch also has the effect
+of forcing the disassembler to decode pieces of data found in code
+sections as if they were instructions.
+.IP "\fB\-\-prefix\-addresses\fR" 4
+.IX Item "--prefix-addresses"
+When disassembling, print the complete address on each line. This is
+the older disassembly format.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+.PD 0
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+.IP "\fB\-\-endian={big|little}\fR" 4
+.IX Item "--endian={big|little}"
+.PD
+Specify the endianness of the object files. This only affects
+disassembly. This can be useful when disassembling a file format which
+does not describe endianness information, such as S\-records.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-file\-headers\fR" 4
+.IX Item "--file-headers"
+.PD
+Display summary information from the overall header of
+each of the \fIobjfile\fR files.
+.IP "\fB\-F\fR" 4
+.IX Item "-F"
+.PD 0
+.IP "\fB\-\-file\-offsets\fR" 4
+.IX Item "--file-offsets"
+.PD
+When disassembling sections, whenever a symbol is displayed, also
+display the file offset of the region of data that is about to be
+dumped. If zeroes are being skipped, then when disassembly resumes,
+tell the user how many zeroes were skipped and the file offset of the
+location from where the disassembly resumes. When dumping sections,
+display the file offset of the location from where the dump starts.
+.IP "\fB\-\-file\-start\-context\fR" 4
+.IX Item "--file-start-context"
+Specify that when displaying interlisted source code/disassembly
+(assumes \fB\-S\fR) from a file that has not yet been displayed, extend the
+context to the start of the file.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display summary information from the section headers of the
+object file.
+.Sp
+File segments may be relocated to nonstandard addresses, for example by
+using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to
+\&\fBld\fR. However, some object file formats, such as a.out, do not
+store the starting address of the file segments. In those situations,
+although \fBld\fR relocates the sections correctly, using \fBobjdump
+\&\-h\fR to list the file section headers cannot show the correct addresses.
+Instead, it shows the usual addresses, which are implicit for the
+target.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Print a summary of the options to \fBobjdump\fR and exit.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+.PD
+Display a list showing all architectures and object formats available
+for specification with \fB\-b\fR or \fB\-m\fR.
+.IP "\fB\-j\fR \fIname\fR" 4
+.IX Item "-j name"
+.PD 0
+.IP "\fB\-\-section=\fR\fIname\fR" 4
+.IX Item "--section=name"
+.PD
+Display information only for section \fIname\fR.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+Label the display (using debugging information) with the filename and
+source line numbers corresponding to the object code or relocs shown.
+Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fImachine\fR" 4
+.IX Item "--architecture=machine"
+.PD
+Specify the architecture to use when disassembling object files. This
+can be useful when disassembling object files which do not describe
+architecture information, such as S\-records. You can list the available
+architectures with the \fB\-i\fR option.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch has an
+additional effect. It restricts the disassembly to only those
+instructions supported by the architecture specified by \fImachine\fR.
+If it is necessary to use this switch because the input file does not
+contain any architecture information, but it is also desired to
+disassemble all the instructions use \fB\-marm\fR.
+.IP "\fB\-M\fR \fIoptions\fR" 4
+.IX Item "-M options"
+.PD 0
+.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4
+.IX Item "--disassembler-options=options"
+.PD
+Pass target specific information to the disassembler. Only supported on
+some targets. If it is necessary to specify more than one
+disassembler option then multiple \fB\-M\fR options can be used or
+can be placed together into a comma separated list.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch can be used to
+select which register name set is used during disassembler. Specifying
+\&\fB\-M reg-names-std\fR (the default) will select the register names as
+used in \s-1ARM\s0's instruction set documentation, but with register 13 called
+\&'sp', register 14 called 'lr' and register 15 called 'pc'. Specifying
+\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0
+Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will
+just use \fBr\fR followed by the register number.
+.Sp
+There are also two variants on the \s-1APCS\s0 register naming scheme enabled
+by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which
+use the ARM/Thumb Procedure Call Standard naming conventions. (Either
+with the normal register names or the special register names).
+.Sp
+This option can also be used for \s-1ARM\s0 architectures to force the
+disassembler to interpret all instructions as Thumb instructions by
+using the switch \fB\-\-disassembler\-options=force\-thumb\fR. This can be
+useful when attempting to disassemble thumb code produced by other
+compilers.
+.Sp
+For the x86, some of the options duplicate functions of the \fB\-m\fR
+switch, but allow finer grained control. Multiple selections from the
+following may be specified as a comma separated string.
+\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for
+the given architecture. \fBintel\fR and \fBatt\fR select between
+intel syntax mode and \s-1AT&T\s0 syntax mode.
+\&\fBintel-mnemonic\fR and \fBatt-mnemonic\fR select between
+intel mnemonic mode and \s-1AT&T\s0 mnemonic mode. \fBintel-mnemonic\fR
+implies \fBintel\fR and \fBatt-mnemonic\fR implies \fBatt\fR.
+\&\fBaddr64\fR, \fBaddr32\fR,
+\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default
+address size and operand size. These four options will be overridden if
+\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the
+option string. Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode,
+instructs the disassembler to print a mnemonic suffix even when the
+suffix could be inferred by the operands.
+.Sp
+For PowerPC, \fBbooke\fR controls the disassembly of BookE
+instructions. \fB32\fR and \fB64\fR select PowerPC and
+PowerPC64 disassembly, respectively. \fBe300\fR selects
+disassembly for the e300 family. \fB440\fR selects disassembly for
+the PowerPC 440. \fBppcps\fR selects disassembly for the paired
+single instructions of the \s-1PPC750CL\s0.
+.Sp
+For \s-1MIPS\s0, this option controls the printing of instruction mnemonic
+names and register names in disassembled instructions. Multiple
+selections from the following may be specified as a comma separated
+string, and invalid options are ignored:
+.RS 4
+.ie n .IP """no\-aliases""" 4
+.el .IP "\f(CWno\-aliases\fR" 4
+.IX Item "no-aliases"
+Print the 'raw' instruction mnemonic instead of some pseudo
+instruction mnemonic. I.e., print 'daddu' or 'or' instead of 'move',
+\&'sll' instead of 'nop', etc.
+.ie n .IP """gpr\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWgpr\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "gpr-names=ABI"
+Print \s-1GPR\s0 (general-purpose register) names as appropriate
+for the specified \s-1ABI\s0. By default, \s-1GPR\s0 names are selected according to
+the \s-1ABI\s0 of the binary being disassembled.
+.ie n .IP """fpr\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWfpr\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "fpr-names=ABI"
+Print \s-1FPR\s0 (floating-point register) names as
+appropriate for the specified \s-1ABI\s0. By default, \s-1FPR\s0 numbers are printed
+rather than names.
+.ie n .IP """cp0\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWcp0\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "cp0-names=ARCH"
+Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR. By default, \s-1CP0\s0 register names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """hwr\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWhwr\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "hwr-names=ARCH"
+Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR. By default, \s-1HWR\s0 names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """reg\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "reg-names=ABI"
+Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0.
+.ie n .IP """reg\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "reg-names=ARCH"
+Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names)
+as appropriate for the selected \s-1CPU\s0 or architecture.
+.RE
+.RS 4
+.Sp
+For any of the options listed above, \fI\s-1ABI\s0\fR or
+\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed
+rather than names, for the selected types of registers.
+You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using
+the \fB\-\-help\fR option.
+.Sp
+For \s-1VAX\s0, you can specify function entry addresses with \fB\-M
+entry:0xf00ba\fR. You can use this multiple times to properly
+disassemble \s-1VAX\s0 binary files that don't contain symbol tables (like
+\&\s-1ROM\s0 dumps). In these cases, the function entry mask would otherwise
+be decoded as \s-1VAX\s0 instructions, which would probably lead the rest
+of the function being wrongly disassembled.
+.RE
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-private\-headers\fR" 4
+.IX Item "--private-headers"
+.PD
+Print information that is specific to the object file format. The exact
+information printed depends upon the object file format. For some
+object file formats, no additional information is printed.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reloc\fR" 4
+.IX Item "--reloc"
+.PD
+Print the relocation entries of the file. If used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+.PD 0
+.IP "\fB\-\-dynamic\-reloc\fR" 4
+.IX Item "--dynamic-reloc"
+.PD
+Print the dynamic relocation entries of the file. This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries. As for \fB\-r\fR, if used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-full\-contents\fR" 4
+.IX Item "--full-contents"
+.PD
+Display the full contents of any sections requested. By default all
+non-empty sections are displayed.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-source\fR" 4
+.IX Item "--source"
+.PD
+Display source code intermixed with disassembly, if possible. Implies
+\&\fB\-d\fR.
+.IP "\fB\-\-prefix=\fR\fIprefix\fR" 4
+.IX Item "--prefix=prefix"
+Specify \fIprefix\fR to add to the absolute paths when used with
+\&\fB\-S\fR.
+.IP "\fB\-\-prefix\-strip=\fR\fIlevel\fR" 4
+.IX Item "--prefix-strip=level"
+Indicate how many initial directory names to strip off the hardwired
+absolute paths. It has no effect without \fB\-\-prefix=\fR\fIprefix\fR.
+.IP "\fB\-\-show\-raw\-insn\fR" 4
+.IX Item "--show-raw-insn"
+When disassembling instructions, print the instruction in hex as well as
+in symbolic form. This is the default except when
+\&\fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-no\-show\-raw\-insn\fR" 4
+.IX Item "--no-show-raw-insn"
+When disassembling instructions, do not print the instruction bytes.
+This is the default when \fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-insn\-width=\fR\fIwidth\fR" 4
+.IX Item "--insn-width=width"
+Display \fIwidth\fR bytes on a single line when disassembling
+instructions.
+.IP "\fB\-W[lLiaprmfFsoR]\fR" 4
+.IX Item "-W[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present. If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+.PD 0
+.IP "\fB\-\-stabs\fR" 4
+.IX Item "--stabs"
+.PD
+Display the full contents of any sections requested. Display the
+contents of the .stab and .stab.index and .stab.excl sections from an
+\&\s-1ELF\s0 file. This is only useful on systems (such as Solaris 2.0) in which
+\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0
+section. In most other file formats, debugging symbol-table entries are
+interleaved with linkage symbols, and are visible in the \fB\-\-syms\fR
+output.
+.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4
+.IX Item "--start-address=address"
+Start displaying data at the specified address. This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4
+.IX Item "--stop-address=address"
+Stop displaying data at the specified address. This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Print the symbol table entries of the file.
+This is similar to the information provided by the \fBnm\fR program,
+although the display format is different. The format of the output
+depends upon the format of the file being dumped, but there are two main
+types. One looks like this:
+.Sp
+.Vb 2
+\& [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss
+\& [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred
+.Ve
+.Sp
+where the number inside the square brackets is the number of the entry
+in the symbol table, the \fIsec\fR number is the section number, the
+\&\fIfl\fR value are the symbol's flag bits, the \fIty\fR number is the
+symbol's type, the \fIscl\fR number is the symbol's storage class and
+the \fInx\fR value is the number of auxilary entries associated with
+the symbol. The last two fields are the symbol's value and its name.
+.Sp
+The other common output format, usually seen with \s-1ELF\s0 based files,
+looks like this:
+.Sp
+.Vb 2
+\& 00000000 l d .bss 00000000 .bss
+\& 00000000 g .text 00000000 fred
+.Ve
+.Sp
+Here the first number is the symbol's value (sometimes refered to as
+its address). The next field is actually a set of characters and
+spaces indicating the flag bits that are set on the symbol. These
+characters are described below. Next is the section with which the
+symbol is associated or \fI*ABS*\fR if the section is absolute (ie
+not connected with any section), or \fI*UND*\fR if the section is
+referenced in the file being dumped, but not defined there.
+.Sp
+After the section name comes another field, a number, which for common
+symbols is the alignment and for other symbol is the size. Finally
+the symbol's name is displayed.
+.Sp
+The flag characters are divided into 7 groups as follows:
+.RS 4
+.ie n .IP """l""" 4
+.el .IP "\f(CWl\fR" 4
+.IX Item "l"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+.ie n .IP """!""" 4
+.el .IP "\f(CW!\fR" 4
+.IX Item "!"
+.PD
+The symbol is a local (l), global (g), unique global (u), neither
+global nor local (a space) or both global and local (!). A
+symbol can be neither local or global for a variety of reasons, e.g.,
+because it is used for debugging, but it is probably an indication of
+a bug if it is ever both local and global. Unique global symbols are
+a \s-1GNU\s0 extension to the standard set of \s-1ELF\s0 symbol bindings. For such
+a symbol the dynamic linker will make sure that in the entire process
+there is just one symbol with this name and type in use.
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+The symbol is weak (w) or strong (a space).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol denotes a constructor (C) or an ordinary symbol (a space).
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+The symbol is a warning (W) or a normal symbol (a space). A warning
+symbol's name is a message to be displayed if the symbol following the
+warning symbol is ever referenced.
+.ie n .IP """I""" 4
+.el .IP "\f(CWI\fR" 4
+.IX Item "I"
+.PD 0
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+.PD
+The symbol is an indirect reference to another symbol (I), a function
+to be evaluated during reloc processing (i) or a normal symbol (a
+space).
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD 0
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD
+The symbol is a debugging symbol (d) or a dynamic symbol (D) or a
+normal symbol (a space).
+.ie n .IP """F""" 4
+.el .IP "\f(CWF\fR" 4
+.IX Item "F"
+.PD 0
+.ie n .IP """f""" 4
+.el .IP "\f(CWf\fR" 4
+.IX Item "f"
+.ie n .IP """O""" 4
+.el .IP "\f(CWO\fR" 4
+.IX Item "O"
+.PD
+The symbol is the name of a function (F) or a file (f) or an object
+(O) or just a normal symbol (a space).
+.RE
+.RS 4
+.RE
+.IP "\fB\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.IP "\fB\-\-dynamic\-syms\fR" 4
+.IX Item "--dynamic-syms"
+.PD
+Print the dynamic symbol table entries of the file. This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries. This is similar to the information provided by the \fBnm\fR
+program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+When displaying symbols include those which the target considers to be
+special in some way and which would not normally be of interest to the
+user.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the version number of \fBobjdump\fR and exit.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-all\-headers\fR" 4
+.IX Item "--all-headers"
+.PD
+Display all available header information, including the symbol table and
+relocation entries. Using \fB\-x\fR is equivalent to specifying all of
+\&\fB\-a \-f \-h \-p \-r \-t\fR.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Format some lines for output devices that have more than 80 columns.
+Also do not truncate symbol names when they are displayed.
+.IP "\fB\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.IP "\fB\-\-disassemble\-zeroes\fR" 4
+.IX Item "--disassemble-zeroes"
+.PD
+Normally the disassembly output will skip blocks of zeroes. This
+option directs the disassembler to disassemble those blocks, just like
+any other data.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1
new file mode 100644
index 0000000..a72019c
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1
@@ -0,0 +1,199 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "RANLIB 1"
+.TH RANLIB 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ranlib \- generate index to archive.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ranlib [\fB\-vVt\fR] \fIarchive\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBranlib\fR generates an index to the contents of an archive and
+stores it in the archive. The index lists each symbol defined by a
+member of an archive that is a relocatable object file.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index.
+.PP
+An archive with such an index speeds up linking to the library and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+The \s-1GNU\s0 \fBranlib\fR program is another form of \s-1GNU\s0 \fBar\fR; running
+\&\fBranlib\fR is completely equivalent to executing \fBar \-s\fR.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBranlib\fR.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+Update the timestamp of the symbol map of an archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1
new file mode 100644
index 0000000..07132ee
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1
@@ -0,0 +1,420 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "READELF 1"
+.TH READELF 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+readelf \- Displays information about ELF files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+readelf [\fB\-a\fR|\fB\-\-all\fR]
+ [\fB\-h\fR|\fB\-\-file\-header\fR]
+ [\fB\-l\fR|\fB\-\-program\-headers\fR|\fB\-\-segments\fR]
+ [\fB\-S\fR|\fB\-\-section\-headers\fR|\fB\-\-sections\fR]
+ [\fB\-g\fR|\fB\-\-section\-groups\fR]
+ [\fB\-t\fR|\fB\-\-section\-details\fR]
+ [\fB\-e\fR|\fB\-\-headers\fR]
+ [\fB\-s\fR|\fB\-\-syms\fR|\fB\-\-symbols\fR]
+ [\fB\-n\fR|\fB\-\-notes\fR]
+ [\fB\-r\fR|\fB\-\-relocs\fR]
+ [\fB\-u\fR|\fB\-\-unwind\fR]
+ [\fB\-d\fR|\fB\-\-dynamic\fR]
+ [\fB\-V\fR|\fB\-\-version\-info\fR]
+ [\fB\-A\fR|\fB\-\-arch\-specific\fR]
+ [\fB\-D\fR|\fB\-\-use\-dynamic\fR]
+ [\fB\-x\fR <number or name>|\fB\-\-hex\-dump=\fR<number or name>]
+ [\fB\-p\fR <number or name>|\fB\-\-string\-dump=\fR<number or name>]
+ [\fB\-R\fR <number or name>|\fB\-\-relocated\-dump=\fR<number or name>]
+ [\fB\-c\fR|\fB\-\-archive\-index\fR]
+ [\fB\-w[lLiaprmfFsoR]\fR|
+ \fB\-\-debug\-dump\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+ [\fB\-I\fR|\fB\-histogram\fR]
+ [\fB\-v\fR|\fB\-\-version\fR]
+ [\fB\-W\fR|\fB\-\-wide\fR]
+ [\fB\-H\fR|\fB\-\-help\fR]
+ \fIelffile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBreadelf\fR displays information about one or more \s-1ELF\s0 format object
+files. The options control what particular information to display.
+.PP
+\&\fIelffile\fR... are the object files to be examined. 32\-bit and
+64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files.
+.PP
+This program performs a similar function to \fBobjdump\fR but it
+goes into more detail and it exists independently of the \s-1BFD\s0
+library, so if there is a bug in \s-1BFD\s0 then readelf will not be
+affected.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent. At least one option besides \fB\-v\fR or \fB\-H\fR must be
+given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.PD
+Equivalent to specifying \fB\-\-file\-header\fR,
+\&\fB\-\-program\-headers\fR, \fB\-\-sections\fR, \fB\-\-symbols\fR,
+\&\fB\-\-relocs\fR, \fB\-\-dynamic\fR, \fB\-\-notes\fR and
+\&\fB\-\-version\-info\fR.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-file\-header\fR" 4
+.IX Item "--file-header"
+.PD
+Displays the information contained in the \s-1ELF\s0 header at the start of the
+file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-program\-headers\fR" 4
+.IX Item "--program-headers"
+.IP "\fB\-\-segments\fR" 4
+.IX Item "--segments"
+.PD
+Displays the information contained in the file's segment headers, if it
+has any.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-sections\fR" 4
+.IX Item "--sections"
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.PD
+Displays the information contained in the file's section headers, if it
+has any.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-section\-groups\fR" 4
+.IX Item "--section-groups"
+.PD
+Displays the information contained in the file's section groups, if it
+has any.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-section\-details\fR" 4
+.IX Item "--section-details"
+.PD
+Displays the detailed section information. Implies \fB\-S\fR.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-symbols\fR" 4
+.IX Item "--symbols"
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Displays the entries in symbol table section of the file, if it has one.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display all the headers in the file. Equivalent to \fB\-h \-l \-S\fR.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-notes\fR" 4
+.IX Item "--notes"
+.PD
+Displays the contents of the \s-1NOTE\s0 segments and/or sections, if any.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocs\fR" 4
+.IX Item "--relocs"
+.PD
+Displays the contents of the file's relocation section, if it has one.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unwind\fR" 4
+.IX Item "--unwind"
+.PD
+Displays the contents of the file's unwind section, if it has one. Only
+the unwind sections for \s-1IA64\s0 \s-1ELF\s0 files are currently supported.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Displays the contents of the file's dynamic section, if it has one.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\-info\fR" 4
+.IX Item "--version-info"
+.PD
+Displays the contents of the version sections in the file, it they
+exist.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-arch\-specific\fR" 4
+.IX Item "--arch-specific"
+.PD
+Displays architecture-specific information in the file, if there
+is any.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-use\-dynamic\fR" 4
+.IX Item "--use-dynamic"
+.PD
+When displaying symbols, this option makes \fBreadelf\fR use the
+symbol table in the file's dynamic section, rather than the one in the
+symbols section.
+.IP "\fB\-x <number or name>\fR" 4
+.IX Item "-x <number or name>"
+.PD 0
+.IP "\fB\-\-hex\-dump=<number or name>\fR" 4
+.IX Item "--hex-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal bytes.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-R <number or name>\fR" 4
+.IX Item "-R <number or name>"
+.PD 0
+.IP "\fB\-\-relocated\-dump=<number or name>\fR" 4
+.IX Item "--relocated-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal
+bytes. A number identifies a particular section by index in the
+section table; any other string identifies all sections with that name
+in the object file. The contents of the section will be relocated
+before they are displayed.
+.IP "\fB\-p <number or name>\fR" 4
+.IX Item "-p <number or name>"
+.PD 0
+.IP "\fB\-\-string\-dump=<number or name>\fR" 4
+.IX Item "--string-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as printable strings.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-archive\-index\fR" 4
+.IX Item "--archive-index"
+.PD
+Displays the file symbol index infomation contained in the header part
+of binary archives. Performs the same function as the \fBt\fR
+command to \fBar\fR, but without using the \s-1BFD\s0 library.
+.IP "\fB\-w[lLiaprmfFsoR]\fR" 4
+.IX Item "-w[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-debug\-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present. If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.Sp
+Note: the \fB=decodedline\fR option will display the interpreted
+contents of a .debug_line section whereas the \fB=rawline\fR option
+dumps the contents in a raw format.
+.IP "\fB\-I\fR" 4
+.IX Item "-I"
+.PD 0
+.IP "\fB\-\-histogram\fR" 4
+.IX Item "--histogram"
+.PD
+Display a histogram of bucket list lengths when displaying the contents
+of the symbol tables.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of readelf.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Don't break output lines to fit into 80 columns. By default
+\&\fBreadelf\fR breaks section header and segment listing lines for
+64\-bit \s-1ELF\s0 files, so that they fit into 80 columns. This option causes
+\&\fBreadelf\fR to print each section header resp. each segment one a
+single line, which is far more readable on terminals wider than 80 columns.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display the command line options understood by \fBreadelf\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1
new file mode 100644
index 0000000..8bd0423
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1
@@ -0,0 +1,475 @@
+.\" Copyright (c) 1993, 2004, 2010 Free Software Foundation
+.\" See section COPYING for conditions for redistribution
+.TH run 1 "13oct1993" "GNU Tools" "GNU Tools"
+.de BP
+.sp
+.ti -.2i
+\(**
+..
+
+.SH NAME
+run\(em\&Simulator front-end
+
+.SH SYNOPSIS
+.hy 0
+.na
+.TP
+.B run
+.RB "[\|" \-v "\|]"
+." .RB "[\|" \-t "\|]"
+.RB "[\|" \-p
+.IR freq "\|]"
+.RB "[\|" \-m
+.IR memory "\|]"
+.RB "[\|" \--sysroot
+.IR filepath "\|]"
+.I program
+.ad b
+.hy 1
+.SH DESCRIPTION
+
+Use `\|\c
+.BI run " program"\c
+\&\|' to execute a binary by interpreting machine instructions on your
+host computer.
+
+.B run
+is the same emulator used by GDB's `\|\c
+.B target sim\c
+\&\|' command. You can run it directly by executing
+.B run
+if you just want to see your program execute, and do not need any
+debugger functionality. You can also use
+.B run
+to generate profiling information for analysis with
+.BR gprof .
+
+.SH OPTIONS
+
+.TP
+.B \-v
+Verbose output. Display the name of the program to run before
+execution; after execution, display the number of instructions
+executed, the number of machine cycles emulated, the number of
+pipeline stalls, the real time taken, the emulated execution time
+taken, and a summary of how much profiling information was generated.
+."
+." .TP
+." .B \-t
+." `trace', calls a sim_trace routine that does nothing.
+
+.TP
+.BI \-p " freq"
+Generate profile information (for use with
+.B gprof\c
+\&).
+.I freq
+is the profiling frequency. Write the profiling information to a file called
+.BR gmon.out .
+
+.TP
+.BI \-m " memory"
+Set the memory size for the emulated machine to two to the power
+.IR memory .
+The default value is 19, emulating a board with 524288 bytes of memory.
+
+.TP
+.BI \--sysroot " filepath"
+Prepend
+.IR filepath
+to all simulator system calls that pass absolute file paths.
+Change working directory to
+.IR filepath
+at program start. Not all simulators support this option; those
+that don't, will ignore it.
+
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gprof "\|'"
+entry in
+.B info\c
+\&;
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch.
+
+.SH COPYING
+Copyright (c) 1993, 2000 Free Software Foundation, Inc.
+.PP
+This document is distributed under the terms of the GNU Free
+Documentation License, version 1.1. That license is described in the
+sources for this manual page, but it is not displayed here in order to
+make this manual more consise. Copies of this license can also be
+obtained from: http://www.gnu.org/copyleft/.
+
+\" GNU Free Documentation License
+\" Version 1.1, March 2000
+
+\" Copyright (C) 2000 Free Software Foundation, Inc.
+\" 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+\" Everyone is permitted to copy and distribute verbatim
+\" copies of this license document, but changing it is
+\" not allowed.
+\" .PP
+\" 0. PREAMBLE
+\" .PP
+\" The purpose of this License is to make a manual, textbook, or other
+\" written document "free" in the sense of freedom: to assure everyone
+\" the effective freedom to copy and redistribute it, with or without
+\" modifying it, either commercially or noncommercially. Secondarily,
+\" this License preserves for the author and publisher a way to get
+\" credit for their work, while not being considered responsible for
+\" modifications made by others.
+\" .PP
+\" This License is a kind of "copyleft", which means that derivative
+\" works of the document must themselves be free in the same sense. It
+\" complements the GNU General Public License, which is a copyleft
+\" license designed for free software.
+\" .PP
+\" We have designed this License in order to use it for manuals for free
+\" software, because free software needs free documentation: a free
+\" program should come with manuals providing the same freedoms that the
+\" software does. But this License is not limited to software manuals;
+\" it can be used for any textual work, regardless of subject matter or
+\" whether it is published as a printed book. We recommend this License
+\" principally for works whose purpose is instruction or reference.
+\" .PP
+\" 1. APPLICABILITY AND DEFINITIONS
+\" .PP
+\" This License applies to any manual or other work that contains a
+\" notice placed by the copyright holder saying it can be distributed
+\" under the terms of this License. The "Document", below, refers to any
+\" such manual or work. Any member of the public is a licensee, and is
+\" addressed as "you".
+\" .PP
+\" A "Modified Version" of the Document means any work containing the
+\" Document or a portion of it, either copied verbatim, or with
+\" modifications and/or translated into another language.
+\" .PP
+\" A "Secondary Section" is a named appendix or a front-matter section of
+\" the Document that deals exclusively with the relationship of the
+\" publishers or authors of the Document to the Document's overall subject
+\" (or to related matters) and contains nothing that could fall directly
+\" within that overall subject. (For example, if the Document is in part a
+\" textbook of mathematics, a Secondary Section may not explain any
+\" mathematics.) The relationship could be a matter of historical
+\" connection with the subject or with related matters, or of legal,
+\" commercial, philosophical, ethical or political position regarding
+\" them.
+\" .PP
+\" The "Invariant Sections" are certain Secondary Sections whose titles
+\" are designated, as being those of Invariant Sections, in the notice
+\" that says that the Document is released under this License.
+\" .PP
+\" The "Cover Texts" are certain short passages of text that are listed,
+\" as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+\" the Document is released under this License.
+\" .PP
+\" A "Transparent" copy of the Document means a machine-readable copy,
+\" represented in a format whose specification is available to the
+\" general public, whose contents can be viewed and edited directly and
+\" straightforwardly with generic text editors or (for images composed of
+\" pixels) generic paint programs or (for drawings) some widely available
+\" drawing editor, and that is suitable for input to text formatters or
+\" for automatic translation to a variety of formats suitable for input
+\" to text formatters. A copy made in an otherwise Transparent file
+\" format whose markup has been designed to thwart or discourage
+\" subsequent modification by readers is not Transparent. A copy that is
+\" not "Transparent" is called "Opaque".
+\" .PP
+\" Examples of suitable formats for Transparent copies include plain
+\" ASCII without markup, Texinfo input format, LaTeX input format, SGML
+\" or XML using a publicly available DTD, and standard-conforming simple
+\" HTML designed for human modification. Opaque formats include
+\" PostScript, PDF, proprietary formats that can be read and edited only
+\" by proprietary word processors, SGML or XML for which the DTD and/or
+\" processing tools are not generally available, and the
+\" machine-generated HTML produced by some word processors for output
+\" purposes only.
+\" .PP
+\" The "Title Page" means, for a printed book, the title page itself,
+\" plus such following pages as are needed to hold, legibly, the material
+\" this License requires to appear in the title page. For works in
+\" formats which do not have any title page as such, "Title Page" means
+\" the text near the most prominent appearance of the work's title,
+\" preceding the beginning of the body of the text.
+\" .PP
+\" 2. VERBATIM COPYING
+\" .PP
+\" You may copy and distribute the Document in any medium, either
+\" commercially or noncommercially, provided that this License, the
+\" copyright notices, and the license notice saying this License applies
+\" to the Document are reproduced in all copies, and that you add no other
+\" conditions whatsoever to those of this License. You may not use
+\" technical measures to obstruct or control the reading or further
+\" copying of the copies you make or distribute. However, you may accept
+\" compensation in exchange for copies. If you distribute a large enough
+\" number of copies you must also follow the conditions in section 3.
+\" .PP
+\" You may also lend copies, under the same conditions stated above, and
+\" you may publicly display copies.
+\" .PP
+\" 3. COPYING IN QUANTITY
+\" .PP
+\" If you publish printed copies of the Document numbering more than 100,
+\" and the Document's license notice requires Cover Texts, you must enclose
+\" the copies in covers that carry, clearly and legibly, all these Cover
+\" Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+\" the back cover. Both covers must also clearly and legibly identify
+\" you as the publisher of these copies. The front cover must present
+\" the full title with all words of the title equally prominent and
+\" visible. You may add other material on the covers in addition.
+\" Copying with changes limited to the covers, as long as they preserve
+\" the title of the Document and satisfy these conditions, can be treated
+\" as verbatim copying in other respects.
+\" .PP
+\" If the required texts for either cover are too voluminous to fit
+\" legibly, you should put the first ones listed (as many as fit
+\" reasonably) on the actual cover, and continue the rest onto adjacent
+\" pages.
+\" .PP
+\" If you publish or distribute Opaque copies of the Document numbering
+\" more than 100, you must either include a machine-readable Transparent
+\" copy along with each Opaque copy, or state in or with each Opaque copy
+\" a publicly-accessible computer-network location containing a complete
+\" Transparent copy of the Document, free of added material, which the
+\" general network-using public has access to download anonymously at no
+\" charge using public-standard network protocols. If you use the latter
+\" option, you must take reasonably prudent steps, when you begin
+\" distribution of Opaque copies in quantity, to ensure that this
+\" Transparent copy will remain thus accessible at the stated location
+\" until at least one year after the last time you distribute an Opaque
+\" copy (directly or through your agents or retailers) of that edition to
+\" the public.
+\" .PP
+\" It is requested, but not required, that you contact the authors of the
+\" Document well before redistributing any large number of copies, to give
+\" them a chance to provide you with an updated version of the Document.
+\" .PP
+\" 4. MODIFICATIONS
+\" .PP
+\" You may copy and distribute a Modified Version of the Document under
+\" the conditions of sections 2 and 3 above, provided that you release
+\" the Modified Version under precisely this License, with the Modified
+\" Version filling the role of the Document, thus licensing distribution
+\" and modification of the Modified Version to whoever possesses a copy
+\" of it. In addition, you must do these things in the Modified Version:
+\" .PP
+\" A. Use in the Title Page (and on the covers, if any) a title distinct
+\" from that of the Document, and from those of previous versions
+\" (which should, if there were any, be listed in the History section
+\" of the Document). You may use the same title as a previous version
+\" if the original publisher of that version gives permission.
+\" .PP
+\" B. List on the Title Page, as authors, one or more persons or entities
+\" responsible for authorship of the modifications in the Modified
+\" Version, together with at least five of the principal authors of the
+\" Document (all of its principal authors, if it has less than five).
+\" .PP
+\" C. State on the Title page the name of the publisher of the
+\" Modified Version, as the publisher.
+\" .PP
+\" D. Preserve all the copyright notices of the Document.
+\" .PP
+\" E. Add an appropriate copyright notice for your modifications
+\" adjacent to the other copyright notices.
+\" .PP
+\" F. Include, immediately after the copyright notices, a license notice
+\" giving the public permission to use the Modified Version under the
+\" terms of this License, in the form shown in the Addendum below.
+\" Preserve in that license notice the full lists of Invariant Sections
+\" and required Cover Texts given in the Document's license notice.
+\" .PP
+\" H. Include an unaltered copy of this License.
+\" .PP
+\" I. Preserve the section entitled "History", and its title, and add to
+\" it an item stating at least the title, year, new authors, and
+\" publisher of the Modified Version as given on the Title Page. If
+\" there is no section entitled "History" in the Document, create one
+\" stating the title, year, authors, and publisher of the Document as
+\" given on its Title Page, then add an item describing the Modified
+\" Version as stated in the previous sentence.
+\" .PP
+\" J. Preserve the network location, if any, given in the Document for
+\" public access to a Transparent copy of the Document, and likewise
+\" the network locations given in the Document for previous versions
+\" it was based on. These may be placed in the "History" section.
+\" You may omit a network location for a work that was published at
+\" least four years before the Document itself, or if the original
+\" publisher of the version it refers to gives permission.
+\" .PP
+\" K. In any section entitled "Acknowledgements" or "Dedications",
+\" preserve the section's title, and preserve in the section all the
+\" substance and tone of each of the contributor acknowledgements
+\" and/or dedications given therein.
+\" .PP
+\" L. Preserve all the Invariant Sections of the Document,
+\" unaltered in their text and in their titles. Section numbers
+\" or the equivalent are not considered part of the section titles.
+\" .PP
+\" M. Delete any section entitled "Endorsements". Such a section
+\" may not be included in the Modified Version.
+\" .PP
+\" N. Do not retitle any existing section as "Endorsements"
+\" or to conflict in title with any Invariant Section.
+\" .PP
+\" If the Modified Version includes new front-matter sections or
+\" appendices that qualify as Secondary Sections and contain no material
+\" copied from the Document, you may at your option designate some or all
+\" of these sections as invariant. To do this, add their titles to the
+\" list of Invariant Sections in the Modified Version's license notice.
+\" These titles must be distinct from any other section titles.
+\" .PP
+\" You may add a section entitled "Endorsements", provided it contains
+\" nothing but endorsements of your Modified Version by various
+\" parties--for example, statements of peer review or that the text has
+\" been approved by an organization as the authoritative definition of a
+\" standard.
+\" .PP
+\" You may add a passage of up to five words as a Front-Cover Text, and a
+\" passage of up to 25 words as a Back-Cover Text, to the end of the list
+\" of Cover Texts in the Modified Version. Only one passage of
+\" Front-Cover Text and one of Back-Cover Text may be added by (or
+\" through arrangements made by) any one entity. If the Document already
+\" includes a cover text for the same cover, previously added by you or
+\" by arrangement made by the same entity you are acting on behalf of,
+\" you may not add another; but you may replace the old one, on explicit
+\" permission from the previous publisher that added the old one.
+\" .PP
+\" The author(s) and publisher(s) of the Document do not by this License
+\" give permission to use their names for publicity for or to assert or
+\" imply endorsement of any Modified Version.
+\" .PP
+
+\" 5. COMBINING DOCUMENTS
+\" .PP
+\" You may combine the Document with other documents released under this
+\" License, under the terms defined in section 4 above for modified
+\" versions, provided that you include in the combination all of the
+\" Invariant Sections of all of the original documents, unmodified, and
+\" list them all as Invariant Sections of your combined work in its
+\" license notice.
+\" .PP
+\" The combined work need only contain one copy of this License, and
+\" multiple identical Invariant Sections may be replaced with a single
+\" copy. If there are multiple Invariant Sections with the same name but
+\" different contents, make the title of each such section unique by
+\" adding at the end of it, in parentheses, the name of the original
+\" author or publisher of that section if known, or else a unique number.
+\" Make the same adjustment to the section titles in the list of
+\" Invariant Sections in the license notice of the combined work.
+\" .PP
+\" In the combination, you must combine any sections entitled "History"
+\" in the various original documents, forming one section entitled
+\" "History"; likewise combine any sections entitled "Acknowledgements",
+\" and any sections entitled "Dedications". You must delete all sections
+\" entitled "Endorsements."
+\" .PP
+
+\" 6. COLLECTIONS OF DOCUMENTS
+\" .PP
+\" You may make a collection consisting of the Document and other documents
+\" released under this License, and replace the individual copies of this
+\" License in the various documents with a single copy that is included in
+\" the collection, provided that you follow the rules of this License for
+\" verbatim copying of each of the documents in all other respects.
+\" .PP
+\" You may extract a single document from such a collection, and distribute
+\" it individually under this License, provided you insert a copy of this
+\" License into the extracted document, and follow this License in all
+\" other respects regarding verbatim copying of that document.
+\" .PP
+
+\" 7. AGGREGATION WITH INDEPENDENT WORKS
+\" .PP
+\" A compilation of the Document or its derivatives with other separate
+\" and independent documents or works, in or on a volume of a storage or
+\" distribution medium, does not as a whole count as a Modified Version
+\" of the Document, provided no compilation copyright is claimed for the
+\" compilation. Such a compilation is called an "aggregate", and this
+\" License does not apply to the other self-contained works thus compiled
+\" with the Document, on account of their being thus compiled, if they
+\" are not themselves derivative works of the Document.
+\" .PP
+\" If the Cover Text requirement of section 3 is applicable to these
+\" copies of the Document, then if the Document is less than one quarter
+\" of the entire aggregate, the Document's Cover Texts may be placed on
+\" covers that surround only the Document within the aggregate.
+\" Otherwise they must appear on covers around the whole aggregate.
+\" .PP
+
+\" 8. TRANSLATION
+\" .PP
+\" Translation is considered a kind of modification, so you may
+\" distribute translations of the Document under the terms of section 4.
+\" Replacing Invariant Sections with translations requires special
+\" permission from their copyright holders, but you may include
+\" translations of some or all Invariant Sections in addition to the
+\" original versions of these Invariant Sections. You may include a
+\" translation of this License provided that you also include the
+\" original English version of this License. In case of a disagreement
+\" between the translation and the original English version of this
+\" License, the original English version will prevail.
+\" .PP
+
+\" 9. TERMINATION
+\" .PP
+\" You may not copy, modify, sublicense, or distribute the Document except
+\" as expressly provided for under this License. Any other attempt to
+\" copy, modify, sublicense or distribute the Document is void, and will
+\" automatically terminate your rights under this License. However,
+\" parties who have received copies, or rights, from you under this
+\" License will not have their licenses terminated so long as such
+\" parties remain in full compliance.
+\" .PP
+
+\" 10. FUTURE REVISIONS OF THIS LICENSE
+\" .PP
+\" The Free Software Foundation may publish new, revised versions
+\" of the GNU Free Documentation License from time to time. Such new
+\" versions will be similar in spirit to the present version, but may
+\" differ in detail to address new problems or concerns. See
+\" http://www.gnu.org/copyleft/.
+\" .PP
+\" Each version of the License is given a distinguishing version number.
+\" If the Document specifies that a particular numbered version of this
+\" License "or any later version" applies to it, you have the option of
+\" following the terms and conditions either of that specified version or
+\" of any later version that has been published (not as a draft) by the
+\" Free Software Foundation. If the Document does not specify a version
+\" number of this License, you may choose any version ever published (not
+\" as a draft) by the Free Software Foundation.
+\" .PP
+
+\" ADDENDUM: How to use this License for your documents
+\" .PP
+\" To use this License in a document you have written, include a copy of
+\" the License in the document and put the following copyright and
+\" license notices just after the title page:
+\" .PP
+\" Copyright (c) YEAR YOUR NAME.
+\" Permission is granted to copy, distribute and/or
+\" modify this document under the terms of the GNU
+\" Free Documentation License, Version 1.1 or any later
+\" version published by the Free Software Foundation;
+\" with the Invariant Sections being LIST THEIR TITLES,
+\" with the Front-Cover Texts being LIST, and with the
+\" Back-Cover Texts being LIST. A copy of the license
+\" is included in the section entitled "GNU Free
+\" Documentation License".
+\" .PP
+\" If you have no Invariant Sections, write "with no Invariant Sections"
+\" instead of saying which ones are invariant. If you have no
+\" Front-Cover Texts, write "no Front-Cover Texts" instead of
+\" "Front-Cover Texts being LIST"; likewise for Back-Cover Texts.
+\" .PP
+\" If your document contains nontrivial examples of program code, we
+\" recommend releasing these examples in parallel under your choice of
+\" free software license, such as the GNU General Public License,
+\" to permit their use in free software.
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1
new file mode 100644
index 0000000..a76bebe
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1
@@ -0,0 +1,275 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "SIZE 1"
+.TH SIZE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+size \- list section sizes and total size.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+size [\fB\-A\fR|\fB\-B\fR|\fB\-\-format=\fR\fIcompatibility\fR]
+ [\fB\-\-help\fR]
+ [\fB\-d\fR|\fB\-o\fR|\fB\-x\fR|\fB\-\-radix=\fR\fInumber\fR]
+ [\fB\-\-common\fR]
+ [\fB\-t\fR|\fB\-\-totals\fR]
+ [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBsize\fR utility lists the section sizes\-\-\-and the total
+size\-\-\-for each of the object or archive files \fIobjfile\fR in its
+argument list. By default, one line of output is generated for each
+object file or each module in an archive.
+.PP
+\&\fIobjfile\fR... are the object files to be examined.
+If none are specified, the file \f(CW\*(C`a.out\*(C'\fR will be used.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+.IP "\fB\-\-format=\fR\fIcompatibility\fR" 4
+.IX Item "--format=compatibility"
+.PD
+Using one of these options, you can choose whether the output from \s-1GNU\s0
+\&\fBsize\fR resembles output from System V \fBsize\fR (using \fB\-A\fR,
+or \fB\-\-format=sysv\fR), or Berkeley \fBsize\fR (using \fB\-B\fR, or
+\&\fB\-\-format=berkeley\fR). The default is the one-line format similar to
+Berkeley's.
+.Sp
+Here is an example of the Berkeley (default) format of output from
+\&\fBsize\fR:
+.Sp
+.Vb 4
+\& $ size \-\-format=Berkeley ranlib size
+\& text data bss dec hex filename
+\& 294880 81920 11592 388392 5ed28 ranlib
+\& 294880 81920 11888 388688 5ee50 size
+.Ve
+.Sp
+This is the same data, but displayed closer to System V conventions:
+.Sp
+.Vb 7
+\& $ size \-\-format=SysV ranlib size
+\& ranlib :
+\& section size addr
+\& .text 294880 8192
+\& .data 81920 303104
+\& .bss 11592 385024
+\& Total 388392
+\&
+\&
+\& size :
+\& section size addr
+\& .text 294880 8192
+\& .data 81920 303104
+\& .bss 11888 385024
+\& Total 388688
+.Ve
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of acceptable arguments and options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.IP "\fB\-\-radix=\fR\fInumber\fR" 4
+.IX Item "--radix=number"
+.PD
+Using one of these options, you can control whether the size of each
+section is given in decimal (\fB\-d\fR, or \fB\-\-radix=10\fR); octal
+(\fB\-o\fR, or \fB\-\-radix=8\fR); or hexadecimal (\fB\-x\fR, or
+\&\fB\-\-radix=16\fR). In \fB\-\-radix=\fR\fInumber\fR, only the three
+values (8, 10, 16) are supported. The total size is always given in two
+radices; decimal and hexadecimal for \fB\-d\fR or \fB\-x\fR output, or
+octal and hexadecimal if you're using \fB\-o\fR.
+.IP "\fB\-\-common\fR" 4
+.IX Item "--common"
+Print total size of common symbols in each file. When using Berkeley
+format these are included in the bss size.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-totals\fR" 4
+.IX Item "--totals"
+.PD
+Show totals of all objects listed (Berkeley format listing mode only).
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify that the object-code format for \fIobjfile\fR is
+\&\fIbfdname\fR. This option may not be necessary; \fBsize\fR can
+automatically recognize many formats.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of \fBsize\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1
new file mode 100644
index 0000000..0904a40
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1
@@ -0,0 +1,264 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRINGS 1"
+.TH STRINGS 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+strings \- print the strings of printable characters in files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strings [\fB\-afovV\fR] [\fB\-\fR\fImin-len\fR]
+ [\fB\-n\fR \fImin-len\fR] [\fB\-\-bytes=\fR\fImin-len\fR]
+ [\fB\-t\fR \fIradix\fR] [\fB\-\-radix=\fR\fIradix\fR]
+ [\fB\-e\fR \fIencoding\fR] [\fB\-\-encoding=\fR\fIencoding\fR]
+ [\fB\-\fR] [\fB\-\-all\fR] [\fB\-\-print\-file\-name\fR]
+ [\fB\-T\fR \fIbfdname\fR] [\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-\-help\fR] [\fB\-\-version\fR] \fIfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+For each \fIfile\fR given, \s-1GNU\s0 \fBstrings\fR prints the printable
+character sequences that are at least 4 characters long (or the number
+given with the options below) and are followed by an unprintable
+character. By default, it only prints the strings from the initialized
+and loaded sections of object files; for other types of files, it prints
+the strings from the whole file.
+.PP
+\&\fBstrings\fR is mainly useful for determining the contents of non-text
+files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.IP "\fB\-\fR" 4
+.IX Item "-"
+.PD
+Do not scan only the initialized and loaded sections of object files;
+scan the whole files.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Print the name of the file before each string.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the program usage on the standard output and exit.
+.IP "\fB\-\fR\fImin-len\fR" 4
+.IX Item "-min-len"
+.PD 0
+.IP "\fB\-n\fR \fImin-len\fR" 4
+.IX Item "-n min-len"
+.IP "\fB\-\-bytes=\fR\fImin-len\fR" 4
+.IX Item "--bytes=min-len"
+.PD
+Print sequences of characters that are at least \fImin-len\fR characters
+long, instead of the default 4.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+Like \fB\-t o\fR. Some other versions of \fBstrings\fR have \fB\-o\fR
+act like \fB\-t d\fR instead. Since we can not be compatible with both
+ways, we simply chose one.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Print the offset within the file before each string. The single
+character argument specifies the radix of the offset\-\-\-\fBo\fR for
+octal, \fBx\fR for hexadecimal, or \fBd\fR for decimal.
+.IP "\fB\-e\fR \fIencoding\fR" 4
+.IX Item "-e encoding"
+.PD 0
+.IP "\fB\-\-encoding=\fR\fIencoding\fR" 4
+.IX Item "--encoding=encoding"
+.PD
+Select the character encoding of the strings that are to be found.
+Possible values for \fIencoding\fR are: \fBs\fR = single\-7\-bit\-byte
+characters (\s-1ASCII\s0, \s-1ISO\s0 8859, etc., default), \fBS\fR =
+single\-8\-bit\-byte characters, \fBb\fR = 16\-bit bigendian, \fBl\fR =
+16\-bit littleendian, \fBB\fR = 32\-bit bigendian, \fBL\fR = 32\-bit
+littleendian. Useful for finding wide character strings. (\fBl\fR
+and \fBb\fR apply to, for example, Unicode \s-1UTF\-16/UCS\-2\s0 encodings).
+.IP "\fB\-T\fR \fIbfdname\fR" 4
+.IX Item "-T bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify an object code format other than your system's default format.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the program version number on the standard output and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), \fIreadelf\fR\|(1)
+and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1
new file mode 100644
index 0000000..fba09c4
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1
@@ -0,0 +1,399 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRIP 1"
+.TH STRIP 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+strip \- Discard symbols from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strip [\fB\-F\fR \fIbfdname\fR |\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-I\fR \fIbfdname\fR |\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR |\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-s\fR|\fB\-\-strip\-all\fR]
+ [\fB\-S\fR|\fB\-g\fR|\fB\-d\fR|\fB\-\-strip\-debug\fR]
+ [\fB\-K\fR \fIsymbolname\fR |\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-N\fR \fIsymbolname\fR |\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-w\fR|\fB\-\-wildcard\fR]
+ [\fB\-x\fR|\fB\-\-discard\-all\fR] [\fB\-X\fR |\fB\-\-discard\-locals\fR]
+ [\fB\-R\fR \fIsectionname\fR |\fB\-\-remove\-section=\fR\fIsectionname\fR]
+ [\fB\-o\fR \fIfile\fR] [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+ [\fB\-\-keep\-file\-symbols\fR]
+ [\fB\-\-only\-keep\-debug\fR]
+ [\fB\-v\fR |\fB\-\-verbose\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-\-help\fR] [\fB\-\-info\fR]
+ \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBstrip\fR discards all symbols from object files
+\&\fIobjfile\fR. The list of object files may include archives.
+At least one object file must be given.
+.PP
+\&\fBstrip\fR modifies the files named in its argument,
+rather than writing modified copies under different names.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR, and rewrite it in the same format.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBstrip\fR and exit.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Replace \fIobjfile\fR with a file in the output format \fIbfdname\fR.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file. This
+option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Remove all symbols.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Remove debugging symbols only.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Remove all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped. This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Remove symbol \fIsymbolname\fR from the source file. This option may be
+given more than once, and may be combined with strip options other than
+\&\fB\-K\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Put the stripped output in \fIfile\fR, rather than replacing the
+existing file. When this argument is used, only one \fIobjfile\fR
+argument may be specified.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Preserve the access and modification dates of the file.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options. The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name. If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\& \-w \-K !foo \-K fo*
+.Ve
+.Sp
+would cause strip to only keep symbols that start with the letters
+\&\*(L"fo\*(R", but to discard the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Remove non-global symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Remove compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required. The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal. Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal. Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional. You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to foo.full>"
+.ie n .IP "1.<Run ""strip \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWstrip \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run strip --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable. It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files. It
+does not make sense to use it on object files where the debugging
+information may be incomplete. Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number for \fBstrip\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified. In the case of
+archives, \fBstrip \-v\fR lists all members of the archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1
new file mode 100644
index 0000000..46cadd9
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1
@@ -0,0 +1,359 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDMC 1"
+.TH WINDMC 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+windmc \- generates Windows message resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindmc\fR reads message definitions from an input file (.mc) and
+translate them into a set of output files. The output files may be of
+four kinds:
+.ie n .IP """h""" 4
+.el .IP "\f(CWh\fR" 4
+.IX Item "h"
+A C header file containing the message definitions.
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A resource file compilable by the \fBwindres\fR tool.
+.ie n .IP """bin""" 4
+.el .IP "\f(CWbin\fR" 4
+.IX Item "bin"
+One or more binary files containing the resource data for a specific
+message language.
+.ie n .IP """dbg""" 4
+.el .IP "\f(CWdbg\fR" 4
+.IX Item "dbg"
+A C include file that maps message id's to their symbolic name.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindmc\fR converts from the \f(CW\*(C`mc\*(C'\fR format to the \f(CW\*(C`bin\*(C'\fR
+format, \f(CW\*(C`rc\*(C'\fR, \f(CW\*(C`h\*(C'\fR, and optional \f(CW\*(C`dbg\*(C'\fR it is acting like the
+Windows Message Compiler.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-ascii_in\fR" 4
+.IX Item "--ascii_in"
+.PD
+Specifies that the input file specified is \s-1ANSI\s0. This is the default
+behaviour.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-ascii_out\fR" 4
+.IX Item "--ascii_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR files should be in \s-1ANSI\s0
+format.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-binprefix\fR" 4
+.IX Item "--binprefix"
+.PD
+Specifies that \f(CW\*(C`bin\*(C'\fR filenames should have to be prefixed by the
+basename of the source file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-customflag\fR" 4
+.IX Item "--customflag"
+.PD
+Sets the customer bit in all message id's.
+.IP "\fB\-C\fR \fIcodepage\fR" 4
+.IX Item "-C codepage"
+.PD 0
+.IP "\fB\-\-codepage_in\fR \fIcodepage\fR" 4
+.IX Item "--codepage_in codepage"
+.PD
+Sets the default codepage to be used to convert input file to \s-1UTF16\s0. The
+default is ocdepage 1252.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-decimal_values\fR" 4
+.IX Item "--decimal_values"
+.PD
+Outputs the constants in the header file in decimal. Default is using
+hexadecimal output.
+.IP "\fB\-e\fR \fIext\fR" 4
+.IX Item "-e ext"
+.PD 0
+.IP "\fB\-\-extension\fR \fIext\fR" 4
+.IX Item "--extension ext"
+.PD
+The extension for the header file. The default is .h extension.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a bin file as output. This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets. Normally \fBwindmc\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-h\fR \fIpath\fR" 4
+.IX Item "-h path"
+.PD 0
+.IP "\fB\-\-headerdir\fR \fIpath\fR" 4
+.IX Item "--headerdir path"
+.PD
+The target directory of the generated header file. The default is the
+current directory.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-m\fR \fIcharacters\fR" 4
+.IX Item "-m characters"
+.PD 0
+.IP "\fB\-\-maxlength\fR \fIcharacters\fR" 4
+.IX Item "--maxlength characters"
+.PD
+Instructs \fBwindmc\fR to generate a warning if the length
+of any message exceeds the number specified.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nullterminate\fR" 4
+.IX Item "--nullterminate"
+.PD
+Terminate message text in \f(CW\*(C`bin\*(C'\fR files by zero. By default they are
+terminated by \s-1CR/LF\s0.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.PD 0
+.IP "\fB\-\-hresult_use\fR" 4
+.IX Item "--hresult_use"
+.PD
+Not yet implemented. Instructs \f(CW\*(C`windmc\*(C'\fR to generate an \s-1OLE2\s0 header
+file, using \s-1HRESULT\s0 definitions. Status codes are used if the flag is not
+specified.
+.IP "\fB\-O\fR \fIcodepage\fR" 4
+.IX Item "-O codepage"
+.PD 0
+.IP "\fB\-\-codepage_out\fR \fIcodepage\fR" 4
+.IX Item "--codepage_out codepage"
+.PD
+Sets the default codepage to be used to output text files. The default
+is ocdepage 1252.
+.IP "\fB\-r\fR \fIpath\fR" 4
+.IX Item "-r path"
+.PD 0
+.IP "\fB\-\-rcdir\fR \fIpath\fR" 4
+.IX Item "--rcdir path"
+.PD
+The target directory for the generated \f(CW\*(C`rc\*(C'\fR script and the generated
+\&\f(CW\*(C`bin\*(C'\fR files that the resource compiler script includes. The default
+is the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unicode_in\fR" 4
+.IX Item "--unicode_in"
+.PD
+Specifies that the input file is \s-1UTF16\s0.
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-unicode_out\fR" 4
+.IX Item "--unicode_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR file should be in \s-1UTF16\s0
+format. This is the default behaviour.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Enable verbose mode.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindmc\fR.
+.IP "\fB\-x\fR \fIpath\fR" 4
+.IX Item "-x path"
+.PD 0
+.IP "\fB\-\-xdgb\fR \fIpath\fR" 4
+.IX Item "--xdgb path"
+.PD
+The path of the \f(CW\*(C`dbg\*(C'\fR C include file that maps message id's to the
+symbolic name. No such file is generated without specifying the switch.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1 b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1
new file mode 100644
index 0000000..20694e0
--- /dev/null
+++ b/darwin-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1
@@ -0,0 +1,362 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDRES 1"
+.TH WINDRES 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+windres \- manipulate Windows resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+windmc [options] input-file
+windres [options] [input\-file] [output\-file]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindres\fR reads resources from an input file and copies them into
+an output file. Either file may be in one of three formats:
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A text format read by the Resource Compiler.
+.ie n .IP """res""" 4
+.el .IP "\f(CWres\fR" 4
+.IX Item "res"
+A binary format generated by the Resource Compiler.
+.ie n .IP """coff""" 4
+.el .IP "\f(CWcoff\fR" 4
+.IX Item "coff"
+A \s-1COFF\s0 object or executable.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindres\fR converts from the \f(CW\*(C`rc\*(C'\fR format to the \f(CW\*(C`res\*(C'\fR
+format, it is acting like the Windows Resource Compiler. When
+\&\fBwindres\fR converts from the \f(CW\*(C`res\*(C'\fR format to the \f(CW\*(C`coff\*(C'\fR
+format, it is acting like the Windows \f(CW\*(C`CVTRES\*(C'\fR program.
+.PP
+When \fBwindres\fR generates an \f(CW\*(C`rc\*(C'\fR file, the output is similar
+but not identical to the format expected for the input. When an input
+\&\f(CW\*(C`rc\*(C'\fR file refers to an external filename, an output \f(CW\*(C`rc\*(C'\fR file
+will instead include the file contents.
+.PP
+If the input or output format is not specified, \fBwindres\fR will
+guess based on the file name, or, for the input file, the file contents.
+A file with an extension of \fI.rc\fR will be treated as an \f(CW\*(C`rc\*(C'\fR
+file, a file with an extension of \fI.res\fR will be treated as a
+\&\f(CW\*(C`res\*(C'\fR file, and a file with an extension of \fI.o\fR or
+\&\fI.exe\fR will be treated as a \f(CW\*(C`coff\*(C'\fR file.
+.PP
+If no output file is specified, \fBwindres\fR will print the resources
+in \f(CW\*(C`rc\*(C'\fR format to standard output.
+.PP
+The normal use is for you to write an \f(CW\*(C`rc\*(C'\fR file, use \fBwindres\fR
+to convert it to a \s-1COFF\s0 object file, and then link the \s-1COFF\s0 file into
+your application. This will make the resources described in the
+\&\f(CW\*(C`rc\*(C'\fR file available to Windows.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-i\fR \fIfilename\fR" 4
+.IX Item "-i filename"
+.PD 0
+.IP "\fB\-\-input\fR \fIfilename\fR" 4
+.IX Item "--input filename"
+.PD
+The name of the input file. If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument as the input file
+name. If there are no non-option arguments, then \fBwindres\fR will
+read from standard input. \fBwindres\fR can not read a \s-1COFF\s0 file from
+standard input.
+.IP "\fB\-o\fR \fIfilename\fR" 4
+.IX Item "-o filename"
+.PD 0
+.IP "\fB\-\-output\fR \fIfilename\fR" 4
+.IX Item "--output filename"
+.PD
+The name of the output file. If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument, after any used
+for the input file name, as the output file name. If there is no
+non-option argument, then \fBwindres\fR will write to standard output.
+\&\fBwindres\fR can not write a \s-1COFF\s0 file to standard output. Note,
+for compatibility with \fBrc\fR the option \fB\-fo\fR is also
+accepted, but its use is not recommended.
+.IP "\fB\-J\fR \fIformat\fR" 4
+.IX Item "-J format"
+.PD 0
+.IP "\fB\-\-input\-format\fR \fIformat\fR" 4
+.IX Item "--input-format format"
+.PD
+The input format to read. \fIformat\fR may be \fBres\fR, \fBrc\fR, or
+\&\fBcoff\fR. If no input format is specified, \fBwindres\fR will
+guess, as described above.
+.IP "\fB\-O\fR \fIformat\fR" 4
+.IX Item "-O format"
+.PD 0
+.IP "\fB\-\-output\-format\fR \fIformat\fR" 4
+.IX Item "--output-format format"
+.PD
+The output format to generate. \fIformat\fR may be \fBres\fR,
+\&\fBrc\fR, or \fBcoff\fR. If no output format is specified,
+\&\fBwindres\fR will guess, as described above.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a \s-1COFF\s0 file as input or output. This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets. Normally \fBwindres\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-\-preprocessor\fR \fIprogram\fR" 4
+.IX Item "--preprocessor program"
+When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through the C
+preprocessor first. This option may be used to specify the preprocessor
+to use, including any leading arguments. The default preprocessor
+argument is \f(CW\*(C`gcc \-E \-xc\-header \-DRC_INVOKED\*(C'\fR.
+.IP "\fB\-I\fR \fIdirectory\fR" 4
+.IX Item "-I directory"
+.PD 0
+.IP "\fB\-\-include\-dir\fR \fIdirectory\fR" 4
+.IX Item "--include-dir directory"
+.PD
+Specify an include directory to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fBwindres\fR will pass this to the preprocessor as an \fB\-I\fR
+option. \fBwindres\fR will also search this directory when looking for
+files named in the \f(CW\*(C`rc\*(C'\fR file. If the argument passed to this command
+matches any of the supported \fIformats\fR (as described in the \fB\-J\fR
+option), it will issue a deprecation warning, and behave just like the
+\&\fB\-J\fR option. New programs should not use this behaviour. If a
+directory happens to match a \fIformat\fR, simple prefix it with \fB./\fR
+to disable the backward compatibility.
+.IP "\fB\-D\fR \fItarget\fR" 4
+.IX Item "-D target"
+.PD 0
+.IP "\fB\-\-define\fR \fIsym\fR\fB[=\fR\fIval\fR\fB]\fR" 4
+.IX Item "--define sym[=val]"
+.PD
+Specify a \fB\-D\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-U\fR \fItarget\fR" 4
+.IX Item "-U target"
+.PD 0
+.IP "\fB\-\-undefine\fR \fIsym\fR" 4
+.IX Item "--undefine sym"
+.PD
+Specify a \fB\-U\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+Ignored for compatibility with rc.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Enable verbose mode. This tells you what the preprocessor is if you
+didn't specify one.
+.IP "\fB\-c\fR \fIval\fR" 4
+.IX Item "-c val"
+.PD 0
+.IP "\fB\-\-codepage\fR \fIval\fR" 4
+.IX Item "--codepage val"
+.PD
+Specify the default codepage to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal prefixed by \fB0x\fR or decimal
+codepage code. The valid range is from zero up to 0xffff, but the
+validity of the codepage is host and configuration dependent.
+.IP "\fB\-l\fR \fIval\fR" 4
+.IX Item "-l val"
+.PD 0
+.IP "\fB\-\-language\fR \fIval\fR" 4
+.IX Item "--language val"
+.PD
+Specify the default language to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal language code. The low eight bits are
+the language, and the high eight bits are the sublanguage.
+.IP "\fB\-\-use\-temp\-file\fR" 4
+.IX Item "--use-temp-file"
+Use a temporary file to instead of using popen to read the output of
+the preprocessor. Use this option if the popen implementation is buggy
+on the host (eg., certain non-English language versions of Windows 95 and
+Windows 98 are known to have buggy popen where the output will instead
+go the console).
+.IP "\fB\-\-no\-use\-temp\-file\fR" 4
+.IX Item "--no-use-temp-file"
+Use popen, not a temporary file, to read the output of the preprocessor.
+This is the default behaviour.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindres\fR.
+.IP "\fB\-\-yydebug\fR" 4
+.IX Item "--yydebug"
+If \fBwindres\fR is compiled with \f(CW\*(C`YYDEBUG\*(C'\fR defined as \f(CW1\fR,
+this will turn on parser debugging.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES
new file mode 100644
index 0000000..a882fa2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/SOURCES
@@ -0,0 +1,32 @@
+Sources for this prebuilt toolchain can be downloaded from Android Opensource
+Project GIT repository git://android.git.kernel.org/toolchain.
+
+gcc/ synced to
+ commit d9394eebf42aee6de56a970df3c56e67e5455545
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Wed Mar 16 14:47:42 2011 -0700
+
+binutils/ synced to
+ commit a4316ba2b7698435a68e9826cabd87ae43dad182
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Mon Feb 14 12:02:57 2011 -0800
+
+gdb/ synced to
+ commit 3954a66c7a6939e2c7bed362ec4df06b9f921bcf
+ Author: Jean-Baptiste Queru <jbq@google.com>
+ Date: Tue Jan 4 14:52:40 2011 -0800
+
+gmp/ synced to
+ commit 9fb242a79dd122d7fbf867daf5620dba6927bd2e
+ Author: Jing Yu <jingyu@google.com>
+ Date: Thu Nov 5 17:43:59 2009 -0800
+
+mpfr/ synced to
+ commit da6dfde986af1b56f0f41e9f5de61d093fa8af90
+ Author: Jing Yu <jingyu@google.com>
+ Date: Thu Nov 5 17:50:13 2009 -0800
+
+build/ synced to
+ commit b57a44f739598a081d8efed906a523b98ec45fef
+ Author: Doug Kwan <dougkwan@google.com>
+ Date: Wed Mar 23 11:53:17 2011 -0700
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ar b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/bin/ar
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h
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+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/armv7-a/thumb/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h
new file mode 100644
index 0000000..b8db76c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/c++config.h
@@ -0,0 +1,1431 @@
+// Predefined symbols and macros -*- C++ -*-
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file c++config.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CXX_CONFIG_H
+#define _GLIBCXX_CXX_CONFIG_H 1
+
+// The current version of the C++ library in compressed ISO date format.
+#define __GLIBCXX__ 20100121
+
+// Macros for visibility.
+// _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+// _GLIBCXX_VISIBILITY_ATTR
+# define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY 1
+
+#if _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY
+# define _GLIBCXX_VISIBILITY_ATTR(V) __attribute__ ((__visibility__ (#V)))
+#else
+# define _GLIBCXX_VISIBILITY_ATTR(V)
+#endif
+
+// Macros for deprecated.
+// _GLIBCXX_DEPRECATED
+// _GLIBCXX_DEPRECATED_ATTR
+#ifndef _GLIBCXX_DEPRECATED
+# define _GLIBCXX_DEPRECATED 1
+#endif
+
+#if defined(__DEPRECATED) && defined(__GXX_EXPERIMENTAL_CXX0X__)
+# define _GLIBCXX_DEPRECATED_ATTR __attribute__ ((__deprecated__))
+#else
+# define _GLIBCXX_DEPRECATED_ATTR
+#endif
+
+// Macros for activating various namespace association modes.
+// _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+// _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+// _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+
+// Guide to libstdc++ namespaces.
+/*
+ namespace std
+ {
+ namespace __debug { }
+ namespace __parallel { }
+ namespace __norm { } // __normative, __shadow, __replaced
+ namespace __cxx1998 { }
+
+ namespace tr1 { }
+ }
+*/
+#if __cplusplus
+
+#ifdef _GLIBCXX_DEBUG
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG 1
+#endif
+
+#ifdef _GLIBCXX_PARALLEL
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL 1
+#endif
+
+# define _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION 0
+
+// Defined if any namespace association modes are active.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL \
+ || _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+# define _GLIBCXX_USE_NAMESPACE_ASSOCIATION 1
+#endif
+
+// Macros for namespace scope. Either namespace std:: or the name
+// of some nested namespace within it.
+// _GLIBCXX_STD
+// _GLIBCXX_STD_D
+// _GLIBCXX_STD_P
+//
+// Macros for enclosing namespaces and possibly nested namespaces.
+// _GLIBCXX_BEGIN_NAMESPACE
+// _GLIBCXX_END_NAMESPACE
+// _GLIBCXX_BEGIN_NESTED_NAMESPACE
+// _GLIBCXX_END_NESTED_NAMESPACE
+#ifndef _GLIBCXX_USE_NAMESPACE_ASSOCIATION
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD std
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NESTED_NAMESPACE _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+#else
+
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION // && not anything else
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD _6
+# define _GLIBCXX_BEGIN_NAMESPACE(X) _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, _6)
+# define _GLIBCXX_END_NAMESPACE _GLIBCXX_END_NESTED_NAMESPACE
+# endif
+
+// debug
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG && !_GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P _GLIBCXX_STD
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && !_GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D _GLIBCXX_STD
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+// debug + parallel
+# if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL && _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+# define _GLIBCXX_STD_D __norm
+# define _GLIBCXX_STD_P __norm
+# define _GLIBCXX_STD __cxx1998
+# define _GLIBCXX_BEGIN_NAMESPACE(X) namespace X _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NAMESPACE }
+# define _GLIBCXX_EXTERN_TEMPLATE -1
+# endif
+
+# if __NO_INLINE__ && !__GXX_WEAK__
+# warning currently using namespace associated mode which may fail \
+ without inlining due to lack of weak symbols
+# endif
+
+# define _GLIBCXX_BEGIN_NESTED_NAMESPACE(X, Y) namespace X { namespace Y _GLIBCXX_VISIBILITY_ATTR(default) {
+# define _GLIBCXX_END_NESTED_NAMESPACE } }
+#endif
+
+// Namespace associations for debug mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_DEBUG
+namespace std
+{
+ namespace __norm { }
+ inline namespace __debug { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for parallel mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_PARALLEL
+namespace std
+{
+ namespace __norm { }
+ inline namespace __parallel { }
+ inline namespace __cxx1998 { }
+}
+#endif
+
+// Namespace associations for versioning mode.
+#if _GLIBCXX_NAMESPACE_ASSOCIATION_VERSION
+namespace std
+{
+ inline namespace _6 { }
+}
+
+namespace __gnu_cxx
+{
+ inline namespace _6 { }
+}
+
+namespace std
+{
+ namespace tr1
+ {
+ inline namespace _6 { }
+ }
+}
+#endif
+
+// XXX GLIBCXX_ABI Deprecated
+// Define if compatibility should be provided for -mlong-double-64
+#undef _GLIBCXX_LONG_DOUBLE_COMPAT
+
+// Namespace associations for long double 128 mode.
+#if defined _GLIBCXX_LONG_DOUBLE_COMPAT && defined __LONG_DOUBLE_128__
+namespace std
+{
+ inline namespace __gnu_cxx_ldbl128 { }
+}
+# define _GLIBCXX_LDBL_NAMESPACE __gnu_cxx_ldbl128::
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE namespace __gnu_cxx_ldbl128 {
+# define _GLIBCXX_END_LDBL_NAMESPACE }
+#else
+# define _GLIBCXX_LDBL_NAMESPACE
+# define _GLIBCXX_BEGIN_LDBL_NAMESPACE
+# define _GLIBCXX_END_LDBL_NAMESPACE
+#endif
+
+
+// Defines for C compatibility. In particular, define extern "C"
+// linkage only when using C++.
+# define _GLIBCXX_BEGIN_EXTERN_C extern "C" {
+# define _GLIBCXX_END_EXTERN_C }
+
+#else // !__cplusplus
+# undef _GLIBCXX_BEGIN_NAMESPACE
+# undef _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_NAMESPACE(X)
+# define _GLIBCXX_END_NAMESPACE
+# define _GLIBCXX_BEGIN_EXTERN_C
+# define _GLIBCXX_END_EXTERN_C
+#endif
+
+// First includes.
+
+// Pick up any OS-specific definitions.
+#include <bits/os_defines.h>
+
+// Pick up any CPU-specific definitions.
+#include <bits/cpu_defines.h>
+
+// Allow use of "export template." This is currently not a feature
+// that g++ supports.
+// #define _GLIBCXX_EXPORT_TEMPLATE 1
+
+// Allow use of the GNU syntax extension, "extern template." This
+// extension is fully documented in the g++ manual, but in a nutshell,
+// it inhibits all implicit instantiations and is used throughout the
+// library to avoid multiple weak definitions for required types that
+// are already explicitly instantiated in the library binary. This
+// substantially reduces the binary size of resulting executables.
+#ifndef _GLIBCXX_EXTERN_TEMPLATE
+# define _GLIBCXX_EXTERN_TEMPLATE 1
+#endif
+
+// Certain function definitions that are meant to be overridable from
+// user code are decorated with this macro. For some targets, this
+// macro causes these definitions to be weak.
+#ifndef _GLIBCXX_WEAK_DEFINITION
+# define _GLIBCXX_WEAK_DEFINITION
+#endif
+
+// Assert.
+// Avoid the use of assert, because we're trying to keep the <cassert>
+// include out of the mix.
+#if !defined(_GLIBCXX_DEBUG) && !defined(_GLIBCXX_PARALLEL)
+#define __glibcxx_assert(_Condition)
+#else
+_GLIBCXX_BEGIN_NAMESPACE(std)
+ // Avoid the use of assert, because we're trying to keep the <cassert>
+ // include out of the mix.
+ inline void
+ __replacement_assert(const char* __file, int __line,
+ const char* __function, const char* __condition)
+ {
+ __builtin_printf("%s:%d: %s: Assertion '%s' failed.\n", __file, __line,
+ __function, __condition);
+ __builtin_abort();
+ }
+_GLIBCXX_END_NAMESPACE
+
+#define __glibcxx_assert(_Condition) \
+ do \
+ { \
+ if (! (_Condition)) \
+ std::__replacement_assert(__FILE__, __LINE__, \
+ __PRETTY_FUNCTION__, #_Condition); \
+ } while (false)
+#endif
+
+// The remainder of the prewritten config is automatic; all the
+// user hooks are listed above.
+
+// Create a boolean flag to be used to determine if --fast-math is set.
+#ifdef __FAST_MATH__
+# define _GLIBCXX_FAST_MATH 1
+#else
+# define _GLIBCXX_FAST_MATH 0
+#endif
+
+// This marks string literals in header files to be extracted for eventual
+// translation. It is primarily used for messages in thrown exceptions; see
+// src/functexcept.cc. We use __N because the more traditional _N is used
+// for something else under certain OSes (see BADNAMES).
+#define __N(msgid) (msgid)
+
+// For example, <windows.h> is known to #define min and max as macros...
+#undef min
+#undef max
+
+// End of prewritten config; the discovered settings follow.
+/* config.h. Generated by configure. */
+/* config.h.in. Generated from configure.ac by autoheader. */
+
+/* Define to 1 if you have the `acosf' function. */
+#define _GLIBCXX_HAVE_ACOSF 1
+
+/* Define to 1 if you have the `acosl' function. */
+/* #undef _GLIBCXX_HAVE_ACOSL */
+
+/* Define to 1 if you have the `asinf' function. */
+#define _GLIBCXX_HAVE_ASINF 1
+
+/* Define to 1 if you have the `asinl' function. */
+/* #undef _GLIBCXX_HAVE_ASINL */
+
+/* Define to 1 if the target assembler supports .symver directive. */
+#define _GLIBCXX_HAVE_AS_SYMVER_DIRECTIVE 1
+
+/* Define to 1 if you have the `atan2f' function. */
+#define _GLIBCXX_HAVE_ATAN2F 1
+
+/* Define to 1 if you have the `atan2l' function. */
+/* #undef _GLIBCXX_HAVE_ATAN2L */
+
+/* Define to 1 if you have the `atanf' function. */
+#define _GLIBCXX_HAVE_ATANF 1
+
+/* Define to 1 if you have the `atanl' function. */
+/* #undef _GLIBCXX_HAVE_ATANL */
+
+/* Define to 1 if the target assembler supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_CC_TLS */
+
+/* Define to 1 if you have the `ceilf' function. */
+#define _GLIBCXX_HAVE_CEILF 1
+
+/* Define to 1 if you have the `ceill' function. */
+#define _GLIBCXX_HAVE_CEILL 1
+
+/* Define to 1 if you have the <complex.h> header file. */
+/* #undef _GLIBCXX_HAVE_COMPLEX_H */
+
+/* Define to 1 if you have the `cosf' function. */
+#define _GLIBCXX_HAVE_COSF 1
+
+/* Define to 1 if you have the `coshf' function. */
+#define _GLIBCXX_HAVE_COSHF 1
+
+/* Define to 1 if you have the `coshl' function. */
+/* #undef _GLIBCXX_HAVE_COSHL */
+
+/* Define to 1 if you have the `cosl' function. */
+/* #undef _GLIBCXX_HAVE_COSL */
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define _GLIBCXX_HAVE_DLFCN_H 1
+
+/* Define if EBADMSG exists. */
+#define _GLIBCXX_HAVE_EBADMSG 1
+
+/* Define if ECANCELED exists. */
+#define _GLIBCXX_HAVE_ECANCELED 1
+
+/* Define if EIDRM exists. */
+#define _GLIBCXX_HAVE_EIDRM 1
+
+/* Define to 1 if you have the <endian.h> header file. */
+#define _GLIBCXX_HAVE_ENDIAN_H 1
+
+/* Define if ENODATA exists. */
+#define _GLIBCXX_HAVE_ENODATA 1
+
+/* Define if ENOLINK exists. */
+#define _GLIBCXX_HAVE_ENOLINK 1
+
+/* Define if ENOSR exists. */
+#define _GLIBCXX_HAVE_ENOSR 1
+
+/* Define if ENOSTR exists. */
+#define _GLIBCXX_HAVE_ENOSTR 1
+
+/* Define if ENOTRECOVERABLE exists. */
+#define _GLIBCXX_HAVE_ENOTRECOVERABLE 1
+
+/* Define if ENOTSUP exists. */
+#define _GLIBCXX_HAVE_ENOTSUP 1
+
+/* Define if EOVERFLOW exists. */
+#define _GLIBCXX_HAVE_EOVERFLOW 1
+
+/* Define if EOWNERDEAD exists. */
+#define _GLIBCXX_HAVE_EOWNERDEAD 1
+
+/* Define if EPROTO exists. */
+#define _GLIBCXX_HAVE_EPROTO 1
+
+/* Define if ETIME exists. */
+#define _GLIBCXX_HAVE_ETIME 1
+
+/* Define if ETXTBSY exists. */
+#define _GLIBCXX_HAVE_ETXTBSY 1
+
+/* Define to 1 if you have the `expf' function. */
+#define _GLIBCXX_HAVE_EXPF 1
+
+/* Define to 1 if you have the `expl' function. */
+/* #undef _GLIBCXX_HAVE_EXPL */
+
+/* Define to 1 if you have the `fabsf' function. */
+#define _GLIBCXX_HAVE_FABSF 1
+
+/* Define to 1 if you have the `fabsl' function. */
+#define _GLIBCXX_HAVE_FABSL 1
+
+/* Define to 1 if you have the <fenv.h> header file. */
+#define _GLIBCXX_HAVE_FENV_H 1
+
+/* Define to 1 if you have the `finite' function. */
+#define _GLIBCXX_HAVE_FINITE 1
+
+/* Define to 1 if you have the `finitef' function. */
+#define _GLIBCXX_HAVE_FINITEF 1
+
+/* Define to 1 if you have the `finitel' function. */
+/* #undef _GLIBCXX_HAVE_FINITEL */
+
+/* Define to 1 if you have the <float.h> header file. */
+#define _GLIBCXX_HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `floorf' function. */
+#define _GLIBCXX_HAVE_FLOORF 1
+
+/* Define to 1 if you have the `floorl' function. */
+#define _GLIBCXX_HAVE_FLOORL 1
+
+/* Define to 1 if you have the `fmodf' function. */
+#define _GLIBCXX_HAVE_FMODF 1
+
+/* Define to 1 if you have the `fmodl' function. */
+/* #undef _GLIBCXX_HAVE_FMODL */
+
+/* Define to 1 if you have the `fpclass' function. */
+/* #undef _GLIBCXX_HAVE_FPCLASS */
+
+/* Define to 1 if you have the <fp.h> header file. */
+/* #undef _GLIBCXX_HAVE_FP_H */
+
+/* Define to 1 if you have the `frexpf' function. */
+#define _GLIBCXX_HAVE_FREXPF 1
+
+/* Define to 1 if you have the `frexpl' function. */
+/* #undef _GLIBCXX_HAVE_FREXPL */
+
+/* Define if _Unwind_GetIPInfo is available. */
+#define _GLIBCXX_HAVE_GETIPINFO 1
+
+/* Define if gthr-default.h exists (meaning that threading support is
+ enabled). */
+#define _GLIBCXX_HAVE_GTHR_DEFAULT 1
+
+/* Define to 1 if you have the `hypot' function. */
+#define _GLIBCXX_HAVE_HYPOT 1
+
+/* Define to 1 if you have the `hypotf' function. */
+#define _GLIBCXX_HAVE_HYPOTF 1
+
+/* Define to 1 if you have the `hypotl' function. */
+/* #undef _GLIBCXX_HAVE_HYPOTL */
+
+/* Define if you have the iconv() function. */
+/* #undef _GLIBCXX_HAVE_ICONV */
+
+/* Define to 1 if you have the <ieeefp.h> header file. */
+/* #undef _GLIBCXX_HAVE_IEEEFP_H */
+
+/* Define if int64_t is available in <stdint.h>. */
+#define _GLIBCXX_HAVE_INT64_T 1
+
+/* Define if int64_t is a long. */
+/* #undef _GLIBCXX_HAVE_INT64_T_LONG */
+
+/* Define if int64_t is a long long. */
+#define _GLIBCXX_HAVE_INT64_T_LONG_LONG 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define _GLIBCXX_HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `isinf' function. */
+/* #undef _GLIBCXX_HAVE_ISINF */
+
+/* Define to 1 if you have the `isinff' function. */
+/* #undef _GLIBCXX_HAVE_ISINFF */
+
+/* Define to 1 if you have the `isinfl' function. */
+/* #undef _GLIBCXX_HAVE_ISINFL */
+
+/* Define to 1 if you have the `isnan' function. */
+#define _GLIBCXX_HAVE_ISNAN 1
+
+/* Define to 1 if you have the `isnanf' function. */
+#define _GLIBCXX_HAVE_ISNANF 1
+
+/* Define to 1 if you have the `isnanl' function. */
+/* #undef _GLIBCXX_HAVE_ISNANL */
+
+/* Defined if iswblank exists. */
+/* #undef _GLIBCXX_HAVE_ISWBLANK */
+
+/* Define if LC_MESSAGES is available in <locale.h>. */
+#define _GLIBCXX_HAVE_LC_MESSAGES 1
+
+/* Define to 1 if you have the `ldexpf' function. */
+#define _GLIBCXX_HAVE_LDEXPF 1
+
+/* Define to 1 if you have the `ldexpl' function. */
+#define _GLIBCXX_HAVE_LDEXPL 1
+
+/* Define to 1 if you have the <libintl.h> header file. */
+/* #undef _GLIBCXX_HAVE_LIBINTL_H */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_AS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_DATA */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_FSIZE */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_RSS */
+
+/* Only used in build directory testsuite_hooks.h. */
+/* #undef _GLIBCXX_HAVE_LIMIT_VMEM */
+
+/* Define if futex syscall is available. */
+/* #undef _GLIBCXX_HAVE_LINUX_FUTEX */
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define _GLIBCXX_HAVE_LOCALE_H 1
+
+/* Define to 1 if you have the `log10f' function. */
+#define _GLIBCXX_HAVE_LOG10F 1
+
+/* Define to 1 if you have the `log10l' function. */
+/* #undef _GLIBCXX_HAVE_LOG10L */
+
+/* Define to 1 if you have the `logf' function. */
+#define _GLIBCXX_HAVE_LOGF 1
+
+/* Define to 1 if you have the `logl' function. */
+/* #undef _GLIBCXX_HAVE_LOGL */
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_ENDIAN_H */
+
+/* Define to 1 if you have the <machine/param.h> header file. */
+/* #undef _GLIBCXX_HAVE_MACHINE_PARAM_H */
+
+/* Define if mbstate_t exists in wchar.h. */
+#define _GLIBCXX_HAVE_MBSTATE_T 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define _GLIBCXX_HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `modf' function. */
+#define _GLIBCXX_HAVE_MODF 1
+
+/* Define to 1 if you have the `modff' function. */
+#define _GLIBCXX_HAVE_MODFF 1
+
+/* Define to 1 if you have the `modfl' function. */
+/* #undef _GLIBCXX_HAVE_MODFL */
+
+/* Define to 1 if you have the <nan.h> header file. */
+/* #undef _GLIBCXX_HAVE_NAN_H */
+
+/* Define if poll is available in <poll.h>. */
+#define _GLIBCXX_HAVE_POLL 1
+
+/* Define to 1 if you have the `powf' function. */
+#define _GLIBCXX_HAVE_POWF 1
+
+/* Define to 1 if you have the `powl' function. */
+/* #undef _GLIBCXX_HAVE_POWL */
+
+/* Define to 1 if you have the `qfpclass' function. */
+/* #undef _GLIBCXX_HAVE_QFPCLASS */
+
+/* Define to 1 if you have the `setenv' function. */
+/* #undef _GLIBCXX_HAVE_SETENV */
+
+/* Define to 1 if you have the `sincos' function. */
+#define _GLIBCXX_HAVE_SINCOS 1
+
+/* Define to 1 if you have the `sincosf' function. */
+#define _GLIBCXX_HAVE_SINCOSF 1
+
+/* Define to 1 if you have the `sincosl' function. */
+#define _GLIBCXX_HAVE_SINCOSL 1
+
+/* Define to 1 if you have the `sinf' function. */
+#define _GLIBCXX_HAVE_SINF 1
+
+/* Define to 1 if you have the `sinhf' function. */
+#define _GLIBCXX_HAVE_SINHF 1
+
+/* Define to 1 if you have the `sinhl' function. */
+/* #undef _GLIBCXX_HAVE_SINHL */
+
+/* Define to 1 if you have the `sinl' function. */
+/* #undef _GLIBCXX_HAVE_SINL */
+
+/* Define to 1 if you have the `sqrtf' function. */
+#define _GLIBCXX_HAVE_SQRTF 1
+
+/* Define to 1 if you have the `sqrtl' function. */
+/* #undef _GLIBCXX_HAVE_SQRTL */
+
+/* Define to 1 if you have the <stdbool.h> header file. */
+#define _GLIBCXX_HAVE_STDBOOL_H 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define _GLIBCXX_HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define _GLIBCXX_HAVE_STDLIB_H 1
+
+/* Define if strerror_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRERROR_L */
+
+/* Define if strerror_r is available in <string.h>. */
+#define _GLIBCXX_HAVE_STRERROR_R 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define _GLIBCXX_HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define _GLIBCXX_HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strtof' function. */
+/* #undef _GLIBCXX_HAVE_STRTOF */
+
+/* Define to 1 if you have the `strtold' function. */
+/* #undef _GLIBCXX_HAVE_STRTOLD */
+
+/* Define if strxfrm_l is available in <string.h>. */
+/* #undef _GLIBCXX_HAVE_STRXFRM_L */
+
+/* Define to 1 if you have the <sys/filio.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_FILIO_H */
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IOCTL_H 1
+
+/* Define to 1 if you have the <sys/ipc.h> header file. */
+#define _GLIBCXX_HAVE_SYS_IPC_H 1
+
+/* Define to 1 if you have the <sys/isa_defs.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_ISA_DEFS_H */
+
+/* Define to 1 if you have the <sys/machine.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_MACHINE_H */
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define _GLIBCXX_HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define _GLIBCXX_HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/sem.h> header file. */
+/* #undef _GLIBCXX_HAVE_SYS_SEM_H */
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define _GLIBCXX_HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define _GLIBCXX_HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <sys/uio.h> header file. */
+#define _GLIBCXX_HAVE_SYS_UIO_H 1
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+/* #undef _GLIBCXX_HAVE_S_IFREG */
+
+/* Define if S_IFREG is available in <sys/stat.h>. */
+#define _GLIBCXX_HAVE_S_ISREG 1
+
+/* Define to 1 if you have the `tanf' function. */
+#define _GLIBCXX_HAVE_TANF 1
+
+/* Define to 1 if you have the `tanhf' function. */
+#define _GLIBCXX_HAVE_TANHF 1
+
+/* Define to 1 if you have the `tanhl' function. */
+/* #undef _GLIBCXX_HAVE_TANHL */
+
+/* Define to 1 if you have the `tanl' function. */
+/* #undef _GLIBCXX_HAVE_TANL */
+
+/* Define to 1 if you have the <tgmath.h> header file. */
+/* #undef _GLIBCXX_HAVE_TGMATH_H */
+
+/* Define to 1 if the target supports thread-local storage. */
+/* #undef _GLIBCXX_HAVE_TLS */
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define _GLIBCXX_HAVE_UNISTD_H 1
+
+/* Defined if vfwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VFWSCANF */
+
+/* Defined if vswscanf exists. */
+/* #undef _GLIBCXX_HAVE_VSWSCANF */
+
+/* Defined if vwscanf exists. */
+/* #undef _GLIBCXX_HAVE_VWSCANF */
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#define _GLIBCXX_HAVE_WCHAR_H 1
+
+/* Defined if wcstof exists. */
+/* #undef _GLIBCXX_HAVE_WCSTOF */
+
+/* Define to 1 if you have the <wctype.h> header file. */
+#define _GLIBCXX_HAVE_WCTYPE_H 1
+
+/* Define if writev is available in <sys/uio.h>. */
+#define _GLIBCXX_HAVE_WRITEV 1
+
+/* Define to 1 if you have the `_acosf' function. */
+/* #undef _GLIBCXX_HAVE__ACOSF */
+
+/* Define to 1 if you have the `_acosl' function. */
+/* #undef _GLIBCXX_HAVE__ACOSL */
+
+/* Define to 1 if you have the `_asinf' function. */
+/* #undef _GLIBCXX_HAVE__ASINF */
+
+/* Define to 1 if you have the `_asinl' function. */
+/* #undef _GLIBCXX_HAVE__ASINL */
+
+/* Define to 1 if you have the `_atan2f' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2F */
+
+/* Define to 1 if you have the `_atan2l' function. */
+/* #undef _GLIBCXX_HAVE__ATAN2L */
+
+/* Define to 1 if you have the `_atanf' function. */
+/* #undef _GLIBCXX_HAVE__ATANF */
+
+/* Define to 1 if you have the `_atanl' function. */
+/* #undef _GLIBCXX_HAVE__ATANL */
+
+/* Define to 1 if you have the `_ceilf' function. */
+/* #undef _GLIBCXX_HAVE__CEILF */
+
+/* Define to 1 if you have the `_ceill' function. */
+/* #undef _GLIBCXX_HAVE__CEILL */
+
+/* Define to 1 if you have the `_cosf' function. */
+/* #undef _GLIBCXX_HAVE__COSF */
+
+/* Define to 1 if you have the `_coshf' function. */
+/* #undef _GLIBCXX_HAVE__COSHF */
+
+/* Define to 1 if you have the `_coshl' function. */
+/* #undef _GLIBCXX_HAVE__COSHL */
+
+/* Define to 1 if you have the `_cosl' function. */
+/* #undef _GLIBCXX_HAVE__COSL */
+
+/* Define to 1 if you have the `_expf' function. */
+/* #undef _GLIBCXX_HAVE__EXPF */
+
+/* Define to 1 if you have the `_expl' function. */
+/* #undef _GLIBCXX_HAVE__EXPL */
+
+/* Define to 1 if you have the `_fabsf' function. */
+/* #undef _GLIBCXX_HAVE__FABSF */
+
+/* Define to 1 if you have the `_fabsl' function. */
+/* #undef _GLIBCXX_HAVE__FABSL */
+
+/* Define to 1 if you have the `_finite' function. */
+/* #undef _GLIBCXX_HAVE__FINITE */
+
+/* Define to 1 if you have the `_finitef' function. */
+/* #undef _GLIBCXX_HAVE__FINITEF */
+
+/* Define to 1 if you have the `_finitel' function. */
+/* #undef _GLIBCXX_HAVE__FINITEL */
+
+/* Define to 1 if you have the `_floorf' function. */
+/* #undef _GLIBCXX_HAVE__FLOORF */
+
+/* Define to 1 if you have the `_floorl' function. */
+/* #undef _GLIBCXX_HAVE__FLOORL */
+
+/* Define to 1 if you have the `_fmodf' function. */
+/* #undef _GLIBCXX_HAVE__FMODF */
+
+/* Define to 1 if you have the `_fmodl' function. */
+/* #undef _GLIBCXX_HAVE__FMODL */
+
+/* Define to 1 if you have the `_fpclass' function. */
+/* #undef _GLIBCXX_HAVE__FPCLASS */
+
+/* Define to 1 if you have the `_frexpf' function. */
+/* #undef _GLIBCXX_HAVE__FREXPF */
+
+/* Define to 1 if you have the `_frexpl' function. */
+/* #undef _GLIBCXX_HAVE__FREXPL */
+
+/* Define to 1 if you have the `_hypot' function. */
+/* #undef _GLIBCXX_HAVE__HYPOT */
+
+/* Define to 1 if you have the `_hypotf' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTF */
+
+/* Define to 1 if you have the `_hypotl' function. */
+/* #undef _GLIBCXX_HAVE__HYPOTL */
+
+/* Define to 1 if you have the `_isinf' function. */
+/* #undef _GLIBCXX_HAVE__ISINF */
+
+/* Define to 1 if you have the `_isinff' function. */
+/* #undef _GLIBCXX_HAVE__ISINFF */
+
+/* Define to 1 if you have the `_isinfl' function. */
+/* #undef _GLIBCXX_HAVE__ISINFL */
+
+/* Define to 1 if you have the `_isnan' function. */
+/* #undef _GLIBCXX_HAVE__ISNAN */
+
+/* Define to 1 if you have the `_isnanf' function. */
+/* #undef _GLIBCXX_HAVE__ISNANF */
+
+/* Define to 1 if you have the `_isnanl' function. */
+/* #undef _GLIBCXX_HAVE__ISNANL */
+
+/* Define to 1 if you have the `_ldexpf' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPF */
+
+/* Define to 1 if you have the `_ldexpl' function. */
+/* #undef _GLIBCXX_HAVE__LDEXPL */
+
+/* Define to 1 if you have the `_log10f' function. */
+/* #undef _GLIBCXX_HAVE__LOG10F */
+
+/* Define to 1 if you have the `_log10l' function. */
+/* #undef _GLIBCXX_HAVE__LOG10L */
+
+/* Define to 1 if you have the `_logf' function. */
+/* #undef _GLIBCXX_HAVE__LOGF */
+
+/* Define to 1 if you have the `_logl' function. */
+/* #undef _GLIBCXX_HAVE__LOGL */
+
+/* Define to 1 if you have the `_modf' function. */
+/* #undef _GLIBCXX_HAVE__MODF */
+
+/* Define to 1 if you have the `_modff' function. */
+/* #undef _GLIBCXX_HAVE__MODFF */
+
+/* Define to 1 if you have the `_modfl' function. */
+/* #undef _GLIBCXX_HAVE__MODFL */
+
+/* Define to 1 if you have the `_powf' function. */
+/* #undef _GLIBCXX_HAVE__POWF */
+
+/* Define to 1 if you have the `_powl' function. */
+/* #undef _GLIBCXX_HAVE__POWL */
+
+/* Define to 1 if you have the `_qfpclass' function. */
+/* #undef _GLIBCXX_HAVE__QFPCLASS */
+
+/* Define to 1 if you have the `_sincos' function. */
+/* #undef _GLIBCXX_HAVE__SINCOS */
+
+/* Define to 1 if you have the `_sincosf' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSF */
+
+/* Define to 1 if you have the `_sincosl' function. */
+/* #undef _GLIBCXX_HAVE__SINCOSL */
+
+/* Define to 1 if you have the `_sinf' function. */
+/* #undef _GLIBCXX_HAVE__SINF */
+
+/* Define to 1 if you have the `_sinhf' function. */
+/* #undef _GLIBCXX_HAVE__SINHF */
+
+/* Define to 1 if you have the `_sinhl' function. */
+/* #undef _GLIBCXX_HAVE__SINHL */
+
+/* Define to 1 if you have the `_sinl' function. */
+/* #undef _GLIBCXX_HAVE__SINL */
+
+/* Define to 1 if you have the `_sqrtf' function. */
+/* #undef _GLIBCXX_HAVE__SQRTF */
+
+/* Define to 1 if you have the `_sqrtl' function. */
+/* #undef _GLIBCXX_HAVE__SQRTL */
+
+/* Define to 1 if you have the `_tanf' function. */
+/* #undef _GLIBCXX_HAVE__TANF */
+
+/* Define to 1 if you have the `_tanhf' function. */
+/* #undef _GLIBCXX_HAVE__TANHF */
+
+/* Define to 1 if you have the `_tanhl' function. */
+/* #undef _GLIBCXX_HAVE__TANHL */
+
+/* Define to 1 if you have the `_tanl' function. */
+/* #undef _GLIBCXX_HAVE__TANL */
+
+/* Define as const if the declaration of iconv() needs const. */
+/* #undef _GLIBCXX_ICONV_CONST */
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+/* #undef _GLIBCXX_PACKAGE */
+
+/* Define to the address where bug reports for this package should be sent. */
+#define _GLIBCXX_PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define _GLIBCXX_PACKAGE_NAME "package-unused"
+
+/* Define to the full name and version of this package. */
+#define _GLIBCXX_PACKAGE_STRING "package-unused version-unused"
+
+/* Define to the one symbol short name of this package. */
+#define _GLIBCXX_PACKAGE_TARNAME "libstdc++"
+
+/* Define to the version of this package. */
+#define _GLIBCXX_PACKAGE__GLIBCXX_VERSION "version-unused"
+
+/* The size of a `char', as computed by sizeof. */
+/* #undef SIZEOF_CHAR */
+
+/* The size of a `int', as computed by sizeof. */
+/* #undef SIZEOF_INT */
+
+/* The size of a `long', as computed by sizeof. */
+/* #undef SIZEOF_LONG */
+
+/* The size of a `short', as computed by sizeof. */
+/* #undef SIZEOF_SHORT */
+
+/* The size of a `void *', as computed by sizeof. */
+/* #undef SIZEOF_VOID_P */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+/* #undef _GLIBCXX_VERSION */
+
+/* Define if builtin atomic operations for bool are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_1 */
+
+/* Define if builtin atomic operations for short are supported on this host.
+ */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_2 */
+
+/* Define if builtin atomic operations for int are supported on this host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_4 */
+
+/* Define if builtin atomic operations for long long are supported on this
+ host. */
+/* #undef _GLIBCXX_ATOMIC_BUILTINS_8 */
+
+/* Define to use concept checking code from the boost libraries. */
+/* #undef _GLIBCXX_CONCEPT_CHECKS */
+
+/* Define if a fully dynamic basic_string is wanted. */
+/* #undef _GLIBCXX_FULLY_DYNAMIC_STRING */
+
+/* Define if gthreads library is available. */
+/* #undef _GLIBCXX_HAS_GTHREADS */
+
+/* Define to 1 if a full hosted library is built, or 0 if freestanding. */
+#define _GLIBCXX_HOSTED 0
+
+/* Define if compatibility should be provided for -mlong-double-64. */
+
+/* Define if ptrdiff_t is int. */
+#define _GLIBCXX_PTRDIFF_T_IS_INT 1
+
+/* Define if using setrlimit to set resource limits during "make check" */
+/* #undef _GLIBCXX_RES_LIMITS */
+
+/* Define if size_t is unsigned int. */
+#define _GLIBCXX_SIZE_T_IS_UINT 1
+
+/* Define if the compiler is configured for setjmp/longjmp exceptions. */
+/* #undef _GLIBCXX_SJLJ_EXCEPTIONS */
+
+/* Define if EOF == -1, SEEK_CUR == 1, SEEK_END == 2. */
+#define _GLIBCXX_STDIO_MACROS 1
+
+/* Define to use symbol versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER */
+
+/* Define to use darwin versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_DARWIN */
+
+/* Define to use GNU versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU */
+
+/* Define to use GNU namespace versioning in the shared library. */
+/* #undef _GLIBCXX_SYMVER_GNU_NAMESPACE */
+
+/* Define if C99 functions or macros from <wchar.h>, <math.h>, <complex.h>,
+ <stdio.h>, and <stdlib.h> can be used or exposed. */
+/* #undef _GLIBCXX_USE_C99 */
+
+/* Define if C99 functions in <complex.h> should be used in <complex>. Using
+ compiler builtins for these functions requires corresponding C99 library
+ functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX */
+
+/* Define if C99 functions in <complex.h> should be used in <tr1/complex>.
+ Using compiler builtins for these functions requires corresponding C99
+ library functions to be present. */
+/* #undef _GLIBCXX_USE_C99_COMPLEX_TR1 */
+
+/* Define if C99 functions in <ctype.h> should be imported in <tr1/cctype> in
+ namespace std::tr1. */
+#define _GLIBCXX_USE_C99_CTYPE_TR1 1
+
+/* Define if C99 functions in <fenv.h> should be imported in <tr1/cfenv> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_FENV_TR1 */
+
+/* Define if C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_TR1 */
+
+/* Define if wchar_t C99 functions in <inttypes.h> should be imported in
+ <tr1/cinttypes> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_INTTYPES_WCHAR_T_TR1 */
+
+/* Define if C99 functions or macros in <math.h> should be imported in <cmath>
+ in namespace std. */
+/* #undef _GLIBCXX_USE_C99_MATH */
+
+/* Define if C99 functions or macros in <math.h> should be imported in
+ <tr1/cmath> in namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_MATH_TR1 */
+
+/* Define if C99 types in <stdint.h> should be imported in <tr1/cstdint> in
+ namespace std::tr1. */
+/* #undef _GLIBCXX_USE_C99_STDINT_TR1 */
+
+/* Defined if clock_gettime has monotonic clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_MONOTONIC */
+
+/* Defined if clock_gettime has realtime clock support. */
+/* #undef _GLIBCXX_USE_CLOCK_REALTIME */
+
+/* Defined if gettimeofday is available. */
+#define _GLIBCXX_USE_GETTIMEOFDAY 1
+
+/* Define if LFS support is available. */
+/* #undef _GLIBCXX_USE_LFS */
+
+/* Define if code specialized for long long should be used. */
+#define _GLIBCXX_USE_LONG_LONG 1
+
+/* Defined if nanosleep is available. */
+/* #undef _GLIBCXX_USE_NANOSLEEP */
+
+/* Define if NLS translations are to be used. */
+/* #undef _GLIBCXX_USE_NLS */
+
+/* Define if /dev/random and /dev/urandom are available for the random_device
+ of TR1 (Chapter 5.1). */
+#define _GLIBCXX_USE_RANDOM_TR1 1
+
+/* Defined if sched_yield is available. */
+/* #undef _GLIBCXX_USE_SCHED_YIELD */
+
+/* Define if code specialized for wchar_t should be used. */
+/* #undef _GLIBCXX_USE_WCHAR_T */
+
+#if defined (_GLIBCXX_HAVE__ACOSF) && ! defined (_GLIBCXX_HAVE_ACOSF)
+# define _GLIBCXX_HAVE_ACOSF 1
+# define acosf _acosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ACOSL) && ! defined (_GLIBCXX_HAVE_ACOSL)
+# define _GLIBCXX_HAVE_ACOSL 1
+# define acosl _acosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINF) && ! defined (_GLIBCXX_HAVE_ASINF)
+# define _GLIBCXX_HAVE_ASINF 1
+# define asinf _asinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ASINL) && ! defined (_GLIBCXX_HAVE_ASINL)
+# define _GLIBCXX_HAVE_ASINL 1
+# define asinl _asinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2F) && ! defined (_GLIBCXX_HAVE_ATAN2F)
+# define _GLIBCXX_HAVE_ATAN2F 1
+# define atan2f _atan2f
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATAN2L) && ! defined (_GLIBCXX_HAVE_ATAN2L)
+# define _GLIBCXX_HAVE_ATAN2L 1
+# define atan2l _atan2l
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANF) && ! defined (_GLIBCXX_HAVE_ATANF)
+# define _GLIBCXX_HAVE_ATANF 1
+# define atanf _atanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ATANL) && ! defined (_GLIBCXX_HAVE_ATANL)
+# define _GLIBCXX_HAVE_ATANL 1
+# define atanl _atanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILF) && ! defined (_GLIBCXX_HAVE_CEILF)
+# define _GLIBCXX_HAVE_CEILF 1
+# define ceilf _ceilf
+#endif
+
+#if defined (_GLIBCXX_HAVE__CEILL) && ! defined (_GLIBCXX_HAVE_CEILL)
+# define _GLIBCXX_HAVE_CEILL 1
+# define ceill _ceill
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSF) && ! defined (_GLIBCXX_HAVE_COSF)
+# define _GLIBCXX_HAVE_COSF 1
+# define cosf _cosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHF) && ! defined (_GLIBCXX_HAVE_COSHF)
+# define _GLIBCXX_HAVE_COSHF 1
+# define coshf _coshf
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSHL) && ! defined (_GLIBCXX_HAVE_COSHL)
+# define _GLIBCXX_HAVE_COSHL 1
+# define coshl _coshl
+#endif
+
+#if defined (_GLIBCXX_HAVE__COSL) && ! defined (_GLIBCXX_HAVE_COSL)
+# define _GLIBCXX_HAVE_COSL 1
+# define cosl _cosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPF) && ! defined (_GLIBCXX_HAVE_EXPF)
+# define _GLIBCXX_HAVE_EXPF 1
+# define expf _expf
+#endif
+
+#if defined (_GLIBCXX_HAVE__EXPL) && ! defined (_GLIBCXX_HAVE_EXPL)
+# define _GLIBCXX_HAVE_EXPL 1
+# define expl _expl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSF) && ! defined (_GLIBCXX_HAVE_FABSF)
+# define _GLIBCXX_HAVE_FABSF 1
+# define fabsf _fabsf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FABSL) && ! defined (_GLIBCXX_HAVE_FABSL)
+# define _GLIBCXX_HAVE_FABSL 1
+# define fabsl _fabsl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITE) && ! defined (_GLIBCXX_HAVE_FINITE)
+# define _GLIBCXX_HAVE_FINITE 1
+# define finite _finite
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEF) && ! defined (_GLIBCXX_HAVE_FINITEF)
+# define _GLIBCXX_HAVE_FINITEF 1
+# define finitef _finitef
+#endif
+
+#if defined (_GLIBCXX_HAVE__FINITEL) && ! defined (_GLIBCXX_HAVE_FINITEL)
+# define _GLIBCXX_HAVE_FINITEL 1
+# define finitel _finitel
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORF) && ! defined (_GLIBCXX_HAVE_FLOORF)
+# define _GLIBCXX_HAVE_FLOORF 1
+# define floorf _floorf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FLOORL) && ! defined (_GLIBCXX_HAVE_FLOORL)
+# define _GLIBCXX_HAVE_FLOORL 1
+# define floorl _floorl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODF) && ! defined (_GLIBCXX_HAVE_FMODF)
+# define _GLIBCXX_HAVE_FMODF 1
+# define fmodf _fmodf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FMODL) && ! defined (_GLIBCXX_HAVE_FMODL)
+# define _GLIBCXX_HAVE_FMODL 1
+# define fmodl _fmodl
+#endif
+
+#if defined (_GLIBCXX_HAVE__FPCLASS) && ! defined (_GLIBCXX_HAVE_FPCLASS)
+# define _GLIBCXX_HAVE_FPCLASS 1
+# define fpclass _fpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPF) && ! defined (_GLIBCXX_HAVE_FREXPF)
+# define _GLIBCXX_HAVE_FREXPF 1
+# define frexpf _frexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__FREXPL) && ! defined (_GLIBCXX_HAVE_FREXPL)
+# define _GLIBCXX_HAVE_FREXPL 1
+# define frexpl _frexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOT) && ! defined (_GLIBCXX_HAVE_HYPOT)
+# define _GLIBCXX_HAVE_HYPOT 1
+# define hypot _hypot
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTF) && ! defined (_GLIBCXX_HAVE_HYPOTF)
+# define _GLIBCXX_HAVE_HYPOTF 1
+# define hypotf _hypotf
+#endif
+
+#if defined (_GLIBCXX_HAVE__HYPOTL) && ! defined (_GLIBCXX_HAVE_HYPOTL)
+# define _GLIBCXX_HAVE_HYPOTL 1
+# define hypotl _hypotl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINF) && ! defined (_GLIBCXX_HAVE_ISINF)
+# define _GLIBCXX_HAVE_ISINF 1
+# define isinf _isinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFF) && ! defined (_GLIBCXX_HAVE_ISINFF)
+# define _GLIBCXX_HAVE_ISINFF 1
+# define isinff _isinff
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISINFL) && ! defined (_GLIBCXX_HAVE_ISINFL)
+# define _GLIBCXX_HAVE_ISINFL 1
+# define isinfl _isinfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNAN) && ! defined (_GLIBCXX_HAVE_ISNAN)
+# define _GLIBCXX_HAVE_ISNAN 1
+# define isnan _isnan
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANF) && ! defined (_GLIBCXX_HAVE_ISNANF)
+# define _GLIBCXX_HAVE_ISNANF 1
+# define isnanf _isnanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__ISNANL) && ! defined (_GLIBCXX_HAVE_ISNANL)
+# define _GLIBCXX_HAVE_ISNANL 1
+# define isnanl _isnanl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPF) && ! defined (_GLIBCXX_HAVE_LDEXPF)
+# define _GLIBCXX_HAVE_LDEXPF 1
+# define ldexpf _ldexpf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LDEXPL) && ! defined (_GLIBCXX_HAVE_LDEXPL)
+# define _GLIBCXX_HAVE_LDEXPL 1
+# define ldexpl _ldexpl
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10F) && ! defined (_GLIBCXX_HAVE_LOG10F)
+# define _GLIBCXX_HAVE_LOG10F 1
+# define log10f _log10f
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOG10L) && ! defined (_GLIBCXX_HAVE_LOG10L)
+# define _GLIBCXX_HAVE_LOG10L 1
+# define log10l _log10l
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGF) && ! defined (_GLIBCXX_HAVE_LOGF)
+# define _GLIBCXX_HAVE_LOGF 1
+# define logf _logf
+#endif
+
+#if defined (_GLIBCXX_HAVE__LOGL) && ! defined (_GLIBCXX_HAVE_LOGL)
+# define _GLIBCXX_HAVE_LOGL 1
+# define logl _logl
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODF) && ! defined (_GLIBCXX_HAVE_MODF)
+# define _GLIBCXX_HAVE_MODF 1
+# define modf _modf
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFF) && ! defined (_GLIBCXX_HAVE_MODFF)
+# define _GLIBCXX_HAVE_MODFF 1
+# define modff _modff
+#endif
+
+#if defined (_GLIBCXX_HAVE__MODFL) && ! defined (_GLIBCXX_HAVE_MODFL)
+# define _GLIBCXX_HAVE_MODFL 1
+# define modfl _modfl
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWF) && ! defined (_GLIBCXX_HAVE_POWF)
+# define _GLIBCXX_HAVE_POWF 1
+# define powf _powf
+#endif
+
+#if defined (_GLIBCXX_HAVE__POWL) && ! defined (_GLIBCXX_HAVE_POWL)
+# define _GLIBCXX_HAVE_POWL 1
+# define powl _powl
+#endif
+
+#if defined (_GLIBCXX_HAVE__QFPCLASS) && ! defined (_GLIBCXX_HAVE_QFPCLASS)
+# define _GLIBCXX_HAVE_QFPCLASS 1
+# define qfpclass _qfpclass
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOS) && ! defined (_GLIBCXX_HAVE_SINCOS)
+# define _GLIBCXX_HAVE_SINCOS 1
+# define sincos _sincos
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSF) && ! defined (_GLIBCXX_HAVE_SINCOSF)
+# define _GLIBCXX_HAVE_SINCOSF 1
+# define sincosf _sincosf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINCOSL) && ! defined (_GLIBCXX_HAVE_SINCOSL)
+# define _GLIBCXX_HAVE_SINCOSL 1
+# define sincosl _sincosl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINF) && ! defined (_GLIBCXX_HAVE_SINF)
+# define _GLIBCXX_HAVE_SINF 1
+# define sinf _sinf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHF) && ! defined (_GLIBCXX_HAVE_SINHF)
+# define _GLIBCXX_HAVE_SINHF 1
+# define sinhf _sinhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINHL) && ! defined (_GLIBCXX_HAVE_SINHL)
+# define _GLIBCXX_HAVE_SINHL 1
+# define sinhl _sinhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SINL) && ! defined (_GLIBCXX_HAVE_SINL)
+# define _GLIBCXX_HAVE_SINL 1
+# define sinl _sinl
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTF) && ! defined (_GLIBCXX_HAVE_SQRTF)
+# define _GLIBCXX_HAVE_SQRTF 1
+# define sqrtf _sqrtf
+#endif
+
+#if defined (_GLIBCXX_HAVE__SQRTL) && ! defined (_GLIBCXX_HAVE_SQRTL)
+# define _GLIBCXX_HAVE_SQRTL 1
+# define sqrtl _sqrtl
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOF) && ! defined (_GLIBCXX_HAVE_STRTOF)
+# define _GLIBCXX_HAVE_STRTOF 1
+# define strtof _strtof
+#endif
+
+#if defined (_GLIBCXX_HAVE__STRTOLD) && ! defined (_GLIBCXX_HAVE_STRTOLD)
+# define _GLIBCXX_HAVE_STRTOLD 1
+# define strtold _strtold
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANF) && ! defined (_GLIBCXX_HAVE_TANF)
+# define _GLIBCXX_HAVE_TANF 1
+# define tanf _tanf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHF) && ! defined (_GLIBCXX_HAVE_TANHF)
+# define _GLIBCXX_HAVE_TANHF 1
+# define tanhf _tanhf
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANHL) && ! defined (_GLIBCXX_HAVE_TANHL)
+# define _GLIBCXX_HAVE_TANHL 1
+# define tanhl _tanhl
+#endif
+
+#if defined (_GLIBCXX_HAVE__TANL) && ! defined (_GLIBCXX_HAVE_TANL)
+# define _GLIBCXX_HAVE_TANL 1
+# define tanl _tanl
+#endif
+
+#endif // _GLIBCXX_CXX_CONFIG_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h
new file mode 100644
index 0000000..faf97e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/cpu_defines.h
@@ -0,0 +1,33 @@
+// Specific definitions for generic platforms -*- C++ -*-
+
+// Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cpu_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_CPU_DEFINES
+#define _GLIBCXX_CPU_DEFINES 1
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h
new file mode 100644
index 0000000..832592a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/arm-linux-androideabi/thumb/bits/os_defines.h
@@ -0,0 +1,36 @@
+// Specific definitions for Bionic -*- C++ -*-
+
+// Copyright (C) 2010 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file os_defines.h
+ * This is an internal header file, included by other library headers.
+ * You should not attempt to use it directly.
+ */
+
+#ifndef _GLIBCXX_OS_DEFINES
+#define _GLIBCXX_OS_DEFINES 1
+
+// System-specific #define, typedefs, corrections, etc, go here. This
+// file will come before all others.
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg
new file mode 100644
index 0000000..73327b1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdarg
@@ -0,0 +1,60 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/cstdarg
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stdarg.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 20.4.6 C library
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <stdarg.h>
+
+#ifndef _GLIBCXX_CSTDARG
+#define _GLIBCXX_CSTDARG 1
+
+// Adhere to section 17.4.1.2 clause 5 of ISO 14882:1998
+#ifndef va_end
+#define va_end(ap) va_end (ap)
+#endif
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::va_list;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef
new file mode 100644
index 0000000..bb16e75
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstddef
@@ -0,0 +1,56 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file cstddef
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stddef.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 18.1 Types
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <stddef.h>
+
+#ifndef _GLIBCXX_CSTDDEF
+#define _GLIBCXX_CSTDDEF 1
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::ptrdiff_t;
+ using ::size_t;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib
new file mode 100644
index 0000000..a29031e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cstdlib
@@ -0,0 +1,242 @@
+// -*- C++ -*- forwarding header.
+
+// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+// 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/cstdlib
+ * This is a Standard C++ Library file. You should @c #include this file
+ * in your programs, rather than any of the "*.h" implementation files.
+ *
+ * This is the C++ version of the Standard C Library header @c stdlib.h,
+ * and its contents are (mostly) the same as that header, but are all
+ * contained in the namespace @c std (except for names which are defined
+ * as macros in C).
+ */
+
+//
+// ISO C++ 14882: 20.4.6 C library
+//
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+#include <cstddef>
+
+#ifndef _GLIBCXX_CSTDLIB
+#define _GLIBCXX_CSTDLIB 1
+
+#if !_GLIBCXX_HOSTED
+// The C standard does not require a freestanding implementation to
+// provide <stdlib.h>. However, the C++ standard does still require
+// <cstdlib> -- but only the functionality mentioned in
+// [lib.support.start.term].
+
+#define EXIT_SUCCESS 0
+#define EXIT_FAILURE 1
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ extern "C" void abort(void);
+ extern "C" int atexit(void (*)());
+ extern "C" void exit(int);
+
+_GLIBCXX_END_NAMESPACE
+
+#else
+
+#include <stdlib.h>
+
+// Get rid of those macros defined in <stdlib.h> in lieu of real functions.
+#undef abort
+#undef abs
+#undef atexit
+#undef atof
+#undef atoi
+#undef atol
+#undef bsearch
+#undef calloc
+#undef div
+#undef exit
+#undef free
+#undef getenv
+#undef labs
+#undef ldiv
+#undef malloc
+#undef mblen
+#undef mbstowcs
+#undef mbtowc
+#undef qsort
+#undef rand
+#undef realloc
+#undef srand
+#undef strtod
+#undef strtol
+#undef strtoul
+#undef system
+#undef wcstombs
+#undef wctomb
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ using ::div_t;
+ using ::ldiv_t;
+
+ using ::abort;
+ using ::abs;
+ using ::atexit;
+ using ::atof;
+ using ::atoi;
+ using ::atol;
+ using ::bsearch;
+ using ::calloc;
+ using ::div;
+ using ::exit;
+ using ::free;
+ using ::getenv;
+ using ::labs;
+ using ::ldiv;
+ using ::malloc;
+#ifdef _GLIBCXX_HAVE_MBSTATE_T
+ using ::mblen;
+ using ::mbstowcs;
+ using ::mbtowc;
+#endif // _GLIBCXX_HAVE_MBSTATE_T
+ using ::qsort;
+ using ::rand;
+ using ::realloc;
+ using ::srand;
+ using ::strtod;
+ using ::strtol;
+ using ::strtoul;
+ using ::system;
+#ifdef _GLIBCXX_USE_WCHAR_T
+ using ::wcstombs;
+ using ::wctomb;
+#endif // _GLIBCXX_USE_WCHAR_T
+
+ inline long
+ abs(long __i) { return labs(__i); }
+
+ inline ldiv_t
+ div(long __i, long __j) { return ldiv(__i, __j); }
+
+_GLIBCXX_END_NAMESPACE
+
+#if _GLIBCXX_USE_C99
+
+#undef _Exit
+#undef llabs
+#undef lldiv
+#undef atoll
+#undef strtoll
+#undef strtoull
+#undef strtof
+#undef strtold
+
+_GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx)
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::lldiv_t;
+#endif
+#if _GLIBCXX_USE_C99_CHECK || _GLIBCXX_USE_C99_DYNAMIC
+ extern "C" void (_Exit)(int);
+#endif
+#if !_GLIBCXX_USE_C99_DYNAMIC
+ using ::_Exit;
+#endif
+
+ inline long long
+ abs(long long __x) { return __x >= 0 ? __x : -__x; }
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::llabs;
+
+ inline lldiv_t
+ div(long long __n, long long __d)
+ { lldiv_t __q; __q.quot = __n / __d; __q.rem = __n % __d; return __q; }
+
+ using ::lldiv;
+#endif
+
+#if _GLIBCXX_USE_C99_LONG_LONG_CHECK || _GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ extern "C" long long int (atoll)(const char *);
+ extern "C" long long int
+ (strtoll)(const char * restrict, char ** restrict, int);
+ extern "C" unsigned long long int
+ (strtoull)(const char * restrict, char ** restrict, int);
+#endif
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::atoll;
+ using ::strtoll;
+ using ::strtoull;
+#endif
+ using ::strtof;
+ using ::strtold;
+
+_GLIBCXX_END_NAMESPACE
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::__gnu_cxx::lldiv_t;
+#endif
+ using ::__gnu_cxx::_Exit;
+ using ::__gnu_cxx::abs;
+#if !_GLIBCXX_USE_C99_LONG_LONG_DYNAMIC
+ using ::__gnu_cxx::llabs;
+ using ::__gnu_cxx::div;
+ using ::__gnu_cxx::lldiv;
+#endif
+ using ::__gnu_cxx::atoll;
+ using ::__gnu_cxx::strtof;
+ using ::__gnu_cxx::strtoll;
+ using ::__gnu_cxx::strtoull;
+ using ::__gnu_cxx::strtold;
+
+_GLIBCXX_END_NAMESPACE
+
+#endif // _GLIBCXX_USE_C99
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+# if defined(_GLIBCXX_INCLUDE_AS_TR1)
+# error C++0x header cannot be included from TR1 header
+# endif
+# if defined(_GLIBCXX_INCLUDE_AS_CXX0X)
+# include <tr1_impl/cstdlib>
+# else
+# define _GLIBCXX_INCLUDE_AS_CXX0X
+# define _GLIBCXX_BEGIN_NAMESPACE_TR1
+# define _GLIBCXX_END_NAMESPACE_TR1
+# define _GLIBCXX_TR1
+# include <tr1_impl/cstdlib>
+# undef _GLIBCXX_TR1
+# undef _GLIBCXX_END_NAMESPACE_TR1
+# undef _GLIBCXX_BEGIN_NAMESPACE_TR1
+# undef _GLIBCXX_INCLUDE_AS_CXX0X
+# endif
+#endif
+
+#endif // !_GLIBCXX_HOSTED
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h
new file mode 100644
index 0000000..e0cf1d0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi-forced.h
@@ -0,0 +1,51 @@
+// cxxabi.h subset for inclusion by other library headers -*- C++ -*-
+
+// Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+#ifndef _CXXABI_FORCED_H
+#define _CXXABI_FORCED_H 1
+
+#pragma GCC visibility push(default)
+
+#ifdef __cplusplus
+namespace __cxxabiv1
+{
+ /**
+ * @brief Thrown as part of forced unwinding.
+ * @ingroup exceptions
+ *
+ * A magic placeholder class that can be caught by reference to
+ * recognize forced unwinding.
+ */
+ class __forced_unwind
+ {
+ virtual ~__forced_unwind() throw();
+ virtual void __pure_dummy() = 0; // prevent catch by value
+ };
+}
+#endif // __cplusplus
+
+#pragma GCC visibility pop
+
+#endif // __CXXABI_FORCED_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h
new file mode 100644
index 0000000..bfdd8e5
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/cxxabi.h
@@ -0,0 +1,608 @@
+// new abi support -*- C++ -*-
+
+// Copyright (C) 2000, 2002, 2003, 2004, 2006, 2007, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+// Written by Nathan Sidwell, Codesourcery LLC, <nathan@codesourcery.com>
+
+/* This file declares the new abi entry points into the runtime. It is not
+ normally necessary for user programs to include this header, or use the
+ entry points directly. However, this header is available should that be
+ needed.
+
+ Some of the entry points are intended for both C and C++, thus this header
+ is includable from both C and C++. Though the C++ specific parts are not
+ available in C, naturally enough. */
+
+/** @file cxxabi.h
+ * The header provides an interface to the C++ ABI.
+ */
+
+#ifndef _CXXABI_H
+#define _CXXABI_H 1
+
+#pragma GCC visibility push(default)
+
+#include <stddef.h>
+#include <bits/cxxabi_tweaks.h>
+#include <cxxabi-forced.h>
+
+#ifdef __cplusplus
+#define _GLIBCXX_NOTHROW throw()
+#else
+#define _GLIBCXX_NOTHROW __attribute__((nothrow))
+#endif
+
+#ifdef __cplusplus
+namespace __cxxabiv1
+{
+ extern "C"
+ {
+#endif
+
+ typedef __cxa_cdtor_return_type (*__cxa_cdtor_type)(void *);
+
+ // Allocate array.
+ void*
+ __cxa_vec_new(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor);
+
+ void*
+ __cxa_vec_new2(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor, void *(*__alloc) (size_t),
+ void (*__dealloc) (void*));
+
+ void*
+ __cxa_vec_new3(size_t __element_count, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor, void *(*__alloc) (size_t),
+ void (*__dealloc) (void*, size_t));
+
+ // Construct array.
+ __cxa_vec_ctor_return_type
+ __cxa_vec_ctor(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type constructor,
+ __cxa_cdtor_type destructor);
+
+ __cxa_vec_ctor_return_type
+ __cxa_vec_cctor(void* dest_array, void* src_array, size_t element_count,
+ size_t element_size,
+ __cxa_cdtor_return_type (*constructor) (void*, void*),
+ __cxa_cdtor_type destructor);
+
+ // Destruct array.
+ void
+ __cxa_vec_dtor(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type destructor);
+
+ void
+ __cxa_vec_cleanup(void* __array_address, size_t __element_count,
+ size_t __element_size, __cxa_cdtor_type destructor);
+
+ // Destruct and release array.
+ void
+ __cxa_vec_delete(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor);
+
+ void
+ __cxa_vec_delete2(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor,
+ void (*__dealloc) (void*));
+
+ void
+ __cxa_vec_delete3(void* __array_address, size_t __element_size,
+ size_t __padding_size, __cxa_cdtor_type destructor,
+ void (*__dealloc) (void*, size_t));
+
+ int
+ __cxa_guard_acquire(__guard*);
+
+ void
+ __cxa_guard_release(__guard*);
+
+ void
+ __cxa_guard_abort(__guard*);
+
+ // Pure virtual functions.
+ void
+ __cxa_pure_virtual(void);
+
+ // Exception handling.
+ void
+ __cxa_bad_cast();
+
+ void
+ __cxa_bad_typeid();
+
+ // DSO destruction.
+ int
+ __cxa_atexit(void (*)(void*), void*, void*) _GLIBCXX_NOTHROW;
+
+ int
+ __cxa_finalize(void*);
+
+
+ /**
+ * @brief Demangling routine.
+ * ABI-mandated entry point in the C++ runtime library for demangling.
+ *
+ * @param __mangled_name A NUL-terminated character string
+ * containing the name to be demangled.
+ *
+ * @param __output_buffer A region of memory, allocated with
+ * malloc, of @a *__length bytes, into which the demangled name is
+ * stored. If @a __output_buffer is not long enough, it is
+ * expanded using realloc. @a __output_buffer may instead be NULL;
+ * in that case, the demangled name is placed in a region of memory
+ * allocated with malloc.
+ *
+ * @param __length If @a __length is non-NULL, the length of the
+ * buffer containing the demangled name is placed in @a *__length.
+ *
+ * @param __status @a *__status is set to one of the following values:
+ * 0: The demangling operation succeeded.
+ * -1: A memory allocation failiure occurred.
+ * -2: @a mangled_name is not a valid name under the C++ ABI mangling rules.
+ * -3: One of the arguments is invalid.
+ *
+ * @return A pointer to the start of the NUL-terminated demangled
+ * name, or NULL if the demangling fails. The caller is
+ * responsible for deallocating this memory using @c free.
+ *
+ * The demangling is performed using the C++ ABI mangling rules,
+ * with GNU extensions. For example, this function is used in
+ * __gnu_cxx::__verbose_terminate_handler.
+ *
+ * See http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt12ch39.html
+ * for other examples of use.
+ *
+ * @note The same demangling functionality is available via
+ * libiberty (@c <libiberty/demangle.h> and @c libiberty.a) in GCC
+ * 3.1 and later, but that requires explicit installation (@c
+ * --enable-install-libiberty) and uses a different API, although
+ * the ABI is unchanged.
+ */
+ char*
+ __cxa_demangle(const char* __mangled_name, char* __output_buffer,
+ size_t* __length, int* __status);
+#ifdef __cplusplus
+ }
+} // namespace __cxxabiv1
+#endif
+
+#ifdef __cplusplus
+
+#include <typeinfo>
+
+namespace __cxxabiv1
+{
+ // Type information for int, float etc.
+ class __fundamental_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __fundamental_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__fundamental_type_info();
+ };
+
+ // Type information for array objects.
+ class __array_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __array_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__array_type_info();
+ };
+
+ // Type information for functions (both member and non-member).
+ class __function_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __function_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__function_type_info();
+
+ protected:
+ // Implementation defined member function.
+ virtual bool
+ __is_function_p() const;
+ };
+
+ // Type information for enumerations.
+ class __enum_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __enum_type_info(const char* __n) : std::type_info(__n) { }
+
+ virtual
+ ~__enum_type_info();
+ };
+
+ // Common type information for simple pointers and pointers to member.
+ class __pbase_type_info : public std::type_info
+ {
+ public:
+ unsigned int __flags; // Qualification of the target object.
+ const std::type_info* __pointee; // Type of pointed to object.
+
+ explicit
+ __pbase_type_info(const char* __n, int __quals,
+ const std::type_info* __type)
+ : std::type_info(__n), __flags(__quals), __pointee(__type)
+ { }
+
+ virtual
+ ~__pbase_type_info();
+
+ // Implementation defined type.
+ enum __masks
+ {
+ __const_mask = 0x1,
+ __volatile_mask = 0x2,
+ __restrict_mask = 0x4,
+ __incomplete_mask = 0x8,
+ __incomplete_class_mask = 0x10
+ };
+
+ protected:
+ __pbase_type_info(const __pbase_type_info&);
+
+ __pbase_type_info&
+ operator=(const __pbase_type_info&);
+
+ // Implementation defined member functions.
+ virtual bool
+ __do_catch(const std::type_info* __thr_type, void** __thr_obj,
+ unsigned int __outer) const;
+
+ inline virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ // Type information for simple pointers.
+ class __pointer_type_info : public __pbase_type_info
+ {
+ public:
+ explicit
+ __pointer_type_info(const char* __n, int __quals,
+ const std::type_info* __type)
+ : __pbase_type_info (__n, __quals, __type) { }
+
+
+ virtual
+ ~__pointer_type_info();
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __is_pointer_p() const;
+
+ virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ class __class_type_info;
+
+ // Type information for a pointer to member variable.
+ class __pointer_to_member_type_info : public __pbase_type_info
+ {
+ public:
+ __class_type_info* __context; // Class of the member.
+
+ explicit
+ __pointer_to_member_type_info(const char* __n, int __quals,
+ const std::type_info* __type,
+ __class_type_info* __klass)
+ : __pbase_type_info(__n, __quals, __type), __context(__klass) { }
+
+ virtual
+ ~__pointer_to_member_type_info();
+
+ protected:
+ __pointer_to_member_type_info(const __pointer_to_member_type_info&);
+
+ __pointer_to_member_type_info&
+ operator=(const __pointer_to_member_type_info&);
+
+ // Implementation defined member function.
+ virtual bool
+ __pointer_catch(const __pbase_type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+ };
+
+ // Helper class for __vmi_class_type.
+ class __base_class_type_info
+ {
+ public:
+ const __class_type_info* __base_type; // Base class type.
+ long __offset_flags; // Offset and info.
+
+ enum __offset_flags_masks
+ {
+ __virtual_mask = 0x1,
+ __public_mask = 0x2,
+ __hwm_bit = 2,
+ __offset_shift = 8 // Bits to shift offset.
+ };
+
+ // Implementation defined member functions.
+ bool
+ __is_virtual_p() const
+ { return __offset_flags & __virtual_mask; }
+
+ bool
+ __is_public_p() const
+ { return __offset_flags & __public_mask; }
+
+ ptrdiff_t
+ __offset() const
+ {
+ // This shift, being of a signed type, is implementation
+ // defined. GCC implements such shifts as arithmetic, which is
+ // what we want.
+ return static_cast<ptrdiff_t>(__offset_flags) >> __offset_shift;
+ }
+ };
+
+ // Type information for a class.
+ class __class_type_info : public std::type_info
+ {
+ public:
+ explicit
+ __class_type_info (const char *__n) : type_info(__n) { }
+
+ virtual
+ ~__class_type_info ();
+
+ // Implementation defined types.
+ // The type sub_kind tells us about how a base object is contained
+ // within a derived object. We often do this lazily, hence the
+ // UNKNOWN value. At other times we may use NOT_CONTAINED to mean
+ // not publicly contained.
+ enum __sub_kind
+ {
+ // We have no idea.
+ __unknown = 0,
+
+ // Not contained within us (in some circumstances this might
+ // mean not contained publicly)
+ __not_contained,
+
+ // Contained ambiguously.
+ __contained_ambig,
+
+ // Via a virtual path.
+ __contained_virtual_mask = __base_class_type_info::__virtual_mask,
+
+ // Via a public path.
+ __contained_public_mask = __base_class_type_info::__public_mask,
+
+ // Contained within us.
+ __contained_mask = 1 << __base_class_type_info::__hwm_bit,
+
+ __contained_private = __contained_mask,
+ __contained_public = __contained_mask | __contained_public_mask
+ };
+
+ struct __upcast_result;
+ struct __dyncast_result;
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __do_upcast(const __class_type_info* __dst_type, void**__obj_ptr) const;
+
+ virtual bool
+ __do_catch(const type_info* __thr_type, void** __thr_obj,
+ unsigned __outer) const;
+
+ public:
+ // Helper for upcast. See if DST is us, or one of our bases.
+ // Return false if not found, true if found.
+ virtual bool
+ __do_upcast(const __class_type_info* __dst, const void* __obj,
+ __upcast_result& __restrict __result) const;
+
+ // Indicate whether SRC_PTR of type SRC_TYPE is contained publicly
+ // within OBJ_PTR. OBJ_PTR points to a base object of our type,
+ // which is the destination type. SRC2DST indicates how SRC
+ // objects might be contained within this type. If SRC_PTR is one
+ // of our SRC_TYPE bases, indicate the virtuality. Returns
+ // not_contained for non containment or private containment.
+ inline __sub_kind
+ __find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+
+ // Helper for dynamic cast. ACCESS_PATH gives the access from the
+ // most derived object to this base. DST_TYPE indicates the
+ // desired type we want. OBJ_PTR points to a base of our type
+ // within the complete object. SRC_TYPE indicates the static type
+ // started from and SRC_PTR points to that base within the most
+ // derived object. Fill in RESULT with what we find. Return true
+ // if we have located an ambiguous match.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ // Helper for find_public_subobj. SRC2DST indicates how SRC_TYPE
+ // bases are inherited by the type started from -- which is not
+ // necessarily the current type. The current type will be a base
+ // of the destination type. OBJ_PTR points to the current base.
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+ };
+
+ // Type information for a class with a single non-virtual base.
+ class __si_class_type_info : public __class_type_info
+ {
+ public:
+ const __class_type_info* __base_type;
+
+ explicit
+ __si_class_type_info(const char *__n, const __class_type_info *__base)
+ : __class_type_info(__n), __base_type(__base) { }
+
+ virtual
+ ~__si_class_type_info();
+
+ protected:
+ __si_class_type_info(const __si_class_type_info&);
+
+ __si_class_type_info&
+ operator=(const __si_class_type_info&);
+
+ // Implementation defined member functions.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __sub_ptr) const;
+
+ virtual bool
+ __do_upcast(const __class_type_info*__dst, const void*__obj,
+ __upcast_result& __restrict __result) const;
+ };
+
+ // Type information for a class with multiple and/or virtual bases.
+ class __vmi_class_type_info : public __class_type_info
+ {
+ public:
+ unsigned int __flags; // Details about the class hierarchy.
+ unsigned int __base_count; // Number of direct bases.
+
+ // The array of bases uses the trailing array struct hack so this
+ // class is not constructable with a normal constructor. It is
+ // internally generated by the compiler.
+ __base_class_type_info __base_info[1]; // Array of bases.
+
+ explicit
+ __vmi_class_type_info(const char* __n, int ___flags)
+ : __class_type_info(__n), __flags(___flags), __base_count(0) { }
+
+ virtual
+ ~__vmi_class_type_info();
+
+ // Implementation defined types.
+ enum __flags_masks
+ {
+ __non_diamond_repeat_mask = 0x1, // Distinct instance of repeated base.
+ __diamond_shaped_mask = 0x2, // Diamond shaped multiple inheritance.
+ __flags_unknown_mask = 0x10
+ };
+
+ protected:
+ // Implementation defined member functions.
+ virtual bool
+ __do_dyncast(ptrdiff_t __src2dst, __sub_kind __access_path,
+ const __class_type_info* __dst_type, const void* __obj_ptr,
+ const __class_type_info* __src_type, const void* __src_ptr,
+ __dyncast_result& __result) const;
+
+ virtual __sub_kind
+ __do_find_public_src(ptrdiff_t __src2dst, const void* __obj_ptr,
+ const __class_type_info* __src_type,
+ const void* __src_ptr) const;
+
+ virtual bool
+ __do_upcast(const __class_type_info* __dst, const void* __obj,
+ __upcast_result& __restrict __result) const;
+ };
+
+ // Dynamic cast runtime.
+ // src2dst has the following possible values
+ // >-1: src_type is a unique public non-virtual base of dst_type
+ // dst_ptr + src2dst == src_ptr
+ // -1: unspecified relationship
+ // -2: src_type is not a public base of dst_type
+ // -3: src_type is a multiple public non-virtual base of dst_type
+ extern "C" void*
+ __dynamic_cast(const void* __src_ptr, // Starting object.
+ const __class_type_info* __src_type, // Static type of object.
+ const __class_type_info* __dst_type, // Desired target type.
+ ptrdiff_t __src2dst); // How src and dst are related.
+
+
+ // Returns the type_info for the currently handled exception [15.3/8], or
+ // null if there is none.
+ extern "C" std::type_info*
+ __cxa_current_exception_type();
+
+ // A magic placeholder class that can be caught by reference
+ // to recognize foreign exceptions.
+ class __foreign_exception
+ {
+ virtual ~__foreign_exception() throw();
+ virtual void __pure_dummy() = 0; // prevent catch by value
+ };
+
+} // namespace __cxxabiv1
+
+/** @namespace abi
+ * @brief The cross-vendor C++ Application Binary Interface. A
+ * namespace alias to __cxxabiv1, but user programs should use the
+ * alias `abi'.
+ *
+ * A brief overview of an ABI is given in the libstdc++ FAQ, question
+ * 5.8 (you may have a copy of the FAQ locally, or you can view the online
+ * version at http://gcc.gnu.org/onlinedocs/libstdc++/faq/index.html#5_8).
+ *
+ * GCC subscribes to a cross-vendor ABI for C++, sometimes
+ * called the IA64 ABI because it happens to be the native ABI for that
+ * platform. It is summarized at http://www.codesourcery.com/cxx-abi/
+ * along with the current specification.
+ *
+ * For users of GCC greater than or equal to 3.x, entry points are
+ * available in <cxxabi.h>, which notes, <em>"It is not normally
+ * necessary for user programs to include this header, or use the
+ * entry points directly. However, this header is available should
+ * that be needed."</em>
+*/
+namespace abi = __cxxabiv1;
+
+#endif // __cplusplus
+
+#pragma GCC visibility pop
+
+#endif // __CXXABI_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception
new file mode 100644
index 0000000..7fa929b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception
@@ -0,0 +1,151 @@
+// Exception Handling support header for -*- C++ -*-
+
+// Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+// 2004, 2005, 2006, 2007, 2008, 2009
+// Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file exception
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef __EXCEPTION__
+#define __EXCEPTION__
+
+#pragma GCC visibility push(default)
+
+#include <bits/c++config.h>
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @defgroup exceptions Exceptions
+ * @ingroup diagnostics
+ *
+ * Classes and functions for reporting errors via exception classes.
+ * @{
+ */
+
+ /**
+ * @brief Base class for all library exceptions.
+ *
+ * This is the base class for all exceptions thrown by the standard
+ * library, and by certain language expressions. You are free to derive
+ * your own %exception classes, or use a different hierarchy, or to
+ * throw non-class data (e.g., fundamental types).
+ */
+ class exception
+ {
+ public:
+ exception() throw() { }
+ virtual ~exception() throw();
+
+ /** Returns a C-style character string describing the general cause
+ * of the current error. */
+ virtual const char* what() const throw();
+ };
+
+ /** If an %exception is thrown which is not listed in a function's
+ * %exception specification, one of these may be thrown. */
+ class bad_exception : public exception
+ {
+ public:
+ bad_exception() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_exception() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ /// If you write a replacement %terminate handler, it must be of this type.
+ typedef void (*terminate_handler) ();
+
+ /// If you write a replacement %unexpected handler, it must be of this type.
+ typedef void (*unexpected_handler) ();
+
+ /// Takes a new handler function as an argument, returns the old function.
+ terminate_handler set_terminate(terminate_handler) throw();
+
+ /** The runtime will call this function if %exception handling must be
+ * abandoned for any reason. It can also be called by the user. */
+ void terminate() __attribute__ ((__noreturn__));
+
+ /// Takes a new handler function as an argument, returns the old function.
+ unexpected_handler set_unexpected(unexpected_handler) throw();
+
+ /** The runtime will call this function if an %exception is thrown which
+ * violates the function's %exception specification. */
+ void unexpected() __attribute__ ((__noreturn__));
+
+ /** [18.6.4]/1: "Returns true after completing evaluation of a
+ * throw-expression until either completing initialization of the
+ * exception-declaration in the matching handler or entering @c unexpected()
+ * due to the throw; or after entering @c terminate() for any reason
+ * other than an explicit call to @c terminate(). [Note: This includes
+ * stack unwinding [15.2]. end note]"
+ *
+ * 2: "When @c uncaught_exception() is true, throwing an %exception can
+ * result in a call of @c terminate() (15.5.1)."
+ */
+ bool uncaught_exception() throw();
+
+ // @} group exceptions
+} // namespace std
+
+_GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx)
+
+ /**
+ * @brief A replacement for the standard terminate_handler which
+ * prints more information about the terminating exception (if any)
+ * on stderr.
+ *
+ * @ingroup exceptions
+ *
+ * Call
+ * @code
+ * std::set_terminate(__gnu_cxx::__verbose_terminate_handler)
+ * @endcode
+ * to use. For more info, see
+ * http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt02ch06s02.html
+ *
+ * In 3.4 and later, this is on by default.
+ */
+ void __verbose_terminate_handler();
+
+_GLIBCXX_END_NAMESPACE
+
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#if (defined(__GXX_EXPERIMENTAL_CXX0X__) \
+ && defined(_GLIBCXX_ATOMIC_BUILTINS_4))
+#include <exception_ptr.h>
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h
new file mode 100644
index 0000000..951d96f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_defines.h
@@ -0,0 +1,49 @@
+// -fno-exceptions Support -*- C++ -*-
+
+// Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2006, 2007, 2008, 2009
+// Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+//
+// ISO C++ 14882: 19.1 Exception classes
+//
+
+/** @file exception_defines.h
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef _EXCEPTION_DEFINES_H
+#define _EXCEPTION_DEFINES_H 1
+
+#ifndef __EXCEPTIONS
+// Iff -fno-exceptions, transform error handling code to work without it.
+# define __try if (true)
+# define __catch(X) if (false)
+# define __throw_exception_again
+#else
+// Else proceed normally.
+# define __try try
+# define __catch(X) catch(X)
+# define __throw_exception_again throw
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h
new file mode 100644
index 0000000..b24ec21
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/exception_ptr.h
@@ -0,0 +1,171 @@
+// Exception Handling support header (exception_ptr class) for -*- C++ -*-
+
+// Copyright (C) 2008, 2009 Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file exception_ptr.h
+ * This is an internal header file, included by other headers and the
+ * implementation. You should not attempt to use it directly.
+ */
+
+#ifndef _EXCEPTION_PTR_H
+#define _EXCEPTION_PTR_H
+
+#pragma GCC visibility push(default)
+
+#include <bits/c++config.h>
+#include <exception_defines.h>
+
+#if !defined(_GLIBCXX_ATOMIC_BUILTINS_4)
+# error This platform does not support exception propagation.
+#endif
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @addtogroup exceptions
+ * @{
+ */
+
+ // Hide the free operators from other types
+ namespace __exception_ptr
+ {
+ /**
+ * @brief An opaque pointer to an arbitrary exception.
+ */
+ class exception_ptr;
+ }
+
+ using __exception_ptr::exception_ptr;
+
+ /** Obtain an %exception_ptr to the currently handled exception. If there
+ * is none, or the currently handled exception is foreign, return the null
+ * value.
+ */
+ exception_ptr current_exception() throw();
+
+ /// Throw the object pointed to by the %exception_ptr.
+ void rethrow_exception(exception_ptr) __attribute__ ((__noreturn__));
+
+ /// Obtain an %exception_ptr pointing to a copy of the supplied object.
+ template<typename _Ex>
+ exception_ptr
+ copy_exception(_Ex __ex) throw();
+
+ namespace __exception_ptr
+ {
+ bool
+ operator==(const exception_ptr&, const exception_ptr&) throw();
+
+ bool
+ operator!=(const exception_ptr&, const exception_ptr&) throw();
+
+ class exception_ptr
+ {
+ void* _M_exception_object;
+
+ explicit exception_ptr(void* __e) throw();
+
+ void _M_addref() throw();
+ void _M_release() throw();
+
+ void *_M_get() const throw();
+
+ void _M_safe_bool_dummy();
+
+ friend exception_ptr std::current_exception() throw();
+ friend void std::rethrow_exception(exception_ptr);
+
+ public:
+ exception_ptr() throw();
+
+ typedef void (exception_ptr::*__safe_bool)();
+
+ // For construction from nullptr or 0.
+ exception_ptr(__safe_bool) throw();
+
+ exception_ptr(const exception_ptr&) throw();
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ exception_ptr(exception_ptr&& __o) throw()
+ : _M_exception_object(__o._M_exception_object)
+ { __o._M_exception_object = 0; }
+#endif
+
+ exception_ptr&
+ operator=(const exception_ptr&) throw();
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ exception_ptr&
+ operator=(exception_ptr&& __o) throw()
+ {
+ exception_ptr(static_cast<exception_ptr&&>(__o)).swap(*this);
+ return *this;
+ }
+#endif
+
+ ~exception_ptr() throw();
+
+ void
+ swap(exception_ptr&) throw();
+
+#ifdef _GLIBCXX_EH_PTR_COMPAT
+ // Retained for compatibility with CXXABI_1.3.
+ bool operator!() const throw();
+ operator __safe_bool() const throw();
+#endif
+
+ friend bool
+ operator==(const exception_ptr&, const exception_ptr&) throw();
+
+ const type_info*
+ __cxa_exception_type() const throw();
+ };
+
+ } // namespace __exception_ptr
+
+
+ template<typename _Ex>
+ exception_ptr
+ copy_exception(_Ex __ex) throw()
+ {
+ __try
+ {
+ throw __ex;
+ }
+ __catch(...)
+ {
+ return current_exception ();
+ }
+ }
+
+ // @} group exceptions
+} // namespace std
+
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list
new file mode 100644
index 0000000..6b8a202
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/initializer_list
@@ -0,0 +1,72 @@
+// std::initializer_list support -*- C++ -*-
+
+// Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file initializer_list
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef __CXX_INITIALIZER_LIST
+#define __CXX_INITIALIZER_LIST
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+
+#pragma GCC visibility push(default)
+
+#include <cstddef>
+
+namespace std
+{
+ /// initializer_list
+ template<class _E>
+ class initializer_list
+ {
+ const _E* __array;
+ size_t __len;
+
+ // The compiler can call a private constructor.
+ initializer_list(const _E* __a, size_t __l)
+ : __array(__a), __len(__l) { }
+
+ public:
+ initializer_list()
+ : __array(NULL), __len(0) { }
+
+ // Number of elements.
+ size_t size() const
+ { return __len; }
+
+ // First element.
+ const _E* begin() const
+ { return __array; }
+
+ // One past the last element.
+ const _E* end() const
+ { return begin() + size(); }
+ };
+}
+
+#pragma GCC visibility pop
+#endif // C++0x
+#endif // __CXX_INITIALIZER_LIST
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits
new file mode 100644
index 0000000..41bf806
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/limits
@@ -0,0 +1,1256 @@
+// The template and inlines for the numeric_limits classes. -*- C++ -*-
+
+// Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+// 2008, 2009 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file limits
+ * This is a Standard C++ Library header.
+ */
+
+// Note: this is not a conforming implementation.
+// Written by Gabriel Dos Reis <gdr@codesourcery.com>
+
+//
+// ISO 14882:1998
+// 18.2.1
+//
+
+#ifndef _GLIBCXX_NUMERIC_LIMITS
+#define _GLIBCXX_NUMERIC_LIMITS 1
+
+#pragma GCC system_header
+
+#include <bits/c++config.h>
+
+//
+// The numeric_limits<> traits document implementation-defined aspects
+// of fundamental arithmetic data types (integers and floating points).
+// From Standard C++ point of view, there are 13 such types:
+// * integers
+// bool (1)
+// char, signed char, unsigned char (3)
+// short, unsigned short (2)
+// int, unsigned (2)
+// long, unsigned long (2)
+//
+// * floating points
+// float (1)
+// double (1)
+// long double (1)
+//
+// GNU C++ understands (where supported by the host C-library)
+// * integer
+// long long, unsigned long long (2)
+//
+// which brings us to 15 fundamental arithmetic data types in GNU C++.
+//
+//
+// Since a numeric_limits<> is a bit tricky to get right, we rely on
+// an interface composed of macros which should be defined in config/os
+// or config/cpu when they differ from the generic (read arbitrary)
+// definitions given here.
+//
+
+// These values can be overridden in the target configuration file.
+// The default values are appropriate for many 32-bit targets.
+
+// GCC only intrinsically supports modulo integral types. The only remaining
+// integral exceptional values is division by zero. Only targets that do not
+// signal division by zero in some "hard to ignore" way should use false.
+#ifndef __glibcxx_integral_traps
+# define __glibcxx_integral_traps true
+#endif
+
+// float
+//
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_float_has_denorm_loss
+# define __glibcxx_float_has_denorm_loss false
+#endif
+#ifndef __glibcxx_float_traps
+# define __glibcxx_float_traps false
+#endif
+#ifndef __glibcxx_float_tinyness_before
+# define __glibcxx_float_tinyness_before false
+#endif
+
+// double
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_double_has_denorm_loss
+# define __glibcxx_double_has_denorm_loss false
+#endif
+#ifndef __glibcxx_double_traps
+# define __glibcxx_double_traps false
+#endif
+#ifndef __glibcxx_double_tinyness_before
+# define __glibcxx_double_tinyness_before false
+#endif
+
+// long double
+
+// Default values. Should be overridden in configuration files if necessary.
+
+#ifndef __glibcxx_long_double_has_denorm_loss
+# define __glibcxx_long_double_has_denorm_loss false
+#endif
+#ifndef __glibcxx_long_double_traps
+# define __glibcxx_long_double_traps false
+#endif
+#ifndef __glibcxx_long_double_tinyness_before
+# define __glibcxx_long_double_tinyness_before false
+#endif
+
+// You should not need to define any macros below this point.
+
+#define __glibcxx_signed(T) ((T)(-1) < 0)
+
+#define __glibcxx_min(T) \
+ (__glibcxx_signed (T) ? (T)1 << __glibcxx_digits (T) : (T)0)
+
+#define __glibcxx_max(T) \
+ (__glibcxx_signed (T) ? \
+ (((((T)1 << (__glibcxx_digits (T) - 1)) - 1) << 1) + 1) : ~(T)0)
+
+#define __glibcxx_digits(T) \
+ (sizeof(T) * __CHAR_BIT__ - __glibcxx_signed (T))
+
+// The fraction 643/2136 approximates log10(2) to 7 significant digits.
+#define __glibcxx_digits10(T) \
+ (__glibcxx_digits (T) * 643 / 2136)
+
+
+_GLIBCXX_BEGIN_NAMESPACE(std)
+
+ /**
+ * @brief Describes the rounding style for floating-point types.
+ *
+ * This is used in the std::numeric_limits class.
+ */
+ enum float_round_style
+ {
+ round_indeterminate = -1, ///< Self-explanatory.
+ round_toward_zero = 0, ///< Self-explanatory.
+ round_to_nearest = 1, ///< To the nearest representable value.
+ round_toward_infinity = 2, ///< Self-explanatory.
+ round_toward_neg_infinity = 3 ///< Self-explanatory.
+ };
+
+ /**
+ * @brief Describes the denormalization for floating-point types.
+ *
+ * These values represent the presence or absence of a variable number
+ * of exponent bits. This type is used in the std::numeric_limits class.
+ */
+ enum float_denorm_style
+ {
+ /// Indeterminate at compile time whether denormalized values are allowed.
+ denorm_indeterminate = -1,
+ /// The type does not allow denormalized values.
+ denorm_absent = 0,
+ /// The type allows denormalized values.
+ denorm_present = 1
+ };
+
+ /**
+ * @brief Part of std::numeric_limits.
+ *
+ * The @c static @c const members are usable as integral constant
+ * expressions.
+ *
+ * @note This is a separate class for purposes of efficiency; you
+ * should only access these members as part of an instantiation
+ * of the std::numeric_limits class.
+ */
+ struct __numeric_limits_base
+ {
+ /** This will be true for all fundamental types (which have
+ specializations), and false for everything else. */
+ static const bool is_specialized = false;
+
+ /** The number of @c radix digits that be represented without change: for
+ integer types, the number of non-sign bits in the mantissa; for
+ floating types, the number of @c radix digits in the mantissa. */
+ static const int digits = 0;
+ /** The number of base 10 digits that can be represented without change. */
+ static const int digits10 = 0;
+ /** True if the type is signed. */
+ static const bool is_signed = false;
+ /** True if the type is integer.
+ * Is this supposed to be "if the type is integral"?
+ */
+ static const bool is_integer = false;
+ /** True if the type uses an exact representation. "All integer types are
+ exact, but not all exact types are integer. For example, rational and
+ fixed-exponent representations are exact but not integer."
+ [18.2.1.2]/15 */
+ static const bool is_exact = false;
+ /** For integer types, specifies the base of the representation. For
+ floating types, specifies the base of the exponent representation. */
+ static const int radix = 0;
+
+ /** The minimum negative integer such that @c radix raised to the power of
+ (one less than that integer) is a normalized floating point number. */
+ static const int min_exponent = 0;
+ /** The minimum negative integer such that 10 raised to that power is in
+ the range of normalized floating point numbers. */
+ static const int min_exponent10 = 0;
+ /** The maximum positive integer such that @c radix raised to the power of
+ (one less than that integer) is a representable finite floating point
+ number. */
+ static const int max_exponent = 0;
+ /** The maximum positive integer such that 10 raised to that power is in
+ the range of representable finite floating point numbers. */
+ static const int max_exponent10 = 0;
+
+ /** True if the type has a representation for positive infinity. */
+ static const bool has_infinity = false;
+ /** True if the type has a representation for a quiet (non-signaling)
+ "Not a Number." */
+ static const bool has_quiet_NaN = false;
+ /** True if the type has a representation for a signaling
+ "Not a Number." */
+ static const bool has_signaling_NaN = false;
+ /** See std::float_denorm_style for more information. */
+ static const float_denorm_style has_denorm = denorm_absent;
+ /** "True if loss of accuracy is detected as a denormalization loss,
+ rather than as an inexact result." [18.2.1.2]/42 */
+ static const bool has_denorm_loss = false;
+
+ /** True if-and-only-if the type adheres to the IEC 559 standard, also
+ known as IEEE 754. (Only makes sense for floating point types.) */
+ static const bool is_iec559 = false;
+ /** "True if the set of values representable by the type is finite. All
+ built-in types are bounded, this member would be false for arbitrary
+ precision types." [18.2.1.2]/54 */
+ static const bool is_bounded = false;
+ /** True if the type is @e modulo, that is, if it is possible to add two
+ positive numbers and have a result that wraps around to a third number
+ that is less. Typically false for floating types, true for unsigned
+ integers, and true for signed integers. */
+ static const bool is_modulo = false;
+
+ /** True if trapping is implemented for this type. */
+ static const bool traps = false;
+ /** True if tininess is detected before rounding. (see IEC 559) */
+ static const bool tinyness_before = false;
+ /** See std::float_round_style for more information. This is only
+ meaningful for floating types; integer types will all be
+ round_toward_zero. */
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /**
+ * @brief Properties of fundamental types.
+ *
+ * This class allows a program to obtain information about the
+ * representation of a fundamental type on a given platform. For
+ * non-fundamental types, the functions will return 0 and the data
+ * members will all be @c false.
+ *
+ * _GLIBCXX_RESOLVE_LIB_DEFECTS: DRs 201 and 184 (hi Gaby!) are
+ * noted, but not incorporated in this documented (yet).
+ */
+ template<typename _Tp>
+ struct numeric_limits : public __numeric_limits_base
+ {
+ /** The minimum finite value, or for floating types with
+ denormalization, the minimum positive normalized value. */
+ static _Tp min() throw() { return static_cast<_Tp>(0); }
+ /** The maximum finite value. */
+ static _Tp max() throw() { return static_cast<_Tp>(0); }
+ /** The @e machine @e epsilon: the difference between 1 and the least
+ value greater than 1 that is representable. */
+ static _Tp epsilon() throw() { return static_cast<_Tp>(0); }
+ /** The maximum rounding error measurement (see LIA-1). */
+ static _Tp round_error() throw() { return static_cast<_Tp>(0); }
+ /** The representation of positive infinity, if @c has_infinity. */
+ static _Tp infinity() throw() { return static_cast<_Tp>(0); }
+ /** The representation of a quiet "Not a Number," if @c has_quiet_NaN. */
+ static _Tp quiet_NaN() throw() { return static_cast<_Tp>(0); }
+ /** The representation of a signaling "Not a Number," if
+ @c has_signaling_NaN. */
+ static _Tp signaling_NaN() throw() { return static_cast<_Tp>(0); }
+ /** The minimum positive denormalized value. For types where
+ @c has_denorm is false, this is the minimum positive normalized
+ value. */
+ static _Tp denorm_min() throw() { return static_cast<_Tp>(0); }
+ };
+
+ // Now there follow 15 explicit specializations. Yes, 15. Make sure
+ // you get the count right.
+
+ /// numeric_limits<bool> specialization.
+ template<>
+ struct numeric_limits<bool>
+ {
+ static const bool is_specialized = true;
+
+ static bool min() throw()
+ { return false; }
+ static bool max() throw()
+ { return true; }
+
+ static const int digits = 1;
+ static const int digits10 = 0;
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static bool epsilon() throw()
+ { return false; }
+ static bool round_error() throw()
+ { return false; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static bool infinity() throw()
+ { return false; }
+ static bool quiet_NaN() throw()
+ { return false; }
+ static bool signaling_NaN() throw()
+ { return false; }
+ static bool denorm_min() throw()
+ { return false; }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ // It is not clear what it means for a boolean type to trap.
+ // This is a DR on the LWG issue list. Here, I use integer
+ // promotion semantics.
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<char> specialization.
+ template<>
+ struct numeric_limits<char>
+ {
+ static const bool is_specialized = true;
+
+ static char min() throw()
+ { return __glibcxx_min(char); }
+ static char max() throw()
+ { return __glibcxx_max(char); }
+
+ static const int digits = __glibcxx_digits (char);
+ static const int digits10 = __glibcxx_digits10 (char);
+ static const bool is_signed = __glibcxx_signed (char);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char epsilon() throw()
+ { return 0; }
+ static char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char infinity() throw()
+ { return char(); }
+ static char quiet_NaN() throw()
+ { return char(); }
+ static char signaling_NaN() throw()
+ { return char(); }
+ static char denorm_min() throw()
+ { return static_cast<char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<signed char> specialization.
+ template<>
+ struct numeric_limits<signed char>
+ {
+ static const bool is_specialized = true;
+
+ static signed char min() throw()
+ { return -__SCHAR_MAX__ - 1; }
+ static signed char max() throw()
+ { return __SCHAR_MAX__; }
+
+ static const int digits = __glibcxx_digits (signed char);
+ static const int digits10 = __glibcxx_digits10 (signed char);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static signed char epsilon() throw()
+ { return 0; }
+ static signed char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static signed char infinity() throw()
+ { return static_cast<signed char>(0); }
+ static signed char quiet_NaN() throw()
+ { return static_cast<signed char>(0); }
+ static signed char signaling_NaN() throw()
+ { return static_cast<signed char>(0); }
+ static signed char denorm_min() throw()
+ { return static_cast<signed char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned char> specialization.
+ template<>
+ struct numeric_limits<unsigned char>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned char min() throw()
+ { return 0; }
+ static unsigned char max() throw()
+ { return __SCHAR_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned char);
+ static const int digits10 = __glibcxx_digits10 (unsigned char);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned char epsilon() throw()
+ { return 0; }
+ static unsigned char round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned char infinity() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char quiet_NaN() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char signaling_NaN() throw()
+ { return static_cast<unsigned char>(0); }
+ static unsigned char denorm_min() throw()
+ { return static_cast<unsigned char>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<wchar_t> specialization.
+ template<>
+ struct numeric_limits<wchar_t>
+ {
+ static const bool is_specialized = true;
+
+ static wchar_t min() throw()
+ { return __glibcxx_min (wchar_t); }
+ static wchar_t max() throw()
+ { return __glibcxx_max (wchar_t); }
+
+ static const int digits = __glibcxx_digits (wchar_t);
+ static const int digits10 = __glibcxx_digits10 (wchar_t);
+ static const bool is_signed = __glibcxx_signed (wchar_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static wchar_t epsilon() throw()
+ { return 0; }
+ static wchar_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static wchar_t infinity() throw()
+ { return wchar_t(); }
+ static wchar_t quiet_NaN() throw()
+ { return wchar_t(); }
+ static wchar_t signaling_NaN() throw()
+ { return wchar_t(); }
+ static wchar_t denorm_min() throw()
+ { return wchar_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ /// numeric_limits<char16_t> specialization.
+ template<>
+ struct numeric_limits<char16_t>
+ {
+ static const bool is_specialized = true;
+
+ static char16_t min() throw()
+ { return __glibcxx_min (char16_t); }
+ static char16_t max() throw()
+ { return __glibcxx_max (char16_t); }
+
+ static const int digits = __glibcxx_digits (char16_t);
+ static const int digits10 = __glibcxx_digits10 (char16_t);
+ static const bool is_signed = __glibcxx_signed (char16_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char16_t epsilon() throw()
+ { return 0; }
+ static char16_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char16_t infinity() throw()
+ { return char16_t(); }
+ static char16_t quiet_NaN() throw()
+ { return char16_t(); }
+ static char16_t signaling_NaN() throw()
+ { return char16_t(); }
+ static char16_t denorm_min() throw()
+ { return char16_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<char32_t> specialization.
+ template<>
+ struct numeric_limits<char32_t>
+ {
+ static const bool is_specialized = true;
+
+ static char32_t min() throw()
+ { return __glibcxx_min (char32_t); }
+ static char32_t max() throw()
+ { return __glibcxx_max (char32_t); }
+
+ static const int digits = __glibcxx_digits (char32_t);
+ static const int digits10 = __glibcxx_digits10 (char32_t);
+ static const bool is_signed = __glibcxx_signed (char32_t);
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static char32_t epsilon() throw()
+ { return 0; }
+ static char32_t round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static char32_t infinity() throw()
+ { return char32_t(); }
+ static char32_t quiet_NaN() throw()
+ { return char32_t(); }
+ static char32_t signaling_NaN() throw()
+ { return char32_t(); }
+ static char32_t denorm_min() throw()
+ { return char32_t(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+#endif
+
+ /// numeric_limits<short> specialization.
+ template<>
+ struct numeric_limits<short>
+ {
+ static const bool is_specialized = true;
+
+ static short min() throw()
+ { return -__SHRT_MAX__ - 1; }
+ static short max() throw()
+ { return __SHRT_MAX__; }
+
+ static const int digits = __glibcxx_digits (short);
+ static const int digits10 = __glibcxx_digits10 (short);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static short epsilon() throw()
+ { return 0; }
+ static short round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static short infinity() throw()
+ { return short(); }
+ static short quiet_NaN() throw()
+ { return short(); }
+ static short signaling_NaN() throw()
+ { return short(); }
+ static short denorm_min() throw()
+ { return short(); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned short> specialization.
+ template<>
+ struct numeric_limits<unsigned short>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned short min() throw()
+ { return 0; }
+ static unsigned short max() throw()
+ { return __SHRT_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned short);
+ static const int digits10 = __glibcxx_digits10 (unsigned short);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned short epsilon() throw()
+ { return 0; }
+ static unsigned short round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned short infinity() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short quiet_NaN() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short signaling_NaN() throw()
+ { return static_cast<unsigned short>(0); }
+ static unsigned short denorm_min() throw()
+ { return static_cast<unsigned short>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<int> specialization.
+ template<>
+ struct numeric_limits<int>
+ {
+ static const bool is_specialized = true;
+
+ static int min() throw()
+ { return -__INT_MAX__ - 1; }
+ static int max() throw()
+ { return __INT_MAX__; }
+
+ static const int digits = __glibcxx_digits (int);
+ static const int digits10 = __glibcxx_digits10 (int);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static int epsilon() throw()
+ { return 0; }
+ static int round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static int infinity() throw()
+ { return static_cast<int>(0); }
+ static int quiet_NaN() throw()
+ { return static_cast<int>(0); }
+ static int signaling_NaN() throw()
+ { return static_cast<int>(0); }
+ static int denorm_min() throw()
+ { return static_cast<int>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned int> specialization.
+ template<>
+ struct numeric_limits<unsigned int>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned int min() throw()
+ { return 0; }
+ static unsigned int max() throw()
+ { return __INT_MAX__ * 2U + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned int);
+ static const int digits10 = __glibcxx_digits10 (unsigned int);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned int epsilon() throw()
+ { return 0; }
+ static unsigned int round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned int infinity() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int quiet_NaN() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int signaling_NaN() throw()
+ { return static_cast<unsigned int>(0); }
+ static unsigned int denorm_min() throw()
+ { return static_cast<unsigned int>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<long> specialization.
+ template<>
+ struct numeric_limits<long>
+ {
+ static const bool is_specialized = true;
+
+ static long min() throw()
+ { return -__LONG_MAX__ - 1; }
+ static long max() throw()
+ { return __LONG_MAX__; }
+
+ static const int digits = __glibcxx_digits (long);
+ static const int digits10 = __glibcxx_digits10 (long);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static long epsilon() throw()
+ { return 0; }
+ static long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static long infinity() throw()
+ { return static_cast<long>(0); }
+ static long quiet_NaN() throw()
+ { return static_cast<long>(0); }
+ static long signaling_NaN() throw()
+ { return static_cast<long>(0); }
+ static long denorm_min() throw()
+ { return static_cast<long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned long> specialization.
+ template<>
+ struct numeric_limits<unsigned long>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned long min() throw()
+ { return 0; }
+ static unsigned long max() throw()
+ { return __LONG_MAX__ * 2UL + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned long);
+ static const int digits10 = __glibcxx_digits10 (unsigned long);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned long epsilon() throw()
+ { return 0; }
+ static unsigned long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned long infinity() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long quiet_NaN() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long signaling_NaN() throw()
+ { return static_cast<unsigned long>(0); }
+ static unsigned long denorm_min() throw()
+ { return static_cast<unsigned long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<long long> specialization.
+ template<>
+ struct numeric_limits<long long>
+ {
+ static const bool is_specialized = true;
+
+ static long long min() throw()
+ { return -__LONG_LONG_MAX__ - 1; }
+ static long long max() throw()
+ { return __LONG_LONG_MAX__; }
+
+ static const int digits = __glibcxx_digits (long long);
+ static const int digits10 = __glibcxx_digits10 (long long);
+ static const bool is_signed = true;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static long long epsilon() throw()
+ { return 0; }
+ static long long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static long long infinity() throw()
+ { return static_cast<long long>(0); }
+ static long long quiet_NaN() throw()
+ { return static_cast<long long>(0); }
+ static long long signaling_NaN() throw()
+ { return static_cast<long long>(0); }
+ static long long denorm_min() throw()
+ { return static_cast<long long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<unsigned long long> specialization.
+ template<>
+ struct numeric_limits<unsigned long long>
+ {
+ static const bool is_specialized = true;
+
+ static unsigned long long min() throw()
+ { return 0; }
+ static unsigned long long max() throw()
+ { return __LONG_LONG_MAX__ * 2ULL + 1; }
+
+ static const int digits = __glibcxx_digits (unsigned long long);
+ static const int digits10 = __glibcxx_digits10 (unsigned long long);
+ static const bool is_signed = false;
+ static const bool is_integer = true;
+ static const bool is_exact = true;
+ static const int radix = 2;
+ static unsigned long long epsilon() throw()
+ { return 0; }
+ static unsigned long long round_error() throw()
+ { return 0; }
+
+ static const int min_exponent = 0;
+ static const int min_exponent10 = 0;
+ static const int max_exponent = 0;
+ static const int max_exponent10 = 0;
+
+ static const bool has_infinity = false;
+ static const bool has_quiet_NaN = false;
+ static const bool has_signaling_NaN = false;
+ static const float_denorm_style has_denorm = denorm_absent;
+ static const bool has_denorm_loss = false;
+
+ static unsigned long long infinity() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long quiet_NaN() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long signaling_NaN() throw()
+ { return static_cast<unsigned long long>(0); }
+ static unsigned long long denorm_min() throw()
+ { return static_cast<unsigned long long>(0); }
+
+ static const bool is_iec559 = false;
+ static const bool is_bounded = true;
+ static const bool is_modulo = true;
+
+ static const bool traps = __glibcxx_integral_traps;
+ static const bool tinyness_before = false;
+ static const float_round_style round_style = round_toward_zero;
+ };
+
+ /// numeric_limits<float> specialization.
+ template<>
+ struct numeric_limits<float>
+ {
+ static const bool is_specialized = true;
+
+ static float min() throw()
+ { return __FLT_MIN__; }
+ static float max() throw()
+ { return __FLT_MAX__; }
+
+ static const int digits = __FLT_MANT_DIG__;
+ static const int digits10 = __FLT_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static float epsilon() throw()
+ { return __FLT_EPSILON__; }
+ static float round_error() throw()
+ { return 0.5F; }
+
+ static const int min_exponent = __FLT_MIN_EXP__;
+ static const int min_exponent10 = __FLT_MIN_10_EXP__;
+ static const int max_exponent = __FLT_MAX_EXP__;
+ static const int max_exponent10 = __FLT_MAX_10_EXP__;
+
+ static const bool has_infinity = __FLT_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __FLT_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__FLT_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss = __glibcxx_float_has_denorm_loss;
+
+ static float infinity() throw()
+ { return __builtin_huge_valf (); }
+ static float quiet_NaN() throw()
+ { return __builtin_nanf (""); }
+ static float signaling_NaN() throw()
+ { return __builtin_nansf (""); }
+ static float denorm_min() throw()
+ { return __FLT_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_float_traps;
+ static const bool tinyness_before = __glibcxx_float_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_float_has_denorm_loss
+#undef __glibcxx_float_traps
+#undef __glibcxx_float_tinyness_before
+
+ /// numeric_limits<double> specialization.
+ template<>
+ struct numeric_limits<double>
+ {
+ static const bool is_specialized = true;
+
+ static double min() throw()
+ { return __DBL_MIN__; }
+ static double max() throw()
+ { return __DBL_MAX__; }
+
+ static const int digits = __DBL_MANT_DIG__;
+ static const int digits10 = __DBL_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static double epsilon() throw()
+ { return __DBL_EPSILON__; }
+ static double round_error() throw()
+ { return 0.5; }
+
+ static const int min_exponent = __DBL_MIN_EXP__;
+ static const int min_exponent10 = __DBL_MIN_10_EXP__;
+ static const int max_exponent = __DBL_MAX_EXP__;
+ static const int max_exponent10 = __DBL_MAX_10_EXP__;
+
+ static const bool has_infinity = __DBL_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __DBL_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__DBL_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss = __glibcxx_double_has_denorm_loss;
+
+ static double infinity() throw()
+ { return __builtin_huge_val(); }
+ static double quiet_NaN() throw()
+ { return __builtin_nan (""); }
+ static double signaling_NaN() throw()
+ { return __builtin_nans (""); }
+ static double denorm_min() throw()
+ { return __DBL_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_double_traps;
+ static const bool tinyness_before = __glibcxx_double_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_double_has_denorm_loss
+#undef __glibcxx_double_traps
+#undef __glibcxx_double_tinyness_before
+
+ /// numeric_limits<long double> specialization.
+ template<>
+ struct numeric_limits<long double>
+ {
+ static const bool is_specialized = true;
+
+ static long double min() throw()
+ { return __LDBL_MIN__; }
+ static long double max() throw()
+ { return __LDBL_MAX__; }
+
+ static const int digits = __LDBL_MANT_DIG__;
+ static const int digits10 = __LDBL_DIG__;
+ static const bool is_signed = true;
+ static const bool is_integer = false;
+ static const bool is_exact = false;
+ static const int radix = __FLT_RADIX__;
+ static long double epsilon() throw()
+ { return __LDBL_EPSILON__; }
+ static long double round_error() throw()
+ { return 0.5L; }
+
+ static const int min_exponent = __LDBL_MIN_EXP__;
+ static const int min_exponent10 = __LDBL_MIN_10_EXP__;
+ static const int max_exponent = __LDBL_MAX_EXP__;
+ static const int max_exponent10 = __LDBL_MAX_10_EXP__;
+
+ static const bool has_infinity = __LDBL_HAS_INFINITY__;
+ static const bool has_quiet_NaN = __LDBL_HAS_QUIET_NAN__;
+ static const bool has_signaling_NaN = has_quiet_NaN;
+ static const float_denorm_style has_denorm
+ = bool(__LDBL_HAS_DENORM__) ? denorm_present : denorm_absent;
+ static const bool has_denorm_loss
+ = __glibcxx_long_double_has_denorm_loss;
+
+ static long double infinity() throw()
+ { return __builtin_huge_vall (); }
+ static long double quiet_NaN() throw()
+ { return __builtin_nanl (""); }
+ static long double signaling_NaN() throw()
+ { return __builtin_nansl (""); }
+ static long double denorm_min() throw()
+ { return __LDBL_DENORM_MIN__; }
+
+ static const bool is_iec559
+ = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
+ static const bool is_bounded = true;
+ static const bool is_modulo = false;
+
+ static const bool traps = __glibcxx_long_double_traps;
+ static const bool tinyness_before = __glibcxx_long_double_tinyness_before;
+ static const float_round_style round_style = round_to_nearest;
+ };
+
+#undef __glibcxx_long_double_has_denorm_loss
+#undef __glibcxx_long_double_traps
+#undef __glibcxx_long_double_tinyness_before
+
+_GLIBCXX_END_NAMESPACE
+
+#undef __glibcxx_signed
+#undef __glibcxx_min
+#undef __glibcxx_max
+#undef __glibcxx_digits
+#undef __glibcxx_digits10
+
+#endif // _GLIBCXX_NUMERIC_LIMITS
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new
new file mode 100644
index 0000000..d411502
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/new
@@ -0,0 +1,112 @@
+// The -*- C++ -*- dynamic memory management header.
+
+// Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+// 2003, 2004, 2005, 2006, 2007, 2009
+// Free Software Foundation
+
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file new
+ * This is a Standard C++ Library header.
+ *
+ * The header @c new defines several functions to manage dynamic memory and
+ * handling memory allocation errors; see
+ * http://gcc.gnu.org/onlinedocs/libstdc++/18_support/howto.html#4 for more.
+ */
+
+#ifndef _NEW
+#define _NEW
+
+#include <cstddef>
+#include <exception>
+
+#pragma GCC visibility push(default)
+
+extern "C++" {
+
+namespace std
+{
+ /**
+ * @brief Exception possibly thrown by @c new.
+ * @ingroup exceptions
+ *
+ * @c bad_alloc (or classes derived from it) is used to report allocation
+ * errors from the throwing forms of @c new. */
+ class bad_alloc : public exception
+ {
+ public:
+ bad_alloc() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_alloc() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ struct nothrow_t { };
+
+ extern const nothrow_t nothrow;
+
+ /** If you write your own error handler to be called by @c new, it must
+ * be of this type. */
+ typedef void (*new_handler)();
+
+ /// Takes a replacement handler as the argument, returns the
+ /// previous handler.
+ new_handler set_new_handler(new_handler) throw();
+} // namespace std
+
+//@{
+/** These are replaceable signatures:
+ * - normal single new and delete (no arguments, throw @c bad_alloc on error)
+ * - normal array new and delete (same)
+ * - @c nothrow single new and delete (take a @c nothrow argument, return
+ * @c NULL on error)
+ * - @c nothrow array new and delete (same)
+ *
+ * Placement new and delete signatures (take a memory address argument,
+ * does nothing) may not be replaced by a user's program.
+*/
+void* operator new(std::size_t) throw (std::bad_alloc);
+void* operator new[](std::size_t) throw (std::bad_alloc);
+void operator delete(void*) throw();
+void operator delete[](void*) throw();
+void* operator new(std::size_t, const std::nothrow_t&) throw();
+void* operator new[](std::size_t, const std::nothrow_t&) throw();
+void operator delete(void*, const std::nothrow_t&) throw();
+void operator delete[](void*, const std::nothrow_t&) throw();
+
+// Default placement versions of operator new.
+inline void* operator new(std::size_t, void* __p) throw() { return __p; }
+inline void* operator new[](std::size_t, void* __p) throw() { return __p; }
+
+// Default placement versions of operator delete.
+inline void operator delete (void*, void*) throw() { }
+inline void operator delete[](void*, void*) throw() { }
+//@}
+} // extern "C++"
+
+#pragma GCC visibility pop
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo
new file mode 100644
index 0000000..eea38e7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/include/c++/4.4.3/typeinfo
@@ -0,0 +1,196 @@
+// RTTI support for -*- C++ -*-
+// Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+// 2003, 2004, 2005, 2006, 2007, 2009
+// Free Software Foundation
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+//
+// GCC is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file typeinfo
+ * This is a Standard C++ Library header.
+ */
+
+#ifndef _TYPEINFO
+#define _TYPEINFO
+
+#include <exception>
+
+#pragma GCC visibility push(default)
+
+extern "C++" {
+
+namespace __cxxabiv1
+{
+ class __class_type_info;
+} // namespace __cxxabiv1
+
+// Determine whether typeinfo names for the same type are merged (in which
+// case comparison can just compare pointers) or not (in which case
+// strings must be compared and g++.dg/abi/local1.C will fail), and
+// whether comparison is to be implemented inline or not. By default we
+// use inline pointer comparison if weak symbols are available, and
+// out-of-line strcmp if not. Out-of-line pointer comparison is used
+// where the object files are to be portable to multiple systems, some of
+// which may not be able to use pointer comparison, but the particular
+// system for which libstdc++ is being built can use pointer comparison;
+// in particular for most ARM EABI systems, where the ABI specifies
+// out-of-line comparison. Inline strcmp is not currently supported. The
+// compiler's target configuration can override the defaults by defining
+// __GXX_TYPEINFO_EQUALITY_INLINE to 1 or 0 to indicate whether or not
+// comparison is inline, and __GXX_MERGED_TYPEINFO_NAMES to 1 or 0 to
+// indicate whether or not pointer comparison can be used.
+
+#ifndef __GXX_MERGED_TYPEINFO_NAMES
+ #if !__GXX_WEAK__
+ // If weak symbols are not supported, typeinfo names are not merged.
+ #define __GXX_MERGED_TYPEINFO_NAMES 0
+ #else
+ // On platforms that support weak symbols, typeinfo names are merged.
+ #define __GXX_MERGED_TYPEINFO_NAMES 1
+ #endif
+#endif
+
+// By default follow the same rules as for __GXX_MERGED_TYPEINFO_NAMES.
+#ifndef __GXX_TYPEINFO_EQUALITY_INLINE
+ #if !__GXX_WEAK__
+ #define __GXX_TYPEINFO_EQUALITY_INLINE 0
+ #else
+ #define __GXX_TYPEINFO_EQUALITY_INLINE 1
+ #endif
+#endif
+
+namespace std
+{
+ /**
+ * @brief Part of RTTI.
+ *
+ * The @c type_info class describes type information generated by
+ * an implementation.
+ */
+ class type_info
+ {
+ public:
+ /** Destructor first. Being the first non-inline virtual function, this
+ * controls in which translation unit the vtable is emitted. The
+ * compiler makes use of that information to know where to emit
+ * the runtime-mandated type_info structures in the new-abi. */
+ virtual ~type_info();
+
+ /** Returns an @e implementation-defined byte string; this is not
+ * portable between compilers! */
+ const char* name() const
+ { return __name; }
+
+#if !__GXX_TYPEINFO_EQUALITY_INLINE
+ bool before(const type_info& __arg) const;
+
+ // In old abi, or when weak symbols are not supported, there can
+ // be multiple instances of a type_info object for one
+ // type. Uniqueness must use the _name value, not object address.
+ bool operator==(const type_info& __arg) const;
+#else
+ #if !__GXX_MERGED_TYPEINFO_NAMES
+ #error "Inline implementation of type_info comparision requires merging of type_info objects"
+ #endif
+ /** Returns true if @c *this precedes @c __arg in the implementation's
+ * collation order. */
+ // In new abi we can rely on type_info's NTBS being unique,
+ // and therefore address comparisons are sufficient.
+ bool before(const type_info& __arg) const
+ { return __name < __arg.__name; }
+
+ bool operator==(const type_info& __arg) const
+ { return __name == __arg.__name; }
+#endif
+ bool operator!=(const type_info& __arg) const
+ { return !operator==(__arg); }
+
+ // Return true if this is a pointer type of some kind
+ virtual bool __is_pointer_p() const;
+
+ // Return true if this is a function type
+ virtual bool __is_function_p() const;
+
+ // Try and catch a thrown type. Store an adjusted pointer to the
+ // caught type in THR_OBJ. If THR_TYPE is not a pointer type, then
+ // THR_OBJ points to the thrown object. If THR_TYPE is a pointer
+ // type, then THR_OBJ is the pointer itself. OUTER indicates the
+ // number of outer pointers, and whether they were const
+ // qualified.
+ virtual bool __do_catch(const type_info *__thr_type, void **__thr_obj,
+ unsigned __outer) const;
+
+ // Internally used during catch matching
+ virtual bool __do_upcast(const __cxxabiv1::__class_type_info *__target,
+ void **__obj_ptr) const;
+
+ protected:
+ const char *__name;
+
+ explicit type_info(const char *__n): __name(__n) { }
+
+ private:
+ /// Assigning type_info is not supported.
+ type_info& operator=(const type_info&);
+ type_info(const type_info&);
+ };
+
+ /**
+ * @brief Thrown during incorrect typecasting.
+ * @ingroup exceptions
+ *
+ * If you attempt an invalid @c dynamic_cast expression, an instance of
+ * this class (or something derived from this class) is thrown. */
+ class bad_cast : public exception
+ {
+ public:
+ bad_cast() throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_cast() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+
+ /**
+ * @brief Thrown when a NULL pointer in a @c typeid expression is used.
+ * @ingroup exceptions
+ */
+ class bad_typeid : public exception
+ {
+ public:
+ bad_typeid () throw() { }
+
+ // This declaration is not useless:
+ // http://gcc.gnu.org/onlinedocs/gcc-3.0.2/gcc_6.html#SEC118
+ virtual ~bad_typeid() throw();
+
+ // See comment in eh_exception.cc.
+ virtual const char* what() const throw();
+ };
+} // namespace std
+
+#pragma GCC visibility pop
+
+} // extern "C++"
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a
new file mode 100644
index 0000000..38e9fa8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libiberty.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a
new file mode 100644
index 0000000..aa0711e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la
new file mode 100755
index 0000000..65eb6e4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/libsupc++.la
@@ -0,0 +1,41 @@
+# libsupc++.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libsupc++.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib/armv7-a'
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a
new file mode 100644
index 0000000..1775156
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libiberty.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a
new file mode 100644
index 0000000..0d5b653
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la
new file mode 100755
index 0000000..f13425c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/armv7-a/thumb/libsupc++.la
@@ -0,0 +1,41 @@
+# libsupc++.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libsupc++.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib/armv7-a/thumb'
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x
new file mode 100644
index 0000000..94285a1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.x
@@ -0,0 +1,224 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
+ "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn
new file mode 100644
index 0000000..c50badd
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xbn
@@ -0,0 +1,222 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc
new file mode 100644
index 0000000..5ea66eb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xc
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd
new file mode 100644
index 0000000..c13ea94
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xd
@@ -0,0 +1,224 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc
new file mode 100644
index 0000000..5c4f46e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdc
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw
new file mode 100644
index 0000000..29e0f7f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xdw
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn
new file mode 100644
index 0000000..a4a26f0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xn
@@ -0,0 +1,224 @@
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new file mode 100644
index 0000000..3ff3f1e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xr
@@ -0,0 +1,163 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs
new file mode 100644
index 0000000..53685f8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xs
@@ -0,0 +1,213 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc
new file mode 100644
index 0000000..bb54aa4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsc
@@ -0,0 +1,212 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw
new file mode 100644
index 0000000..7cdf2d1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xsw
@@ -0,0 +1,212 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xu b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xu
new file mode 100644
index 0000000..40a23ed
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xu
@@ -0,0 +1,164 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw
new file mode 100644
index 0000000..28cb887
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelf_linux_eabi.xw
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x
new file mode 100644
index 0000000..9ff8ca9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.x
@@ -0,0 +1,224 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn
new file mode 100644
index 0000000..58dd71f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xbn
@@ -0,0 +1,222 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc
new file mode 100644
index 0000000..8b43c0c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xc
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd
new file mode 100644
index 0000000..4b9b5f7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xd
@@ -0,0 +1,224 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdc
new file mode 100644
index 0000000..6adcf2f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdc
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw
new file mode 100644
index 0000000..0c3c7e9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xdw
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn
new file mode 100644
index 0000000..3d38294
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xn
@@ -0,0 +1,224 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr
new file mode 100644
index 0000000..ee19e6e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xr
@@ -0,0 +1,163 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs
new file mode 100644
index 0000000..edf8b6a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xs
@@ -0,0 +1,213 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc
new file mode 100644
index 0000000..8a19f57
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsc
@@ -0,0 +1,212 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsw
new file mode 100644
index 0000000..63926e6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xsw
@@ -0,0 +1,212 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu
new file mode 100644
index 0000000..cf0815b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xu
@@ -0,0 +1,164 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw
new file mode 100644
index 0000000..9fc8ff4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/ldscripts/armelfb_linux_eabi.xw
@@ -0,0 +1,227 @@
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libiberty.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libiberty.a
new file mode 100644
index 0000000..b4ac3e5
--- /dev/null
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Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.a
new file mode 100644
index 0000000..df87b97
--- /dev/null
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Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.la b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.la
new file mode 100755
index 0000000..4d9bfc1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/libsupc++.la
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+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib'
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libiberty.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libiberty.a
new file mode 100644
index 0000000..64d7683
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libiberty.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.a
new file mode 100644
index 0000000..76c3bbc
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.la b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.la
new file mode 100755
index 0000000..a328628
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/arm-linux-androideabi/lib/thumb/libsupc++.la
@@ -0,0 +1,41 @@
+# libsupc++.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libsupc++.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=''
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libsupc++.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/arm-linux-androideabi/lib/thumb'
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-addr2line b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-addr2line
new file mode 100755
index 0000000..abd032e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-addr2line
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ar b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ar
new file mode 100755
index 0000000..7be82d2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ar
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-as b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-as
new file mode 100755
index 0000000..15447ab
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-as
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++
new file mode 100755
index 0000000..f4bc1b8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++filt b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++filt
new file mode 100755
index 0000000..52fd166
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-c++filt
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-cpp b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-cpp
new file mode 100755
index 0000000..da2f244
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-cpp
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-g++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-g++
new file mode 100755
index 0000000..f4bc1b8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-g++
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc
new file mode 100755
index 0000000..de046f9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3
new file mode 100755
index 0000000..de046f9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcc-4.4.3
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug
new file mode 100755
index 0000000..149d42a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gccbug
@@ -0,0 +1,558 @@
+#!/bin/sh
+# Submit a problem report to a GNATS site.
+# Copyright (C) 1993, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
+# Contributed by Brendan Kehoe (brendan@cygnus.com), based on a
+# version written by Heinz G. Seidl (hgs@cygnus.com).
+#
+# This file is part of GNU GNATS.
+#
+# GNU GNATS is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU GNATS is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU GNATS; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# The version of this send-pr.
+VERSION=3.113
+
+# The submitter-id for your site.
+SUBMITTER=net
+
+# The default mail address for PR submissions.
+GNATS_ADDR=gcc-gnats@gcc.gnu.org
+
+# The default release for this host.
+# We have to guess at what program_transform_name might have done.
+# "sed 1q" because neither "head -1" nor "head -n 1" is universal, argh.
+
+DEFAULT_GCC="`echo $0 | sed -e 's/bug//'`"
+DEFAULT_RELEASE="`$DEFAULT_GCC --version | sed 1q`"
+
+# The default organization.
+DEFAULT_ORGANIZATION=
+
+# What mailer to use. This must come after the config file, since it is
+# host-dependent.
+# Copied from cvsbug
+if [ -f /usr/sbin/sendmail ]; then
+ MAIL_AGENT="/usr/sbin/sendmail -oi -t"
+else
+ MAIL_AGENT="/usr/lib/sendmail -oi -t"
+fi
+MAILER=`echo $MAIL_AGENT | sed -e 's, .*,,'`
+if [ ! -f "$MAILER" ] ; then
+ echo "$COMMAND: Cannot file mail program \"$MAILER\"."
+ echo "$COMMAND: Please fix the MAIL_AGENT entry in the $COMMAND file."
+ exit 1
+fi
+
+
+# How to read the passwd database.
+PASSWD="cat /etc/passwd"
+
+ECHON=bsd
+
+if [ $ECHON = bsd ] ; then
+ ECHON1="echo -n"
+ ECHON2=
+elif [ $ECHON = sysv ] ; then
+ ECHON1=echo
+ ECHON2='\c'
+else
+ ECHON1=echo
+ ECHON2=
+fi
+
+#
+
+if [ -z "$TMPDIR" ]; then
+ TMPDIR=/tmp
+else
+ if [ "`echo $TMPDIR | grep '/$'`" != "" ]; then
+ TMPDIR="`echo $TMPDIR | sed -e 's,/$,,'`"
+ fi
+fi
+
+if [ yes = yes ]; then
+ TEMP0=`mktemp $TMPDIR/poXXXXXX` || exit 1
+ TEMP=`mktemp $TMPDIR/pXXXXXX` || exit 1
+ BAD=`mktemp $TMPDIR/pbadXXXXXX` || exit 1
+ REF=`mktemp $TMPDIR/pfXXXXXX` || exit 1
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $BAD $REF"
+else
+ TEMPD=$TMPDIR/pd$$
+ TEMP0=$TEMPD/po$$
+ TEMP=$TEMPD/p$$
+ BAD=$TEMPD/pbad$$
+ REF=$TEMPD/pf$$
+ mkdir $TEMPD || exit 1
+ REMOVE_TEMP="rm -rf $TEMPD"
+fi
+
+# find a user name
+if [ "$LOGNAME" = "" ]; then
+ if [ "$USER" != "" ]; then
+ LOGNAME="$USER"
+ else
+ LOGNAME="UNKNOWN"
+ fi
+fi
+
+FROM="$LOGNAME"
+REPLY_TO="${REPLY_TO:-${REPLYTO:-$LOGNAME}}"
+
+# Find out the name of the originator of this PR.
+if [ -n "$NAME" ]; then
+ ORIGINATOR="$NAME"
+elif [ -f $HOME/.fullname ]; then
+ ORIGINATOR="`sed -e '1q' $HOME/.fullname`"
+else
+ # Must use temp file due to incompatibilities in quoting behavior
+ # and to protect shell metacharacters in the expansion of $LOGNAME
+ $PASSWD | grep "^$LOGNAME:" | awk -F: '{print $5}' | sed -e 's/,.*//' > $TEMP0
+ ORIGINATOR="`cat $TEMP0`"
+ rm -f $TEMP0
+fi
+
+if [ -n "$ORGANIZATION" ]; then
+ if [ -f "$ORGANIZATION" ]; then
+ ORGANIZATION="`cat $ORGANIZATION`"
+ fi
+else
+ if [ -n "$DEFAULT_ORGANIZATION" ]; then
+ ORGANIZATION="$DEFAULT_ORGANIZATION"
+ elif [ -f $HOME/.organization ]; then
+ ORGANIZATION="`cat $HOME/.organization`"
+ fi
+fi
+
+# If they don't have a preferred editor set, then use
+if [ -z "$VISUAL" ]; then
+ if [ -z "$EDITOR" ]; then
+ EDIT=vi
+ else
+ EDIT="$EDITOR"
+ fi
+else
+ EDIT="$VISUAL"
+fi
+
+# Find out some information.
+SYSTEM=`( [ -f /bin/uname ] && /bin/uname -a ) || \
+ ( [ -f /usr/bin/uname ] && /usr/bin/uname -a ) || echo ""`
+ARCH=`[ -f /bin/arch ] && /bin/arch`
+MACHINE=`[ -f /bin/machine ] && /bin/machine`
+
+COMMAND=`echo $0 | sed -e 's,.*/,,'`
+USAGE="Usage: $COMMAND [-PVL] [-t address] [-f filename] [-s severity]
+ [-c address] [--request-id] [--version]"
+REMOVE=
+BATCH=
+CC=
+SEVERITY_C=
+
+while [ $# -gt 0 ]; do
+ case "$1" in
+ -r) ;; # Ignore for backward compat.
+ -t | --to) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; GNATS_ADDR="$1"
+ EXPLICIT_GNATS_ADDR=true
+ ;;
+ -f | --file) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; IN_FILE="$1"
+ if [ "$IN_FILE" != "-" -a ! -r "$IN_FILE" ]; then
+ echo "$COMMAND: cannot read $IN_FILE"
+ $REMOVE_TEMP
+ exit 1
+ fi
+ ;;
+ -b | --batch) BATCH=true ;;
+ -c | --cc) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; CC="$1"
+ ;;
+ -s | --severity) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+ shift ; SEVERITY_C="$1"
+ ;;
+ -p | -P | --print) PRINT=true ;;
+ -L | --list) FORMAT=norm ;;
+ -l | -CL | --lisp) FORMAT=lisp ;;
+ --request-id) REQUEST_ID=true ;;
+ -h | --help) echo "$USAGE"; $REMOVE_TEMP; exit 0 ;;
+ -V | --version) cat <<EOF
+gccbug (GCC) $DEFAULT_RELEASE
+Copyright (C) 2002 Free Software Foundation, Inc.
+This is free software; see the source for copying conditions. There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+EOF
+ $REMOVE_TEMP; exit 0 ;;
+ -*) echo "$USAGE" ; $REMOVE_TEMP; exit 1 ;;
+ *) echo "$USAGE" ; $REMOVE_TEMP; exit 1
+ esac
+ shift
+done
+
+# spam does not need to be listed here
+CATEGORIES="ada bootstrap c++ c debug driver fortran inline-asm java libgcj libobjc libstdc++ middle-end objc other pch preprocessor rtl-optimization target tree-optimization web"
+
+case "$FORMAT" in
+ lisp) echo "$CATEGORIES" | \
+ awk 'BEGIN {printf "( "} {printf "(\"%s\") ",$0} END {printf ")\n"}'
+ $REMOVE_TEMP
+ exit 0
+ ;;
+ norm) l=`echo "$CATEGORIES" | \
+ awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+ END {print max + 1;}'`
+ c=`expr 70 / $l`
+ if [ $c -eq 0 ]; then c=1; fi
+ echo "$CATEGORIES" | \
+ awk 'BEGIN {print "Known categories:"; i = 0 }
+ { printf ("%-'$l'.'$l's", $0); if ((++i % '$c') == 0) { print "" } }
+ END { print ""; }'
+ $REMOVE_TEMP
+ exit 0
+ ;;
+esac
+
+ORIGINATOR_C='<name of the PR author (one line)>'
+ORGANIZATION_C='<organization of PR author (multiple lines)>'
+SYNOPSIS_C='<synopsis of the problem (one line)>'
+if [ -z "$SEVERITY_C" ]; then
+ SEVERITY_C='<[ non-critical | serious | critical ] (one line)>'
+fi
+PRIORITY_C='<[ low | medium ] (one line)>'
+CATEGORY_C='<choose from the top of this file (one line)>'
+RELEASE_C='<release number or tag (one line)>'
+ENVIRONMENT_C='<machine, os, target, libraries (multiple lines)>'
+DESCRIPTION_C='<precise description of the problem (multiple lines)>'
+HOW_TO_REPEAT_C='<When reporting a compiler error, preprocessor output must be included>'
+FIX_C='<how to correct or work around the problem, if known (multiple lines)>'
+
+# Catch some signals. ($xs kludge needed by Sun /bin/sh)
+xs=0
+trap '$REMOVE_TEMP; exit $xs' 0
+trap 'echo "$COMMAND: Aborting ..."; $REMOVE_TEMP; xs=1; exit' 1 3 13 15
+
+# If they told us to use a specific file, then do so.
+if [ -n "$IN_FILE" ]; then
+ if [ "$IN_FILE" = "-" ]; then
+ # The PR is coming from the standard input.
+ if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+ sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" > $TEMP
+ else
+ cat > $TEMP
+ fi
+ else
+ # Use the file they named.
+ if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+ sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" $IN_FILE > $TEMP
+ else
+ cat $IN_FILE > $TEMP
+ fi
+ fi
+else
+
+ if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+ # If their PR_FORM points to a bogus entry, then bail.
+ if [ ! -f "$PR_FORM" -o ! -r "$PR_FORM" -o ! -s "$PR_FORM" ]; then
+ echo "$COMMAND: can't seem to read your template file (\`$PR_FORM'), ignoring PR_FORM"
+ sleep 1
+ PRINT_INTERN=bad_prform
+ fi
+ fi
+
+ if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+ cp $PR_FORM $TEMP ||
+ ( echo "$COMMAND: could not copy $PR_FORM" ; xs=1; exit )
+ else
+ for file in $TEMP $REF ; do
+ cat > $file << '__EOF__'
+SEND-PR: -*- send-pr -*-
+SEND-PR: Lines starting with `SEND-PR' will be removed automatically, as
+SEND-PR: will all comments (text enclosed in `<' and `>').
+SEND-PR:
+SEND-PR: Please consult the GCC manual if you are not sure how to
+SEND-PR: fill out a problem report.
+SEND-PR: Note that the Synopsis field is mandatory. The Subject (for
+SEND-PR: the mail) will be made the same as Synopsis unless explicitly
+SEND-PR: changed.
+SEND-PR:
+SEND-PR: Choose from the following categories:
+SEND-PR:
+__EOF__
+
+ # Format the categories so they fit onto lines.
+ l=`echo "$CATEGORIES" | \
+ awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+ END {print max + 1;}'`
+ c=`expr 61 / $l`
+ if [ $c -eq 0 ]; then c=1; fi
+ echo "$CATEGORIES" | \
+ awk 'BEGIN {printf "SEND-PR: "; i = 0 }
+ { printf ("%-'$l'.'$l's", $0);
+ if ((++i % '$c') == 0) { printf "\nSEND-PR: " } }
+ END { printf "\nSEND-PR:\n"; }' >> $file
+
+ cat >> $file << __EOF__
+To: $GNATS_ADDR
+Subject:
+From: $FROM
+Reply-To: $REPLYTO
+Cc: $CC
+X-send-pr-version: $VERSION
+X-GNATS-Notify:
+
+
+>Submitter-Id: $SUBMITTER
+>Originator: $ORIGINATOR
+>Organization: ${ORGANIZATION-$ORGANIZATION_C}
+>Confidential: no
+SEND-PR: Leave "Confidential" as "no"; all GCC PRs are public.
+>Synopsis: $SYNOPSIS_C
+>Severity: $SEVERITY_C
+SEND-PR: critical GCC is completely not operational; no work-around known.
+SEND-PR: serious GCC is not working properly; a work-around is possible.
+SEND-PR: non-critical Report indicates minor problem.
+>Priority: $PRIORITY_C
+SEND-PR: medium The problem should be solved in the next release.
+SEND-PR: low The problem should be solve in a future release.
+>Category: $CATEGORY_C
+>Class: <[ doc-bug | accepts-illegal | rejects-legal | wrong-code | ice-on-legal-code| ice-on-illegal-code | pessimizes-code | sw-bug | change-request | support ] (one line)>
+SEND-PR: doc-bug The documentation is incorrect.
+SEND-PR: accepts-illegal GCC fails to reject erroneous code.
+SEND-PR: rejects-legal GCC gives an error message for correct code.
+SEND-PR: wrong-code The machine code generated by gcc is incorrect.
+SEND-PR: ice-on-legal-code GCC gives an Internal Compiler Error (ICE)
+SEND-PR: for correct code
+SEND-PR: ice-on-illegal-code GCC gives an ICE instead of reporting an error
+SEND-PR: pessimizes-code GCC misses an important optimization opportunity
+SEND-PR: sw-bug Software bug of some other class than above
+SEND-PR: change-request A feature in GCC is missing.
+SEND-PR: support I need help with gcc.
+>Release: ${DEFAULT_RELEASE-$RELEASE_C}
+>Environment:
+`[ -n "$SYSTEM" ] && echo System: $SYSTEM`
+`[ -n "$ARCH" ] && echo Architecture: $ARCH`
+`[ -n "$MACHINE" ] && echo Machine: $MACHINE`
+ $ENVIRONMENT_C
+host: i686-pc-linux-gnu
+build: i686-pc-linux-gnu
+target: arm-unknown-linux-androideabi
+__EOF__
+ cat >> $file << \__EOF__
+configured with: /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../gcc/gcc-4.4.3/configure --prefix=/usr/local --target=arm-linux-androideabi --host=i686-linux-gnu --build=i686-linux-gnu --with-gnu-as --with-gnu-ld --enable-languages=c,c++ --with-gmp=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/build/temp-install --with-mpfr=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/build/temp-install --disable-libssp --enable-threads --disable-nls --disable-libmudflap --disable-libgomp --disable-sjlj-exceptions --disable-shared --disable-tls --with-float=soft --with-fpu=vfp --with-arch=armv5te --enable-target-optspace --disable-hosted-libstdcxx --enable-cxx-flags='-fexceptions -frtti' --with-gcc-version=4.4.3 --with-binutils-version=2.20.1 --with-gmp-version=4.2.4 --with-mpfr-version=2.4.1 --with-gdb-version=7.1.x --with-arch=armv5te --with-sysroot=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/arm-linux-androideabi-4.4.x/sysroot --with-gold-version=20100303 --enable-gold=both/gold --program-transform-name='s,^,arm-linux-androideabi-,'
+__EOF__
+ cat >> $file << __EOF__
+>Description:
+ $DESCRIPTION_C
+>How-To-Repeat:
+ $HOW_TO_REPEAT_C
+>Fix:
+ $FIX_C
+__EOF__
+ done
+ fi
+
+ if [ "$PRINT" = true -o "$PRINT_INTERN" = true ]; then
+ cat $TEMP
+ xs=0; exit
+ fi
+
+ chmod u+w $TEMP
+ if [ -z "$REQUEST_ID" ]; then
+ eval $EDIT $TEMP
+ else
+ ed -s $TEMP << '__EOF__'
+/^Subject/s/^Subject:.*/Subject: request for a customer id/
+/^>Category/s/^>Category:.*/>Category: send-pr/
+w
+q
+__EOF__
+ fi
+
+ if cmp -s $REF $TEMP ; then
+ echo "$COMMAND: problem report not filled out, therefore not sent"
+ xs=1; exit
+ fi
+fi
+
+#
+# Check the enumeration fields
+
+# This is a "sed-subroutine" with one keyword parameter
+# (with workaround for Sun sed bug)
+#
+SED_CMD='
+/$PATTERN/{
+s|||
+s|<.*>||
+s|^[ ]*||
+s|[ ]*$||
+p
+q
+}'
+
+
+while [ -z "$REQUEST_ID" ]; do
+ CNT=0
+
+ # 1) Confidential
+ #
+ PATTERN=">Confidential:"
+ CONFIDENTIAL=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$CONFIDENTIAL" in
+ no) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$CONFIDENTIAL' is not a valid value for \`Confidential'." ;;
+ esac
+ #
+ # 2) Severity
+ #
+ PATTERN=">Severity:"
+ SEVERITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$SEVERITY" in
+ ""|non-critical|serious|critical) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$SEVERITY' is not a valid value for \`Severity'."
+ esac
+ #
+ # 3) Priority
+ #
+ PATTERN=">Priority:"
+ PRIORITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$PRIORITY" in
+ ""|low|medium) CNT=`expr $CNT + 1` ;;
+ high) echo "$COMMAND: \`Priority: high' is reserved for GCC maintainers." ;;
+ *) echo "$COMMAND: \`$PRIORITY' is not a valid value for \`Priority'."
+ esac
+ #
+ # 4) Category
+ #
+ PATTERN=">Category:"
+ CATEGORY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ FOUND=
+ for C in $CATEGORIES
+ do
+ if [ "$C" = "$CATEGORY" ]; then FOUND=true ; break ; fi
+ done
+ if [ -n "$FOUND" ]; then
+ CNT=`expr $CNT + 1`
+ else
+ if [ -z "$CATEGORY" ]; then
+ echo "$COMMAND: you must include a Category: field in your report."
+ else
+ echo "$COMMAND: \`$CATEGORY' is not a known category."
+ fi
+ fi
+ #
+ # 5) Class
+ #
+ PATTERN=">Class:"
+ CLASS=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+ case "$CLASS" in
+ ""|doc-bug|accepts-illegal|rejects-legal|wrong-code|ice-on-legal-code|ice-on-illegal-code|pessimizes-code|sw-bug|change-request|support) CNT=`expr $CNT + 1` ;;
+ *) echo "$COMMAND: \`$CLASS' is not a valid value for \`Class'."
+ esac
+ #
+ # 6) Check that synopsis is not empty
+ #
+ if grep "^>Synopsis:[ ]*${SYNOPSIS_C}\$" $TEMP > /dev/null
+ then
+ echo "$COMMAND: Synopsis must not be empty."
+ else
+ CNT=`expr $CNT + 1`
+ fi
+
+ [ $CNT -lt 6 -a -z "$BATCH" ] &&
+ echo "Errors were found with the problem report."
+
+ while true; do
+ if [ -z "$BATCH" ]; then
+ $ECHON1 "a)bort, e)dit or s)end? $ECHON2"
+ read input
+ else
+ if [ $CNT -eq 6 ]; then
+ input=s
+ else
+ input=a
+ fi
+ fi
+ case "$input" in
+ a*)
+ if [ -z "$BATCH" ]; then
+ echo "$COMMAND: the problem report remains in $BAD and is not sent."
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+ mv $TEMP $BAD
+ else
+ echo "$COMMAND: the problem report is not sent."
+ fi
+ xs=1; exit
+ ;;
+ e*)
+ eval $EDIT $TEMP
+ continue 2
+ ;;
+ s*)
+ break 2
+ ;;
+ esac
+ done
+done
+
+#
+# Make sure the mail has got a Subject. If not, use the same as
+# in Synopsis.
+#
+
+if grep '^Subject:[ ]*$' $TEMP > /dev/null
+then
+ SYNOPSIS=`grep '^>Synopsis:' $TEMP | sed -e 's/^>Synopsis:[ ]*//'`
+ ed -s $TEMP << __EOF__
+/^Subject:/s/:.*\$/: $SYNOPSIS/
+w
+q
+__EOF__
+fi
+
+#
+# Remove comments and send the problem report
+# (we have to use patterns, where the comment contains regex chars)
+#
+# /^>Originator:/s;$ORIGINATOR;;
+sed -e "
+/^SEND-PR:/d
+/^>Organization:/,/^>[A-Za-z-]*:/s;$ORGANIZATION_C;;
+/^>Confidential:/s;<.*>;;
+/^>Synopsis:/s;$SYNOPSIS_C;;
+/^>Severity:/s;<.*>;;
+/^>Priority:/s;<.*>;;
+/^>Category:/s;$CATEGORY_C;;
+/^>Class:/s;<.*>;;
+/^>Release:/,/^>[A-Za-z-]*:/s;$RELEASE_C;;
+/^>Environment:/,/^>[A-Za-z-]*:/s;$ENVIRONMENT_C;;
+/^>Description:/,/^>[A-Za-z-]*:/s;$DESCRIPTION_C;;
+/^>How-To-Repeat:/,/^>[A-Za-z-]*:/s;$HOW_TO_REPEAT_C;;
+/^>Fix:/,/^>[A-Za-z-]*:/s;$FIX_C;;
+" $TEMP > $REF
+
+if $MAIL_AGENT < $REF; then
+ echo "$COMMAND: problem report sent"
+ xs=0; exit
+else
+ echo "$COMMAND: mysterious mail failure."
+ if [ -z "$BATCH" ]; then
+ echo "$COMMAND: the problem report remains in $BAD and is not sent."
+ REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+ mv $REF $BAD
+ else
+ echo "$COMMAND: the problem report is not sent."
+ fi
+ xs=1; exit
+fi
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov
new file mode 100755
index 0000000..4e91972
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gcov
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb
new file mode 100755
index 0000000..2522d86
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdb
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui
new file mode 100755
index 0000000..5e12a9c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gdbtui
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gprof b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gprof
new file mode 100755
index 0000000..21e127b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-gprof
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld
new file mode 100755
index 0000000..b39b773
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd
new file mode 100755
index 0000000..36add29
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.bfd
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold
new file mode 100755
index 0000000..b39b773
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ld.gold
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm
new file mode 100755
index 0000000..1649860
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-nm
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy
new file mode 100755
index 0000000..1c644fb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objcopy
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump
new file mode 100755
index 0000000..de39a37
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-objdump
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib
new file mode 100755
index 0000000..6a0264b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-ranlib
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf
new file mode 100755
index 0000000..16e2faa
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-readelf
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-run b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-run
new file mode 100755
index 0000000..9db29e2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-run
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-size b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-size
new file mode 100755
index 0000000..d1826c3
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-size
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strings b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strings
new file mode 100755
index 0000000..203a6a0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strings
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strip b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strip
new file mode 100755
index 0000000..8efe809
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/bin/arm-linux-androideabi-strip
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h
new file mode 100644
index 0000000..86b0944
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/ansidecl.h
@@ -0,0 +1,423 @@
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
+ 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ ANSI_PROTOTYPES 1 not defined
+ PTR `void *' `char *'
+ PTRCONST `void *const' `char *'
+ LONG_DOUBLE `long double' `double'
+ const not defined `'
+ volatile not defined `'
+ signed not defined `'
+ VA_START(ap, var) va_start(ap, var) va_start(ap)
+
+ Note that it is safe to write "void foo();" indicating a function
+ with no return value, in all K+R compilers we have been able to test.
+
+ For declaring functions with prototypes, we also provide these:
+
+ PARAMS ((prototype))
+ -- for functions which take a fixed number of arguments. Use this
+ when declaring the function. When defining the function, write a
+ K+R style argument list. For example:
+
+ char *strcpy PARAMS ((char *dest, char *source));
+ ...
+ char *
+ strcpy (dest, source)
+ char *dest;
+ char *source;
+ { ... }
+
+
+ VPARAMS ((prototype, ...))
+ -- for functions which take a variable number of arguments. Use
+ PARAMS to declare the function, VPARAMS to define it. For example:
+
+ int printf PARAMS ((const char *format, ...));
+ ...
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ ...
+ }
+
+ For writing functions which take variable numbers of arguments, we
+ also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These
+ hide the differences between K+R <varargs.h> and C89 <stdarg.h> more
+ thoroughly than the simple VA_START() macro mentioned above.
+
+ VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end.
+ Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls
+ corresponding to the list of fixed arguments. Then use va_arg
+ normally to get the variable arguments, or pass your va_list object
+ around. You do not declare the va_list yourself; VA_OPEN does it
+ for you.
+
+ Here is a complete example:
+
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ int result;
+
+ VA_OPEN (ap, format);
+ VA_FIXEDARG (ap, const char *, format);
+
+ result = vfprintf (stdout, format, ap);
+ VA_CLOSE (ap);
+
+ return result;
+ }
+
+
+ You can declare variables either before or after the VA_OPEN,
+ VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning
+ and end of a block. They must appear at the same nesting level,
+ and any variables declared after VA_OPEN go out of scope at
+ VA_CLOSE. Unfortunately, with a K+R compiler, that includes the
+ argument list. You can have multiple instances of VA_OPEN/VA_CLOSE
+ pairs in a single function in case you need to traverse the
+ argument list more than once.
+
+ For ease of writing code which uses GCC extensions but needs to be
+ portable to other compilers, we provide the GCC_VERSION macro that
+ simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various
+ wrappers around __attribute__. Also, __extension__ will be #defined
+ to nothing if it doesn't work. See below.
+
+ This header also defines a lot of obsolete macros:
+ CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID,
+ AND, DOTS, NOARGS. Don't use them. */
+
+#ifndef _ANSIDECL_H
+#define _ANSIDECL_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+/* Using MACRO(x,y) in cpp #if conditionals does not work with some
+ older preprocessors. Thus we can't define something like this:
+
+#define HAVE_GCC_VERSION(MAJOR, MINOR) \
+ (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR)))
+
+and then test "#if HAVE_GCC_VERSION(2,7)".
+
+So instead we use the macro below and test it against specific values. */
+
+/* This macro simplifies testing whether we are using gcc, and if it
+ is of a particular minimum version. (Both major & minor numbers are
+ significant.) This macro will evaluate to 0 if we are not using
+ gcc at all. */
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
+#endif /* GCC_VERSION */
+
+#if defined (__STDC__) || defined(__cplusplus) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32)
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other
+ C++ compilers, does not define __STDC__, though it acts as if this
+ was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */
+
+#define ANSI_PROTOTYPES 1
+#define PTR void *
+#define PTRCONST void *const
+#define LONG_DOUBLE long double
+
+/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in
+ a #ifndef. */
+#ifndef PARAMS
+#define PARAMS(ARGS) ARGS
+#endif
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR)
+
+/* variadic function helper macros */
+/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's
+ use without inhibiting further decls and without declaring an
+ actual variable. */
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, T, N) struct Qdmy
+
+#undef const
+#undef volatile
+#undef signed
+
+/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
+ it too, but it's not in C89. */
+#undef inline
+#if __STDC_VERSION__ > 199901L || defined(__cplusplus)
+/* it's a keyword */
+#else
+# if GCC_VERSION >= 2007
+# define inline __inline__ /* __inline__ prevents -pedantic warnings */
+# else
+# define inline /* nothing */
+# endif
+#endif
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define VOLATILE volatile
+#define SIGNED signed
+
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#define AND ,
+#define DOTS , ...
+#define NOARGS void
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#undef ANSI_PROTOTYPES
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#define PARAMS(args) ()
+#define VPARAMS(args) (va_alist) va_dcl
+#define VA_START(va_list, var) va_start(va_list)
+
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE)
+
+/* some systems define these in header files for non-ansi mode */
+#undef const
+#undef volatile
+#undef signed
+#undef inline
+#define const
+#define volatile
+#define signed
+#define inline
+
+#ifndef IN_GCC
+#define CONST
+#define VOLATILE
+#define SIGNED
+
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#define AND ;
+#define DOTS
+#define NOARGS
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+/* Define macros for some gcc attributes. This permits us to use the
+ macros freely, and know that they will come into play for the
+ version of gcc in which they are supported. */
+
+#if (GCC_VERSION < 2007)
+# define __attribute__(x)
+#endif
+
+/* Attribute __malloc__ on functions was valid as of gcc 2.96. */
+#ifndef ATTRIBUTE_MALLOC
+# if (GCC_VERSION >= 2096)
+# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__))
+# else
+# define ATTRIBUTE_MALLOC
+# endif /* GNUC >= 2.96 */
+#endif /* ATTRIBUTE_MALLOC */
+
+/* Attributes on labels were valid as of gcc 2.93 and g++ 4.5. For
+ g++ an attribute on a label must be followed by a semicolon. */
+#ifndef ATTRIBUTE_UNUSED_LABEL
+# ifndef __cplusplus
+# if GCC_VERSION >= 2093
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif
+# else
+# if GCC_VERSION >= 4005
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED ;
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif
+# endif
+#endif
+
+#ifndef ATTRIBUTE_UNUSED
+#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+#endif /* ATTRIBUTE_UNUSED */
+
+/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the
+ identifier name. */
+#if ! defined(__cplusplus) || (GCC_VERSION >= 3004)
+# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED
+#else /* !__cplusplus || GNUC >= 3.4 */
+# define ARG_UNUSED(NAME) NAME
+#endif /* !__cplusplus || GNUC >= 3.4 */
+
+#ifndef ATTRIBUTE_NORETURN
+#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__))
+#endif /* ATTRIBUTE_NORETURN */
+
+/* Attribute `nonnull' was valid as of gcc 3.3. */
+#ifndef ATTRIBUTE_NONNULL
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m)))
+# else
+# define ATTRIBUTE_NONNULL(m)
+# endif /* GNUC >= 3.3 */
+#endif /* ATTRIBUTE_NONNULL */
+
+/* Attribute `pure' was valid as of gcc 3.0. */
+#ifndef ATTRIBUTE_PURE
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_PURE __attribute__ ((__pure__))
+# else
+# define ATTRIBUTE_PURE
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_PURE */
+
+/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL.
+ This was the case for the `printf' format attribute by itself
+ before GCC 3.3, but as of 3.3 we need to add the `nonnull'
+ attribute to retain this behavior. */
+#ifndef ATTRIBUTE_PRINTF
+#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m)
+#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2)
+#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3)
+#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4)
+#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5)
+#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6)
+#endif /* ATTRIBUTE_PRINTF */
+
+/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on
+ a function pointer. Format attributes were allowed on function
+ pointers as of gcc 3.1. */
+#ifndef ATTRIBUTE_FPTR_PRINTF
+# if (GCC_VERSION >= 3001)
+# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n)
+# else
+# define ATTRIBUTE_FPTR_PRINTF(m, n)
+# endif /* GNUC >= 3.1 */
+# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2)
+# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3)
+# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4)
+# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5)
+# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6)
+#endif /* ATTRIBUTE_FPTR_PRINTF */
+
+/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A
+ NULL format specifier was allowed as of gcc 3.3. */
+#ifndef ATTRIBUTE_NULL_PRINTF
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n)))
+# else
+# define ATTRIBUTE_NULL_PRINTF(m, n)
+# endif /* GNUC >= 3.3 */
+# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2)
+# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3)
+# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4)
+# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5)
+# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6)
+#endif /* ATTRIBUTE_NULL_PRINTF */
+
+/* Attribute `sentinel' was valid as of gcc 3.5. */
+#ifndef ATTRIBUTE_SENTINEL
+# if (GCC_VERSION >= 3005)
+# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__))
+# else
+# define ATTRIBUTE_SENTINEL
+# endif /* GNUC >= 3.5 */
+#endif /* ATTRIBUTE_SENTINEL */
+
+
+#ifndef ATTRIBUTE_ALIGNED_ALIGNOF
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m))))
+# else
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m)
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */
+
+/* Useful for structures whose layout must much some binary specification
+ regardless of the alignment and padding qualities of the compiler. */
+#ifndef ATTRIBUTE_PACKED
+# define ATTRIBUTE_PACKED __attribute__ ((packed))
+#endif
+
+/* Attribute `hot' and `cold' was valid as of gcc 4.3. */
+#ifndef ATTRIBUTE_COLD
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_COLD __attribute__ ((__cold__))
+# else
+# define ATTRIBUTE_COLD
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_COLD */
+#ifndef ATTRIBUTE_HOT
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_HOT __attribute__ ((__hot__))
+# else
+# define ATTRIBUTE_HOT
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_HOT */
+
+/* We use __extension__ in some places to suppress -pedantic warnings
+ about GCC extensions. This feature didn't work properly before
+ gcc 2.8. */
+#if GCC_VERSION < 2008
+#define __extension__
+#endif
+
+/* This is used to declare a const variable which should be visible
+ outside of the current compilation unit. Use it as
+ EXPORTED_CONST int i = 1;
+ This is because the semantics of const are different in C and C++.
+ "extern const" is permitted in C but it looks strange, and gcc
+ warns about it when -Wc++-compat is not used. */
+#ifdef __cplusplus
+#define EXPORTED_CONST extern const
+#else
+#define EXPORTED_CONST const
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ansidecl.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h
new file mode 100644
index 0000000..6024a88
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfd.h
@@ -0,0 +1,5725 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- This file is automatically
+ generated from "bfd-in.h", "init.c", "opncls.c", "libbfd.c",
+ "bfdio.c", "bfdwin.c", "section.c", "archures.c", "reloc.c",
+ "syms.c", "bfd.c", "archive.c", "corefile.c", "targets.c", "format.c",
+ "linker.c", "simple.c" and "compress.c".
+ Run "make headers" in your build bfd/ to regenerate. */
+
+/* Main header file for the bfd library -- portable access to object files.
+
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
+
+ Contributed by Cygnus Support.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef __BFD_H_SEEN__
+#define __BFD_H_SEEN__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+#include "symcat.h"
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#ifndef SABER
+/* This hack is to avoid a problem with some strict ANSI C preprocessors.
+ The problem is, "32_" is not a valid preprocessing token, and we don't
+ want extra underscores (e.g., "nlm_32_"). The XCONCAT2 macro will
+ cause the inner CONCAT2 macros to be evaluated first, producing
+ still-valid pp-tokens. Then the final concatenation can be done. */
+#undef CONCAT4
+#define CONCAT4(a,b,c,d) XCONCAT2(CONCAT2(a,b),CONCAT2(c,d))
+#endif
+#endif
+
+/* This is a utility macro to handle the situation where the code
+ wants to place a constant string into the code, followed by a
+ comma and then the length of the string. Doing this by hand
+ is error prone, so using this macro is safer. */
+#define STRING_COMMA_LEN(STR) (STR), (sizeof (STR) - 1)
+/* Unfortunately it is not possible to use the STRING_COMMA_LEN macro
+ to create the arguments to another macro, since the preprocessor
+ will mis-count the number of arguments to the outer macro (by not
+ evaluating STRING_COMMA_LEN and so missing the comma). This is a
+ problem for example when trying to use STRING_COMMA_LEN to build
+ the arguments to the strncmp() macro. Hence this alternative
+ definition of strncmp is provided here.
+
+ Note - these macros do NOT work if STR2 is not a constant string. */
+#define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0)
+ /* strcpy() can have a similar problem, but since we know we are
+ copying a constant string, we can use memcpy which will be faster
+ since there is no need to check for a NUL byte inside STR. We
+ can also save time if we do not need to copy the terminating NUL. */
+#define LITMEMCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2) - 1)
+#define LITSTRCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2))
+
+
+#define BFD_SUPPORTS_PLUGINS 0
+
+/* The word size used by BFD on the host. This may be 64 with a 32
+ bit target if the host is 64 bit, or if other 64 bit targets have
+ been selected with --enable-targets, or if --enable-64-bit-bfd. */
+#define BFD_ARCH_SIZE 32
+
+/* The word size of the default bfd target. */
+#define BFD_DEFAULT_TARGET_SIZE 32
+
+#define BFD_HOST_64BIT_LONG 0
+#define BFD_HOST_64BIT_LONG_LONG 1
+#if 1
+#define BFD_HOST_64_BIT long long
+#define BFD_HOST_U_64_BIT unsigned long long
+typedef BFD_HOST_64_BIT bfd_int64_t;
+typedef BFD_HOST_U_64_BIT bfd_uint64_t;
+#endif
+
+#if BFD_ARCH_SIZE >= 64
+#define BFD64
+#endif
+
+#ifndef INLINE
+#if __GNUC__ >= 2
+#define INLINE __inline__
+#else
+#define INLINE
+#endif
+#endif
+
+/* Declaring a type wide enough to hold a host long and a host pointer. */
+#define BFD_HOSTPTR_T unsigned long
+typedef BFD_HOSTPTR_T bfd_hostptr_t;
+
+/* Forward declaration. */
+typedef struct bfd bfd;
+
+/* Boolean type used in bfd. Too many systems define their own
+ versions of "boolean" for us to safely typedef a "boolean" of
+ our own. Using an enum for "bfd_boolean" has its own set of
+ problems, with strange looking casts required to avoid warnings
+ on some older compilers. Thus we just use an int.
+
+ General rule: Functions which are bfd_boolean return TRUE on
+ success and FALSE on failure (unless they're a predicate). */
+
+typedef int bfd_boolean;
+#undef FALSE
+#undef TRUE
+#define FALSE 0
+#define TRUE 1
+
+#ifdef BFD64
+
+#ifndef BFD_HOST_64_BIT
+ #error No 64 bit integer type available
+#endif /* ! defined (BFD_HOST_64_BIT) */
+
+typedef BFD_HOST_U_64_BIT bfd_vma;
+typedef BFD_HOST_64_BIT bfd_signed_vma;
+typedef BFD_HOST_U_64_BIT bfd_size_type;
+typedef BFD_HOST_U_64_BIT symvalue;
+
+#if BFD_HOST_64BIT_LONG
+#define BFD_VMA_FMT "l"
+#elif defined (__MSVCRT__)
+#define BFD_VMA_FMT "I64"
+#else
+#define BFD_VMA_FMT "ll"
+#endif
+
+#ifndef fprintf_vma
+#define sprintf_vma(s,x) sprintf (s, "%016" BFD_VMA_FMT "x", x)
+#define fprintf_vma(f,x) fprintf (f, "%016" BFD_VMA_FMT "x", x)
+#endif
+
+#else /* not BFD64 */
+
+/* Represent a target address. Also used as a generic unsigned type
+ which is guaranteed to be big enough to hold any arithmetic types
+ we need to deal with. */
+typedef unsigned long bfd_vma;
+
+/* A generic signed type which is guaranteed to be big enough to hold any
+ arithmetic types we need to deal with. Can be assumed to be compatible
+ with bfd_vma in the same way that signed and unsigned ints are compatible
+ (as parameters, in assignment, etc). */
+typedef long bfd_signed_vma;
+
+typedef unsigned long symvalue;
+typedef unsigned long bfd_size_type;
+
+/* Print a bfd_vma x on stream s. */
+#define BFD_VMA_FMT "l"
+#define fprintf_vma(s,x) fprintf (s, "%08" BFD_VMA_FMT "x", x)
+#define sprintf_vma(s,x) sprintf (s, "%08" BFD_VMA_FMT "x", x)
+
+#endif /* not BFD64 */
+
+#define HALF_BFD_SIZE_TYPE \
+ (((bfd_size_type) 1) << (8 * sizeof (bfd_size_type) / 2))
+
+#ifndef BFD_HOST_64_BIT
+/* Fall back on a 32 bit type. The idea is to make these types always
+ available for function return types, but in the case that
+ BFD_HOST_64_BIT is undefined such a function should abort or
+ otherwise signal an error. */
+typedef bfd_signed_vma bfd_int64_t;
+typedef bfd_vma bfd_uint64_t;
+#endif
+
+/* An offset into a file. BFD always uses the largest possible offset
+ based on the build time availability of fseek, fseeko, or fseeko64. */
+typedef BFD_HOST_64_BIT file_ptr;
+typedef unsigned BFD_HOST_64_BIT ufile_ptr;
+
+extern void bfd_sprintf_vma (bfd *, char *, bfd_vma);
+extern void bfd_fprintf_vma (bfd *, void *, bfd_vma);
+
+#define printf_vma(x) fprintf_vma(stdout,x)
+#define bfd_printf_vma(abfd,x) bfd_fprintf_vma (abfd,stdout,x)
+
+typedef unsigned int flagword; /* 32 bits of flags */
+typedef unsigned char bfd_byte;
+
+/* File formats. */
+
+typedef enum bfd_format
+{
+ bfd_unknown = 0, /* File format is unknown. */
+ bfd_object, /* Linker/assembler/compiler output. */
+ bfd_archive, /* Object archive file. */
+ bfd_core, /* Core dump. */
+ bfd_type_end /* Marks the end; don't use it! */
+}
+bfd_format;
+
+/* Symbols and relocation. */
+
+/* A count of carsyms (canonical archive symbols). */
+typedef unsigned long symindex;
+
+/* How to perform a relocation. */
+typedef const struct reloc_howto_struct reloc_howto_type;
+
+#define BFD_NO_MORE_SYMBOLS ((symindex) ~0)
+
+/* General purpose part of a symbol X;
+ target specific parts are in libcoff.h, libaout.h, etc. */
+
+#define bfd_get_section(x) ((x)->section)
+#define bfd_get_output_section(x) ((x)->section->output_section)
+#define bfd_set_section(x,y) ((x)->section) = (y)
+#define bfd_asymbol_base(x) ((x)->section->vma)
+#define bfd_asymbol_value(x) (bfd_asymbol_base(x) + (x)->value)
+#define bfd_asymbol_name(x) ((x)->name)
+/*Perhaps future: #define bfd_asymbol_bfd(x) ((x)->section->owner)*/
+#define bfd_asymbol_bfd(x) ((x)->the_bfd)
+#define bfd_asymbol_flavour(x) \
+ (((x)->flags & BSF_SYNTHETIC) != 0 \
+ ? bfd_target_unknown_flavour \
+ : bfd_asymbol_bfd (x)->xvec->flavour)
+
+/* A canonical archive symbol. */
+/* This is a type pun with struct ranlib on purpose! */
+typedef struct carsym
+{
+ char *name;
+ file_ptr file_offset; /* Look here to find the file. */
+}
+carsym; /* To make these you call a carsymogen. */
+
+/* Used in generating armaps (archive tables of contents).
+ Perhaps just a forward definition would do? */
+struct orl /* Output ranlib. */
+{
+ char **name; /* Symbol name. */
+ union
+ {
+ file_ptr pos;
+ bfd *abfd;
+ } u; /* bfd* or file position. */
+ int namidx; /* Index into string table. */
+};
+
+/* Linenumber stuff. */
+typedef struct lineno_cache_entry
+{
+ unsigned int line_number; /* Linenumber from start of function. */
+ union
+ {
+ struct bfd_symbol *sym; /* Function name. */
+ bfd_vma offset; /* Offset into section. */
+ } u;
+}
+alent;
+
+/* Object and core file sections. */
+
+#define align_power(addr, align) \
+ (((addr) + ((bfd_vma) 1 << (align)) - 1) & ((bfd_vma) -1 << (align)))
+
+typedef struct bfd_section *sec_ptr;
+
+#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0)
+#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0)
+#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0)
+#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0)
+#define bfd_section_name(bfd, ptr) ((ptr)->name)
+#define bfd_section_size(bfd, ptr) ((ptr)->size)
+#define bfd_get_section_size(ptr) ((ptr)->size)
+#define bfd_section_vma(bfd, ptr) ((ptr)->vma)
+#define bfd_section_lma(bfd, ptr) ((ptr)->lma)
+#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power)
+#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0)
+#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata)
+
+#define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
+
+#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = TRUE), TRUE)
+#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),TRUE)
+#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE)
+/* Find the address one past the end of SEC. */
+#define bfd_get_section_limit(bfd, sec) \
+ (((sec)->rawsize ? (sec)->rawsize : (sec)->size) \
+ / bfd_octets_per_byte (bfd))
+
+/* Return TRUE if section has been discarded. */
+#define elf_discarded_section(sec) \
+ (!bfd_is_abs_section (sec) \
+ && bfd_is_abs_section ((sec)->output_section) \
+ && (sec)->sec_info_type != ELF_INFO_TYPE_MERGE \
+ && (sec)->sec_info_type != ELF_INFO_TYPE_JUST_SYMS)
+
+/* Forward define. */
+struct stat;
+
+typedef enum bfd_print_symbol
+{
+ bfd_print_symbol_name,
+ bfd_print_symbol_more,
+ bfd_print_symbol_all
+} bfd_print_symbol_type;
+
+/* Information about a symbol that nm needs. */
+
+typedef struct _symbol_info
+{
+ symvalue value;
+ char type;
+ const char *name; /* Symbol name. */
+ unsigned char stab_type; /* Stab type. */
+ char stab_other; /* Stab other. */
+ short stab_desc; /* Stab desc. */
+ const char *stab_name; /* String for stab type. */
+} symbol_info;
+
+/* Get the name of a stabs type code. */
+
+extern const char *bfd_get_stab_name (int);
+
+/* Hash table routines. There is no way to free up a hash table. */
+
+/* An element in the hash table. Most uses will actually use a larger
+ structure, and an instance of this will be the first field. */
+
+struct bfd_hash_entry
+{
+ /* Next entry for this hash code. */
+ struct bfd_hash_entry *next;
+ /* String being hashed. */
+ const char *string;
+ /* Hash code. This is the full hash code, not the index into the
+ table. */
+ unsigned long hash;
+};
+
+/* A hash table. */
+
+struct bfd_hash_table
+{
+ /* The hash array. */
+ struct bfd_hash_entry **table;
+ /* A function used to create new elements in the hash table. The
+ first entry is itself a pointer to an element. When this
+ function is first invoked, this pointer will be NULL. However,
+ having the pointer permits a hierarchy of method functions to be
+ built each of which calls the function in the superclass. Thus
+ each function should be written to allocate a new block of memory
+ only if the argument is NULL. */
+ struct bfd_hash_entry *(*newfunc)
+ (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
+ /* An objalloc for this hash table. This is a struct objalloc *,
+ but we use void * to avoid requiring the inclusion of objalloc.h. */
+ void *memory;
+ /* The number of slots in the hash table. */
+ unsigned int size;
+ /* The number of entries in the hash table. */
+ unsigned int count;
+ /* The size of elements. */
+ unsigned int entsize;
+ /* If non-zero, don't grow the hash table. */
+ unsigned int frozen:1;
+};
+
+/* Initialize a hash table. */
+extern bfd_boolean bfd_hash_table_init
+ (struct bfd_hash_table *,
+ struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
+ struct bfd_hash_table *,
+ const char *),
+ unsigned int);
+
+/* Initialize a hash table specifying a size. */
+extern bfd_boolean bfd_hash_table_init_n
+ (struct bfd_hash_table *,
+ struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
+ struct bfd_hash_table *,
+ const char *),
+ unsigned int, unsigned int);
+
+/* Free up a hash table. */
+extern void bfd_hash_table_free
+ (struct bfd_hash_table *);
+
+/* Look up a string in a hash table. If CREATE is TRUE, a new entry
+ will be created for this string if one does not already exist. The
+ COPY argument must be TRUE if this routine should copy the string
+ into newly allocated memory when adding an entry. */
+extern struct bfd_hash_entry *bfd_hash_lookup
+ (struct bfd_hash_table *, const char *, bfd_boolean create,
+ bfd_boolean copy);
+
+/* Insert an entry in a hash table. */
+extern struct bfd_hash_entry *bfd_hash_insert
+ (struct bfd_hash_table *, const char *, unsigned long);
+
+/* Replace an entry in a hash table. */
+extern void bfd_hash_replace
+ (struct bfd_hash_table *, struct bfd_hash_entry *old,
+ struct bfd_hash_entry *nw);
+
+/* Base method for creating a hash table entry. */
+extern struct bfd_hash_entry *bfd_hash_newfunc
+ (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
+
+/* Grab some space for a hash table entry. */
+extern void *bfd_hash_allocate
+ (struct bfd_hash_table *, unsigned int);
+
+/* Traverse a hash table in a random order, calling a function on each
+ element. If the function returns FALSE, the traversal stops. The
+ INFO argument is passed to the function. */
+extern void bfd_hash_traverse
+ (struct bfd_hash_table *,
+ bfd_boolean (*) (struct bfd_hash_entry *, void *),
+ void *info);
+
+/* Allows the default size of a hash table to be configured. New hash
+ tables allocated using bfd_hash_table_init will be created with
+ this size. */
+extern void bfd_hash_set_default_size (bfd_size_type);
+
+/* This structure is used to keep track of stabs in sections
+ information while linking. */
+
+struct stab_info
+{
+ /* A hash table used to hold stabs strings. */
+ struct bfd_strtab_hash *strings;
+ /* The header file hash table. */
+ struct bfd_hash_table includes;
+ /* The first .stabstr section. */
+ struct bfd_section *stabstr;
+};
+
+#define COFF_SWAP_TABLE (void *) &bfd_coff_std_swap_table
+
+/* User program access to BFD facilities. */
+
+/* Direct I/O routines, for programs which know more about the object
+ file than BFD does. Use higher level routines if possible. */
+
+extern bfd_size_type bfd_bread (void *, bfd_size_type, bfd *);
+extern bfd_size_type bfd_bwrite (const void *, bfd_size_type, bfd *);
+extern int bfd_seek (bfd *, file_ptr, int);
+extern file_ptr bfd_tell (bfd *);
+extern int bfd_flush (bfd *);
+extern int bfd_stat (bfd *, struct stat *);
+
+/* Deprecated old routines. */
+#if __GNUC__
+#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_read", __FILE__, __LINE__, __FUNCTION__), \
+ bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_write", __FILE__, __LINE__, __FUNCTION__), \
+ bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#else
+#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_read", (const char *) 0, 0, (const char *) 0), \
+ bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \
+ (warn_deprecated ("bfd_write", (const char *) 0, 0, (const char *) 0),\
+ bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD)))
+#endif
+extern void warn_deprecated (const char *, const char *, int, const char *);
+
+/* Cast from const char * to char * so that caller can assign to
+ a char * without a warning. */
+#define bfd_get_filename(abfd) ((char *) (abfd)->filename)
+#define bfd_get_cacheable(abfd) ((abfd)->cacheable)
+#define bfd_get_format(abfd) ((abfd)->format)
+#define bfd_get_target(abfd) ((abfd)->xvec->name)
+#define bfd_get_flavour(abfd) ((abfd)->xvec->flavour)
+#define bfd_family_coff(abfd) \
+ (bfd_get_flavour (abfd) == bfd_target_coff_flavour || \
+ bfd_get_flavour (abfd) == bfd_target_xcoff_flavour)
+#define bfd_big_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
+#define bfd_little_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_LITTLE)
+#define bfd_header_big_endian(abfd) \
+ ((abfd)->xvec->header_byteorder == BFD_ENDIAN_BIG)
+#define bfd_header_little_endian(abfd) \
+ ((abfd)->xvec->header_byteorder == BFD_ENDIAN_LITTLE)
+#define bfd_get_file_flags(abfd) ((abfd)->flags)
+#define bfd_applicable_file_flags(abfd) ((abfd)->xvec->object_flags)
+#define bfd_applicable_section_flags(abfd) ((abfd)->xvec->section_flags)
+#define bfd_my_archive(abfd) ((abfd)->my_archive)
+#define bfd_has_map(abfd) ((abfd)->has_armap)
+#define bfd_is_thin_archive(abfd) ((abfd)->is_thin_archive)
+
+#define bfd_valid_reloc_types(abfd) ((abfd)->xvec->valid_reloc_types)
+#define bfd_usrdata(abfd) ((abfd)->usrdata)
+
+#define bfd_get_start_address(abfd) ((abfd)->start_address)
+#define bfd_get_symcount(abfd) ((abfd)->symcount)
+#define bfd_get_outsymbols(abfd) ((abfd)->outsymbols)
+#define bfd_count_sections(abfd) ((abfd)->section_count)
+
+#define bfd_get_dynamic_symcount(abfd) ((abfd)->dynsymcount)
+
+#define bfd_get_symbol_leading_char(abfd) ((abfd)->xvec->symbol_leading_char)
+
+#define bfd_set_cacheable(abfd,bool) (((abfd)->cacheable = bool), TRUE)
+
+extern bfd_boolean bfd_cache_close
+ (bfd *abfd);
+/* NB: This declaration should match the autogenerated one in libbfd.h. */
+
+extern bfd_boolean bfd_cache_close_all (void);
+
+extern bfd_boolean bfd_record_phdr
+ (bfd *, unsigned long, bfd_boolean, flagword, bfd_boolean, bfd_vma,
+ bfd_boolean, bfd_boolean, unsigned int, struct bfd_section **);
+
+/* Byte swapping routines. */
+
+bfd_uint64_t bfd_getb64 (const void *);
+bfd_uint64_t bfd_getl64 (const void *);
+bfd_int64_t bfd_getb_signed_64 (const void *);
+bfd_int64_t bfd_getl_signed_64 (const void *);
+bfd_vma bfd_getb32 (const void *);
+bfd_vma bfd_getl32 (const void *);
+bfd_signed_vma bfd_getb_signed_32 (const void *);
+bfd_signed_vma bfd_getl_signed_32 (const void *);
+bfd_vma bfd_getb16 (const void *);
+bfd_vma bfd_getl16 (const void *);
+bfd_signed_vma bfd_getb_signed_16 (const void *);
+bfd_signed_vma bfd_getl_signed_16 (const void *);
+void bfd_putb64 (bfd_uint64_t, void *);
+void bfd_putl64 (bfd_uint64_t, void *);
+void bfd_putb32 (bfd_vma, void *);
+void bfd_putl32 (bfd_vma, void *);
+void bfd_putb16 (bfd_vma, void *);
+void bfd_putl16 (bfd_vma, void *);
+
+/* Byte swapping routines which take size and endiannes as arguments. */
+
+bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean);
+void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean);
+
+extern bfd_boolean bfd_section_already_linked_table_init (void);
+extern void bfd_section_already_linked_table_free (void);
+
+/* Externally visible ECOFF routines. */
+
+#if defined(__STDC__) || defined(ALMOST_STDC)
+struct ecoff_debug_info;
+struct ecoff_debug_swap;
+struct ecoff_extr;
+struct bfd_symbol;
+struct bfd_link_info;
+struct bfd_link_hash_entry;
+struct bfd_elf_version_tree;
+#endif
+extern bfd_vma bfd_ecoff_get_gp_value
+ (bfd * abfd);
+extern bfd_boolean bfd_ecoff_set_gp_value
+ (bfd *abfd, bfd_vma gp_value);
+extern bfd_boolean bfd_ecoff_set_regmasks
+ (bfd *abfd, unsigned long gprmask, unsigned long fprmask,
+ unsigned long *cprmask);
+extern void *bfd_ecoff_debug_init
+ (bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, struct bfd_link_info *);
+extern void bfd_ecoff_debug_free
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_accumulate
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, bfd *input_bfd,
+ struct ecoff_debug_info *input_debug,
+ const struct ecoff_debug_swap *input_swap, struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_accumulate_other
+ (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug,
+ const struct ecoff_debug_swap *output_swap, bfd *input_bfd,
+ struct bfd_link_info *);
+extern bfd_boolean bfd_ecoff_debug_externals
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, bfd_boolean relocatable,
+ bfd_boolean (*get_extr) (struct bfd_symbol *, struct ecoff_extr *),
+ void (*set_index) (struct bfd_symbol *, bfd_size_type));
+extern bfd_boolean bfd_ecoff_debug_one_external
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, const char *name,
+ struct ecoff_extr *esym);
+extern bfd_size_type bfd_ecoff_debug_size
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap);
+extern bfd_boolean bfd_ecoff_write_debug
+ (bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap, file_ptr where);
+extern bfd_boolean bfd_ecoff_write_accumulated_debug
+ (void *handle, bfd *abfd, struct ecoff_debug_info *debug,
+ const struct ecoff_debug_swap *swap,
+ struct bfd_link_info *info, file_ptr where);
+
+/* Externally visible ELF routines. */
+
+struct bfd_link_needed_list
+{
+ struct bfd_link_needed_list *next;
+ bfd *by;
+ const char *name;
+};
+
+enum dynamic_lib_link_class {
+ DYN_NORMAL = 0,
+ DYN_AS_NEEDED = 1,
+ DYN_DT_NEEDED = 2,
+ DYN_NO_ADD_NEEDED = 4,
+ DYN_NO_NEEDED = 8
+};
+
+enum notice_asneeded_action {
+ notice_as_needed,
+ notice_not_needed,
+ notice_needed
+};
+
+extern bfd_boolean bfd_elf_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *, bfd_boolean,
+ bfd_boolean);
+extern struct bfd_link_needed_list *bfd_elf_get_needed_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_elf_get_bfd_needed_list
+ (bfd *, struct bfd_link_needed_list **);
+extern bfd_boolean bfd_elf_size_dynamic_sections
+ (bfd *, const char *, const char *, const char *, const char * const *,
+ struct bfd_link_info *, struct bfd_section **,
+ struct bfd_elf_version_tree *);
+extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr
+ (bfd *, struct bfd_link_info *);
+extern void bfd_elf_set_dt_needed_name
+ (bfd *, const char *);
+extern const char *bfd_elf_get_dt_soname
+ (bfd *);
+extern void bfd_elf_set_dyn_lib_class
+ (bfd *, enum dynamic_lib_link_class);
+extern int bfd_elf_get_dyn_lib_class
+ (bfd *);
+extern struct bfd_link_needed_list *bfd_elf_get_runpath_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_elf_discard_info
+ (bfd *, struct bfd_link_info *);
+extern unsigned int _bfd_elf_default_action_discarded
+ (struct bfd_section *);
+
+/* Return an upper bound on the number of bytes required to store a
+ copy of ABFD's program header table entries. Return -1 if an error
+ occurs; bfd_get_error will return an appropriate code. */
+extern long bfd_get_elf_phdr_upper_bound
+ (bfd *abfd);
+
+/* Copy ABFD's program header table entries to *PHDRS. The entries
+ will be stored as an array of Elf_Internal_Phdr structures, as
+ defined in include/elf/internal.h. To find out how large the
+ buffer needs to be, call bfd_get_elf_phdr_upper_bound.
+
+ Return the number of program header table entries read, or -1 if an
+ error occurs; bfd_get_error will return an appropriate code. */
+extern int bfd_get_elf_phdrs
+ (bfd *abfd, void *phdrs);
+
+/* Create a new BFD as if by bfd_openr. Rather than opening a file,
+ reconstruct an ELF file by reading the segments out of remote memory
+ based on the ELF file header at EHDR_VMA and the ELF program headers it
+ points to. If not null, *LOADBASEP is filled in with the difference
+ between the VMAs from which the segments were read, and the VMAs the
+ file headers (and hence BFD's idea of each section's VMA) put them at.
+
+ The function TARGET_READ_MEMORY is called to copy LEN bytes from the
+ remote memory at target address VMA into the local buffer at MYADDR; it
+ should return zero on success or an `errno' code on failure. TEMPL must
+ be a BFD for an ELF target with the word size and byte order found in
+ the remote memory. */
+extern bfd *bfd_elf_bfd_from_remote_memory
+ (bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
+ int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len));
+
+/* Return the arch_size field of an elf bfd, or -1 if not elf. */
+extern int bfd_get_arch_size
+ (bfd *);
+
+/* Return TRUE if address "naturally" sign extends, or -1 if not elf. */
+extern int bfd_get_sign_extend_vma
+ (bfd *);
+
+extern struct bfd_section *_bfd_elf_tls_setup
+ (bfd *, struct bfd_link_info *);
+
+extern void _bfd_fix_excluded_sec_syms
+ (bfd *, struct bfd_link_info *);
+
+extern unsigned bfd_m68k_mach_to_features (int);
+
+extern int bfd_m68k_features_to_mach (unsigned);
+
+extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+extern void bfd_elf_m68k_set_target_options (struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_bfin_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+extern bfd_boolean bfd_cr16_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+/* SunOS shared library support routines for the linker. */
+
+extern struct bfd_link_needed_list *bfd_sunos_get_needed_list
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_sunos_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_sunos_size_dynamic_sections
+ (bfd *, struct bfd_link_info *, struct bfd_section **,
+ struct bfd_section **, struct bfd_section **);
+
+/* Linux shared library support routines for the linker. */
+
+extern bfd_boolean bfd_i386linux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_m68klinux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_sparclinux_size_dynamic_sections
+ (bfd *, struct bfd_link_info *);
+
+/* mmap hacks */
+
+struct _bfd_window_internal;
+typedef struct _bfd_window_internal bfd_window_internal;
+
+typedef struct _bfd_window
+{
+ /* What the user asked for. */
+ void *data;
+ bfd_size_type size;
+ /* The actual window used by BFD. Small user-requested read-only
+ regions sharing a page may share a single window into the object
+ file. Read-write versions shouldn't until I've fixed things to
+ keep track of which portions have been claimed by the
+ application; don't want to give the same region back when the
+ application wants two writable copies! */
+ struct _bfd_window_internal *i;
+}
+bfd_window;
+
+extern void bfd_init_window
+ (bfd_window *);
+extern void bfd_free_window
+ (bfd_window *);
+extern bfd_boolean bfd_get_file_window
+ (bfd *, file_ptr, bfd_size_type, bfd_window *, bfd_boolean);
+
+/* XCOFF support routines for the linker. */
+
+extern bfd_boolean bfd_xcoff_split_import_path
+ (bfd *, const char *, const char **, const char **);
+extern bfd_boolean bfd_xcoff_set_archive_import_path
+ (struct bfd_link_info *, bfd *, const char *);
+extern bfd_boolean bfd_xcoff_link_record_set
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_size_type);
+extern bfd_boolean bfd_xcoff_import_symbol
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_vma,
+ const char *, const char *, const char *, unsigned int);
+extern bfd_boolean bfd_xcoff_export_symbol
+ (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *);
+extern bfd_boolean bfd_xcoff_link_count_reloc
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_xcoff_record_link_assignment
+ (bfd *, struct bfd_link_info *, const char *);
+extern bfd_boolean bfd_xcoff_size_dynamic_sections
+ (bfd *, struct bfd_link_info *, const char *, const char *,
+ unsigned long, unsigned long, unsigned long, bfd_boolean,
+ int, bfd_boolean, unsigned int, struct bfd_section **, bfd_boolean);
+extern bfd_boolean bfd_xcoff_link_generate_rtinit
+ (bfd *, const char *, const char *, bfd_boolean);
+
+/* XCOFF support routines for ar. */
+extern bfd_boolean bfd_xcoff_ar_archive_set_magic
+ (bfd *, char *);
+
+/* Externally visible COFF routines. */
+
+#if defined(__STDC__) || defined(ALMOST_STDC)
+struct internal_syment;
+union internal_auxent;
+#endif
+
+extern bfd_boolean bfd_coff_get_syment
+ (bfd *, struct bfd_symbol *, struct internal_syment *);
+
+extern bfd_boolean bfd_coff_get_auxent
+ (bfd *, struct bfd_symbol *, int, union internal_auxent *);
+
+extern bfd_boolean bfd_coff_set_symbol_class
+ (bfd *, struct bfd_symbol *, unsigned int);
+
+extern bfd_boolean bfd_m68k_coff_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, char **);
+
+/* ARM VFP11 erratum workaround support. */
+typedef enum
+{
+ BFD_ARM_VFP11_FIX_DEFAULT,
+ BFD_ARM_VFP11_FIX_NONE,
+ BFD_ARM_VFP11_FIX_SCALAR,
+ BFD_ARM_VFP11_FIX_VECTOR
+} bfd_arm_vfp11_fix;
+
+extern void bfd_elf32_arm_init_maps
+ (bfd *);
+
+extern void bfd_elf32_arm_set_vfp11_fix
+ (bfd *, struct bfd_link_info *);
+
+extern void bfd_elf32_arm_set_cortex_a8_fix
+ (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_vfp11_erratum_scan
+ (bfd *, struct bfd_link_info *);
+
+extern void bfd_elf32_arm_vfp11_fix_veneer_locations
+ (bfd *, struct bfd_link_info *);
+
+/* ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_arm_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_arm_process_before_allocation
+ (bfd *, struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+/* PE ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_arm_pe_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_arm_pe_process_before_allocation
+ (bfd *, struct bfd_link_info *, int);
+
+extern bfd_boolean bfd_arm_pe_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+/* ELF ARM Interworking support. Called from linker. */
+extern bfd_boolean bfd_elf32_arm_allocate_interworking_sections
+ (struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_process_before_allocation
+ (bfd *, struct bfd_link_info *);
+
+void bfd_elf32_arm_set_target_relocs
+ (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
+ int, int, int, int);
+
+extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_add_glue_sections_to_bfd
+ (bfd *, struct bfd_link_info *);
+
+/* ELF ARM mapping symbol support */
+#define BFD_ARM_SPECIAL_SYM_TYPE_MAP (1 << 0)
+#define BFD_ARM_SPECIAL_SYM_TYPE_TAG (1 << 1)
+#define BFD_ARM_SPECIAL_SYM_TYPE_OTHER (1 << 2)
+#define BFD_ARM_SPECIAL_SYM_TYPE_ANY (~0)
+extern bfd_boolean bfd_is_arm_special_symbol_name
+ (const char * name, int type);
+
+extern void bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *, int);
+
+/* ARM Note section processing. */
+extern bfd_boolean bfd_arm_merge_machines
+ (bfd *, bfd *);
+
+extern bfd_boolean bfd_arm_update_notes
+ (bfd *, const char *);
+
+extern unsigned int bfd_arm_get_mach_from_notes
+ (bfd *, const char *);
+
+/* ARM stub generation support. Called from the linker. */
+extern int elf32_arm_setup_section_lists
+ (bfd *, struct bfd_link_info *);
+extern void elf32_arm_next_input_section
+ (struct bfd_link_info *, struct bfd_section *);
+extern bfd_boolean elf32_arm_size_stubs
+ (bfd *, bfd *, struct bfd_link_info *, bfd_signed_vma,
+ struct bfd_section * (*) (const char *, struct bfd_section *), void (*) (void));
+extern bfd_boolean elf32_arm_build_stubs
+ (struct bfd_link_info *);
+
+/* ARM unwind section editing support. */
+extern bfd_boolean elf32_arm_fix_exidx_coverage
+ (struct bfd_section **, unsigned int, struct bfd_link_info *);
+
+/* PowerPC @tls opcode transform/validate. */
+extern unsigned int _bfd_elf_ppc_at_tls_transform
+ (unsigned int, unsigned int);
+/* PowerPC @tprel opcode transform/validate. */
+extern unsigned int _bfd_elf_ppc_at_tprel_transform
+ (unsigned int, unsigned int);
+
+/* TI COFF load page support. */
+extern void bfd_ticoff_set_section_load_page
+ (struct bfd_section *, int);
+
+extern int bfd_ticoff_get_section_load_page
+ (struct bfd_section *);
+
+/* H8/300 functions. */
+extern bfd_vma bfd_h8300_pad_address
+ (bfd *, bfd_vma);
+
+/* IA64 Itanium code generation. Called from linker. */
+extern void bfd_elf32_ia64_after_parse
+ (int);
+
+extern void bfd_elf64_ia64_after_parse
+ (int);
+
+/* This structure is used for a comdat section, as in PE. A comdat
+ section is associated with a particular symbol. When the linker
+ sees a comdat section, it keeps only one of the sections with a
+ given name and associated with a given symbol. */
+
+struct coff_comdat_info
+{
+ /* The name of the symbol associated with a comdat section. */
+ const char *name;
+
+ /* The local symbol table index of the symbol associated with a
+ comdat section. This is only meaningful to the object file format
+ specific code; it is not an index into the list returned by
+ bfd_canonicalize_symtab. */
+ long symbol;
+};
+
+extern struct coff_comdat_info *bfd_coff_get_comdat_section
+ (bfd *, struct bfd_section *);
+
+/* Extracted from init.c. */
+void bfd_init (void);
+
+/* Extracted from opncls.c. */
+bfd *bfd_fopen (const char *filename, const char *target,
+ const char *mode, int fd);
+
+bfd *bfd_openr (const char *filename, const char *target);
+
+bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
+
+bfd *bfd_openstreamr (const char *, const char *, void *);
+
+bfd *bfd_openr_iovec (const char *filename, const char *target,
+ void *(*open) (struct bfd *nbfd,
+ void *open_closure),
+ void *open_closure,
+ file_ptr (*pread) (struct bfd *nbfd,
+ void *stream,
+ void *buf,
+ file_ptr nbytes,
+ file_ptr offset),
+ int (*close) (struct bfd *nbfd,
+ void *stream),
+ int (*stat) (struct bfd *abfd,
+ void *stream,
+ struct stat *sb));
+
+bfd *bfd_openw (const char *filename, const char *target);
+
+bfd_boolean bfd_close (bfd *abfd);
+
+bfd_boolean bfd_close_all_done (bfd *);
+
+bfd *bfd_create (const char *filename, bfd *templ);
+
+bfd_boolean bfd_make_writable (bfd *abfd);
+
+bfd_boolean bfd_make_readable (bfd *abfd);
+
+unsigned long bfd_calc_gnu_debuglink_crc32
+ (unsigned long crc, const unsigned char *buf, bfd_size_type len);
+
+char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
+
+struct bfd_section *bfd_create_gnu_debuglink_section
+ (bfd *abfd, const char *filename);
+
+bfd_boolean bfd_fill_in_gnu_debuglink_section
+ (bfd *abfd, struct bfd_section *sect, const char *filename);
+
+/* Extracted from libbfd.c. */
+
+/* Byte swapping macros for user section data. */
+
+#define bfd_put_8(abfd, val, ptr) \
+ ((void) (*((unsigned char *) (ptr)) = (val) & 0xff))
+#define bfd_put_signed_8 \
+ bfd_put_8
+#define bfd_get_8(abfd, ptr) \
+ (*(unsigned char *) (ptr) & 0xff)
+#define bfd_get_signed_8(abfd, ptr) \
+ (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80)
+
+#define bfd_put_16(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx16, ((val),(ptr)))
+#define bfd_put_signed_16 \
+ bfd_put_16
+#define bfd_get_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx16, (ptr))
+#define bfd_get_signed_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_16, (ptr))
+
+#define bfd_put_32(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx32, ((val),(ptr)))
+#define bfd_put_signed_32 \
+ bfd_put_32
+#define bfd_get_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx32, (ptr))
+#define bfd_get_signed_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_32, (ptr))
+
+#define bfd_put_64(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_putx64, ((val), (ptr)))
+#define bfd_put_signed_64 \
+ bfd_put_64
+#define bfd_get_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx64, (ptr))
+#define bfd_get_signed_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_getx_signed_64, (ptr))
+
+#define bfd_get(bits, abfd, ptr) \
+ ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \
+ : (bits) == 16 ? bfd_get_16 (abfd, ptr) \
+ : (bits) == 32 ? bfd_get_32 (abfd, ptr) \
+ : (bits) == 64 ? bfd_get_64 (abfd, ptr) \
+ : (abort (), (bfd_vma) - 1))
+
+#define bfd_put(bits, abfd, val, ptr) \
+ ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \
+ : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \
+ : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \
+ : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
+ : (abort (), (void) 0))
+
+
+/* Byte swapping macros for file header data. */
+
+#define bfd_h_put_8(abfd, val, ptr) \
+ bfd_put_8 (abfd, val, ptr)
+#define bfd_h_put_signed_8(abfd, val, ptr) \
+ bfd_put_8 (abfd, val, ptr)
+#define bfd_h_get_8(abfd, ptr) \
+ bfd_get_8 (abfd, ptr)
+#define bfd_h_get_signed_8(abfd, ptr) \
+ bfd_get_signed_8 (abfd, ptr)
+
+#define bfd_h_put_16(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx16, (val, ptr))
+#define bfd_h_put_signed_16 \
+ bfd_h_put_16
+#define bfd_h_get_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx16, (ptr))
+#define bfd_h_get_signed_16(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr))
+
+#define bfd_h_put_32(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx32, (val, ptr))
+#define bfd_h_put_signed_32 \
+ bfd_h_put_32
+#define bfd_h_get_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx32, (ptr))
+#define bfd_h_get_signed_32(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr))
+
+#define bfd_h_put_64(abfd, val, ptr) \
+ BFD_SEND (abfd, bfd_h_putx64, (val, ptr))
+#define bfd_h_put_signed_64 \
+ bfd_h_put_64
+#define bfd_h_get_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx64, (ptr))
+#define bfd_h_get_signed_64(abfd, ptr) \
+ BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr))
+
+/* Aliases for the above, which should eventually go away. */
+
+#define H_PUT_64 bfd_h_put_64
+#define H_PUT_32 bfd_h_put_32
+#define H_PUT_16 bfd_h_put_16
+#define H_PUT_8 bfd_h_put_8
+#define H_PUT_S64 bfd_h_put_signed_64
+#define H_PUT_S32 bfd_h_put_signed_32
+#define H_PUT_S16 bfd_h_put_signed_16
+#define H_PUT_S8 bfd_h_put_signed_8
+#define H_GET_64 bfd_h_get_64
+#define H_GET_32 bfd_h_get_32
+#define H_GET_16 bfd_h_get_16
+#define H_GET_8 bfd_h_get_8
+#define H_GET_S64 bfd_h_get_signed_64
+#define H_GET_S32 bfd_h_get_signed_32
+#define H_GET_S16 bfd_h_get_signed_16
+#define H_GET_S8 bfd_h_get_signed_8
+
+
+/* Extracted from bfdio.c. */
+long bfd_get_mtime (bfd *abfd);
+
+file_ptr bfd_get_size (bfd *abfd);
+
+void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len,
+ int prot, int flags, file_ptr offset);
+
+/* Extracted from bfdwin.c. */
+/* Extracted from section.c. */
+typedef struct bfd_section
+{
+ /* The name of the section; the name isn't a copy, the pointer is
+ the same as that passed to bfd_make_section. */
+ const char *name;
+
+ /* A unique sequence number. */
+ int id;
+
+ /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */
+ int index;
+
+ /* The next section in the list belonging to the BFD, or NULL. */
+ struct bfd_section *next;
+
+ /* The previous section in the list belonging to the BFD, or NULL. */
+ struct bfd_section *prev;
+
+ /* The field flags contains attributes of the section. Some
+ flags are read in from the object file, and some are
+ synthesized from other information. */
+ flagword flags;
+
+#define SEC_NO_FLAGS 0x000
+
+ /* Tells the OS to allocate space for this section when loading.
+ This is clear for a section containing debug information only. */
+#define SEC_ALLOC 0x001
+
+ /* Tells the OS to load the section from the file when loading.
+ This is clear for a .bss section. */
+#define SEC_LOAD 0x002
+
+ /* The section contains data still to be relocated, so there is
+ some relocation information too. */
+#define SEC_RELOC 0x004
+
+ /* A signal to the OS that the section contains read only data. */
+#define SEC_READONLY 0x008
+
+ /* The section contains code only. */
+#define SEC_CODE 0x010
+
+ /* The section contains data only. */
+#define SEC_DATA 0x020
+
+ /* The section will reside in ROM. */
+#define SEC_ROM 0x040
+
+ /* The section contains constructor information. This section
+ type is used by the linker to create lists of constructors and
+ destructors used by <<g++>>. When a back end sees a symbol
+ which should be used in a constructor list, it creates a new
+ section for the type of name (e.g., <<__CTOR_LIST__>>), attaches
+ the symbol to it, and builds a relocation. To build the lists
+ of constructors, all the linker has to do is catenate all the
+ sections called <<__CTOR_LIST__>> and relocate the data
+ contained within - exactly the operations it would peform on
+ standard data. */
+#define SEC_CONSTRUCTOR 0x080
+
+ /* The section has contents - a data section could be
+ <<SEC_ALLOC>> | <<SEC_HAS_CONTENTS>>; a debug section could be
+ <<SEC_HAS_CONTENTS>> */
+#define SEC_HAS_CONTENTS 0x100
+
+ /* An instruction to the linker to not output the section
+ even if it has information which would normally be written. */
+#define SEC_NEVER_LOAD 0x200
+
+ /* The section contains thread local data. */
+#define SEC_THREAD_LOCAL 0x400
+
+ /* The section has GOT references. This flag is only for the
+ linker, and is currently only used by the elf32-hppa back end.
+ It will be set if global offset table references were detected
+ in this section, which indicate to the linker that the section
+ contains PIC code, and must be handled specially when doing a
+ static link. */
+#define SEC_HAS_GOT_REF 0x800
+
+ /* The section contains common symbols (symbols may be defined
+ multiple times, the value of a symbol is the amount of
+ space it requires, and the largest symbol value is the one
+ used). Most targets have exactly one of these (which we
+ translate to bfd_com_section_ptr), but ECOFF has two. */
+#define SEC_IS_COMMON 0x1000
+
+ /* The section contains only debugging information. For
+ example, this is set for ELF .debug and .stab sections.
+ strip tests this flag to see if a section can be
+ discarded. */
+#define SEC_DEBUGGING 0x2000
+
+ /* The contents of this section are held in memory pointed to
+ by the contents field. This is checked by bfd_get_section_contents,
+ and the data is retrieved from memory if appropriate. */
+#define SEC_IN_MEMORY 0x4000
+
+ /* The contents of this section are to be excluded by the
+ linker for executable and shared objects unless those
+ objects are to be further relocated. */
+#define SEC_EXCLUDE 0x8000
+
+ /* The contents of this section are to be sorted based on the sum of
+ the symbol and addend values specified by the associated relocation
+ entries. Entries without associated relocation entries will be
+ appended to the end of the section in an unspecified order. */
+#define SEC_SORT_ENTRIES 0x10000
+
+ /* When linking, duplicate sections of the same name should be
+ discarded, rather than being combined into a single section as
+ is usually done. This is similar to how common symbols are
+ handled. See SEC_LINK_DUPLICATES below. */
+#define SEC_LINK_ONCE 0x20000
+
+ /* If SEC_LINK_ONCE is set, this bitfield describes how the linker
+ should handle duplicate sections. */
+#define SEC_LINK_DUPLICATES 0xc0000
+
+ /* This value for SEC_LINK_DUPLICATES means that duplicate
+ sections with the same name should simply be discarded. */
+#define SEC_LINK_DUPLICATES_DISCARD 0x0
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if there are any duplicate sections, although
+ it should still only link one copy. */
+#define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if any duplicate sections are a different size. */
+#define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000
+
+ /* This value for SEC_LINK_DUPLICATES means that the linker
+ should warn if any duplicate sections contain different
+ contents. */
+#define SEC_LINK_DUPLICATES_SAME_CONTENTS \
+ (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE)
+
+ /* This section was created by the linker as part of dynamic
+ relocation or other arcane processing. It is skipped when
+ going through the first-pass output, trusting that someone
+ else up the line will take care of it later. */
+#define SEC_LINKER_CREATED 0x100000
+
+ /* This section should not be subject to garbage collection.
+ Also set to inform the linker that this section should not be
+ listed in the link map as discarded. */
+#define SEC_KEEP 0x200000
+
+ /* This section contains "short" data, and should be placed
+ "near" the GP. */
+#define SEC_SMALL_DATA 0x400000
+
+ /* Attempt to merge identical entities in the section.
+ Entity size is given in the entsize field. */
+#define SEC_MERGE 0x800000
+
+ /* If given with SEC_MERGE, entities to merge are zero terminated
+ strings where entsize specifies character size instead of fixed
+ size entries. */
+#define SEC_STRINGS 0x1000000
+
+ /* This section contains data about section groups. */
+#define SEC_GROUP 0x2000000
+
+ /* The section is a COFF shared library section. This flag is
+ only for the linker. If this type of section appears in
+ the input file, the linker must copy it to the output file
+ without changing the vma or size. FIXME: Although this
+ was originally intended to be general, it really is COFF
+ specific (and the flag was renamed to indicate this). It
+ might be cleaner to have some more general mechanism to
+ allow the back end to control what the linker does with
+ sections. */
+#define SEC_COFF_SHARED_LIBRARY 0x4000000
+
+ /* This section contains data which may be shared with other
+ executables or shared objects. This is for COFF only. */
+#define SEC_COFF_SHARED 0x8000000
+
+ /* When a section with this flag is being linked, then if the size of
+ the input section is less than a page, it should not cross a page
+ boundary. If the size of the input section is one page or more,
+ it should be aligned on a page boundary. This is for TI
+ TMS320C54X only. */
+#define SEC_TIC54X_BLOCK 0x10000000
+
+ /* Conditionally link this section; do not link if there are no
+ references found to any symbol in the section. This is for TI
+ TMS320C54X only. */
+#define SEC_TIC54X_CLINK 0x20000000
+
+ /* Indicate that section has the no read flag set. This happens
+ when memory read flag isn't set. */
+#define SEC_COFF_NOREAD 0x40000000
+
+ /* End of section flags. */
+
+ /* Some internal packed boolean fields. */
+
+ /* See the vma field. */
+ unsigned int user_set_vma : 1;
+
+ /* A mark flag used by some of the linker backends. */
+ unsigned int linker_mark : 1;
+
+ /* Another mark flag used by some of the linker backends. Set for
+ output sections that have an input section. */
+ unsigned int linker_has_input : 1;
+
+ /* Mark flag used by some linker backends for garbage collection. */
+ unsigned int gc_mark : 1;
+
+ /* The following flags are used by the ELF linker. */
+
+ /* Mark sections which have been allocated to segments. */
+ unsigned int segment_mark : 1;
+
+ /* Type of sec_info information. */
+ unsigned int sec_info_type:3;
+#define ELF_INFO_TYPE_NONE 0
+#define ELF_INFO_TYPE_STABS 1
+#define ELF_INFO_TYPE_MERGE 2
+#define ELF_INFO_TYPE_EH_FRAME 3
+#define ELF_INFO_TYPE_JUST_SYMS 4
+
+ /* Nonzero if this section uses RELA relocations, rather than REL. */
+ unsigned int use_rela_p:1;
+
+ /* Bits used by various backends. The generic code doesn't touch
+ these fields. */
+
+ /* Nonzero if this section has TLS related relocations. */
+ unsigned int has_tls_reloc:1;
+
+ /* Nonzero if this section has a call to __tls_get_addr. */
+ unsigned int has_tls_get_addr_call:1;
+
+ /* Nonzero if this section has a gp reloc. */
+ unsigned int has_gp_reloc:1;
+
+ /* Nonzero if this section needs the relax finalize pass. */
+ unsigned int need_finalize_relax:1;
+
+ /* Whether relocations have been processed. */
+ unsigned int reloc_done : 1;
+
+ /* End of internal packed boolean fields. */
+
+ /* The virtual memory address of the section - where it will be
+ at run time. The symbols are relocated against this. The
+ user_set_vma flag is maintained by bfd; if it's not set, the
+ backend can assign addresses (for example, in <<a.out>>, where
+ the default address for <<.data>> is dependent on the specific
+ target and various flags). */
+ bfd_vma vma;
+
+ /* The load address of the section - where it would be in a
+ rom image; really only used for writing section header
+ information. */
+ bfd_vma lma;
+
+ /* The size of the section in octets, as it will be output.
+ Contains a value even if the section has no contents (e.g., the
+ size of <<.bss>>). */
+ bfd_size_type size;
+
+ /* For input sections, the original size on disk of the section, in
+ octets. This field should be set for any section whose size is
+ changed by linker relaxation. It is required for sections where
+ the linker relaxation scheme doesn't cache altered section and
+ reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing
+ targets), and thus the original size needs to be kept to read the
+ section multiple times. For output sections, rawsize holds the
+ section size calculated on a previous linker relaxation pass. */
+ bfd_size_type rawsize;
+
+ /* Relaxation table. */
+ struct relax_table *relax;
+
+ /* Count of used relaxation table entries. */
+ int relax_count;
+
+
+ /* If this section is going to be output, then this value is the
+ offset in *bytes* into the output section of the first byte in the
+ input section (byte ==> smallest addressable unit on the
+ target). In most cases, if this was going to start at the
+ 100th octet (8-bit quantity) in the output section, this value
+ would be 100. However, if the target byte size is 16 bits
+ (bfd_octets_per_byte is "2"), this value would be 50. */
+ bfd_vma output_offset;
+
+ /* The output section through which to map on output. */
+ struct bfd_section *output_section;
+
+ /* The alignment requirement of the section, as an exponent of 2 -
+ e.g., 3 aligns to 2^3 (or 8). */
+ unsigned int alignment_power;
+
+ /* If an input section, a pointer to a vector of relocation
+ records for the data in this section. */
+ struct reloc_cache_entry *relocation;
+
+ /* If an output section, a pointer to a vector of pointers to
+ relocation records for the data in this section. */
+ struct reloc_cache_entry **orelocation;
+
+ /* The number of relocation records in one of the above. */
+ unsigned reloc_count;
+
+ /* Information below is back end specific - and not always used
+ or updated. */
+
+ /* File position of section data. */
+ file_ptr filepos;
+
+ /* File position of relocation info. */
+ file_ptr rel_filepos;
+
+ /* File position of line data. */
+ file_ptr line_filepos;
+
+ /* Pointer to data for applications. */
+ void *userdata;
+
+ /* If the SEC_IN_MEMORY flag is set, this points to the actual
+ contents. */
+ unsigned char *contents;
+
+ /* Attached line number information. */
+ alent *lineno;
+
+ /* Number of line number records. */
+ unsigned int lineno_count;
+
+ /* Entity size for merging purposes. */
+ unsigned int entsize;
+
+ /* Points to the kept section if this section is a link-once section,
+ and is discarded. */
+ struct bfd_section *kept_section;
+
+ /* When a section is being output, this value changes as more
+ linenumbers are written out. */
+ file_ptr moving_line_filepos;
+
+ /* What the section number is in the target world. */
+ int target_index;
+
+ void *used_by_bfd;
+
+ /* If this is a constructor section then here is a list of the
+ relocations created to relocate items within it. */
+ struct relent_chain *constructor_chain;
+
+ /* The BFD which owns the section. */
+ bfd *owner;
+
+ /* A symbol which points at this section only. */
+ struct bfd_symbol *symbol;
+ struct bfd_symbol **symbol_ptr_ptr;
+
+ /* Early in the link process, map_head and map_tail are used to build
+ a list of input sections attached to an output section. Later,
+ output sections use these fields for a list of bfd_link_order
+ structs. */
+ union {
+ struct bfd_link_order *link_order;
+ struct bfd_section *s;
+ } map_head, map_tail;
+} asection;
+
+/* Relax table contains information about instructions which can
+ be removed by relaxation -- replacing a long address with a
+ short address. */
+struct relax_table {
+ /* Address where bytes may be deleted. */
+ bfd_vma addr;
+
+ /* Number of bytes to be deleted. */
+ int size;
+};
+
+/* These sections are global, and are managed by BFD. The application
+ and target back end are not permitted to change the values in
+ these sections. New code should use the section_ptr macros rather
+ than referring directly to the const sections. The const sections
+ may eventually vanish. */
+#define BFD_ABS_SECTION_NAME "*ABS*"
+#define BFD_UND_SECTION_NAME "*UND*"
+#define BFD_COM_SECTION_NAME "*COM*"
+#define BFD_IND_SECTION_NAME "*IND*"
+
+/* The absolute section. */
+extern asection bfd_abs_section;
+#define bfd_abs_section_ptr ((asection *) &bfd_abs_section)
+#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr)
+/* Pointer to the undefined section. */
+extern asection bfd_und_section;
+#define bfd_und_section_ptr ((asection *) &bfd_und_section)
+#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr)
+/* Pointer to the common section. */
+extern asection bfd_com_section;
+#define bfd_com_section_ptr ((asection *) &bfd_com_section)
+/* Pointer to the indirect section. */
+extern asection bfd_ind_section;
+#define bfd_ind_section_ptr ((asection *) &bfd_ind_section)
+#define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr)
+
+#define bfd_is_const_section(SEC) \
+ ( ((SEC) == bfd_abs_section_ptr) \
+ || ((SEC) == bfd_und_section_ptr) \
+ || ((SEC) == bfd_com_section_ptr) \
+ || ((SEC) == bfd_ind_section_ptr))
+
+/* Macros to handle insertion and deletion of a bfd's sections. These
+ only handle the list pointers, ie. do not adjust section_count,
+ target_index etc. */
+#define bfd_section_list_remove(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ asection *_next = _s->next; \
+ asection *_prev = _s->prev; \
+ if (_prev) \
+ _prev->next = _next; \
+ else \
+ (ABFD)->sections = _next; \
+ if (_next) \
+ _next->prev = _prev; \
+ else \
+ (ABFD)->section_last = _prev; \
+ } \
+ while (0)
+#define bfd_section_list_append(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ bfd *_abfd = ABFD; \
+ _s->next = NULL; \
+ if (_abfd->section_last) \
+ { \
+ _s->prev = _abfd->section_last; \
+ _abfd->section_last->next = _s; \
+ } \
+ else \
+ { \
+ _s->prev = NULL; \
+ _abfd->sections = _s; \
+ } \
+ _abfd->section_last = _s; \
+ } \
+ while (0)
+#define bfd_section_list_prepend(ABFD, S) \
+ do \
+ { \
+ asection *_s = S; \
+ bfd *_abfd = ABFD; \
+ _s->prev = NULL; \
+ if (_abfd->sections) \
+ { \
+ _s->next = _abfd->sections; \
+ _abfd->sections->prev = _s; \
+ } \
+ else \
+ { \
+ _s->next = NULL; \
+ _abfd->section_last = _s; \
+ } \
+ _abfd->sections = _s; \
+ } \
+ while (0)
+#define bfd_section_list_insert_after(ABFD, A, S) \
+ do \
+ { \
+ asection *_a = A; \
+ asection *_s = S; \
+ asection *_next = _a->next; \
+ _s->next = _next; \
+ _s->prev = _a; \
+ _a->next = _s; \
+ if (_next) \
+ _next->prev = _s; \
+ else \
+ (ABFD)->section_last = _s; \
+ } \
+ while (0)
+#define bfd_section_list_insert_before(ABFD, B, S) \
+ do \
+ { \
+ asection *_b = B; \
+ asection *_s = S; \
+ asection *_prev = _b->prev; \
+ _s->prev = _prev; \
+ _s->next = _b; \
+ _b->prev = _s; \
+ if (_prev) \
+ _prev->next = _s; \
+ else \
+ (ABFD)->sections = _s; \
+ } \
+ while (0)
+#define bfd_section_removed_from_list(ABFD, S) \
+ ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
+
+#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \
+ /* name, id, index, next, prev, flags, user_set_vma, */ \
+ { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \
+ \
+ /* linker_mark, linker_has_input, gc_mark, */ \
+ 0, 0, 1, \
+ \
+ /* segment_mark, sec_info_type, use_rela_p, has_tls_reloc, */ \
+ 0, 0, 0, 0, \
+ \
+ /* has_tls_get_addr_call, has_gp_reloc, need_finalize_relax, */ \
+ 0, 0, 0, \
+ \
+ /* reloc_done, vma, lma, size, rawsize, relax, relax_count, */ \
+ 0, 0, 0, 0, 0, 0, 0, \
+ \
+ /* output_offset, output_section, alignment_power, */ \
+ 0, (struct bfd_section *) &SEC, 0, \
+ \
+ /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
+ NULL, NULL, 0, 0, 0, \
+ \
+ /* line_filepos, userdata, contents, lineno, lineno_count, */ \
+ 0, NULL, NULL, NULL, 0, \
+ \
+ /* entsize, kept_section, moving_line_filepos, */ \
+ 0, NULL, 0, \
+ \
+ /* target_index, used_by_bfd, constructor_chain, owner, */ \
+ 0, NULL, NULL, NULL, \
+ \
+ /* symbol, symbol_ptr_ptr, */ \
+ (struct bfd_symbol *) SYM, &SEC.symbol, \
+ \
+ /* map_head, map_tail */ \
+ { NULL }, { NULL } \
+ }
+
+void bfd_section_list_clear (bfd *);
+
+asection *bfd_get_section_by_name (bfd *abfd, const char *name);
+
+asection *bfd_get_section_by_name_if
+ (bfd *abfd,
+ const char *name,
+ bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+char *bfd_get_unique_section_name
+ (bfd *abfd, const char *templat, int *count);
+
+asection *bfd_make_section_old_way (bfd *abfd, const char *name);
+
+asection *bfd_make_section_anyway_with_flags
+ (bfd *abfd, const char *name, flagword flags);
+
+asection *bfd_make_section_anyway (bfd *abfd, const char *name);
+
+asection *bfd_make_section_with_flags
+ (bfd *, const char *name, flagword flags);
+
+asection *bfd_make_section (bfd *, const char *name);
+
+bfd_boolean bfd_set_section_flags
+ (bfd *abfd, asection *sec, flagword flags);
+
+void bfd_map_over_sections
+ (bfd *abfd,
+ void (*func) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+asection *bfd_sections_find_if
+ (bfd *abfd,
+ bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj),
+ void *obj);
+
+bfd_boolean bfd_set_section_size
+ (bfd *abfd, asection *sec, bfd_size_type val);
+
+bfd_boolean bfd_set_section_contents
+ (bfd *abfd, asection *section, const void *data,
+ file_ptr offset, bfd_size_type count);
+
+bfd_boolean bfd_get_section_contents
+ (bfd *abfd, asection *section, void *location, file_ptr offset,
+ bfd_size_type count);
+
+bfd_boolean bfd_malloc_and_get_section
+ (bfd *abfd, asection *section, bfd_byte **buf);
+
+bfd_boolean bfd_copy_private_section_data
+ (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
+
+#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
+ BFD_SEND (obfd, _bfd_copy_private_section_data, \
+ (ibfd, isection, obfd, osection))
+bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec);
+
+bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
+
+/* Extracted from archures.c. */
+enum bfd_architecture
+{
+ bfd_arch_unknown, /* File arch not known. */
+ bfd_arch_obscure, /* Arch known, not one of these. */
+ bfd_arch_m68k, /* Motorola 68xxx */
+#define bfd_mach_m68000 1
+#define bfd_mach_m68008 2
+#define bfd_mach_m68010 3
+#define bfd_mach_m68020 4
+#define bfd_mach_m68030 5
+#define bfd_mach_m68040 6
+#define bfd_mach_m68060 7
+#define bfd_mach_cpu32 8
+#define bfd_mach_fido 9
+#define bfd_mach_mcf_isa_a_nodiv 10
+#define bfd_mach_mcf_isa_a 11
+#define bfd_mach_mcf_isa_a_mac 12
+#define bfd_mach_mcf_isa_a_emac 13
+#define bfd_mach_mcf_isa_aplus 14
+#define bfd_mach_mcf_isa_aplus_mac 15
+#define bfd_mach_mcf_isa_aplus_emac 16
+#define bfd_mach_mcf_isa_b_nousp 17
+#define bfd_mach_mcf_isa_b_nousp_mac 18
+#define bfd_mach_mcf_isa_b_nousp_emac 19
+#define bfd_mach_mcf_isa_b 20
+#define bfd_mach_mcf_isa_b_mac 21
+#define bfd_mach_mcf_isa_b_emac 22
+#define bfd_mach_mcf_isa_b_float 23
+#define bfd_mach_mcf_isa_b_float_mac 24
+#define bfd_mach_mcf_isa_b_float_emac 25
+#define bfd_mach_mcf_isa_c 26
+#define bfd_mach_mcf_isa_c_mac 27
+#define bfd_mach_mcf_isa_c_emac 28
+#define bfd_mach_mcf_isa_c_nodiv 29
+#define bfd_mach_mcf_isa_c_nodiv_mac 30
+#define bfd_mach_mcf_isa_c_nodiv_emac 31
+ bfd_arch_vax, /* DEC Vax */
+ bfd_arch_i960, /* Intel 960 */
+ /* The order of the following is important.
+ lower number indicates a machine type that
+ only accepts a subset of the instructions
+ available to machines with higher numbers.
+ The exception is the "ca", which is
+ incompatible with all other machines except
+ "core". */
+
+#define bfd_mach_i960_core 1
+#define bfd_mach_i960_ka_sa 2
+#define bfd_mach_i960_kb_sb 3
+#define bfd_mach_i960_mc 4
+#define bfd_mach_i960_xa 5
+#define bfd_mach_i960_ca 6
+#define bfd_mach_i960_jx 7
+#define bfd_mach_i960_hx 8
+
+ bfd_arch_or32, /* OpenRISC 32 */
+
+ bfd_arch_sparc, /* SPARC */
+#define bfd_mach_sparc 1
+/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
+#define bfd_mach_sparc_sparclet 2
+#define bfd_mach_sparc_sparclite 3
+#define bfd_mach_sparc_v8plus 4
+#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
+#define bfd_mach_sparc_sparclite_le 6
+#define bfd_mach_sparc_v9 7
+#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
+#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
+#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
+/* Nonzero if MACH has the v9 instruction set. */
+#define bfd_mach_sparc_v9_p(mach) \
+ ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+ && (mach) != bfd_mach_sparc_sparclite_le)
+/* Nonzero if MACH is a 64 bit sparc architecture. */
+#define bfd_mach_sparc_64bit_p(mach) \
+ ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+ bfd_arch_spu, /* PowerPC SPU */
+#define bfd_mach_spu 256
+ bfd_arch_mips, /* MIPS Rxxxx */
+#define bfd_mach_mips3000 3000
+#define bfd_mach_mips3900 3900
+#define bfd_mach_mips4000 4000
+#define bfd_mach_mips4010 4010
+#define bfd_mach_mips4100 4100
+#define bfd_mach_mips4111 4111
+#define bfd_mach_mips4120 4120
+#define bfd_mach_mips4300 4300
+#define bfd_mach_mips4400 4400
+#define bfd_mach_mips4600 4600
+#define bfd_mach_mips4650 4650
+#define bfd_mach_mips5000 5000
+#define bfd_mach_mips5400 5400
+#define bfd_mach_mips5500 5500
+#define bfd_mach_mips6000 6000
+#define bfd_mach_mips7000 7000
+#define bfd_mach_mips8000 8000
+#define bfd_mach_mips9000 9000
+#define bfd_mach_mips10000 10000
+#define bfd_mach_mips12000 12000
+#define bfd_mach_mips14000 14000
+#define bfd_mach_mips16000 16000
+#define bfd_mach_mips16 16
+#define bfd_mach_mips5 5
+#define bfd_mach_mips_loongson_2e 3001
+#define bfd_mach_mips_loongson_2f 3002
+#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
+#define bfd_mach_mips_octeon 6501
+#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
+#define bfd_mach_mipsisa32 32
+#define bfd_mach_mipsisa32r2 33
+#define bfd_mach_mipsisa64 64
+#define bfd_mach_mipsisa64r2 65
+ bfd_arch_i386, /* Intel 386 */
+#define bfd_mach_i386_i386 1
+#define bfd_mach_i386_i8086 2
+#define bfd_mach_i386_i386_intel_syntax 3
+#define bfd_mach_x86_64 64
+#define bfd_mach_x86_64_intel_syntax 65
+ bfd_arch_l1om, /* Intel L1OM */
+#define bfd_mach_l1om 66
+#define bfd_mach_l1om_intel_syntax 67
+ bfd_arch_we32k, /* AT&T WE32xxx */
+ bfd_arch_tahoe, /* CCI/Harris Tahoe */
+ bfd_arch_i860, /* Intel 860 */
+ bfd_arch_i370, /* IBM 360/370 Mainframes */
+ bfd_arch_romp, /* IBM ROMP PC/RT */
+ bfd_arch_convex, /* Convex */
+ bfd_arch_m88k, /* Motorola 88xxx */
+ bfd_arch_m98k, /* Motorola 98xxx */
+ bfd_arch_pyramid, /* Pyramid Technology */
+ bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */
+#define bfd_mach_h8300 1
+#define bfd_mach_h8300h 2
+#define bfd_mach_h8300s 3
+#define bfd_mach_h8300hn 4
+#define bfd_mach_h8300sn 5
+#define bfd_mach_h8300sx 6
+#define bfd_mach_h8300sxn 7
+ bfd_arch_pdp11, /* DEC PDP-11 */
+ bfd_arch_plugin,
+ bfd_arch_powerpc, /* PowerPC */
+#define bfd_mach_ppc 32
+#define bfd_mach_ppc64 64
+#define bfd_mach_ppc_403 403
+#define bfd_mach_ppc_403gc 4030
+#define bfd_mach_ppc_405 405
+#define bfd_mach_ppc_505 505
+#define bfd_mach_ppc_601 601
+#define bfd_mach_ppc_602 602
+#define bfd_mach_ppc_603 603
+#define bfd_mach_ppc_ec603e 6031
+#define bfd_mach_ppc_604 604
+#define bfd_mach_ppc_620 620
+#define bfd_mach_ppc_630 630
+#define bfd_mach_ppc_750 750
+#define bfd_mach_ppc_860 860
+#define bfd_mach_ppc_a35 35
+#define bfd_mach_ppc_rs64ii 642
+#define bfd_mach_ppc_rs64iii 643
+#define bfd_mach_ppc_7400 7400
+#define bfd_mach_ppc_e500 500
+#define bfd_mach_ppc_e500mc 5001
+ bfd_arch_rs6000, /* IBM RS/6000 */
+#define bfd_mach_rs6k 6000
+#define bfd_mach_rs6k_rs1 6001
+#define bfd_mach_rs6k_rsc 6003
+#define bfd_mach_rs6k_rs2 6002
+ bfd_arch_hppa, /* HP PA RISC */
+#define bfd_mach_hppa10 10
+#define bfd_mach_hppa11 11
+#define bfd_mach_hppa20 20
+#define bfd_mach_hppa20w 25
+ bfd_arch_d10v, /* Mitsubishi D10V */
+#define bfd_mach_d10v 1
+#define bfd_mach_d10v_ts2 2
+#define bfd_mach_d10v_ts3 3
+ bfd_arch_d30v, /* Mitsubishi D30V */
+ bfd_arch_dlx, /* DLX */
+ bfd_arch_m68hc11, /* Motorola 68HC11 */
+ bfd_arch_m68hc12, /* Motorola 68HC12 */
+#define bfd_mach_m6812_default 0
+#define bfd_mach_m6812 1
+#define bfd_mach_m6812s 2
+ bfd_arch_z8k, /* Zilog Z8000 */
+#define bfd_mach_z8001 1
+#define bfd_mach_z8002 2
+ bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */
+ bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */
+#define bfd_mach_sh 1
+#define bfd_mach_sh2 0x20
+#define bfd_mach_sh_dsp 0x2d
+#define bfd_mach_sh2a 0x2a
+#define bfd_mach_sh2a_nofpu 0x2b
+#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
+#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
+#define bfd_mach_sh2a_or_sh4 0x2a3
+#define bfd_mach_sh2a_or_sh3e 0x2a4
+#define bfd_mach_sh2e 0x2e
+#define bfd_mach_sh3 0x30
+#define bfd_mach_sh3_nommu 0x31
+#define bfd_mach_sh3_dsp 0x3d
+#define bfd_mach_sh3e 0x3e
+#define bfd_mach_sh4 0x40
+#define bfd_mach_sh4_nofpu 0x41
+#define bfd_mach_sh4_nommu_nofpu 0x42
+#define bfd_mach_sh4a 0x4a
+#define bfd_mach_sh4a_nofpu 0x4b
+#define bfd_mach_sh4al_dsp 0x4d
+#define bfd_mach_sh5 0x50
+ bfd_arch_alpha, /* Dec Alpha */
+#define bfd_mach_alpha_ev4 0x10
+#define bfd_mach_alpha_ev5 0x20
+#define bfd_mach_alpha_ev6 0x30
+ bfd_arch_arm, /* Advanced Risc Machines ARM. */
+#define bfd_mach_arm_unknown 0
+#define bfd_mach_arm_2 1
+#define bfd_mach_arm_2a 2
+#define bfd_mach_arm_3 3
+#define bfd_mach_arm_3M 4
+#define bfd_mach_arm_4 5
+#define bfd_mach_arm_4T 6
+#define bfd_mach_arm_5 7
+#define bfd_mach_arm_5T 8
+#define bfd_mach_arm_5TE 9
+#define bfd_mach_arm_XScale 10
+#define bfd_mach_arm_ep9312 11
+#define bfd_mach_arm_iWMMXt 12
+#define bfd_mach_arm_iWMMXt2 13
+ bfd_arch_ns32k, /* National Semiconductors ns32000 */
+ bfd_arch_w65, /* WDC 65816 */
+ bfd_arch_tic30, /* Texas Instruments TMS320C30 */
+ bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */
+#define bfd_mach_tic3x 30
+#define bfd_mach_tic4x 40
+ bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
+ bfd_arch_tic80, /* TI TMS320c80 (MVP) */
+ bfd_arch_v850, /* NEC V850 */
+#define bfd_mach_v850 1
+#define bfd_mach_v850e 'E'
+#define bfd_mach_v850e1 '1'
+ bfd_arch_arc, /* ARC Cores */
+#define bfd_mach_arc_5 5
+#define bfd_mach_arc_6 6
+#define bfd_mach_arc_7 7
+#define bfd_mach_arc_8 8
+ bfd_arch_m32c, /* Renesas M16C/M32C. */
+#define bfd_mach_m16c 0x75
+#define bfd_mach_m32c 0x78
+ bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */
+#define bfd_mach_m32r 1 /* For backwards compatibility. */
+#define bfd_mach_m32rx 'x'
+#define bfd_mach_m32r2 '2'
+ bfd_arch_mn10200, /* Matsushita MN10200 */
+ bfd_arch_mn10300, /* Matsushita MN10300 */
+#define bfd_mach_mn10300 300
+#define bfd_mach_am33 330
+#define bfd_mach_am33_2 332
+ bfd_arch_fr30,
+#define bfd_mach_fr30 0x46523330
+ bfd_arch_frv,
+#define bfd_mach_frv 1
+#define bfd_mach_frvsimple 2
+#define bfd_mach_fr300 300
+#define bfd_mach_fr400 400
+#define bfd_mach_fr450 450
+#define bfd_mach_frvtomcat 499 /* fr500 prototype */
+#define bfd_mach_fr500 500
+#define bfd_mach_fr550 550
+ bfd_arch_moxie, /* The moxie processor */
+#define bfd_mach_moxie 1
+ bfd_arch_mcore,
+ bfd_arch_mep,
+#define bfd_mach_mep 1
+#define bfd_mach_mep_h1 0x6831
+#define bfd_mach_mep_c5 0x6335
+ bfd_arch_ia64, /* HP/Intel ia64 */
+#define bfd_mach_ia64_elf64 64
+#define bfd_mach_ia64_elf32 32
+ bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
+#define bfd_mach_ip2022 1
+#define bfd_mach_ip2022ext 2
+ bfd_arch_iq2000, /* Vitesse IQ2000. */
+#define bfd_mach_iq2000 1
+#define bfd_mach_iq10 2
+ bfd_arch_mt,
+#define bfd_mach_ms1 1
+#define bfd_mach_mrisc2 2
+#define bfd_mach_ms2 3
+ bfd_arch_pj,
+ bfd_arch_avr, /* Atmel AVR microcontrollers. */
+#define bfd_mach_avr1 1
+#define bfd_mach_avr2 2
+#define bfd_mach_avr25 25
+#define bfd_mach_avr3 3
+#define bfd_mach_avr31 31
+#define bfd_mach_avr35 35
+#define bfd_mach_avr4 4
+#define bfd_mach_avr5 5
+#define bfd_mach_avr51 51
+#define bfd_mach_avr6 6
+ bfd_arch_bfin, /* ADI Blackfin */
+#define bfd_mach_bfin 1
+ bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
+#define bfd_mach_cr16 1
+ bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
+#define bfd_mach_cr16c 1
+ bfd_arch_crx, /* National Semiconductor CRX. */
+#define bfd_mach_crx 1
+ bfd_arch_cris, /* Axis CRIS */
+#define bfd_mach_cris_v0_v10 255
+#define bfd_mach_cris_v32 32
+#define bfd_mach_cris_v10_v32 1032
+ bfd_arch_s390, /* IBM s390 */
+#define bfd_mach_s390_31 31
+#define bfd_mach_s390_64 64
+ bfd_arch_score, /* Sunplus score */
+#define bfd_mach_score3 3
+#define bfd_mach_score7 7
+ bfd_arch_openrisc, /* OpenRISC */
+ bfd_arch_mmix, /* Donald Knuth's educational processor. */
+ bfd_arch_xstormy16,
+#define bfd_mach_xstormy16 1
+ bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
+#define bfd_mach_msp11 11
+#define bfd_mach_msp110 110
+#define bfd_mach_msp12 12
+#define bfd_mach_msp13 13
+#define bfd_mach_msp14 14
+#define bfd_mach_msp15 15
+#define bfd_mach_msp16 16
+#define bfd_mach_msp21 21
+#define bfd_mach_msp31 31
+#define bfd_mach_msp32 32
+#define bfd_mach_msp33 33
+#define bfd_mach_msp41 41
+#define bfd_mach_msp42 42
+#define bfd_mach_msp43 43
+#define bfd_mach_msp44 44
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+#define bfd_mach_xc16x 1
+#define bfd_mach_xc16xl 2
+#define bfd_mach_xc16xs 3
+ bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
+#define bfd_mach_xtensa 1
+ bfd_arch_maxq, /* Dallas MAXQ 10/20 */
+#define bfd_mach_maxq10 10
+#define bfd_mach_maxq20 20
+ bfd_arch_z80,
+#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
+#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
+#define bfd_mach_z80full 7 /* All undocumented instructions. */
+#define bfd_mach_r800 11 /* R800: successor with multiplication. */
+ bfd_arch_lm32, /* Lattice Mico32 */
+#define bfd_mach_lm32 1
+ bfd_arch_microblaze,/* Xilinx MicroBlaze. */
+ bfd_arch_last
+ };
+
+typedef struct bfd_arch_info
+{
+ int bits_per_word;
+ int bits_per_address;
+ int bits_per_byte;
+ enum bfd_architecture arch;
+ unsigned long mach;
+ const char *arch_name;
+ const char *printable_name;
+ unsigned int section_align_power;
+ /* TRUE if this is the default machine for the architecture.
+ The default arch should be the first entry for an arch so that
+ all the entries for that arch can be accessed via <<next>>. */
+ bfd_boolean the_default;
+ const struct bfd_arch_info * (*compatible)
+ (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
+
+ bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
+
+ const struct bfd_arch_info *next;
+}
+bfd_arch_info_type;
+
+const char *bfd_printable_name (bfd *abfd);
+
+const bfd_arch_info_type *bfd_scan_arch (const char *string);
+
+const char **bfd_arch_list (void);
+
+const bfd_arch_info_type *bfd_arch_get_compatible
+ (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
+
+void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
+
+enum bfd_architecture bfd_get_arch (bfd *abfd);
+
+unsigned long bfd_get_mach (bfd *abfd);
+
+unsigned int bfd_arch_bits_per_byte (bfd *abfd);
+
+unsigned int bfd_arch_bits_per_address (bfd *abfd);
+
+const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
+
+const bfd_arch_info_type *bfd_lookup_arch
+ (enum bfd_architecture arch, unsigned long machine);
+
+const char *bfd_printable_arch_mach
+ (enum bfd_architecture arch, unsigned long machine);
+
+unsigned int bfd_octets_per_byte (bfd *abfd);
+
+unsigned int bfd_arch_mach_octets_per_byte
+ (enum bfd_architecture arch, unsigned long machine);
+
+/* Extracted from reloc.c. */
+typedef enum bfd_reloc_status
+{
+ /* No errors detected. */
+ bfd_reloc_ok,
+
+ /* The relocation was performed, but there was an overflow. */
+ bfd_reloc_overflow,
+
+ /* The address to relocate was not within the section supplied. */
+ bfd_reloc_outofrange,
+
+ /* Used by special functions. */
+ bfd_reloc_continue,
+
+ /* Unsupported relocation size requested. */
+ bfd_reloc_notsupported,
+
+ /* Unused. */
+ bfd_reloc_other,
+
+ /* The symbol to relocate against was undefined. */
+ bfd_reloc_undefined,
+
+ /* The relocation was performed, but may not be ok - presently
+ generated only when linking i960 coff files with i960 b.out
+ symbols. If this type is returned, the error_message argument
+ to bfd_perform_relocation will be set. */
+ bfd_reloc_dangerous
+ }
+ bfd_reloc_status_type;
+
+
+typedef struct reloc_cache_entry
+{
+ /* A pointer into the canonical table of pointers. */
+ struct bfd_symbol **sym_ptr_ptr;
+
+ /* offset in section. */
+ bfd_size_type address;
+
+ /* addend for relocation value. */
+ bfd_vma addend;
+
+ /* Pointer to how to perform the required relocation. */
+ reloc_howto_type *howto;
+
+}
+arelent;
+
+enum complain_overflow
+{
+ /* Do not complain on overflow. */
+ complain_overflow_dont,
+
+ /* Complain if the value overflows when considered as a signed
+ number one bit larger than the field. ie. A bitfield of N bits
+ is allowed to represent -2**n to 2**n-1. */
+ complain_overflow_bitfield,
+
+ /* Complain if the value overflows when considered as a signed
+ number. */
+ complain_overflow_signed,
+
+ /* Complain if the value overflows when considered as an
+ unsigned number. */
+ complain_overflow_unsigned
+};
+
+struct reloc_howto_struct
+{
+ /* The type field has mainly a documentary use - the back end can
+ do what it wants with it, though normally the back end's
+ external idea of what a reloc number is stored
+ in this field. For example, a PC relative word relocation
+ in a coff environment has the type 023 - because that's
+ what the outside world calls a R_PCRWORD reloc. */
+ unsigned int type;
+
+ /* The value the final relocation is shifted right by. This drops
+ unwanted data from the relocation. */
+ unsigned int rightshift;
+
+ /* The size of the item to be relocated. This is *not* a
+ power-of-two measure. To get the number of bytes operated
+ on by a type of relocation, use bfd_get_reloc_size. */
+ int size;
+
+ /* The number of bits in the item to be relocated. This is used
+ when doing overflow checking. */
+ unsigned int bitsize;
+
+ /* Notes that the relocation is relative to the location in the
+ data section of the addend. The relocation function will
+ subtract from the relocation value the address of the location
+ being relocated. */
+ bfd_boolean pc_relative;
+
+ /* The bit position of the reloc value in the destination.
+ The relocated value is left shifted by this amount. */
+ unsigned int bitpos;
+
+ /* What type of overflow error should be checked for when
+ relocating. */
+ enum complain_overflow complain_on_overflow;
+
+ /* If this field is non null, then the supplied function is
+ called rather than the normal function. This allows really
+ strange relocation methods to be accommodated (e.g., i960 callj
+ instructions). */
+ bfd_reloc_status_type (*special_function)
+ (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
+ bfd *, char **);
+
+ /* The textual name of the relocation type. */
+ char *name;
+
+ /* Some formats record a relocation addend in the section contents
+ rather than with the relocation. For ELF formats this is the
+ distinction between USE_REL and USE_RELA (though the code checks
+ for USE_REL == 1/0). The value of this field is TRUE if the
+ addend is recorded with the section contents; when performing a
+ partial link (ld -r) the section contents (the data) will be
+ modified. The value of this field is FALSE if addends are
+ recorded with the relocation (in arelent.addend); when performing
+ a partial link the relocation will be modified.
+ All relocations for all ELF USE_RELA targets should set this field
+ to FALSE (values of TRUE should be looked on with suspicion).
+ However, the converse is not true: not all relocations of all ELF
+ USE_REL targets set this field to TRUE. Why this is so is peculiar
+ to each particular target. For relocs that aren't used in partial
+ links (e.g. GOT stuff) it doesn't matter what this is set to. */
+ bfd_boolean partial_inplace;
+
+ /* src_mask selects the part of the instruction (or data) to be used
+ in the relocation sum. If the target relocations don't have an
+ addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
+ dst_mask to extract the addend from the section contents. If
+ relocations do have an addend in the reloc, eg. ELF USE_RELA, this
+ field should be zero. Non-zero values for ELF USE_RELA targets are
+ bogus as in those cases the value in the dst_mask part of the
+ section contents should be treated as garbage. */
+ bfd_vma src_mask;
+
+ /* dst_mask selects which parts of the instruction (or data) are
+ replaced with a relocated value. */
+ bfd_vma dst_mask;
+
+ /* When some formats create PC relative instructions, they leave
+ the value of the pc of the place being relocated in the offset
+ slot of the instruction, so that a PC relative relocation can
+ be made just by adding in an ordinary offset (e.g., sun3 a.out).
+ Some formats leave the displacement part of an instruction
+ empty (e.g., m88k bcs); this flag signals the fact. */
+ bfd_boolean pcrel_offset;
+};
+
+#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
+ { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
+#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
+ HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
+ NAME, FALSE, 0, 0, IN)
+
+#define EMPTY_HOWTO(C) \
+ HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
+ NULL, FALSE, 0, 0, FALSE)
+
+#define HOWTO_PREPARE(relocation, symbol) \
+ { \
+ if (symbol != NULL) \
+ { \
+ if (bfd_is_com_section (symbol->section)) \
+ { \
+ relocation = 0; \
+ } \
+ else \
+ { \
+ relocation = symbol->value; \
+ } \
+ } \
+ }
+
+unsigned int bfd_get_reloc_size (reloc_howto_type *);
+
+typedef struct relent_chain
+{
+ arelent relent;
+ struct relent_chain *next;
+}
+arelent_chain;
+
+bfd_reloc_status_type bfd_check_overflow
+ (enum complain_overflow how,
+ unsigned int bitsize,
+ unsigned int rightshift,
+ unsigned int addrsize,
+ bfd_vma relocation);
+
+bfd_reloc_status_type bfd_perform_relocation
+ (bfd *abfd,
+ arelent *reloc_entry,
+ void *data,
+ asection *input_section,
+ bfd *output_bfd,
+ char **error_message);
+
+bfd_reloc_status_type bfd_install_relocation
+ (bfd *abfd,
+ arelent *reloc_entry,
+ void *data, bfd_vma data_start,
+ asection *input_section,
+ char **error_message);
+
+enum bfd_reloc_code_real {
+ _dummy_first_bfd_reloc_code_real,
+
+
+/* Basic absolute relocations of N bits. */
+ BFD_RELOC_64,
+ BFD_RELOC_32,
+ BFD_RELOC_26,
+ BFD_RELOC_24,
+ BFD_RELOC_16,
+ BFD_RELOC_14,
+ BFD_RELOC_8,
+
+/* PC-relative relocations. Sometimes these are relative to the address
+of the relocation itself; sometimes they are relative to the start of
+the section containing the relocation. It depends on the specific target.
+
+The 24-bit relocation is used in some Intel 960 configurations. */
+ BFD_RELOC_64_PCREL,
+ BFD_RELOC_32_PCREL,
+ BFD_RELOC_24_PCREL,
+ BFD_RELOC_16_PCREL,
+ BFD_RELOC_12_PCREL,
+ BFD_RELOC_8_PCREL,
+
+/* Section relative relocations. Some targets need this for DWARF2. */
+ BFD_RELOC_32_SECREL,
+
+/* For ELF. */
+ BFD_RELOC_32_GOT_PCREL,
+ BFD_RELOC_16_GOT_PCREL,
+ BFD_RELOC_8_GOT_PCREL,
+ BFD_RELOC_32_GOTOFF,
+ BFD_RELOC_16_GOTOFF,
+ BFD_RELOC_LO16_GOTOFF,
+ BFD_RELOC_HI16_GOTOFF,
+ BFD_RELOC_HI16_S_GOTOFF,
+ BFD_RELOC_8_GOTOFF,
+ BFD_RELOC_64_PLT_PCREL,
+ BFD_RELOC_32_PLT_PCREL,
+ BFD_RELOC_24_PLT_PCREL,
+ BFD_RELOC_16_PLT_PCREL,
+ BFD_RELOC_8_PLT_PCREL,
+ BFD_RELOC_64_PLTOFF,
+ BFD_RELOC_32_PLTOFF,
+ BFD_RELOC_16_PLTOFF,
+ BFD_RELOC_LO16_PLTOFF,
+ BFD_RELOC_HI16_PLTOFF,
+ BFD_RELOC_HI16_S_PLTOFF,
+ BFD_RELOC_8_PLTOFF,
+
+/* Relocations used by 68K ELF. */
+ BFD_RELOC_68K_GLOB_DAT,
+ BFD_RELOC_68K_JMP_SLOT,
+ BFD_RELOC_68K_RELATIVE,
+ BFD_RELOC_68K_TLS_GD32,
+ BFD_RELOC_68K_TLS_GD16,
+ BFD_RELOC_68K_TLS_GD8,
+ BFD_RELOC_68K_TLS_LDM32,
+ BFD_RELOC_68K_TLS_LDM16,
+ BFD_RELOC_68K_TLS_LDM8,
+ BFD_RELOC_68K_TLS_LDO32,
+ BFD_RELOC_68K_TLS_LDO16,
+ BFD_RELOC_68K_TLS_LDO8,
+ BFD_RELOC_68K_TLS_IE32,
+ BFD_RELOC_68K_TLS_IE16,
+ BFD_RELOC_68K_TLS_IE8,
+ BFD_RELOC_68K_TLS_LE32,
+ BFD_RELOC_68K_TLS_LE16,
+ BFD_RELOC_68K_TLS_LE8,
+
+/* Linkage-table relative. */
+ BFD_RELOC_32_BASEREL,
+ BFD_RELOC_16_BASEREL,
+ BFD_RELOC_LO16_BASEREL,
+ BFD_RELOC_HI16_BASEREL,
+ BFD_RELOC_HI16_S_BASEREL,
+ BFD_RELOC_8_BASEREL,
+ BFD_RELOC_RVA,
+
+/* Absolute 8-bit relocation, but used to form an address like 0xFFnn. */
+ BFD_RELOC_8_FFnn,
+
+/* These PC-relative relocations are stored as word displacements --
+i.e., byte displacements shifted right two bits. The 30-bit word
+displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
+SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
+signed 16-bit displacement is used on the MIPS, and the 23-bit
+displacement is used on the Alpha. */
+ BFD_RELOC_32_PCREL_S2,
+ BFD_RELOC_16_PCREL_S2,
+ BFD_RELOC_23_PCREL_S2,
+
+/* High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
+the target word. These are used on the SPARC. */
+ BFD_RELOC_HI22,
+ BFD_RELOC_LO10,
+
+/* For systems that allocate a Global Pointer register, these are
+displacements off that register. These relocation types are
+handled specially, because the value the register will have is
+decided relatively late. */
+ BFD_RELOC_GPREL16,
+ BFD_RELOC_GPREL32,
+
+/* Reloc types used for i960/b.out. */
+ BFD_RELOC_I960_CALLJ,
+
+/* SPARC ELF relocations. There is probably some overlap with other
+relocation types already defined. */
+ BFD_RELOC_NONE,
+ BFD_RELOC_SPARC_WDISP22,
+ BFD_RELOC_SPARC22,
+ BFD_RELOC_SPARC13,
+ BFD_RELOC_SPARC_GOT10,
+ BFD_RELOC_SPARC_GOT13,
+ BFD_RELOC_SPARC_GOT22,
+ BFD_RELOC_SPARC_PC10,
+ BFD_RELOC_SPARC_PC22,
+ BFD_RELOC_SPARC_WPLT30,
+ BFD_RELOC_SPARC_COPY,
+ BFD_RELOC_SPARC_GLOB_DAT,
+ BFD_RELOC_SPARC_JMP_SLOT,
+ BFD_RELOC_SPARC_RELATIVE,
+ BFD_RELOC_SPARC_UA16,
+ BFD_RELOC_SPARC_UA32,
+ BFD_RELOC_SPARC_UA64,
+ BFD_RELOC_SPARC_GOTDATA_HIX22,
+ BFD_RELOC_SPARC_GOTDATA_LOX10,
+ BFD_RELOC_SPARC_GOTDATA_OP_HIX22,
+ BFD_RELOC_SPARC_GOTDATA_OP_LOX10,
+ BFD_RELOC_SPARC_GOTDATA_OP,
+
+/* I think these are specific to SPARC a.out (e.g., Sun 4). */
+ BFD_RELOC_SPARC_BASE13,
+ BFD_RELOC_SPARC_BASE22,
+
+/* SPARC64 relocations */
+#define BFD_RELOC_SPARC_64 BFD_RELOC_64
+ BFD_RELOC_SPARC_10,
+ BFD_RELOC_SPARC_11,
+ BFD_RELOC_SPARC_OLO10,
+ BFD_RELOC_SPARC_HH22,
+ BFD_RELOC_SPARC_HM10,
+ BFD_RELOC_SPARC_LM22,
+ BFD_RELOC_SPARC_PC_HH22,
+ BFD_RELOC_SPARC_PC_HM10,
+ BFD_RELOC_SPARC_PC_LM22,
+ BFD_RELOC_SPARC_WDISP16,
+ BFD_RELOC_SPARC_WDISP19,
+ BFD_RELOC_SPARC_7,
+ BFD_RELOC_SPARC_6,
+ BFD_RELOC_SPARC_5,
+#define BFD_RELOC_SPARC_DISP64 BFD_RELOC_64_PCREL
+ BFD_RELOC_SPARC_PLT32,
+ BFD_RELOC_SPARC_PLT64,
+ BFD_RELOC_SPARC_HIX22,
+ BFD_RELOC_SPARC_LOX10,
+ BFD_RELOC_SPARC_H44,
+ BFD_RELOC_SPARC_M44,
+ BFD_RELOC_SPARC_L44,
+ BFD_RELOC_SPARC_REGISTER,
+
+/* SPARC little endian relocation */
+ BFD_RELOC_SPARC_REV32,
+
+/* SPARC TLS relocations */
+ BFD_RELOC_SPARC_TLS_GD_HI22,
+ BFD_RELOC_SPARC_TLS_GD_LO10,
+ BFD_RELOC_SPARC_TLS_GD_ADD,
+ BFD_RELOC_SPARC_TLS_GD_CALL,
+ BFD_RELOC_SPARC_TLS_LDM_HI22,
+ BFD_RELOC_SPARC_TLS_LDM_LO10,
+ BFD_RELOC_SPARC_TLS_LDM_ADD,
+ BFD_RELOC_SPARC_TLS_LDM_CALL,
+ BFD_RELOC_SPARC_TLS_LDO_HIX22,
+ BFD_RELOC_SPARC_TLS_LDO_LOX10,
+ BFD_RELOC_SPARC_TLS_LDO_ADD,
+ BFD_RELOC_SPARC_TLS_IE_HI22,
+ BFD_RELOC_SPARC_TLS_IE_LO10,
+ BFD_RELOC_SPARC_TLS_IE_LD,
+ BFD_RELOC_SPARC_TLS_IE_LDX,
+ BFD_RELOC_SPARC_TLS_IE_ADD,
+ BFD_RELOC_SPARC_TLS_LE_HIX22,
+ BFD_RELOC_SPARC_TLS_LE_LOX10,
+ BFD_RELOC_SPARC_TLS_DTPMOD32,
+ BFD_RELOC_SPARC_TLS_DTPMOD64,
+ BFD_RELOC_SPARC_TLS_DTPOFF32,
+ BFD_RELOC_SPARC_TLS_DTPOFF64,
+ BFD_RELOC_SPARC_TLS_TPOFF32,
+ BFD_RELOC_SPARC_TLS_TPOFF64,
+
+/* SPU Relocations. */
+ BFD_RELOC_SPU_IMM7,
+ BFD_RELOC_SPU_IMM8,
+ BFD_RELOC_SPU_IMM10,
+ BFD_RELOC_SPU_IMM10W,
+ BFD_RELOC_SPU_IMM16,
+ BFD_RELOC_SPU_IMM16W,
+ BFD_RELOC_SPU_IMM18,
+ BFD_RELOC_SPU_PCREL9a,
+ BFD_RELOC_SPU_PCREL9b,
+ BFD_RELOC_SPU_PCREL16,
+ BFD_RELOC_SPU_LO16,
+ BFD_RELOC_SPU_HI16,
+ BFD_RELOC_SPU_PPU32,
+ BFD_RELOC_SPU_PPU64,
+ BFD_RELOC_SPU_ADD_PIC,
+
+/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+"addend" in some special way.
+For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
+writing; when reading, it will be the absolute section symbol. The
+addend is the displacement in bytes of the "lda" instruction from
+the "ldah" instruction (which is at the address of this reloc). */
+ BFD_RELOC_ALPHA_GPDISP_HI16,
+
+/* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
+with GPDISP_HI16 relocs. The addend is ignored when writing the
+relocations out, and is filled in with the file's GP value on
+reading, for convenience. */
+ BFD_RELOC_ALPHA_GPDISP_LO16,
+
+/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+relocation except that there is no accompanying GPDISP_LO16
+relocation. */
+ BFD_RELOC_ALPHA_GPDISP,
+
+/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
+the assembler turns it into a LDQ instruction to load the address of
+the symbol, and then fills in a register in the real instruction.
+
+The LITERAL reloc, at the LDQ instruction, refers to the .lita
+section symbol. The addend is ignored when writing, but is filled
+in with the file's GP value on reading, for convenience, as with the
+GPDISP_LO16 reloc.
+
+The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
+It should refer to the symbol to be referenced, as with 16_GOTOFF,
+but it generates output not based on the position within the .got
+section, but relative to the GP value chosen for the file during the
+final link stage.
+
+The LITUSE reloc, on the instruction using the loaded address, gives
+information to the linker that it might be able to use to optimize
+away some literal section references. The symbol is ignored (read
+as the absolute section symbol), and the "addend" indicates the type
+of instruction using the register:
+1 - "memory" fmt insn
+2 - byte-manipulation (byte offset reg)
+3 - jsr (target of branch) */
+ BFD_RELOC_ALPHA_LITERAL,
+ BFD_RELOC_ALPHA_ELF_LITERAL,
+ BFD_RELOC_ALPHA_LITUSE,
+
+/* The HINT relocation indicates a value that should be filled into the
+"hint" field of a jmp/jsr/ret instruction, for possible branch-
+prediction logic which may be provided on some processors. */
+ BFD_RELOC_ALPHA_HINT,
+
+/* The LINKAGE relocation outputs a linkage pair in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_LINKAGE,
+
+/* The CODEADDR relocation outputs a STO_CA in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_CODEADDR,
+
+/* The GPREL_HI/LO relocations together form a 32-bit offset from the
+GP register. */
+ BFD_RELOC_ALPHA_GPREL_HI16,
+ BFD_RELOC_ALPHA_GPREL_LO16,
+
+/* Like BFD_RELOC_23_PCREL_S2, except that the source and target must
+share a common GP, and the target address is adjusted for
+STO_ALPHA_STD_GPLOAD. */
+ BFD_RELOC_ALPHA_BRSGP,
+
+/* The NOP relocation outputs a NOP if the longword displacement
+between two procedure entry points is < 2^21. */
+ BFD_RELOC_ALPHA_NOP,
+
+/* The BSR relocation outputs a BSR if the longword displacement
+between two procedure entry points is < 2^21. */
+ BFD_RELOC_ALPHA_BSR,
+
+/* The LDA relocation outputs a LDA if the longword displacement
+between two procedure entry points is < 2^16. */
+ BFD_RELOC_ALPHA_LDA,
+
+/* The BOH relocation outputs a BSR if the longword displacement
+between two procedure entry points is < 2^21, or else a hint. */
+ BFD_RELOC_ALPHA_BOH,
+
+/* Alpha thread-local storage relocations. */
+ BFD_RELOC_ALPHA_TLSGD,
+ BFD_RELOC_ALPHA_TLSLDM,
+ BFD_RELOC_ALPHA_DTPMOD64,
+ BFD_RELOC_ALPHA_GOTDTPREL16,
+ BFD_RELOC_ALPHA_DTPREL64,
+ BFD_RELOC_ALPHA_DTPREL_HI16,
+ BFD_RELOC_ALPHA_DTPREL_LO16,
+ BFD_RELOC_ALPHA_DTPREL16,
+ BFD_RELOC_ALPHA_GOTTPREL16,
+ BFD_RELOC_ALPHA_TPREL64,
+ BFD_RELOC_ALPHA_TPREL_HI16,
+ BFD_RELOC_ALPHA_TPREL_LO16,
+ BFD_RELOC_ALPHA_TPREL16,
+
+/* Bits 27..2 of the relocation address shifted right 2 bits;
+simple reloc otherwise. */
+ BFD_RELOC_MIPS_JMP,
+
+/* The MIPS16 jump instruction. */
+ BFD_RELOC_MIPS16_JMP,
+
+/* MIPS16 GP relative reloc. */
+ BFD_RELOC_MIPS16_GPREL,
+
+/* High 16 bits of 32-bit value; simple reloc. */
+ BFD_RELOC_HI16,
+
+/* High 16 bits of 32-bit value but the low 16 bits will be sign
+extended and added to form the final result. If the low 16
+bits form a negative number, we need to add one to the high value
+to compensate for the borrow when the low bits are added. */
+ BFD_RELOC_HI16_S,
+
+/* Low 16 bits. */
+ BFD_RELOC_LO16,
+
+/* High 16 bits of 32-bit pc-relative value */
+ BFD_RELOC_HI16_PCREL,
+
+/* High 16 bits of 32-bit pc-relative value, adjusted */
+ BFD_RELOC_HI16_S_PCREL,
+
+/* Low 16 bits of pc-relative value */
+ BFD_RELOC_LO16_PCREL,
+
+/* Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
+16-bit immediate fields */
+ BFD_RELOC_MIPS16_GOT16,
+ BFD_RELOC_MIPS16_CALL16,
+
+/* MIPS16 high 16 bits of 32-bit value. */
+ BFD_RELOC_MIPS16_HI16,
+
+/* MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
+extended and added to form the final result. If the low 16
+bits form a negative number, we need to add one to the high value
+to compensate for the borrow when the low bits are added. */
+ BFD_RELOC_MIPS16_HI16_S,
+
+/* MIPS16 low 16 bits. */
+ BFD_RELOC_MIPS16_LO16,
+
+/* Relocation against a MIPS literal section. */
+ BFD_RELOC_MIPS_LITERAL,
+
+/* MIPS ELF relocations. */
+ BFD_RELOC_MIPS_GOT16,
+ BFD_RELOC_MIPS_CALL16,
+ BFD_RELOC_MIPS_GOT_HI16,
+ BFD_RELOC_MIPS_GOT_LO16,
+ BFD_RELOC_MIPS_CALL_HI16,
+ BFD_RELOC_MIPS_CALL_LO16,
+ BFD_RELOC_MIPS_SUB,
+ BFD_RELOC_MIPS_GOT_PAGE,
+ BFD_RELOC_MIPS_GOT_OFST,
+ BFD_RELOC_MIPS_GOT_DISP,
+ BFD_RELOC_MIPS_SHIFT5,
+ BFD_RELOC_MIPS_SHIFT6,
+ BFD_RELOC_MIPS_INSERT_A,
+ BFD_RELOC_MIPS_INSERT_B,
+ BFD_RELOC_MIPS_DELETE,
+ BFD_RELOC_MIPS_HIGHEST,
+ BFD_RELOC_MIPS_HIGHER,
+ BFD_RELOC_MIPS_SCN_DISP,
+ BFD_RELOC_MIPS_REL16,
+ BFD_RELOC_MIPS_RELGOT,
+ BFD_RELOC_MIPS_JALR,
+ BFD_RELOC_MIPS_TLS_DTPMOD32,
+ BFD_RELOC_MIPS_TLS_DTPREL32,
+ BFD_RELOC_MIPS_TLS_DTPMOD64,
+ BFD_RELOC_MIPS_TLS_DTPREL64,
+ BFD_RELOC_MIPS_TLS_GD,
+ BFD_RELOC_MIPS_TLS_LDM,
+ BFD_RELOC_MIPS_TLS_DTPREL_HI16,
+ BFD_RELOC_MIPS_TLS_DTPREL_LO16,
+ BFD_RELOC_MIPS_TLS_GOTTPREL,
+ BFD_RELOC_MIPS_TLS_TPREL32,
+ BFD_RELOC_MIPS_TLS_TPREL64,
+ BFD_RELOC_MIPS_TLS_TPREL_HI16,
+ BFD_RELOC_MIPS_TLS_TPREL_LO16,
+
+
+/* MIPS ELF relocations (VxWorks and PLT extensions). */
+ BFD_RELOC_MIPS_COPY,
+ BFD_RELOC_MIPS_JUMP_SLOT,
+
+
+/* Moxie ELF relocations. */
+ BFD_RELOC_MOXIE_10_PCREL,
+
+
+/* Fujitsu Frv Relocations. */
+ BFD_RELOC_FRV_LABEL16,
+ BFD_RELOC_FRV_LABEL24,
+ BFD_RELOC_FRV_LO16,
+ BFD_RELOC_FRV_HI16,
+ BFD_RELOC_FRV_GPREL12,
+ BFD_RELOC_FRV_GPRELU12,
+ BFD_RELOC_FRV_GPREL32,
+ BFD_RELOC_FRV_GPRELHI,
+ BFD_RELOC_FRV_GPRELLO,
+ BFD_RELOC_FRV_GOT12,
+ BFD_RELOC_FRV_GOTHI,
+ BFD_RELOC_FRV_GOTLO,
+ BFD_RELOC_FRV_FUNCDESC,
+ BFD_RELOC_FRV_FUNCDESC_GOT12,
+ BFD_RELOC_FRV_FUNCDESC_GOTHI,
+ BFD_RELOC_FRV_FUNCDESC_GOTLO,
+ BFD_RELOC_FRV_FUNCDESC_VALUE,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
+ BFD_RELOC_FRV_GOTOFF12,
+ BFD_RELOC_FRV_GOTOFFHI,
+ BFD_RELOC_FRV_GOTOFFLO,
+ BFD_RELOC_FRV_GETTLSOFF,
+ BFD_RELOC_FRV_TLSDESC_VALUE,
+ BFD_RELOC_FRV_GOTTLSDESC12,
+ BFD_RELOC_FRV_GOTTLSDESCHI,
+ BFD_RELOC_FRV_GOTTLSDESCLO,
+ BFD_RELOC_FRV_TLSMOFF12,
+ BFD_RELOC_FRV_TLSMOFFHI,
+ BFD_RELOC_FRV_TLSMOFFLO,
+ BFD_RELOC_FRV_GOTTLSOFF12,
+ BFD_RELOC_FRV_GOTTLSOFFHI,
+ BFD_RELOC_FRV_GOTTLSOFFLO,
+ BFD_RELOC_FRV_TLSOFF,
+ BFD_RELOC_FRV_TLSDESC_RELAX,
+ BFD_RELOC_FRV_GETTLSOFF_RELAX,
+ BFD_RELOC_FRV_TLSOFF_RELAX,
+ BFD_RELOC_FRV_TLSMOFF,
+
+
+/* This is a 24bit GOT-relative reloc for the mn10300. */
+ BFD_RELOC_MN10300_GOTOFF24,
+
+/* This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT32,
+
+/* This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT24,
+
+/* This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
+in the instruction. */
+ BFD_RELOC_MN10300_GOT16,
+
+/* Copy symbol at runtime. */
+ BFD_RELOC_MN10300_COPY,
+
+/* Create GOT entry. */
+ BFD_RELOC_MN10300_GLOB_DAT,
+
+/* Create PLT entry. */
+ BFD_RELOC_MN10300_JMP_SLOT,
+
+/* Adjust by program base. */
+ BFD_RELOC_MN10300_RELATIVE,
+
+/* Together with another reloc targeted at the same location,
+allows for a value that is the difference of two symbols
+in the same section. */
+ BFD_RELOC_MN10300_SYM_DIFF,
+
+/* The addend of this reloc is an alignment power that must
+be honoured at the offset's location, regardless of linker
+relaxation. */
+ BFD_RELOC_MN10300_ALIGN,
+
+
+/* i386/elf relocations */
+ BFD_RELOC_386_GOT32,
+ BFD_RELOC_386_PLT32,
+ BFD_RELOC_386_COPY,
+ BFD_RELOC_386_GLOB_DAT,
+ BFD_RELOC_386_JUMP_SLOT,
+ BFD_RELOC_386_RELATIVE,
+ BFD_RELOC_386_GOTOFF,
+ BFD_RELOC_386_GOTPC,
+ BFD_RELOC_386_TLS_TPOFF,
+ BFD_RELOC_386_TLS_IE,
+ BFD_RELOC_386_TLS_GOTIE,
+ BFD_RELOC_386_TLS_LE,
+ BFD_RELOC_386_TLS_GD,
+ BFD_RELOC_386_TLS_LDM,
+ BFD_RELOC_386_TLS_LDO_32,
+ BFD_RELOC_386_TLS_IE_32,
+ BFD_RELOC_386_TLS_LE_32,
+ BFD_RELOC_386_TLS_DTPMOD32,
+ BFD_RELOC_386_TLS_DTPOFF32,
+ BFD_RELOC_386_TLS_TPOFF32,
+ BFD_RELOC_386_TLS_GOTDESC,
+ BFD_RELOC_386_TLS_DESC_CALL,
+ BFD_RELOC_386_TLS_DESC,
+ BFD_RELOC_386_IRELATIVE,
+
+/* x86-64/elf relocations */
+ BFD_RELOC_X86_64_GOT32,
+ BFD_RELOC_X86_64_PLT32,
+ BFD_RELOC_X86_64_COPY,
+ BFD_RELOC_X86_64_GLOB_DAT,
+ BFD_RELOC_X86_64_JUMP_SLOT,
+ BFD_RELOC_X86_64_RELATIVE,
+ BFD_RELOC_X86_64_GOTPCREL,
+ BFD_RELOC_X86_64_32S,
+ BFD_RELOC_X86_64_DTPMOD64,
+ BFD_RELOC_X86_64_DTPOFF64,
+ BFD_RELOC_X86_64_TPOFF64,
+ BFD_RELOC_X86_64_TLSGD,
+ BFD_RELOC_X86_64_TLSLD,
+ BFD_RELOC_X86_64_DTPOFF32,
+ BFD_RELOC_X86_64_GOTTPOFF,
+ BFD_RELOC_X86_64_TPOFF32,
+ BFD_RELOC_X86_64_GOTOFF64,
+ BFD_RELOC_X86_64_GOTPC32,
+ BFD_RELOC_X86_64_GOT64,
+ BFD_RELOC_X86_64_GOTPCREL64,
+ BFD_RELOC_X86_64_GOTPC64,
+ BFD_RELOC_X86_64_GOTPLT64,
+ BFD_RELOC_X86_64_PLTOFF64,
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC,
+ BFD_RELOC_X86_64_TLSDESC_CALL,
+ BFD_RELOC_X86_64_TLSDESC,
+ BFD_RELOC_X86_64_IRELATIVE,
+
+/* ns32k relocations */
+ BFD_RELOC_NS32K_IMM_8,
+ BFD_RELOC_NS32K_IMM_16,
+ BFD_RELOC_NS32K_IMM_32,
+ BFD_RELOC_NS32K_IMM_8_PCREL,
+ BFD_RELOC_NS32K_IMM_16_PCREL,
+ BFD_RELOC_NS32K_IMM_32_PCREL,
+ BFD_RELOC_NS32K_DISP_8,
+ BFD_RELOC_NS32K_DISP_16,
+ BFD_RELOC_NS32K_DISP_32,
+ BFD_RELOC_NS32K_DISP_8_PCREL,
+ BFD_RELOC_NS32K_DISP_16_PCREL,
+ BFD_RELOC_NS32K_DISP_32_PCREL,
+
+/* PDP11 relocations */
+ BFD_RELOC_PDP11_DISP_8_PCREL,
+ BFD_RELOC_PDP11_DISP_6_PCREL,
+
+/* Picojava relocs. Not all of these appear in object files. */
+ BFD_RELOC_PJ_CODE_HI16,
+ BFD_RELOC_PJ_CODE_LO16,
+ BFD_RELOC_PJ_CODE_DIR16,
+ BFD_RELOC_PJ_CODE_DIR32,
+ BFD_RELOC_PJ_CODE_REL16,
+ BFD_RELOC_PJ_CODE_REL32,
+
+/* Power(rs6000) and PowerPC relocations. */
+ BFD_RELOC_PPC_B26,
+ BFD_RELOC_PPC_BA26,
+ BFD_RELOC_PPC_TOC16,
+ BFD_RELOC_PPC_B16,
+ BFD_RELOC_PPC_B16_BRTAKEN,
+ BFD_RELOC_PPC_B16_BRNTAKEN,
+ BFD_RELOC_PPC_BA16,
+ BFD_RELOC_PPC_BA16_BRTAKEN,
+ BFD_RELOC_PPC_BA16_BRNTAKEN,
+ BFD_RELOC_PPC_COPY,
+ BFD_RELOC_PPC_GLOB_DAT,
+ BFD_RELOC_PPC_JMP_SLOT,
+ BFD_RELOC_PPC_RELATIVE,
+ BFD_RELOC_PPC_LOCAL24PC,
+ BFD_RELOC_PPC_EMB_NADDR32,
+ BFD_RELOC_PPC_EMB_NADDR16,
+ BFD_RELOC_PPC_EMB_NADDR16_LO,
+ BFD_RELOC_PPC_EMB_NADDR16_HI,
+ BFD_RELOC_PPC_EMB_NADDR16_HA,
+ BFD_RELOC_PPC_EMB_SDAI16,
+ BFD_RELOC_PPC_EMB_SDA2I16,
+ BFD_RELOC_PPC_EMB_SDA2REL,
+ BFD_RELOC_PPC_EMB_SDA21,
+ BFD_RELOC_PPC_EMB_MRKREF,
+ BFD_RELOC_PPC_EMB_RELSEC16,
+ BFD_RELOC_PPC_EMB_RELST_LO,
+ BFD_RELOC_PPC_EMB_RELST_HI,
+ BFD_RELOC_PPC_EMB_RELST_HA,
+ BFD_RELOC_PPC_EMB_BIT_FLD,
+ BFD_RELOC_PPC_EMB_RELSDA,
+ BFD_RELOC_PPC64_HIGHER,
+ BFD_RELOC_PPC64_HIGHER_S,
+ BFD_RELOC_PPC64_HIGHEST,
+ BFD_RELOC_PPC64_HIGHEST_S,
+ BFD_RELOC_PPC64_TOC16_LO,
+ BFD_RELOC_PPC64_TOC16_HI,
+ BFD_RELOC_PPC64_TOC16_HA,
+ BFD_RELOC_PPC64_TOC,
+ BFD_RELOC_PPC64_PLTGOT16,
+ BFD_RELOC_PPC64_PLTGOT16_LO,
+ BFD_RELOC_PPC64_PLTGOT16_HI,
+ BFD_RELOC_PPC64_PLTGOT16_HA,
+ BFD_RELOC_PPC64_ADDR16_DS,
+ BFD_RELOC_PPC64_ADDR16_LO_DS,
+ BFD_RELOC_PPC64_GOT16_DS,
+ BFD_RELOC_PPC64_GOT16_LO_DS,
+ BFD_RELOC_PPC64_PLT16_LO_DS,
+ BFD_RELOC_PPC64_SECTOFF_DS,
+ BFD_RELOC_PPC64_SECTOFF_LO_DS,
+ BFD_RELOC_PPC64_TOC16_DS,
+ BFD_RELOC_PPC64_TOC16_LO_DS,
+ BFD_RELOC_PPC64_PLTGOT16_DS,
+ BFD_RELOC_PPC64_PLTGOT16_LO_DS,
+
+/* PowerPC and PowerPC64 thread-local storage relocations. */
+ BFD_RELOC_PPC_TLS,
+ BFD_RELOC_PPC_TLSGD,
+ BFD_RELOC_PPC_TLSLD,
+ BFD_RELOC_PPC_DTPMOD,
+ BFD_RELOC_PPC_TPREL16,
+ BFD_RELOC_PPC_TPREL16_LO,
+ BFD_RELOC_PPC_TPREL16_HI,
+ BFD_RELOC_PPC_TPREL16_HA,
+ BFD_RELOC_PPC_TPREL,
+ BFD_RELOC_PPC_DTPREL16,
+ BFD_RELOC_PPC_DTPREL16_LO,
+ BFD_RELOC_PPC_DTPREL16_HI,
+ BFD_RELOC_PPC_DTPREL16_HA,
+ BFD_RELOC_PPC_DTPREL,
+ BFD_RELOC_PPC_GOT_TLSGD16,
+ BFD_RELOC_PPC_GOT_TLSGD16_LO,
+ BFD_RELOC_PPC_GOT_TLSGD16_HI,
+ BFD_RELOC_PPC_GOT_TLSGD16_HA,
+ BFD_RELOC_PPC_GOT_TLSLD16,
+ BFD_RELOC_PPC_GOT_TLSLD16_LO,
+ BFD_RELOC_PPC_GOT_TLSLD16_HI,
+ BFD_RELOC_PPC_GOT_TLSLD16_HA,
+ BFD_RELOC_PPC_GOT_TPREL16,
+ BFD_RELOC_PPC_GOT_TPREL16_LO,
+ BFD_RELOC_PPC_GOT_TPREL16_HI,
+ BFD_RELOC_PPC_GOT_TPREL16_HA,
+ BFD_RELOC_PPC_GOT_DTPREL16,
+ BFD_RELOC_PPC_GOT_DTPREL16_LO,
+ BFD_RELOC_PPC_GOT_DTPREL16_HI,
+ BFD_RELOC_PPC_GOT_DTPREL16_HA,
+ BFD_RELOC_PPC64_TPREL16_DS,
+ BFD_RELOC_PPC64_TPREL16_LO_DS,
+ BFD_RELOC_PPC64_TPREL16_HIGHER,
+ BFD_RELOC_PPC64_TPREL16_HIGHERA,
+ BFD_RELOC_PPC64_TPREL16_HIGHEST,
+ BFD_RELOC_PPC64_TPREL16_HIGHESTA,
+ BFD_RELOC_PPC64_DTPREL16_DS,
+ BFD_RELOC_PPC64_DTPREL16_LO_DS,
+ BFD_RELOC_PPC64_DTPREL16_HIGHER,
+ BFD_RELOC_PPC64_DTPREL16_HIGHERA,
+ BFD_RELOC_PPC64_DTPREL16_HIGHEST,
+ BFD_RELOC_PPC64_DTPREL16_HIGHESTA,
+
+/* IBM 370/390 relocations */
+ BFD_RELOC_I370_D12,
+
+/* The type of reloc used to build a constructor table - at the moment
+probably a 32 bit wide absolute relocation, but the target can choose.
+It generally does map to one of the other relocation types. */
+ BFD_RELOC_CTOR,
+
+/* ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
+not stored in the instruction. */
+ BFD_RELOC_ARM_PCREL_BRANCH,
+
+/* ARM 26 bit pc-relative branch. The lowest bit must be zero and is
+not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+field in the instruction. */
+ BFD_RELOC_ARM_PCREL_BLX,
+
+/* Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
+not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+field in the instruction. */
+ BFD_RELOC_THUMB_PCREL_BLX,
+
+/* ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction. */
+ BFD_RELOC_ARM_PCREL_CALL,
+
+/* ARM 26-bit pc-relative branch for B or conditional BL instruction. */
+ BFD_RELOC_ARM_PCREL_JUMP,
+
+/* Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
+The lowest bit must be zero and is not stored in the instruction.
+Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
+"nn" one smaller in all cases. Note further that BRANCH23
+corresponds to R_ARM_THM_CALL. */
+ BFD_RELOC_THUMB_PCREL_BRANCH7,
+ BFD_RELOC_THUMB_PCREL_BRANCH9,
+ BFD_RELOC_THUMB_PCREL_BRANCH12,
+ BFD_RELOC_THUMB_PCREL_BRANCH20,
+ BFD_RELOC_THUMB_PCREL_BRANCH23,
+ BFD_RELOC_THUMB_PCREL_BRANCH25,
+
+/* 12-bit immediate offset, used in ARM-format ldr and str instructions. */
+ BFD_RELOC_ARM_OFFSET_IMM,
+
+/* 5-bit immediate offset, used in Thumb-format ldr and str instructions. */
+ BFD_RELOC_ARM_THUMB_OFFSET,
+
+/* Pc-relative or absolute relocation depending on target. Used for
+entries in .init_array sections. */
+ BFD_RELOC_ARM_TARGET1,
+
+/* Read-only segment base relative address. */
+ BFD_RELOC_ARM_ROSEGREL32,
+
+/* Data segment base relative address. */
+ BFD_RELOC_ARM_SBREL32,
+
+/* This reloc is used for references to RTTI data from exception handling
+tables. The actual definition depends on the target. It may be a
+pc-relative or some form of GOT-indirect relocation. */
+ BFD_RELOC_ARM_TARGET2,
+
+/* 31-bit PC relative address. */
+ BFD_RELOC_ARM_PREL31,
+
+/* Low and High halfword relocations for MOVW and MOVT instructions. */
+ BFD_RELOC_ARM_MOVW,
+ BFD_RELOC_ARM_MOVT,
+ BFD_RELOC_ARM_MOVW_PCREL,
+ BFD_RELOC_ARM_MOVT_PCREL,
+ BFD_RELOC_ARM_THUMB_MOVW,
+ BFD_RELOC_ARM_THUMB_MOVT,
+ BFD_RELOC_ARM_THUMB_MOVW_PCREL,
+ BFD_RELOC_ARM_THUMB_MOVT_PCREL,
+
+/* Relocations for setting up GOTs and PLTs for shared libraries. */
+ BFD_RELOC_ARM_JUMP_SLOT,
+ BFD_RELOC_ARM_GLOB_DAT,
+ BFD_RELOC_ARM_GOT32,
+ BFD_RELOC_ARM_PLT32,
+ BFD_RELOC_ARM_RELATIVE,
+ BFD_RELOC_ARM_GOTOFF,
+ BFD_RELOC_ARM_GOTPC,
+ BFD_RELOC_ARM_GOT_PREL,
+
+/* ARM thread-local storage relocations. */
+ BFD_RELOC_ARM_TLS_GD32,
+ BFD_RELOC_ARM_TLS_LDO32,
+ BFD_RELOC_ARM_TLS_LDM32,
+ BFD_RELOC_ARM_TLS_DTPOFF32,
+ BFD_RELOC_ARM_TLS_DTPMOD32,
+ BFD_RELOC_ARM_TLS_TPOFF32,
+ BFD_RELOC_ARM_TLS_IE32,
+ BFD_RELOC_ARM_TLS_LE32,
+
+/* ARM group relocations. */
+ BFD_RELOC_ARM_ALU_PC_G0_NC,
+ BFD_RELOC_ARM_ALU_PC_G0,
+ BFD_RELOC_ARM_ALU_PC_G1_NC,
+ BFD_RELOC_ARM_ALU_PC_G1,
+ BFD_RELOC_ARM_ALU_PC_G2,
+ BFD_RELOC_ARM_LDR_PC_G0,
+ BFD_RELOC_ARM_LDR_PC_G1,
+ BFD_RELOC_ARM_LDR_PC_G2,
+ BFD_RELOC_ARM_LDRS_PC_G0,
+ BFD_RELOC_ARM_LDRS_PC_G1,
+ BFD_RELOC_ARM_LDRS_PC_G2,
+ BFD_RELOC_ARM_LDC_PC_G0,
+ BFD_RELOC_ARM_LDC_PC_G1,
+ BFD_RELOC_ARM_LDC_PC_G2,
+ BFD_RELOC_ARM_ALU_SB_G0_NC,
+ BFD_RELOC_ARM_ALU_SB_G0,
+ BFD_RELOC_ARM_ALU_SB_G1_NC,
+ BFD_RELOC_ARM_ALU_SB_G1,
+ BFD_RELOC_ARM_ALU_SB_G2,
+ BFD_RELOC_ARM_LDR_SB_G0,
+ BFD_RELOC_ARM_LDR_SB_G1,
+ BFD_RELOC_ARM_LDR_SB_G2,
+ BFD_RELOC_ARM_LDRS_SB_G0,
+ BFD_RELOC_ARM_LDRS_SB_G1,
+ BFD_RELOC_ARM_LDRS_SB_G2,
+ BFD_RELOC_ARM_LDC_SB_G0,
+ BFD_RELOC_ARM_LDC_SB_G1,
+ BFD_RELOC_ARM_LDC_SB_G2,
+
+/* Annotation of BX instructions. */
+ BFD_RELOC_ARM_V4BX,
+
+/* These relocs are only used within the ARM assembler. They are not
+(at present) written to any object files. */
+ BFD_RELOC_ARM_IMMEDIATE,
+ BFD_RELOC_ARM_ADRL_IMMEDIATE,
+ BFD_RELOC_ARM_T32_IMMEDIATE,
+ BFD_RELOC_ARM_T32_ADD_IMM,
+ BFD_RELOC_ARM_T32_IMM12,
+ BFD_RELOC_ARM_T32_ADD_PC12,
+ BFD_RELOC_ARM_SHIFT_IMM,
+ BFD_RELOC_ARM_SMC,
+ BFD_RELOC_ARM_SWI,
+ BFD_RELOC_ARM_MULTI,
+ BFD_RELOC_ARM_CP_OFF_IMM,
+ BFD_RELOC_ARM_CP_OFF_IMM_S2,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2,
+ BFD_RELOC_ARM_ADR_IMM,
+ BFD_RELOC_ARM_LDR_IMM,
+ BFD_RELOC_ARM_LITERAL,
+ BFD_RELOC_ARM_IN_POOL,
+ BFD_RELOC_ARM_OFFSET_IMM8,
+ BFD_RELOC_ARM_T32_OFFSET_U8,
+ BFD_RELOC_ARM_T32_OFFSET_IMM,
+ BFD_RELOC_ARM_HWLITERAL,
+ BFD_RELOC_ARM_THUMB_ADD,
+ BFD_RELOC_ARM_THUMB_IMM,
+ BFD_RELOC_ARM_THUMB_SHIFT,
+
+/* Renesas / SuperH SH relocs. Not all of these appear in object files. */
+ BFD_RELOC_SH_PCDISP8BY2,
+ BFD_RELOC_SH_PCDISP12BY2,
+ BFD_RELOC_SH_IMM3,
+ BFD_RELOC_SH_IMM3U,
+ BFD_RELOC_SH_DISP12,
+ BFD_RELOC_SH_DISP12BY2,
+ BFD_RELOC_SH_DISP12BY4,
+ BFD_RELOC_SH_DISP12BY8,
+ BFD_RELOC_SH_DISP20,
+ BFD_RELOC_SH_DISP20BY8,
+ BFD_RELOC_SH_IMM4,
+ BFD_RELOC_SH_IMM4BY2,
+ BFD_RELOC_SH_IMM4BY4,
+ BFD_RELOC_SH_IMM8,
+ BFD_RELOC_SH_IMM8BY2,
+ BFD_RELOC_SH_IMM8BY4,
+ BFD_RELOC_SH_PCRELIMM8BY2,
+ BFD_RELOC_SH_PCRELIMM8BY4,
+ BFD_RELOC_SH_SWITCH16,
+ BFD_RELOC_SH_SWITCH32,
+ BFD_RELOC_SH_USES,
+ BFD_RELOC_SH_COUNT,
+ BFD_RELOC_SH_ALIGN,
+ BFD_RELOC_SH_CODE,
+ BFD_RELOC_SH_DATA,
+ BFD_RELOC_SH_LABEL,
+ BFD_RELOC_SH_LOOP_START,
+ BFD_RELOC_SH_LOOP_END,
+ BFD_RELOC_SH_COPY,
+ BFD_RELOC_SH_GLOB_DAT,
+ BFD_RELOC_SH_JMP_SLOT,
+ BFD_RELOC_SH_RELATIVE,
+ BFD_RELOC_SH_GOTPC,
+ BFD_RELOC_SH_GOT_LOW16,
+ BFD_RELOC_SH_GOT_MEDLOW16,
+ BFD_RELOC_SH_GOT_MEDHI16,
+ BFD_RELOC_SH_GOT_HI16,
+ BFD_RELOC_SH_GOTPLT_LOW16,
+ BFD_RELOC_SH_GOTPLT_MEDLOW16,
+ BFD_RELOC_SH_GOTPLT_MEDHI16,
+ BFD_RELOC_SH_GOTPLT_HI16,
+ BFD_RELOC_SH_PLT_LOW16,
+ BFD_RELOC_SH_PLT_MEDLOW16,
+ BFD_RELOC_SH_PLT_MEDHI16,
+ BFD_RELOC_SH_PLT_HI16,
+ BFD_RELOC_SH_GOTOFF_LOW16,
+ BFD_RELOC_SH_GOTOFF_MEDLOW16,
+ BFD_RELOC_SH_GOTOFF_MEDHI16,
+ BFD_RELOC_SH_GOTOFF_HI16,
+ BFD_RELOC_SH_GOTPC_LOW16,
+ BFD_RELOC_SH_GOTPC_MEDLOW16,
+ BFD_RELOC_SH_GOTPC_MEDHI16,
+ BFD_RELOC_SH_GOTPC_HI16,
+ BFD_RELOC_SH_COPY64,
+ BFD_RELOC_SH_GLOB_DAT64,
+ BFD_RELOC_SH_JMP_SLOT64,
+ BFD_RELOC_SH_RELATIVE64,
+ BFD_RELOC_SH_GOT10BY4,
+ BFD_RELOC_SH_GOT10BY8,
+ BFD_RELOC_SH_GOTPLT10BY4,
+ BFD_RELOC_SH_GOTPLT10BY8,
+ BFD_RELOC_SH_GOTPLT32,
+ BFD_RELOC_SH_SHMEDIA_CODE,
+ BFD_RELOC_SH_IMMU5,
+ BFD_RELOC_SH_IMMS6,
+ BFD_RELOC_SH_IMMS6BY32,
+ BFD_RELOC_SH_IMMU6,
+ BFD_RELOC_SH_IMMS10,
+ BFD_RELOC_SH_IMMS10BY2,
+ BFD_RELOC_SH_IMMS10BY4,
+ BFD_RELOC_SH_IMMS10BY8,
+ BFD_RELOC_SH_IMMS16,
+ BFD_RELOC_SH_IMMU16,
+ BFD_RELOC_SH_IMM_LOW16,
+ BFD_RELOC_SH_IMM_LOW16_PCREL,
+ BFD_RELOC_SH_IMM_MEDLOW16,
+ BFD_RELOC_SH_IMM_MEDLOW16_PCREL,
+ BFD_RELOC_SH_IMM_MEDHI16,
+ BFD_RELOC_SH_IMM_MEDHI16_PCREL,
+ BFD_RELOC_SH_IMM_HI16,
+ BFD_RELOC_SH_IMM_HI16_PCREL,
+ BFD_RELOC_SH_PT_16,
+ BFD_RELOC_SH_TLS_GD_32,
+ BFD_RELOC_SH_TLS_LD_32,
+ BFD_RELOC_SH_TLS_LDO_32,
+ BFD_RELOC_SH_TLS_IE_32,
+ BFD_RELOC_SH_TLS_LE_32,
+ BFD_RELOC_SH_TLS_DTPMOD32,
+ BFD_RELOC_SH_TLS_DTPOFF32,
+ BFD_RELOC_SH_TLS_TPOFF32,
+
+/* ARC Cores relocs.
+ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
+not stored in the instruction. The high 20 bits are installed in bits 26
+through 7 of the instruction. */
+ BFD_RELOC_ARC_B22_PCREL,
+
+/* ARC 26 bit absolute branch. The lowest two bits must be zero and are not
+stored in the instruction. The high 24 bits are installed in bits 23
+through 0. */
+ BFD_RELOC_ARC_B26,
+
+/* ADI Blackfin 16 bit immediate absolute reloc. */
+ BFD_RELOC_BFIN_16_IMM,
+
+/* ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. */
+ BFD_RELOC_BFIN_16_HIGH,
+
+/* ADI Blackfin 'a' part of LSETUP. */
+ BFD_RELOC_BFIN_4_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_5_PCREL,
+
+/* ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. */
+ BFD_RELOC_BFIN_16_LOW,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_10_PCREL,
+
+/* ADI Blackfin 'b' part of LSETUP. */
+ BFD_RELOC_BFIN_11_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP,
+
+/* ADI Blackfin Short jump, pcrel. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP_S,
+
+/* ADI Blackfin Call.x not implemented. */
+ BFD_RELOC_BFIN_24_PCREL_CALL_X,
+
+/* ADI Blackfin Long Jump pcrel. */
+ BFD_RELOC_BFIN_24_PCREL_JUMP_L,
+
+/* ADI Blackfin FD-PIC relocations. */
+ BFD_RELOC_BFIN_GOT17M4,
+ BFD_RELOC_BFIN_GOTHI,
+ BFD_RELOC_BFIN_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC,
+ BFD_RELOC_BFIN_FUNCDESC_GOT17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC_VALUE,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO,
+ BFD_RELOC_BFIN_GOTOFF17M4,
+ BFD_RELOC_BFIN_GOTOFFHI,
+ BFD_RELOC_BFIN_GOTOFFLO,
+
+/* ADI Blackfin GOT relocation. */
+ BFD_RELOC_BFIN_GOT,
+
+/* ADI Blackfin PLTPC relocation. */
+ BFD_RELOC_BFIN_PLTPC,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PUSH,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_CONST,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_SUB,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MULT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_DIV,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MOD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_RSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_AND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_OR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_XOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LAND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LEN,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_NEG,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_COMP,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_HWPAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADDR,
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_10_PCREL_R,
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. This is the same as the previous reloc
+except it is in the left container, i.e.,
+shifted left 15 bits. */
+ BFD_RELOC_D10V_10_PCREL_L,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18_PCREL,
+
+/* Mitsubishi D30V relocs.
+This is a 6-bit absolute reloc. */
+ BFD_RELOC_D30V_6,
+
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_9_PCREL,
+
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_9_PCREL_R,
+
+/* This is a 12-bit absolute reloc with the
+right 3 bitsassumed to be 0. */
+ BFD_RELOC_D30V_15,
+
+/* This is a 12-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_15_PCREL,
+
+/* This is a 12-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_15_PCREL_R,
+
+/* This is an 18-bit absolute reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_21,
+
+/* This is an 18-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_21_PCREL,
+
+/* This is an 18-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_21_PCREL_R,
+
+/* This is a 32-bit absolute reloc. */
+ BFD_RELOC_D30V_32,
+
+/* This is a 32-bit pc-relative reloc. */
+ BFD_RELOC_D30V_32_PCREL,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_HI16_S,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_LO16,
+
+/* DLX relocs */
+ BFD_RELOC_DLX_JMP26,
+
+/* Renesas M16C/M32C Relocations. */
+ BFD_RELOC_M32C_HI8,
+ BFD_RELOC_M32C_RL_JUMP,
+ BFD_RELOC_M32C_RL_1ADDR,
+ BFD_RELOC_M32C_RL_2ADDR,
+
+/* Renesas M32R (formerly Mitsubishi M32R) relocs.
+This is a 24 bit absolute address. */
+ BFD_RELOC_M32R_24,
+
+/* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_10_PCREL,
+
+/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_18_PCREL,
+
+/* This is a 26-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_26_PCREL,
+
+/* This is a 16-bit reloc containing the high 16 bits of an address
+used when the lower 16 bits are treated as unsigned. */
+ BFD_RELOC_M32R_HI16_ULO,
+
+/* This is a 16-bit reloc containing the high 16 bits of an address
+used when the lower 16 bits are treated as signed. */
+ BFD_RELOC_M32R_HI16_SLO,
+
+/* This is a 16-bit reloc containing the lower 16 bits of an address. */
+ BFD_RELOC_M32R_LO16,
+
+/* This is a 16-bit reloc containing the small data area offset for use in
+add3, load, and store instructions. */
+ BFD_RELOC_M32R_SDA16,
+
+/* For PIC. */
+ BFD_RELOC_M32R_GOT24,
+ BFD_RELOC_M32R_26_PLTREL,
+ BFD_RELOC_M32R_COPY,
+ BFD_RELOC_M32R_GLOB_DAT,
+ BFD_RELOC_M32R_JMP_SLOT,
+ BFD_RELOC_M32R_RELATIVE,
+ BFD_RELOC_M32R_GOTOFF,
+ BFD_RELOC_M32R_GOTOFF_HI_ULO,
+ BFD_RELOC_M32R_GOTOFF_HI_SLO,
+ BFD_RELOC_M32R_GOTOFF_LO,
+ BFD_RELOC_M32R_GOTPC24,
+ BFD_RELOC_M32R_GOT16_HI_ULO,
+ BFD_RELOC_M32R_GOT16_HI_SLO,
+ BFD_RELOC_M32R_GOT16_LO,
+ BFD_RELOC_M32R_GOTPC_HI_ULO,
+ BFD_RELOC_M32R_GOTPC_HI_SLO,
+ BFD_RELOC_M32R_GOTPC_LO,
+
+/* This is a 9-bit reloc */
+ BFD_RELOC_V850_9_PCREL,
+
+/* This is a 22-bit reloc */
+ BFD_RELOC_V850_22_PCREL,
+
+/* This is a 16 bit offset from the short data area pointer. */
+ BFD_RELOC_V850_SDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+short data area pointer. */
+ BFD_RELOC_V850_SDA_15_16_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer. */
+ BFD_RELOC_V850_ZDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+zero data area pointer. */
+ BFD_RELOC_V850_ZDA_15_16_OFFSET,
+
+/* This is an 8 bit offset (of which only 6 bits are used) from the
+tiny data area pointer. */
+ BFD_RELOC_V850_TDA_6_8_OFFSET,
+
+/* This is an 8bit offset (of which only 7 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_7_8_OFFSET,
+
+/* This is a 7 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_7_7_OFFSET,
+
+/* This is a 16 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_16_16_OFFSET,
+
+/* This is a 5 bit offset (of which only 4 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_4_5_OFFSET,
+
+/* This is a 4 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_4_4_OFFSET,
+
+/* This is a 16 bit offset from the short data area pointer, with the
+bits placed non-contiguously in the instruction. */
+ BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer, with the
+bits placed non-contiguously in the instruction. */
+ BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET,
+
+/* This is a 6 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_6_7_OFFSET,
+
+/* This is a 16 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_16_16_OFFSET,
+
+/* Used for relaxing indirect function calls. */
+ BFD_RELOC_V850_LONGCALL,
+
+/* Used for relaxing indirect jumps. */
+ BFD_RELOC_V850_LONGJUMP,
+
+/* Used to maintain alignment whilst relaxing. */
+ BFD_RELOC_V850_ALIGN,
+
+/* This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
+instructions. */
+ BFD_RELOC_V850_LO16_SPLIT_OFFSET,
+
+/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_32_PCREL,
+
+/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_16_PCREL,
+
+/* This is a 8bit DP reloc for the tms320c30, where the most
+significant 8 bits of a 24 bit word are placed into the least
+significant 8 bits of the opcode. */
+ BFD_RELOC_TIC30_LDP,
+
+/* This is a 7bit reloc for the tms320c54x, where the least
+significant 7 bits of a 16 bit word are placed into the least
+significant 7 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTLS7,
+
+/* This is a 9bit DP reloc for the tms320c54x, where the most
+significant 9 bits of a 16 bit word are placed into the least
+significant 9 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTMS9,
+
+/* This is an extended address 23-bit reloc for the tms320c54x. */
+ BFD_RELOC_TIC54X_23,
+
+/* This is a 16-bit reloc for the tms320c54x, where the least
+significant 16 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_16_OF_23,
+
+/* This is a reloc for the tms320c54x, where the most
+significant 7 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_MS7_OF_23,
+
+/* This is a 48 bit reloc for the FR30 that stores 32 bits. */
+ BFD_RELOC_FR30_48,
+
+/* This is a 32 bit reloc for the FR30 that stores 20 bits split up into
+two sections. */
+ BFD_RELOC_FR30_20,
+
+/* This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
+4 bits. */
+ BFD_RELOC_FR30_6_IN_4,
+
+/* This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
+into 8 bits. */
+ BFD_RELOC_FR30_8_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
+into 8 bits. */
+ BFD_RELOC_FR30_9_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
+into 8 bits. */
+ BFD_RELOC_FR30_10_IN_8,
+
+/* This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
+short offset into 8 bits. */
+ BFD_RELOC_FR30_9_PCREL,
+
+/* This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
+short offset into 11 bits. */
+ BFD_RELOC_FR30_12_PCREL,
+
+/* Motorola Mcore relocations. */
+ BFD_RELOC_MCORE_PCREL_IMM8BY4,
+ BFD_RELOC_MCORE_PCREL_IMM11BY2,
+ BFD_RELOC_MCORE_PCREL_IMM4BY2,
+ BFD_RELOC_MCORE_PCREL_32,
+ BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2,
+ BFD_RELOC_MCORE_RVA,
+
+/* Toshiba Media Processor Relocations. */
+ BFD_RELOC_MEP_8,
+ BFD_RELOC_MEP_16,
+ BFD_RELOC_MEP_32,
+ BFD_RELOC_MEP_PCREL8A2,
+ BFD_RELOC_MEP_PCREL12A2,
+ BFD_RELOC_MEP_PCREL17A2,
+ BFD_RELOC_MEP_PCREL24A2,
+ BFD_RELOC_MEP_PCABS24A2,
+ BFD_RELOC_MEP_LOW16,
+ BFD_RELOC_MEP_HI16U,
+ BFD_RELOC_MEP_HI16S,
+ BFD_RELOC_MEP_GPREL,
+ BFD_RELOC_MEP_TPREL,
+ BFD_RELOC_MEP_TPREL7,
+ BFD_RELOC_MEP_TPREL7A2,
+ BFD_RELOC_MEP_TPREL7A4,
+ BFD_RELOC_MEP_UIMM24,
+ BFD_RELOC_MEP_ADDR24A4,
+ BFD_RELOC_MEP_GNU_VTINHERIT,
+ BFD_RELOC_MEP_GNU_VTENTRY,
+
+
+/* These are relocations for the GETA instruction. */
+ BFD_RELOC_MMIX_GETA,
+ BFD_RELOC_MMIX_GETA_1,
+ BFD_RELOC_MMIX_GETA_2,
+ BFD_RELOC_MMIX_GETA_3,
+
+/* These are relocations for a conditional branch instruction. */
+ BFD_RELOC_MMIX_CBRANCH,
+ BFD_RELOC_MMIX_CBRANCH_J,
+ BFD_RELOC_MMIX_CBRANCH_1,
+ BFD_RELOC_MMIX_CBRANCH_2,
+ BFD_RELOC_MMIX_CBRANCH_3,
+
+/* These are relocations for the PUSHJ instruction. */
+ BFD_RELOC_MMIX_PUSHJ,
+ BFD_RELOC_MMIX_PUSHJ_1,
+ BFD_RELOC_MMIX_PUSHJ_2,
+ BFD_RELOC_MMIX_PUSHJ_3,
+ BFD_RELOC_MMIX_PUSHJ_STUBBABLE,
+
+/* These are relocations for the JMP instruction. */
+ BFD_RELOC_MMIX_JMP,
+ BFD_RELOC_MMIX_JMP_1,
+ BFD_RELOC_MMIX_JMP_2,
+ BFD_RELOC_MMIX_JMP_3,
+
+/* This is a relocation for a relative address as in a GETA instruction or
+a branch. */
+ BFD_RELOC_MMIX_ADDR19,
+
+/* This is a relocation for a relative address as in a JMP instruction. */
+ BFD_RELOC_MMIX_ADDR27,
+
+/* This is a relocation for an instruction field that may be a general
+register or a value 0..255. */
+ BFD_RELOC_MMIX_REG_OR_BYTE,
+
+/* This is a relocation for an instruction field that may be a general
+register. */
+ BFD_RELOC_MMIX_REG,
+
+/* This is a relocation for two instruction fields holding a register and
+an offset, the equivalent of the relocation. */
+ BFD_RELOC_MMIX_BASE_PLUS_OFFSET,
+
+/* This relocation is an assertion that the expression is not allocated as
+a global register. It does not modify contents. */
+ BFD_RELOC_MMIX_LOCAL,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit pc relative
+short offset into 7 bits. */
+ BFD_RELOC_AVR_7_PCREL,
+
+/* This is a 16 bit reloc for the AVR that stores 13 bit pc relative
+short offset into 12 bits. */
+ BFD_RELOC_AVR_13_PCREL,
+
+/* This is a 16 bit reloc for the AVR that stores 17 bit value (usually
+program memory address) into 16 bits. */
+ BFD_RELOC_AVR_16_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_LO8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HI8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of program memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HH8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(usually data memory address) into 8 bit immediate value of SUBI insn. */
+ BFD_RELOC_AVR_LO8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 8 bit of data memory address) into 8 bit immediate value of
+SUBI insn. */
+ BFD_RELOC_AVR_HI8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(most high 8 bit of program memory address) into 8 bit immediate value
+of LDI or SUBI insn. */
+ BFD_RELOC_AVR_HH8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_LO8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value
+(command address) into 8 bit immediate value of LDI insn. If the address
+is beyond the 128k boundary, the linker inserts a jump stub for this reloc
+in the lower 128k. */
+ BFD_RELOC_AVR_LO8_LDI_GS,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HI8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+of command address) into 8 bit immediate value of LDI insn. If the address
+is beyond the 128k boundary, the linker inserts a jump stub for this reloc
+below 128k. */
+ BFD_RELOC_AVR_HI8_LDI_GS,
+
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of command address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_HH8_LDI_PM,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(usually command address) into 8 bit immediate value of SUBI insn. */
+ BFD_RELOC_AVR_LO8_LDI_PM_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 8 bit of 16 bit command address) into 8 bit immediate value
+of SUBI insn. */
+ BFD_RELOC_AVR_HI8_LDI_PM_NEG,
+
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
+(high 6 bit of 22 bit command address) into 8 bit immediate
+value of SUBI insn. */
+ BFD_RELOC_AVR_HH8_LDI_PM_NEG,
+
+/* This is a 32 bit reloc for the AVR that stores 23 bit value
+into 22 bits. */
+ BFD_RELOC_AVR_CALL,
+
+/* This is a 16 bit reloc for the AVR that stores all needed bits
+for absolute addressing with ldi with overflow check to linktime */
+ BFD_RELOC_AVR_LDI,
+
+/* This is a 6 bit reloc for the AVR that stores offset for ldd/std
+instructions */
+ BFD_RELOC_AVR_6,
+
+/* This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
+instructions */
+ BFD_RELOC_AVR_6_ADIW,
+
+/* Direct 12 bit. */
+ BFD_RELOC_390_12,
+
+/* 12 bit GOT offset. */
+ BFD_RELOC_390_GOT12,
+
+/* 32 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT32,
+
+/* Copy symbol at runtime. */
+ BFD_RELOC_390_COPY,
+
+/* Create GOT entry. */
+ BFD_RELOC_390_GLOB_DAT,
+
+/* Create PLT entry. */
+ BFD_RELOC_390_JMP_SLOT,
+
+/* Adjust by program base. */
+ BFD_RELOC_390_RELATIVE,
+
+/* 32 bit PC relative offset to GOT. */
+ BFD_RELOC_390_GOTPC,
+
+/* 16 bit GOT offset. */
+ BFD_RELOC_390_GOT16,
+
+/* PC relative 16 bit shifted by 1. */
+ BFD_RELOC_390_PC16DBL,
+
+/* 16 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT16DBL,
+
+/* PC relative 32 bit shifted by 1. */
+ BFD_RELOC_390_PC32DBL,
+
+/* 32 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT32DBL,
+
+/* 32 bit PC rel. GOT shifted by 1. */
+ BFD_RELOC_390_GOTPCDBL,
+
+/* 64 bit GOT offset. */
+ BFD_RELOC_390_GOT64,
+
+/* 64 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT64,
+
+/* 32 bit rel. offset to GOT entry. */
+ BFD_RELOC_390_GOTENT,
+
+/* 64 bit offset to GOT. */
+ BFD_RELOC_390_GOTOFF64,
+
+/* 12-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT12,
+
+/* 16-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT16,
+
+/* 32-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT32,
+
+/* 64-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLT64,
+
+/* 32-bit rel. offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_390_GOTPLTENT,
+
+/* 16-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF16,
+
+/* 32-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF32,
+
+/* 64-bit rel. offset from the GOT to a PLT entry. */
+ BFD_RELOC_390_PLTOFF64,
+
+/* s390 tls relocations. */
+ BFD_RELOC_390_TLS_LOAD,
+ BFD_RELOC_390_TLS_GDCALL,
+ BFD_RELOC_390_TLS_LDCALL,
+ BFD_RELOC_390_TLS_GD32,
+ BFD_RELOC_390_TLS_GD64,
+ BFD_RELOC_390_TLS_GOTIE12,
+ BFD_RELOC_390_TLS_GOTIE32,
+ BFD_RELOC_390_TLS_GOTIE64,
+ BFD_RELOC_390_TLS_LDM32,
+ BFD_RELOC_390_TLS_LDM64,
+ BFD_RELOC_390_TLS_IE32,
+ BFD_RELOC_390_TLS_IE64,
+ BFD_RELOC_390_TLS_IEENT,
+ BFD_RELOC_390_TLS_LE32,
+ BFD_RELOC_390_TLS_LE64,
+ BFD_RELOC_390_TLS_LDO32,
+ BFD_RELOC_390_TLS_LDO64,
+ BFD_RELOC_390_TLS_DTPMOD,
+ BFD_RELOC_390_TLS_DTPOFF,
+ BFD_RELOC_390_TLS_TPOFF,
+
+/* Long displacement extension. */
+ BFD_RELOC_390_20,
+ BFD_RELOC_390_GOT20,
+ BFD_RELOC_390_GOTPLT20,
+ BFD_RELOC_390_TLS_GOTIE20,
+
+/* Score relocations
+Low 16 bit for load/store */
+ BFD_RELOC_SCORE_GPREL15,
+
+/* This is a 24-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_DUMMY2,
+ BFD_RELOC_SCORE_JMP,
+
+/* This is a 19-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_BRANCH,
+
+/* This is a 32-bit reloc for 48-bit instructions. */
+ BFD_RELOC_SCORE_IMM30,
+
+/* This is a 32-bit reloc for 48-bit instructions. */
+ BFD_RELOC_SCORE_IMM32,
+
+/* This is a 11-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE16_JMP,
+
+/* This is a 8-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE16_BRANCH,
+
+/* This is a 9-bit reloc with the right 1 bit assumed to be 0 */
+ BFD_RELOC_SCORE_BCMP,
+
+/* Undocumented Score relocs */
+ BFD_RELOC_SCORE_GOT15,
+ BFD_RELOC_SCORE_GOT_LO16,
+ BFD_RELOC_SCORE_CALL15,
+ BFD_RELOC_SCORE_DUMMY_HI16,
+
+/* Scenix IP2K - 9-bit register number / data address */
+ BFD_RELOC_IP2K_FR9,
+
+/* Scenix IP2K - 4-bit register/data bank number */
+ BFD_RELOC_IP2K_BANK,
+
+/* Scenix IP2K - low 13 bits of instruction word address */
+ BFD_RELOC_IP2K_ADDR16CJP,
+
+/* Scenix IP2K - high 3 bits of instruction word address */
+ BFD_RELOC_IP2K_PAGE3,
+
+/* Scenix IP2K - ext/low/high 8 bits of data address */
+ BFD_RELOC_IP2K_LO8DATA,
+ BFD_RELOC_IP2K_HI8DATA,
+ BFD_RELOC_IP2K_EX8DATA,
+
+/* Scenix IP2K - low/high 8 bits of instruction word address */
+ BFD_RELOC_IP2K_LO8INSN,
+ BFD_RELOC_IP2K_HI8INSN,
+
+/* Scenix IP2K - even/odd PC modifier to modify snb pcl.0 */
+ BFD_RELOC_IP2K_PC_SKIP,
+
+/* Scenix IP2K - 16 bit word address in text section. */
+ BFD_RELOC_IP2K_TEXT,
+
+/* Scenix IP2K - 7-bit sp or dp offset */
+ BFD_RELOC_IP2K_FR_OFFSET,
+
+/* Scenix VPE4K coprocessor - data/insn-space addressing */
+ BFD_RELOC_VPE4KMATH_DATA,
+ BFD_RELOC_VPE4KMATH_INSN,
+
+/* These two relocations are used by the linker to determine which of
+the entries in a C++ virtual function table are actually used. When
+the --gc-sections option is given, the linker will zero out the entries
+that are not used, so that the code for those functions need not be
+included in the output.
+
+VTABLE_INHERIT is a zero-space relocation used to describe to the
+linker the inheritance tree of a C++ virtual function table. The
+relocation's symbol should be the parent class' vtable, and the
+relocation should be located at the child vtable.
+
+VTABLE_ENTRY is a zero-space relocation that describes the use of a
+virtual function table entry. The reloc's symbol should refer to the
+table of the class mentioned in the code. Off of that base, an offset
+describes the entry that is being used. For Rela hosts, this offset
+is stored in the reloc's addend. For Rel hosts, we are forced to put
+this offset in the reloc's section offset. */
+ BFD_RELOC_VTABLE_INHERIT,
+ BFD_RELOC_VTABLE_ENTRY,
+
+/* Intel IA64 Relocations. */
+ BFD_RELOC_IA64_IMM14,
+ BFD_RELOC_IA64_IMM22,
+ BFD_RELOC_IA64_IMM64,
+ BFD_RELOC_IA64_DIR32MSB,
+ BFD_RELOC_IA64_DIR32LSB,
+ BFD_RELOC_IA64_DIR64MSB,
+ BFD_RELOC_IA64_DIR64LSB,
+ BFD_RELOC_IA64_GPREL22,
+ BFD_RELOC_IA64_GPREL64I,
+ BFD_RELOC_IA64_GPREL32MSB,
+ BFD_RELOC_IA64_GPREL32LSB,
+ BFD_RELOC_IA64_GPREL64MSB,
+ BFD_RELOC_IA64_GPREL64LSB,
+ BFD_RELOC_IA64_LTOFF22,
+ BFD_RELOC_IA64_LTOFF64I,
+ BFD_RELOC_IA64_PLTOFF22,
+ BFD_RELOC_IA64_PLTOFF64I,
+ BFD_RELOC_IA64_PLTOFF64MSB,
+ BFD_RELOC_IA64_PLTOFF64LSB,
+ BFD_RELOC_IA64_FPTR64I,
+ BFD_RELOC_IA64_FPTR32MSB,
+ BFD_RELOC_IA64_FPTR32LSB,
+ BFD_RELOC_IA64_FPTR64MSB,
+ BFD_RELOC_IA64_FPTR64LSB,
+ BFD_RELOC_IA64_PCREL21B,
+ BFD_RELOC_IA64_PCREL21BI,
+ BFD_RELOC_IA64_PCREL21M,
+ BFD_RELOC_IA64_PCREL21F,
+ BFD_RELOC_IA64_PCREL22,
+ BFD_RELOC_IA64_PCREL60B,
+ BFD_RELOC_IA64_PCREL64I,
+ BFD_RELOC_IA64_PCREL32MSB,
+ BFD_RELOC_IA64_PCREL32LSB,
+ BFD_RELOC_IA64_PCREL64MSB,
+ BFD_RELOC_IA64_PCREL64LSB,
+ BFD_RELOC_IA64_LTOFF_FPTR22,
+ BFD_RELOC_IA64_LTOFF_FPTR64I,
+ BFD_RELOC_IA64_LTOFF_FPTR32MSB,
+ BFD_RELOC_IA64_LTOFF_FPTR32LSB,
+ BFD_RELOC_IA64_LTOFF_FPTR64MSB,
+ BFD_RELOC_IA64_LTOFF_FPTR64LSB,
+ BFD_RELOC_IA64_SEGREL32MSB,
+ BFD_RELOC_IA64_SEGREL32LSB,
+ BFD_RELOC_IA64_SEGREL64MSB,
+ BFD_RELOC_IA64_SEGREL64LSB,
+ BFD_RELOC_IA64_SECREL32MSB,
+ BFD_RELOC_IA64_SECREL32LSB,
+ BFD_RELOC_IA64_SECREL64MSB,
+ BFD_RELOC_IA64_SECREL64LSB,
+ BFD_RELOC_IA64_REL32MSB,
+ BFD_RELOC_IA64_REL32LSB,
+ BFD_RELOC_IA64_REL64MSB,
+ BFD_RELOC_IA64_REL64LSB,
+ BFD_RELOC_IA64_LTV32MSB,
+ BFD_RELOC_IA64_LTV32LSB,
+ BFD_RELOC_IA64_LTV64MSB,
+ BFD_RELOC_IA64_LTV64LSB,
+ BFD_RELOC_IA64_IPLTMSB,
+ BFD_RELOC_IA64_IPLTLSB,
+ BFD_RELOC_IA64_COPY,
+ BFD_RELOC_IA64_LTOFF22X,
+ BFD_RELOC_IA64_LDXMOV,
+ BFD_RELOC_IA64_TPREL14,
+ BFD_RELOC_IA64_TPREL22,
+ BFD_RELOC_IA64_TPREL64I,
+ BFD_RELOC_IA64_TPREL64MSB,
+ BFD_RELOC_IA64_TPREL64LSB,
+ BFD_RELOC_IA64_LTOFF_TPREL22,
+ BFD_RELOC_IA64_DTPMOD64MSB,
+ BFD_RELOC_IA64_DTPMOD64LSB,
+ BFD_RELOC_IA64_LTOFF_DTPMOD22,
+ BFD_RELOC_IA64_DTPREL14,
+ BFD_RELOC_IA64_DTPREL22,
+ BFD_RELOC_IA64_DTPREL64I,
+ BFD_RELOC_IA64_DTPREL32MSB,
+ BFD_RELOC_IA64_DTPREL32LSB,
+ BFD_RELOC_IA64_DTPREL64MSB,
+ BFD_RELOC_IA64_DTPREL64LSB,
+ BFD_RELOC_IA64_LTOFF_DTPREL22,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bit high part of an absolute address. */
+ BFD_RELOC_M68HC11_HI8,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bit low part of an absolute address. */
+ BFD_RELOC_M68HC11_LO8,
+
+/* Motorola 68HC11 reloc.
+This is the 3 bit of a value. */
+ BFD_RELOC_M68HC11_3B,
+
+/* Motorola 68HC11 reloc.
+This reloc marks the beginning of a jump/call instruction.
+It is used for linker relaxation to correctly identify beginning
+of instruction and change some branches to use PC-relative
+addressing mode. */
+ BFD_RELOC_M68HC11_RL_JUMP,
+
+/* Motorola 68HC11 reloc.
+This reloc marks a group of several instructions that gcc generates
+and for which the linker relaxation pass can modify and/or remove
+some of them. */
+ BFD_RELOC_M68HC11_RL_GROUP,
+
+/* Motorola 68HC11 reloc.
+This is the 16-bit lower part of an address. It is used for 'call'
+instruction to specify the symbol address without any special
+transformation (due to memory bank window). */
+ BFD_RELOC_M68HC11_LO16,
+
+/* Motorola 68HC11 reloc.
+This is a 8-bit reloc that specifies the page number of an address.
+It is used by 'call' instruction to specify the page number of
+the symbol. */
+ BFD_RELOC_M68HC11_PAGE,
+
+/* Motorola 68HC11 reloc.
+This is a 24-bit reloc that represents the address with a 16-bit
+value and a 8-bit page number. The symbol address is transformed
+to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
+ BFD_RELOC_M68HC11_24,
+
+/* Motorola 68HC12 reloc.
+This is the 5 bits of a value. */
+ BFD_RELOC_M68HC12_5B,
+
+/* NS CR16C Relocations. */
+ BFD_RELOC_16C_NUM08,
+ BFD_RELOC_16C_NUM08_C,
+ BFD_RELOC_16C_NUM16,
+ BFD_RELOC_16C_NUM16_C,
+ BFD_RELOC_16C_NUM32,
+ BFD_RELOC_16C_NUM32_C,
+ BFD_RELOC_16C_DISP04,
+ BFD_RELOC_16C_DISP04_C,
+ BFD_RELOC_16C_DISP08,
+ BFD_RELOC_16C_DISP08_C,
+ BFD_RELOC_16C_DISP16,
+ BFD_RELOC_16C_DISP16_C,
+ BFD_RELOC_16C_DISP24,
+ BFD_RELOC_16C_DISP24_C,
+ BFD_RELOC_16C_DISP24a,
+ BFD_RELOC_16C_DISP24a_C,
+ BFD_RELOC_16C_REG04,
+ BFD_RELOC_16C_REG04_C,
+ BFD_RELOC_16C_REG04a,
+ BFD_RELOC_16C_REG04a_C,
+ BFD_RELOC_16C_REG14,
+ BFD_RELOC_16C_REG14_C,
+ BFD_RELOC_16C_REG16,
+ BFD_RELOC_16C_REG16_C,
+ BFD_RELOC_16C_REG20,
+ BFD_RELOC_16C_REG20_C,
+ BFD_RELOC_16C_ABS20,
+ BFD_RELOC_16C_ABS20_C,
+ BFD_RELOC_16C_ABS24,
+ BFD_RELOC_16C_ABS24_C,
+ BFD_RELOC_16C_IMM04,
+ BFD_RELOC_16C_IMM04_C,
+ BFD_RELOC_16C_IMM16,
+ BFD_RELOC_16C_IMM16_C,
+ BFD_RELOC_16C_IMM20,
+ BFD_RELOC_16C_IMM20_C,
+ BFD_RELOC_16C_IMM24,
+ BFD_RELOC_16C_IMM24_C,
+ BFD_RELOC_16C_IMM32,
+ BFD_RELOC_16C_IMM32_C,
+
+/* NS CR16 Relocations. */
+ BFD_RELOC_CR16_NUM8,
+ BFD_RELOC_CR16_NUM16,
+ BFD_RELOC_CR16_NUM32,
+ BFD_RELOC_CR16_NUM32a,
+ BFD_RELOC_CR16_REGREL0,
+ BFD_RELOC_CR16_REGREL4,
+ BFD_RELOC_CR16_REGREL4a,
+ BFD_RELOC_CR16_REGREL14,
+ BFD_RELOC_CR16_REGREL14a,
+ BFD_RELOC_CR16_REGREL16,
+ BFD_RELOC_CR16_REGREL20,
+ BFD_RELOC_CR16_REGREL20a,
+ BFD_RELOC_CR16_ABS20,
+ BFD_RELOC_CR16_ABS24,
+ BFD_RELOC_CR16_IMM4,
+ BFD_RELOC_CR16_IMM8,
+ BFD_RELOC_CR16_IMM16,
+ BFD_RELOC_CR16_IMM20,
+ BFD_RELOC_CR16_IMM24,
+ BFD_RELOC_CR16_IMM32,
+ BFD_RELOC_CR16_IMM32a,
+ BFD_RELOC_CR16_DISP4,
+ BFD_RELOC_CR16_DISP8,
+ BFD_RELOC_CR16_DISP16,
+ BFD_RELOC_CR16_DISP20,
+ BFD_RELOC_CR16_DISP24,
+ BFD_RELOC_CR16_DISP24a,
+ BFD_RELOC_CR16_SWITCH8,
+ BFD_RELOC_CR16_SWITCH16,
+ BFD_RELOC_CR16_SWITCH32,
+ BFD_RELOC_CR16_GOT_REGREL20,
+ BFD_RELOC_CR16_GOTC_REGREL20,
+ BFD_RELOC_CR16_GLOB_DAT,
+
+/* NS CRX Relocations. */
+ BFD_RELOC_CRX_REL4,
+ BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP,
+ BFD_RELOC_CRX_REL16,
+ BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32,
+ BFD_RELOC_CRX_REGREL12,
+ BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28,
+ BFD_RELOC_CRX_REGREL32,
+ BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32,
+ BFD_RELOC_CRX_NUM8,
+ BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32,
+ BFD_RELOC_CRX_IMM16,
+ BFD_RELOC_CRX_IMM32,
+ BFD_RELOC_CRX_SWITCH8,
+ BFD_RELOC_CRX_SWITCH16,
+ BFD_RELOC_CRX_SWITCH32,
+
+/* These relocs are only used within the CRIS assembler. They are not
+(at present) written to any object files. */
+ BFD_RELOC_CRIS_BDISP8,
+ BFD_RELOC_CRIS_UNSIGNED_5,
+ BFD_RELOC_CRIS_SIGNED_6,
+ BFD_RELOC_CRIS_UNSIGNED_6,
+ BFD_RELOC_CRIS_SIGNED_8,
+ BFD_RELOC_CRIS_UNSIGNED_8,
+ BFD_RELOC_CRIS_SIGNED_16,
+ BFD_RELOC_CRIS_UNSIGNED_16,
+ BFD_RELOC_CRIS_LAPCQ_OFFSET,
+ BFD_RELOC_CRIS_UNSIGNED_4,
+
+/* Relocs used in ELF shared libraries for CRIS. */
+ BFD_RELOC_CRIS_COPY,
+ BFD_RELOC_CRIS_GLOB_DAT,
+ BFD_RELOC_CRIS_JUMP_SLOT,
+ BFD_RELOC_CRIS_RELATIVE,
+
+/* 32-bit offset to symbol-entry within GOT. */
+ BFD_RELOC_CRIS_32_GOT,
+
+/* 16-bit offset to symbol-entry within GOT. */
+ BFD_RELOC_CRIS_16_GOT,
+
+/* 32-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_CRIS_32_GOTPLT,
+
+/* 16-bit offset to symbol-entry within GOT, with PLT handling. */
+ BFD_RELOC_CRIS_16_GOTPLT,
+
+/* 32-bit offset to symbol, relative to GOT. */
+ BFD_RELOC_CRIS_32_GOTREL,
+
+/* 32-bit offset to symbol with PLT entry, relative to GOT. */
+ BFD_RELOC_CRIS_32_PLT_GOTREL,
+
+/* 32-bit offset to symbol with PLT entry, relative to this relocation. */
+ BFD_RELOC_CRIS_32_PLT_PCREL,
+
+/* Relocs used in TLS code for CRIS. */
+ BFD_RELOC_CRIS_32_GOT_GD,
+ BFD_RELOC_CRIS_16_GOT_GD,
+ BFD_RELOC_CRIS_32_GD,
+ BFD_RELOC_CRIS_DTP,
+ BFD_RELOC_CRIS_32_DTPREL,
+ BFD_RELOC_CRIS_16_DTPREL,
+ BFD_RELOC_CRIS_32_GOT_TPREL,
+ BFD_RELOC_CRIS_16_GOT_TPREL,
+ BFD_RELOC_CRIS_32_TPREL,
+ BFD_RELOC_CRIS_16_TPREL,
+ BFD_RELOC_CRIS_DTPMOD,
+ BFD_RELOC_CRIS_32_IE,
+
+/* Intel i860 Relocations. */
+ BFD_RELOC_860_COPY,
+ BFD_RELOC_860_GLOB_DAT,
+ BFD_RELOC_860_JUMP_SLOT,
+ BFD_RELOC_860_RELATIVE,
+ BFD_RELOC_860_PC26,
+ BFD_RELOC_860_PLT26,
+ BFD_RELOC_860_PC16,
+ BFD_RELOC_860_LOW0,
+ BFD_RELOC_860_SPLIT0,
+ BFD_RELOC_860_LOW1,
+ BFD_RELOC_860_SPLIT1,
+ BFD_RELOC_860_LOW2,
+ BFD_RELOC_860_SPLIT2,
+ BFD_RELOC_860_LOW3,
+ BFD_RELOC_860_LOGOT0,
+ BFD_RELOC_860_SPGOT0,
+ BFD_RELOC_860_LOGOT1,
+ BFD_RELOC_860_SPGOT1,
+ BFD_RELOC_860_LOGOTOFF0,
+ BFD_RELOC_860_SPGOTOFF0,
+ BFD_RELOC_860_LOGOTOFF1,
+ BFD_RELOC_860_SPGOTOFF1,
+ BFD_RELOC_860_LOGOTOFF2,
+ BFD_RELOC_860_LOGOTOFF3,
+ BFD_RELOC_860_LOPC,
+ BFD_RELOC_860_HIGHADJ,
+ BFD_RELOC_860_HAGOT,
+ BFD_RELOC_860_HAGOTOFF,
+ BFD_RELOC_860_HAPC,
+ BFD_RELOC_860_HIGH,
+ BFD_RELOC_860_HIGOT,
+ BFD_RELOC_860_HIGOTOFF,
+
+/* OpenRISC Relocations. */
+ BFD_RELOC_OPENRISC_ABS_26,
+ BFD_RELOC_OPENRISC_REL_26,
+
+/* H8 elf Relocations. */
+ BFD_RELOC_H8_DIR16A8,
+ BFD_RELOC_H8_DIR16R8,
+ BFD_RELOC_H8_DIR24A8,
+ BFD_RELOC_H8_DIR24R8,
+ BFD_RELOC_H8_DIR32A16,
+
+/* Sony Xstormy16 Relocations. */
+ BFD_RELOC_XSTORMY16_REL_12,
+ BFD_RELOC_XSTORMY16_12,
+ BFD_RELOC_XSTORMY16_24,
+ BFD_RELOC_XSTORMY16_FPTR16,
+
+/* Self-describing complex relocations. */
+ BFD_RELOC_RELC,
+
+
+/* Infineon Relocations. */
+ BFD_RELOC_XC16X_PAG,
+ BFD_RELOC_XC16X_POF,
+ BFD_RELOC_XC16X_SEG,
+ BFD_RELOC_XC16X_SOF,
+
+/* Relocations used by VAX ELF. */
+ BFD_RELOC_VAX_GLOB_DAT,
+ BFD_RELOC_VAX_JMP_SLOT,
+ BFD_RELOC_VAX_RELATIVE,
+
+/* Morpho MT - 16 bit immediate relocation. */
+ BFD_RELOC_MT_PC16,
+
+/* Morpho MT - Hi 16 bits of an address. */
+ BFD_RELOC_MT_HI16,
+
+/* Morpho MT - Low 16 bits of an address. */
+ BFD_RELOC_MT_LO16,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTINHERIT,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTENTRY,
+
+/* Morpho MT - 8 bit immediate relocation. */
+ BFD_RELOC_MT_PCINSN8,
+
+/* msp430 specific relocation codes */
+ BFD_RELOC_MSP430_10_PCREL,
+ BFD_RELOC_MSP430_16_PCREL,
+ BFD_RELOC_MSP430_16,
+ BFD_RELOC_MSP430_16_PCREL_BYTE,
+ BFD_RELOC_MSP430_16_BYTE,
+ BFD_RELOC_MSP430_2X_PCREL,
+ BFD_RELOC_MSP430_RL_PCREL,
+
+/* IQ2000 Relocations. */
+ BFD_RELOC_IQ2000_OFFSET_16,
+ BFD_RELOC_IQ2000_OFFSET_21,
+ BFD_RELOC_IQ2000_UHI16,
+
+/* Special Xtensa relocation used only by PLT entries in ELF shared
+objects to indicate that the runtime linker should set the value
+to one of its own internal functions or data structures. */
+ BFD_RELOC_XTENSA_RTLD,
+
+/* Xtensa relocations for ELF shared objects. */
+ BFD_RELOC_XTENSA_GLOB_DAT,
+ BFD_RELOC_XTENSA_JMP_SLOT,
+ BFD_RELOC_XTENSA_RELATIVE,
+
+/* Xtensa relocation used in ELF object files for symbols that may require
+PLT entries. Otherwise, this is just a generic 32-bit relocation. */
+ BFD_RELOC_XTENSA_PLT,
+
+/* Xtensa relocations to mark the difference of two local symbols.
+These are only needed to support linker relaxation and can be ignored
+when not relaxing. The field is set to the value of the difference
+assuming no relaxation. The relocation encodes the position of the
+first symbol so the linker can determine whether to adjust the field
+value. */
+ BFD_RELOC_XTENSA_DIFF8,
+ BFD_RELOC_XTENSA_DIFF16,
+ BFD_RELOC_XTENSA_DIFF32,
+
+/* Generic Xtensa relocations for instruction operands. Only the slot
+number is encoded in the relocation. The relocation applies to the
+last PC-relative immediate operand, or if there are no PC-relative
+immediates, to the last immediate operand. */
+ BFD_RELOC_XTENSA_SLOT0_OP,
+ BFD_RELOC_XTENSA_SLOT1_OP,
+ BFD_RELOC_XTENSA_SLOT2_OP,
+ BFD_RELOC_XTENSA_SLOT3_OP,
+ BFD_RELOC_XTENSA_SLOT4_OP,
+ BFD_RELOC_XTENSA_SLOT5_OP,
+ BFD_RELOC_XTENSA_SLOT6_OP,
+ BFD_RELOC_XTENSA_SLOT7_OP,
+ BFD_RELOC_XTENSA_SLOT8_OP,
+ BFD_RELOC_XTENSA_SLOT9_OP,
+ BFD_RELOC_XTENSA_SLOT10_OP,
+ BFD_RELOC_XTENSA_SLOT11_OP,
+ BFD_RELOC_XTENSA_SLOT12_OP,
+ BFD_RELOC_XTENSA_SLOT13_OP,
+ BFD_RELOC_XTENSA_SLOT14_OP,
+
+/* Alternate Xtensa relocations. Only the slot is encoded in the
+relocation. The meaning of these relocations is opcode-specific. */
+ BFD_RELOC_XTENSA_SLOT0_ALT,
+ BFD_RELOC_XTENSA_SLOT1_ALT,
+ BFD_RELOC_XTENSA_SLOT2_ALT,
+ BFD_RELOC_XTENSA_SLOT3_ALT,
+ BFD_RELOC_XTENSA_SLOT4_ALT,
+ BFD_RELOC_XTENSA_SLOT5_ALT,
+ BFD_RELOC_XTENSA_SLOT6_ALT,
+ BFD_RELOC_XTENSA_SLOT7_ALT,
+ BFD_RELOC_XTENSA_SLOT8_ALT,
+ BFD_RELOC_XTENSA_SLOT9_ALT,
+ BFD_RELOC_XTENSA_SLOT10_ALT,
+ BFD_RELOC_XTENSA_SLOT11_ALT,
+ BFD_RELOC_XTENSA_SLOT12_ALT,
+ BFD_RELOC_XTENSA_SLOT13_ALT,
+ BFD_RELOC_XTENSA_SLOT14_ALT,
+
+/* Xtensa relocations for backward compatibility. These have all been
+replaced by BFD_RELOC_XTENSA_SLOT0_OP. */
+ BFD_RELOC_XTENSA_OP0,
+ BFD_RELOC_XTENSA_OP1,
+ BFD_RELOC_XTENSA_OP2,
+
+/* Xtensa relocation to mark that the assembler expanded the
+instructions from an original target. The expansion size is
+encoded in the reloc size. */
+ BFD_RELOC_XTENSA_ASM_EXPAND,
+
+/* Xtensa relocation to mark that the linker should simplify
+assembler-expanded instructions. This is commonly used
+internally by the linker after analysis of a
+BFD_RELOC_XTENSA_ASM_EXPAND. */
+ BFD_RELOC_XTENSA_ASM_SIMPLIFY,
+
+/* Xtensa TLS relocations. */
+ BFD_RELOC_XTENSA_TLSDESC_FN,
+ BFD_RELOC_XTENSA_TLSDESC_ARG,
+ BFD_RELOC_XTENSA_TLS_DTPOFF,
+ BFD_RELOC_XTENSA_TLS_TPOFF,
+ BFD_RELOC_XTENSA_TLS_FUNC,
+ BFD_RELOC_XTENSA_TLS_ARG,
+ BFD_RELOC_XTENSA_TLS_CALL,
+
+/* 8 bit signed offset in (ix+d) or (iy+d). */
+ BFD_RELOC_Z80_DISP8,
+
+/* DJNZ offset. */
+ BFD_RELOC_Z8K_DISP7,
+
+/* CALR offset. */
+ BFD_RELOC_Z8K_CALLR,
+
+/* 4 bit value. */
+ BFD_RELOC_Z8K_IMM4L,
+
+/* Lattice Mico32 relocations. */
+ BFD_RELOC_LM32_CALL,
+ BFD_RELOC_LM32_BRANCH,
+ BFD_RELOC_LM32_16_GOT,
+ BFD_RELOC_LM32_GOTOFF_HI16,
+ BFD_RELOC_LM32_GOTOFF_LO16,
+ BFD_RELOC_LM32_COPY,
+ BFD_RELOC_LM32_GLOB_DAT,
+ BFD_RELOC_LM32_JMP_SLOT,
+ BFD_RELOC_LM32_RELATIVE,
+
+/* Difference between two section addreses. Must be followed by a
+BFD_RELOC_MACH_O_PAIR. */
+ BFD_RELOC_MACH_O_SECTDIFF,
+
+/* Mach-O generic relocations. */
+ BFD_RELOC_MACH_O_PAIR,
+
+/* This is a 32 bit reloc for the microblaze that stores the
+low 16 bits of a value */
+ BFD_RELOC_MICROBLAZE_32_LO,
+
+/* This is a 32 bit pc-relative reloc for the microblaze that
+stores the low 16 bits of a value */
+ BFD_RELOC_MICROBLAZE_32_LO_PCREL,
+
+/* This is a 32 bit reloc for the microblaze that stores a
+value relative to the read-only small data area anchor */
+ BFD_RELOC_MICROBLAZE_32_ROSDA,
+
+/* This is a 32 bit reloc for the microblaze that stores a
+value relative to the read-write small data area anchor */
+ BFD_RELOC_MICROBLAZE_32_RWSDA,
+
+/* This is a 32 bit reloc for the microblaze to handle
+expressions of the form "Symbol Op Symbol" */
+ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). No relocation is
+done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64_NONE,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+PC-relative GOT offset */
+ BFD_RELOC_MICROBLAZE_64_GOTPC,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+GOT offset */
+ BFD_RELOC_MICROBLAZE_64_GOT,
+
+/* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imm instruction). The relocation is
+PC-relative offset into PLT */
+ BFD_RELOC_MICROBLAZE_64_PLT,
+
+/* This is a 64 bit reloc that stores the 32 bit GOT relative
+value in two words (with an imm instruction). The relocation is
+relative offset from _GLOBAL_OFFSET_TABLE_ */
+ BFD_RELOC_MICROBLAZE_64_GOTOFF,
+
+/* This is a 32 bit reloc that stores the 32 bit GOT relative
+value in a word. The relocation is relative offset from */
+ BFD_RELOC_MICROBLAZE_32_GOTOFF,
+
+/* This is used to tell the dynamic linker to copy the value out of
+the dynamic object into the runtime process image. */
+ BFD_RELOC_MICROBLAZE_COPY,
+ BFD_RELOC_UNUSED };
+typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
+reloc_howto_type *bfd_reloc_type_lookup
+ (bfd *abfd, bfd_reloc_code_real_type code);
+reloc_howto_type *bfd_reloc_name_lookup
+ (bfd *abfd, const char *reloc_name);
+
+const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
+
+/* Extracted from syms.c. */
+
+typedef struct bfd_symbol
+{
+ /* A pointer to the BFD which owns the symbol. This information
+ is necessary so that a back end can work out what additional
+ information (invisible to the application writer) is carried
+ with the symbol.
+
+ This field is *almost* redundant, since you can use section->owner
+ instead, except that some symbols point to the global sections
+ bfd_{abs,com,und}_section. This could be fixed by making
+ these globals be per-bfd (or per-target-flavor). FIXME. */
+ struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */
+
+ /* The text of the symbol. The name is left alone, and not copied; the
+ application may not alter it. */
+ const char *name;
+
+ /* The value of the symbol. This really should be a union of a
+ numeric value with a pointer, since some flags indicate that
+ a pointer to another symbol is stored here. */
+ symvalue value;
+
+ /* Attributes of a symbol. */
+#define BSF_NO_FLAGS 0x00
+
+ /* The symbol has local scope; <<static>> in <<C>>. The value
+ is the offset into the section of the data. */
+#define BSF_LOCAL (1 << 0)
+
+ /* The symbol has global scope; initialized data in <<C>>. The
+ value is the offset into the section of the data. */
+#define BSF_GLOBAL (1 << 1)
+
+ /* The symbol has global scope and is exported. The value is
+ the offset into the section of the data. */
+#define BSF_EXPORT BSF_GLOBAL /* No real difference. */
+
+ /* A normal C symbol would be one of:
+ <<BSF_LOCAL>>, <<BSF_COMMON>>, <<BSF_UNDEFINED>> or
+ <<BSF_GLOBAL>>. */
+
+ /* The symbol is a debugging record. The value has an arbitrary
+ meaning, unless BSF_DEBUGGING_RELOC is also set. */
+#define BSF_DEBUGGING (1 << 2)
+
+ /* The symbol denotes a function entry point. Used in ELF,
+ perhaps others someday. */
+#define BSF_FUNCTION (1 << 3)
+
+ /* Used by the linker. */
+#define BSF_KEEP (1 << 5)
+#define BSF_KEEP_G (1 << 6)
+
+ /* A weak global symbol, overridable without warnings by
+ a regular global symbol of the same name. */
+#define BSF_WEAK (1 << 7)
+
+ /* This symbol was created to point to a section, e.g. ELF's
+ STT_SECTION symbols. */
+#define BSF_SECTION_SYM (1 << 8)
+
+ /* The symbol used to be a common symbol, but now it is
+ allocated. */
+#define BSF_OLD_COMMON (1 << 9)
+
+ /* In some files the type of a symbol sometimes alters its
+ location in an output file - ie in coff a <<ISFCN>> symbol
+ which is also <<C_EXT>> symbol appears where it was
+ declared and not at the end of a section. This bit is set
+ by the target BFD part to convey this information. */
+#define BSF_NOT_AT_END (1 << 10)
+
+ /* Signal that the symbol is the label of constructor section. */
+#define BSF_CONSTRUCTOR (1 << 11)
+
+ /* Signal that the symbol is a warning symbol. The name is a
+ warning. The name of the next symbol is the one to warn about;
+ if a reference is made to a symbol with the same name as the next
+ symbol, a warning is issued by the linker. */
+#define BSF_WARNING (1 << 12)
+
+ /* Signal that the symbol is indirect. This symbol is an indirect
+ pointer to the symbol with the same name as the next symbol. */
+#define BSF_INDIRECT (1 << 13)
+
+ /* BSF_FILE marks symbols that contain a file name. This is used
+ for ELF STT_FILE symbols. */
+#define BSF_FILE (1 << 14)
+
+ /* Symbol is from dynamic linking information. */
+#define BSF_DYNAMIC (1 << 15)
+
+ /* The symbol denotes a data object. Used in ELF, and perhaps
+ others someday. */
+#define BSF_OBJECT (1 << 16)
+
+ /* This symbol is a debugging symbol. The value is the offset
+ into the section of the data. BSF_DEBUGGING should be set
+ as well. */
+#define BSF_DEBUGGING_RELOC (1 << 17)
+
+ /* This symbol is thread local. Used in ELF. */
+#define BSF_THREAD_LOCAL (1 << 18)
+
+ /* This symbol represents a complex relocation expression,
+ with the expression tree serialized in the symbol name. */
+#define BSF_RELC (1 << 19)
+
+ /* This symbol represents a signed complex relocation expression,
+ with the expression tree serialized in the symbol name. */
+#define BSF_SRELC (1 << 20)
+
+ /* This symbol was created by bfd_get_synthetic_symtab. */
+#define BSF_SYNTHETIC (1 << 21)
+
+ /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT.
+ The dynamic linker will compute the value of this symbol by
+ calling the function that it points to. BSF_FUNCTION must
+ also be also set. */
+#define BSF_GNU_INDIRECT_FUNCTION (1 << 22)
+ /* This symbol is a globally unique data object. The dynamic linker
+ will make sure that in the entire process there is just one symbol
+ with this name and type in use. BSF_OBJECT must also be set. */
+#define BSF_GNU_UNIQUE (1 << 23)
+
+ flagword flags;
+
+ /* A pointer to the section to which this symbol is
+ relative. This will always be non NULL, there are special
+ sections for undefined and absolute symbols. */
+ struct bfd_section *section;
+
+ /* Back end special data. */
+ union
+ {
+ void *p;
+ bfd_vma i;
+ }
+ udata;
+}
+asymbol;
+
+#define bfd_get_symtab_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
+
+bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
+
+bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
+
+#define bfd_is_local_label_name(abfd, name) \
+ BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
+
+bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym);
+
+#define bfd_is_target_special_symbol(abfd, sym) \
+ BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym))
+
+#define bfd_canonicalize_symtab(abfd, location) \
+ BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
+
+bfd_boolean bfd_set_symtab
+ (bfd *abfd, asymbol **location, unsigned int count);
+
+void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
+
+#define bfd_make_empty_symbol(abfd) \
+ BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
+
+asymbol *_bfd_generic_make_empty_symbol (bfd *);
+
+#define bfd_make_debug_symbol(abfd,ptr,size) \
+ BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
+
+int bfd_decode_symclass (asymbol *symbol);
+
+bfd_boolean bfd_is_undefined_symclass (int symclass);
+
+void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
+
+bfd_boolean bfd_copy_private_symbol_data
+ (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
+
+#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
+ BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
+ (ibfd, isymbol, obfd, osymbol))
+
+/* Extracted from bfd.c. */
+enum bfd_direction
+ {
+ no_direction = 0,
+ read_direction = 1,
+ write_direction = 2,
+ both_direction = 3
+ };
+
+struct bfd
+{
+ /* A unique identifier of the BFD */
+ unsigned int id;
+
+ /* The filename the application opened the BFD with. */
+ const char *filename;
+
+ /* A pointer to the target jump table. */
+ const struct bfd_target *xvec;
+
+ /* The IOSTREAM, and corresponding IO vector that provide access
+ to the file backing the BFD. */
+ void *iostream;
+ const struct bfd_iovec *iovec;
+
+ /* The caching routines use these to maintain a
+ least-recently-used list of BFDs. */
+ struct bfd *lru_prev, *lru_next;
+
+ /* When a file is closed by the caching routines, BFD retains
+ state information on the file here... */
+ ufile_ptr where;
+
+ /* File modified time, if mtime_set is TRUE. */
+ long mtime;
+
+ /* Reserved for an unimplemented file locking extension. */
+ int ifd;
+
+ /* The format which belongs to the BFD. (object, core, etc.) */
+ bfd_format format;
+
+ /* The direction with which the BFD was opened. */
+ enum bfd_direction direction;
+
+ /* Format_specific flags. */
+ flagword flags;
+
+ /* Values that may appear in the flags field of a BFD. These also
+ appear in the object_flags field of the bfd_target structure, where
+ they indicate the set of flags used by that backend (not all flags
+ are meaningful for all object file formats) (FIXME: at the moment,
+ the object_flags values have mostly just been copied from backend
+ to another, and are not necessarily correct). */
+
+#define BFD_NO_FLAGS 0x00
+
+ /* BFD contains relocation entries. */
+#define HAS_RELOC 0x01
+
+ /* BFD is directly executable. */
+#define EXEC_P 0x02
+
+ /* BFD has line number information (basically used for F_LNNO in a
+ COFF header). */
+#define HAS_LINENO 0x04
+
+ /* BFD has debugging information. */
+#define HAS_DEBUG 0x08
+
+ /* BFD has symbols. */
+#define HAS_SYMS 0x10
+
+ /* BFD has local symbols (basically used for F_LSYMS in a COFF
+ header). */
+#define HAS_LOCALS 0x20
+
+ /* BFD is a dynamic object. */
+#define DYNAMIC 0x40
+
+ /* Text section is write protected (if D_PAGED is not set, this is
+ like an a.out NMAGIC file) (the linker sets this by default, but
+ clears it for -r or -N). */
+#define WP_TEXT 0x80
+
+ /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the
+ linker sets this by default, but clears it for -r or -n or -N). */
+#define D_PAGED 0x100
+
+ /* BFD is relaxable (this means that bfd_relax_section may be able to
+ do something) (sometimes bfd_relax_section can do something even if
+ this is not set). */
+#define BFD_IS_RELAXABLE 0x200
+
+ /* This may be set before writing out a BFD to request using a
+ traditional format. For example, this is used to request that when
+ writing out an a.out object the symbols not be hashed to eliminate
+ duplicates. */
+#define BFD_TRADITIONAL_FORMAT 0x400
+
+ /* This flag indicates that the BFD contents are actually cached
+ in memory. If this is set, iostream points to a bfd_in_memory
+ struct. */
+#define BFD_IN_MEMORY 0x800
+
+ /* The sections in this BFD specify a memory page. */
+#define HAS_LOAD_PAGE 0x1000
+
+ /* This BFD has been created by the linker and doesn't correspond
+ to any input file. */
+#define BFD_LINKER_CREATED 0x2000
+
+ /* This may be set before writing out a BFD to request that it
+ be written using values for UIDs, GIDs, timestamps, etc. that
+ will be consistent from run to run. */
+#define BFD_DETERMINISTIC_OUTPUT 0x4000
+
+ /* Currently my_archive is tested before adding origin to
+ anything. I believe that this can become always an add of
+ origin, with origin set to 0 for non archive files. */
+ ufile_ptr origin;
+
+ /* The origin in the archive of the proxy entry. This will
+ normally be the same as origin, except for thin archives,
+ when it will contain the current offset of the proxy in the
+ thin archive rather than the offset of the bfd in its actual
+ container. */
+ ufile_ptr proxy_origin;
+
+ /* A hash table for section names. */
+ struct bfd_hash_table section_htab;
+
+ /* Pointer to linked list of sections. */
+ struct bfd_section *sections;
+
+ /* The last section on the section list. */
+ struct bfd_section *section_last;
+
+ /* The number of sections. */
+ unsigned int section_count;
+
+ /* Stuff only useful for object files:
+ The start address. */
+ bfd_vma start_address;
+
+ /* Used for input and output. */
+ unsigned int symcount;
+
+ /* Symbol table for output BFD (with symcount entries).
+ Also used by the linker to cache input BFD symbols. */
+ struct bfd_symbol **outsymbols;
+
+ /* Used for slurped dynamic symbol tables. */
+ unsigned int dynsymcount;
+
+ /* Pointer to structure which contains architecture information. */
+ const struct bfd_arch_info *arch_info;
+
+ /* Stuff only useful for archives. */
+ void *arelt_data;
+ struct bfd *my_archive; /* The containing archive BFD. */
+ struct bfd *archive_next; /* The next BFD in the archive. */
+ struct bfd *archive_head; /* The first BFD in the archive. */
+ struct bfd *nested_archives; /* List of nested archive in a flattened
+ thin archive. */
+
+ /* A chain of BFD structures involved in a link. */
+ struct bfd *link_next;
+
+ /* A field used by _bfd_generic_link_add_archive_symbols. This will
+ be used only for archive elements. */
+ int archive_pass;
+
+ /* Used by the back end to hold private data. */
+ union
+ {
+ struct aout_data_struct *aout_data;
+ struct artdata *aout_ar_data;
+ struct _oasys_data *oasys_obj_data;
+ struct _oasys_ar_data *oasys_ar_data;
+ struct coff_tdata *coff_obj_data;
+ struct pe_tdata *pe_obj_data;
+ struct xcoff_tdata *xcoff_obj_data;
+ struct ecoff_tdata *ecoff_obj_data;
+ struct ieee_data_struct *ieee_data;
+ struct ieee_ar_data_struct *ieee_ar_data;
+ struct srec_data_struct *srec_data;
+ struct verilog_data_struct *verilog_data;
+ struct ihex_data_struct *ihex_data;
+ struct tekhex_data_struct *tekhex_data;
+ struct elf_obj_tdata *elf_obj_data;
+ struct nlm_obj_tdata *nlm_obj_data;
+ struct bout_data_struct *bout_data;
+ struct mmo_data_struct *mmo_data;
+ struct sun_core_struct *sun_core_data;
+ struct sco5_core_struct *sco5_core_data;
+ struct trad_core_struct *trad_core_data;
+ struct som_data_struct *som_data;
+ struct hpux_core_struct *hpux_core_data;
+ struct hppabsd_core_struct *hppabsd_core_data;
+ struct sgi_core_struct *sgi_core_data;
+ struct lynx_core_struct *lynx_core_data;
+ struct osf_core_struct *osf_core_data;
+ struct cisco_core_struct *cisco_core_data;
+ struct versados_data_struct *versados_data;
+ struct netbsd_core_struct *netbsd_core_data;
+ struct mach_o_data_struct *mach_o_data;
+ struct mach_o_fat_data_struct *mach_o_fat_data;
+ struct plugin_data_struct *plugin_data;
+ struct bfd_pef_data_struct *pef_data;
+ struct bfd_pef_xlib_data_struct *pef_xlib_data;
+ struct bfd_sym_data_struct *sym_data;
+ void *any;
+ }
+ tdata;
+
+ /* Used by the application to hold private data. */
+ void *usrdata;
+
+ /* Where all the allocated stuff under this BFD goes. This is a
+ struct objalloc *, but we use void * to avoid requiring the inclusion
+ of objalloc.h. */
+ void *memory;
+
+ /* Is the file descriptor being cached? That is, can it be closed as
+ needed, and re-opened when accessed later? */
+ unsigned int cacheable : 1;
+
+ /* Marks whether there was a default target specified when the
+ BFD was opened. This is used to select which matching algorithm
+ to use to choose the back end. */
+ unsigned int target_defaulted : 1;
+
+ /* ... and here: (``once'' means at least once). */
+ unsigned int opened_once : 1;
+
+ /* Set if we have a locally maintained mtime value, rather than
+ getting it from the file each time. */
+ unsigned int mtime_set : 1;
+
+ /* Flag set if symbols from this BFD should not be exported. */
+ unsigned int no_export : 1;
+
+ /* Remember when output has begun, to stop strange things
+ from happening. */
+ unsigned int output_has_begun : 1;
+
+ /* Have archive map. */
+ unsigned int has_armap : 1;
+
+ /* Set if this is a thin archive. */
+ unsigned int is_thin_archive : 1;
+};
+
+typedef enum bfd_error
+{
+ bfd_error_no_error = 0,
+ bfd_error_system_call,
+ bfd_error_invalid_target,
+ bfd_error_wrong_format,
+ bfd_error_wrong_object_format,
+ bfd_error_invalid_operation,
+ bfd_error_no_memory,
+ bfd_error_no_symbols,
+ bfd_error_no_armap,
+ bfd_error_no_more_archived_files,
+ bfd_error_malformed_archive,
+ bfd_error_file_not_recognized,
+ bfd_error_file_ambiguously_recognized,
+ bfd_error_no_contents,
+ bfd_error_nonrepresentable_section,
+ bfd_error_no_debug_section,
+ bfd_error_bad_value,
+ bfd_error_file_truncated,
+ bfd_error_file_too_big,
+ bfd_error_on_input,
+ bfd_error_invalid_error_code
+}
+bfd_error_type;
+
+bfd_error_type bfd_get_error (void);
+
+void bfd_set_error (bfd_error_type error_tag, ...);
+
+const char *bfd_errmsg (bfd_error_type error_tag);
+
+void bfd_perror (const char *message);
+
+typedef void (*bfd_error_handler_type) (const char *, ...);
+
+bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
+
+void bfd_set_error_program_name (const char *);
+
+bfd_error_handler_type bfd_get_error_handler (void);
+
+long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
+
+long bfd_canonicalize_reloc
+ (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
+
+void bfd_set_reloc
+ (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
+
+bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
+
+int bfd_get_arch_size (bfd *abfd);
+
+int bfd_get_sign_extend_vma (bfd *abfd);
+
+bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
+
+unsigned int bfd_get_gp_size (bfd *abfd);
+
+void bfd_set_gp_size (bfd *abfd, unsigned int i);
+
+bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
+
+bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_copy_private_header_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_copy_private_header_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_copy_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
+
+#define bfd_merge_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
+ (ibfd, obfd))
+bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
+
+#define bfd_set_private_flags(abfd, flags) \
+ BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
+#define bfd_sizeof_headers(abfd, info) \
+ BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info))
+
+#define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \
+ BFD_SEND (abfd, _bfd_find_nearest_line, \
+ (abfd, sec, syms, off, file, func, line))
+
+#define bfd_find_line(abfd, syms, sym, file, line) \
+ BFD_SEND (abfd, _bfd_find_line, \
+ (abfd, syms, sym, file, line))
+
+#define bfd_find_inliner_info(abfd, file, func, line) \
+ BFD_SEND (abfd, _bfd_find_inliner_info, \
+ (abfd, file, func, line))
+
+#define bfd_debug_info_start(abfd) \
+ BFD_SEND (abfd, _bfd_debug_info_start, (abfd))
+
+#define bfd_debug_info_end(abfd) \
+ BFD_SEND (abfd, _bfd_debug_info_end, (abfd))
+
+#define bfd_debug_info_accumulate(abfd, section) \
+ BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
+
+#define bfd_stat_arch_elt(abfd, stat) \
+ BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
+
+#define bfd_update_armap_timestamp(abfd) \
+ BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd))
+
+#define bfd_set_arch_mach(abfd, arch, mach)\
+ BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach))
+
+#define bfd_relax_section(abfd, section, link_info, again) \
+ BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again))
+
+#define bfd_gc_sections(abfd, link_info) \
+ BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
+
+#define bfd_merge_sections(abfd, link_info) \
+ BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
+
+#define bfd_is_group_section(abfd, sec) \
+ BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec))
+
+#define bfd_discard_group(abfd, sec) \
+ BFD_SEND (abfd, _bfd_discard_group, (abfd, sec))
+
+#define bfd_link_hash_table_create(abfd) \
+ BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd))
+
+#define bfd_link_hash_table_free(abfd, hash) \
+ BFD_SEND (abfd, _bfd_link_hash_table_free, (hash))
+
+#define bfd_link_add_symbols(abfd, info) \
+ BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info))
+
+#define bfd_link_just_syms(abfd, sec, info) \
+ BFD_SEND (abfd, _bfd_link_just_syms, (sec, info))
+
+#define bfd_final_link(abfd, info) \
+ BFD_SEND (abfd, _bfd_final_link, (abfd, info))
+
+#define bfd_free_cached_info(abfd) \
+ BFD_SEND (abfd, _bfd_free_cached_info, (abfd))
+
+#define bfd_get_dynamic_symtab_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd))
+
+#define bfd_print_private_bfd_data(abfd, file)\
+ BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file))
+
+#define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \
+ BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols))
+
+#define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \
+ BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \
+ dyncount, dynsyms, ret))
+
+#define bfd_get_dynamic_reloc_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd))
+
+#define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \
+ BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms))
+
+extern bfd_byte *bfd_get_relocated_section_contents
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
+ bfd_boolean, asymbol **);
+
+bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
+
+struct bfd_preserve
+{
+ void *marker;
+ void *tdata;
+ flagword flags;
+ const struct bfd_arch_info *arch_info;
+ struct bfd_section *sections;
+ struct bfd_section *section_last;
+ unsigned int section_count;
+ struct bfd_hash_table section_htab;
+};
+
+bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *);
+
+void bfd_preserve_restore (bfd *, struct bfd_preserve *);
+
+void bfd_preserve_finish (bfd *, struct bfd_preserve *);
+
+bfd_vma bfd_emul_get_maxpagesize (const char *);
+
+void bfd_emul_set_maxpagesize (const char *, bfd_vma);
+
+bfd_vma bfd_emul_get_commonpagesize (const char *);
+
+void bfd_emul_set_commonpagesize (const char *, bfd_vma);
+
+char *bfd_demangle (bfd *, const char *, int);
+
+/* Extracted from archive.c. */
+symindex bfd_get_next_mapent
+ (bfd *abfd, symindex previous, carsym **sym);
+
+bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
+
+bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
+
+/* Extracted from corefile.c. */
+const char *bfd_core_file_failing_command (bfd *abfd);
+
+int bfd_core_file_failing_signal (bfd *abfd);
+
+bfd_boolean core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
+bfd_boolean generic_core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
+/* Extracted from targets.c. */
+#define BFD_SEND(bfd, message, arglist) \
+ ((*((bfd)->xvec->message)) arglist)
+
+#ifdef DEBUG_BFD_SEND
+#undef BFD_SEND
+#define BFD_SEND(bfd, message, arglist) \
+ (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+ ((*((bfd)->xvec->message)) arglist) : \
+ (bfd_assert (__FILE__,__LINE__), NULL))
+#endif
+#define BFD_SEND_FMT(bfd, message, arglist) \
+ (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist)
+
+#ifdef DEBUG_BFD_SEND
+#undef BFD_SEND_FMT
+#define BFD_SEND_FMT(bfd, message, arglist) \
+ (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+ (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \
+ (bfd_assert (__FILE__,__LINE__), NULL))
+#endif
+
+enum bfd_flavour
+{
+ bfd_target_unknown_flavour,
+ bfd_target_aout_flavour,
+ bfd_target_coff_flavour,
+ bfd_target_ecoff_flavour,
+ bfd_target_xcoff_flavour,
+ bfd_target_elf_flavour,
+ bfd_target_ieee_flavour,
+ bfd_target_nlm_flavour,
+ bfd_target_oasys_flavour,
+ bfd_target_tekhex_flavour,
+ bfd_target_srec_flavour,
+ bfd_target_verilog_flavour,
+ bfd_target_ihex_flavour,
+ bfd_target_som_flavour,
+ bfd_target_os9k_flavour,
+ bfd_target_versados_flavour,
+ bfd_target_msdos_flavour,
+ bfd_target_ovax_flavour,
+ bfd_target_evax_flavour,
+ bfd_target_mmo_flavour,
+ bfd_target_mach_o_flavour,
+ bfd_target_pef_flavour,
+ bfd_target_pef_xlib_flavour,
+ bfd_target_sym_flavour
+};
+
+enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
+
+/* Forward declaration. */
+typedef struct bfd_link_info _bfd_link_info;
+
+typedef struct bfd_target
+{
+ /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */
+ char *name;
+
+ /* The "flavour" of a back end is a general indication about
+ the contents of a file. */
+ enum bfd_flavour flavour;
+
+ /* The order of bytes within the data area of a file. */
+ enum bfd_endian byteorder;
+
+ /* The order of bytes within the header parts of a file. */
+ enum bfd_endian header_byteorder;
+
+ /* A mask of all the flags which an executable may have set -
+ from the set <<BFD_NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>. */
+ flagword object_flags;
+
+ /* A mask of all the flags which a section may have set - from
+ the set <<SEC_NO_FLAGS>>, <<SEC_ALLOC>>, ...<<SET_NEVER_LOAD>>. */
+ flagword section_flags;
+
+ /* The character normally found at the front of a symbol.
+ (if any), perhaps `_'. */
+ char symbol_leading_char;
+
+ /* The pad character for file names within an archive header. */
+ char ar_pad_char;
+
+ /* The maximum number of characters in an archive header. */
+ unsigned short ar_max_namelen;
+
+ /* Entries for byte swapping for data. These are different from the
+ other entry points, since they don't take a BFD as the first argument.
+ Certain other handlers could do the same. */
+ bfd_uint64_t (*bfd_getx64) (const void *);
+ bfd_int64_t (*bfd_getx_signed_64) (const void *);
+ void (*bfd_putx64) (bfd_uint64_t, void *);
+ bfd_vma (*bfd_getx32) (const void *);
+ bfd_signed_vma (*bfd_getx_signed_32) (const void *);
+ void (*bfd_putx32) (bfd_vma, void *);
+ bfd_vma (*bfd_getx16) (const void *);
+ bfd_signed_vma (*bfd_getx_signed_16) (const void *);
+ void (*bfd_putx16) (bfd_vma, void *);
+
+ /* Byte swapping for the headers. */
+ bfd_uint64_t (*bfd_h_getx64) (const void *);
+ bfd_int64_t (*bfd_h_getx_signed_64) (const void *);
+ void (*bfd_h_putx64) (bfd_uint64_t, void *);
+ bfd_vma (*bfd_h_getx32) (const void *);
+ bfd_signed_vma (*bfd_h_getx_signed_32) (const void *);
+ void (*bfd_h_putx32) (bfd_vma, void *);
+ bfd_vma (*bfd_h_getx16) (const void *);
+ bfd_signed_vma (*bfd_h_getx_signed_16) (const void *);
+ void (*bfd_h_putx16) (bfd_vma, void *);
+
+ /* Format dependent routines: these are vectors of entry points
+ within the target vector structure, one for each format to check. */
+
+ /* Check the format of a file being read. Return a <<bfd_target *>> or zero. */
+ const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *);
+
+ /* Set the format of a file being written. */
+ bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *);
+
+ /* Write cached information into a file being written, at <<bfd_close>>. */
+ bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *);
+
+
+ /* Generic entry points. */
+#define BFD_JUMP_TABLE_GENERIC(NAME) \
+ NAME##_close_and_cleanup, \
+ NAME##_bfd_free_cached_info, \
+ NAME##_new_section_hook, \
+ NAME##_get_section_contents, \
+ NAME##_get_section_contents_in_window
+
+ /* Called when the BFD is being closed to do any necessary cleanup. */
+ bfd_boolean (*_close_and_cleanup) (bfd *);
+ /* Ask the BFD to free all cached information. */
+ bfd_boolean (*_bfd_free_cached_info) (bfd *);
+ /* Called when a new section is created. */
+ bfd_boolean (*_new_section_hook) (bfd *, sec_ptr);
+ /* Read the contents of a section. */
+ bfd_boolean (*_bfd_get_section_contents)
+ (bfd *, sec_ptr, void *, file_ptr, bfd_size_type);
+ bfd_boolean (*_bfd_get_section_contents_in_window)
+ (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type);
+
+ /* Entry points to copy private data. */
+#define BFD_JUMP_TABLE_COPY(NAME) \
+ NAME##_bfd_copy_private_bfd_data, \
+ NAME##_bfd_merge_private_bfd_data, \
+ _bfd_generic_init_private_section_data, \
+ NAME##_bfd_copy_private_section_data, \
+ NAME##_bfd_copy_private_symbol_data, \
+ NAME##_bfd_copy_private_header_data, \
+ NAME##_bfd_set_private_flags, \
+ NAME##_bfd_print_private_bfd_data
+
+ /* Called to copy BFD general private data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *);
+ /* Called to merge BFD general private data from one object file
+ to a common output file when linking. */
+ bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
+ /* Called to initialize BFD private section data from one object file
+ to another. */
+#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
+ BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
+ bfd_boolean (*_bfd_init_private_section_data)
+ (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
+ /* Called to copy BFD private section data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_section_data)
+ (bfd *, sec_ptr, bfd *, sec_ptr);
+ /* Called to copy BFD private symbol data from one symbol
+ to another. */
+ bfd_boolean (*_bfd_copy_private_symbol_data)
+ (bfd *, asymbol *, bfd *, asymbol *);
+ /* Called to copy BFD private header data from one object file
+ to another. */
+ bfd_boolean (*_bfd_copy_private_header_data)
+ (bfd *, bfd *);
+ /* Called to set private backend flags. */
+ bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword);
+
+ /* Called to print private BFD data. */
+ bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *);
+
+ /* Core file entry points. */
+#define BFD_JUMP_TABLE_CORE(NAME) \
+ NAME##_core_file_failing_command, \
+ NAME##_core_file_failing_signal, \
+ NAME##_core_file_matches_executable_p
+
+ char * (*_core_file_failing_command) (bfd *);
+ int (*_core_file_failing_signal) (bfd *);
+ bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *);
+
+ /* Archive entry points. */
+#define BFD_JUMP_TABLE_ARCHIVE(NAME) \
+ NAME##_slurp_armap, \
+ NAME##_slurp_extended_name_table, \
+ NAME##_construct_extended_name_table, \
+ NAME##_truncate_arname, \
+ NAME##_write_armap, \
+ NAME##_read_ar_hdr, \
+ NAME##_openr_next_archived_file, \
+ NAME##_get_elt_at_index, \
+ NAME##_generic_stat_arch_elt, \
+ NAME##_update_armap_timestamp
+
+ bfd_boolean (*_bfd_slurp_armap) (bfd *);
+ bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *);
+ bfd_boolean (*_bfd_construct_extended_name_table)
+ (bfd *, char **, bfd_size_type *, const char **);
+ void (*_bfd_truncate_arname) (bfd *, const char *, char *);
+ bfd_boolean (*write_armap)
+ (bfd *, unsigned int, struct orl *, unsigned int, int);
+ void * (*_bfd_read_ar_hdr_fn) (bfd *);
+ bfd * (*openr_next_archived_file) (bfd *, bfd *);
+#define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i))
+ bfd * (*_bfd_get_elt_at_index) (bfd *, symindex);
+ int (*_bfd_stat_arch_elt) (bfd *, struct stat *);
+ bfd_boolean (*_bfd_update_armap_timestamp) (bfd *);
+
+ /* Entry points used for symbols. */
+#define BFD_JUMP_TABLE_SYMBOLS(NAME) \
+ NAME##_get_symtab_upper_bound, \
+ NAME##_canonicalize_symtab, \
+ NAME##_make_empty_symbol, \
+ NAME##_print_symbol, \
+ NAME##_get_symbol_info, \
+ NAME##_bfd_is_local_label_name, \
+ NAME##_bfd_is_target_special_symbol, \
+ NAME##_get_lineno, \
+ NAME##_find_nearest_line, \
+ _bfd_generic_find_line, \
+ NAME##_find_inliner_info, \
+ NAME##_bfd_make_debug_symbol, \
+ NAME##_read_minisymbols, \
+ NAME##_minisymbol_to_symbol
+
+ long (*_bfd_get_symtab_upper_bound) (bfd *);
+ long (*_bfd_canonicalize_symtab)
+ (bfd *, struct bfd_symbol **);
+ struct bfd_symbol *
+ (*_bfd_make_empty_symbol) (bfd *);
+ void (*_bfd_print_symbol)
+ (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type);
+#define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e))
+ void (*_bfd_get_symbol_info)
+ (bfd *, struct bfd_symbol *, symbol_info *);
+#define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e))
+ bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *);
+ bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *);
+ alent * (*_get_lineno) (bfd *, struct bfd_symbol *);
+ bfd_boolean (*_bfd_find_nearest_line)
+ (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
+ const char **, const char **, unsigned int *);
+ bfd_boolean (*_bfd_find_line)
+ (bfd *, struct bfd_symbol **, struct bfd_symbol *,
+ const char **, unsigned int *);
+ bfd_boolean (*_bfd_find_inliner_info)
+ (bfd *, const char **, const char **, unsigned int *);
+ /* Back-door to allow format-aware applications to create debug symbols
+ while using BFD for everything else. Currently used by the assembler
+ when creating COFF files. */
+ asymbol * (*_bfd_make_debug_symbol)
+ (bfd *, void *, unsigned long size);
+#define bfd_read_minisymbols(b, d, m, s) \
+ BFD_SEND (b, _read_minisymbols, (b, d, m, s))
+ long (*_read_minisymbols)
+ (bfd *, bfd_boolean, void **, unsigned int *);
+#define bfd_minisymbol_to_symbol(b, d, m, f) \
+ BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f))
+ asymbol * (*_minisymbol_to_symbol)
+ (bfd *, bfd_boolean, const void *, asymbol *);
+
+ /* Routines for relocs. */
+#define BFD_JUMP_TABLE_RELOCS(NAME) \
+ NAME##_get_reloc_upper_bound, \
+ NAME##_canonicalize_reloc, \
+ NAME##_bfd_reloc_type_lookup, \
+ NAME##_bfd_reloc_name_lookup
+
+ long (*_get_reloc_upper_bound) (bfd *, sec_ptr);
+ long (*_bfd_canonicalize_reloc)
+ (bfd *, sec_ptr, arelent **, struct bfd_symbol **);
+ /* See documentation on reloc types. */
+ reloc_howto_type *
+ (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
+ reloc_howto_type *
+ (*reloc_name_lookup) (bfd *, const char *);
+
+
+ /* Routines used when writing an object file. */
+#define BFD_JUMP_TABLE_WRITE(NAME) \
+ NAME##_set_arch_mach, \
+ NAME##_set_section_contents
+
+ bfd_boolean (*_bfd_set_arch_mach)
+ (bfd *, enum bfd_architecture, unsigned long);
+ bfd_boolean (*_bfd_set_section_contents)
+ (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type);
+
+ /* Routines used by the linker. */
+#define BFD_JUMP_TABLE_LINK(NAME) \
+ NAME##_sizeof_headers, \
+ NAME##_bfd_get_relocated_section_contents, \
+ NAME##_bfd_relax_section, \
+ NAME##_bfd_link_hash_table_create, \
+ NAME##_bfd_link_hash_table_free, \
+ NAME##_bfd_link_add_symbols, \
+ NAME##_bfd_link_just_syms, \
+ NAME##_bfd_final_link, \
+ NAME##_bfd_link_split_section, \
+ NAME##_bfd_gc_sections, \
+ NAME##_bfd_merge_sections, \
+ NAME##_bfd_is_group_section, \
+ NAME##_bfd_discard_group, \
+ NAME##_section_already_linked, \
+ NAME##_bfd_define_common_symbol
+
+ int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *);
+ bfd_byte * (*_bfd_get_relocated_section_contents)
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *,
+ bfd_byte *, bfd_boolean, struct bfd_symbol **);
+
+ bfd_boolean (*_bfd_relax_section)
+ (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *);
+
+ /* Create a hash table for the linker. Different backends store
+ different information in this table. */
+ struct bfd_link_hash_table *
+ (*_bfd_link_hash_table_create) (bfd *);
+
+ /* Release the memory associated with the linker hash table. */
+ void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *);
+
+ /* Add symbols from this object file into the hash table. */
+ bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *);
+
+ /* Indicate that we are only retrieving symbol values from this section. */
+ void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
+
+ /* Do a link based on the link_order structures attached to each
+ section of the BFD. */
+ bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
+
+ /* Should this section be split up into smaller pieces during linking. */
+ bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *);
+
+ /* Remove sections that are not referenced from the output. */
+ bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
+
+ /* Attempt to merge SEC_MERGE sections. */
+ bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
+
+ /* Is this section a member of a group? */
+ bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *);
+
+ /* Discard members of a group. */
+ bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *);
+
+ /* Check if SEC has been already linked during a reloceatable or
+ final link. */
+ void (*_section_already_linked) (bfd *, struct bfd_section *,
+ struct bfd_link_info *);
+
+ /* Define a common symbol. */
+ bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *,
+ struct bfd_link_hash_entry *);
+
+ /* Routines to handle dynamic symbols and relocs. */
+#define BFD_JUMP_TABLE_DYNAMIC(NAME) \
+ NAME##_get_dynamic_symtab_upper_bound, \
+ NAME##_canonicalize_dynamic_symtab, \
+ NAME##_get_synthetic_symtab, \
+ NAME##_get_dynamic_reloc_upper_bound, \
+ NAME##_canonicalize_dynamic_reloc
+
+ /* Get the amount of memory required to hold the dynamic symbols. */
+ long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *);
+ /* Read in the dynamic symbols. */
+ long (*_bfd_canonicalize_dynamic_symtab)
+ (bfd *, struct bfd_symbol **);
+ /* Create synthetized symbols. */
+ long (*_bfd_get_synthetic_symtab)
+ (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **,
+ struct bfd_symbol **);
+ /* Get the amount of memory required to hold the dynamic relocs. */
+ long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *);
+ /* Read in the dynamic relocs. */
+ long (*_bfd_canonicalize_dynamic_reloc)
+ (bfd *, arelent **, struct bfd_symbol **);
+
+ /* Opposite endian version of this target. */
+ const struct bfd_target * alternative_target;
+
+ /* Data for use by back-end routines, which isn't
+ generic enough to belong in this structure. */
+ const void *backend_data;
+
+} bfd_target;
+
+bfd_boolean bfd_set_default_target (const char *name);
+
+const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
+
+const char ** bfd_target_list (void);
+
+const bfd_target *bfd_search_for_target
+ (int (*search_func) (const bfd_target *, void *),
+ void *);
+
+/* Extracted from format.c. */
+bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
+
+bfd_boolean bfd_check_format_matches
+ (bfd *abfd, bfd_format format, char ***matching);
+
+bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
+
+const char *bfd_format_string (bfd_format format);
+
+/* Extracted from linker.c. */
+bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
+
+#define bfd_link_split_section(abfd, sec) \
+ BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
+
+void bfd_section_already_linked (bfd *abfd, asection *sec,
+ struct bfd_link_info *info);
+
+#define bfd_section_already_linked(abfd, sec, info) \
+ BFD_SEND (abfd, _section_already_linked, (abfd, sec, info))
+
+bfd_boolean bfd_generic_define_common_symbol
+ (bfd *output_bfd, struct bfd_link_info *info,
+ struct bfd_link_hash_entry *h);
+
+#define bfd_define_common_symbol(output_bfd, info, h) \
+ BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h))
+
+struct bfd_elf_version_tree * bfd_find_version_for_sym
+ (struct bfd_elf_version_tree *verdefs,
+ const char *sym_name, bfd_boolean *hide);
+
+/* Extracted from simple.c. */
+bfd_byte *bfd_simple_get_relocated_section_contents
+ (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table);
+
+/* Extracted from compress.c. */
+bfd_boolean bfd_uncompress_section_contents
+ (bfd_byte **buffer, bfd_size_type *size);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h
new file mode 100644
index 0000000..61cfc7a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/bfdlink.h
@@ -0,0 +1,784 @@
+/* bfdlink.h -- header file for BFD link routines
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#ifndef BFDLINK_H
+#define BFDLINK_H
+
+/* Which symbols to strip during a link. */
+enum bfd_link_strip
+{
+ strip_none, /* Don't strip any symbols. */
+ strip_debugger, /* Strip debugging symbols. */
+ strip_some, /* keep_hash is the list of symbols to keep. */
+ strip_all /* Strip all symbols. */
+};
+
+/* Which local symbols to discard during a link. This is irrelevant
+ if strip_all is used. */
+enum bfd_link_discard
+{
+ discard_sec_merge, /* Discard local temporary symbols in SEC_MERGE
+ sections. */
+ discard_none, /* Don't discard any locals. */
+ discard_l, /* Discard local temporary symbols. */
+ discard_all /* Discard all locals. */
+};
+
+/* Describes the type of hash table entry structure being used.
+ Different hash table structure have different fields and so
+ support different linking features. */
+enum bfd_link_hash_table_type
+ {
+ bfd_link_generic_hash_table,
+ bfd_link_elf_hash_table
+ };
+
+/* These are the possible types of an entry in the BFD link hash
+ table. */
+
+enum bfd_link_hash_type
+{
+ bfd_link_hash_new, /* Symbol is new. */
+ bfd_link_hash_undefined, /* Symbol seen before, but undefined. */
+ bfd_link_hash_undefweak, /* Symbol is weak and undefined. */
+ bfd_link_hash_defined, /* Symbol is defined. */
+ bfd_link_hash_defweak, /* Symbol is weak and defined. */
+ bfd_link_hash_common, /* Symbol is common. */
+ bfd_link_hash_indirect, /* Symbol is an indirect link. */
+ bfd_link_hash_warning /* Like indirect, but warn if referenced. */
+};
+
+enum bfd_link_common_skip_ar_aymbols
+{
+ bfd_link_common_skip_none,
+ bfd_link_common_skip_text,
+ bfd_link_common_skip_data,
+ bfd_link_common_skip_all
+};
+
+struct bfd_link_hash_common_entry
+ {
+ unsigned int alignment_power; /* Alignment. */
+ asection *section; /* Symbol section. */
+ };
+
+/* The linking routines use a hash table which uses this structure for
+ its elements. */
+
+struct bfd_link_hash_entry
+{
+ /* Base hash table entry structure. */
+ struct bfd_hash_entry root;
+
+ /* Type of this entry. */
+ enum bfd_link_hash_type type;
+
+ /* A union of information depending upon the type. */
+ union
+ {
+ /* Nothing is kept for bfd_hash_new. */
+ /* bfd_link_hash_undefined, bfd_link_hash_undefweak. */
+ struct
+ {
+ /* Undefined and common symbols are kept in a linked list through
+ this field. This field is present in all of the union element
+ so that we don't need to remove entries from the list when we
+ change their type. Removing entries would either require the
+ list to be doubly linked, which would waste more memory, or
+ require a traversal. When an undefined or common symbol is
+ created, it should be added to this list, the head of which is in
+ the link hash table itself. As symbols are defined, they need
+ not be removed from the list; anything which reads the list must
+ doublecheck the symbol type.
+
+ Weak symbols are not kept on this list.
+
+ Defined and defweak symbols use this field as a reference marker.
+ If the field is not NULL, or this structure is the tail of the
+ undefined symbol list, the symbol has been referenced. If the
+ symbol is undefined and becomes defined, this field will
+ automatically be non-NULL since the symbol will have been on the
+ undefined symbol list. */
+ struct bfd_link_hash_entry *next;
+ bfd *abfd; /* BFD symbol was found in. */
+ bfd *weak; /* BFD weak symbol was found in. */
+ } undef;
+ /* bfd_link_hash_defined, bfd_link_hash_defweak. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ asection *section; /* Symbol section. */
+ bfd_vma value; /* Symbol value. */
+ } def;
+ /* bfd_link_hash_indirect, bfd_link_hash_warning. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ struct bfd_link_hash_entry *link; /* Real symbol. */
+ const char *warning; /* Warning (bfd_link_hash_warning only). */
+ } i;
+ /* bfd_link_hash_common. */
+ struct
+ {
+ struct bfd_link_hash_entry *next;
+ /* The linker needs to know three things about common
+ symbols: the size, the alignment, and the section in
+ which the symbol should be placed. We store the size
+ here, and we allocate a small structure to hold the
+ section and the alignment. The alignment is stored as a
+ power of two. We don't store all the information
+ directly because we don't want to increase the size of
+ the union; this structure is a major space user in the
+ linker. */
+ struct bfd_link_hash_common_entry *p;
+ bfd_size_type size; /* Common symbol size. */
+ } c;
+ } u;
+};
+
+/* This is the link hash table. It is a derived class of
+ bfd_hash_table. */
+
+struct bfd_link_hash_table
+{
+ /* The hash table itself. */
+ struct bfd_hash_table table;
+ /* A linked list of undefined and common symbols, linked through the
+ next field in the bfd_link_hash_entry structure. */
+ struct bfd_link_hash_entry *undefs;
+ /* Entries are added to the tail of the undefs list. */
+ struct bfd_link_hash_entry *undefs_tail;
+ /* The type of the link hash table. */
+ enum bfd_link_hash_table_type type;
+};
+
+/* Look up an entry in a link hash table. If FOLLOW is TRUE, this
+ follows bfd_link_hash_indirect and bfd_link_hash_warning links to
+ the real symbol. */
+extern struct bfd_link_hash_entry *bfd_link_hash_lookup
+ (struct bfd_link_hash_table *, const char *, bfd_boolean create,
+ bfd_boolean copy, bfd_boolean follow);
+
+/* Look up an entry in the main linker hash table if the symbol might
+ be wrapped. This should only be used for references to an
+ undefined symbol, not for definitions of a symbol. */
+
+extern struct bfd_link_hash_entry *bfd_wrapped_link_hash_lookup
+ (bfd *, struct bfd_link_info *, const char *, bfd_boolean,
+ bfd_boolean, bfd_boolean);
+
+/* Traverse a link hash table. */
+extern void bfd_link_hash_traverse
+ (struct bfd_link_hash_table *,
+ bfd_boolean (*) (struct bfd_link_hash_entry *, void *),
+ void *);
+
+/* Add an entry to the undefs list. */
+extern void bfd_link_add_undef
+ (struct bfd_link_hash_table *, struct bfd_link_hash_entry *);
+
+/* Remove symbols from the undefs list that don't belong there. */
+extern void bfd_link_repair_undef_list
+ (struct bfd_link_hash_table *table);
+
+/* Read symbols and cache symbol pointer array in outsymbols. */
+extern bfd_boolean bfd_generic_link_read_symbols (bfd *);
+
+struct bfd_sym_chain
+{
+ struct bfd_sym_chain *next;
+ const char *name;
+};
+
+/* How to handle unresolved symbols.
+ There are four possibilities which are enumerated below: */
+enum report_method
+{
+ /* This is the initial value when then link_info structure is created.
+ It allows the various stages of the linker to determine whether they
+ allowed to set the value. */
+ RM_NOT_YET_SET = 0,
+ RM_IGNORE,
+ RM_GENERATE_WARNING,
+ RM_GENERATE_ERROR
+};
+
+struct bfd_elf_dynamic_list;
+
+/* This structure holds all the information needed to communicate
+ between BFD and the linker when doing a link. */
+
+struct bfd_link_info
+{
+ /* TRUE if BFD should generate a relocatable object file. */
+ unsigned int relocatable: 1;
+
+ /* TRUE if BFD should generate relocation information in the final
+ executable. */
+ unsigned int emitrelocations: 1;
+
+ /* TRUE if BFD should generate a "task linked" object file,
+ similar to relocatable but also with globals converted to
+ statics. */
+ unsigned int task_link: 1;
+
+ /* TRUE if BFD should generate a shared object. */
+ unsigned int shared: 1;
+
+ /* TRUE if BFD should pre-bind symbols in a shared object. */
+ unsigned int symbolic: 1;
+
+ /* TRUE if BFD should export all symbols in the dynamic symbol table
+ of an executable, rather than only those used. */
+ unsigned int export_dynamic: 1;
+
+ /* TRUE if shared objects should be linked directly, not shared. */
+ unsigned int static_link: 1;
+
+ /* TRUE if the output file should be in a traditional format. This
+ is equivalent to the setting of the BFD_TRADITIONAL_FORMAT flag
+ on the output file, but may be checked when reading the input
+ files. */
+ unsigned int traditional_format: 1;
+
+ /* TRUE if we want to produced optimized output files. This might
+ need much more time and therefore must be explicitly selected. */
+ unsigned int optimize: 1;
+
+ /* TRUE if ok to have multiple definition. */
+ unsigned int allow_multiple_definition: 1;
+
+ /* TRUE if ok to have version with no definition. */
+ unsigned int allow_undefined_version: 1;
+
+ /* TRUE if a default symbol version should be created and used for
+ exported symbols. */
+ unsigned int create_default_symver: 1;
+
+ /* TRUE if a default symbol version should be created and used for
+ imported symbols. */
+ unsigned int default_imported_symver: 1;
+
+ /* TRUE if symbols should be retained in memory, FALSE if they
+ should be freed and reread. */
+ unsigned int keep_memory: 1;
+
+ /* TRUE if every symbol should be reported back via the notice
+ callback. */
+ unsigned int notice_all: 1;
+
+ /* TRUE if executable should not contain copy relocs.
+ Setting this true may result in a non-sharable text segment. */
+ unsigned int nocopyreloc: 1;
+
+ /* TRUE if the new ELF dynamic tags are enabled. */
+ unsigned int new_dtags: 1;
+
+ /* TRUE if non-PLT relocs should be merged into one reloc section
+ and sorted so that relocs against the same symbol come together. */
+ unsigned int combreloc: 1;
+
+ /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment
+ should be created. */
+ unsigned int eh_frame_hdr: 1;
+
+ /* TRUE if global symbols in discarded sections should be stripped. */
+ unsigned int strip_discarded: 1;
+
+ /* TRUE if generating a position independent executable. */
+ unsigned int pie: 1;
+
+ /* TRUE if generating an executable, position independent or not. */
+ unsigned int executable : 1;
+
+ /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W|PF_X
+ flags. */
+ unsigned int execstack: 1;
+
+ /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W
+ flags. */
+ unsigned int noexecstack: 1;
+
+ /* TRUE if PT_GNU_RELRO segment should be created. */
+ unsigned int relro: 1;
+
+ /* TRUE if we should warn when adding a DT_TEXTREL to a shared object. */
+ unsigned int warn_shared_textrel: 1;
+
+ /* TRUE if we should warn alternate ELF machine code. */
+ unsigned int warn_alternate_em: 1;
+
+ /* TRUE if unreferenced sections should be removed. */
+ unsigned int gc_sections: 1;
+
+ /* TRUE if user shoudl be informed of removed unreferenced sections. */
+ unsigned int print_gc_sections: 1;
+
+ /* TRUE if .hash section should be created. */
+ unsigned int emit_hash: 1;
+
+ /* TRUE if .gnu.hash section should be created. */
+ unsigned int emit_gnu_hash: 1;
+
+ /* If TRUE reduce memory overheads, at the expense of speed. This will
+ cause map file generation to use an O(N^2) algorithm and disable
+ caching ELF symbol buffer. */
+ unsigned int reduce_memory_overheads: 1;
+
+ /* TRUE if all data symbols should be dynamic. */
+ unsigned int dynamic_data: 1;
+
+ /* TRUE if some symbols have to be dynamic, controlled by
+ --dynamic-list command line options. */
+ unsigned int dynamic: 1;
+
+ /* Non-NULL if .note.gnu.build-id section should be created. */
+ char *emit_note_gnu_build_id;
+
+ /* What to do with unresolved symbols in an object file.
+ When producing executables the default is GENERATE_ERROR.
+ When producing shared libraries the default is IGNORE. The
+ assumption with shared libraries is that the reference will be
+ resolved at load/execution time. */
+ enum report_method unresolved_syms_in_objects;
+
+ /* What to do with unresolved symbols in a shared library.
+ The same defaults apply. */
+ enum report_method unresolved_syms_in_shared_libs;
+
+ /* Which symbols to strip. */
+ enum bfd_link_strip strip;
+
+ /* Which local symbols to discard. */
+ enum bfd_link_discard discard;
+
+ /* Criteria for skipping symbols when detemining
+ whether to include an object from an archive. */
+ enum bfd_link_common_skip_ar_aymbols common_skip_ar_aymbols;
+
+ /* Char that may appear as the first char of a symbol, but should be
+ skipped (like symbol_leading_char) when looking up symbols in
+ wrap_hash. Used by PowerPC Linux for 'dot' symbols. */
+ char wrap_char;
+
+ /* Separator between archive and filename in linker script filespecs. */
+ char path_separator;
+
+ /* Function callbacks. */
+ const struct bfd_link_callbacks *callbacks;
+
+ /* Hash table handled by BFD. */
+ struct bfd_link_hash_table *hash;
+
+ /* Hash table of symbols to keep. This is NULL unless strip is
+ strip_some. */
+ struct bfd_hash_table *keep_hash;
+
+ /* Hash table of symbols to report back via the notice callback. If
+ this is NULL, and notice_all is FALSE, then no symbols are
+ reported back. */
+ struct bfd_hash_table *notice_hash;
+
+ /* Hash table of symbols which are being wrapped (the --wrap linker
+ option). If this is NULL, no symbols are being wrapped. */
+ struct bfd_hash_table *wrap_hash;
+
+ /* The output BFD. */
+ bfd *output_bfd;
+
+ /* The list of input BFD's involved in the link. These are chained
+ together via the link_next field. */
+ bfd *input_bfds;
+ bfd **input_bfds_tail;
+
+ /* If a symbol should be created for each input BFD, this is section
+ where those symbols should be placed. It must be a section in
+ the output BFD. It may be NULL, in which case no such symbols
+ will be created. This is to support CREATE_OBJECT_SYMBOLS in the
+ linker command language. */
+ asection *create_object_symbols_section;
+
+ /* List of global symbol names that are starting points for marking
+ sections against garbage collection. */
+ struct bfd_sym_chain *gc_sym_list;
+
+ /* If a base output file is wanted, then this points to it */
+ void *base_file;
+
+ /* The function to call when the executable or shared object is
+ loaded. */
+ const char *init_function;
+
+ /* The function to call when the executable or shared object is
+ unloaded. */
+ const char *fini_function;
+
+ /* Number of relaxation passes. Usually only one relaxation pass
+ is needed. But a backend can have as many relaxation passes as
+ necessary. During bfd_relax_section call, it is set to the
+ current pass, starting from 0. */
+ int relax_pass;
+
+ /* Number of relaxation trips. This number is incremented every
+ time the relaxation pass is restarted due to a previous
+ relaxation returning true in *AGAIN. */
+ int relax_trip;
+
+ /* Non-zero if auto-import thunks for DATA items in pei386 DLLs
+ should be generated/linked against. Set to 1 if this feature
+ is explicitly requested by the user, -1 if enabled by default. */
+ int pei386_auto_import;
+
+ /* Non-zero if runtime relocs for DATA items with non-zero addends
+ in pei386 DLLs should be generated. Set to 1 if this feature
+ is explicitly requested by the user, -1 if enabled by default. */
+ int pei386_runtime_pseudo_reloc;
+
+ /* How many spare .dynamic DT_NULL entries should be added? */
+ unsigned int spare_dynamic_tags;
+
+ /* May be used to set DT_FLAGS for ELF. */
+ bfd_vma flags;
+
+ /* May be used to set DT_FLAGS_1 for ELF. */
+ bfd_vma flags_1;
+
+ /* Start and end of RELRO region. */
+ bfd_vma relro_start, relro_end;
+
+ /* List of symbols should be dynamic. */
+ struct bfd_elf_dynamic_list *dynamic_list;
+};
+
+/* This structures holds a set of callback functions. These are called
+ by the BFD linker routines. Except for the info functions, the first
+ argument to each callback function is the bfd_link_info structure
+ being used and each function returns a boolean value. If the
+ function returns FALSE, then the BFD function which called it should
+ return with a failure indication. */
+
+struct bfd_link_callbacks
+{
+ /* A function which is called when an object is added from an
+ archive. ABFD is the archive element being added. NAME is the
+ name of the symbol which caused the archive element to be pulled
+ in. */
+ bfd_boolean (*add_archive_element)
+ (struct bfd_link_info *, bfd *abfd, const char *name);
+ /* A function which is called when a symbol is found with multiple
+ definitions. NAME is the symbol which is defined multiple times.
+ OBFD is the old BFD, OSEC is the old section, OVAL is the old
+ value, NBFD is the new BFD, NSEC is the new section, and NVAL is
+ the new value. OBFD may be NULL. OSEC and NSEC may be
+ bfd_com_section or bfd_ind_section. */
+ bfd_boolean (*multiple_definition)
+ (struct bfd_link_info *, const char *name,
+ bfd *obfd, asection *osec, bfd_vma oval,
+ bfd *nbfd, asection *nsec, bfd_vma nval);
+ /* A function which is called when a common symbol is defined
+ multiple times. NAME is the symbol appearing multiple times.
+ OBFD is the BFD of the existing symbol; it may be NULL if this is
+ not known. OTYPE is the type of the existing symbol, which may
+ be bfd_link_hash_defined, bfd_link_hash_defweak,
+ bfd_link_hash_common, or bfd_link_hash_indirect. If OTYPE is
+ bfd_link_hash_common, OSIZE is the size of the existing symbol.
+ NBFD is the BFD of the new symbol. NTYPE is the type of the new
+ symbol, one of bfd_link_hash_defined, bfd_link_hash_common, or
+ bfd_link_hash_indirect. If NTYPE is bfd_link_hash_common, NSIZE
+ is the size of the new symbol. */
+ bfd_boolean (*multiple_common)
+ (struct bfd_link_info *, const char *name,
+ bfd *obfd, enum bfd_link_hash_type otype, bfd_vma osize,
+ bfd *nbfd, enum bfd_link_hash_type ntype, bfd_vma nsize);
+ /* A function which is called to add a symbol to a set. ENTRY is
+ the link hash table entry for the set itself (e.g.,
+ __CTOR_LIST__). RELOC is the relocation to use for an entry in
+ the set when generating a relocatable file, and is also used to
+ get the size of the entry when generating an executable file.
+ ABFD, SEC and VALUE identify the value to add to the set. */
+ bfd_boolean (*add_to_set)
+ (struct bfd_link_info *, struct bfd_link_hash_entry *entry,
+ bfd_reloc_code_real_type reloc, bfd *abfd, asection *sec, bfd_vma value);
+ /* A function which is called when the name of a g++ constructor or
+ destructor is found. This is only called by some object file
+ formats. CONSTRUCTOR is TRUE for a constructor, FALSE for a
+ destructor. This will use BFD_RELOC_CTOR when generating a
+ relocatable file. NAME is the name of the symbol found. ABFD,
+ SECTION and VALUE are the value of the symbol. */
+ bfd_boolean (*constructor)
+ (struct bfd_link_info *, bfd_boolean constructor, const char *name,
+ bfd *abfd, asection *sec, bfd_vma value);
+ /* A function which is called to issue a linker warning. For
+ example, this is called when there is a reference to a warning
+ symbol. WARNING is the warning to be issued. SYMBOL is the name
+ of the symbol which triggered the warning; it may be NULL if
+ there is none. ABFD, SECTION and ADDRESS identify the location
+ which trigerred the warning; either ABFD or SECTION or both may
+ be NULL if the location is not known. */
+ bfd_boolean (*warning)
+ (struct bfd_link_info *, const char *warning, const char *symbol,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a relocation is attempted against
+ an undefined symbol. NAME is the symbol which is undefined.
+ ABFD, SECTION and ADDRESS identify the location from which the
+ reference is made. FATAL indicates whether an undefined symbol is
+ a fatal error or not. In some cases SECTION may be NULL. */
+ bfd_boolean (*undefined_symbol)
+ (struct bfd_link_info *, const char *name, bfd *abfd,
+ asection *section, bfd_vma address, bfd_boolean fatal);
+ /* A function which is called when a reloc overflow occurs. ENTRY is
+ the link hash table entry for the symbol the reloc is against.
+ NAME is the name of the local symbol or section the reloc is
+ against, RELOC_NAME is the name of the relocation, and ADDEND is
+ any addend that is used. ABFD, SECTION and ADDRESS identify the
+ location at which the overflow occurs; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*reloc_overflow)
+ (struct bfd_link_info *, struct bfd_link_hash_entry *entry,
+ const char *name, const char *reloc_name, bfd_vma addend,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a dangerous reloc is performed.
+ MESSAGE is an appropriate message.
+ ABFD, SECTION and ADDRESS identify the location at which the
+ problem occurred; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*reloc_dangerous)
+ (struct bfd_link_info *, const char *message,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a reloc is found to be attached
+ to a symbol which is not being written out. NAME is the name of
+ the symbol. ABFD, SECTION and ADDRESS identify the location of
+ the reloc; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ bfd_boolean (*unattached_reloc)
+ (struct bfd_link_info *, const char *name,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* A function which is called when a symbol in notice_hash is
+ defined or referenced. NAME is the symbol. ABFD, SECTION and
+ ADDRESS are the value of the symbol. If SECTION is
+ bfd_und_section, this is a reference. */
+ bfd_boolean (*notice)
+ (struct bfd_link_info *, const char *name,
+ bfd *abfd, asection *section, bfd_vma address);
+ /* Error or warning link info message. */
+ void (*einfo)
+ (const char *fmt, ...);
+ /* General link info message. */
+ void (*info)
+ (const char *fmt, ...);
+ /* Message to be printed in linker map file. */
+ void (*minfo)
+ (const char *fmt, ...);
+ /* This callback provides a chance for users of the BFD library to
+ override its decision about whether to place two adjacent sections
+ into the same segment. */
+ bfd_boolean (*override_segment_assignment)
+ (struct bfd_link_info *, bfd * abfd,
+ asection * current_section, asection * previous_section,
+ bfd_boolean new_segment);
+};
+
+/* The linker builds link_order structures which tell the code how to
+ include input data in the output file. */
+
+/* These are the types of link_order structures. */
+
+enum bfd_link_order_type
+{
+ bfd_undefined_link_order, /* Undefined. */
+ bfd_indirect_link_order, /* Built from a section. */
+ bfd_data_link_order, /* Set to explicit data. */
+ bfd_section_reloc_link_order, /* Relocate against a section. */
+ bfd_symbol_reloc_link_order /* Relocate against a symbol. */
+};
+
+/* This is the link_order structure itself. These form a chain
+ attached to the output section whose contents they are describing. */
+
+struct bfd_link_order
+{
+ /* Next link_order in chain. */
+ struct bfd_link_order *next;
+ /* Type of link_order. */
+ enum bfd_link_order_type type;
+ /* Offset within output section. */
+ bfd_vma offset;
+ /* Size within output section. */
+ bfd_size_type size;
+ /* Type specific information. */
+ union
+ {
+ struct
+ {
+ /* Section to include. If this is used, then
+ section->output_section must be the section the
+ link_order is attached to, section->output_offset must
+ equal the link_order offset field, and section->size
+ must equal the link_order size field. Maybe these
+ restrictions should be relaxed someday. */
+ asection *section;
+ } indirect;
+ struct
+ {
+ /* Size of contents, or zero when contents size == size
+ within output section.
+ A non-zero value allows filling of the output section
+ with an arbitrary repeated pattern. */
+ unsigned int size;
+ /* Data to put into file. */
+ bfd_byte *contents;
+ } data;
+ struct
+ {
+ /* Description of reloc to generate. Used for
+ bfd_section_reloc_link_order and
+ bfd_symbol_reloc_link_order. */
+ struct bfd_link_order_reloc *p;
+ } reloc;
+ } u;
+};
+
+/* A linker order of type bfd_section_reloc_link_order or
+ bfd_symbol_reloc_link_order means to create a reloc against a
+ section or symbol, respectively. This is used to implement -Ur to
+ generate relocs for the constructor tables. The
+ bfd_link_order_reloc structure describes the reloc that BFD should
+ create. It is similar to a arelent, but I didn't use arelent
+ because the linker does not know anything about most symbols, and
+ any asymbol structure it creates will be partially meaningless.
+ This information could logically be in the bfd_link_order struct,
+ but I didn't want to waste the space since these types of relocs
+ are relatively rare. */
+
+struct bfd_link_order_reloc
+{
+ /* Reloc type. */
+ bfd_reloc_code_real_type reloc;
+
+ union
+ {
+ /* For type bfd_section_reloc_link_order, this is the section
+ the reloc should be against. This must be a section in the
+ output BFD, not any of the input BFDs. */
+ asection *section;
+ /* For type bfd_symbol_reloc_link_order, this is the name of the
+ symbol the reloc should be against. */
+ const char *name;
+ } u;
+
+ /* Addend to use. The object file should contain zero. The BFD
+ backend is responsible for filling in the contents of the object
+ file correctly. For some object file formats (e.g., COFF) the
+ addend must be stored into in the object file, and for some
+ (e.g., SPARC a.out) it is kept in the reloc. */
+ bfd_vma addend;
+};
+
+/* Allocate a new link_order for a section. */
+extern struct bfd_link_order *bfd_new_link_order (bfd *, asection *);
+
+/* These structures are used to describe version information for the
+ ELF linker. These structures could be manipulated entirely inside
+ BFD, but it would be a pain. Instead, the regular linker sets up
+ these structures, and then passes them into BFD. */
+
+/* Glob pattern for a version. */
+
+struct bfd_elf_version_expr
+{
+ /* Next glob pattern for this version. */
+ struct bfd_elf_version_expr *next;
+ /* Glob pattern. */
+ const char *pattern;
+ /* Set if pattern is not a glob. */
+ unsigned int literal : 1;
+ /* Defined by ".symver". */
+ unsigned int symver : 1;
+ /* Defined by version script. */
+ unsigned int script : 1;
+ /* Pattern type. */
+#define BFD_ELF_VERSION_C_TYPE 1
+#define BFD_ELF_VERSION_CXX_TYPE 2
+#define BFD_ELF_VERSION_JAVA_TYPE 4
+ unsigned int mask : 3;
+};
+
+struct bfd_elf_version_expr_head
+{
+ /* List of all patterns, both wildcards and non-wildcards. */
+ struct bfd_elf_version_expr *list;
+ /* Hash table for non-wildcards. */
+ void *htab;
+ /* Remaining patterns. */
+ struct bfd_elf_version_expr *remaining;
+ /* What kind of pattern types are present in list (bitmask). */
+ unsigned int mask;
+};
+
+/* Version dependencies. */
+
+struct bfd_elf_version_deps
+{
+ /* Next dependency for this version. */
+ struct bfd_elf_version_deps *next;
+ /* The version which this version depends upon. */
+ struct bfd_elf_version_tree *version_needed;
+};
+
+/* A node in the version tree. */
+
+struct bfd_elf_version_tree
+{
+ /* Next version. */
+ struct bfd_elf_version_tree *next;
+ /* Name of this version. */
+ const char *name;
+ /* Version number. */
+ unsigned int vernum;
+ /* Regular expressions for global symbols in this version. */
+ struct bfd_elf_version_expr_head globals;
+ /* Regular expressions for local symbols in this version. */
+ struct bfd_elf_version_expr_head locals;
+ /* List of versions which this version depends upon. */
+ struct bfd_elf_version_deps *deps;
+ /* Index of the version name. This is used within BFD. */
+ unsigned int name_indx;
+ /* Whether this version tree was used. This is used within BFD. */
+ int used;
+ /* Matching hook. */
+ struct bfd_elf_version_expr *(*match)
+ (struct bfd_elf_version_expr_head *head,
+ struct bfd_elf_version_expr *prev, const char *sym);
+};
+
+struct bfd_elf_dynamic_list
+{
+ struct bfd_elf_version_expr_head head;
+ struct bfd_elf_version_expr *(*match)
+ (struct bfd_elf_version_expr_head *head,
+ struct bfd_elf_version_expr *prev, const char *sym);
+};
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h
new file mode 100644
index 0000000..03a1292
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/include/symcat.h
@@ -0,0 +1,49 @@
+/* Symbol concatenation utilities.
+
+ Copyright (C) 1998, 2000 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef SYM_CAT_H
+#define SYM_CAT_H
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define CONCAT2(a,b) a##b
+#define CONCAT3(a,b,c) a##b##c
+#define CONCAT4(a,b,c,d) a##b##c##d
+#define STRINGX(s) #s
+#else
+/* Note one should never pass extra whitespace to the CONCATn macros,
+ e.g. CONCAT2(foo, bar) because traditonal C will keep the space between
+ the two labels instead of concatenating them. Instead, make sure to
+ write CONCAT2(foo,bar). */
+#define CONCAT2(a,b) a/**/b
+#define CONCAT3(a,b,c) a/**/b/**/c
+#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d
+#define STRINGX(s) "s"
+#endif
+
+#define XCONCAT2(a,b) CONCAT2(a,b)
+#define XCONCAT3(a,b,c) CONCAT3(a,b,c)
+#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d)
+
+/* Note the layer of indirection here is typically used to allow
+ stringification of the expansion of macros. I.e. "#define foo
+ bar", "XSTRING(foo)", to yield "bar". Be aware that this only
+ works for __STDC__, not for traditional C which will still resolve
+ to "foo". */
+#define XSTRING(s) STRINGX(s)
+
+#endif /* SYM_CAT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info
new file mode 100644
index 0000000..1b38de5
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cpp.info
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info
new file mode 100644
index 0000000..8339a78
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/cppinternals.info
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir
new file mode 100644
index 0000000..c36f7e7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/dir
@@ -0,0 +1,23 @@
+This is the file .../info/dir, which contains the
+topmost node of the Info hierarchy, called (dir)Top.
+The first time you invoke Info you start off looking at this node.
+
+File: dir, Node: Top This is the top of the INFO tree
+
+ This (the Directory node) gives a menu of major topics.
+ Typing "q" exits, "?" lists all Info commands, "d" returns here,
+ "h" gives a primer for first-timers,
+ "mEmacs<Return>" visits the Emacs manual, etc.
+
+ In Emacs, you can click mouse button 2 on a menu item or cross reference
+ to select it.
+
+* Menu:
+
+Software development
+* Cpp: (cpp). The GNU C preprocessor.
+* Cpplib: (cppinternals). Cpplib internals.
+* g++: (gcc). The GNU C++ compiler.
+* gcc: (gcc). The GNU Compiler Collection.
+* gccinstall: (gccinstall). Installing the GNU Compiler Collection.
+* gccint: (gccint). Internals of the GNU Compiler Collection.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info
new file mode 100644
index 0000000..b16e5e6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gcc.info
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info
new file mode 100644
index 0000000..205e395
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccinstall.info
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info
new file mode 100644
index 0000000..25e26c7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/info/gccint.info
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk
new file mode 100644
index 0000000..a86de8b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/Android.mk
@@ -0,0 +1,24 @@
+# Copyright (C) 2011 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+LOCAL_PATH := $(call my-dir)
+
+LOCAL_PREBUILT_LIBS := \
+ libbfd.a \
+ libiberty.a \
+ libintl.a
+
+LOCAL_MODULE_TAGS := optional
+
+include $(BUILD_HOST_PREBUILT)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/armv7-a/crtbegin.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/armv7-a/crtbegin.o
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index 0000000..e8e6b93
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+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtbeginS.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtbeginT.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtbeginT.o
new file mode 100644
index 0000000..683c04f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtbeginT.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtend.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtend.o
new file mode 100644
index 0000000..7b96912
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtend.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtendS.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtendS.o
new file mode 100644
index 0000000..7b96912
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/crtendS.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README
new file mode 100644
index 0000000..7086a77
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include-fixed/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process. They are
+system-specific, and will not work on any other kind of system. They
+are also not part of GCC. The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix. As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h
new file mode 100644
index 0000000..faaaf7b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/arm_neon.h
@@ -0,0 +1,12176 @@
+/* ARM NEON intrinsics include file. This file is generated automatically
+ using neon-gen.ml. Please do not edit manually.
+
+ Copyright (C) 2006, 2007, 2009 Free Software Foundation, Inc.
+ Contributed by CodeSourcery.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _GCC_ARM_NEON_H
+#define _GCC_ARM_NEON_H 1
+
+#ifndef __ARM_NEON__
+#error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h
+#else
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef __builtin_neon_qi int8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_hi int16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_si int32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_di int64x1_t;
+typedef __builtin_neon_sf float32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_poly8 poly8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_poly16 poly16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_uqi uint8x8_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_uhi uint16x4_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_usi uint32x2_t __attribute__ ((__vector_size__ (8)));
+typedef __builtin_neon_udi uint64x1_t;
+typedef __builtin_neon_qi int8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_hi int16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_si int32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_di int64x2_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_sf float32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_poly8 poly8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_poly16 poly16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_uqi uint8x16_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_uhi uint16x8_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_usi uint32x4_t __attribute__ ((__vector_size__ (16)));
+typedef __builtin_neon_udi uint64x2_t __attribute__ ((__vector_size__ (16)));
+
+typedef __builtin_neon_sf float32_t;
+typedef __builtin_neon_poly8 poly8_t;
+typedef __builtin_neon_poly16 poly16_t;
+
+typedef struct int8x8x2_t
+{
+ int8x8_t val[2];
+} int8x8x2_t;
+
+typedef struct int8x16x2_t
+{
+ int8x16_t val[2];
+} int8x16x2_t;
+
+typedef struct int16x4x2_t
+{
+ int16x4_t val[2];
+} int16x4x2_t;
+
+typedef struct int16x8x2_t
+{
+ int16x8_t val[2];
+} int16x8x2_t;
+
+typedef struct int32x2x2_t
+{
+ int32x2_t val[2];
+} int32x2x2_t;
+
+typedef struct int32x4x2_t
+{
+ int32x4_t val[2];
+} int32x4x2_t;
+
+typedef struct int64x1x2_t
+{
+ int64x1_t val[2];
+} int64x1x2_t;
+
+typedef struct int64x2x2_t
+{
+ int64x2_t val[2];
+} int64x2x2_t;
+
+typedef struct uint8x8x2_t
+{
+ uint8x8_t val[2];
+} uint8x8x2_t;
+
+typedef struct uint8x16x2_t
+{
+ uint8x16_t val[2];
+} uint8x16x2_t;
+
+typedef struct uint16x4x2_t
+{
+ uint16x4_t val[2];
+} uint16x4x2_t;
+
+typedef struct uint16x8x2_t
+{
+ uint16x8_t val[2];
+} uint16x8x2_t;
+
+typedef struct uint32x2x2_t
+{
+ uint32x2_t val[2];
+} uint32x2x2_t;
+
+typedef struct uint32x4x2_t
+{
+ uint32x4_t val[2];
+} uint32x4x2_t;
+
+typedef struct uint64x1x2_t
+{
+ uint64x1_t val[2];
+} uint64x1x2_t;
+
+typedef struct uint64x2x2_t
+{
+ uint64x2_t val[2];
+} uint64x2x2_t;
+
+typedef struct float32x2x2_t
+{
+ float32x2_t val[2];
+} float32x2x2_t;
+
+typedef struct float32x4x2_t
+{
+ float32x4_t val[2];
+} float32x4x2_t;
+
+typedef struct poly8x8x2_t
+{
+ poly8x8_t val[2];
+} poly8x8x2_t;
+
+typedef struct poly8x16x2_t
+{
+ poly8x16_t val[2];
+} poly8x16x2_t;
+
+typedef struct poly16x4x2_t
+{
+ poly16x4_t val[2];
+} poly16x4x2_t;
+
+typedef struct poly16x8x2_t
+{
+ poly16x8_t val[2];
+} poly16x8x2_t;
+
+typedef struct int8x8x3_t
+{
+ int8x8_t val[3];
+} int8x8x3_t;
+
+typedef struct int8x16x3_t
+{
+ int8x16_t val[3];
+} int8x16x3_t;
+
+typedef struct int16x4x3_t
+{
+ int16x4_t val[3];
+} int16x4x3_t;
+
+typedef struct int16x8x3_t
+{
+ int16x8_t val[3];
+} int16x8x3_t;
+
+typedef struct int32x2x3_t
+{
+ int32x2_t val[3];
+} int32x2x3_t;
+
+typedef struct int32x4x3_t
+{
+ int32x4_t val[3];
+} int32x4x3_t;
+
+typedef struct int64x1x3_t
+{
+ int64x1_t val[3];
+} int64x1x3_t;
+
+typedef struct int64x2x3_t
+{
+ int64x2_t val[3];
+} int64x2x3_t;
+
+typedef struct uint8x8x3_t
+{
+ uint8x8_t val[3];
+} uint8x8x3_t;
+
+typedef struct uint8x16x3_t
+{
+ uint8x16_t val[3];
+} uint8x16x3_t;
+
+typedef struct uint16x4x3_t
+{
+ uint16x4_t val[3];
+} uint16x4x3_t;
+
+typedef struct uint16x8x3_t
+{
+ uint16x8_t val[3];
+} uint16x8x3_t;
+
+typedef struct uint32x2x3_t
+{
+ uint32x2_t val[3];
+} uint32x2x3_t;
+
+typedef struct uint32x4x3_t
+{
+ uint32x4_t val[3];
+} uint32x4x3_t;
+
+typedef struct uint64x1x3_t
+{
+ uint64x1_t val[3];
+} uint64x1x3_t;
+
+typedef struct uint64x2x3_t
+{
+ uint64x2_t val[3];
+} uint64x2x3_t;
+
+typedef struct float32x2x3_t
+{
+ float32x2_t val[3];
+} float32x2x3_t;
+
+typedef struct float32x4x3_t
+{
+ float32x4_t val[3];
+} float32x4x3_t;
+
+typedef struct poly8x8x3_t
+{
+ poly8x8_t val[3];
+} poly8x8x3_t;
+
+typedef struct poly8x16x3_t
+{
+ poly8x16_t val[3];
+} poly8x16x3_t;
+
+typedef struct poly16x4x3_t
+{
+ poly16x4_t val[3];
+} poly16x4x3_t;
+
+typedef struct poly16x8x3_t
+{
+ poly16x8_t val[3];
+} poly16x8x3_t;
+
+typedef struct int8x8x4_t
+{
+ int8x8_t val[4];
+} int8x8x4_t;
+
+typedef struct int8x16x4_t
+{
+ int8x16_t val[4];
+} int8x16x4_t;
+
+typedef struct int16x4x4_t
+{
+ int16x4_t val[4];
+} int16x4x4_t;
+
+typedef struct int16x8x4_t
+{
+ int16x8_t val[4];
+} int16x8x4_t;
+
+typedef struct int32x2x4_t
+{
+ int32x2_t val[4];
+} int32x2x4_t;
+
+typedef struct int32x4x4_t
+{
+ int32x4_t val[4];
+} int32x4x4_t;
+
+typedef struct int64x1x4_t
+{
+ int64x1_t val[4];
+} int64x1x4_t;
+
+typedef struct int64x2x4_t
+{
+ int64x2_t val[4];
+} int64x2x4_t;
+
+typedef struct uint8x8x4_t
+{
+ uint8x8_t val[4];
+} uint8x8x4_t;
+
+typedef struct uint8x16x4_t
+{
+ uint8x16_t val[4];
+} uint8x16x4_t;
+
+typedef struct uint16x4x4_t
+{
+ uint16x4_t val[4];
+} uint16x4x4_t;
+
+typedef struct uint16x8x4_t
+{
+ uint16x8_t val[4];
+} uint16x8x4_t;
+
+typedef struct uint32x2x4_t
+{
+ uint32x2_t val[4];
+} uint32x2x4_t;
+
+typedef struct uint32x4x4_t
+{
+ uint32x4_t val[4];
+} uint32x4x4_t;
+
+typedef struct uint64x1x4_t
+{
+ uint64x1_t val[4];
+} uint64x1x4_t;
+
+typedef struct uint64x2x4_t
+{
+ uint64x2_t val[4];
+} uint64x2x4_t;
+
+typedef struct float32x2x4_t
+{
+ float32x2_t val[4];
+} float32x2x4_t;
+
+typedef struct float32x4x4_t
+{
+ float32x4_t val[4];
+} float32x4x4_t;
+
+typedef struct poly8x8x4_t
+{
+ poly8x8_t val[4];
+} poly8x8x4_t;
+
+typedef struct poly8x16x4_t
+{
+ poly8x16_t val[4];
+} poly8x16x4_t;
+
+typedef struct poly16x4x4_t
+{
+ poly16x4_t val[4];
+} poly16x4x4_t;
+
+typedef struct poly16x8x4_t
+{
+ poly16x8_t val[4];
+} poly16x8x4_t;
+
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vadd_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vadddi (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vadd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vaddv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vadd_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vadddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddv2di (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vaddq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vaddv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddlv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddlv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddlv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vaddw_s8 (int16x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vaddwv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vaddw_s16 (int32x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vaddwv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vaddw_s32 (int64x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vaddwv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vaddw_u8 (uint16x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vaddwv8qi ((int16x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vaddw_u16 (uint32x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vaddwv4hi ((int32x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vaddw_u32 (uint64x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vaddwv2si ((int64x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vhadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vhadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vhadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vhadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vhadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vhadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vhaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vhaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vhaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrhadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhaddv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrhadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhaddv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrhadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhaddv2si (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrhadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrhadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrhadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhaddv2si ((int32x2_t) __a, (int32x2_t) __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrhaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhaddv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrhaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhaddv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrhaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhaddv4si (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhaddv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqadd_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqadddi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqadd_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqadddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqaddq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqaddv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqaddq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqaddv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqaddq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqaddv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqaddq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqaddv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqaddv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqaddv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqaddv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqaddq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqaddv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vaddhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddhnv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vaddhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddhnv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vaddhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddhnv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vaddhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vaddhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddhnv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vaddhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddhnv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vraddhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vaddhnv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vraddhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vaddhnv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vraddhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vaddhnv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vraddhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vaddhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vraddhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vaddhnv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vraddhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vaddhnv2di ((int64x2_t) __a, (int64x2_t) __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmul_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vmulv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmulv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmulv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmulv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmul_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vmulv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmulv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmulv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmul_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly8x8_t)__builtin_neon_vmulv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmulq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vmulv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmulv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmulv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmulv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmulq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vmulv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmulv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmulv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmulq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (poly8x16_t)__builtin_neon_vmulv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulhv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulhv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulhv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulhv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulhv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulhv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulhv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulhv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmull_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmullv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmullv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vmullv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmull_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmullv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmullv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vmullv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vmull_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly16x8_t)__builtin_neon_vmullv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmullv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqdmullv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmla_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vmlav8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmlav4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmlav2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmlav2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmla_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vmlav8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmlav4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmlav2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmlaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vmlav16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlav8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlav4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmlav4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmlaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vmlav16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlav8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlav4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlalv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlalv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlalv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlalv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmls_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vmlsv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmlsv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmlsv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmlsv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmls_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vmlsv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmlsv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmlsv2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmlsq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vmlsv16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlsv8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlsv4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmlsv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmlsq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vmlsv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlsv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlsv4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsl_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmlslv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlslv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlslv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsl_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmlslv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlslv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlslv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlslv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlslv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsub_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vsubdi (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vsub_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vsubv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsub_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vsubdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsubv2di (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vsubq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vsubv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsubv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsublv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsublv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsublv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsublv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsublv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsublv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsubw_s8 (int16x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vsubwv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsubw_s16 (int32x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vsubwv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsubw_s32 (int64x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vsubwv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsubw_u8 (uint16x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vsubwv8qi ((int16x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsubw_u16 (uint32x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vsubwv4hi ((int32x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsubw_u32 (uint64x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vsubwv2si ((int64x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vhsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vhsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vhsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vhsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vhsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vhsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vhsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vhsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vhsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vhsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vhsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vhsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vhsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vhsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vhsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vhsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vhsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vhsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vhsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vhsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vhsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vhsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vhsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vhsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqsub_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqsubv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqsub_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqsubv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqsub_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqsubv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqsub_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqsubdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqsub_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqsubv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqsub_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqsubv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqsub_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqsub_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqsubdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqsubq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqsubv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqsubq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqsubv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqsubq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqsubv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqsubq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqsubv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqsubv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqsubv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqsubv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqsubq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqsubv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsubhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubhnv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsubhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubhnv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsubhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubhnv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsubhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsubhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubhnv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsubhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubhnv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrsubhn_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vsubhnv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrsubhn_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vsubhnv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrsubhn_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vsubhnv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrsubhn_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vsubhnv8hi ((int16x8_t) __a, (int16x8_t) __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrsubhn_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vsubhnv4si ((int32x4_t) __a, (int32x4_t) __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsubhn_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vsubhnv2di ((int64x2_t) __a, (int64x2_t) __b, 4);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vceq_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vceqv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vceq_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vceqv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vceq_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vceqv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vceq_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vceqv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vceqq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vceqv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vceqq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vceqv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vceqq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vceqv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vceqq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vceqv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcge_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcge_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcge_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcge_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcge_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgeq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgeq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgeq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgeq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgeq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcle_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcle_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcle_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgev8qi ((int8x8_t) __b, (int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcle_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgev4hi ((int16x4_t) __b, (int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcle_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgev2si ((int32x2_t) __b, (int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcleq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcleq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcleq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgev16qi ((int8x16_t) __b, (int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcleq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgev8hi ((int16x8_t) __b, (int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcleq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgev4si ((int32x4_t) __b, (int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcgt_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcgt_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcgt_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcgt_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcgt_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgtq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgtq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcgtq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcgtq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcgtq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclt_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclt_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclt_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vcgtv8qi ((int8x8_t) __b, (int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclt_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vcgtv4hi ((int16x4_t) __b, (int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclt_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcgtv2si ((int32x2_t) __b, (int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcltq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi (__b, __a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcltq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si (__b, __a, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcltq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcgtv16qi ((int8x16_t) __b, (int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcltq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcgtv8hi ((int16x8_t) __b, (int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcltq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcgtv4si ((int32x4_t) __b, (int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcage_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcageq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcale_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagev2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcaleq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagev4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcagt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagtv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcagtq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagtv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcalt_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vcagtv2sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcaltq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcagtv4sf (__b, __a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vtst_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vtstv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vtst_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vtstv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vtst_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vtstv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vtst_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vtstv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtst_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtstv8qi ((int8x8_t) __a, (int8x8_t) __b, 2);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vtstq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vtstv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vtstq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vtstv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vtstq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vtstv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vtstq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vtstv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vtstq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vtstv16qi ((int8x16_t) __a, (int8x16_t) __b, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vabd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vabdv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vabd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vabdv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vabd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vabdv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vabd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vabdv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vabd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vabdv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vabd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vabdv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vabd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vabdv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabdq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vabdv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabdq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vabdv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabdq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vabdv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vabdq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vabdv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vabdq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vabdv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabdq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vabdv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabdq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vabdv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabdl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vabdlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabdl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vabdlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vabdl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vabdlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabdl_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vabdlv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabdl_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vabdlv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vabdl_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vabdlv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vaba_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vabav8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vaba_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vabav4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vaba_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vabav2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vaba_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vabav8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vaba_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vabav4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vaba_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vabav2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vabav16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vabav8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vabav4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vabaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vabav16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vabav8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vabav4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vabalv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vabalv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vabal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vabalv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vabal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vabalv8qi ((int16x8_t) __a, (int8x8_t) __b, (int8x8_t) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vabal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vabalv4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vabal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vabalv2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmax_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vmaxv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmax_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmaxv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmax_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmaxv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmax_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmaxv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmax_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vmaxv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmax_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmaxv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmax_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmaxv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmaxq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vmaxv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmaxq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmaxv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmaxq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmaxv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmaxq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmaxv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmaxq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vmaxv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmaxq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmaxv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmaxq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmaxv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmin_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vminv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmin_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vminv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmin_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vminv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmin_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vminv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmin_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vminv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmin_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vminv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmin_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vminv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vminq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vminv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vminq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vminv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vminq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vminv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vminq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vminv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vminq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vminv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vminq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vminv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vminq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vminv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpaddv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpaddv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpaddv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpadd_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpaddv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpaddv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpaddv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpaddl_s8 (int8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vpaddlv8qi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpaddl_s16 (int16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vpaddlv4hi (__a, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vpaddl_s32 (int32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vpaddlv2si (__a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpaddl_u8 (uint8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vpaddlv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpaddl_u16 (uint16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vpaddlv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vpaddl_u32 (uint32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vpaddlv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vpaddlq_s8 (int8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vpaddlv16qi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vpaddlq_s16 (int16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vpaddlv8hi (__a, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vpaddlq_s32 (int32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vpaddlv4si (__a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vpaddlq_u8 (uint8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vpaddlv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vpaddlq_u16 (uint16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vpaddlv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vpaddlq_u32 (uint32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vpaddlv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpadal_s8 (int16x4_t __a, int8x8_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpadalv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpadal_s16 (int32x2_t __a, int16x4_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpadalv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vpadal_s32 (int64x1_t __a, int32x2_t __b)
+{
+ return (int64x1_t)__builtin_neon_vpadalv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpadal_u8 (uint16x4_t __a, uint8x8_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpadalv8qi ((int16x4_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpadal_u16 (uint32x2_t __a, uint16x4_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpadalv4hi ((int32x2_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vpadal_u32 (uint64x1_t __a, uint32x2_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vpadalv2si ((int64x1_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vpadalq_s8 (int16x8_t __a, int8x16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vpadalv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vpadalq_s16 (int32x4_t __a, int16x8_t __b)
+{
+ return (int32x4_t)__builtin_neon_vpadalv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vpadalq_s32 (int64x2_t __a, int32x4_t __b)
+{
+ return (int64x2_t)__builtin_neon_vpadalv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vpadalq_u8 (uint16x8_t __a, uint8x16_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vpadalv16qi ((int16x8_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vpadalq_u16 (uint32x4_t __a, uint16x8_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vpadalv8hi ((int32x4_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vpadalq_u32 (uint64x2_t __a, uint32x4_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vpadalv4si ((int64x2_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpmax_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpmaxv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpmax_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpmaxv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpmax_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpmaxv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpmax_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpmaxv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpmax_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpmaxv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpmax_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpmaxv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpmax_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpmaxv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vpmin_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vpminv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vpmin_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vpminv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vpmin_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vpminv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vpmin_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vpminv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vpmin_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vpminv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vpmin_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vpminv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vpmin_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vpminv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrecps_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vrecpsv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrecpsq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vrecpsv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrsqrts_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x2_t)__builtin_neon_vrsqrtsv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrsqrtsq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return (float32x4_t)__builtin_neon_vrsqrtsv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vshlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vshlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vshlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vshldi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vshlv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vshlv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vshlv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vshldi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vshlv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vshlv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vshlv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vshlv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vshlv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vshlv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vshlv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vshlv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vshlv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vshlv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vshlv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vshldi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vshlv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vshlv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vshlv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vshldi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vshlv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vshlv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vshlv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vshlv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vshlv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vshlv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vshlv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vshlv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqshlv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqshlv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqshlv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqshldi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshldi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqshlv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqshlv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqshlv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqshlv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqrshl_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vqshlv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrshl_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqshlv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrshl_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqshlv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqrshl_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vqshldi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshl_u8 (uint8x8_t __a, int8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshl_u16 (uint16x4_t __a, int16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshl_u32 (uint32x2_t __a, int32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqrshl_u64 (uint64x1_t __a, int64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshldi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqrshlq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vqshlv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrshlq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqshlv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrshlq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqshlv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqrshlq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqshlv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqrshlq_u64 (uint64x2_t __a, int64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshr_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshr_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshr_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshr_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshr_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshr_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshr_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshr_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshr_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshr_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshr_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshr_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshr_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshr_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshr_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshr_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshrq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshr_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshrq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshr_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshrq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshr_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshrq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshr_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshrq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshr_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshrq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshr_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshrq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshr_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshrq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshr_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshr_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshr_nv8qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshr_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshr_nv4hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshr_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshr_nv2si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrshr_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshr_ndi (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshr_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshr_nv8qi ((int8x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshr_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshr_nv4hi ((int16x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshr_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshr_nv2si ((int32x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrshr_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshr_ndi ((int64x1_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrshrq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshr_nv16qi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrshrq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshr_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrshrq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshr_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrshrq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshr_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrshrq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshr_nv16qi ((int8x16_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrshrq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshr_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrshrq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshr_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrshrq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshr_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshrn_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshrn_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshrn_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshrn_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshrn_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshrn_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshrn_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshrn_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshrn_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshrn_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshrn_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshrn_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshrn_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshrn_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshrn_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrn_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrn_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrn_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqrshrn_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshrn_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrshrn_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshrn_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrshrn_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshrn_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshrn_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrn_nv8hi ((int16x8_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshrn_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrn_nv4si ((int32x4_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshrn_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrn_nv2di ((int64x2_t) __a, __b, 4);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshrun_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrun_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshrun_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrun_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshrun_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrun_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqrshrun_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshrun_nv8hi (__a, __b, 5);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqrshrun_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshrun_nv4si (__a, __b, 5);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqrshrun_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshrun_nv2di (__a, __b, 5);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vshl_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vshl_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vshl_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vshl_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vshl_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vshl_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vshl_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vshl_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vshl_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vshl_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vshl_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vshl_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vshl_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vshl_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vshl_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vshl_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vshlq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vshl_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshlq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshl_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshlq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshl_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshlq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshl_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vshlq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vshl_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshlq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshl_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshlq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshl_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshlq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshl_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqshl_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vqshl_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqshl_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vqshl_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqshl_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vqshl_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vqshl_n_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vqshl_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshl_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshl_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshl_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshl_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshl_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshl_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshl_n_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshl_ndi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqshlq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vqshl_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqshlq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vqshl_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqshlq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vqshl_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqshlq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vqshl_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshlq_n_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshl_nv16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshlq_n_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshl_nv8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshlq_n_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshl_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshlq_n_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshl_nv2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqshlu_n_s8 (int8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vqshlu_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqshlu_n_s16 (int16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vqshlu_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqshlu_n_s32 (int32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vqshlu_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vqshlu_n_s64 (int64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vqshlu_ndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vqshluq_n_s8 (int8x16_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vqshlu_nv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vqshluq_n_s16 (int16x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vqshlu_nv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vqshluq_n_s32 (int32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vqshlu_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vqshluq_n_s64 (int64x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vqshlu_nv2di (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vshll_n_s8 (int8x8_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vshll_nv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vshll_n_s16 (int16x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vshll_nv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vshll_n_s32 (int32x2_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vshll_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vshll_n_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vshll_nv8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vshll_n_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vshll_nv4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vshll_n_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vshll_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsra_nv8qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsra_nv4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsra_nv2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsra_ndi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsra_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsra_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsra_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsra_ndi ((int64x1_t) __a, (int64x1_t) __b, __c, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsra_nv16qi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsra_nv8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsra_nv4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsra_nv2di (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsra_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsra_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsra_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsra_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsra_nv8qi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsra_nv4hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsra_nv2si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vrsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsra_ndi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsra_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsra_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsra_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vrsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsra_ndi ((int64x1_t) __a, (int64x1_t) __b, __c, 4);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsra_nv16qi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsra_nv8hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsra_nv4si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vrsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsra_nv2di (__a, __b, __c, 5);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsra_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsra_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsra_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c, 4);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vrsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsra_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c, 4);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsri_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsri_nv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsri_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsri_nv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsri_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsri_nv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsri_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsri_ndi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsri_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsri_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsri_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsri_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsri_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsri_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsri_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsri_ndi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vsri_n_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vsri_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vsri_n_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vsri_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsri_nv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsriq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsri_nv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsriq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsri_nv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsriq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsri_nv2di (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsriq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsri_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsriq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsri_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsriq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsri_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsriq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsri_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsriq_n_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vsri_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsriq_n_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vsri_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vsli_n_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vsli_nv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vsli_n_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vsli_nv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vsli_n_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vsli_nv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vsli_n_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vsli_ndi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vsli_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vsli_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vsli_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vsli_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vsli_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vsli_nv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vsli_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vsli_ndi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vsli_n_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vsli_nv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vsli_n_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vsli_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vsli_nv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsliq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vsli_nv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsliq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vsli_nv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsliq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vsli_nv2di (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vsli_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vsli_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vsli_nv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsliq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vsli_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsliq_n_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vsli_nv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsliq_n_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vsli_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vabs_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vabsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vabs_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vabsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vabs_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vabsv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vabs_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vabsv2sf (__a, 3);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vabsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vabsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vabsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vabsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vabsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vabsv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vabsq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vabsv4sf (__a, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqabs_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqabsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqabs_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqabsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqabs_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqabsv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqabsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vqabsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqabsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vqabsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqabsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vqabsv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vneg_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vnegv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vneg_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vnegv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vneg_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vnegv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vneg_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vnegv2sf (__a, 3);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vnegq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vnegv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vnegq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vnegv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vnegq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vnegv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vnegq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vnegv4sf (__a, 3);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqneg_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqnegv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqneg_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqnegv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqneg_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqnegv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vqnegq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vqnegv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqnegq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vqnegv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqnegq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vqnegv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmvn_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vmvnv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmvn_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vmvnv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmvn_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vmvnv2si (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmvn_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vmvnv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmvn_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vmvnv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmvn_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vmvnv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmvn_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vmvnv8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmvnq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vmvnv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmvnq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vmvnv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmvnq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vmvnv4si (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmvnq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vmvnv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmvnq_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vmvnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmvnq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vmvnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmvnq_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vmvnv16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcls_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vclsv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcls_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vclsv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcls_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vclsv2si (__a, 1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vclsq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vclsv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vclsq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vclsv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vclsq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vclsv4si (__a, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vclz_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vclzv8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vclz_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vclzv4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vclz_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vclzv2si (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vclz_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vclzv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vclz_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vclzv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vclz_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vclzv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vclzq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vclzv16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vclzq_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vclzv8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vclzq_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vclzv4si (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vclzq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vclzv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vclzq_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vclzv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vclzq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vclzv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcnt_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vcntv8qi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcnt_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vcntv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcnt_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vcntv8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcntq_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vcntv16qi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcntq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vcntv16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcntq_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vcntv16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrecpe_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrecpev2sf (__a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrecpe_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrecpev2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrecpeq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrecpev4sf (__a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrecpeq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrecpev4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrsqrte_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrsqrtev2sf (__a, 3);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrsqrte_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrsqrtev2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrsqrteq_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrsqrtev4sf (__a, 3);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrsqrteq_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrsqrtev4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vget_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8_t)__builtin_neon_vget_lanev8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vget_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16_t)__builtin_neon_vget_lanev4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vget_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32_t)__builtin_neon_vget_lanev2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32_t __attribute__ ((__always_inline__))
+vget_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32_t)__builtin_neon_vget_lanev2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vget_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8_t)__builtin_neon_vget_lanev8qi ((int8x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vget_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16_t)__builtin_neon_vget_lanev4hi ((int16x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vget_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32_t)__builtin_neon_vget_lanev2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline poly8_t __attribute__ ((__always_inline__))
+vget_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8_t)__builtin_neon_vget_lanev8qi ((int8x8_t) __a, __b, 2);
+}
+
+__extension__ static __inline poly16_t __attribute__ ((__always_inline__))
+vget_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16_t)__builtin_neon_vget_lanev4hi ((int16x4_t) __a, __b, 2);
+}
+
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vget_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64_t)__builtin_neon_vget_lanedi (__a, __b, 1);
+}
+
+__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+vget_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64_t)__builtin_neon_vget_lanedi ((int64x1_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vgetq_lane_s8 (int8x16_t __a, const int __b)
+{
+ return (int8_t)__builtin_neon_vget_lanev16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vgetq_lane_s16 (int16x8_t __a, const int __b)
+{
+ return (int16_t)__builtin_neon_vget_lanev8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vgetq_lane_s32 (int32x4_t __a, const int __b)
+{
+ return (int32_t)__builtin_neon_vget_lanev4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32_t __attribute__ ((__always_inline__))
+vgetq_lane_f32 (float32x4_t __a, const int __b)
+{
+ return (float32_t)__builtin_neon_vget_lanev4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vgetq_lane_u8 (uint8x16_t __a, const int __b)
+{
+ return (uint8_t)__builtin_neon_vget_lanev16qi ((int8x16_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vgetq_lane_u16 (uint16x8_t __a, const int __b)
+{
+ return (uint16_t)__builtin_neon_vget_lanev8hi ((int16x8_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vgetq_lane_u32 (uint32x4_t __a, const int __b)
+{
+ return (uint32_t)__builtin_neon_vget_lanev4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline poly8_t __attribute__ ((__always_inline__))
+vgetq_lane_p8 (poly8x16_t __a, const int __b)
+{
+ return (poly8_t)__builtin_neon_vget_lanev16qi ((int8x16_t) __a, __b, 2);
+}
+
+__extension__ static __inline poly16_t __attribute__ ((__always_inline__))
+vgetq_lane_p16 (poly16x8_t __a, const int __b)
+{
+ return (poly16_t)__builtin_neon_vget_lanev8hi ((int16x8_t) __a, __b, 2);
+}
+
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vgetq_lane_s64 (int64x2_t __a, const int __b)
+{
+ return (int64_t)__builtin_neon_vget_lanev2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+vgetq_lane_u64 (uint64x2_t __a, const int __b)
+{
+ return (uint64_t)__builtin_neon_vget_lanev2di ((int64x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vset_lane_s8 (int8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vset_lane_s16 (int16_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vset_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vset_lanev2si ((__builtin_neon_si) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vset_lane_f32 (float32_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vset_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vset_lane_u8 (uint8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vset_lane_u16 (uint16_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vset_lane_u32 (uint32_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vset_lanev2si ((__builtin_neon_si) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vset_lane_p8 (poly8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vset_lanev8qi ((__builtin_neon_qi) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vset_lane_p16 (poly16_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vset_lanev4hi ((__builtin_neon_hi) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vset_lane_s64 (int64_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vset_lanedi ((__builtin_neon_di) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vset_lane_u64 (uint64_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vset_lanedi ((__builtin_neon_di) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_s8 (int8_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_s16 (int16_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vset_lanev4si ((__builtin_neon_si) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vset_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_u8 (uint8_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_u16 (uint16_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vsetq_lane_u32 (uint32_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vset_lanev4si ((__builtin_neon_si) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vsetq_lane_p8 (poly8_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vset_lanev16qi ((__builtin_neon_qi) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vsetq_lane_p16 (poly16_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vset_lanev8hi ((__builtin_neon_hi) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vsetq_lane_s64 (int64_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vset_lanev2di ((__builtin_neon_di) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vsetq_lane_u64 (uint64_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vset_lanev2di ((__builtin_neon_di) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcreate_s8 (uint64_t __a)
+{
+ return (int8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcreate_s16 (uint64_t __a)
+{
+ return (int16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcreate_s32 (uint64_t __a)
+{
+ return (int32x2_t)__builtin_neon_vcreatev2si ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vcreate_s64 (uint64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcreate_f32 (uint64_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcreatev2sf ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcreate_u8 (uint64_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcreate_u16 (uint64_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcreate_u32 (uint64_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vcreatev2si ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vcreate_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcreate_p8 (uint64_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vcreatev8qi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vcreate_p16 (uint64_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vcreatev4hi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vdup_n_s8 (int8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vdup_n_s16 (int16_t __a)
+{
+ return (int16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vdup_n_s32 (int32_t __a)
+{
+ return (int32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vdup_n_f32 (float32_t __a)
+{
+ return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vdup_n_u8 (uint8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vdup_n_u16 (uint16_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vdup_n_u32 (uint32_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vdup_n_p8 (poly8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vdup_n_p16 (poly16_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vdup_n_s64 (int64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vdup_n_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vdupq_n_s8 (int8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vdupq_n_s16 (int16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vdupq_n_s32 (int32_t __a)
+{
+ return (int32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vdupq_n_f32 (float32_t __a)
+{
+ return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vdupq_n_u8 (uint8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vdupq_n_u16 (uint16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vdupq_n_u32 (uint32_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vdupq_n_p8 (poly8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vdupq_n_p16 (poly16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vdupq_n_s64 (int64_t __a)
+{
+ return (int64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vdupq_n_u64 (uint64_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmov_n_s8 (int8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmov_n_s16 (int16_t __a)
+{
+ return (int16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmov_n_s32 (int32_t __a)
+{
+ return (int32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmov_n_f32 (float32_t __a)
+{
+ return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmov_n_u8 (uint8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmov_n_u16 (uint16_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmov_n_u32 (uint32_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vdup_nv2si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vmov_n_p8 (poly8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vdup_nv8qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vmov_n_p16 (poly16_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vmov_n_s64 (int64_t __a)
+{
+ return (int64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vmov_n_u64 (uint64_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vmovq_n_s8 (int8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmovq_n_s16 (int16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmovq_n_s32 (int32_t __a)
+{
+ return (int32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmovq_n_f32 (float32_t __a)
+{
+ return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vmovq_n_u8 (uint8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmovq_n_u16 (uint16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmovq_n_u32 (uint32_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vdup_nv4si ((__builtin_neon_si) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vmovq_n_p8 (poly8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vdup_nv16qi ((__builtin_neon_qi) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vmovq_n_p16 (poly16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vdup_nv8hi ((__builtin_neon_hi) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmovq_n_s64 (int64_t __a)
+{
+ return (int64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmovq_n_u64 (uint64_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vdup_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x8_t)__builtin_neon_vdup_lanev8qi (__a, __b);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vdup_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x4_t)__builtin_neon_vdup_lanev4hi (__a, __b);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vdup_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vdup_lanev2si (__a, __b);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vdup_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vdup_lanev2sf (__a, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vdup_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x8_t)__builtin_neon_vdup_lanev8qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vdup_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x4_t)__builtin_neon_vdup_lanev4hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vdup_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vdup_lanev2si ((int32x2_t) __a, __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vdup_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8x8_t)__builtin_neon_vdup_lanev8qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vdup_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16x4_t)__builtin_neon_vdup_lanev4hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vdup_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x1_t)__builtin_neon_vdup_lanedi (__a, __b);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vdup_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x1_t)__builtin_neon_vdup_lanedi ((int64x1_t) __a, __b);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_s8 (int8x8_t __a, const int __b)
+{
+ return (int8x16_t)__builtin_neon_vdup_lanev16qi (__a, __b);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_s16 (int16x4_t __a, const int __b)
+{
+ return (int16x8_t)__builtin_neon_vdup_lanev8hi (__a, __b);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_s32 (int32x2_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vdup_lanev4si (__a, __b);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_f32 (float32x2_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vdup_lanev4sf (__a, __b);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_u8 (uint8x8_t __a, const int __b)
+{
+ return (uint8x16_t)__builtin_neon_vdup_lanev16qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_u16 (uint16x4_t __a, const int __b)
+{
+ return (uint16x8_t)__builtin_neon_vdup_lanev8hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vdupq_lane_u32 (uint32x2_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vdup_lanev4si ((int32x2_t) __a, __b);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vdupq_lane_p8 (poly8x8_t __a, const int __b)
+{
+ return (poly8x16_t)__builtin_neon_vdup_lanev16qi ((int8x8_t) __a, __b);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vdupq_lane_p16 (poly16x4_t __a, const int __b)
+{
+ return (poly16x8_t)__builtin_neon_vdup_lanev8hi ((int16x4_t) __a, __b);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vdupq_lane_s64 (int64x1_t __a, const int __b)
+{
+ return (int64x2_t)__builtin_neon_vdup_lanev2di (__a, __b);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vdupq_lane_u64 (uint64x1_t __a, const int __b)
+{
+ return (uint64x2_t)__builtin_neon_vdup_lanev2di ((int64x1_t) __a, __b);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcombine_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x16_t)__builtin_neon_vcombinev8qi (__a, __b);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vcombine_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x8_t)__builtin_neon_vcombinev4hi (__a, __b);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcombine_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x4_t)__builtin_neon_vcombinev2si (__a, __b);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vcombine_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x2_t)__builtin_neon_vcombinedi (__a, __b);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcombine_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return (float32x4_t)__builtin_neon_vcombinev2sf (__a, __b);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcombine_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vcombinev8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcombine_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vcombinev4hi ((int16x4_t) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcombine_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vcombinev2si ((int32x2_t) __a, (int32x2_t) __b);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vcombine_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vcombinedi ((int64x1_t) __a, (int64x1_t) __b);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcombine_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ return (poly8x16_t)__builtin_neon_vcombinev8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vcombine_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ return (poly16x8_t)__builtin_neon_vcombinev4hi ((int16x4_t) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vget_high_s8 (int8x16_t __a)
+{
+ return (int8x8_t)__builtin_neon_vget_highv16qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vget_high_s16 (int16x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vget_highv8hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vget_high_s32 (int32x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vget_highv4si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vget_high_s64 (int64x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vget_highv2di (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vget_high_f32 (float32x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vget_highv4sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vget_high_u8 (uint8x16_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vget_highv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vget_high_u16 (uint16x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vget_highv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vget_high_u32 (uint32x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vget_highv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vget_high_u64 (uint64x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vget_highv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vget_high_p8 (poly8x16_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vget_highv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vget_high_p16 (poly16x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vget_highv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vget_low_s8 (int8x16_t __a)
+{
+ return (int8x8_t)__builtin_neon_vget_lowv16qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vget_low_s16 (int16x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vget_lowv8hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vget_low_s32 (int32x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vget_lowv4si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vget_low_s64 (int64x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vget_lowv2di (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vget_low_f32 (float32x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vget_lowv4sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vget_low_u8 (uint8x16_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vget_lowv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vget_low_u16 (uint16x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vget_low_u32 (uint32x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vget_lowv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vget_low_u64 (uint64x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vget_lowv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vget_low_p8 (poly8x16_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vget_lowv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vget_low_p16 (poly16x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvt_s32_f32 (float32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vcvtv2sf (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_f32_s32 (int32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcvtv2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_f32_u32 (uint32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vcvtv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvt_u32_f32 (float32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vcvtv2sf (__a, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtq_s32_f32 (float32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vcvtv4sf (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_f32_s32 (int32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vcvtv4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_f32_u32 (uint32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vcvtv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtq_u32_f32 (float32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vcvtv4sf (__a, 0);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvt_n_s32_f32 (float32x2_t __a, const int __b)
+{
+ return (int32x2_t)__builtin_neon_vcvt_nv2sf (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_n_f32_s32 (int32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vcvt_nv2si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcvt_n_f32_u32 (uint32x2_t __a, const int __b)
+{
+ return (float32x2_t)__builtin_neon_vcvt_nv2si ((int32x2_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvt_n_u32_f32 (float32x2_t __a, const int __b)
+{
+ return (uint32x2_t)__builtin_neon_vcvt_nv2sf (__a, __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_s32_f32 (float32x4_t __a, const int __b)
+{
+ return (int32x4_t)__builtin_neon_vcvt_nv4sf (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_f32_s32 (int32x4_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vcvt_nv4si (__a, __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_f32_u32 (uint32x4_t __a, const int __b)
+{
+ return (float32x4_t)__builtin_neon_vcvt_nv4si ((int32x4_t) __a, __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtq_n_u32_f32 (float32x4_t __a, const int __b)
+{
+ return (uint32x4_t)__builtin_neon_vcvt_nv4sf (__a, __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vmovn_s16 (int16x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vmovnv8hi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmovn_s32 (int32x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vmovnv4si (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmovn_s64 (int64x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vmovnv2di (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vmovn_u16 (uint16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vmovnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmovn_u32 (uint32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vmovnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmovn_u64 (uint64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vmovnv2di ((int64x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vqmovn_s16 (int16x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vqmovnv8hi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqmovn_s32 (int32x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vqmovnv4si (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqmovn_s64 (int64x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vqmovnv2di (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqmovn_u16 (uint16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vqmovnv8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqmovn_u32 (uint32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vqmovnv4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqmovn_u64 (uint64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vqmovnv2di ((int64x2_t) __a, 0);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vqmovun_s16 (int16x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vqmovunv8hi (__a, 1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vqmovun_s32 (int32x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vqmovunv4si (__a, 1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vqmovun_s64 (int64x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vqmovunv2di (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmovl_s8 (int8x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vmovlv8qi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmovl_s16 (int16x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vmovlv4hi (__a, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmovl_s32 (int32x2_t __a)
+{
+ return (int64x2_t)__builtin_neon_vmovlv2si (__a, 1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmovl_u8 (uint8x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vmovlv8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmovl_u16 (uint16x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vmovlv4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmovl_u32 (uint32x2_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vmovlv2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl1_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vtbl1v8qi (__a, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl1_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vtbl1v8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl1_p8 (poly8x8_t __a, uint8x8_t __b)
+{
+ return (poly8x8_t)__builtin_neon_vtbl1v8qi ((int8x8_t) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl2_s8 (int8x8x2_t __a, int8x8_t __b)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl2_u8 (uint8x8x2_t __a, uint8x8_t __b)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl2_p8 (poly8x8x2_t __a, uint8x8_t __b)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl2v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl3_s8 (int8x8x3_t __a, int8x8_t __b)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl3_u8 (uint8x8x3_t __a, uint8x8_t __b)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl3_p8 (poly8x8x3_t __a, uint8x8_t __b)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl3v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbl4_s8 (int8x8x4_t __a, int8x8_t __b)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (int8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, __b);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbl4_u8 (uint8x8x4_t __a, uint8x8_t __b)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (uint8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbl4_p8 (poly8x8x4_t __a, uint8x8_t __b)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __au = { __a };
+ return (poly8x8_t)__builtin_neon_vtbl4v8qi (__au.__o, (int8x8_t) __b);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx1_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vtbx1v8qi (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx1_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vtbx1v8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx1_p8 (poly8x8_t __a, poly8x8_t __b, uint8x8_t __c)
+{
+ return (poly8x8_t)__builtin_neon_vtbx1v8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx2_s8 (int8x8_t __a, int8x8x2_t __b, int8x8_t __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx2v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx2_u8 (uint8x8_t __a, uint8x8x2_t __b, uint8x8_t __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx2v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx2_p8 (poly8x8_t __a, poly8x8x2_t __b, uint8x8_t __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx2v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx3_s8 (int8x8_t __a, int8x8x3_t __b, int8x8_t __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx3v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx3_u8 (uint8x8_t __a, uint8x8x3_t __b, uint8x8_t __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx3v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx3_p8 (poly8x8_t __a, poly8x8x3_t __b, uint8x8_t __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx3v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vtbx4_s8 (int8x8_t __a, int8x8x4_t __b, int8x8_t __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (int8x8_t)__builtin_neon_vtbx4v8qi (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vtbx4_u8 (uint8x8_t __a, uint8x8x4_t __b, uint8x8_t __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (uint8x8_t)__builtin_neon_vtbx4v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vtbx4_p8 (poly8x8_t __a, poly8x8x4_t __b, uint8x8_t __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ return (poly8x8_t)__builtin_neon_vtbx4v8qi ((int8x8_t) __a, __bu.__o, (int8x8_t) __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vmul_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vmul_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_lane_f32 (float32x2_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vmul_lanev2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_lane_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vmul_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_lane_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vmul_lanev2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vmul_lanev8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vmul_lanev4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_f32 (float32x4_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vmul_lanev4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_lane_u16 (uint16x8_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vmul_lanev8hi ((int16x8_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_lane_u32 (uint32x4_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vmul_lanev4si ((int32x4_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x4_t)__builtin_neon_vmla_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x2_t)__builtin_neon_vmla_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_lane_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x2_t)__builtin_neon_vmla_lanev2sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_lane_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x4_t)__builtin_neon_vmla_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_lane_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x2_t)__builtin_neon_vmla_lanev2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x8_t)__builtin_neon_vmla_lanev8hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmla_lanev4si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_f32 (float32x4_t __a, float32x4_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x4_t)__builtin_neon_vmla_lanev4sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_lane_u16 (uint16x8_t __a, uint16x8_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x8_t)__builtin_neon_vmla_lanev8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_lane_u32 (uint32x4_t __a, uint32x4_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmla_lanev4si ((int32x4_t) __a, (int32x4_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmlal_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vmlal_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_lane_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmlal_lanev4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_lane_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint64x2_t)__builtin_neon_vmlal_lanev2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vqdmlal_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vqdmlal_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x4_t)__builtin_neon_vmls_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x2_t)__builtin_neon_vmls_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_lane_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x2_t)__builtin_neon_vmls_lanev2sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_lane_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x4_t)__builtin_neon_vmls_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_lane_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x2_t)__builtin_neon_vmls_lanev2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
+{
+ return (int16x8_t)__builtin_neon_vmls_lanev8hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmls_lanev4si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_f32 (float32x4_t __a, float32x4_t __b, float32x2_t __c, const int __d)
+{
+ return (float32x4_t)__builtin_neon_vmls_lanev4sf (__a, __b, __c, __d, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_lane_u16 (uint16x8_t __a, uint16x8_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint16x8_t)__builtin_neon_vmls_lanev8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_lane_u32 (uint32x4_t __a, uint32x4_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmls_lanev4si ((int32x4_t) __a, (int32x4_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vmlsl_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vmlsl_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_lane_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c, const int __d)
+{
+ return (uint32x4_t)__builtin_neon_vmlsl_lanev4hi ((int32x4_t) __a, (int16x4_t) __b, (int16x4_t) __c, __d, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_lane_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c, const int __d)
+{
+ return (uint64x2_t)__builtin_neon_vmlsl_lanev2si ((int64x2_t) __a, (int32x2_t) __b, (int32x2_t) __c, __d, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
+{
+ return (int32x4_t)__builtin_neon_vqdmlsl_lanev4hi (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
+{
+ return (int64x2_t)__builtin_neon_vqdmlsl_lanev2si (__a, __b, __c, __d, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vmull_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vmull_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_lane_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vmull_lanev4hi ((int16x4_t) __a, (int16x4_t) __b, __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_lane_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vmull_lanev2si ((int32x2_t) __a, (int32x2_t) __b, __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmull_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmull_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_lanev8hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_lanev4si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_lanev4hi (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_lanev2si (__a, __b, __c, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_lanev8hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_lanev4si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_lanev4hi (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_lanev2si (__a, __b, __c, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmul_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vmul_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmul_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vmul_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmul_n_f32 (float32x2_t __a, float32_t __b)
+{
+ return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmul_n_u16 (uint16x4_t __a, uint16_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vmul_nv4hi ((int16x4_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmul_n_u32 (uint32x2_t __a, uint32_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vmul_nv2si ((int32x2_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmulq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vmul_nv8hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmulq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmul_nv4si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmulq_n_f32 (float32x4_t __a, float32_t __b)
+{
+ return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, __b, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmulq_n_u16 (uint16x8_t __a, uint16_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vmul_nv8hi ((int16x8_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmulq_n_u32 (uint32x4_t __a, uint32_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmul_nv4si ((int32x4_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmull_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int32x4_t)__builtin_neon_vmull_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmull_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int64x2_t)__builtin_neon_vmull_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmull_n_u16 (uint16x4_t __a, uint16_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vmull_nv4hi ((int16x4_t) __a, (__builtin_neon_hi) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmull_n_u32 (uint32x2_t __a, uint32_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vmull_nv2si ((int32x2_t) __a, (__builtin_neon_si) __b, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmull_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmull_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmull_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int64x2_t)__builtin_neon_vqdmull_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_nv8hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_nv4si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqdmulh_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_nv4hi (__a, (__builtin_neon_hi) __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqdmulh_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_nv2si (__a, (__builtin_neon_si) __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vqrdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return (int16x8_t)__builtin_neon_vqdmulh_nv8hi (__a, (__builtin_neon_hi) __b, 5);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqrdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return (int32x4_t)__builtin_neon_vqdmulh_nv4si (__a, (__builtin_neon_si) __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vqrdmulh_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return (int16x4_t)__builtin_neon_vqdmulh_nv4hi (__a, (__builtin_neon_hi) __b, 5);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vqrdmulh_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return (int32x2_t)__builtin_neon_vqdmulh_nv2si (__a, (__builtin_neon_si) __b, 5);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmla_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmla_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmla_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmla_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmla_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmla_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmla_nv4hi ((int16x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmla_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmla_nv2si ((int32x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlaq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmla_nv8hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmla_nv4si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlaq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmla_nv8hi ((int16x8_t) __a, (int16x8_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlaq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmla_nv4si ((int32x4_t) __a, (int32x4_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlal_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlal_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlal_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlal_nv4hi ((int32x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlal_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlal_nv2si ((int64x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlal_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlal_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vmls_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int16x4_t)__builtin_neon_vmls_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vmls_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int32x2_t)__builtin_neon_vmls_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vmls_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+ return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vmls_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vmls_nv4hi ((int16x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vmls_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vmls_nv2si ((int32x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vmlsq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+{
+ return (int16x8_t)__builtin_neon_vmls_nv8hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmls_nv4si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+ return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, __c, 3);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vmlsq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vmls_nv8hi ((int16x8_t) __a, (int16x8_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmls_nv4si ((int32x4_t) __a, (int32x4_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vmlsl_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vmlsl_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vmlsl_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vmlsl_nv4hi ((int32x4_t) __a, (int16x4_t) __b, (__builtin_neon_hi) __c, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vmlsl_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vmlsl_nv2si ((int64x2_t) __a, (int32x2_t) __b, (__builtin_neon_si) __c, 0);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return (int32x4_t)__builtin_neon_vqdmlsl_nv4hi (__a, __b, (__builtin_neon_hi) __c, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return (int64x2_t)__builtin_neon_vqdmlsl_nv2si (__a, __b, (__builtin_neon_si) __c, 1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vext_s8 (int8x8_t __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vextv8qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vext_s16 (int16x4_t __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vextv4hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vext_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vextv2si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vext_s64 (int64x1_t __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vextdi (__a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vext_f32 (float32x2_t __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vextv2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vext_u8 (uint8x8_t __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vextv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vext_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vextv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vext_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vextv2si ((int32x2_t) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vext_u64 (uint64x1_t __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vextdi ((int64x1_t) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vext_p8 (poly8x8_t __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vextv8qi ((int8x8_t) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vext_p16 (poly16x4_t __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vextv4hi ((int16x4_t) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vextq_s8 (int8x16_t __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vextv16qi (__a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vextq_s16 (int16x8_t __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vextv8hi (__a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vextq_s32 (int32x4_t __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vextv4si (__a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vextq_s64 (int64x2_t __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vextv2di (__a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vextq_f32 (float32x4_t __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vextv4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vextq_u8 (uint8x16_t __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vextv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vextq_u16 (uint16x8_t __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vextv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vextq_u32 (uint32x4_t __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vextv4si ((int32x4_t) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vextq_u64 (uint64x2_t __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vextv2di ((int64x2_t) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vextq_p8 (poly8x16_t __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vextv16qi ((int8x16_t) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vextq_p16 (poly16x8_t __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vextv8hi ((int16x8_t) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev64_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev64v8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrev64_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vrev64v4hi (__a, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vrev64_s32 (int32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vrev64v2si (__a, 1);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vrev64_f32 (float32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vrev64v2sf (__a, 3);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev64_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev64v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrev64_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vrev64v4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vrev64_u32 (uint32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vrev64v2si ((int32x2_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev64_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev64v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vrev64_p16 (poly16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vrev64v4hi ((int16x4_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev64q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev64v16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrev64q_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vrev64v8hi (__a, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vrev64q_s32 (int32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vrev64v4si (__a, 1);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vrev64q_f32 (float32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vrev64v4sf (__a, 3);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev64q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev64v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrev64q_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vrev64v8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vrev64q_u32 (uint32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vrev64v4si ((int32x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev64q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev64v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vrev64q_p16 (poly16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vrev64v8hi ((int16x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev32_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev32v8qi (__a, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vrev32_s16 (int16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vrev32v4hi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev32_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev32v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vrev32_u16 (uint16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vrev32v4hi ((int16x4_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev32_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev32v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vrev32_p16 (poly16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vrev32v4hi ((int16x4_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev32q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev32v16qi (__a, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vrev32q_s16 (int16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vrev32v8hi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev32q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev32v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vrev32q_u16 (uint16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vrev32v8hi ((int16x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev32q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev32v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vrev32q_p16 (poly16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vrev32v8hi ((int16x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrev16_s8 (int8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vrev16v8qi (__a, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrev16_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vrev16v8qi ((int8x8_t) __a, 0);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrev16_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vrev16v8qi ((int8x8_t) __a, 2);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrev16q_s8 (int8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vrev16v16qi (__a, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrev16q_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vrev16v16qi ((int8x16_t) __a, 0);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrev16q_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vrev16v16qi ((int8x16_t) __a, 2);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vbsl_s8 (uint8x8_t __a, int8x8_t __b, int8x8_t __c)
+{
+ return (int8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vbsl_s16 (uint16x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return (int16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vbsl_s32 (uint32x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return (int32x2_t)__builtin_neon_vbslv2si ((int32x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vbsl_s64 (uint64x1_t __a, int64x1_t __b, int64x1_t __c)
+{
+ return (int64x1_t)__builtin_neon_vbsldi ((int64x1_t) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vbsl_f32 (uint32x2_t __a, float32x2_t __b, float32x2_t __c)
+{
+ return (float32x2_t)__builtin_neon_vbslv2sf ((int32x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vbsl_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
+{
+ return (uint8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vbsl_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
+{
+ return (uint16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vbsl_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
+{
+ return (uint32x2_t)__builtin_neon_vbslv2si ((int32x2_t) __a, (int32x2_t) __b, (int32x2_t) __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vbsl_u64 (uint64x1_t __a, uint64x1_t __b, uint64x1_t __c)
+{
+ return (uint64x1_t)__builtin_neon_vbsldi ((int64x1_t) __a, (int64x1_t) __b, (int64x1_t) __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vbsl_p8 (uint8x8_t __a, poly8x8_t __b, poly8x8_t __c)
+{
+ return (poly8x8_t)__builtin_neon_vbslv8qi ((int8x8_t) __a, (int8x8_t) __b, (int8x8_t) __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vbsl_p16 (uint16x4_t __a, poly16x4_t __b, poly16x4_t __c)
+{
+ return (poly16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vbslq_s8 (uint8x16_t __a, int8x16_t __b, int8x16_t __c)
+{
+ return (int8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vbslq_s16 (uint16x8_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return (int16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vbslq_s32 (uint32x4_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return (int32x4_t)__builtin_neon_vbslv4si ((int32x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vbslq_s64 (uint64x2_t __a, int64x2_t __b, int64x2_t __c)
+{
+ return (int64x2_t)__builtin_neon_vbslv2di ((int64x2_t) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vbslq_f32 (uint32x4_t __a, float32x4_t __b, float32x4_t __c)
+{
+ return (float32x4_t)__builtin_neon_vbslv4sf ((int32x4_t) __a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vbslq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
+{
+ return (uint8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vbslq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
+{
+ return (uint16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vbslq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
+{
+ return (uint32x4_t)__builtin_neon_vbslv4si ((int32x4_t) __a, (int32x4_t) __b, (int32x4_t) __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c)
+{
+ return (uint64x2_t)__builtin_neon_vbslv2di ((int64x2_t) __a, (int64x2_t) __b, (int64x2_t) __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vbslq_p8 (uint8x16_t __a, poly8x16_t __b, poly8x16_t __c)
+{
+ return (poly8x16_t)__builtin_neon_vbslv16qi ((int8x16_t) __a, (int8x16_t) __b, (int8x16_t) __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vbslq_p16 (uint16x8_t __a, poly16x8_t __b, poly16x8_t __c)
+{
+ return (poly16x8_t)__builtin_neon_vbslv8hi ((int16x8_t) __a, (int16x8_t) __b, (int16x8_t) __c);
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vtrn_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vtrn_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vtrn_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vtrnv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vtrn_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vtrnv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vtrn_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vtrn_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vtrn_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vtrnv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vtrn_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vtrnv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vtrn_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vtrnv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vtrnv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vtrnv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vtrnq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vtrnv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vtrnq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vtrnv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vtrnq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vtrnv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vzip_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vzipv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vzip_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vzipv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vzip_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vzipv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vzip_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vzipv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vzip_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vzipv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vzip_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vzipv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vzip_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vzipv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vzip_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vzipv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vzip_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vzipv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vzipq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vzipv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vzipq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vzipv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vzipq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vzipv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vzipq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vzipv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vzipq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vzipv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vzipq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vzipv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vzipq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vzipv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vzipq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vzipv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vzipq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vzipv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vuzp_s8 (int8x8_t __a, int8x8_t __b)
+{
+ int8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vuzp_s16 (int16x4_t __a, int16x4_t __b)
+{
+ int16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vuzp_s32 (int32x2_t __a, int32x2_t __b)
+{
+ int32x2x2_t __rv;
+ __builtin_neon_vuzpv2si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vuzp_f32 (float32x2_t __a, float32x2_t __b)
+{
+ float32x2x2_t __rv;
+ __builtin_neon_vuzpv2sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vuzp_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ uint8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vuzp_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ uint16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vuzp_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ uint32x2x2_t __rv;
+ __builtin_neon_vuzpv2si ((int32x2_t *) &__rv.val[0], (int32x2_t) __a, (int32x2_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vuzp_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+ poly8x8x2_t __rv;
+ __builtin_neon_vuzpv8qi ((int8x8_t *) &__rv.val[0], (int8x8_t) __a, (int8x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vuzp_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+ poly16x4x2_t __rv;
+ __builtin_neon_vuzpv4hi ((int16x4_t *) &__rv.val[0], (int16x4_t) __a, (int16x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ int8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ int16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ int32x4x2_t __rv;
+ __builtin_neon_vuzpv4si (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ float32x4x2_t __rv;
+ __builtin_neon_vuzpv4sf (&__rv.val[0], __a, __b);
+ return __rv;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ uint8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ uint16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vuzpq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ uint32x4x2_t __rv;
+ __builtin_neon_vuzpv4si ((int32x4_t *) &__rv.val[0], (int32x4_t) __a, (int32x4_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vuzpq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+ poly8x16x2_t __rv;
+ __builtin_neon_vuzpv16qi ((int8x16_t *) &__rv.val[0], (int8x16_t) __a, (int8x16_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vuzpq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+ poly16x8x2_t __rv;
+ __builtin_neon_vuzpv8hi ((int16x8_t *) &__rv.val[0], (int16x8_t) __a, (int16x8_t) __b);
+ return __rv;
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_s8 (const int8_t * __a)
+{
+ return (int8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_s16 (const int16_t * __a)
+{
+ return (int16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_s32 (const int32_t * __a)
+{
+ return (int32x2_t)__builtin_neon_vld1v2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_s64 (const int64_t * __a)
+{
+ return (int64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_f32 (const float32_t * __a)
+{
+ return (float32x2_t)__builtin_neon_vld1v2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_u8 (const uint8_t * __a)
+{
+ return (uint8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_u16 (const uint16_t * __a)
+{
+ return (uint16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_u32 (const uint32_t * __a)
+{
+ return (uint32x2_t)__builtin_neon_vld1v2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_u64 (const uint64_t * __a)
+{
+ return (uint64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_p8 (const poly8_t * __a)
+{
+ return (poly8x8_t)__builtin_neon_vld1v8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_p16 (const poly16_t * __a)
+{
+ return (poly16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_s8 (const int8_t * __a)
+{
+ return (int8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_s16 (const int16_t * __a)
+{
+ return (int16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_s32 (const int32_t * __a)
+{
+ return (int32x4_t)__builtin_neon_vld1v4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_s64 (const int64_t * __a)
+{
+ return (int64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_f32 (const float32_t * __a)
+{
+ return (float32x4_t)__builtin_neon_vld1v4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_u8 (const uint8_t * __a)
+{
+ return (uint8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_u16 (const uint16_t * __a)
+{
+ return (uint16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_u32 (const uint32_t * __a)
+{
+ return (uint32x4_t)__builtin_neon_vld1v4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_u64 (const uint64_t * __a)
+{
+ return (uint64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_p8 (const poly8_t * __a)
+{
+ return (poly8x16_t)__builtin_neon_vld1v16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_p16 (const poly16_t * __a)
+{
+ return (poly16x8_t)__builtin_neon_vld1v8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_lane_s8 (const int8_t * __a, int8x8_t __b, const int __c)
+{
+ return (int8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_lane_s16 (const int16_t * __a, int16x4_t __b, const int __c)
+{
+ return (int16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_lane_s32 (const int32_t * __a, int32x2_t __b, const int __c)
+{
+ return (int32x2_t)__builtin_neon_vld1_lanev2si ((const __builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_lane_f32 (const float32_t * __a, float32x2_t __b, const int __c)
+{
+ return (float32x2_t)__builtin_neon_vld1_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_lane_u8 (const uint8_t * __a, uint8x8_t __b, const int __c)
+{
+ return (uint8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_lane_u16 (const uint16_t * __a, uint16x4_t __b, const int __c)
+{
+ return (uint16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_lane_u32 (const uint32_t * __a, uint32x2_t __b, const int __c)
+{
+ return (uint32x2_t)__builtin_neon_vld1_lanev2si ((const __builtin_neon_si *) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_lane_p8 (const poly8_t * __a, poly8x8_t __b, const int __c)
+{
+ return (poly8x8_t)__builtin_neon_vld1_lanev8qi ((const __builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_lane_p16 (const poly16_t * __a, poly16x4_t __b, const int __c)
+{
+ return (poly16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_lane_s64 (const int64_t * __a, int64x1_t __b, const int __c)
+{
+ return (int64x1_t)__builtin_neon_vld1_lanedi ((const __builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_lane_u64 (const uint64_t * __a, uint64x1_t __b, const int __c)
+{
+ return (uint64x1_t)__builtin_neon_vld1_lanedi ((const __builtin_neon_di *) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_s8 (const int8_t * __a, int8x16_t __b, const int __c)
+{
+ return (int8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_s16 (const int16_t * __a, int16x8_t __b, const int __c)
+{
+ return (int16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_s32 (const int32_t * __a, int32x4_t __b, const int __c)
+{
+ return (int32x4_t)__builtin_neon_vld1_lanev4si ((const __builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_f32 (const float32_t * __a, float32x4_t __b, const int __c)
+{
+ return (float32x4_t)__builtin_neon_vld1_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_u8 (const uint8_t * __a, uint8x16_t __b, const int __c)
+{
+ return (uint8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_u16 (const uint16_t * __a, uint16x8_t __b, const int __c)
+{
+ return (uint16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_lane_u32 (const uint32_t * __a, uint32x4_t __b, const int __c)
+{
+ return (uint32x4_t)__builtin_neon_vld1_lanev4si ((const __builtin_neon_si *) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_lane_p8 (const poly8_t * __a, poly8x16_t __b, const int __c)
+{
+ return (poly8x16_t)__builtin_neon_vld1_lanev16qi ((const __builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_lane_p16 (const poly16_t * __a, poly16x8_t __b, const int __c)
+{
+ return (poly16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_lane_s64 (const int64_t * __a, int64x2_t __b, const int __c)
+{
+ return (int64x2_t)__builtin_neon_vld1_lanev2di ((const __builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_lane_u64 (const uint64_t * __a, uint64x2_t __b, const int __c)
+{
+ return (uint64x2_t)__builtin_neon_vld1_lanev2di ((const __builtin_neon_di *) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vld1_dup_s8 (const int8_t * __a)
+{
+ return (int8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vld1_dup_s16 (const int16_t * __a)
+{
+ return (int16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vld1_dup_s32 (const int32_t * __a)
+{
+ return (int32x2_t)__builtin_neon_vld1_dupv2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vld1_dup_f32 (const float32_t * __a)
+{
+ return (float32x2_t)__builtin_neon_vld1_dupv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vld1_dup_u8 (const uint8_t * __a)
+{
+ return (uint8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vld1_dup_u16 (const uint16_t * __a)
+{
+ return (uint16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vld1_dup_u32 (const uint32_t * __a)
+{
+ return (uint32x2_t)__builtin_neon_vld1_dupv2si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vld1_dup_p8 (const poly8_t * __a)
+{
+ return (poly8x8_t)__builtin_neon_vld1_dupv8qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vld1_dup_p16 (const poly16_t * __a)
+{
+ return (poly16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vld1_dup_s64 (const int64_t * __a)
+{
+ return (int64x1_t)__builtin_neon_vld1_dupdi ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vld1_dup_u64 (const uint64_t * __a)
+{
+ return (uint64x1_t)__builtin_neon_vld1_dupdi ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_s8 (const int8_t * __a)
+{
+ return (int8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_s16 (const int16_t * __a)
+{
+ return (int16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_s32 (const int32_t * __a)
+{
+ return (int32x4_t)__builtin_neon_vld1_dupv4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_f32 (const float32_t * __a)
+{
+ return (float32x4_t)__builtin_neon_vld1_dupv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_u8 (const uint8_t * __a)
+{
+ return (uint8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_u16 (const uint16_t * __a)
+{
+ return (uint16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vld1q_dup_u32 (const uint32_t * __a)
+{
+ return (uint32x4_t)__builtin_neon_vld1_dupv4si ((const __builtin_neon_si *) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vld1q_dup_p8 (const poly8_t * __a)
+{
+ return (poly8x16_t)__builtin_neon_vld1_dupv16qi ((const __builtin_neon_qi *) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vld1q_dup_p16 (const poly16_t * __a)
+{
+ return (poly16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vld1q_dup_s64 (const int64_t * __a)
+{
+ return (int64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vld1q_dup_u64 (const uint64_t * __a)
+{
+ return (uint64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s8 (int8_t * __a, int8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s16 (int16_t * __a, int16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s32 (int32_t * __a, int32x2_t __b)
+{
+ __builtin_neon_vst1v2si ((__builtin_neon_si *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_s64 (int64_t * __a, int64x1_t __b)
+{
+ __builtin_neon_vst1di ((__builtin_neon_di *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_f32 (float32_t * __a, float32x2_t __b)
+{
+ __builtin_neon_vst1v2sf (__a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u8 (uint8_t * __a, uint8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u16 (uint16_t * __a, uint16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u32 (uint32_t * __a, uint32x2_t __b)
+{
+ __builtin_neon_vst1v2si ((__builtin_neon_si *) __a, (int32x2_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_u64 (uint64_t * __a, uint64x1_t __b)
+{
+ __builtin_neon_vst1di ((__builtin_neon_di *) __a, (int64x1_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_p8 (poly8_t * __a, poly8x8_t __b)
+{
+ __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_p16 (poly16_t * __a, poly16x4_t __b)
+{
+ __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s8 (int8_t * __a, int8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s16 (int16_t * __a, int16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s32 (int32_t * __a, int32x4_t __b)
+{
+ __builtin_neon_vst1v4si ((__builtin_neon_si *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_s64 (int64_t * __a, int64x2_t __b)
+{
+ __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_f32 (float32_t * __a, float32x4_t __b)
+{
+ __builtin_neon_vst1v4sf (__a, __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u8 (uint8_t * __a, uint8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u16 (uint16_t * __a, uint16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u32 (uint32_t * __a, uint32x4_t __b)
+{
+ __builtin_neon_vst1v4si ((__builtin_neon_si *) __a, (int32x4_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_u64 (uint64_t * __a, uint64x2_t __b)
+{
+ __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, (int64x2_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_p8 (poly8_t * __a, poly8x16_t __b)
+{
+ __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_p16 (poly16_t * __a, poly16x8_t __b)
+{
+ __builtin_neon_vst1v8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s8 (int8_t * __a, int8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s16 (int16_t * __a, int16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s32 (int32_t * __a, int32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2si ((__builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_f32 (float32_t * __a, float32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2sf (__a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u8 (uint8_t * __a, uint8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u16 (uint16_t * __a, uint16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u32 (uint32_t * __a, uint32x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2si ((__builtin_neon_si *) __a, (int32x2_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_p8 (poly8_t * __a, poly8x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8qi ((__builtin_neon_qi *) __a, (int8x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_p16 (poly16_t * __a, poly16x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_s64 (int64_t * __a, int64x1_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1_lane_u64 (uint64_t * __a, uint64x1_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, (int64x1_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s8 (int8_t * __a, int8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s16 (int16_t * __a, int16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s32 (int32_t * __a, int32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4si ((__builtin_neon_si *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_f32 (float32_t * __a, float32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4sf (__a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u8 (uint8_t * __a, uint8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u16 (uint16_t * __a, uint16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u32 (uint32_t * __a, uint32x4_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev4si ((__builtin_neon_si *) __a, (int32x4_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_p8 (poly8_t * __a, poly8x16_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev16qi ((__builtin_neon_qi *) __a, (int8x16_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_p16 (poly16_t * __a, poly16x8_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_s64 (int64_t * __a, int64x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, __b, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst1q_lane_u64 (uint64_t * __a, uint64x2_t __b, const int __c)
+{
+ __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, (int64x2_t) __b, __c);
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_s8 (const int8_t * __a)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_s16 (const int16_t * __a)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_s32 (const int32_t * __a)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_f32 (const float32_t * __a)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_u8 (const uint8_t * __a)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_u16 (const uint16_t * __a)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_u32 (const uint32_t * __a)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_p8 (const poly8_t * __a)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_p16 (const poly16_t * __a)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__))
+vld2_s64 (const int64_t * __a)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__))
+vld2_u64 (const uint64_t * __a)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__))
+vld2q_s8 (const int8_t * __a)
+{
+ union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vld2q_s16 (const int16_t * __a)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vld2q_s32 (const int32_t * __a)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vld2q_f32 (const float32_t * __a)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__))
+vld2q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vld2q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vld2q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__))
+vld2q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vld2q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_s8 (const int8_t * __a, int8x8x2_t __b, const int __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_s16 (const int16_t * __a, int16x4x2_t __b, const int __c)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_s32 (const int32_t * __a, int32x2x2_t __b, const int __c)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_f32 (const float32_t * __a, float32x2x2_t __b, const int __c)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_u8 (const uint8_t * __a, uint8x8x2_t __b, const int __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_u16 (const uint16_t * __a, uint16x4x2_t __b, const int __c)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_lane_u32 (const uint32_t * __a, uint32x2x2_t __b, const int __c)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_lane_p8 (const poly8_t * __a, poly8x8x2_t __b, const int __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_lane_p16 (const poly16_t * __a, poly16x4x2_t __b, const int __c)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_s16 (const int16_t * __a, int16x8x2_t __b, const int __c)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_s32 (const int32_t * __a, int32x4x2_t __b, const int __c)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_f32 (const float32_t * __a, float32x4x2_t __b, const int __c)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_u16 (const uint16_t * __a, uint16x8x2_t __b, const int __c)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__))
+vld2q_lane_u32 (const uint32_t * __a, uint32x4x2_t __b, const int __c)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__))
+vld2q_lane_p16 (const poly16_t * __a, poly16x8x2_t __b, const int __c)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__))
+vld2_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__))
+vld2_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__))
+vld2_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__))
+vld2_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__))
+vld2_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __rv;
+ __rv.__o = __builtin_neon_vld2_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s8 (int8_t * __a, int8x8x2_t __b)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s16 (int16_t * __a, int16x4x2_t __b)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s32 (int32_t * __a, int32x2x2_t __b)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_f32 (float32_t * __a, float32x2x2_t __b)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u8 (uint8_t * __a, uint8x8x2_t __b)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u16 (uint16_t * __a, uint16x4x2_t __b)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u32 (uint32_t * __a, uint32x2x2_t __b)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_p8 (poly8_t * __a, poly8x8x2_t __b)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_p16 (poly16_t * __a, poly16x4x2_t __b)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_s64 (int64_t * __a, int64x1x2_t __b)
+{
+ union { int64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_u64 (uint64_t * __a, uint64x1x2_t __b)
+{
+ union { uint64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s8 (int8_t * __a, int8x16x2_t __b)
+{
+ union { int8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s16 (int16_t * __a, int16x8x2_t __b)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_s32 (int32_t * __a, int32x4x2_t __b)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_f32 (float32_t * __a, float32x4x2_t __b)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u8 (uint8_t * __a, uint8x16x2_t __b)
+{
+ union { uint8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u16 (uint16_t * __a, uint16x8x2_t __b)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_u32 (uint32_t * __a, uint32x4x2_t __b)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_p8 (poly8_t * __a, poly8x16x2_t __b)
+{
+ union { poly8x16x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_p16 (poly16_t * __a, poly16x8x2_t __b)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s8 (int8_t * __a, int8x8x2_t __b, const int __c)
+{
+ union { int8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s16 (int16_t * __a, int16x4x2_t __b, const int __c)
+{
+ union { int16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_s32 (int32_t * __a, int32x2x2_t __b, const int __c)
+{
+ union { int32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_f32 (float32_t * __a, float32x2x2_t __b, const int __c)
+{
+ union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u8 (uint8_t * __a, uint8x8x2_t __b, const int __c)
+{
+ union { uint8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u16 (uint16_t * __a, uint16x4x2_t __b, const int __c)
+{
+ union { uint16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_u32 (uint32_t * __a, uint32x2x2_t __b, const int __c)
+{
+ union { uint32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_p8 (poly8_t * __a, poly8x8x2_t __b, const int __c)
+{
+ union { poly8x8x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2_lane_p16 (poly16_t * __a, poly16x4x2_t __b, const int __c)
+{
+ union { poly16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_s16 (int16_t * __a, int16x8x2_t __b, const int __c)
+{
+ union { int16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_s32 (int32_t * __a, int32x4x2_t __b, const int __c)
+{
+ union { int32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_f32 (float32_t * __a, float32x4x2_t __b, const int __c)
+{
+ union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_u16 (uint16_t * __a, uint16x8x2_t __b, const int __c)
+{
+ union { uint16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_u32 (uint32_t * __a, uint32x4x2_t __b, const int __c)
+{
+ union { uint32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst2q_lane_p16 (poly16_t * __a, poly16x8x2_t __b, const int __c)
+{
+ union { poly16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst2_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_s8 (const int8_t * __a)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_s16 (const int16_t * __a)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_s32 (const int32_t * __a)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_f32 (const float32_t * __a)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_u8 (const uint8_t * __a)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_u16 (const uint16_t * __a)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_u32 (const uint32_t * __a)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_p8 (const poly8_t * __a)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_p16 (const poly16_t * __a)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__))
+vld3_s64 (const int64_t * __a)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__))
+vld3_u64 (const uint64_t * __a)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x3_t __attribute__ ((__always_inline__))
+vld3q_s8 (const int8_t * __a)
+{
+ union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__))
+vld3q_s16 (const int16_t * __a)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__))
+vld3q_s32 (const int32_t * __a)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+vld3q_f32 (const float32_t * __a)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x3_t __attribute__ ((__always_inline__))
+vld3q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__))
+vld3q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__))
+vld3q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x3_t __attribute__ ((__always_inline__))
+vld3q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__))
+vld3q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_s8 (const int8_t * __a, int8x8x3_t __b, const int __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_s16 (const int16_t * __a, int16x4x3_t __b, const int __c)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_s32 (const int32_t * __a, int32x2x3_t __b, const int __c)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_f32 (const float32_t * __a, float32x2x3_t __b, const int __c)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_u8 (const uint8_t * __a, uint8x8x3_t __b, const int __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_u16 (const uint16_t * __a, uint16x4x3_t __b, const int __c)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_lane_u32 (const uint32_t * __a, uint32x2x3_t __b, const int __c)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_lane_p8 (const poly8_t * __a, poly8x8x3_t __b, const int __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_lane_p16 (const poly16_t * __a, poly16x4x3_t __b, const int __c)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_s16 (const int16_t * __a, int16x8x3_t __b, const int __c)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_s32 (const int32_t * __a, int32x4x3_t __b, const int __c)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_f32 (const float32_t * __a, float32x4x3_t __b, const int __c)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_u16 (const uint16_t * __a, uint16x8x3_t __b, const int __c)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__))
+vld3q_lane_u32 (const uint32_t * __a, uint32x4x3_t __b, const int __c)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__))
+vld3q_lane_p16 (const poly16_t * __a, poly16x8x3_t __b, const int __c)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__))
+vld3_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__))
+vld3_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__))
+vld3_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__))
+vld3_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__))
+vld3_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __rv;
+ __rv.__o = __builtin_neon_vld3_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s8 (int8_t * __a, int8x8x3_t __b)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s16 (int16_t * __a, int16x4x3_t __b)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s32 (int32_t * __a, int32x2x3_t __b)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_f32 (float32_t * __a, float32x2x3_t __b)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u8 (uint8_t * __a, uint8x8x3_t __b)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u16 (uint16_t * __a, uint16x4x3_t __b)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u32 (uint32_t * __a, uint32x2x3_t __b)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_p8 (poly8_t * __a, poly8x8x3_t __b)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_p16 (poly16_t * __a, poly16x4x3_t __b)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_s64 (int64_t * __a, int64x1x3_t __b)
+{
+ union { int64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_u64 (uint64_t * __a, uint64x1x3_t __b)
+{
+ union { uint64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s8 (int8_t * __a, int8x16x3_t __b)
+{
+ union { int8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s16 (int16_t * __a, int16x8x3_t __b)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_s32 (int32_t * __a, int32x4x3_t __b)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_f32 (float32_t * __a, float32x4x3_t __b)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u8 (uint8_t * __a, uint8x16x3_t __b)
+{
+ union { uint8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u16 (uint16_t * __a, uint16x8x3_t __b)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_u32 (uint32_t * __a, uint32x4x3_t __b)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_p8 (poly8_t * __a, poly8x16x3_t __b)
+{
+ union { poly8x16x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_p16 (poly16_t * __a, poly16x8x3_t __b)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s8 (int8_t * __a, int8x8x3_t __b, const int __c)
+{
+ union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s16 (int16_t * __a, int16x4x3_t __b, const int __c)
+{
+ union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_s32 (int32_t * __a, int32x2x3_t __b, const int __c)
+{
+ union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_f32 (float32_t * __a, float32x2x3_t __b, const int __c)
+{
+ union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u8 (uint8_t * __a, uint8x8x3_t __b, const int __c)
+{
+ union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u16 (uint16_t * __a, uint16x4x3_t __b, const int __c)
+{
+ union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_u32 (uint32_t * __a, uint32x2x3_t __b, const int __c)
+{
+ union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_p8 (poly8_t * __a, poly8x8x3_t __b, const int __c)
+{
+ union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3_lane_p16 (poly16_t * __a, poly16x4x3_t __b, const int __c)
+{
+ union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_s16 (int16_t * __a, int16x8x3_t __b, const int __c)
+{
+ union { int16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_s32 (int32_t * __a, int32x4x3_t __b, const int __c)
+{
+ union { int32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c)
+{
+ union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_u16 (uint16_t * __a, uint16x8x3_t __b, const int __c)
+{
+ union { uint16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_u32 (uint32_t * __a, uint32x4x3_t __b, const int __c)
+{
+ union { uint32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst3q_lane_p16 (poly16_t * __a, poly16x8x3_t __b, const int __c)
+{
+ union { poly16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+ __builtin_neon_vst3_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_s8 (const int8_t * __a)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_s16 (const int16_t * __a)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_s32 (const int32_t * __a)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_f32 (const float32_t * __a)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_u8 (const uint8_t * __a)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_u16 (const uint16_t * __a)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_u32 (const uint32_t * __a)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_p8 (const poly8_t * __a)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_p16 (const poly16_t * __a)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__))
+vld4_s64 (const int64_t * __a)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__))
+vld4_u64 (const uint64_t * __a)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4di ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x16x4_t __attribute__ ((__always_inline__))
+vld4q_s8 (const int8_t * __a)
+{
+ union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__))
+vld4q_s16 (const int16_t * __a)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__))
+vld4q_s32 (const int32_t * __a)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+vld4q_f32 (const float32_t * __a)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x16x4_t __attribute__ ((__always_inline__))
+vld4q_u8 (const uint8_t * __a)
+{
+ union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__))
+vld4q_u16 (const uint16_t * __a)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__))
+vld4q_u32 (const uint32_t * __a)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v4si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x16x4_t __attribute__ ((__always_inline__))
+vld4q_p8 (const poly8_t * __a)
+{
+ union { poly8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v16qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__))
+vld4q_p16 (const poly16_t * __a)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4v8hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_s8 (const int8_t * __a, int8x8x4_t __b, const int __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_s16 (const int16_t * __a, int16x4x4_t __b, const int __c)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_s32 (const int32_t * __a, int32x2x4_t __b, const int __c)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_f32 (const float32_t * __a, float32x2x4_t __b, const int __c)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_u8 (const uint8_t * __a, uint8x8x4_t __b, const int __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_u16 (const uint16_t * __a, uint16x4x4_t __b, const int __c)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_lane_u32 (const uint32_t * __a, uint32x2x4_t __b, const int __c)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev2si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_lane_p8 (const poly8_t * __a, poly8x8x4_t __b, const int __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8qi ((const __builtin_neon_qi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_lane_p16 (const poly16_t * __a, poly16x4x4_t __b, const int __c)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_s16 (const int16_t * __a, int16x8x4_t __b, const int __c)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_s32 (const int32_t * __a, int32x4x4_t __b, const int __c)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_f32 (const float32_t * __a, float32x4x4_t __b, const int __c)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4sf (__a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_u16 (const uint16_t * __a, uint16x8x4_t __b, const int __c)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__))
+vld4q_lane_u32 (const uint32_t * __a, uint32x4x4_t __b, const int __c)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev4si ((const __builtin_neon_si *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__))
+vld4q_lane_p16 (const poly16_t * __a, poly16x8x4_t __b, const int __c)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_lanev8hi ((const __builtin_neon_hi *) __a, __bu.__o, __c);
+ return __rv.__i;
+}
+
+__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_s8 (const int8_t * __a)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_s16 (const int16_t * __a)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_s32 (const int32_t * __a)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_f32 (const float32_t * __a)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2sf (__a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_u8 (const uint8_t * __a)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_u16 (const uint16_t * __a)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__))
+vld4_dup_u32 (const uint32_t * __a)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv2si ((const __builtin_neon_si *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__))
+vld4_dup_p8 (const poly8_t * __a)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv8qi ((const __builtin_neon_qi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__))
+vld4_dup_p16 (const poly16_t * __a)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupv4hi ((const __builtin_neon_hi *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__))
+vld4_dup_s64 (const int64_t * __a)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__))
+vld4_dup_u64 (const uint64_t * __a)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __rv;
+ __rv.__o = __builtin_neon_vld4_dupdi ((const __builtin_neon_di *) __a);
+ return __rv.__i;
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s8 (int8_t * __a, int8x8x4_t __b)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s16 (int16_t * __a, int16x4x4_t __b)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s32 (int32_t * __a, int32x2x4_t __b)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_f32 (float32_t * __a, float32x2x4_t __b)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u8 (uint8_t * __a, uint8x8x4_t __b)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u16 (uint16_t * __a, uint16x4x4_t __b)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u32 (uint32_t * __a, uint32x2x4_t __b)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v2si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_p8 (poly8_t * __a, poly8x8x4_t __b)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_p16 (poly16_t * __a, poly16x4x4_t __b)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_s64 (int64_t * __a, int64x1x4_t __b)
+{
+ union { int64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_u64 (uint64_t * __a, uint64x1x4_t __b)
+{
+ union { uint64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s8 (int8_t * __a, int8x16x4_t __b)
+{
+ union { int8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s16 (int16_t * __a, int16x8x4_t __b)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_s32 (int32_t * __a, int32x4x4_t __b)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_f32 (float32_t * __a, float32x4x4_t __b)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4sf (__a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u8 (uint8_t * __a, uint8x16x4_t __b)
+{
+ union { uint8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u16 (uint16_t * __a, uint16x8x4_t __b)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_u32 (uint32_t * __a, uint32x4x4_t __b)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_p8 (poly8_t * __a, poly8x16x4_t __b)
+{
+ union { poly8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_p16 (poly16_t * __a, poly16x8x4_t __b)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s8 (int8_t * __a, int8x8x4_t __b, const int __c)
+{
+ union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s16 (int16_t * __a, int16x4x4_t __b, const int __c)
+{
+ union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_s32 (int32_t * __a, int32x2x4_t __b, const int __c)
+{
+ union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_f32 (float32_t * __a, float32x2x4_t __b, const int __c)
+{
+ union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u8 (uint8_t * __a, uint8x8x4_t __b, const int __c)
+{
+ union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u16 (uint16_t * __a, uint16x4x4_t __b, const int __c)
+{
+ union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_u32 (uint32_t * __a, uint32x2x4_t __b, const int __c)
+{
+ union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_p8 (poly8_t * __a, poly8x8x4_t __b, const int __c)
+{
+ union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8qi ((__builtin_neon_qi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4_lane_p16 (poly16_t * __a, poly16x4x4_t __b, const int __c)
+{
+ union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_s16 (int16_t * __a, int16x8x4_t __b, const int __c)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_s32 (int32_t * __a, int32x4x4_t __b, const int __c)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_f32 (float32_t * __a, float32x4x4_t __b, const int __c)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4sf (__a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_u16 (uint16_t * __a, uint16x8x4_t __b, const int __c)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_u32 (uint32_t * __a, uint32x4x4_t __b, const int __c)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+vst4q_lane_p16 (poly16_t * __a, poly16x8x4_t __b, const int __c)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst4_lanev8hi ((__builtin_neon_hi *) __a, __bu.__o, __c);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vand_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vandv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vand_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vandv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vand_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vandv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vand_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vanddi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vand_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vandv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vand_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vandv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vand_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vandv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vand_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vanddi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vandq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vandv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vandq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vandv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vandq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vandv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vandq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vandv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vandq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vandv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vandq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vandv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vandq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vandv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vandq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vandv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vorr_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vorrv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vorr_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vorrv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vorr_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vorrv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vorr_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vorrdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vorr_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vorrv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vorr_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vorrv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vorr_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vorrv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vorr_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vorrdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vorrq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vorrv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vorrq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vorrv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vorrq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vorrv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vorrq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vorrv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vorrq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vorrv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vorrq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vorrv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vorrq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vorrv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vorrq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vorrv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+veor_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_veorv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+veor_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_veorv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+veor_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_veorv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+veor_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_veordi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+veor_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_veorv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+veor_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_veorv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+veor_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_veorv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+veor_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_veordi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+veorq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_veorv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+veorq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_veorv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+veorq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_veorv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+veorq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_veorv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+veorq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_veorv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+veorq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_veorv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+veorq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_veorv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+veorq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_veorv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vbic_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vbicv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vbic_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vbicv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vbic_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vbicv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vbic_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vbicdi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vbic_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vbicv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vbic_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vbicv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vbic_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vbicv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vbic_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vbicdi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vbicq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vbicv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vbicq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vbicv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vbicq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vbicv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vbicq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vbicv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vbicq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vbicv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vbicq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vbicv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vbicq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vbicv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vbicq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vbicv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vorn_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return (int8x8_t)__builtin_neon_vornv8qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vorn_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return (int16x4_t)__builtin_neon_vornv4hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vorn_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return (int32x2_t)__builtin_neon_vornv2si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vorn_s64 (int64x1_t __a, int64x1_t __b)
+{
+ return (int64x1_t)__builtin_neon_vorndi (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vorn_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return (uint8x8_t)__builtin_neon_vornv8qi ((int8x8_t) __a, (int8x8_t) __b, 0);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vorn_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return (uint16x4_t)__builtin_neon_vornv4hi ((int16x4_t) __a, (int16x4_t) __b, 0);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vorn_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return (uint32x2_t)__builtin_neon_vornv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vorn_u64 (uint64x1_t __a, uint64x1_t __b)
+{
+ return (uint64x1_t)__builtin_neon_vorndi ((int64x1_t) __a, (int64x1_t) __b, 0);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vornq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return (int8x16_t)__builtin_neon_vornv16qi (__a, __b, 1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vornq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return (int16x8_t)__builtin_neon_vornv8hi (__a, __b, 1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vornq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return (int32x4_t)__builtin_neon_vornv4si (__a, __b, 1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vornq_s64 (int64x2_t __a, int64x2_t __b)
+{
+ return (int64x2_t)__builtin_neon_vornv2di (__a, __b, 1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vornq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return (uint8x16_t)__builtin_neon_vornv16qi ((int8x16_t) __a, (int8x16_t) __b, 0);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vornq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return (uint16x8_t)__builtin_neon_vornv8hi ((int16x8_t) __a, (int16x8_t) __b, 0);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vornq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return (uint32x4_t)__builtin_neon_vornv4si ((int32x4_t) __a, (int32x4_t) __b, 0);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vornq_u64 (uint64x2_t __a, uint64x2_t __b)
+{
+ return (uint64x2_t)__builtin_neon_vornv2di ((int64x2_t) __a, (int64x2_t) __b, 0);
+}
+
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s8 (int8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s16 (int16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s32 (int32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_s64 (int64x1_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_f32 (float32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u8 (uint8x8_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u16 (uint16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u32 (uint32x2_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_u64 (uint64x1_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vreinterpret_p8_p16 (poly16x4_t __a)
+{
+ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s8 (int8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s16 (int16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s32 (int32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_s64 (int64x2_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_f32 (float32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u8 (uint8x16_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u16 (uint16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u32 (uint32x4_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_u64 (uint64x2_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_p8_p16 (poly16x8_t __a)
+{
+ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s8 (int8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s16 (int16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s32 (int32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_s64 (int64x1_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_f32 (float32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u8 (uint8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u16 (uint16x4_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u32 (uint32x2_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_u64 (uint64x1_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vreinterpret_p16_p8 (poly8x8_t __a)
+{
+ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s8 (int8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s16 (int16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s32 (int32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_s64 (int64x2_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_f32 (float32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u8 (uint8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u16 (uint16x8_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u32 (uint32x4_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_u64 (uint64x2_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_p16_p8 (poly8x16_t __a)
+{
+ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s8 (int8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s16 (int16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s32 (int32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_s64 (int64x1_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u8 (uint8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u16 (uint16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u32 (uint32x2_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_u64 (uint64x1_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi ((int64x1_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_p8 (poly8x8_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vreinterpret_f32_p16 (poly16x4_t __a)
+{
+ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s8 (int8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s16 (int16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s32 (int32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_s64 (int64x2_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di (__a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u8 (uint8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u16 (uint16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u32 (uint32x4_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_u64 (uint64x2_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_p8 (poly8x16_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_f32_p16 (poly16x8_t __a)
+{
+ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s8 (int8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s16 (int16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_s32 (int32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_f32 (float32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u8 (uint8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u16 (uint16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u32 (uint32x2_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_u64 (uint64x1_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_p8 (poly8x8_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vreinterpret_s64_p16 (poly16x4_t __a)
+{
+ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s8 (int8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s16 (int16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_s32 (int32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_f32 (float32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u8 (uint8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u16 (uint16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u32 (uint32x4_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_u64 (uint64x2_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_p8 (poly8x16_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_s64_p16 (poly16x8_t __a)
+{
+ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s8 (int8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s16 (int16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s32 (int32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_s64 (int64x1_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_f32 (float32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u8 (uint8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u16 (uint16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_u32 (uint32x2_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_p8 (poly8x8_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vreinterpret_u64_p16 (poly16x4_t __a)
+{
+ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s8 (int8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s16 (int16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s32 (int32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_s64 (int64x2_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div2di (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_f32 (float32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u8 (uint8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u16 (uint16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_u32 (uint32x4_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_p8 (poly8x16_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vreinterpretq_u64_p16 (poly16x8_t __a)
+{
+ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s16 (int16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s32 (int32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_s64 (int64x1_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_f32 (float32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u8 (uint8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u16 (uint16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u32 (uint32x2_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_u64 (uint64x1_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_p8 (poly8x8_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vreinterpret_s8_p16 (poly16x4_t __a)
+{
+ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s16 (int16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s32 (int32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_s64 (int64x2_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_f32 (float32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u8 (uint8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u16 (uint16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u32 (uint32x4_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_u64 (uint64x2_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_p8 (poly8x16_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_s8_p16 (poly16x8_t __a)
+{
+ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s8 (int8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s32 (int32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_s64 (int64x1_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_f32 (float32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u8 (uint8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u16 (uint16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u32 (uint32x2_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_u64 (uint64x1_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_p8 (poly8x8_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vreinterpret_s16_p16 (poly16x4_t __a)
+{
+ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s8 (int8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s32 (int32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_s64 (int64x2_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_f32 (float32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u8 (uint8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u16 (uint16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u32 (uint32x4_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_u64 (uint64x2_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_p8 (poly8x16_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_s16_p16 (poly16x8_t __a)
+{
+ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s8 (int8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s16 (int16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_s64 (int64x1_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_f32 (float32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u8 (uint8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u16 (uint16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u32 (uint32x2_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_u64 (uint64x1_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_p8 (poly8x8_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vreinterpret_s32_p16 (poly16x4_t __a)
+{
+ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s8 (int8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s16 (int16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_s64 (int64x2_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_f32 (float32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u8 (uint8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u16 (uint16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u32 (uint32x4_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_u64 (uint64x2_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_p8 (poly8x16_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_s32_p16 (poly16x8_t __a)
+{
+ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s8 (int8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s16 (int16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s32 (int32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_s64 (int64x1_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_f32 (float32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u16 (uint16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u32 (uint32x2_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_u64 (uint64x1_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_p8 (poly8x8_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vreinterpret_u8_p16 (poly16x4_t __a)
+{
+ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s8 (int8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s16 (int16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s32 (int32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_s64 (int64x2_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_f32 (float32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u16 (uint16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u32 (uint32x4_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_u64 (uint64x2_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_p8 (poly8x16_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vreinterpretq_u8_p16 (poly16x8_t __a)
+{
+ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s8 (int8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s16 (int16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s32 (int32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_s64 (int64x1_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_f32 (float32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u8 (uint8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u32 (uint32x2_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_u64 (uint64x1_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_p8 (poly8x8_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vreinterpret_u16_p16 (poly16x4_t __a)
+{
+ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s8 (int8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s16 (int16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s32 (int32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_s64 (int64x2_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_f32 (float32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u8 (uint8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u32 (uint32x4_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_u64 (uint64x2_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_p8 (poly8x16_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vreinterpretq_u16_p16 (poly16x8_t __a)
+{
+ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s8 (int8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s16 (int16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s32 (int32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2si (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_s64 (int64x1_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_f32 (float32x2_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u8 (uint8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u16 (uint16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_u64 (uint64x1_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_p8 (poly8x8_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vreinterpret_u32_p16 (poly16x4_t __a)
+{
+ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s8 (int8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s16 (int16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s32 (int32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4si (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_s64 (int64x2_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_f32 (float32x4_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u8 (uint8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u16 (uint16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_u64 (uint64x2_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_p8 (poly8x16_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vreinterpretq_u32_p16 (poly16x8_t __a)
+{
+ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h
new file mode 100644
index 0000000..9969f1c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/float.h
@@ -0,0 +1,238 @@
+/* Copyright (C) 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 5.2.4.2.2 Characteristics of floating types <float.h>
+ */
+
+#ifndef _FLOAT_H___
+#define _FLOAT_H___
+
+/* Radix of exponent representation, b. */
+#undef FLT_RADIX
+#define FLT_RADIX __FLT_RADIX__
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef FLT_MANT_DIG
+#undef DBL_MANT_DIG
+#undef LDBL_MANT_DIG
+#define FLT_MANT_DIG __FLT_MANT_DIG__
+#define DBL_MANT_DIG __DBL_MANT_DIG__
+#define LDBL_MANT_DIG __LDBL_MANT_DIG__
+
+/* Number of decimal digits, q, such that any floating-point number with q
+ decimal digits can be rounded into a floating-point number with p radix b
+ digits and back again without change to the q decimal digits,
+
+ p * log10(b) if b is a power of 10
+ floor((p - 1) * log10(b)) otherwise
+*/
+#undef FLT_DIG
+#undef DBL_DIG
+#undef LDBL_DIG
+#define FLT_DIG __FLT_DIG__
+#define DBL_DIG __DBL_DIG__
+#define LDBL_DIG __LDBL_DIG__
+
+/* Minimum int x such that FLT_RADIX**(x-1) is a normalized float, emin */
+#undef FLT_MIN_EXP
+#undef DBL_MIN_EXP
+#undef LDBL_MIN_EXP
+#define FLT_MIN_EXP __FLT_MIN_EXP__
+#define DBL_MIN_EXP __DBL_MIN_EXP__
+#define LDBL_MIN_EXP __LDBL_MIN_EXP__
+
+/* Minimum negative integer such that 10 raised to that power is in the
+ range of normalized floating-point numbers,
+
+ ceil(log10(b) * (emin - 1))
+*/
+#undef FLT_MIN_10_EXP
+#undef DBL_MIN_10_EXP
+#undef LDBL_MIN_10_EXP
+#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
+#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
+#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
+
+/* Maximum int x such that FLT_RADIX**(x-1) is a representable float, emax. */
+#undef FLT_MAX_EXP
+#undef DBL_MAX_EXP
+#undef LDBL_MAX_EXP
+#define FLT_MAX_EXP __FLT_MAX_EXP__
+#define DBL_MAX_EXP __DBL_MAX_EXP__
+#define LDBL_MAX_EXP __LDBL_MAX_EXP__
+
+/* Maximum integer such that 10 raised to that power is in the range of
+ representable finite floating-point numbers,
+
+ floor(log10((1 - b**-p) * b**emax))
+*/
+#undef FLT_MAX_10_EXP
+#undef DBL_MAX_10_EXP
+#undef LDBL_MAX_10_EXP
+#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
+#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
+#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
+
+/* Maximum representable finite floating-point number,
+
+ (1 - b**-p) * b**emax
+*/
+#undef FLT_MAX
+#undef DBL_MAX
+#undef LDBL_MAX
+#define FLT_MAX __FLT_MAX__
+#define DBL_MAX __DBL_MAX__
+#define LDBL_MAX __LDBL_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type, b**1-p. */
+#undef FLT_EPSILON
+#undef DBL_EPSILON
+#undef LDBL_EPSILON
+#define FLT_EPSILON __FLT_EPSILON__
+#define DBL_EPSILON __DBL_EPSILON__
+#define LDBL_EPSILON __LDBL_EPSILON__
+
+/* Minimum normalized positive floating-point number, b**(emin - 1). */
+#undef FLT_MIN
+#undef DBL_MIN
+#undef LDBL_MIN
+#define FLT_MIN __FLT_MIN__
+#define DBL_MIN __DBL_MIN__
+#define LDBL_MIN __LDBL_MIN__
+
+/* Addition rounds to 0: zero, 1: nearest, 2: +inf, 3: -inf, -1: unknown. */
+/* ??? This is supposed to change with calls to fesetround in <fenv.h>. */
+#undef FLT_ROUNDS
+#define FLT_ROUNDS 1
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type float and double
+ to the range and precision of the double type, evaluate
+ long double operations and constants to the range and
+ precision of the long double type
+ 2 evaluate all operations and constants to the range and
+ precision of the long double type
+
+ ??? This ought to change with the setting of the fp control word;
+ the value provided by the compiler assumes the widest setting. */
+#undef FLT_EVAL_METHOD
+#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
+
+/* Number of decimal digits, n, such that any floating-point number in the
+ widest supported floating type with pmax radix b digits can be rounded
+ to a floating-point number with n decimal digits and back again without
+ change to the value,
+
+ pmax * log10(b) if b is a power of 10
+ ceil(1 + pmax * log10(b)) otherwise
+*/
+#undef DECIMAL_DIG
+#define DECIMAL_DIG __DECIMAL_DIG__
+
+#endif /* C99 */
+
+#ifdef __STDC_WANT_DEC_FP__
+/* Draft Technical Report 24732, extension for decimal floating-point
+ arithmetic: Characteristic of decimal floating types <float.h>. */
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef DEC32_MANT_DIG
+#undef DEC64_MANT_DIG
+#undef DEC128_MANT_DIG
+#define DEC32_MANT_DIG __DEC32_MANT_DIG__
+#define DEC64_MANT_DIG __DEC64_MANT_DIG__
+#define DEC128_MANT_DIG __DEC128_MANT_DIG__
+
+/* Minimum exponent. */
+#undef DEC32_MIN_EXP
+#undef DEC64_MIN_EXP
+#undef DEC128_MIN_EXP
+#define DEC32_MIN_EXP __DEC32_MIN_EXP__
+#define DEC64_MIN_EXP __DEC64_MIN_EXP__
+#define DEC128_MIN_EXP __DEC128_MIN_EXP__
+
+/* Maximum exponent. */
+#undef DEC32_MAX_EXP
+#undef DEC64_MAX_EXP
+#undef DEC128_MAX_EXP
+#define DEC32_MAX_EXP __DEC32_MAX_EXP__
+#define DEC64_MAX_EXP __DEC64_MAX_EXP__
+#define DEC128_MAX_EXP __DEC128_MAX_EXP__
+
+/* Maximum representable finite decimal floating-point number
+ (there are 6, 15, and 33 9s after the decimal points respectively). */
+#undef DEC32_MAX
+#undef DEC64_MAX
+#undef DEC128_MAX
+#define DEC32_MAX __DEC32_MAX__
+#define DEC64_MAX __DEC64_MAX__
+#define DEC128_MAX __DEC128_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type. */
+#undef DEC32_EPSILON
+#undef DEC64_EPSILON
+#undef DEC128_EPSILON
+#define DEC32_EPSILON __DEC32_EPSILON__
+#define DEC64_EPSILON __DEC64_EPSILON__
+#define DEC128_EPSILON __DEC128_EPSILON__
+
+/* Minimum normalized positive floating-point number. */
+#undef DEC32_MIN
+#undef DEC64_MIN
+#undef DEC128_MIN
+#define DEC32_MIN __DEC32_MIN__
+#define DEC64_MIN __DEC64_MIN__
+#define DEC128_MIN __DEC128_MIN__
+
+/* Minimum subnormal positive floating-point number. */
+#undef DEC32_SUBNORMAL_MIN
+#undef DEC64_SUBNORMAL_MIN
+#undef DEC128_SUBNORMAL_MIN
+#define DEC32_SUBNORMAL_MIN __DEC32_SUBNORMAL_MIN__
+#define DEC64_SUBNORMAL_MIN __DEC64_SUBNORMAL_MIN__
+#define DEC128_SUBNORMAL_MIN __DEC128_SUBNORMAL_MIN__
+
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type _Decimal32
+ and _Decimal64 to the range and precision of the _Decimal64
+ type, evaluate _Decimal128 operations and constants to the
+ range and precision of the _Decimal128 type;
+ 2 evaluate all operations and constants to the range and
+ precision of the _Decimal128 type. */
+
+#undef DEC_EVAL_METHOD
+#define DEC_EVAL_METHOD __DEC_EVAL_METHOD__
+
+#endif /* __STDC_WANT_DEC_FP__ */
+
+#endif /* _FLOAT_H___ */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h
new file mode 100644
index 0000000..28ff9d1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/iso646.h
@@ -0,0 +1,45 @@
+/* Copyright (C) 1997, 1999, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.9 Alternative spellings <iso646.h>
+ */
+
+#ifndef _ISO646_H
+#define _ISO646_H
+
+#ifndef __cplusplus
+#define and &&
+#define and_eq &=
+#define bitand &
+#define bitor |
+#define compl ~
+#define not !
+#define not_eq !=
+#define or ||
+#define or_eq |=
+#define xor ^
+#define xor_eq ^=
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h
new file mode 100644
index 0000000..2cc500d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/mmintrin.h
@@ -0,0 +1,1254 @@
+/* Copyright (C) 2002, 2003, 2004, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _MMINTRIN_H_INCLUDED
+#define _MMINTRIN_H_INCLUDED
+
+/* The data type intended for user use. */
+typedef unsigned long long __m64, __int64;
+
+/* Internal data types for implementing the intrinsics. */
+typedef int __v2si __attribute__ ((vector_size (8)));
+typedef short __v4hi __attribute__ ((vector_size (8)));
+typedef char __v8qi __attribute__ ((vector_size (8)));
+
+/* "Convert" __m64 and __int64 into each other. */
+static __inline __m64
+_mm_cvtsi64_m64 (__int64 __i)
+{
+ return __i;
+}
+
+static __inline __int64
+_mm_cvtm64_si64 (__m64 __i)
+{
+ return __i;
+}
+
+static __inline int
+_mm_cvtsi64_si32 (__int64 __i)
+{
+ return __i;
+}
+
+static __inline __int64
+_mm_cvtsi32_si64 (int __i)
+{
+ return __i;
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with signed saturation. */
+static __inline __m64
+_mm_packs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
+ the result, and the two 32-bit values from M2 into the upper two 16-bit
+ values of the result, all with signed saturation. */
+static __inline __m64
+_mm_packs_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+ the 64-bit value from M2 into the upper 32-bits of the result, all with
+ signed saturation for values that do not fit exactly into 32-bits. */
+static __inline __m64
+_mm_packs_pi64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackdss ((long long)__m1, (long long)__m2);
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with unsigned saturation. */
+static __inline __m64
+_mm_packs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 into the lower two 16-bit values of
+ the result, and the two 32-bit values from M2 into the upper two 16-bit
+ values of the result, all with unsigned saturation. */
+static __inline __m64
+_mm_packs_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+ the 64-bit value from M2 into the upper 32-bits of the result, all with
+ unsigned saturation for values that do not fit exactly into 32-bits. */
+static __inline __m64
+_mm_packs_pu64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wpackdus ((long long)__m1, (long long)__m2);
+}
+
+/* Interleave the four 8-bit values from the high half of M1 with the four
+ 8-bit values from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the high half of M1 with the two
+ 16-bit values from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the high half of M1 with the 32-bit
+ value from the high half of M2. */
+static __inline __m64
+_mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckihw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Interleave the four 8-bit values from the low half of M1 with the four
+ 8-bit values from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the low half of M1 with the two
+ 16-bit values from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the low half of M1 with the 32-bit
+ value from the low half of M2. */
+static __inline __m64
+_mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wunpckilw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Take the four 8-bit values from the low half of M1, sign extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackel_pi8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, sign extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackel_pi16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it sign extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackel_pi32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, sign extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pi8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, sign extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pi16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it sign extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackeh_pi32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the low half of M1, zero extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackel_pu8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckelub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, zero extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackel_pu16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckeluh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it zero extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackel_pu32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckeluw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, zero extend them,
+ and return the result as a vector of four 16-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pu8 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, zero extend them,
+ and return the result as a vector of two 32-bit quantities. */
+static __inline __m64
+_mm_unpackeh_pu16 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehuh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it zero extended
+ to 64 bits. */
+static __inline __m64
+_mm_unpackeh_pu32 (__m64 __m1)
+{
+ return (__m64) __builtin_arm_wunpckehuw ((__v2si)__m1);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2. */
+static __inline __m64
+_mm_add_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2. */
+static __inline __m64
+_mm_add_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2. */
+static __inline __m64
+_mm_add_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using signed
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using unsigned
+ saturated arithmetic. */
+static __inline __m64
+_mm_adds_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_waddwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1. */
+static __inline __m64
+_mm_sub_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1. */
+static __inline __m64
+_mm_sub_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1. */
+static __inline __m64
+_mm_sub_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
+ saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ signed saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+ signed saturating arithmetic. */
+static __inline __m64
+_mm_subs_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+ unsigned saturating arithmetic. */
+static __inline __m64
+_mm_subs_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wsubwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+ four 32-bit intermediate results, which are then summed by pairs to
+ produce two 32-bit results. */
+static __inline __m64
+_mm_madd_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmadds ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+ four 32-bit intermediate results, which are then summed by pairs to
+ produce two 32-bit results. */
+static __inline __m64
+_mm_madd_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmaddu ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+ M2 and produce the high 16 bits of the 32-bit results. */
+static __inline __m64
+_mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulsm ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+ M2 and produce the high 16 bits of the 32-bit results. */
+static __inline __m64
+_mm_mulhi_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulum ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
+ the low 16 bits of the results. */
+static __inline __m64
+_mm_mullo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wmulul ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Shift four 16-bit values in M left by COUNT. */
+static __inline __m64
+_mm_sll_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsllh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsllhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M left by COUNT. */
+static __inline __m64
+_mm_sll_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsllw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsllwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT. */
+static __inline __m64
+_mm_sll_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wslld (__m, __count);
+}
+
+static __inline __m64
+_mm_slli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wslldi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrah ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrahi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsraw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrawi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M right by COUNT; shift in the sign bit. */
+static __inline __m64
+_mm_sra_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrad (__m, __count);
+}
+
+static __inline __m64
+_mm_srai_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsradi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrlh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrlhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrlw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrlwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT; shift in zeros. */
+static __inline __m64
+_mm_srl_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wsrld (__m, __count);
+}
+
+static __inline __m64
+_mm_srli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wsrldi (__m, __count);
+}
+
+/* Rotate four 16-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrorh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrorhi ((__v4hi)__m, __count);
+}
+
+/* Rotate two 32-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrorw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrorwi ((__v2si)__m, __count);
+}
+
+/* Rotate two 64-bit values in M right by COUNT. */
+static __inline __m64
+_mm_ror_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_arm_wrord (__m, __count);
+}
+
+static __inline __m64
+_mm_rori_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_arm_wrordi (__m, __count);
+}
+
+/* Bit-wise AND the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_and_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wand (__m1, __m2);
+}
+
+/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
+ 64-bit value in M2. */
+static __inline __m64
+_mm_andnot_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wandn (__m1, __m2);
+}
+
+/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_or_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wor (__m1, __m2);
+}
+
+/* Bit-wise exclusive OR the 64-bit values in M1 and M2. */
+static __inline __m64
+_mm_xor_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_arm_wxor (__m1, __m2);
+}
+
+/* Compare eight 8-bit values. The result of the comparison is 0xFF if the
+ test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtub ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Compare four 16-bit values. The result of the comparison is 0xFFFF if
+ the test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtuh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if
+ the test is true and zero if false. */
+static __inline __m64
+_mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpeqw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtsw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_arm_wcmpgtuw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+ by accumulate across all elements and __A. */
+static __inline __m64
+_mm_mac_pu16 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return __builtin_arm_wmacu (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+ by accumulate across all elements and __A. */
+static __inline __m64
+_mm_mac_pi16 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return __builtin_arm_wmacs (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+ by accumulate across all elements. */
+static __inline __m64
+_mm_macz_pu16 (__m64 __A, __m64 __B)
+{
+ return __builtin_arm_wmacuz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+ by accumulate across all elements. */
+static __inline __m64
+_mm_macz_pi16 (__m64 __A, __m64 __B)
+{
+ return __builtin_arm_wmacsz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Accumulate across all unsigned 8-bit values in __A. */
+static __inline __m64
+_mm_acc_pu8 (__m64 __A)
+{
+ return __builtin_arm_waccb ((__v8qi)__A);
+}
+
+/* Accumulate across all unsigned 16-bit values in __A. */
+static __inline __m64
+_mm_acc_pu16 (__m64 __A)
+{
+ return __builtin_arm_wacch ((__v4hi)__A);
+}
+
+/* Accumulate across all unsigned 32-bit values in __A. */
+static __inline __m64
+_mm_acc_pu32 (__m64 __A)
+{
+ return __builtin_arm_waccw ((__v2si)__A);
+}
+
+static __inline __m64
+_mm_mia_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmia (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miaph_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiaph (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabb_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiabb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabt_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiabt (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatb_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiatb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatt_si64 (__m64 __A, int __B, int __C)
+{
+ return __builtin_arm_tmiatt (__A, __B, __C);
+}
+
+/* Extract one of the elements of A and sign extend. The selector N must
+ be immediate. */
+#define _mm_extract_pi8(A, N) __builtin_arm_textrmsb ((__v8qi)(A), (N))
+#define _mm_extract_pi16(A, N) __builtin_arm_textrmsh ((__v4hi)(A), (N))
+#define _mm_extract_pi32(A, N) __builtin_arm_textrmsw ((__v2si)(A), (N))
+
+/* Extract one of the elements of A and zero extend. The selector N must
+ be immediate. */
+#define _mm_extract_pu8(A, N) __builtin_arm_textrmub ((__v8qi)(A), (N))
+#define _mm_extract_pu16(A, N) __builtin_arm_textrmuh ((__v4hi)(A), (N))
+#define _mm_extract_pu32(A, N) __builtin_arm_textrmuw ((__v2si)(A), (N))
+
+/* Inserts word D into one of the elements of A. The selector N must be
+ immediate. */
+#define _mm_insert_pi8(A, D, N) \
+ ((__m64) __builtin_arm_tinsrb ((__v8qi)(A), (D), (N)))
+#define _mm_insert_pi16(A, D, N) \
+ ((__m64) __builtin_arm_tinsrh ((__v4hi)(A), (D), (N)))
+#define _mm_insert_pi32(A, D, N) \
+ ((__m64) __builtin_arm_tinsrw ((__v2si)(A), (D), (N)))
+
+/* Compute the element-wise maximum of signed 8-bit values. */
+static __inline __m64
+_mm_max_pi8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of signed 16-bit values. */
+static __inline __m64
+_mm_max_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of signed 32-bit values. */
+static __inline __m64
+_mm_max_pi32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 8-bit values. */
+static __inline __m64
+_mm_max_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 16-bit values. */
+static __inline __m64
+_mm_max_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 32-bit values. */
+static __inline __m64
+_mm_max_pu32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wmaxuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values. */
+static __inline __m64
+_mm_min_pi8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values. */
+static __inline __m64
+_mm_min_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of signed 32-bit values. */
+static __inline __m64
+_mm_min_pi32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values. */
+static __inline __m64
+_mm_min_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values. */
+static __inline __m64
+_mm_min_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 32-bit values. */
+static __inline __m64
+_mm_min_pu32 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wminuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Create an 8-bit mask of the signs of 8-bit values. */
+static __inline int
+_mm_movemask_pi8 (__m64 __A)
+{
+ return __builtin_arm_tmovmskb ((__v8qi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 16-bit values. */
+static __inline int
+_mm_movemask_pi16 (__m64 __A)
+{
+ return __builtin_arm_tmovmskh ((__v4hi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 32-bit values. */
+static __inline int
+_mm_movemask_pi32 (__m64 __A)
+{
+ return __builtin_arm_tmovmskw ((__v2si)__A);
+}
+
+/* Return a combination of the four 16-bit values in A. The selector
+ must be an immediate. */
+#define _mm_shuffle_pi16(A, N) \
+ ((__m64) __builtin_arm_wshufh ((__v4hi)(A), (N)))
+
+
+/* Compute the rounded averages of the unsigned 8-bit values in A and B. */
+static __inline __m64
+_mm_avg_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2br ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the rounded averages of the unsigned 16-bit values in A and B. */
+static __inline __m64
+_mm_avg_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2hr ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the averages of the unsigned 8-bit values in A and B. */
+static __inline __m64
+_mm_avg2_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2b ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the averages of the unsigned 16-bit values in A and B. */
+static __inline __m64
+_mm_avg2_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wavg2h ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+ values in A and B. Return the value in the lower 16-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sad_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+ values in A and B. Return the value in the lower 32-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sad_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+ values in A and B. Return the value in the lower 16-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sadz_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+ values in A and B. Return the value in the lower 32-bit word; the
+ upper words are cleared. */
+static __inline __m64
+_mm_sadz_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_arm_wsadhz ((__v4hi)__A, (__v4hi)__B);
+}
+
+static __inline __m64
+_mm_align_si64 (__m64 __A, __m64 __B, int __C)
+{
+ return (__m64) __builtin_arm_walign ((__v8qi)__A, (__v8qi)__B, __C);
+}
+
+/* Creates a 64-bit zero. */
+static __inline __m64
+_mm_setzero_si64 (void)
+{
+ return __builtin_arm_wzero ();
+}
+
+/* Set and Get arbitrary iWMMXt Control registers.
+ Note only registers 0-3 and 8-11 are currently defined,
+ the rest are reserved. */
+
+static __inline void
+_mm_setwcx (const int __value, const int __regno)
+{
+ switch (__regno)
+ {
+ case 0: __builtin_arm_setwcx (__value, 0); break;
+ case 1: __builtin_arm_setwcx (__value, 1); break;
+ case 2: __builtin_arm_setwcx (__value, 2); break;
+ case 3: __builtin_arm_setwcx (__value, 3); break;
+ case 8: __builtin_arm_setwcx (__value, 8); break;
+ case 9: __builtin_arm_setwcx (__value, 9); break;
+ case 10: __builtin_arm_setwcx (__value, 10); break;
+ case 11: __builtin_arm_setwcx (__value, 11); break;
+ default: break;
+ }
+}
+
+static __inline int
+_mm_getwcx (const int __regno)
+{
+ switch (__regno)
+ {
+ case 0: return __builtin_arm_getwcx (0);
+ case 1: return __builtin_arm_getwcx (1);
+ case 2: return __builtin_arm_getwcx (2);
+ case 3: return __builtin_arm_getwcx (3);
+ case 8: return __builtin_arm_getwcx (8);
+ case 9: return __builtin_arm_getwcx (9);
+ case 10: return __builtin_arm_getwcx (10);
+ case 11: return __builtin_arm_getwcx (11);
+ default: return 0;
+ }
+}
+
+/* Creates a vector of two 32-bit values; I0 is least significant. */
+static __inline __m64
+_mm_set_pi32 (int __i1, int __i0)
+{
+ union {
+ __m64 __q;
+ struct {
+ unsigned int __i0;
+ unsigned int __i1;
+ } __s;
+ } __u;
+
+ __u.__s.__i0 = __i0;
+ __u.__s.__i1 = __i1;
+
+ return __u.__q;
+}
+
+/* Creates a vector of four 16-bit values; W0 is least significant. */
+static __inline __m64
+_mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
+{
+ unsigned int __i1 = (unsigned short)__w3 << 16 | (unsigned short)__w2;
+ unsigned int __i0 = (unsigned short)__w1 << 16 | (unsigned short)__w0;
+ return _mm_set_pi32 (__i1, __i0);
+
+}
+
+/* Creates a vector of eight 8-bit values; B0 is least significant. */
+static __inline __m64
+_mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
+ char __b3, char __b2, char __b1, char __b0)
+{
+ unsigned int __i1, __i0;
+
+ __i1 = (unsigned char)__b7;
+ __i1 = __i1 << 8 | (unsigned char)__b6;
+ __i1 = __i1 << 8 | (unsigned char)__b5;
+ __i1 = __i1 << 8 | (unsigned char)__b4;
+
+ __i0 = (unsigned char)__b3;
+ __i0 = __i0 << 8 | (unsigned char)__b2;
+ __i0 = __i0 << 8 | (unsigned char)__b1;
+ __i0 = __i0 << 8 | (unsigned char)__b0;
+
+ return _mm_set_pi32 (__i1, __i0);
+}
+
+/* Similar, but with the arguments in reverse order. */
+static __inline __m64
+_mm_setr_pi32 (int __i0, int __i1)
+{
+ return _mm_set_pi32 (__i1, __i0);
+}
+
+static __inline __m64
+_mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
+{
+ return _mm_set_pi16 (__w3, __w2, __w1, __w0);
+}
+
+static __inline __m64
+_mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
+ char __b4, char __b5, char __b6, char __b7)
+{
+ return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
+}
+
+/* Creates a vector of two 32-bit values, both elements containing I. */
+static __inline __m64
+_mm_set1_pi32 (int __i)
+{
+ return _mm_set_pi32 (__i, __i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing W. */
+static __inline __m64
+_mm_set1_pi16 (short __w)
+{
+ unsigned int __i = (unsigned short)__w << 16 | (unsigned short)__w;
+ return _mm_set1_pi32 (__i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing B. */
+static __inline __m64
+_mm_set1_pi8 (char __b)
+{
+ unsigned int __w = (unsigned char)__b << 8 | (unsigned char)__b;
+ unsigned int __i = __w << 16 | __w;
+ return _mm_set1_pi32 (__i);
+}
+
+/* Convert an integer to a __m64 object. */
+static __inline __m64
+_m_from_int (int __a)
+{
+ return (__m64)__a;
+}
+
+#define _m_packsswb _mm_packs_pi16
+#define _m_packssdw _mm_packs_pi32
+#define _m_packuswb _mm_packs_pu16
+#define _m_packusdw _mm_packs_pu32
+#define _m_packssqd _mm_packs_pi64
+#define _m_packusqd _mm_packs_pu64
+#define _mm_packs_si64 _mm_packs_pi64
+#define _mm_packs_su64 _mm_packs_pu64
+#define _m_punpckhbw _mm_unpackhi_pi8
+#define _m_punpckhwd _mm_unpackhi_pi16
+#define _m_punpckhdq _mm_unpackhi_pi32
+#define _m_punpcklbw _mm_unpacklo_pi8
+#define _m_punpcklwd _mm_unpacklo_pi16
+#define _m_punpckldq _mm_unpacklo_pi32
+#define _m_punpckehsbw _mm_unpackeh_pi8
+#define _m_punpckehswd _mm_unpackeh_pi16
+#define _m_punpckehsdq _mm_unpackeh_pi32
+#define _m_punpckehubw _mm_unpackeh_pu8
+#define _m_punpckehuwd _mm_unpackeh_pu16
+#define _m_punpckehudq _mm_unpackeh_pu32
+#define _m_punpckelsbw _mm_unpackel_pi8
+#define _m_punpckelswd _mm_unpackel_pi16
+#define _m_punpckelsdq _mm_unpackel_pi32
+#define _m_punpckelubw _mm_unpackel_pu8
+#define _m_punpckeluwd _mm_unpackel_pu16
+#define _m_punpckeludq _mm_unpackel_pu32
+#define _m_paddb _mm_add_pi8
+#define _m_paddw _mm_add_pi16
+#define _m_paddd _mm_add_pi32
+#define _m_paddsb _mm_adds_pi8
+#define _m_paddsw _mm_adds_pi16
+#define _m_paddsd _mm_adds_pi32
+#define _m_paddusb _mm_adds_pu8
+#define _m_paddusw _mm_adds_pu16
+#define _m_paddusd _mm_adds_pu32
+#define _m_psubb _mm_sub_pi8
+#define _m_psubw _mm_sub_pi16
+#define _m_psubd _mm_sub_pi32
+#define _m_psubsb _mm_subs_pi8
+#define _m_psubsw _mm_subs_pi16
+#define _m_psubuw _mm_subs_pi32
+#define _m_psubusb _mm_subs_pu8
+#define _m_psubusw _mm_subs_pu16
+#define _m_psubusd _mm_subs_pu32
+#define _m_pmaddwd _mm_madd_pi16
+#define _m_pmadduwd _mm_madd_pu16
+#define _m_pmulhw _mm_mulhi_pi16
+#define _m_pmulhuw _mm_mulhi_pu16
+#define _m_pmullw _mm_mullo_pi16
+#define _m_pmacsw _mm_mac_pi16
+#define _m_pmacuw _mm_mac_pu16
+#define _m_pmacszw _mm_macz_pi16
+#define _m_pmacuzw _mm_macz_pu16
+#define _m_paccb _mm_acc_pu8
+#define _m_paccw _mm_acc_pu16
+#define _m_paccd _mm_acc_pu32
+#define _m_pmia _mm_mia_si64
+#define _m_pmiaph _mm_miaph_si64
+#define _m_pmiabb _mm_miabb_si64
+#define _m_pmiabt _mm_miabt_si64
+#define _m_pmiatb _mm_miatb_si64
+#define _m_pmiatt _mm_miatt_si64
+#define _m_psllw _mm_sll_pi16
+#define _m_psllwi _mm_slli_pi16
+#define _m_pslld _mm_sll_pi32
+#define _m_pslldi _mm_slli_pi32
+#define _m_psllq _mm_sll_si64
+#define _m_psllqi _mm_slli_si64
+#define _m_psraw _mm_sra_pi16
+#define _m_psrawi _mm_srai_pi16
+#define _m_psrad _mm_sra_pi32
+#define _m_psradi _mm_srai_pi32
+#define _m_psraq _mm_sra_si64
+#define _m_psraqi _mm_srai_si64
+#define _m_psrlw _mm_srl_pi16
+#define _m_psrlwi _mm_srli_pi16
+#define _m_psrld _mm_srl_pi32
+#define _m_psrldi _mm_srli_pi32
+#define _m_psrlq _mm_srl_si64
+#define _m_psrlqi _mm_srli_si64
+#define _m_prorw _mm_ror_pi16
+#define _m_prorwi _mm_rori_pi16
+#define _m_prord _mm_ror_pi32
+#define _m_prordi _mm_rori_pi32
+#define _m_prorq _mm_ror_si64
+#define _m_prorqi _mm_rori_si64
+#define _m_pand _mm_and_si64
+#define _m_pandn _mm_andnot_si64
+#define _m_por _mm_or_si64
+#define _m_pxor _mm_xor_si64
+#define _m_pcmpeqb _mm_cmpeq_pi8
+#define _m_pcmpeqw _mm_cmpeq_pi16
+#define _m_pcmpeqd _mm_cmpeq_pi32
+#define _m_pcmpgtb _mm_cmpgt_pi8
+#define _m_pcmpgtub _mm_cmpgt_pu8
+#define _m_pcmpgtw _mm_cmpgt_pi16
+#define _m_pcmpgtuw _mm_cmpgt_pu16
+#define _m_pcmpgtd _mm_cmpgt_pi32
+#define _m_pcmpgtud _mm_cmpgt_pu32
+#define _m_pextrb _mm_extract_pi8
+#define _m_pextrw _mm_extract_pi16
+#define _m_pextrd _mm_extract_pi32
+#define _m_pextrub _mm_extract_pu8
+#define _m_pextruw _mm_extract_pu16
+#define _m_pextrud _mm_extract_pu32
+#define _m_pinsrb _mm_insert_pi8
+#define _m_pinsrw _mm_insert_pi16
+#define _m_pinsrd _mm_insert_pi32
+#define _m_pmaxsb _mm_max_pi8
+#define _m_pmaxsw _mm_max_pi16
+#define _m_pmaxsd _mm_max_pi32
+#define _m_pmaxub _mm_max_pu8
+#define _m_pmaxuw _mm_max_pu16
+#define _m_pmaxud _mm_max_pu32
+#define _m_pminsb _mm_min_pi8
+#define _m_pminsw _mm_min_pi16
+#define _m_pminsd _mm_min_pi32
+#define _m_pminub _mm_min_pu8
+#define _m_pminuw _mm_min_pu16
+#define _m_pminud _mm_min_pu32
+#define _m_pmovmskb _mm_movemask_pi8
+#define _m_pmovmskw _mm_movemask_pi16
+#define _m_pmovmskd _mm_movemask_pi32
+#define _m_pshufw _mm_shuffle_pi16
+#define _m_pavgb _mm_avg_pu8
+#define _m_pavgw _mm_avg_pu16
+#define _m_pavg2b _mm_avg2_pu8
+#define _m_pavg2w _mm_avg2_pu16
+#define _m_psadbw _mm_sad_pu8
+#define _m_psadwd _mm_sad_pu16
+#define _m_psadzbw _mm_sadz_pu8
+#define _m_psadzwd _mm_sadz_pu16
+#define _m_paligniq _mm_align_si64
+#define _m_cvt_si2pi _mm_cvtsi64_m64
+#define _m_cvt_pi2si _mm_cvtm64_si64
+
+#endif /* _MMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h
new file mode 100644
index 0000000..54dc2e7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdarg.h
@@ -0,0 +1,130 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.15 Variable arguments <stdarg.h>
+ */
+
+#ifndef _STDARG_H
+#ifndef _ANSI_STDARG_H_
+#ifndef __need___va_list
+#define _STDARG_H
+#define _ANSI_STDARG_H_
+#endif /* not __need___va_list */
+#undef __need___va_list
+
+/* Define __gnuc_va_list. */
+
+#ifndef __GNUC_VA_LIST
+#define __GNUC_VA_LIST
+typedef __builtin_va_list __gnuc_va_list;
+#endif
+
+/* Define the standard macros for the user,
+ if this invocation was from the user program. */
+#ifdef _STDARG_H
+
+#define va_start(v,l) __builtin_va_start(v,l)
+#define va_end(v) __builtin_va_end(v)
+#define va_arg(v,l) __builtin_va_arg(v,l)
+#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L || defined(__GXX_EXPERIMENTAL_CXX0X__)
+#define va_copy(d,s) __builtin_va_copy(d,s)
+#endif
+#define __va_copy(d,s) __builtin_va_copy(d,s)
+
+/* Define va_list, if desired, from __gnuc_va_list. */
+/* We deliberately do not define va_list when called from
+ stdio.h, because ANSI C says that stdio.h is not supposed to define
+ va_list. stdio.h needs to have access to that data type,
+ but must not use that name. It should use the name __gnuc_va_list,
+ which is safe because it is reserved for the implementation. */
+
+#ifdef _HIDDEN_VA_LIST /* On OSF1, this means varargs.h is "half-loaded". */
+#undef _VA_LIST
+#endif
+
+#ifdef _BSD_VA_LIST
+#undef _BSD_VA_LIST
+#endif
+
+#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST))
+/* SVR4.2 uses _VA_LIST for an internal alias for va_list,
+ so we must avoid testing it and setting it here.
+ SVR4 uses _VA_LIST as a flag in stdarg.h, but we should
+ have no conflict with that. */
+#ifndef _VA_LIST_
+#define _VA_LIST_
+#ifdef __i860__
+#ifndef _VA_LIST
+#define _VA_LIST va_list
+#endif
+#endif /* __i860__ */
+typedef __gnuc_va_list va_list;
+#ifdef _SCO_DS
+#define __VA_LIST
+#endif
+#endif /* _VA_LIST_ */
+#else /* not __svr4__ || _SCO_DS */
+
+/* The macro _VA_LIST_ is the same thing used by this file in Ultrix.
+ But on BSD NET2 we must not test or define or undef it.
+ (Note that the comments in NET 2's ansi.h
+ are incorrect for _VA_LIST_--see stdio.h!) */
+#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT)
+/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5 */
+#ifndef _VA_LIST_DEFINED
+/* The macro _VA_LIST is used in SCO Unix 3.2. */
+#ifndef _VA_LIST
+/* The macro _VA_LIST_T_H is used in the Bull dpx2 */
+#ifndef _VA_LIST_T_H
+/* The macro __va_list__ is used by BeOS. */
+#ifndef __va_list__
+typedef __gnuc_va_list va_list;
+#endif /* not __va_list__ */
+#endif /* not _VA_LIST_T_H */
+#endif /* not _VA_LIST */
+#endif /* not _VA_LIST_DEFINED */
+#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__))
+#define _VA_LIST_
+#endif
+#ifndef _VA_LIST
+#define _VA_LIST
+#endif
+#ifndef _VA_LIST_DEFINED
+#define _VA_LIST_DEFINED
+#endif
+#ifndef _VA_LIST_T_H
+#define _VA_LIST_T_H
+#endif
+#ifndef __va_list__
+#define __va_list__
+#endif
+
+#endif /* not _VA_LIST_, except on certain systems */
+
+#endif /* not __svr4__ */
+
+#endif /* _STDARG_H */
+
+#endif /* not _ANSI_STDARG_H_ */
+#endif /* not _STDARG_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h
new file mode 100644
index 0000000..4ed911f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdbool.h
@@ -0,0 +1,50 @@
+/* Copyright (C) 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.16 Boolean type and values <stdbool.h>
+ */
+
+#ifndef _STDBOOL_H
+#define _STDBOOL_H
+
+#ifndef __cplusplus
+
+#define bool _Bool
+#define true 1
+#define false 0
+
+#else /* __cplusplus */
+
+/* Supporting <stdbool.h> in C++ is a GCC extension. */
+#define _Bool bool
+#define bool bool
+#define false false
+#define true true
+
+#endif /* __cplusplus */
+
+/* Signal that all the definitions are present. */
+#define __bool_true_false_are_defined 1
+
+#endif /* stdbool.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h
new file mode 100644
index 0000000..89e5b2e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stddef.h
@@ -0,0 +1,416 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2002, 2004, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.17 Common definitions <stddef.h>
+ */
+#if (!defined(_STDDEF_H) && !defined(_STDDEF_H_) && !defined(_ANSI_STDDEF_H) \
+ && !defined(__STDDEF_H__)) \
+ || defined(__need_wchar_t) || defined(__need_size_t) \
+ || defined(__need_ptrdiff_t) || defined(__need_NULL) \
+ || defined(__need_wint_t)
+
+/* Any one of these symbols __need_* means that GNU libc
+ wants us just to define one data type. So don't define
+ the symbols that indicate this file's entire job has been done. */
+#if (!defined(__need_wchar_t) && !defined(__need_size_t) \
+ && !defined(__need_ptrdiff_t) && !defined(__need_NULL) \
+ && !defined(__need_wint_t))
+#define _STDDEF_H
+#define _STDDEF_H_
+/* snaroff@next.com says the NeXT needs this. */
+#define _ANSI_STDDEF_H
+/* Irix 5.1 needs this. */
+#define __STDDEF_H__
+#endif
+
+#ifndef __sys_stdtypes_h
+/* This avoids lossage on SunOS but only if stdtypes.h comes first.
+ There's no way to win with the other order! Sun lossage. */
+
+/* On 4.3bsd-net2, make sure ansi.h is included, so we have
+ one less case to deal with in the following. */
+#if defined (__BSD_NET2__) || defined (____386BSD____) || (defined (__FreeBSD__) && (__FreeBSD__ < 5)) || defined(__NetBSD__)
+#include <machine/ansi.h>
+#endif
+/* On FreeBSD 5, machine/ansi.h does not exist anymore... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#include <sys/_types.h>
+#endif
+
+/* In 4.3bsd-net2, machine/ansi.h defines these symbols, which are
+ defined if the corresponding type is *not* defined.
+ FreeBSD-2.1 defines _MACHINE_ANSI_H_ instead of _ANSI_H_ */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+#if !defined(_SIZE_T_) && !defined(_BSD_SIZE_T_)
+#define _SIZE_T
+#endif
+#if !defined(_PTRDIFF_T_) && !defined(_BSD_PTRDIFF_T_)
+#define _PTRDIFF_T
+#endif
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_. */
+#if !defined(_WCHAR_T_) && !defined(_BSD_WCHAR_T_)
+#ifndef _BSD_WCHAR_T_
+#define _WCHAR_T
+#endif
+#endif
+/* Undef _FOO_T_ if we are supposed to define foo_t. */
+#if defined (__need_ptrdiff_t) || defined (_STDDEF_H_)
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#if defined (__need_size_t) || defined (_STDDEF_H_)
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#if defined (__need_wchar_t) || defined (_STDDEF_H_)
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) */
+
+/* Sequent's header files use _PTRDIFF_T_ in some conflicting way.
+ Just ignore it. */
+#if defined (__sequent__) && defined (_PTRDIFF_T_)
+#undef _PTRDIFF_T_
+#endif
+
+/* On VxWorks, <type/vxTypesBase.h> may have defined macros like
+ _TYPE_size_t which will typedef size_t. fixincludes patched the
+ vxTypesBase.h so that this macro is only defined if _GCC_SIZE_T is
+ not defined, and so that defining this macro defines _GCC_SIZE_T.
+ If we find that the macros are still defined at this point, we must
+ invoke them so that the type is defined as expected. */
+#if defined (_TYPE_ptrdiff_t) && (defined (__need_ptrdiff_t) || defined (_STDDEF_H_))
+_TYPE_ptrdiff_t;
+#undef _TYPE_ptrdiff_t
+#endif
+#if defined (_TYPE_size_t) && (defined (__need_size_t) || defined (_STDDEF_H_))
+_TYPE_size_t;
+#undef _TYPE_size_t
+#endif
+#if defined (_TYPE_wchar_t) && (defined (__need_wchar_t) || defined (_STDDEF_H_))
+_TYPE_wchar_t;
+#undef _TYPE_wchar_t
+#endif
+
+/* In case nobody has defined these types, but we aren't running under
+ GCC 2.00, make sure that __PTRDIFF_TYPE__, __SIZE_TYPE__, and
+ __WCHAR_TYPE__ have reasonable values. This can happen if the
+ parts of GCC is compiled by an older compiler, that actually
+ include gstddef.h, such as collect2. */
+
+/* Signed type of difference of two pointers. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_ptrdiff_t)
+#ifndef _PTRDIFF_T /* in case <sys/types.h> has defined it. */
+#ifndef _T_PTRDIFF_
+#ifndef _T_PTRDIFF
+#ifndef __PTRDIFF_T
+#ifndef _PTRDIFF_T_
+#ifndef _BSD_PTRDIFF_T_
+#ifndef ___int_ptrdiff_t_h
+#ifndef _GCC_PTRDIFF_T
+#define _PTRDIFF_T
+#define _T_PTRDIFF_
+#define _T_PTRDIFF
+#define __PTRDIFF_T
+#define _PTRDIFF_T_
+#define _BSD_PTRDIFF_T_
+#define ___int_ptrdiff_t_h
+#define _GCC_PTRDIFF_T
+#ifndef __PTRDIFF_TYPE__
+#define __PTRDIFF_TYPE__ long int
+#endif
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+#endif /* _GCC_PTRDIFF_T */
+#endif /* ___int_ptrdiff_t_h */
+#endif /* _BSD_PTRDIFF_T_ */
+#endif /* _PTRDIFF_T_ */
+#endif /* __PTRDIFF_T */
+#endif /* _T_PTRDIFF */
+#endif /* _T_PTRDIFF_ */
+#endif /* _PTRDIFF_T */
+
+/* If this symbol has done its job, get rid of it. */
+#undef __need_ptrdiff_t
+
+#endif /* _STDDEF_H or __need_ptrdiff_t. */
+
+/* Unsigned type of `sizeof' something. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_size_t)
+#ifndef __size_t__ /* BeOS */
+#ifndef __SIZE_T__ /* Cray Unicos/Mk */
+#ifndef _SIZE_T /* in case <sys/types.h> has defined it. */
+#ifndef _SYS_SIZE_T_H
+#ifndef _T_SIZE_
+#ifndef _T_SIZE
+#ifndef __SIZE_T
+#ifndef _SIZE_T_
+#ifndef _BSD_SIZE_T_
+#ifndef _SIZE_T_DEFINED_
+#ifndef _SIZE_T_DEFINED
+#ifndef _BSD_SIZE_T_DEFINED_ /* Darwin */
+#ifndef _SIZE_T_DECLARED /* FreeBSD 5 */
+#ifndef ___int_size_t_h
+#ifndef _GCC_SIZE_T
+#ifndef _SIZET_
+#ifndef __size_t
+#define __size_t__ /* BeOS */
+#define __SIZE_T__ /* Cray Unicos/Mk */
+#define _SIZE_T
+#define _SYS_SIZE_T_H
+#define _T_SIZE_
+#define _T_SIZE
+#define __SIZE_T
+#define _SIZE_T_
+#define _BSD_SIZE_T_
+#define _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED
+#define _BSD_SIZE_T_DEFINED_ /* Darwin */
+#define _SIZE_T_DECLARED /* FreeBSD 5 */
+#define ___int_size_t_h
+#define _GCC_SIZE_T
+#define _SIZET_
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+/* __size_t is a typedef on FreeBSD 5!, must not trash it. */
+#else
+#define __size_t
+#endif
+#ifndef __SIZE_TYPE__
+#define __SIZE_TYPE__ long unsigned int
+#endif
+#if !(defined (__GNUG__) && defined (size_t))
+typedef __SIZE_TYPE__ size_t;
+#ifdef __BEOS__
+typedef long ssize_t;
+#endif /* __BEOS__ */
+#endif /* !(defined (__GNUG__) && defined (size_t)) */
+#endif /* __size_t */
+#endif /* _SIZET_ */
+#endif /* _GCC_SIZE_T */
+#endif /* ___int_size_t_h */
+#endif /* _SIZE_T_DECLARED */
+#endif /* _BSD_SIZE_T_DEFINED_ */
+#endif /* _SIZE_T_DEFINED */
+#endif /* _SIZE_T_DEFINED_ */
+#endif /* _BSD_SIZE_T_ */
+#endif /* _SIZE_T_ */
+#endif /* __SIZE_T */
+#endif /* _T_SIZE */
+#endif /* _T_SIZE_ */
+#endif /* _SYS_SIZE_T_H */
+#endif /* _SIZE_T */
+#endif /* __SIZE_T__ */
+#endif /* __size_t__ */
+#undef __need_size_t
+#endif /* _STDDEF_H or __need_size_t. */
+
+
+/* Wide character type.
+ Locale-writers should change this as necessary to
+ be big enough to hold unique values not between 0 and 127,
+ and not (wchar_t) -1, for each defined multibyte character. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_wchar_t)
+#ifndef __wchar_t__ /* BeOS */
+#ifndef __WCHAR_T__ /* Cray Unicos/Mk */
+#ifndef _WCHAR_T
+#ifndef _T_WCHAR_
+#ifndef _T_WCHAR
+#ifndef __WCHAR_T
+#ifndef _WCHAR_T_
+#ifndef _BSD_WCHAR_T_
+#ifndef _BSD_WCHAR_T_DEFINED_ /* Darwin */
+#ifndef _BSD_RUNE_T_DEFINED_ /* Darwin */
+#ifndef _WCHAR_T_DECLARED /* FreeBSD 5 */
+#ifndef _WCHAR_T_DEFINED_
+#ifndef _WCHAR_T_DEFINED
+#ifndef _WCHAR_T_H
+#ifndef ___int_wchar_t_h
+#ifndef __INT_WCHAR_T_H
+#ifndef _GCC_WCHAR_T
+#define __wchar_t__ /* BeOS */
+#define __WCHAR_T__ /* Cray Unicos/Mk */
+#define _WCHAR_T
+#define _T_WCHAR_
+#define _T_WCHAR
+#define __WCHAR_T
+#define _WCHAR_T_
+#define _BSD_WCHAR_T_
+#define _WCHAR_T_DEFINED_
+#define _WCHAR_T_DEFINED
+#define _WCHAR_T_H
+#define ___int_wchar_t_h
+#define __INT_WCHAR_T_H
+#define _GCC_WCHAR_T
+#define _WCHAR_T_DECLARED
+
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_, and _BSD_RUNE_T_ (which, unlike the other
+ symbols in the _FOO_T_ family, stays defined even after its
+ corresponding type is defined). If we define wchar_t, then we
+ must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if
+ we undef _WCHAR_T_, then we must also define rune_t, since
+ headers like runetype.h assume that if machine/ansi.h is included,
+ and _BSD_WCHAR_T_ is not defined, then rune_t is available.
+ machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of
+ the same type." */
+#ifdef _BSD_WCHAR_T_
+#undef _BSD_WCHAR_T_
+#ifdef _BSD_RUNE_T_
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+typedef _BSD_RUNE_T_ rune_t;
+#define _BSD_WCHAR_T_DEFINED_
+#define _BSD_RUNE_T_DEFINED_ /* Darwin */
+#if defined (__FreeBSD__) && (__FreeBSD__ < 5)
+/* Why is this file so hard to maintain properly? In contrast to
+ the comment above regarding BSD/386 1.1, on FreeBSD for as long
+ as the symbol has existed, _BSD_RUNE_T_ must not stay defined or
+ redundant typedefs will occur when stdlib.h is included after this file. */
+#undef _BSD_RUNE_T_
+#endif
+#endif
+#endif
+#endif
+/* FreeBSD 5 can't be handled well using "traditional" logic above
+ since it no longer defines _BSD_RUNE_T_ yet still desires to export
+ rune_t in some cases... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+#if __BSD_VISIBLE
+#ifndef _RUNE_T_DECLARED
+typedef __rune_t rune_t;
+#define _RUNE_T_DECLARED
+#endif
+#endif
+#endif
+#endif
+
+#ifndef __WCHAR_TYPE__
+#define __WCHAR_TYPE__ int
+#endif
+#ifndef __cplusplus
+typedef __WCHAR_TYPE__ wchar_t;
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* _WCHAR_T_DECLARED */
+#endif /* _BSD_RUNE_T_DEFINED_ */
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* __WCHAR_T__ */
+#endif /* __wchar_t__ */
+#undef __need_wchar_t
+#endif /* _STDDEF_H or __need_wchar_t. */
+
+#if defined (__need_wint_t)
+#ifndef _WINT_T
+#define _WINT_T
+
+#ifndef __WINT_TYPE__
+#define __WINT_TYPE__ unsigned int
+#endif
+typedef __WINT_TYPE__ wint_t;
+#endif
+#undef __need_wint_t
+#endif
+
+/* In 4.3bsd-net2, leave these undefined to indicate that size_t, etc.
+ are already defined. */
+/* BSD/OS 3.1 and FreeBSD [23].x require the MACHINE_ANSI_H check here. */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+/* The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_
+ are probably typos and should be removed before 2.8 is released. */
+#ifdef _GCC_PTRDIFF_T_
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T_
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T_
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+/* The following ones are the real ones. */
+#ifdef _GCC_PTRDIFF_T
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* _ANSI_H_ || _MACHINE_ANSI_H_ */
+
+#endif /* __sys_stdtypes_h */
+
+/* A null pointer constant. */
+
+#if defined (_STDDEF_H) || defined (__need_NULL)
+#undef NULL /* in case <stdio.h> has defined it. */
+#ifdef __GNUG__
+#define NULL __null
+#else /* G++ */
+#ifndef __cplusplus
+#define NULL ((void *)0)
+#else /* C++ */
+#define NULL 0
+#endif /* C++ */
+#endif /* G++ */
+#endif /* NULL not defined and <stddef.h> or need NULL. */
+#undef __need_NULL
+
+#ifdef _STDDEF_H
+
+/* Offset of member MEMBER in a struct of type TYPE. */
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+
+#endif /* _STDDEF_H was defined this time */
+
+#endif /* !_STDDEF_H && !_STDDEF_H_ && !_ANSI_STDDEF_H && !__STDDEF_H__
+ || __need_XXX was not defined before */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h
new file mode 100644
index 0000000..3c3ec00
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/stdfix.h
@@ -0,0 +1,204 @@
+/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* ISO/IEC JTC1 SC22 WG14 N1169
+ * Date: 2006-04-04
+ * ISO/IEC TR 18037
+ * Programming languages - C - Extensions to support embedded processors
+ */
+
+#ifndef _STDFIX_H
+#define _STDFIX_H
+
+/* 7.18a.1 Introduction. */
+
+#undef fract
+#undef accum
+#undef sat
+#define fract _Fract
+#define accum _Accum
+#define sat _Sat
+
+/* 7.18a.3 Precision macros. */
+
+#undef SFRACT_FBIT
+#undef SFRACT_MIN
+#undef SFRACT_MAX
+#undef SFRACT_EPSILON
+#define SFRACT_FBIT __SFRACT_FBIT__
+#define SFRACT_MIN __SFRACT_MIN__
+#define SFRACT_MAX __SFRACT_MAX__
+#define SFRACT_EPSILON __SFRACT_EPSILON__
+
+#undef USFRACT_FBIT
+#undef USFRACT_MIN
+#undef USFRACT_MAX
+#undef USFRACT_EPSILON
+#define USFRACT_FBIT __USFRACT_FBIT__
+#define USFRACT_MIN __USFRACT_MIN__ /* GCC extension. */
+#define USFRACT_MAX __USFRACT_MAX__
+#define USFRACT_EPSILON __USFRACT_EPSILON__
+
+#undef FRACT_FBIT
+#undef FRACT_MIN
+#undef FRACT_MAX
+#undef FRACT_EPSILON
+#define FRACT_FBIT __FRACT_FBIT__
+#define FRACT_MIN __FRACT_MIN__
+#define FRACT_MAX __FRACT_MAX__
+#define FRACT_EPSILON __FRACT_EPSILON__
+
+#undef UFRACT_FBIT
+#undef UFRACT_MIN
+#undef UFRACT_MAX
+#undef UFRACT_EPSILON
+#define UFRACT_FBIT __UFRACT_FBIT__
+#define UFRACT_MIN __UFRACT_MIN__ /* GCC extension. */
+#define UFRACT_MAX __UFRACT_MAX__
+#define UFRACT_EPSILON __UFRACT_EPSILON__
+
+#undef LFRACT_FBIT
+#undef LFRACT_MIN
+#undef LFRACT_MAX
+#undef LFRACT_EPSILON
+#define LFRACT_FBIT __LFRACT_FBIT__
+#define LFRACT_MIN __LFRACT_MIN__
+#define LFRACT_MAX __LFRACT_MAX__
+#define LFRACT_EPSILON __LFRACT_EPSILON__
+
+#undef ULFRACT_FBIT
+#undef ULFRACT_MIN
+#undef ULFRACT_MAX
+#undef ULFRACT_EPSILON
+#define ULFRACT_FBIT __ULFRACT_FBIT__
+#define ULFRACT_MIN __ULFRACT_MIN__ /* GCC extension. */
+#define ULFRACT_MAX __ULFRACT_MAX__
+#define ULFRACT_EPSILON __ULFRACT_EPSILON__
+
+#undef LLFRACT_FBIT
+#undef LLFRACT_MIN
+#undef LLFRACT_MAX
+#undef LLFRACT_EPSILON
+#define LLFRACT_FBIT __LLFRACT_FBIT__ /* GCC extension. */
+#define LLFRACT_MIN __LLFRACT_MIN__ /* GCC extension. */
+#define LLFRACT_MAX __LLFRACT_MAX__ /* GCC extension. */
+#define LLFRACT_EPSILON __LLFRACT_EPSILON__ /* GCC extension. */
+
+#undef ULLFRACT_FBIT
+#undef ULLFRACT_MIN
+#undef ULLFRACT_MAX
+#undef ULLFRACT_EPSILON
+#define ULLFRACT_FBIT __ULLFRACT_FBIT__ /* GCC extension. */
+#define ULLFRACT_MIN __ULLFRACT_MIN__ /* GCC extension. */
+#define ULLFRACT_MAX __ULLFRACT_MAX__ /* GCC extension. */
+#define ULLFRACT_EPSILON __ULLFRACT_EPSILON__ /* GCC extension. */
+
+#undef SACCUM_FBIT
+#undef SACCUM_IBIT
+#undef SACCUM_MIN
+#undef SACCUM_MAX
+#undef SACCUM_EPSILON
+#define SACCUM_FBIT __SACCUM_FBIT__
+#define SACCUM_IBIT __SACCUM_IBIT__
+#define SACCUM_MIN __SACCUM_MIN__
+#define SACCUM_MAX __SACCUM_MAX__
+#define SACCUM_EPSILON __SACCUM_EPSILON__
+
+#undef USACCUM_FBIT
+#undef USACCUM_IBIT
+#undef USACCUM_MIN
+#undef USACCUM_MAX
+#undef USACCUM_EPSILON
+#define USACCUM_FBIT __USACCUM_FBIT__
+#define USACCUM_IBIT __USACCUM_IBIT__
+#define USACCUM_MIN __USACCUM_MIN__ /* GCC extension. */
+#define USACCUM_MAX __USACCUM_MAX__
+#define USACCUM_EPSILON __USACCUM_EPSILON__
+
+#undef ACCUM_FBIT
+#undef ACCUM_IBIT
+#undef ACCUM_MIN
+#undef ACCUM_MAX
+#undef ACCUM_EPSILON
+#define ACCUM_FBIT __ACCUM_FBIT__
+#define ACCUM_IBIT __ACCUM_IBIT__
+#define ACCUM_MIN __ACCUM_MIN__
+#define ACCUM_MAX __ACCUM_MAX__
+#define ACCUM_EPSILON __ACCUM_EPSILON__
+
+#undef UACCUM_FBIT
+#undef UACCUM_IBIT
+#undef UACCUM_MIN
+#undef UACCUM_MAX
+#undef UACCUM_EPSILON
+#define UACCUM_FBIT __UACCUM_FBIT__
+#define UACCUM_IBIT __UACCUM_IBIT__
+#define UACCUM_MIN __UACCUM_MIN__ /* GCC extension. */
+#define UACCUM_MAX __UACCUM_MAX__
+#define UACCUM_EPSILON __UACCUM_EPSILON__
+
+#undef LACCUM_FBIT
+#undef LACCUM_IBIT
+#undef LACCUM_MIN
+#undef LACCUM_MAX
+#undef LACCUM_EPSILON
+#define LACCUM_FBIT __LACCUM_FBIT__
+#define LACCUM_IBIT __LACCUM_IBIT__
+#define LACCUM_MIN __LACCUM_MIN__
+#define LACCUM_MAX __LACCUM_MAX__
+#define LACCUM_EPSILON __LACCUM_EPSILON__
+
+#undef ULACCUM_FBIT
+#undef ULACCUM_IBIT
+#undef ULACCUM_MIN
+#undef ULACCUM_MAX
+#undef ULACCUM_EPSILON
+#define ULACCUM_FBIT __ULACCUM_FBIT__
+#define ULACCUM_IBIT __ULACCUM_IBIT__
+#define ULACCUM_MIN __ULACCUM_MIN__ /* GCC extension. */
+#define ULACCUM_MAX __ULACCUM_MAX__
+#define ULACCUM_EPSILON __ULACCUM_EPSILON__
+
+#undef LLACCUM_FBIT
+#undef LLACCUM_IBIT
+#undef LLACCUM_MIN
+#undef LLACCUM_MAX
+#undef LLACCUM_EPSILON
+#define LLACCUM_FBIT __LLACCUM_FBIT__ /* GCC extension. */
+#define LLACCUM_IBIT __LLACCUM_IBIT__ /* GCC extension. */
+#define LLACCUM_MIN __LLACCUM_MIN__ /* GCC extension. */
+#define LLACCUM_MAX __LLACCUM_MAX__ /* GCC extension. */
+#define LLACCUM_EPSILON __LLACCUM_EPSILON__ /* GCC extension. */
+
+#undef ULLACCUM_FBIT
+#undef ULLACCUM_IBIT
+#undef ULLACCUM_MIN
+#undef ULLACCUM_MAX
+#undef ULLACCUM_EPSILON
+#define ULLACCUM_FBIT __ULLACCUM_FBIT__ /* GCC extension. */
+#define ULLACCUM_IBIT __ULLACCUM_IBIT__ /* GCC extension. */
+#define ULLACCUM_MIN __ULLACCUM_MIN__ /* GCC extension. */
+#define ULLACCUM_MAX __ULLACCUM_MAX__ /* GCC extension. */
+#define ULLACCUM_EPSILON __ULLACCUM_EPSILON__ /* GCC extension. */
+
+#endif /* _STDFIX_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h
new file mode 100644
index 0000000..a9ba126
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/unwind.h
@@ -0,0 +1,281 @@
+/* Header file for the ARM EABI unwinder
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Paul Brook
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Language-independent unwinder header public defines. This contains both
+ ABI defined objects, and GNU support routines. */
+
+#ifndef UNWIND_ARM_H
+#define UNWIND_ARM_H
+
+#define __ARM_EABI_UNWINDER__ 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ typedef unsigned _Unwind_Word __attribute__((__mode__(__word__)));
+ typedef signed _Unwind_Sword __attribute__((__mode__(__word__)));
+ typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+ typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+ typedef _Unwind_Word _uw;
+ typedef unsigned _uw64 __attribute__((mode(__DI__)));
+ typedef unsigned _uw16 __attribute__((mode(__HI__)));
+ typedef unsigned _uw8 __attribute__((mode(__QI__)));
+
+ typedef enum
+ {
+ _URC_OK = 0, /* operation completed successfully */
+ _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+ _URC_END_OF_STACK = 5,
+ _URC_HANDLER_FOUND = 6,
+ _URC_INSTALL_CONTEXT = 7,
+ _URC_CONTINUE_UNWIND = 8,
+ _URC_FAILURE = 9 /* unspecified failure of some kind */
+ }
+ _Unwind_Reason_Code;
+
+ typedef enum
+ {
+ _US_VIRTUAL_UNWIND_FRAME = 0,
+ _US_UNWIND_FRAME_STARTING = 1,
+ _US_UNWIND_FRAME_RESUME = 2,
+ _US_ACTION_MASK = 3,
+ _US_FORCE_UNWIND = 8,
+ _US_END_OF_STACK = 16
+ }
+ _Unwind_State;
+
+ /* Provided only for for compatibility with existing code. */
+ typedef int _Unwind_Action;
+#define _UA_SEARCH_PHASE 1
+#define _UA_CLEANUP_PHASE 2
+#define _UA_HANDLER_FRAME 4
+#define _UA_FORCE_UNWIND 8
+#define _UA_END_OF_STACK 16
+#define _URC_NO_REASON _URC_OK
+
+ typedef struct _Unwind_Control_Block _Unwind_Control_Block;
+ typedef struct _Unwind_Context _Unwind_Context;
+ typedef _uw _Unwind_EHT_Header;
+
+
+ /* UCB: */
+
+ struct _Unwind_Control_Block
+ {
+ char exception_class[8];
+ void (*exception_cleanup)(_Unwind_Reason_Code, _Unwind_Control_Block *);
+ /* Unwinder cache, private fields for the unwinder's use */
+ struct
+ {
+ _uw reserved1; /* Forced unwind stop fn, 0 if not forced */
+ _uw reserved2; /* Personality routine address */
+ _uw reserved3; /* Saved callsite address */
+ _uw reserved4; /* Forced unwind stop arg */
+ _uw reserved5;
+ }
+ unwinder_cache;
+ /* Propagation barrier cache (valid after phase 1): */
+ struct
+ {
+ _uw sp;
+ _uw bitpattern[5];
+ }
+ barrier_cache;
+ /* Cleanup cache (preserved over cleanup): */
+ struct
+ {
+ _uw bitpattern[4];
+ }
+ cleanup_cache;
+ /* Pr cache (for pr's benefit): */
+ struct
+ {
+ _uw fnstart; /* function start address */
+ _Unwind_EHT_Header *ehtp; /* pointer to EHT entry header word */
+ _uw additional; /* additional data */
+ _uw reserved1;
+ }
+ pr_cache;
+ long long int :0; /* Force alignment to 8-byte boundary */
+ };
+
+ /* Virtual Register Set*/
+
+ typedef enum
+ {
+ _UVRSC_CORE = 0, /* integer register */
+ _UVRSC_VFP = 1, /* vfp */
+ _UVRSC_FPA = 2, /* fpa */
+ _UVRSC_WMMXD = 3, /* Intel WMMX data register */
+ _UVRSC_WMMXC = 4 /* Intel WMMX control register */
+ }
+ _Unwind_VRS_RegClass;
+
+ typedef enum
+ {
+ _UVRSD_UINT32 = 0,
+ _UVRSD_VFPX = 1,
+ _UVRSD_FPAX = 2,
+ _UVRSD_UINT64 = 3,
+ _UVRSD_FLOAT = 4,
+ _UVRSD_DOUBLE = 5
+ }
+ _Unwind_VRS_DataRepresentation;
+
+ typedef enum
+ {
+ _UVRSR_OK = 0,
+ _UVRSR_NOT_IMPLEMENTED = 1,
+ _UVRSR_FAILED = 2
+ }
+ _Unwind_VRS_Result;
+
+ /* Frame unwinding state. */
+ typedef struct
+ {
+ /* The current word (bytes packed msb first). */
+ _uw data;
+ /* Pointer to the next word of data. */
+ _uw *next;
+ /* The number of bytes left in this word. */
+ _uw8 bytes_left;
+ /* The number of words pointed to by ptr. */
+ _uw8 words_left;
+ }
+ __gnu_unwind_state;
+
+ typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State,
+ _Unwind_Control_Block *, _Unwind_Context *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Set(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation,
+ void *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Get(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation,
+ void *);
+
+ _Unwind_VRS_Result _Unwind_VRS_Pop(_Unwind_Context *, _Unwind_VRS_RegClass,
+ _uw, _Unwind_VRS_DataRepresentation);
+
+
+ /* Support functions for the PR. */
+#define _Unwind_Exception _Unwind_Control_Block
+ typedef char _Unwind_Exception_Class[8];
+
+ void * _Unwind_GetLanguageSpecificData (_Unwind_Context *);
+ _Unwind_Ptr _Unwind_GetRegionStart (_Unwind_Context *);
+
+ /* These two should never be used. */
+ _Unwind_Ptr _Unwind_GetDataRelBase (_Unwind_Context *);
+ _Unwind_Ptr _Unwind_GetTextRelBase (_Unwind_Context *);
+
+ /* Interface functions: */
+ _Unwind_Reason_Code _Unwind_RaiseException(_Unwind_Control_Block *ucbp);
+ void __attribute__((noreturn)) _Unwind_Resume(_Unwind_Control_Block *ucbp);
+ _Unwind_Reason_Code _Unwind_Resume_or_Rethrow (_Unwind_Control_Block *ucbp);
+
+ typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
+ (int, _Unwind_Action, _Unwind_Exception_Class,
+ _Unwind_Control_Block *, struct _Unwind_Context *, void *);
+ _Unwind_Reason_Code _Unwind_ForcedUnwind (_Unwind_Control_Block *,
+ _Unwind_Stop_Fn, void *);
+ /* @@@ Use unwind data to perform a stack backtrace. The trace callback
+ is called for every stack frame in the call chain, but no cleanup
+ actions are performed. */
+ typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn) (_Unwind_Context *, void *);
+ _Unwind_Reason_Code _Unwind_Backtrace(_Unwind_Trace_Fn,
+ void*);
+
+ _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *);
+ void _Unwind_Complete(_Unwind_Control_Block *ucbp);
+ void _Unwind_DeleteException (_Unwind_Exception *);
+
+ _Unwind_Reason_Code __gnu_unwind_frame (_Unwind_Control_Block *,
+ _Unwind_Context *);
+ _Unwind_Reason_Code __gnu_unwind_execute (_Unwind_Context *,
+ __gnu_unwind_state *);
+
+ /* Decode an R_ARM_TARGET2 relocation. */
+ static inline _Unwind_Word
+ _Unwind_decode_target2 (_Unwind_Word ptr)
+ {
+ _Unwind_Word tmp;
+
+ tmp = *(_Unwind_Word *) ptr;
+ /* Zero values are always NULL. */
+ if (!tmp)
+ return 0;
+
+#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
+ /* Pc-relative indirect. */
+ tmp += ptr;
+ tmp = *(_Unwind_Word *) tmp;
+#elif defined(__symbian__) || defined(__uClinux__)
+ /* Absolute pointer. Nothing more to do. */
+#else
+ /* Pc-relative pointer. */
+ tmp += ptr;
+#endif
+ return tmp;
+ }
+
+ static inline _Unwind_Word
+ _Unwind_GetGR (_Unwind_Context *context, int regno)
+ {
+ _uw val;
+ _Unwind_VRS_Get (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+ return val;
+ }
+
+ /* Return the address of the instruction, not the actual IP value. */
+#define _Unwind_GetIP(context) \
+ (_Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+#define _Unwind_GetIPInfo(context, ip_before_insn) \
+ (*ip_before_insn = 0, _Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+ static inline void
+ _Unwind_SetGR (_Unwind_Context *context, int regno, _Unwind_Word val)
+ {
+ _Unwind_VRS_Set (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+ }
+
+ /* The dwarf unwinder doesn't understand arm/thumb state. We assume the
+ landing pad uses the same instruction set as the call site. */
+#define _Unwind_SetIP(context, val) \
+ _Unwind_SetGR (context, 15, val | (_Unwind_GetGR (context, 15) & 1))
+
+/* leb128 type numbers have a potentially unlimited size.
+ The target of the following definitions of _sleb128_t and _uleb128_t
+ is to have efficient data types large enough to hold the leb128 type
+ numbers used in the unwind code. */
+typedef long _sleb128_t;
+typedef unsigned long _uleb128_t;
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* defined UNWIND_ARM_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h
new file mode 100644
index 0000000..4b9803e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/include/varargs.h
@@ -0,0 +1,7 @@
+#ifndef _VARARGS_H
+#define _VARARGS_H
+
+#error "GCC no longer implements <varargs.h>."
+#error "Revise your code to use <stdarg.h>."
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list
new file mode 100644
index 0000000..092bc2b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc_list
@@ -0,0 +1 @@
+;
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h
new file mode 100644
index 0000000..a362802
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/gsyslimits.h
@@ -0,0 +1,8 @@
+/* syslimits.h stands for the system's own limits.h file.
+ If we can use it ok unmodified, then we install this text.
+ If fixincludes fixes it, then the fixed version is installed
+ instead of this text. */
+
+#define _GCC_NEXT_LIMITS_H /* tell gcc's limits.h to recurse */
+#include_next <limits.h>
+#undef _GCC_NEXT_LIMITS_H
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README
new file mode 100644
index 0000000..7086a77
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process. They are
+system-specific, and will not work on any other kind of system. They
+are also not part of GCC. The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix. As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h
new file mode 100644
index 0000000..30e08a7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/include/limits.h
@@ -0,0 +1,125 @@
+/* This administrivia gets added to the beginning of limits.h
+ if the system has its own version of limits.h. */
+
+/* We use _GCC_LIMITS_H_ because we want this not to match
+ any macros that the system's limits.h uses for its own purposes. */
+#ifndef _GCC_LIMITS_H_ /* Terminated in limity.h. */
+#define _GCC_LIMITS_H_
+
+#ifndef _LIBC_LIMITS_H_
+/* Use "..." so that we find syslimits.h only in this same directory. */
+#include "syslimits.h"
+#endif
+#ifndef _LIMITS_H___
+#define _LIMITS_H___
+
+/* Number of bits in a `char'. */
+#undef CHAR_BIT
+#define CHAR_BIT __CHAR_BIT__
+
+/* Maximum length of a multibyte character. */
+#ifndef MB_LEN_MAX
+#define MB_LEN_MAX 1
+#endif
+
+/* Minimum and maximum values a `signed char' can hold. */
+#undef SCHAR_MIN
+#define SCHAR_MIN (-SCHAR_MAX - 1)
+#undef SCHAR_MAX
+#define SCHAR_MAX __SCHAR_MAX__
+
+/* Maximum value an `unsigned char' can hold. (Minimum is 0). */
+#undef UCHAR_MAX
+#if __SCHAR_MAX__ == __INT_MAX__
+# define UCHAR_MAX (SCHAR_MAX * 2U + 1U)
+#else
+# define UCHAR_MAX (SCHAR_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `char' can hold. */
+#ifdef __CHAR_UNSIGNED__
+# undef CHAR_MIN
+# if __SCHAR_MAX__ == __INT_MAX__
+# define CHAR_MIN 0U
+# else
+# define CHAR_MIN 0
+# endif
+# undef CHAR_MAX
+# define CHAR_MAX UCHAR_MAX
+#else
+# undef CHAR_MIN
+# define CHAR_MIN SCHAR_MIN
+# undef CHAR_MAX
+# define CHAR_MAX SCHAR_MAX
+#endif
+
+/* Minimum and maximum values a `signed short int' can hold. */
+#undef SHRT_MIN
+#define SHRT_MIN (-SHRT_MAX - 1)
+#undef SHRT_MAX
+#define SHRT_MAX __SHRT_MAX__
+
+/* Maximum value an `unsigned short int' can hold. (Minimum is 0). */
+#undef USHRT_MAX
+#if __SHRT_MAX__ == __INT_MAX__
+# define USHRT_MAX (SHRT_MAX * 2U + 1U)
+#else
+# define USHRT_MAX (SHRT_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `signed int' can hold. */
+#undef INT_MIN
+#define INT_MIN (-INT_MAX - 1)
+#undef INT_MAX
+#define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold. (Minimum is 0). */
+#undef UINT_MAX
+#define UINT_MAX (INT_MAX * 2U + 1U)
+
+/* Minimum and maximum values a `signed long int' can hold.
+ (Same as `int'). */
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX - 1L)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1UL)
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LLONG_MIN
+# define LLONG_MIN (-LLONG_MAX - 1LL)
+# undef LLONG_MAX
+# define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULLONG_MAX
+# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+#endif
+
+#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LONG_LONG_MIN
+# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL)
+# undef LONG_LONG_MAX
+# define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULONG_LONG_MAX
+# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL)
+#endif
+
+#endif /* _LIMITS_H___ */
+/* This administrivia gets added to the end of limits.h
+ if the system has its own version of limits.h. */
+
+#else /* not _GCC_LIMITS_H_ */
+
+#ifdef _GCC_NEXT_LIMITS_H
+#include_next <limits.h> /* recurse down to the real one */
+#endif
+
+#endif /* not _GCC_LIMITS_H_ */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list
new file mode 100644
index 0000000..d28d5cc
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/macro_list
@@ -0,0 +1,2 @@
+linux
+unix
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf
new file mode 100644
index 0000000..ea414f6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders.conf
@@ -0,0 +1,5 @@
+SYSTEM_HEADER_DIR="/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/arm-linux-androideabi-4.4.x/sysroot${sysroot_headers_suffix}/usr/include"
+OTHER_FIXINCLUDES_DIRS=""
+FIXPROTO_DEFINES=""
+STMP_FIXPROTO=""
+STMP_FIXINC="stmp-fixinc"
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a
new file mode 100644
index 0000000..fae194b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcc.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a
new file mode 100644
index 0000000..b13a46d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/libgcov.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ada/gcc-interface/ada-tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ada/gcc-interface/ada-tree.def
new file mode 100644
index 0000000..04643c5
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ada/gcc-interface/ada-tree.def
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * *
+ * GNAT COMPILER COMPONENTS *
+ * *
+ * GNAT-SPECIFIC GCC TREE CODES *
+ * *
+ * Specification *
+ * *
+ * Copyright (C) 1992-2008, Free Software Foundation, Inc. *
+ * *
+ * GNAT is free software; you can redistribute it and/or modify it under *
+ * terms of the GNU General Public License as published by the Free Soft- *
+ * ware Foundation; either version 3, or (at your option) any later ver- *
+ * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
+ * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License *
+ * for more details. You should have received a copy of the GNU General *
+ * Public License along with GCC; see the file COPYING3. If not see *
+ * <http://www.gnu.org/licenses/>. *
+ * *
+ * GNAT was originally developed by the GNAT team at New York University. *
+ * Extensive contributions were provided by Ada Core Technologies Inc. *
+ * *
+ ****************************************************************************/
+
+/* A type that is an unconstrained array itself. This node is never passed
+ to GCC. TREE_TYPE is the type of the fat pointer and TYPE_OBJECT_RECORD_TYPE
+ is the type of a record containing the template and data. */
+
+DEFTREECODE (UNCONSTRAINED_ARRAY_TYPE, "unconstrained_array_type", tcc_type, 0)
+
+/* A reference to an unconstrained array. This node only exists as an
+ intermediate node during the translation of a GNAT tree to a GCC tree;
+ it is never passed to GCC. The only field used is operand 0, which
+ is the fat pointer object. */
+
+DEFTREECODE (UNCONSTRAINED_ARRAY_REF, "unconstrained_array_ref",
+ tcc_reference, 1)
+
+/* An expression that returns an RTL suitable for its type. Operand 0
+ is an expression to be evaluated for side effects only. */
+DEFTREECODE (NULL_EXPR, "null_expr", tcc_expression, 1)
+
+/* Same as PLUS_EXPR, except that no modulo reduction is applied.
+ This is used for loops and never shows up in the tree. */
+DEFTREECODE (PLUS_NOMOD_EXPR, "plus_nomod_expr", tcc_binary, 2)
+
+/* Same as MINUS_EXPR, except that no modulo reduction is applied.
+ This is used for loops and never shows up in the tree. */
+DEFTREECODE (MINUS_NOMOD_EXPR, "minus_nomod_expr", tcc_binary, 2)
+
+/* Same as ADDR_EXPR, except that if the operand represents a bit field,
+ return the address of the byte containing the bit. This is used
+ for the 'Address attribute and never shows up in the tree. */
+DEFTREECODE (ATTR_ADDR_EXPR, "attr_addr_expr", tcc_reference, 1)
+
+/* Here are the tree codes for the statement types known to Ada. These
+ must be at the end of this file to allow IS_ADA_STMT to work. */
+
+/* This is how record_code_position and insert_code_for work. The former
+ makes this tree node, whose operand is a statement. The latter inserts
+ the actual statements into this node. Gimplification consists of
+ just returning the inner statement. */
+DEFTREECODE (STMT_STMT, "stmt_stmt", tcc_statement, 1)
+
+/* A loop. LOOP_STMT_TOP_COND and LOOP_STMT_BOT_COND are the tests to exit a
+ loop at the top and bottom, respectively. LOOP_STMT_UPDATE is the statement
+ to update the loop iterator at the continue point. LOOP_STMT_BODY are the
+ statements in the body of the loop. LOOP_STMT_LABEL points to the LABEL_DECL
+ of the end label of the loop. */
+DEFTREECODE (LOOP_STMT, "loop_stmt", tcc_statement, 5)
+
+/* Conditionally exit a loop. EXIT_STMT_COND is the condition, which, if
+ true, will cause the loop to be exited. If no condition is specified,
+ the loop is unconditionally exited. EXIT_STMT_LABEL is the end label
+ corresponding to the loop to exit. */
+DEFTREECODE (EXIT_STMT, "exit_stmt", tcc_statement, 2)
+
+/* A exception region. REGION_STMT_BODY is the statement to be executed
+ inside the region. REGION_STMT_HANDLE is a statement that represents
+ the exception handlers (usually a BLOCK_STMT of HANDLE_STMTs).
+ REGION_STMT_BLOCK is the BLOCK node for the declarative region, if any. */
+DEFTREECODE (REGION_STMT, "region_stmt", tcc_statement, 3)
+
+/* An exception handler. HANDLER_STMT_ARG is the value to pass to
+ expand_start_catch, HANDLER_STMT_LIST is the list of statements for the
+ handler itself, and HANDLER_STMT_BLOCK is the BLOCK node for this
+ binding. */
+DEFTREECODE (HANDLER_STMT, "handler_stmt", tcc_statement, 3)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/alias.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/alias.h
new file mode 100644
index 0000000..5920b02
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/alias.h
@@ -0,0 +1,54 @@
+/* Exported functions from alias.c
+ Copyright (C) 2004, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_ALIAS_H
+#define GCC_ALIAS_H
+
+#include "coretypes.h"
+
+/* The type of an alias set. Code currently assumes that variables of
+ this type can take the values 0 (the alias set which aliases
+ everything) and -1 (sometimes indicating that the alias set is
+ unknown, sometimes indicating a memory barrier) and -2 (indicating
+ that the alias set should be set to a unique value but has not been
+ set yet). */
+typedef int alias_set_type;
+
+extern alias_set_type new_alias_set (void);
+extern alias_set_type get_alias_set (tree);
+extern alias_set_type get_varargs_alias_set (void);
+extern alias_set_type get_frame_alias_set (void);
+extern bool component_uses_parent_alias_set (const_tree);
+extern bool alias_set_subset_of (alias_set_type, alias_set_type);
+extern void record_alias_subset (alias_set_type, alias_set_type);
+extern void record_component_aliases (tree);
+extern int alias_sets_conflict_p (alias_set_type, alias_set_type);
+extern int alias_sets_must_conflict_p (alias_set_type, alias_set_type);
+extern int objects_must_conflict_p (tree, tree);
+extern int nonoverlapping_memrefs_p (const_rtx, const_rtx);
+extern bool insn_alias_sets_conflict_p (rtx, rtx);
+extern void record_alias_subset (alias_set_type, alias_set_type);
+
+/* This alias set can be used to force a memory to conflict with all
+ other memories, creating a barrier across which no memory reference
+ can move. Note that there are other legacy ways to create such
+ memory barriers, including an address of SCRATCH. */
+#define ALIAS_SET_MEMORY_BARRIER ((alias_set_type) -1)
+
+#endif /* GCC_ALIAS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/all-tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/all-tree.def
new file mode 100644
index 0000000..76dfbc3
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/all-tree.def
@@ -0,0 +1,7 @@
+#include "tree.def"
+END_OF_BASE_TREE_CODES
+#include "c-common.def"
+#include "ada/gcc-interface/ada-tree.def"
+#include "cp/cp-tree.def"
+#include "java/java-tree.def"
+#include "objc/objc-tree.def"
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ansidecl.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ansidecl.h
new file mode 100644
index 0000000..c19955a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ansidecl.h
@@ -0,0 +1,393 @@
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
+ Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ ANSI_PROTOTYPES 1 not defined
+ PTR `void *' `char *'
+ PTRCONST `void *const' `char *'
+ LONG_DOUBLE `long double' `double'
+ const not defined `'
+ volatile not defined `'
+ signed not defined `'
+ VA_START(ap, var) va_start(ap, var) va_start(ap)
+
+ Note that it is safe to write "void foo();" indicating a function
+ with no return value, in all K+R compilers we have been able to test.
+
+ For declaring functions with prototypes, we also provide these:
+
+ PARAMS ((prototype))
+ -- for functions which take a fixed number of arguments. Use this
+ when declaring the function. When defining the function, write a
+ K+R style argument list. For example:
+
+ char *strcpy PARAMS ((char *dest, char *source));
+ ...
+ char *
+ strcpy (dest, source)
+ char *dest;
+ char *source;
+ { ... }
+
+
+ VPARAMS ((prototype, ...))
+ -- for functions which take a variable number of arguments. Use
+ PARAMS to declare the function, VPARAMS to define it. For example:
+
+ int printf PARAMS ((const char *format, ...));
+ ...
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ ...
+ }
+
+ For writing functions which take variable numbers of arguments, we
+ also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These
+ hide the differences between K+R <varargs.h> and C89 <stdarg.h> more
+ thoroughly than the simple VA_START() macro mentioned above.
+
+ VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end.
+ Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls
+ corresponding to the list of fixed arguments. Then use va_arg
+ normally to get the variable arguments, or pass your va_list object
+ around. You do not declare the va_list yourself; VA_OPEN does it
+ for you.
+
+ Here is a complete example:
+
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ int result;
+
+ VA_OPEN (ap, format);
+ VA_FIXEDARG (ap, const char *, format);
+
+ result = vfprintf (stdout, format, ap);
+ VA_CLOSE (ap);
+
+ return result;
+ }
+
+
+ You can declare variables either before or after the VA_OPEN,
+ VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning
+ and end of a block. They must appear at the same nesting level,
+ and any variables declared after VA_OPEN go out of scope at
+ VA_CLOSE. Unfortunately, with a K+R compiler, that includes the
+ argument list. You can have multiple instances of VA_OPEN/VA_CLOSE
+ pairs in a single function in case you need to traverse the
+ argument list more than once.
+
+ For ease of writing code which uses GCC extensions but needs to be
+ portable to other compilers, we provide the GCC_VERSION macro that
+ simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various
+ wrappers around __attribute__. Also, __extension__ will be #defined
+ to nothing if it doesn't work. See below.
+
+ This header also defines a lot of obsolete macros:
+ CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID,
+ AND, DOTS, NOARGS. Don't use them. */
+
+#ifndef _ANSIDECL_H
+#define _ANSIDECL_H 1
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+/* Using MACRO(x,y) in cpp #if conditionals does not work with some
+ older preprocessors. Thus we can't define something like this:
+
+#define HAVE_GCC_VERSION(MAJOR, MINOR) \
+ (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR)))
+
+and then test "#if HAVE_GCC_VERSION(2,7)".
+
+So instead we use the macro below and test it against specific values. */
+
+/* This macro simplifies testing whether we are using gcc, and if it
+ is of a particular minimum version. (Both major & minor numbers are
+ significant.) This macro will evaluate to 0 if we are not using
+ gcc at all. */
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
+#endif /* GCC_VERSION */
+
+#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus))
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other
+ C++ compilers, does not define __STDC__, though it acts as if this
+ was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */
+
+#define ANSI_PROTOTYPES 1
+#define PTR void *
+#define PTRCONST void *const
+#define LONG_DOUBLE long double
+
+/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in
+ a #ifndef. */
+#ifndef PARAMS
+#define PARAMS(ARGS) ARGS
+#endif
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR)
+
+/* variadic function helper macros */
+/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's
+ use without inhibiting further decls and without declaring an
+ actual variable. */
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, T, N) struct Qdmy
+
+#undef const
+#undef volatile
+#undef signed
+
+/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
+ it too, but it's not in C89. */
+#undef inline
+#if __STDC_VERSION__ > 199901L
+/* it's a keyword */
+#else
+# if GCC_VERSION >= 2007
+# define inline __inline__ /* __inline__ prevents -pedantic warnings */
+# else
+# define inline /* nothing */
+# endif
+#endif
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define VOLATILE volatile
+#define SIGNED signed
+
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#define AND ,
+#define DOTS , ...
+#define NOARGS void
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#undef ANSI_PROTOTYPES
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#define PARAMS(args) ()
+#define VPARAMS(args) (va_alist) va_dcl
+#define VA_START(va_list, var) va_start(va_list)
+
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE)
+
+/* some systems define these in header files for non-ansi mode */
+#undef const
+#undef volatile
+#undef signed
+#undef inline
+#define const
+#define volatile
+#define signed
+#define inline
+
+#ifndef IN_GCC
+#define CONST
+#define VOLATILE
+#define SIGNED
+
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#define AND ;
+#define DOTS
+#define NOARGS
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+/* Define macros for some gcc attributes. This permits us to use the
+ macros freely, and know that they will come into play for the
+ version of gcc in which they are supported. */
+
+#if (GCC_VERSION < 2007)
+# define __attribute__(x)
+#endif
+
+/* Attribute __malloc__ on functions was valid as of gcc 2.96. */
+#ifndef ATTRIBUTE_MALLOC
+# if (GCC_VERSION >= 2096)
+# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__))
+# else
+# define ATTRIBUTE_MALLOC
+# endif /* GNUC >= 2.96 */
+#endif /* ATTRIBUTE_MALLOC */
+
+/* Attributes on labels were valid as of gcc 2.93. */
+#ifndef ATTRIBUTE_UNUSED_LABEL
+# if (!defined (__cplusplus) && GCC_VERSION >= 2093)
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif /* !__cplusplus && GNUC >= 2.93 */
+#endif /* ATTRIBUTE_UNUSED_LABEL */
+
+#ifndef ATTRIBUTE_UNUSED
+#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+#endif /* ATTRIBUTE_UNUSED */
+
+/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the
+ identifier name. */
+#if ! defined(__cplusplus) || (GCC_VERSION >= 3004)
+# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED
+#else /* !__cplusplus || GNUC >= 3.4 */
+# define ARG_UNUSED(NAME) NAME
+#endif /* !__cplusplus || GNUC >= 3.4 */
+
+#ifndef ATTRIBUTE_NORETURN
+#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__))
+#endif /* ATTRIBUTE_NORETURN */
+
+/* Attribute `nonnull' was valid as of gcc 3.3. */
+#ifndef ATTRIBUTE_NONNULL
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m)))
+# else
+# define ATTRIBUTE_NONNULL(m)
+# endif /* GNUC >= 3.3 */
+#endif /* ATTRIBUTE_NONNULL */
+
+/* Attribute `pure' was valid as of gcc 3.0. */
+#ifndef ATTRIBUTE_PURE
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_PURE __attribute__ ((__pure__))
+# else
+# define ATTRIBUTE_PURE
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_PURE */
+
+/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL.
+ This was the case for the `printf' format attribute by itself
+ before GCC 3.3, but as of 3.3 we need to add the `nonnull'
+ attribute to retain this behavior. */
+#ifndef ATTRIBUTE_PRINTF
+#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m)
+#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2)
+#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3)
+#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4)
+#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5)
+#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6)
+#endif /* ATTRIBUTE_PRINTF */
+
+/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on
+ a function pointer. Format attributes were allowed on function
+ pointers as of gcc 3.1. */
+#ifndef ATTRIBUTE_FPTR_PRINTF
+# if (GCC_VERSION >= 3001)
+# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n)
+# else
+# define ATTRIBUTE_FPTR_PRINTF(m, n)
+# endif /* GNUC >= 3.1 */
+# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2)
+# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3)
+# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4)
+# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5)
+# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6)
+#endif /* ATTRIBUTE_FPTR_PRINTF */
+
+/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A
+ NULL format specifier was allowed as of gcc 3.3. */
+#ifndef ATTRIBUTE_NULL_PRINTF
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n)))
+# else
+# define ATTRIBUTE_NULL_PRINTF(m, n)
+# endif /* GNUC >= 3.3 */
+# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2)
+# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3)
+# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4)
+# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5)
+# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6)
+#endif /* ATTRIBUTE_NULL_PRINTF */
+
+/* Attribute `sentinel' was valid as of gcc 3.5. */
+#ifndef ATTRIBUTE_SENTINEL
+# if (GCC_VERSION >= 3005)
+# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__))
+# else
+# define ATTRIBUTE_SENTINEL
+# endif /* GNUC >= 3.5 */
+#endif /* ATTRIBUTE_SENTINEL */
+
+
+#ifndef ATTRIBUTE_ALIGNED_ALIGNOF
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m))))
+# else
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m)
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */
+
+/* Useful for structures whose layout must much some binary specification
+ regardless of the alignment and padding qualities of the compiler. */
+#ifndef ATTRIBUTE_PACKED
+# define ATTRIBUTE_PACKED __attribute__ ((packed))
+#endif
+
+/* Attribute `hot' and `cold' was valid as of gcc 4.3. */
+#ifndef ATTRIBUTE_COLD
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_COLD __attribute__ ((__cold__))
+# else
+# define ATTRIBUTE_COLD
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_COLD */
+#ifndef ATTRIBUTE_HOT
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_HOT __attribute__ ((__hot__))
+# else
+# define ATTRIBUTE_HOT
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_HOT */
+
+/* We use __extension__ in some places to suppress -pedantic warnings
+ about GCC extensions. This feature didn't work properly before
+ gcc 2.8. */
+#if GCC_VERSION < 2008
+#define __extension__
+#endif
+
+#endif /* ansidecl.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/auto-host.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/auto-host.h
new file mode 100644
index 0000000..a923adf
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/auto-host.h
@@ -0,0 +1,1639 @@
+/* auto-host.h. Generated by configure. */
+/* config.in. Generated from configure.ac by autoheader. */
+
+/* Define as the number of bits in a byte, if `limits.h' doesn't. */
+#ifndef USED_FOR_TARGET
+/* #undef CHAR_BIT */
+#endif
+
+
+/* Define 0/1 to force the choice for exception handling model. */
+#ifndef USED_FOR_TARGET
+#define CONFIG_SJLJ_EXCEPTIONS 0
+#endif
+
+
+/* Define to enable the use of a default assembler. */
+#ifndef USED_FOR_TARGET
+/* #undef DEFAULT_ASSEMBLER */
+#endif
+
+
+/* Define to enable the use of a default linker. */
+#ifndef USED_FOR_TARGET
+/* #undef DEFAULT_LINKER */
+#endif
+
+
+/* Define if you want to use __cxa_atexit, rather than atexit, to register C++
+ destructors for local statics and global objects. This is essential for
+ fully standards-compliant handling of destructors, but requires
+ __cxa_atexit in libc. */
+#ifndef USED_FOR_TARGET
+#define DEFAULT_USE_CXA_ATEXIT 2
+#endif
+
+
+/* Define if you want assertions enabled. This is a cheap check. */
+#ifndef USED_FOR_TARGET
+#define ENABLE_ASSERT_CHECKING 1
+#endif
+
+
+/* Define if you want more run-time sanity checks. This one gets a grab bag of
+ miscellaneous but relatively cheap checks. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_CHECKING */
+#endif
+
+
+/* Define to 1 to enable crtbeginTS.o. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_CRTBEGINTS */
+#endif
+
+
+/* Define to 1 to specify that we are using the BID decimal floating point
+ format instead of DPD */
+#ifndef USED_FOR_TARGET
+#define ENABLE_DECIMAL_BID_FORMAT 0
+#endif
+
+
+/* Define to 1 to enable decimal float extension to C. */
+#ifndef USED_FOR_TARGET
+#define ENABLE_DECIMAL_FLOAT 0
+#endif
+
+
+/* Define if you want more run-time sanity checks for dataflow. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_DF_CHECKING */
+#endif
+
+
+/* Define to 1 to enable esp. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_ESP */
+#endif
+
+
+/* Define to 1 to enable fixed-point arithmetic extension to C. */
+#ifndef USED_FOR_TARGET
+#define ENABLE_FIXED_POINT 0
+#endif
+
+
+/* Define if you want fold checked that it never destructs its argument. This
+ is quite expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_FOLD_CHECKING */
+#endif
+
+
+/* Define if you want the garbage collector to operate in maximally paranoid
+ mode, validating the entire heap and collecting garbage at every
+ opportunity. This is extremely expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_GC_ALWAYS_COLLECT */
+#endif
+
+
+/* Define if you want the garbage collector to do object poisoning and other
+ memory allocation checks. This is quite expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_GC_CHECKING */
+#endif
+
+
+/* Define if you want operations on GIMPLE (the basic data structure of the
+ high-level optimizers) to be checked for dynamic type safety at runtime.
+ This is moderately expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_GIMPLE_CHECKING */
+#endif
+
+
+/* Define if gcc should always pass --build-id to linker. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_LD_BUILDID */
+#endif
+
+
+/* Define to 1 if translation of program messages to the user's native
+ language is requested. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_NLS */
+#endif
+
+
+/* Define to enable plugin support. */
+#ifndef USED_FOR_TARGET
+#define ENABLE_PLUGIN 1
+#endif
+
+
+/* Define if you want all operations on RTL (the basic data structure of the
+ optimizer and back end) to be checked for dynamic type safety at runtime.
+ This is quite expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_RTL_CHECKING */
+#endif
+
+
+/* Define if you want RTL flag accesses to be checked against the RTL codes
+ that are supported for each access macro. This is relatively cheap. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_RTL_FLAG_CHECKING */
+#endif
+
+
+/* Define if you want runtime assertions enabled. This is a cheap check. */
+#define ENABLE_RUNTIME_CHECKING 1
+
+/* Define if you want all operations on trees (the basic data structure of the
+ front ends) to be checked for dynamic type safety at runtime. This is
+ moderately expensive. The tree browser debugging routines will also be
+ enabled by this option. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_TREE_CHECKING */
+#endif
+
+
+/* Define if you want all gimple types to be verified after gimplifiation.
+ This is cheap. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_TYPES_CHECKING */
+#endif
+
+
+/* Define if you want to run subprograms and generated programs through
+ valgrind (a memory checker). This is extremely expensive. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_VALGRIND_CHECKING */
+#endif
+
+
+/* Define to 1 if installation paths should be looked up in the Windows
+ Registry. Ignored on non-Windows hosts. */
+#ifndef USED_FOR_TARGET
+/* #undef ENABLE_WIN32_REGISTRY */
+#endif
+
+
+/* Define to the name of a file containing a list of extra machine modes for
+ this architecture. */
+#ifndef USED_FOR_TARGET
+#define EXTRA_MODES_FILE "config/arm/arm-modes.def"
+#endif
+
+
+/* Define to enable detailed memory allocation stats gathering. */
+#ifndef USED_FOR_TARGET
+/* #undef GATHER_STATISTICS */
+#endif
+
+
+/* Define to the type of elements in the array set by `getgroups'. Usually
+ this is either `int' or `gid_t'. */
+#ifndef USED_FOR_TARGET
+#define GETGROUPS_T gid_t
+#endif
+
+
+/* Define if the zone collector is in use */
+#ifndef USED_FOR_TARGET
+/* #undef GGC_ZONE */
+#endif
+
+
+/* mcontext_t fields start with __ */
+#ifndef USED_FOR_TARGET
+/* #undef HAS_MCONTEXT_T_UNDERSCORES */
+#endif
+
+
+/* Define if your assembler supports cmpb. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_CMPB */
+#endif
+
+
+/* Define if your assembler supports the --debug-prefix-map option. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_DEBUG_PREFIX_MAP 1
+#endif
+
+
+/* Define if your assembler supports DFP instructions. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_DFP */
+#endif
+
+
+/* Define if your assembler supports .dtprelword. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_DTPRELWORD */
+#endif
+
+
+/* Define if your assembler supports dwarf2 .file/.loc directives, and
+ preserves file table indices exactly as given. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_DWARF2_DEBUG_LINE 1
+#endif
+
+
+/* Define if your assembler supports explicit relocations. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_EXPLICIT_RELOCS */
+#endif
+
+
+/* Define if your assembler supports fprnd. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_FPRND */
+#endif
+
+
+/* Define if your assembler supports the --gdwarf2 option. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_GDWARF2_DEBUG_FLAG 1
+#endif
+
+
+/* Define if your assembler supports .gnu_attribute. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_GNU_ATTRIBUTE */
+#endif
+
+
+/* Define true if the assembler supports '.long foo@GOTOFF'. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_GOTOFF_IN_DATA */
+#endif
+
+
+/* Define if your assembler supports the --gstabs option. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_GSTABS_DEBUG_FLAG 1
+#endif
+
+
+/* Define if your assembler supports the Sun syntax for cmov. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_IX86_CMOV_SUN_SYNTAX */
+#endif
+
+
+/* Define if your assembler supports the subtraction of symbols in different
+ sections. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_IX86_DIFF_SECT_DELTA */
+#endif
+
+
+/* Define if your assembler supports the ffreep mnemonic. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_IX86_FFREEP */
+#endif
+
+
+/* Define if your assembler supports the sahf mnemonic. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_IX86_SAHF */
+#endif
+
+
+/* Define if your assembler supports the lituse_jsrdirect relocation. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_JSRDIRECT_RELOCS */
+#endif
+
+
+/* Define if your assembler supports .sleb128 and .uleb128. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_LEB128 1
+#endif
+
+
+/* Define if the assembler won't complain about a line such as # 0 "" 2. */
+#ifndef USED_FOR_TARGET
+#define HAVE_AS_LINE_ZERO 1
+#endif
+
+
+/* Define if your assembler supports ltoffx and ldxmov relocations. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_LTOFFX_LDXMOV_RELOCS */
+#endif
+
+
+/* Define if your assembler supports mfcr field. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_MFCRF */
+#endif
+
+
+/* Define if your assembler supports mffgpr and mftgpr. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_MFPGPR */
+#endif
+
+
+/* Define if your assembler supports the -no-mul-bug-abort option. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_NO_MUL_BUG_ABORT_OPTION */
+#endif
+
+
+/* Define if the assembler understands -mno-shared. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_NO_SHARED */
+#endif
+
+
+/* Define if your assembler supports offsetable %lo(). */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_OFFSETABLE_LO10 */
+#endif
+
+
+/* Define if your assembler supports popcntb field. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_POPCNTB */
+#endif
+
+
+/* Define if your assembler supports .register. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_REGISTER_PSEUDO_OP */
+#endif
+
+
+/* Define if your assembler supports R_PPC_REL16 relocs. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_REL16 */
+#endif
+
+
+/* Define if your assembler supports -relax option. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_RELAX_OPTION */
+#endif
+
+
+/* Define if your assembler and linker support unaligned PC relative relocs.
+ */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_SPARC_UA_PCREL */
+#endif
+
+
+/* Define if your assembler and linker support unaligned PC relative relocs
+ against hidden symbols. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_SPARC_UA_PCREL_HIDDEN */
+#endif
+
+
+/* Define if your assembler supports thread-local storage. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_TLS */
+#endif
+
+
+/* Define if your assembler supports VSX instructions. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_AS_VSX */
+#endif
+
+
+/* Define to 1 if you have the `atoll' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_ATOLL 1
+#endif
+
+
+/* Define to 1 if you have the `atoq' function. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_ATOQ */
+#endif
+
+
+/* Define to 1 if you have the `clearerr_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_CLEARERR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `clock' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_CLOCK 1
+#endif
+
+
+/* Define if <time.h> defines clock_t. */
+#ifndef USED_FOR_TARGET
+#define HAVE_CLOCK_T 1
+#endif
+
+
+/* Define 0/1 if your assembler and linker support COMDAT groups. */
+#ifndef USED_FOR_TARGET
+#define HAVE_COMDAT_GROUP 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'abort', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_ABORT 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'asprintf', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_ASPRINTF 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'atof', otherwise define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_ATOF 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'atol', otherwise define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_ATOL 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'basename', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_BASENAME 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'calloc', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_CALLOC 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'clearerr_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_CLEARERR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'clock', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_CLOCK 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'errno', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_ERRNO 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'feof_unlocked', otherwise define
+ to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FEOF_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'ferror_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FERROR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fflush_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FFLUSH_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fgetc_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FGETC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fgets_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FGETS_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fileno_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FILENO_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fprintf_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FPRINTF_UNLOCKED 0
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fputc_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FPUTC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fputs_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FPUTS_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fread_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FREAD_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'free', otherwise define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FREE 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'fwrite_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_FWRITE_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getchar_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETCHAR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getcwd', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETCWD 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getc_unlocked', otherwise define
+ to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getenv', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETENV 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getopt', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETOPT 0
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getpagesize', otherwise define
+ to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETPAGESIZE 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getrlimit', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETRLIMIT 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getrusage', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETRUSAGE 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'getwd', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_GETWD 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'ldgetname', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_LDGETNAME 0
+#endif
+
+
+/* Define to 1 if we found a declaration for 'malloc', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_MALLOC 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'putchar_unlocked', otherwise
+ define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_PUTCHAR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'putc_unlocked', otherwise define
+ to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_PUTC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'realloc', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_REALLOC 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'sbrk', otherwise define to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_SBRK 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'setrlimit', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_SETRLIMIT 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'sigaltstack', otherwise define
+ to 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_SIGALTSTACK 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'snprintf', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_SNPRINTF 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'strsignal', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_STRSIGNAL 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'strstr', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_STRSTR 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'strverscmp', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_STRVERSCMP 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'times', otherwise define to 0.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_TIMES 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'vasprintf', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_VASPRINTF 1
+#endif
+
+
+/* Define to 1 if we found a declaration for 'vsnprintf', otherwise define to
+ 0. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DECL_VSNPRINTF 1
+#endif
+
+
+/* Define to 1 if you have the <direct.h> header file. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_DIRECT_H */
+#endif
+
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_DLFCN_H 1
+#endif
+
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FCNTL_H 1
+#endif
+
+
+/* Define to 1 if you have the `feof_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FEOF_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `ferror_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FERROR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fflush_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FFLUSH_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fgetc_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FGETC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fgets_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FGETS_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fileno_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FILENO_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fork' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FORK 1
+#endif
+
+
+/* Define to 1 if you have the `fprintf_unlocked' function. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_FPRINTF_UNLOCKED */
+#endif
+
+
+/* Define to 1 if you have the `fputc_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FPUTC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fputs_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FPUTS_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fread_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FREAD_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `fwrite_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_FWRITE_UNLOCKED 1
+#endif
+
+
+/* Define if your assembler supports .balign and .p2align. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_BALIGN_AND_P2ALIGN 1
+#endif
+
+
+/* Define 0/1 if your assembler supports CFI directives. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_CFI_DIRECTIVE 1
+#endif
+
+
+/* Define 0/1 if your assembler supports .cfi_personality. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_CFI_PERSONALITY_DIRECTIVE 1
+#endif
+
+
+/* Define if your assembler supports the .loc discriminator sub-directive. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_DISCRIMINATOR 1
+#endif
+
+
+/* Define 0/1 if your assembler supports .cfi_sections. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_CFI_SECTIONS_DIRECTIVE 1
+#endif
+
+
+/* Define if your assembler uses the new HImode fild and fist notation. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_GAS_FILDS_FISTS */
+#endif
+
+
+/* Define if your assembler and linker support .hidden. */
+#define HAVE_GAS_HIDDEN 1
+
+/* Define if your assembler supports .lcomm with an alignment field. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_GAS_LCOMM_WITH_ALIGNMENT */
+#endif
+
+
+/* Define if your assembler supports .literal16. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_GAS_LITERAL16 */
+#endif
+
+
+/* Define if your assembler supports specifying the maximum number of bytes to
+ skip when using the GAS .p2align command. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_MAX_SKIP_P2ALIGN 1
+#endif
+
+
+/* Define if your assembler supports .nsubspa comdat option. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_GAS_NSUBSPA_COMDAT */
+#endif
+
+
+/* Define if your assembler and linker support 32-bit section relative relocs
+ via '.secrel32 label'. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_GAS_PE_SECREL32_RELOC */
+#endif
+
+
+/* Define 0/1 if your assembler supports marking sections with SHF_MERGE flag.
+ */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_SHF_MERGE 1
+#endif
+
+
+/* Define if your assembler supports .subsection and .subsection -1 starts
+ emitting at the beginning of your section. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_SUBSECTION_ORDERING 1
+#endif
+
+
+/* Define if your assembler supports .weak. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_WEAK 1
+#endif
+
+
+/* Define if your assembler supports .weakref. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GAS_WEAKREF 1
+#endif
+
+
+/* Define to 1 if you have the `getchar_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETCHAR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `getc_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETC_UNLOCKED 1
+#endif
+
+
+/* Define if _Unwind_GetIPInfo is available. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETIPINFO 1
+#endif
+
+
+/* Define to 1 if you have the `getrlimit' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETRLIMIT 1
+#endif
+
+
+/* Define to 1 if you have the `getrusage' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETRUSAGE 1
+#endif
+
+
+/* Define to 1 if you have the `gettimeofday' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GETTIMEOFDAY 1
+#endif
+
+
+/* Define if using GNU as. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GNU_AS 1
+#endif
+
+
+/* Define if using GNU ld. */
+#ifndef USED_FOR_TARGET
+#define HAVE_GNU_LD 1
+#endif
+
+
+/* Define if you have the iconv() function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_ICONV 1
+#endif
+
+
+/* Define to 1 if you have the <iconv.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_ICONV_H 1
+#endif
+
+
+/* Define .init_array/.fini_array sections are available and working. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_INITFINI_ARRAY */
+#endif
+
+
+/* Define if you have a working <inttypes.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_INTTYPES_H 1
+#endif
+
+
+/* Define to 1 if you have the `kill' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_KILL 1
+#endif
+
+
+/* Define if you have <langinfo.h> and nl_langinfo(CODESET). */
+#ifndef USED_FOR_TARGET
+#define HAVE_LANGINFO_CODESET 1
+#endif
+
+
+/* Define to 1 if you have the <langinfo.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LANGINFO_H 1
+#endif
+
+
+/* Define if your <locale.h> file defines LC_MESSAGES. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LC_MESSAGES 1
+#endif
+
+
+/* Define to 1 if you have the <ldfcn.h> header file. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_LDFCN_H */
+#endif
+
+
+/* Define if your linker supports --as-needed and --no-as-needed options. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_AS_NEEDED 1
+#endif
+
+
+/* Define if your linker supports --build-id. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_BUILDID 1
+#endif
+
+
+/* Define if your linker supports --demangle option. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_LD_DEMANGLE */
+#endif
+
+
+/* Define if your linker supports --eh-frame-hdr option. */
+#define HAVE_LD_EH_FRAME_HDR 1
+
+/* Define if your linker supports garbage collection of sections in presence
+ of EH frames. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_LD_EH_GC_SECTIONS */
+#endif
+
+
+/* Define if your PowerPC64 linker only needs function descriptor syms. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_LD_NO_DOT_SYMS */
+#endif
+
+
+/* Define if your linker supports -pie option. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_PIE 1
+#endif
+
+
+/* Define if your linker links a mix of read-only and read-write sections into
+ a read-write section. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_RO_RW_SECTION_MIXING 1
+#endif
+
+
+/* Define if your linker supports -Bstatic/-Bdynamic option. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_STATIC_DYNAMIC 1
+#endif
+
+
+/* Define if your linker supports --sysroot. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LD_SYSROOT 1
+#endif
+
+
+/* Define to 1 if you have the <limits.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LIMITS_H 1
+#endif
+
+
+/* Define to 1 if you have the <locale.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LOCALE_H 1
+#endif
+
+
+/* Define to 1 if the system has the type `long long'. */
+#ifndef USED_FOR_TARGET
+#define HAVE_LONG_LONG 1
+#endif
+
+
+/* Define to 1 if you have the <malloc.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MALLOC_H 1
+#endif
+
+
+/* Define to 1 if you have the `mbstowcs' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MBSTOWCS 1
+#endif
+
+
+/* Define if valgrind's memcheck.h header is installed. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_MEMCHECK_H */
+#endif
+
+
+/* Define to 1 if you have the <memory.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MEMORY_H 1
+#endif
+
+
+/* Define to 1 if you have the `mincore' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MINCORE 1
+#endif
+
+
+/* Define to 1 if you have the `mmap' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MMAP 1
+#endif
+
+
+/* Define if mmap with MAP_ANON(YMOUS) works. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MMAP_ANON 1
+#endif
+
+
+/* Define if mmap of /dev/zero works. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MMAP_DEV_ZERO 1
+#endif
+
+
+/* Define if read-only mmap of a plain file works. */
+#ifndef USED_FOR_TARGET
+#define HAVE_MMAP_FILE 1
+#endif
+
+
+/* Define to 1 if you have the `nl_langinfo' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_NL_LANGINFO 1
+#endif
+
+
+/* Define to 1 if you have the `putchar_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_PUTCHAR_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `putc_unlocked' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_PUTC_UNLOCKED 1
+#endif
+
+
+/* Define to 1 if you have the `setlocale' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SETLOCALE 1
+#endif
+
+
+/* Define to 1 if you have the `setrlimit' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SETRLIMIT 1
+#endif
+
+
+/* Define to 1 if you have the <stddef.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STDDEF_H 1
+#endif
+
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STDINT_H 1
+#endif
+
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STDLIB_H 1
+#endif
+
+
+/* Define to 1 if you have the <strings.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STRINGS_H 1
+#endif
+
+
+/* Define to 1 if you have the <string.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STRING_H 1
+#endif
+
+
+/* Define to 1 if you have the `strsignal' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STRSIGNAL 1
+#endif
+
+
+/* Define if <sys/times.h> defines struct tms. */
+#ifndef USED_FOR_TARGET
+#define HAVE_STRUCT_TMS 1
+#endif
+
+
+/* Define to 1 if you have the `sysconf' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYSCONF 1
+#endif
+
+
+/* Define to 1 if you have the <sys/file.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_FILE_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/mman.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_MMAN_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_PARAM_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_RESOURCE_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_STAT_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/times.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_TIMES_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_TIME_H 1
+#endif
+
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_TYPES_H 1
+#endif
+
+
+/* Define to 1 if you have <sys/wait.h> that is POSIX.1 compatible. */
+#ifndef USED_FOR_TARGET
+#define HAVE_SYS_WAIT_H 1
+#endif
+
+
+/* Define to 1 if you have the `times' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_TIMES 1
+#endif
+
+
+/* Define to 1 if you have the <time.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_TIME_H 1
+#endif
+
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_UNISTD_H 1
+#endif
+
+
+/* Define if valgrind's valgrind/memcheck.h header is installed. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_VALGRIND_MEMCHECK_H */
+#endif
+
+
+/* Define to 1 if you have the `vfork' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_VFORK 1
+#endif
+
+
+/* Define to 1 if you have the <vfork.h> header file. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_VFORK_H */
+#endif
+
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#ifndef USED_FOR_TARGET
+#define HAVE_WCHAR_H 1
+#endif
+
+
+/* Define to 1 if you have the `wcswidth' function. */
+#ifndef USED_FOR_TARGET
+#define HAVE_WCSWIDTH 1
+#endif
+
+
+/* Define to 1 if `fork' works. */
+#ifndef USED_FOR_TARGET
+#define HAVE_WORKING_FORK 1
+#endif
+
+
+/* Define this macro if mbstowcs does not crash when its first argument is
+ NULL. */
+#ifndef USED_FOR_TARGET
+#define HAVE_WORKING_MBSTOWCS 1
+#endif
+
+
+/* Define to 1 if `vfork' works. */
+#ifndef USED_FOR_TARGET
+#define HAVE_WORKING_VFORK 1
+#endif
+
+
+/* Define to 1 if the system has the type `__int64'. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE___INT64 */
+#endif
+
+
+/* Define if cloog is in use. */
+#ifndef USED_FOR_TARGET
+/* #undef HAVE_cloog */
+#endif
+
+
+/* Define as const if the declaration of iconv() needs const. */
+#ifndef USED_FOR_TARGET
+#define ICONV_CONST
+#endif
+
+
+/* Define to the sub-directory in which libtool stores uninstalled libraries.
+ */
+#ifndef USED_FOR_TARGET
+#define LT_OBJDIR ".libs/"
+#endif
+
+
+/* Define if host mkdir takes a single argument. */
+#ifndef USED_FOR_TARGET
+/* #undef MKDIR_TAKES_ONE_ARG */
+#endif
+
+
+/* Define to 1 if HOST_WIDE_INT must be 64 bits wide (see hwint.h). */
+#ifndef USED_FOR_TARGET
+#define NEED_64BIT_HOST_WIDE_INT 1
+#endif
+
+
+/* Define to 1 if your C compiler doesn't accept -c and -o together. */
+#ifndef USED_FOR_TARGET
+/* #undef NO_MINUS_C_MINUS_O */
+#endif
+
+
+/* Define to the address where bug reports for this package should be sent. */
+#ifndef USED_FOR_TARGET
+#define PACKAGE_BUGREPORT ""
+#endif
+
+
+/* Define to the full name of this package. */
+#ifndef USED_FOR_TARGET
+#define PACKAGE_NAME ""
+#endif
+
+
+/* Define to the full name and version of this package. */
+#ifndef USED_FOR_TARGET
+#define PACKAGE_STRING ""
+#endif
+
+
+/* Define to the one symbol short name of this package. */
+#ifndef USED_FOR_TARGET
+#define PACKAGE_TARNAME ""
+#endif
+
+
+/* Define to the version of this package. */
+#ifndef USED_FOR_TARGET
+#define PACKAGE_VERSION ""
+#endif
+
+
+/* Define to PREFIX/include if cpp should also search that directory. */
+#ifndef USED_FOR_TARGET
+/* #undef PREFIX_INCLUDE_DIR */
+#endif
+
+
+/* The size of a `int', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+#define SIZEOF_INT 4
+#endif
+
+
+/* The size of a `long', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+#define SIZEOF_LONG 4
+#endif
+
+
+/* The size of a `long long', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+#define SIZEOF_LONG_LONG 8
+#endif
+
+
+/* The size of a `short', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+#define SIZEOF_SHORT 2
+#endif
+
+
+/* The size of a `void *', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+#define SIZEOF_VOID_P 4
+#endif
+
+
+/* The size of a `__int64', as computed by sizeof. */
+#ifndef USED_FOR_TARGET
+/* #undef SIZEOF___INT64 */
+#endif
+
+
+/* Define to 1 if you have the ANSI C header files. */
+#ifndef USED_FOR_TARGET
+#define STDC_HEADERS 1
+#endif
+
+
+/* Define if you can safely include both <string.h> and <strings.h>. */
+#ifndef USED_FOR_TARGET
+#define STRING_WITH_STRINGS 1
+#endif
+
+
+/* Define if TFmode long double should be the default */
+#ifndef USED_FOR_TARGET
+/* #undef TARGET_DEFAULT_LONG_DOUBLE_128 */
+#endif
+
+
+/* Define if your target C library provides stack protector support */
+#ifndef USED_FOR_TARGET
+/* #undef TARGET_LIBC_PROVIDES_SSP */
+#endif
+
+
+/* Define to 1 if you can safely include both <sys/time.h> and <time.h>. */
+#ifndef USED_FOR_TARGET
+#define TIME_WITH_SYS_TIME 1
+#endif
+
+
+/* Define if your assembler mis-optimizes .eh_frame data. */
+#ifndef USED_FOR_TARGET
+/* #undef USE_AS_TRADITIONAL_FORMAT */
+#endif
+
+
+/* Define to 1 if the 'long long' (or '__int64') is wider than 'long' but
+ still efficiently supported by the host hardware. */
+#ifndef USED_FOR_TARGET
+/* #undef USE_LONG_LONG_FOR_WIDEST_FAST_INT */
+#endif
+
+
+/* Define to be the last component of the Windows registry key under which to
+ look for installation paths. The full key used will be
+ HKEY_LOCAL_MACHINE/SOFTWARE/Free Software Foundation/{WIN32_REGISTRY_KEY}.
+ The default is the GCC version number. */
+#ifndef USED_FOR_TARGET
+/* #undef WIN32_REGISTRY_KEY */
+#endif
+
+
+/* Define to 1 if your processor stores words with the most significant byte
+ first (like Motorola and SPARC, unlike Intel and VAX). */
+#ifndef USED_FOR_TARGET
+/* #undef WORDS_BIGENDIAN */
+#endif
+
+
+/* Define to 1 if on MINIX. */
+#ifndef USED_FOR_TARGET
+/* #undef _MINIX */
+#endif
+
+
+/* Define to 2 if the system does not provide POSIX.1 features except with
+ this defined. */
+#ifndef USED_FOR_TARGET
+/* #undef _POSIX_1_SOURCE */
+#endif
+
+
+/* Define to 1 if you need to in order for `stat' and other things to work. */
+#ifndef USED_FOR_TARGET
+/* #undef _POSIX_SOURCE */
+#endif
+
+
+/* Enable extensions on AIX 3, Interix. */
+#ifndef _ALL_SOURCE
+# define _ALL_SOURCE 1
+#endif
+/* Enable GNU extensions on systems that have them. */
+#ifndef _GNU_SOURCE
+# define _GNU_SOURCE 1
+#endif
+/* Enable threading extensions on Solaris. */
+#ifndef _POSIX_PTHREAD_SEMANTICS
+# define _POSIX_PTHREAD_SEMANTICS 1
+#endif
+/* Enable extensions on HP NonStop. */
+#ifndef _TANDEM_SOURCE
+# define _TANDEM_SOURCE 1
+#endif
+/* Enable general extensions on Solaris. */
+#ifndef __EXTENSIONS__
+# define __EXTENSIONS__ 1
+#endif
+
+
+/* Define to `char *' if <sys/types.h> does not define. */
+#ifndef USED_FOR_TARGET
+/* #undef caddr_t */
+#endif
+
+
+/* Define to `int' if <sys/types.h> doesn't define. */
+#ifndef USED_FOR_TARGET
+/* #undef gid_t */
+#endif
+
+
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+ calls it, or to nothing if 'inline' is not supported under any name. */
+#ifndef __cplusplus
+/* #undef inline */
+#endif
+
+/* Define to `int' if <sys/types.h> does not define. */
+#ifndef USED_FOR_TARGET
+/* #undef pid_t */
+#endif
+
+
+/* Define to `long' if <sys/resource.h> doesn't define. */
+#ifndef USED_FOR_TARGET
+/* #undef rlim_t */
+#endif
+
+
+/* Define to `int' if <sys/types.h> does not define. */
+#ifndef USED_FOR_TARGET
+/* #undef ssize_t */
+#endif
+
+
+/* Define to `int' if <sys/types.h> doesn't define. */
+#ifndef USED_FOR_TARGET
+/* #undef uid_t */
+#endif
+
+
+/* Define as `fork' if `vfork' does not work. */
+#ifndef USED_FOR_TARGET
+/* #undef vfork */
+#endif
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/basic-block.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/basic-block.h
new file mode 100644
index 0000000..7555534
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/basic-block.h
@@ -0,0 +1,1031 @@
+/* Define control and data flow tables, and regsets.
+ Copyright (C) 1987, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_BASIC_BLOCK_H
+#define GCC_BASIC_BLOCK_H
+
+#include "bitmap.h"
+#include "sbitmap.h"
+#include "varray.h"
+#include "partition.h"
+#include "hard-reg-set.h"
+#include "predict.h"
+#include "vec.h"
+#include "function.h"
+
+/* Head of register set linked list. */
+typedef bitmap_head regset_head;
+
+/* A pointer to a regset_head. */
+typedef bitmap regset;
+
+/* Allocate a register set with oballoc. */
+#define ALLOC_REG_SET(OBSTACK) BITMAP_ALLOC (OBSTACK)
+
+/* Do any cleanup needed on a regset when it is no longer used. */
+#define FREE_REG_SET(REGSET) BITMAP_FREE (REGSET)
+
+/* Initialize a new regset. */
+#define INIT_REG_SET(HEAD) bitmap_initialize (HEAD, ®_obstack)
+
+/* Clear a register set by freeing up the linked list. */
+#define CLEAR_REG_SET(HEAD) bitmap_clear (HEAD)
+
+/* Copy a register set to another register set. */
+#define COPY_REG_SET(TO, FROM) bitmap_copy (TO, FROM)
+
+/* Compare two register sets. */
+#define REG_SET_EQUAL_P(A, B) bitmap_equal_p (A, B)
+
+/* `and' a register set with a second register set. */
+#define AND_REG_SET(TO, FROM) bitmap_and_into (TO, FROM)
+
+/* `and' the complement of a register set with a register set. */
+#define AND_COMPL_REG_SET(TO, FROM) bitmap_and_compl_into (TO, FROM)
+
+/* Inclusive or a register set with a second register set. */
+#define IOR_REG_SET(TO, FROM) bitmap_ior_into (TO, FROM)
+
+/* Exclusive or a register set with a second register set. */
+#define XOR_REG_SET(TO, FROM) bitmap_xor_into (TO, FROM)
+
+/* Or into TO the register set FROM1 `and'ed with the complement of FROM2. */
+#define IOR_AND_COMPL_REG_SET(TO, FROM1, FROM2) \
+ bitmap_ior_and_compl_into (TO, FROM1, FROM2)
+
+/* Clear a single register in a register set. */
+#define CLEAR_REGNO_REG_SET(HEAD, REG) bitmap_clear_bit (HEAD, REG)
+
+/* Set a single register in a register set. */
+#define SET_REGNO_REG_SET(HEAD, REG) bitmap_set_bit (HEAD, REG)
+
+/* Return true if a register is set in a register set. */
+#define REGNO_REG_SET_P(TO, REG) bitmap_bit_p (TO, REG)
+
+/* Copy the hard registers in a register set to the hard register set. */
+extern void reg_set_to_hard_reg_set (HARD_REG_SET *, const_bitmap);
+#define REG_SET_TO_HARD_REG_SET(TO, FROM) \
+do { \
+ CLEAR_HARD_REG_SET (TO); \
+ reg_set_to_hard_reg_set (&TO, FROM); \
+} while (0)
+
+typedef bitmap_iterator reg_set_iterator;
+
+/* Loop over all registers in REGSET, starting with MIN, setting REGNUM to the
+ register number and executing CODE for all registers that are set. */
+#define EXECUTE_IF_SET_IN_REG_SET(REGSET, MIN, REGNUM, RSI) \
+ EXECUTE_IF_SET_IN_BITMAP (REGSET, MIN, REGNUM, RSI)
+
+/* Loop over all registers in REGSET1 and REGSET2, starting with MIN, setting
+ REGNUM to the register number and executing CODE for all registers that are
+ set in the first regset and not set in the second. */
+#define EXECUTE_IF_AND_COMPL_IN_REG_SET(REGSET1, REGSET2, MIN, REGNUM, RSI) \
+ EXECUTE_IF_AND_COMPL_IN_BITMAP (REGSET1, REGSET2, MIN, REGNUM, RSI)
+
+/* Loop over all registers in REGSET1 and REGSET2, starting with MIN, setting
+ REGNUM to the register number and executing CODE for all registers that are
+ set in both regsets. */
+#define EXECUTE_IF_AND_IN_REG_SET(REGSET1, REGSET2, MIN, REGNUM, RSI) \
+ EXECUTE_IF_AND_IN_BITMAP (REGSET1, REGSET2, MIN, REGNUM, RSI) \
+
+/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
+ in dataflow more conveniently. */
+
+extern regset regs_invalidated_by_call_regset;
+
+/* Type we use to hold basic block counters. Should be at least
+ 64bit. Although a counter cannot be negative, we use a signed
+ type, because erroneous negative counts can be generated when the
+ flow graph is manipulated by various optimizations. A signed type
+ makes those easy to detect. */
+typedef HOST_WIDEST_INT gcov_type;
+
+/* Control flow edge information. */
+struct edge_def GTY(())
+{
+ /* The two blocks at the ends of the edge. */
+ struct basic_block_def *src;
+ struct basic_block_def *dest;
+
+ /* Instructions queued on the edge. */
+ union edge_def_insns {
+ gimple_seq GTY ((tag ("true"))) g;
+ rtx GTY ((tag ("false"))) r;
+ } GTY ((desc ("current_ir_type () == IR_GIMPLE"))) insns;
+
+ /* Auxiliary info specific to a pass. */
+ PTR GTY ((skip (""))) aux;
+
+ /* Location of any goto implicit in the edge and associated BLOCK. */
+ tree goto_block;
+ location_t goto_locus;
+
+ /* The index number corresponding to this edge in the edge vector
+ dest->preds. */
+ unsigned int dest_idx;
+
+ int flags; /* see EDGE_* below */
+ int probability; /* biased by REG_BR_PROB_BASE */
+ gcov_type count; /* Expected number of executions calculated
+ in profile.c */
+};
+
+typedef struct edge_def *edge;
+typedef const struct edge_def *const_edge;
+DEF_VEC_P(edge);
+DEF_VEC_ALLOC_P(edge,gc);
+DEF_VEC_ALLOC_P(edge,heap);
+
+#define EDGE_FALLTHRU 1 /* 'Straight line' flow */
+#define EDGE_ABNORMAL 2 /* Strange flow, like computed
+ label, or eh */
+#define EDGE_ABNORMAL_CALL 4 /* Call with abnormal exit
+ like an exception, or sibcall */
+#define EDGE_EH 8 /* Exception throw */
+#define EDGE_FAKE 16 /* Not a real edge (profile.c) */
+#define EDGE_DFS_BACK 32 /* A backwards edge */
+#define EDGE_CAN_FALLTHRU 64 /* Candidate for straight line
+ flow. */
+#define EDGE_IRREDUCIBLE_LOOP 128 /* Part of irreducible loop. */
+#define EDGE_SIBCALL 256 /* Edge from sibcall to exit. */
+#define EDGE_LOOP_EXIT 512 /* Exit of a loop. */
+#define EDGE_TRUE_VALUE 1024 /* Edge taken when controlling
+ predicate is nonzero. */
+#define EDGE_FALSE_VALUE 2048 /* Edge taken when controlling
+ predicate is zero. */
+#define EDGE_EXECUTABLE 4096 /* Edge is executable. Only
+ valid during SSA-CCP. */
+#define EDGE_CROSSING 8192 /* Edge crosses between hot
+ and cold sections, when we
+ do partitioning. */
+#define EDGE_ALL_FLAGS 16383
+
+#define EDGE_COMPLEX (EDGE_ABNORMAL | EDGE_ABNORMAL_CALL | EDGE_EH)
+
+/* Counter summary from the last set of coverage counts read by
+ profile.c. */
+extern const struct gcov_ctr_summary *profile_info;
+
+/* Declared in cfgloop.h. */
+struct loop;
+
+/* Declared in tree-flow.h. */
+struct edge_prediction;
+struct rtl_bb_info;
+
+/* A basic block is a sequence of instructions with only entry and
+ only one exit. If any one of the instructions are executed, they
+ will all be executed, and in sequence from first to last.
+
+ There may be COND_EXEC instructions in the basic block. The
+ COND_EXEC *instructions* will be executed -- but if the condition
+ is false the conditionally executed *expressions* will of course
+ not be executed. We don't consider the conditionally executed
+ expression (which might have side-effects) to be in a separate
+ basic block because the program counter will always be at the same
+ location after the COND_EXEC instruction, regardless of whether the
+ condition is true or not.
+
+ Basic blocks need not start with a label nor end with a jump insn.
+ For example, a previous basic block may just "conditionally fall"
+ into the succeeding basic block, and the last basic block need not
+ end with a jump insn. Block 0 is a descendant of the entry block.
+
+ A basic block beginning with two labels cannot have notes between
+ the labels.
+
+ Data for jump tables are stored in jump_insns that occur in no
+ basic block even though these insns can follow or precede insns in
+ basic blocks. */
+
+enum sample_profile_confidence
+{
+ LOW_CONFIDENCE = 0,
+ NORMAL_CONFIDENCE,
+ HIGH_CONFIDENCE
+};
+
+/* Basic block information indexed by block number. */
+struct basic_block_def GTY((chain_next ("%h.next_bb"), chain_prev ("%h.prev_bb")))
+{
+ /* The edges into and out of the block. */
+ VEC(edge,gc) *preds;
+ VEC(edge,gc) *succs;
+
+ /* Auxiliary info specific to a pass. */
+ PTR GTY ((skip (""))) aux;
+
+ /* Innermost loop containing the block. */
+ struct loop *loop_father;
+
+ /* The dominance and postdominance information node. */
+ struct et_node * GTY ((skip (""))) dom[2];
+
+ /* Previous and next blocks in the chain. */
+ struct basic_block_def *prev_bb;
+ struct basic_block_def *next_bb;
+
+ union basic_block_il_dependent {
+ struct gimple_bb_info * GTY ((tag ("0"))) gimple;
+ struct rtl_bb_info * GTY ((tag ("1"))) rtl;
+ } GTY ((desc ("((%1.flags & BB_RTL) != 0)"))) il;
+
+ /* Expected number of executions: calculated in profile.c. */
+ gcov_type count;
+
+ /* Confidence level for the profile */
+ enum sample_profile_confidence confidence;
+
+ /* The index of this block. */
+ int index;
+
+ /* The loop depth of this block. */
+ int loop_depth;
+
+ /* Expected frequency. Normalized to be in range 0 to BB_FREQ_MAX. */
+ int frequency;
+
+ /* Various flags. See BB_* below. */
+ int flags;
+};
+
+struct rtl_bb_info GTY(())
+{
+ /* The first and last insns of the block. */
+ rtx head_;
+ rtx end_;
+
+ /* In CFGlayout mode points to insn notes/jumptables to be placed just before
+ and after the block. */
+ rtx header;
+ rtx footer;
+
+ /* This field is used by the bb-reorder and tracer passes. */
+ int visited;
+};
+
+struct gimple_bb_info GTY(())
+{
+ /* Sequence of statements in this block. */
+ gimple_seq seq;
+
+ /* PHI nodes for this block. */
+ gimple_seq phi_nodes;
+};
+
+typedef struct basic_block_def *basic_block;
+typedef const struct basic_block_def *const_basic_block;
+
+DEF_VEC_P(basic_block);
+DEF_VEC_ALLOC_P(basic_block,gc);
+DEF_VEC_ALLOC_P(basic_block,heap);
+
+#define BB_FREQ_MAX 10000
+
+/* Masks for basic_block.flags.
+
+ BB_HOT_PARTITION and BB_COLD_PARTITION should be preserved throughout
+ the compilation, so they are never cleared.
+
+ All other flags may be cleared by clear_bb_flags(). It is generally
+ a bad idea to rely on any flags being up-to-date. */
+
+enum bb_flags
+{
+ /* Only set on blocks that have just been created by create_bb. */
+ BB_NEW = 1 << 0,
+
+ /* Set by find_unreachable_blocks. Do not rely on this being set in any
+ pass. */
+ BB_REACHABLE = 1 << 1,
+
+ /* Set for blocks in an irreducible loop by loop analysis. */
+ BB_IRREDUCIBLE_LOOP = 1 << 2,
+
+ /* Set on blocks that may actually not be single-entry single-exit block. */
+ BB_SUPERBLOCK = 1 << 3,
+
+ /* Set on basic blocks that the scheduler should not touch. This is used
+ by SMS to prevent other schedulers from messing with the loop schedule. */
+ BB_DISABLE_SCHEDULE = 1 << 4,
+
+ /* Set on blocks that should be put in a hot section. */
+ BB_HOT_PARTITION = 1 << 5,
+
+ /* Set on blocks that should be put in a cold section. */
+ BB_COLD_PARTITION = 1 << 6,
+
+ /* Set on block that was duplicated. */
+ BB_DUPLICATED = 1 << 7,
+
+ /* Set if the label at the top of this block is the target of a non-local goto. */
+ BB_NON_LOCAL_GOTO_TARGET = 1 << 8,
+
+ /* Set on blocks that are in RTL format. */
+ BB_RTL = 1 << 9 ,
+
+ /* Set on blocks that are forwarder blocks.
+ Only used in cfgcleanup.c. */
+ BB_FORWARDER_BLOCK = 1 << 10,
+
+ /* Set on blocks that cannot be threaded through.
+ Only used in cfgcleanup.c. */
+ BB_NONTHREADABLE_BLOCK = 1 << 11
+};
+
+/* Dummy flag for convenience in the hot/cold partitioning code. */
+#define BB_UNPARTITIONED 0
+
+/* Partitions, to be used when partitioning hot and cold basic blocks into
+ separate sections. */
+#define BB_PARTITION(bb) ((bb)->flags & (BB_HOT_PARTITION|BB_COLD_PARTITION))
+#define BB_SET_PARTITION(bb, part) do { \
+ basic_block bb_ = (bb); \
+ bb_->flags = ((bb_->flags & ~(BB_HOT_PARTITION|BB_COLD_PARTITION)) \
+ | (part)); \
+} while (0)
+
+#define BB_COPY_PARTITION(dstbb, srcbb) \
+ BB_SET_PARTITION (dstbb, BB_PARTITION (srcbb))
+
+/* State of dominance information. */
+
+enum dom_state
+{
+ DOM_NONE, /* Not computed at all. */
+ DOM_NO_FAST_QUERY, /* The data is OK, but the fast query data are not usable. */
+ DOM_OK /* Everything is ok. */
+};
+
+/* A structure to group all the per-function control flow graph data.
+ The x_* prefixing is necessary because otherwise references to the
+ fields of this struct are interpreted as the defines for backward
+ source compatibility following the definition of this struct. */
+struct control_flow_graph GTY(())
+{
+ /* Block pointers for the exit and entry of a function.
+ These are always the head and tail of the basic block list. */
+ basic_block x_entry_block_ptr;
+ basic_block x_exit_block_ptr;
+
+ /* Index by basic block number, get basic block struct info. */
+ VEC(basic_block,gc) *x_basic_block_info;
+
+ /* Number of basic blocks in this flow graph. */
+ int x_n_basic_blocks;
+
+ /* Number of edges in this flow graph. */
+ int x_n_edges;
+
+ /* The first free basic block number. */
+ int x_last_basic_block;
+
+ /* Mapping of labels to their associated blocks. At present
+ only used for the gimple CFG. */
+ VEC(basic_block,gc) *x_label_to_block_map;
+
+ enum profile_status {
+ PROFILE_ABSENT,
+ PROFILE_GUESSED,
+ PROFILE_READ
+ } x_profile_status;
+
+ /* Whether the dominators and the postdominators are available. */
+ enum dom_state x_dom_computed[2];
+
+ /* Number of basic blocks in the dominance tree. */
+ unsigned x_n_bbs_in_dom_tree[2];
+
+ /* Maximal number of entities in the single jumptable. Used to estimate
+ final flowgraph size. */
+ int max_jumptable_ents;
+
+ /* UIDs for LABEL_DECLs. */
+ int last_label_uid;
+};
+
+/* Defines for accessing the fields of the CFG structure for function FN. */
+#define ENTRY_BLOCK_PTR_FOR_FUNCTION(FN) ((FN)->cfg->x_entry_block_ptr)
+#define EXIT_BLOCK_PTR_FOR_FUNCTION(FN) ((FN)->cfg->x_exit_block_ptr)
+#define basic_block_info_for_function(FN) ((FN)->cfg->x_basic_block_info)
+#define n_basic_blocks_for_function(FN) ((FN)->cfg->x_n_basic_blocks)
+#define n_edges_for_function(FN) ((FN)->cfg->x_n_edges)
+#define last_basic_block_for_function(FN) ((FN)->cfg->x_last_basic_block)
+#define label_to_block_map_for_function(FN) ((FN)->cfg->x_label_to_block_map)
+#define profile_status_for_function(FN) ((FN)->cfg->x_profile_status)
+
+#define BASIC_BLOCK_FOR_FUNCTION(FN,N) \
+ (VEC_index (basic_block, basic_block_info_for_function(FN), (N)))
+#define SET_BASIC_BLOCK_FOR_FUNCTION(FN,N,BB) \
+ (VEC_replace (basic_block, basic_block_info_for_function(FN), (N), (BB)))
+
+/* Defines for textual backward source compatibility. */
+#define ENTRY_BLOCK_PTR (cfun->cfg->x_entry_block_ptr)
+#define EXIT_BLOCK_PTR (cfun->cfg->x_exit_block_ptr)
+#define basic_block_info (cfun->cfg->x_basic_block_info)
+#define n_basic_blocks (cfun->cfg->x_n_basic_blocks)
+#define n_edges (cfun->cfg->x_n_edges)
+#define last_basic_block (cfun->cfg->x_last_basic_block)
+#define label_to_block_map (cfun->cfg->x_label_to_block_map)
+#define profile_status (cfun->cfg->x_profile_status)
+
+#define BASIC_BLOCK(N) (VEC_index (basic_block, basic_block_info, (N)))
+#define SET_BASIC_BLOCK(N,BB) (VEC_replace (basic_block, basic_block_info, (N), (BB)))
+
+/* For iterating over basic blocks. */
+#define FOR_BB_BETWEEN(BB, FROM, TO, DIR) \
+ for (BB = FROM; BB != TO; BB = BB->DIR)
+
+#define FOR_EACH_BB_FN(BB, FN) \
+ FOR_BB_BETWEEN (BB, (FN)->cfg->x_entry_block_ptr->next_bb, (FN)->cfg->x_exit_block_ptr, next_bb)
+
+#define FOR_EACH_BB(BB) FOR_EACH_BB_FN (BB, cfun)
+
+#define FOR_EACH_BB_REVERSE_FN(BB, FN) \
+ FOR_BB_BETWEEN (BB, (FN)->cfg->x_exit_block_ptr->prev_bb, (FN)->cfg->x_entry_block_ptr, prev_bb)
+
+#define FOR_EACH_BB_REVERSE(BB) FOR_EACH_BB_REVERSE_FN(BB, cfun)
+
+/* For iterating over insns in basic block. */
+#define FOR_BB_INSNS(BB, INSN) \
+ for ((INSN) = BB_HEAD (BB); \
+ (INSN) && (INSN) != NEXT_INSN (BB_END (BB)); \
+ (INSN) = NEXT_INSN (INSN))
+
+/* For iterating over insns in basic block when we might remove the
+ current insn. */
+#define FOR_BB_INSNS_SAFE(BB, INSN, CURR) \
+ for ((INSN) = BB_HEAD (BB), (CURR) = (INSN) ? NEXT_INSN ((INSN)): NULL; \
+ (INSN) && (INSN) != NEXT_INSN (BB_END (BB)); \
+ (INSN) = (CURR), (CURR) = (INSN) ? NEXT_INSN ((INSN)) : NULL)
+
+#define FOR_BB_INSNS_REVERSE(BB, INSN) \
+ for ((INSN) = BB_END (BB); \
+ (INSN) && (INSN) != PREV_INSN (BB_HEAD (BB)); \
+ (INSN) = PREV_INSN (INSN))
+
+#define FOR_BB_INSNS_REVERSE_SAFE(BB, INSN, CURR) \
+ for ((INSN) = BB_END (BB),(CURR) = (INSN) ? PREV_INSN ((INSN)) : NULL; \
+ (INSN) && (INSN) != PREV_INSN (BB_HEAD (BB)); \
+ (INSN) = (CURR), (CURR) = (INSN) ? PREV_INSN ((INSN)) : NULL)
+
+/* Cycles through _all_ basic blocks, even the fake ones (entry and
+ exit block). */
+
+#define FOR_ALL_BB(BB) \
+ for (BB = ENTRY_BLOCK_PTR; BB; BB = BB->next_bb)
+
+#define FOR_ALL_BB_FN(BB, FN) \
+ for (BB = ENTRY_BLOCK_PTR_FOR_FUNCTION (FN); BB; BB = BB->next_bb)
+
+extern bitmap_obstack reg_obstack;
+
+
+/* Stuff for recording basic block info. */
+
+#define BB_HEAD(B) (B)->il.rtl->head_
+#define BB_END(B) (B)->il.rtl->end_
+
+/* Special block numbers [markers] for entry and exit. */
+#define ENTRY_BLOCK (0)
+#define EXIT_BLOCK (1)
+
+/* The two blocks that are always in the cfg. */
+#define NUM_FIXED_BLOCKS (2)
+
+
+#define BLOCK_NUM(INSN) (BLOCK_FOR_INSN (INSN)->index + 0)
+#define set_block_for_insn(INSN, BB) (BLOCK_FOR_INSN (INSN) = BB)
+
+extern bool profile_info_available_p (void);
+extern void compute_bb_for_insn (void);
+extern unsigned int free_bb_for_insn (void);
+extern void update_bb_for_insn (basic_block);
+
+extern void insert_insn_on_edge (rtx, edge);
+basic_block split_edge_and_insert (edge, rtx);
+
+extern bool commit_edge_insertions (void);
+
+extern void remove_fake_edges (void);
+extern void remove_fake_exit_edges (void);
+extern void add_noreturn_fake_exit_edges (void);
+extern void connect_infinite_loops_to_exit (void);
+extern edge unchecked_make_edge (basic_block, basic_block, int);
+extern edge cached_make_edge (sbitmap, basic_block, basic_block, int);
+extern edge make_edge (basic_block, basic_block, int);
+extern edge make_single_succ_edge (basic_block, basic_block, int);
+extern void remove_edge_raw (edge);
+extern void redirect_edge_succ (edge, basic_block);
+extern edge redirect_edge_succ_nodup (edge, basic_block);
+extern void redirect_edge_pred (edge, basic_block);
+extern basic_block create_basic_block_structure (rtx, rtx, rtx, basic_block);
+extern void clear_bb_flags (void);
+extern int post_order_compute (int *, bool, bool);
+extern int inverted_post_order_compute (int *);
+extern int pre_and_rev_post_order_compute (int *, int *, bool);
+extern int dfs_enumerate_from (basic_block, int,
+ bool (*)(const_basic_block, const void *),
+ basic_block *, int, const void *);
+extern void compute_dominance_frontiers (bitmap *);
+extern bitmap compute_idf (bitmap, bitmap *);
+extern void dump_bb_info (basic_block, bool, bool, int, const char *, FILE *);
+extern void dump_edge_info (FILE *, edge, int);
+extern void brief_dump_cfg (FILE *);
+extern void clear_edges (void);
+extern void scale_bbs_frequencies_int (basic_block *, int, int, int);
+extern void scale_bbs_frequencies_gcov_type (basic_block *, int, gcov_type,
+ gcov_type);
+
+/* Structure to group all of the information to process IF-THEN and
+ IF-THEN-ELSE blocks for the conditional execution support. This
+ needs to be in a public file in case the IFCVT macros call
+ functions passing the ce_if_block data structure. */
+
+typedef struct ce_if_block
+{
+ basic_block test_bb; /* First test block. */
+ basic_block then_bb; /* THEN block. */
+ basic_block else_bb; /* ELSE block or NULL. */
+ basic_block join_bb; /* Join THEN/ELSE blocks. */
+ basic_block last_test_bb; /* Last bb to hold && or || tests. */
+ int num_multiple_test_blocks; /* # of && and || basic blocks. */
+ int num_and_and_blocks; /* # of && blocks. */
+ int num_or_or_blocks; /* # of || blocks. */
+ int num_multiple_test_insns; /* # of insns in && and || blocks. */
+ int and_and_p; /* Complex test is &&. */
+ int num_then_insns; /* # of insns in THEN block. */
+ int num_else_insns; /* # of insns in ELSE block. */
+ int pass; /* Pass number. */
+
+#ifdef IFCVT_EXTRA_FIELDS
+ IFCVT_EXTRA_FIELDS /* Any machine dependent fields. */
+#endif
+
+} ce_if_block_t;
+
+/* This structure maintains an edge list vector. */
+struct edge_list
+{
+ int num_blocks;
+ int num_edges;
+ edge *index_to_edge;
+};
+
+/* The base value for branch probability notes and edge probabilities. */
+#define REG_BR_PROB_BASE 10000
+
+/* This is the value which indicates no edge is present. */
+#define EDGE_INDEX_NO_EDGE -1
+
+/* EDGE_INDEX returns an integer index for an edge, or EDGE_INDEX_NO_EDGE
+ if there is no edge between the 2 basic blocks. */
+#define EDGE_INDEX(el, pred, succ) (find_edge_index ((el), (pred), (succ)))
+
+/* INDEX_EDGE_PRED_BB and INDEX_EDGE_SUCC_BB return a pointer to the basic
+ block which is either the pred or succ end of the indexed edge. */
+#define INDEX_EDGE_PRED_BB(el, index) ((el)->index_to_edge[(index)]->src)
+#define INDEX_EDGE_SUCC_BB(el, index) ((el)->index_to_edge[(index)]->dest)
+
+/* INDEX_EDGE returns a pointer to the edge. */
+#define INDEX_EDGE(el, index) ((el)->index_to_edge[(index)])
+
+/* Number of edges in the compressed edge list. */
+#define NUM_EDGES(el) ((el)->num_edges)
+
+/* BB is assumed to contain conditional jump. Return the fallthru edge. */
+#define FALLTHRU_EDGE(bb) (EDGE_SUCC ((bb), 0)->flags & EDGE_FALLTHRU \
+ ? EDGE_SUCC ((bb), 0) : EDGE_SUCC ((bb), 1))
+
+/* BB is assumed to contain conditional jump. Return the branch edge. */
+#define BRANCH_EDGE(bb) (EDGE_SUCC ((bb), 0)->flags & EDGE_FALLTHRU \
+ ? EDGE_SUCC ((bb), 1) : EDGE_SUCC ((bb), 0))
+
+/* Return expected execution frequency of the edge E. */
+#define EDGE_FREQUENCY(e) (((e)->src->frequency \
+ * (e)->probability \
+ + REG_BR_PROB_BASE / 2) \
+ / REG_BR_PROB_BASE)
+
+/* Return nonzero if edge is critical. */
+#define EDGE_CRITICAL_P(e) (EDGE_COUNT ((e)->src->succs) >= 2 \
+ && EDGE_COUNT ((e)->dest->preds) >= 2)
+
+#define EDGE_COUNT(ev) VEC_length (edge, (ev))
+#define EDGE_I(ev,i) VEC_index (edge, (ev), (i))
+#define EDGE_PRED(bb,i) VEC_index (edge, (bb)->preds, (i))
+#define EDGE_SUCC(bb,i) VEC_index (edge, (bb)->succs, (i))
+
+/* Returns true if BB has precisely one successor. */
+
+static inline bool
+single_succ_p (const_basic_block bb)
+{
+ return EDGE_COUNT (bb->succs) == 1;
+}
+
+/* Returns true if BB has precisely one predecessor. */
+
+static inline bool
+single_pred_p (const_basic_block bb)
+{
+ return EDGE_COUNT (bb->preds) == 1;
+}
+
+/* Returns the single successor edge of basic block BB. Aborts if
+ BB does not have exactly one successor. */
+
+static inline edge
+single_succ_edge (const_basic_block bb)
+{
+ gcc_assert (single_succ_p (bb));
+ return EDGE_SUCC (bb, 0);
+}
+
+/* Returns the single predecessor edge of basic block BB. Aborts
+ if BB does not have exactly one predecessor. */
+
+static inline edge
+single_pred_edge (const_basic_block bb)
+{
+ gcc_assert (single_pred_p (bb));
+ return EDGE_PRED (bb, 0);
+}
+
+/* Returns the single successor block of basic block BB. Aborts
+ if BB does not have exactly one successor. */
+
+static inline basic_block
+single_succ (const_basic_block bb)
+{
+ return single_succ_edge (bb)->dest;
+}
+
+/* Returns the single predecessor block of basic block BB. Aborts
+ if BB does not have exactly one predecessor.*/
+
+static inline basic_block
+single_pred (const_basic_block bb)
+{
+ return single_pred_edge (bb)->src;
+}
+
+/* Iterator object for edges. */
+
+typedef struct {
+ unsigned index;
+ VEC(edge,gc) **container;
+} edge_iterator;
+
+static inline VEC(edge,gc) *
+ei_container (edge_iterator i)
+{
+ gcc_assert (i.container);
+ return *i.container;
+}
+
+#define ei_start(iter) ei_start_1 (&(iter))
+#define ei_last(iter) ei_last_1 (&(iter))
+
+/* Return an iterator pointing to the start of an edge vector. */
+static inline edge_iterator
+ei_start_1 (VEC(edge,gc) **ev)
+{
+ edge_iterator i;
+
+ i.index = 0;
+ i.container = ev;
+
+ return i;
+}
+
+/* Return an iterator pointing to the last element of an edge
+ vector. */
+static inline edge_iterator
+ei_last_1 (VEC(edge,gc) **ev)
+{
+ edge_iterator i;
+
+ i.index = EDGE_COUNT (*ev) - 1;
+ i.container = ev;
+
+ return i;
+}
+
+/* Is the iterator `i' at the end of the sequence? */
+static inline bool
+ei_end_p (edge_iterator i)
+{
+ return (i.index == EDGE_COUNT (ei_container (i)));
+}
+
+/* Is the iterator `i' at one position before the end of the
+ sequence? */
+static inline bool
+ei_one_before_end_p (edge_iterator i)
+{
+ return (i.index + 1 == EDGE_COUNT (ei_container (i)));
+}
+
+/* Advance the iterator to the next element. */
+static inline void
+ei_next (edge_iterator *i)
+{
+ gcc_assert (i->index < EDGE_COUNT (ei_container (*i)));
+ i->index++;
+}
+
+/* Move the iterator to the previous element. */
+static inline void
+ei_prev (edge_iterator *i)
+{
+ gcc_assert (i->index > 0);
+ i->index--;
+}
+
+/* Return the edge pointed to by the iterator `i'. */
+static inline edge
+ei_edge (edge_iterator i)
+{
+ return EDGE_I (ei_container (i), i.index);
+}
+
+/* Return an edge pointed to by the iterator. Do it safely so that
+ NULL is returned when the iterator is pointing at the end of the
+ sequence. */
+static inline edge
+ei_safe_edge (edge_iterator i)
+{
+ return !ei_end_p (i) ? ei_edge (i) : NULL;
+}
+
+/* Return 1 if we should continue to iterate. Return 0 otherwise.
+ *Edge P is set to the next edge if we are to continue to iterate
+ and NULL otherwise. */
+
+static inline bool
+ei_cond (edge_iterator ei, edge *p)
+{
+ if (!ei_end_p (ei))
+ {
+ *p = ei_edge (ei);
+ return 1;
+ }
+ else
+ {
+ *p = NULL;
+ return 0;
+ }
+}
+
+/* This macro serves as a convenient way to iterate each edge in a
+ vector of predecessor or successor edges. It must not be used when
+ an element might be removed during the traversal, otherwise
+ elements will be missed. Instead, use a for-loop like that shown
+ in the following pseudo-code:
+
+ FOR (ei = ei_start (bb->succs); (e = ei_safe_edge (ei)); )
+ {
+ IF (e != taken_edge)
+ remove_edge (e);
+ ELSE
+ ei_next (&ei);
+ }
+*/
+
+#define FOR_EACH_EDGE(EDGE,ITER,EDGE_VEC) \
+ for ((ITER) = ei_start ((EDGE_VEC)); \
+ ei_cond ((ITER), &(EDGE)); \
+ ei_next (&(ITER)))
+
+struct edge_list * create_edge_list (void);
+void free_edge_list (struct edge_list *);
+void print_edge_list (FILE *, struct edge_list *);
+void verify_edge_list (FILE *, struct edge_list *);
+int find_edge_index (struct edge_list *, basic_block, basic_block);
+edge find_edge (basic_block, basic_block);
+
+#define CLEANUP_EXPENSIVE 1 /* Do relatively expensive optimizations
+ except for edge forwarding */
+#define CLEANUP_CROSSJUMP 2 /* Do crossjumping. */
+#define CLEANUP_POST_REGSTACK 4 /* We run after reg-stack and need
+ to care REG_DEAD notes. */
+#define CLEANUP_THREADING 8 /* Do jump threading. */
+#define CLEANUP_NO_INSN_DEL 16 /* Do not try to delete trivially dead
+ insns. */
+#define CLEANUP_CFGLAYOUT 32 /* Do cleanup in cfglayout mode. */
+
+/* In lcm.c */
+extern struct edge_list *pre_edge_lcm (int, sbitmap *, sbitmap *,
+ sbitmap *, sbitmap *, sbitmap **,
+ sbitmap **);
+extern struct edge_list *pre_edge_rev_lcm (int, sbitmap *,
+ sbitmap *, sbitmap *,
+ sbitmap *, sbitmap **,
+ sbitmap **);
+extern void compute_available (sbitmap *, sbitmap *, sbitmap *, sbitmap *);
+
+/* In predict.c */
+extern bool maybe_hot_bb_p (const_basic_block);
+extern bool maybe_hot_bb_for_func_p (struct function *, const_basic_block);
+extern bool maybe_hot_edge_p (edge);
+extern bool probably_never_executed_bb_p (const_basic_block);
+extern bool optimize_bb_for_size_p (const_basic_block);
+extern bool optimize_bb_for_speed_p (const_basic_block);
+extern bool optimize_edge_for_size_p (edge);
+extern bool optimize_edge_for_speed_p (edge);
+extern bool optimize_function_for_size_p (struct function *);
+extern bool optimize_function_for_speed_p (struct function *);
+extern bool optimize_loop_for_size_p (struct loop *);
+extern bool optimize_loop_for_speed_p (struct loop *);
+extern bool optimize_loop_nest_for_size_p (struct loop *);
+extern bool optimize_loop_nest_for_speed_p (struct loop *);
+extern bool gimple_predicted_by_p (const_basic_block, enum br_predictor);
+extern bool rtl_predicted_by_p (const_basic_block, enum br_predictor);
+extern void gimple_predict_edge (edge, enum br_predictor, int);
+extern void rtl_predict_edge (edge, enum br_predictor, int);
+extern void predict_edge_def (edge, enum br_predictor, enum prediction);
+extern void guess_outgoing_edge_probabilities (basic_block);
+extern void remove_predictions_associated_with_edge (edge);
+extern bool edge_probability_reliable_p (const_edge);
+extern bool br_prob_note_reliable_p (const_rtx);
+extern bool predictable_edge_p (edge);
+extern unsigned int tree_estimate_probability (void);
+
+/* In cfg.c */
+extern void dump_regset (regset, FILE *);
+extern void debug_regset (regset);
+extern void init_flow (struct function *);
+extern void debug_bb (basic_block);
+extern basic_block debug_bb_n (int);
+extern void dump_regset (regset, FILE *);
+extern void debug_regset (regset);
+extern void expunge_block (basic_block);
+extern void link_block (basic_block, basic_block);
+extern void unlink_block (basic_block);
+extern void compact_blocks (void);
+extern basic_block alloc_block (void);
+extern void alloc_aux_for_block (basic_block, int);
+extern void alloc_aux_for_blocks (int);
+extern void clear_aux_for_blocks (void);
+extern void free_aux_for_blocks (void);
+extern void alloc_aux_for_edge (edge, int);
+extern void alloc_aux_for_edges (int);
+extern void clear_aux_for_edges (void);
+extern void free_aux_for_edges (void);
+
+/* In cfganal.c */
+extern void find_unreachable_blocks (void);
+extern bool forwarder_block_p (const_basic_block);
+extern bool can_fallthru (basic_block, basic_block);
+extern bool could_fall_through (basic_block, basic_block);
+extern void flow_nodes_print (const char *, const_sbitmap, FILE *);
+extern void flow_edge_list_print (const char *, const edge *, int, FILE *);
+
+/* In cfgrtl.c */
+extern basic_block force_nonfallthru (edge);
+extern rtx block_label (basic_block);
+extern bool purge_all_dead_edges (void);
+extern bool purge_dead_edges (basic_block);
+
+/* In cfgbuild.c. */
+extern void find_many_sub_basic_blocks (sbitmap);
+extern void rtl_make_eh_edge (sbitmap, basic_block, rtx);
+extern void find_basic_blocks (rtx);
+
+/* In cfgcleanup.c. */
+extern bool cleanup_cfg (int);
+extern int flow_find_cross_jump (basic_block, basic_block, rtx *, rtx *);
+extern int flow_find_head_matching_sequence (basic_block, basic_block,
+ rtx *, rtx *, int);
+
+extern bool delete_unreachable_blocks (void);
+
+extern bool mark_dfs_back_edges (void);
+extern void set_edge_can_fallthru_flag (void);
+extern void update_br_prob_note (basic_block);
+extern void fixup_abnormal_edges (void);
+extern bool inside_basic_block_p (const_rtx);
+extern bool control_flow_insn_p (const_rtx);
+extern rtx get_last_bb_insn (basic_block);
+
+/* In bb-reorder.c */
+extern void reorder_basic_blocks (void);
+
+/* In dominance.c */
+
+enum cdi_direction
+{
+ CDI_DOMINATORS = 1,
+ CDI_POST_DOMINATORS = 2
+};
+
+extern enum dom_state dom_info_state (enum cdi_direction);
+extern void set_dom_info_availability (enum cdi_direction, enum dom_state);
+extern bool dom_info_available_p (enum cdi_direction);
+extern void calculate_dominance_info (enum cdi_direction);
+extern void free_dominance_info (enum cdi_direction);
+extern basic_block nearest_common_dominator (enum cdi_direction,
+ basic_block, basic_block);
+extern basic_block nearest_common_dominator_for_set (enum cdi_direction,
+ bitmap);
+extern void set_immediate_dominator (enum cdi_direction, basic_block,
+ basic_block);
+extern basic_block get_immediate_dominator (enum cdi_direction, basic_block);
+extern bool dominated_by_p (enum cdi_direction, const_basic_block, const_basic_block);
+extern VEC (basic_block, heap) *get_dominated_by (enum cdi_direction, basic_block);
+extern VEC (basic_block, heap) *get_dominated_by_region (enum cdi_direction,
+ basic_block *,
+ unsigned);
+extern void add_to_dominance_info (enum cdi_direction, basic_block);
+extern void delete_from_dominance_info (enum cdi_direction, basic_block);
+basic_block recompute_dominator (enum cdi_direction, basic_block);
+extern void redirect_immediate_dominators (enum cdi_direction, basic_block,
+ basic_block);
+extern void iterate_fix_dominators (enum cdi_direction,
+ VEC (basic_block, heap) *, bool);
+extern void verify_dominators (enum cdi_direction);
+extern basic_block first_dom_son (enum cdi_direction, basic_block);
+extern basic_block next_dom_son (enum cdi_direction, basic_block);
+unsigned bb_dom_dfs_in (enum cdi_direction, basic_block);
+unsigned bb_dom_dfs_out (enum cdi_direction, basic_block);
+
+extern edge try_redirect_by_replacing_jump (edge, basic_block, bool);
+extern void break_superblocks (void);
+extern void relink_block_chain (bool);
+extern void check_bb_profile (basic_block, FILE *);
+extern void update_bb_profile_for_threading (basic_block, int, gcov_type, edge);
+extern void init_rtl_bb_info (basic_block);
+
+extern void initialize_original_copy_tables (void);
+extern void free_original_copy_tables (void);
+extern void set_bb_original (basic_block, basic_block);
+extern basic_block get_bb_original (basic_block);
+extern void set_bb_copy (basic_block, basic_block);
+extern basic_block get_bb_copy (basic_block);
+void set_loop_copy (struct loop *, struct loop *);
+struct loop *get_loop_copy (struct loop *);
+
+
+extern rtx insert_insn_end_bb_new (rtx, basic_block);
+
+#include "cfghooks.h"
+
+/* Return true when one of the predecessor edges of BB is marked with EDGE_EH. */
+static inline bool
+bb_has_eh_pred (basic_block bb)
+{
+ edge e;
+ edge_iterator ei;
+
+ FOR_EACH_EDGE (e, ei, bb->preds)
+ {
+ if (e->flags & EDGE_EH)
+ return true;
+ }
+ return false;
+}
+
+/* Return true when one of the predecessor edges of BB is marked with EDGE_ABNORMAL. */
+static inline bool
+bb_has_abnormal_pred (basic_block bb)
+{
+ edge e;
+ edge_iterator ei;
+
+ FOR_EACH_EDGE (e, ei, bb->preds)
+ {
+ if (e->flags & EDGE_ABNORMAL)
+ return true;
+ }
+ return false;
+}
+
+/* In cfgloopmanip.c. */
+extern edge mfb_kj_edge;
+extern bool mfb_keep_just (edge);
+
+/* In cfgexpand.c. */
+extern void rtl_profile_for_bb (basic_block);
+extern void rtl_profile_for_edge (edge);
+extern void default_rtl_profile (void);
+
+#endif /* GCC_BASIC_BLOCK_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/bitmap.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/bitmap.h
new file mode 100644
index 0000000..a5b0528
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/bitmap.h
@@ -0,0 +1,587 @@
+/* Functions to support general ended bitmaps.
+ Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_BITMAP_H
+#define GCC_BITMAP_H
+#include "hashtab.h"
+#include "statistics.h"
+#include "obstack.h"
+
+/* Fundamental storage type for bitmap. */
+
+typedef unsigned long BITMAP_WORD;
+/* BITMAP_WORD_BITS needs to be unsigned, but cannot contain casts as
+ it is used in preprocessor directives -- hence the 1u. */
+#define BITMAP_WORD_BITS (CHAR_BIT * SIZEOF_LONG * 1u)
+
+/* Number of words to use for each element in the linked list. */
+
+#ifndef BITMAP_ELEMENT_WORDS
+#define BITMAP_ELEMENT_WORDS ((128 + BITMAP_WORD_BITS - 1) / BITMAP_WORD_BITS)
+#endif
+
+/* Number of bits in each actual element of a bitmap. */
+
+#define BITMAP_ELEMENT_ALL_BITS (BITMAP_ELEMENT_WORDS * BITMAP_WORD_BITS)
+
+/* Obstack for allocating bitmaps and elements from. */
+typedef struct bitmap_obstack GTY (())
+{
+ struct bitmap_element_def *elements;
+ struct bitmap_head_def *heads;
+ struct obstack GTY ((skip)) obstack;
+} bitmap_obstack;
+
+/* Bitmap set element. We use a linked list to hold only the bits that
+ are set. This allows for use to grow the bitset dynamically without
+ having to realloc and copy a giant bit array.
+
+ The free list is implemented as a list of lists. There is one
+ outer list connected together by prev fields. Each element of that
+ outer is an inner list (that may consist only of the outer list
+ element) that are connected by the next fields. The prev pointer
+ is undefined for interior elements. This allows
+ bitmap_elt_clear_from to be implemented in unit time rather than
+ linear in the number of elements to be freed. */
+
+typedef struct bitmap_element_def GTY(())
+{
+ struct bitmap_element_def *next; /* Next element. */
+ struct bitmap_element_def *prev; /* Previous element. */
+ unsigned int indx; /* regno/BITMAP_ELEMENT_ALL_BITS. */
+ BITMAP_WORD bits[BITMAP_ELEMENT_WORDS]; /* Bits that are set. */
+} bitmap_element;
+
+struct bitmap_descriptor;
+/* Head of bitmap linked list. gengtype ignores ifdefs, but for
+ statistics we need to add a bitmap descriptor pointer. As it is
+ not collected, we can just GTY((skip)) it. */
+
+typedef struct bitmap_head_def GTY(()) {
+ bitmap_element *first; /* First element in linked list. */
+ bitmap_element *current; /* Last element looked at. */
+ unsigned int indx; /* Index of last element looked at. */
+ bitmap_obstack *obstack; /* Obstack to allocate elements from.
+ If NULL, then use ggc_alloc. */
+#ifdef GATHER_STATISTICS
+ struct bitmap_descriptor GTY((skip)) *desc;
+#endif
+} bitmap_head;
+
+/* Global data */
+extern bitmap_element bitmap_zero_bits; /* Zero bitmap element */
+extern bitmap_obstack bitmap_default_obstack; /* Default bitmap obstack */
+
+/* Clear a bitmap by freeing up the linked list. */
+extern void bitmap_clear (bitmap);
+
+/* Copy a bitmap to another bitmap. */
+extern void bitmap_copy (bitmap, const_bitmap);
+
+/* True if two bitmaps are identical. */
+extern bool bitmap_equal_p (const_bitmap, const_bitmap);
+
+/* True if the bitmaps intersect (their AND is non-empty). */
+extern bool bitmap_intersect_p (const_bitmap, const_bitmap);
+
+/* True if the complement of the second intersects the first (their
+ AND_COMPL is non-empty). */
+extern bool bitmap_intersect_compl_p (const_bitmap, const_bitmap);
+
+/* True if MAP is an empty bitmap. */
+#define bitmap_empty_p(MAP) (!(MAP)->first)
+
+/* True if the bitmap has only a single bit set. */
+extern bool bitmap_single_bit_set_p (const_bitmap);
+
+/* Count the number of bits set in the bitmap. */
+extern unsigned long bitmap_count_bits (const_bitmap);
+
+/* Boolean operations on bitmaps. The _into variants are two operand
+ versions that modify the first source operand. The other variants
+ are three operand versions that to not destroy the source bitmaps.
+ The operations supported are &, & ~, |, ^. */
+extern void bitmap_and (bitmap, const_bitmap, const_bitmap);
+extern void bitmap_and_into (bitmap, const_bitmap);
+extern bool bitmap_and_compl (bitmap, const_bitmap, const_bitmap);
+extern bool bitmap_and_compl_into (bitmap, const_bitmap);
+#define bitmap_compl_and(DST, A, B) bitmap_and_compl (DST, B, A)
+extern void bitmap_compl_and_into (bitmap, const_bitmap);
+extern void bitmap_clear_range (bitmap, unsigned int, unsigned int);
+extern void bitmap_set_range (bitmap, unsigned int, unsigned int);
+extern bool bitmap_ior (bitmap, const_bitmap, const_bitmap);
+extern bool bitmap_ior_into (bitmap, const_bitmap);
+extern void bitmap_xor (bitmap, const_bitmap, const_bitmap);
+extern void bitmap_xor_into (bitmap, const_bitmap);
+
+/* DST = A | (B & ~C). Return true if DST changes. */
+extern bool bitmap_ior_and_compl (bitmap DST, const_bitmap A, const_bitmap B, const_bitmap C);
+/* A |= (B & ~C). Return true if A changes. */
+extern bool bitmap_ior_and_compl_into (bitmap DST, const_bitmap B, const_bitmap C);
+
+/* Clear a single bit in a bitmap. Return true if the bit changed. */
+extern bool bitmap_clear_bit (bitmap, int);
+
+/* Set a single bit in a bitmap. Return true if the bit changed. */
+extern bool bitmap_set_bit (bitmap, int);
+
+/* Return true if a register is set in a register set. */
+extern int bitmap_bit_p (bitmap, int);
+
+/* Debug functions to print a bitmap linked list. */
+extern void debug_bitmap (const_bitmap);
+extern void debug_bitmap_file (FILE *, const_bitmap);
+
+/* Print a bitmap. */
+extern void bitmap_print (FILE *, const_bitmap, const char *, const char *);
+
+/* Initialize and release a bitmap obstack. */
+extern void bitmap_obstack_initialize (bitmap_obstack *);
+extern void bitmap_obstack_release (bitmap_obstack *);
+extern void bitmap_register (bitmap MEM_STAT_DECL);
+extern void dump_bitmap_statistics (void);
+
+/* Initialize a bitmap header. OBSTACK indicates the bitmap obstack
+ to allocate from, NULL for GC'd bitmap. */
+
+static inline void
+bitmap_initialize_stat (bitmap head, bitmap_obstack *obstack MEM_STAT_DECL)
+{
+ head->first = head->current = NULL;
+ head->obstack = obstack;
+#ifdef GATHER_STATISTICS
+ bitmap_register (head PASS_MEM_STAT);
+#endif
+}
+#define bitmap_initialize(h,o) bitmap_initialize_stat (h,o MEM_STAT_INFO)
+
+/* Allocate and free bitmaps from obstack, malloc and gc'd memory. */
+extern bitmap bitmap_obstack_alloc_stat (bitmap_obstack *obstack MEM_STAT_DECL);
+#define bitmap_obstack_alloc(t) bitmap_obstack_alloc_stat (t MEM_STAT_INFO)
+extern bitmap bitmap_gc_alloc_stat (ALONE_MEM_STAT_DECL);
+#define bitmap_gc_alloc() bitmap_gc_alloc_stat (ALONE_MEM_STAT_INFO)
+extern void bitmap_obstack_free (bitmap);
+
+/* A few compatibility/functions macros for compatibility with sbitmaps */
+#define dump_bitmap(file, bitmap) bitmap_print (file, bitmap, "", "\n")
+#define bitmap_zero(a) bitmap_clear (a)
+extern unsigned bitmap_first_set_bit (const_bitmap);
+
+/* Compute bitmap hash (for purposes of hashing etc.) */
+extern hashval_t bitmap_hash(const_bitmap);
+
+/* Allocate a bitmap from a bit obstack. */
+#define BITMAP_ALLOC(OBSTACK) bitmap_obstack_alloc (OBSTACK)
+
+/* Allocate a gc'd bitmap. */
+#define BITMAP_GGC_ALLOC() bitmap_gc_alloc ()
+
+/* Do any cleanup needed on a bitmap when it is no longer used. */
+#define BITMAP_FREE(BITMAP) \
+ ((void) (bitmap_obstack_free ((bitmap) BITMAP), (BITMAP) = (bitmap) NULL))
+
+/* Iterator for bitmaps. */
+
+typedef struct
+{
+ /* Pointer to the current bitmap element. */
+ bitmap_element *elt1;
+
+ /* Pointer to 2nd bitmap element when two are involved. */
+ bitmap_element *elt2;
+
+ /* Word within the current element. */
+ unsigned word_no;
+
+ /* Contents of the actually processed word. When finding next bit
+ it is shifted right, so that the actual bit is always the least
+ significant bit of ACTUAL. */
+ BITMAP_WORD bits;
+} bitmap_iterator;
+
+/* Initialize a single bitmap iterator. START_BIT is the first bit to
+ iterate from. */
+
+static inline void
+bmp_iter_set_init (bitmap_iterator *bi, const_bitmap map,
+ unsigned start_bit, unsigned *bit_no)
+{
+ bi->elt1 = map->first;
+ bi->elt2 = NULL;
+
+ /* Advance elt1 until it is not before the block containing start_bit. */
+ while (1)
+ {
+ if (!bi->elt1)
+ {
+ bi->elt1 = &bitmap_zero_bits;
+ break;
+ }
+
+ if (bi->elt1->indx >= start_bit / BITMAP_ELEMENT_ALL_BITS)
+ break;
+ bi->elt1 = bi->elt1->next;
+ }
+
+ /* We might have gone past the start bit, so reinitialize it. */
+ if (bi->elt1->indx != start_bit / BITMAP_ELEMENT_ALL_BITS)
+ start_bit = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+
+ /* Initialize for what is now start_bit. */
+ bi->word_no = start_bit / BITMAP_WORD_BITS % BITMAP_ELEMENT_WORDS;
+ bi->bits = bi->elt1->bits[bi->word_no];
+ bi->bits >>= start_bit % BITMAP_WORD_BITS;
+
+ /* If this word is zero, we must make sure we're not pointing at the
+ first bit, otherwise our incrementing to the next word boundary
+ will fail. It won't matter if this increment moves us into the
+ next word. */
+ start_bit += !bi->bits;
+
+ *bit_no = start_bit;
+}
+
+/* Initialize an iterator to iterate over the intersection of two
+ bitmaps. START_BIT is the bit to commence from. */
+
+static inline void
+bmp_iter_and_init (bitmap_iterator *bi, const_bitmap map1, const_bitmap map2,
+ unsigned start_bit, unsigned *bit_no)
+{
+ bi->elt1 = map1->first;
+ bi->elt2 = map2->first;
+
+ /* Advance elt1 until it is not before the block containing
+ start_bit. */
+ while (1)
+ {
+ if (!bi->elt1)
+ {
+ bi->elt2 = NULL;
+ break;
+ }
+
+ if (bi->elt1->indx >= start_bit / BITMAP_ELEMENT_ALL_BITS)
+ break;
+ bi->elt1 = bi->elt1->next;
+ }
+
+ /* Advance elt2 until it is not before elt1. */
+ while (1)
+ {
+ if (!bi->elt2)
+ {
+ bi->elt1 = bi->elt2 = &bitmap_zero_bits;
+ break;
+ }
+
+ if (bi->elt2->indx >= bi->elt1->indx)
+ break;
+ bi->elt2 = bi->elt2->next;
+ }
+
+ /* If we're at the same index, then we have some intersecting bits. */
+ if (bi->elt1->indx == bi->elt2->indx)
+ {
+ /* We might have advanced beyond the start_bit, so reinitialize
+ for that. */
+ if (bi->elt1->indx != start_bit / BITMAP_ELEMENT_ALL_BITS)
+ start_bit = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+
+ bi->word_no = start_bit / BITMAP_WORD_BITS % BITMAP_ELEMENT_WORDS;
+ bi->bits = bi->elt1->bits[bi->word_no] & bi->elt2->bits[bi->word_no];
+ bi->bits >>= start_bit % BITMAP_WORD_BITS;
+ }
+ else
+ {
+ /* Otherwise we must immediately advance elt1, so initialize for
+ that. */
+ bi->word_no = BITMAP_ELEMENT_WORDS - 1;
+ bi->bits = 0;
+ }
+
+ /* If this word is zero, we must make sure we're not pointing at the
+ first bit, otherwise our incrementing to the next word boundary
+ will fail. It won't matter if this increment moves us into the
+ next word. */
+ start_bit += !bi->bits;
+
+ *bit_no = start_bit;
+}
+
+/* Initialize an iterator to iterate over the bits in MAP1 & ~MAP2.
+ */
+
+static inline void
+bmp_iter_and_compl_init (bitmap_iterator *bi, const_bitmap map1, const_bitmap map2,
+ unsigned start_bit, unsigned *bit_no)
+{
+ bi->elt1 = map1->first;
+ bi->elt2 = map2->first;
+
+ /* Advance elt1 until it is not before the block containing start_bit. */
+ while (1)
+ {
+ if (!bi->elt1)
+ {
+ bi->elt1 = &bitmap_zero_bits;
+ break;
+ }
+
+ if (bi->elt1->indx >= start_bit / BITMAP_ELEMENT_ALL_BITS)
+ break;
+ bi->elt1 = bi->elt1->next;
+ }
+
+ /* Advance elt2 until it is not before elt1. */
+ while (bi->elt2 && bi->elt2->indx < bi->elt1->indx)
+ bi->elt2 = bi->elt2->next;
+
+ /* We might have advanced beyond the start_bit, so reinitialize for
+ that. */
+ if (bi->elt1->indx != start_bit / BITMAP_ELEMENT_ALL_BITS)
+ start_bit = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+
+ bi->word_no = start_bit / BITMAP_WORD_BITS % BITMAP_ELEMENT_WORDS;
+ bi->bits = bi->elt1->bits[bi->word_no];
+ if (bi->elt2 && bi->elt1->indx == bi->elt2->indx)
+ bi->bits &= ~bi->elt2->bits[bi->word_no];
+ bi->bits >>= start_bit % BITMAP_WORD_BITS;
+
+ /* If this word is zero, we must make sure we're not pointing at the
+ first bit, otherwise our incrementing to the next word boundary
+ will fail. It won't matter if this increment moves us into the
+ next word. */
+ start_bit += !bi->bits;
+
+ *bit_no = start_bit;
+}
+
+/* Advance to the next bit in BI. We don't advance to the next
+ nonzero bit yet. */
+
+static inline void
+bmp_iter_next (bitmap_iterator *bi, unsigned *bit_no)
+{
+ bi->bits >>= 1;
+ *bit_no += 1;
+}
+
+/* Advance to the next nonzero bit of a single bitmap, we will have
+ already advanced past the just iterated bit. Return true if there
+ is a bit to iterate. */
+
+static inline bool
+bmp_iter_set (bitmap_iterator *bi, unsigned *bit_no)
+{
+ /* If our current word is nonzero, it contains the bit we want. */
+ if (bi->bits)
+ {
+ next_bit:
+ while (!(bi->bits & 1))
+ {
+ bi->bits >>= 1;
+ *bit_no += 1;
+ }
+ return true;
+ }
+
+ /* Round up to the word boundary. We might have just iterated past
+ the end of the last word, hence the -1. It is not possible for
+ bit_no to point at the beginning of the now last word. */
+ *bit_no = ((*bit_no + BITMAP_WORD_BITS - 1)
+ / BITMAP_WORD_BITS * BITMAP_WORD_BITS);
+ bi->word_no++;
+
+ while (1)
+ {
+ /* Find the next nonzero word in this elt. */
+ while (bi->word_no != BITMAP_ELEMENT_WORDS)
+ {
+ bi->bits = bi->elt1->bits[bi->word_no];
+ if (bi->bits)
+ goto next_bit;
+ *bit_no += BITMAP_WORD_BITS;
+ bi->word_no++;
+ }
+
+ /* Advance to the next element. */
+ bi->elt1 = bi->elt1->next;
+ if (!bi->elt1)
+ return false;
+ *bit_no = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+ bi->word_no = 0;
+ }
+}
+
+/* Advance to the next nonzero bit of an intersecting pair of
+ bitmaps. We will have already advanced past the just iterated bit.
+ Return true if there is a bit to iterate. */
+
+static inline bool
+bmp_iter_and (bitmap_iterator *bi, unsigned *bit_no)
+{
+ /* If our current word is nonzero, it contains the bit we want. */
+ if (bi->bits)
+ {
+ next_bit:
+ while (!(bi->bits & 1))
+ {
+ bi->bits >>= 1;
+ *bit_no += 1;
+ }
+ return true;
+ }
+
+ /* Round up to the word boundary. We might have just iterated past
+ the end of the last word, hence the -1. It is not possible for
+ bit_no to point at the beginning of the now last word. */
+ *bit_no = ((*bit_no + BITMAP_WORD_BITS - 1)
+ / BITMAP_WORD_BITS * BITMAP_WORD_BITS);
+ bi->word_no++;
+
+ while (1)
+ {
+ /* Find the next nonzero word in this elt. */
+ while (bi->word_no != BITMAP_ELEMENT_WORDS)
+ {
+ bi->bits = bi->elt1->bits[bi->word_no] & bi->elt2->bits[bi->word_no];
+ if (bi->bits)
+ goto next_bit;
+ *bit_no += BITMAP_WORD_BITS;
+ bi->word_no++;
+ }
+
+ /* Advance to the next identical element. */
+ do
+ {
+ /* Advance elt1 while it is less than elt2. We always want
+ to advance one elt. */
+ do
+ {
+ bi->elt1 = bi->elt1->next;
+ if (!bi->elt1)
+ return false;
+ }
+ while (bi->elt1->indx < bi->elt2->indx);
+
+ /* Advance elt2 to be no less than elt1. This might not
+ advance. */
+ while (bi->elt2->indx < bi->elt1->indx)
+ {
+ bi->elt2 = bi->elt2->next;
+ if (!bi->elt2)
+ return false;
+ }
+ }
+ while (bi->elt1->indx != bi->elt2->indx);
+
+ *bit_no = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+ bi->word_no = 0;
+ }
+}
+
+/* Advance to the next nonzero bit in the intersection of
+ complemented bitmaps. We will have already advanced past the just
+ iterated bit. */
+
+static inline bool
+bmp_iter_and_compl (bitmap_iterator *bi, unsigned *bit_no)
+{
+ /* If our current word is nonzero, it contains the bit we want. */
+ if (bi->bits)
+ {
+ next_bit:
+ while (!(bi->bits & 1))
+ {
+ bi->bits >>= 1;
+ *bit_no += 1;
+ }
+ return true;
+ }
+
+ /* Round up to the word boundary. We might have just iterated past
+ the end of the last word, hence the -1. It is not possible for
+ bit_no to point at the beginning of the now last word. */
+ *bit_no = ((*bit_no + BITMAP_WORD_BITS - 1)
+ / BITMAP_WORD_BITS * BITMAP_WORD_BITS);
+ bi->word_no++;
+
+ while (1)
+ {
+ /* Find the next nonzero word in this elt. */
+ while (bi->word_no != BITMAP_ELEMENT_WORDS)
+ {
+ bi->bits = bi->elt1->bits[bi->word_no];
+ if (bi->elt2 && bi->elt2->indx == bi->elt1->indx)
+ bi->bits &= ~bi->elt2->bits[bi->word_no];
+ if (bi->bits)
+ goto next_bit;
+ *bit_no += BITMAP_WORD_BITS;
+ bi->word_no++;
+ }
+
+ /* Advance to the next element of elt1. */
+ bi->elt1 = bi->elt1->next;
+ if (!bi->elt1)
+ return false;
+
+ /* Advance elt2 until it is no less than elt1. */
+ while (bi->elt2 && bi->elt2->indx < bi->elt1->indx)
+ bi->elt2 = bi->elt2->next;
+
+ *bit_no = bi->elt1->indx * BITMAP_ELEMENT_ALL_BITS;
+ bi->word_no = 0;
+ }
+}
+
+/* Loop over all bits set in BITMAP, starting with MIN and setting
+ BITNUM to the bit number. ITER is a bitmap iterator. BITNUM
+ should be treated as a read-only variable as it contains loop
+ state. */
+
+#define EXECUTE_IF_SET_IN_BITMAP(BITMAP, MIN, BITNUM, ITER) \
+ for (bmp_iter_set_init (&(ITER), (BITMAP), (MIN), &(BITNUM)); \
+ bmp_iter_set (&(ITER), &(BITNUM)); \
+ bmp_iter_next (&(ITER), &(BITNUM)))
+
+/* Loop over all the bits set in BITMAP1 & BITMAP2, starting with MIN
+ and setting BITNUM to the bit number. ITER is a bitmap iterator.
+ BITNUM should be treated as a read-only variable as it contains
+ loop state. */
+
+#define EXECUTE_IF_AND_IN_BITMAP(BITMAP1, BITMAP2, MIN, BITNUM, ITER) \
+ for (bmp_iter_and_init (&(ITER), (BITMAP1), (BITMAP2), (MIN), \
+ &(BITNUM)); \
+ bmp_iter_and (&(ITER), &(BITNUM)); \
+ bmp_iter_next (&(ITER), &(BITNUM)))
+
+/* Loop over all the bits set in BITMAP1 & ~BITMAP2, starting with MIN
+ and setting BITNUM to the bit number. ITER is a bitmap iterator.
+ BITNUM should be treated as a read-only variable as it contains
+ loop state. */
+
+#define EXECUTE_IF_AND_COMPL_IN_BITMAP(BITMAP1, BITMAP2, MIN, BITNUM, ITER) \
+ for (bmp_iter_and_compl_init (&(ITER), (BITMAP1), (BITMAP2), (MIN), \
+ &(BITNUM)); \
+ bmp_iter_and_compl (&(ITER), &(BITNUM)); \
+ bmp_iter_next (&(ITER), &(BITNUM)))
+
+#endif /* GCC_BITMAP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/builtins.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/builtins.def
new file mode 100644
index 0000000..16c3a6e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/builtins.def
@@ -0,0 +1,768 @@
+/* This file contains the definitions and documentation for the
+ builtins used in the GNU compiler.
+ Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* Before including this file, you should define a macro:
+
+ DEF_BUILTIN (ENUM, NAME, CLASS, TYPE, LIBTYPE, BOTH_P,
+ FALLBACK_P, NONANSI_P, ATTRS, IMPLICIT, COND)
+
+ This macro will be called once for each builtin function. The
+ ENUM will be of type `enum built_in_function', and will indicate
+ which builtin function is being processed. The NAME of the builtin
+ function (which will always start with `__builtin_') is a string
+ literal. The CLASS is of type `enum built_in_class' and indicates
+ what kind of builtin is being processed.
+
+ Some builtins are actually two separate functions. For example,
+ for `strcmp' there are two builtin functions; `__builtin_strcmp'
+ and `strcmp' itself. Both behave identically. Other builtins
+ define only the `__builtin' variant. If BOTH_P is TRUE, then this
+ builtin has both variants; otherwise, it is has only the first
+ variant.
+
+ TYPE indicates the type of the function. The symbols correspond to
+ enumerals from builtin-types.def. If BOTH_P is true, then LIBTYPE
+ is the type of the non-`__builtin_' variant. Otherwise, LIBTYPE
+ should be ignored.
+
+ If FALLBACK_P is true then, if for some reason, the compiler cannot
+ expand the builtin function directly, it will call the
+ corresponding library function (which does not have the
+ `__builtin_' prefix.
+
+ If NONANSI_P is true, then the non-`__builtin_' variant is not an
+ ANSI/ISO library function, and so we should pretend it does not
+ exist when compiling in ANSI conformant mode.
+
+ ATTRs is an attribute list as defined in builtin-attrs.def that
+ describes the attributes of this builtin function.
+
+ IMPLICIT specifies condition when the builtin can be produced by
+ compiler. For instance C90 reserves floorf function, but does not
+ define it's meaning. When user uses floorf we may assume that the
+ floorf has the meaning we expect, but we can't produce floorf by
+ simplifying floor((double)float) since the runtime need not implement
+ it.
+
+ The builtins is registered only if COND is true. */
+
+/* A GCC builtin (like __builtin_saveregs) is provided by the
+ compiler, but does not correspond to a function in the standard
+ library. */
+#undef DEF_GCC_BUILTIN
+#define DEF_GCC_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, BT_LAST, \
+ false, false, false, ATTRS, true, true)
+
+/* Like DEF_GCC_BUILTIN, except we don't prepend "__builtin_". */
+#undef DEF_SYNC_BUILTIN
+#define DEF_SYNC_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, NAME, BUILT_IN_NORMAL, TYPE, BT_LAST, \
+ false, false, false, ATTRS, true, true)
+
+/* A library builtin (like __builtin_strchr) is a builtin equivalent
+ of an ANSI/ISO standard library function. In addition to the
+ `__builtin' version, we will create an ordinary version (e.g,
+ `strchr') as well. If we cannot compute the answer using the
+ builtin function, we will fall back to the standard library
+ version. */
+#undef DEF_LIB_BUILTIN
+#define DEF_LIB_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, false, ATTRS, true, true)
+
+/* Like DEF_LIB_BUILTIN, except that the function is not one that is
+ specified by ANSI/ISO C. So, when we're being fully conformant we
+ ignore the version of these builtins that does not begin with
+ __builtin. */
+#undef DEF_EXT_LIB_BUILTIN
+#define DEF_EXT_LIB_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, true, ATTRS, false, true)
+
+/* Like DEF_LIB_BUILTIN, except that the function is only a part of
+ the standard in C94 or above. */
+#undef DEF_C94_BUILTIN
+#define DEF_C94_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, !flag_isoc94, ATTRS, TARGET_C99_FUNCTIONS, true)
+
+/* Like DEF_LIB_BUILTIN, except that the function is only a part of
+ the standard in C99 or above. */
+#undef DEF_C99_BUILTIN
+#define DEF_C99_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, !flag_isoc99, ATTRS, TARGET_C99_FUNCTIONS, true)
+
+/* Builtin that is specified by C99 and C90 reserve the name for future use.
+ We can still recognize the builtin in C90 mode but we can't produce it
+ implicitly. */
+#undef DEF_C99_C90RES_BUILTIN
+#define DEF_C99_C90RES_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, !flag_isoc99, ATTRS, TARGET_C99_FUNCTIONS, true)
+
+/* Builtin that C99 reserve the name for future use. We can still recognize
+ the builtin in C99 mode but we can't produce it implicitly. */
+#undef DEF_EXT_C99RES_BUILTIN
+#define DEF_EXT_C99RES_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ true, true, true, ATTRS, false, true)
+
+/* Allocate the enum and the name for a builtin, but do not actually
+ define it here at all. */
+#undef DEF_BUILTIN_STUB
+#define DEF_BUILTIN_STUB(ENUM, NAME) \
+ DEF_BUILTIN (ENUM, NAME, BUILT_IN_NORMAL, 0, 0, false, false, \
+ false, 0, false, false)
+
+/* Builtin used by the implementation of GNU OpenMP. None of these are
+ actually implemented in the compiler; they're all in libgomp. */
+#undef DEF_GOMP_BUILTIN
+#define DEF_GOMP_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+ DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ false, true, true, ATTRS, false, \
+ (flag_openmp || flag_tree_parallelize_loops))
+
+/* Define an attribute list for math functions that are normally
+ "impure" because some of them may write into global memory for
+ `errno'. If !flag_errno_math they are instead "const". */
+#undef ATTR_MATHFN_ERRNO
+#define ATTR_MATHFN_ERRNO (flag_errno_math ? \
+ ATTR_NOTHROW_LIST : ATTR_CONST_NOTHROW_LIST)
+
+/* Define an attribute list for math functions that are normally
+ "const" but if flag_rounding_math is set they are instead "pure".
+ This distinction accounts for the fact that some math functions
+ check the rounding mode which is akin to examining global
+ memory. */
+#undef ATTR_MATHFN_FPROUNDING
+#define ATTR_MATHFN_FPROUNDING (flag_rounding_math ? \
+ ATTR_PURE_NOTHROW_NOVOPS_LIST : ATTR_CONST_NOTHROW_LIST)
+
+/* Define an attribute list for math functions that are normally
+ "impure" because some of them may write into global memory for
+ `errno'. If !flag_errno_math, we can possibly use "pure" or
+ "const" depending on whether we care about FP rounding. */
+#undef ATTR_MATHFN_FPROUNDING_ERRNO
+#define ATTR_MATHFN_FPROUNDING_ERRNO (flag_errno_math ? \
+ ATTR_NOTHROW_LIST : ATTR_MATHFN_FPROUNDING)
+
+/* Define an attribute list for math functions that need to mind FP
+ rounding, but because they store into memory they are never "const"
+ or "pure". Use of this macro is mainly for documentation and
+ maintenance purposes. */
+#undef ATTR_MATHFN_FPROUNDING_STORE
+#define ATTR_MATHFN_FPROUNDING_STORE ATTR_NOTHROW_LIST
+
+/* Category: math builtins. */
+DEF_LIB_BUILTIN (BUILT_IN_ACOS, "acos", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ACOSF, "acosf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ACOSH, "acosh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ACOSHF, "acoshf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ACOSHL, "acoshl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ACOSL, "acosl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_ASIN, "asin", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ASINF, "asinf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ASINH, "asinh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_ASINHF, "asinhf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_ASINHL, "asinhl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ASINL, "asinl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_ATAN, "atan", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_ATAN2, "atan2", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ATAN2F, "atan2f", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ATAN2L, "atan2l", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ATANF, "atanf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_ATANH, "atanh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ATANHF, "atanhf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ATANHL, "atanhl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ATANL, "atanl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CBRT, "cbrt", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CBRTF, "cbrtf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CBRTL, "cbrtl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_CEIL, "ceil", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_CEILF, "ceilf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_CEILL, "ceill", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_COPYSIGN, "copysign", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_COPYSIGNF, "copysignf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_COPYSIGNL, "copysignl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_COS, "cos", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_COSF, "cosf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_COSH, "cosh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_COSHF, "coshf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_COSHL, "coshl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_COSL, "cosl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_DREM, "drem", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_DREMF, "dremf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_DREML, "dreml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ERF, "erf", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_ERFC, "erfc", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ERFCF, "erfcf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ERFCL, "erfcl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ERFF, "erff", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_ERFL, "erfl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_EXP, "exp", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXP10, "exp10", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXP10F, "exp10f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXP10L, "exp10l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXP2, "exp2", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXP2F, "exp2f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXP2L, "exp2l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_EXPF, "expf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_EXPL, "expl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXPM1, "expm1", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXPM1F, "expm1f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_EXPM1L, "expm1l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_FABS, "fabs", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSF, "fabsf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSL, "fabsl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FDIM, "fdim", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_FDIMF, "fdimf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_FDIML, "fdiml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_FLOOR, "floor", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FLOORF, "floorf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FLOORL, "floorl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMA, "fma", BT_FN_DOUBLE_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_FMAF, "fmaf", BT_FN_FLOAT_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_FMAL, "fmal", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_FMAX, "fmax", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMAXF, "fmaxf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMAXL, "fmaxl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMIN, "fmin", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMINF, "fminf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_FMINL, "fminl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_FMOD, "fmod", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FMODF, "fmodf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FMODL, "fmodl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_FREXP, "frexp", BT_FN_DOUBLE_DOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FREXPF, "frexpf", BT_FN_FLOAT_FLOAT_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_FREXPL, "frexpl", BT_FN_LONGDOUBLE_LONGDOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMA, "gamma", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMAF, "gammaf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMAL, "gammal", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMA_R, "gamma_r", BT_FN_DOUBLE_DOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMAF_R, "gammaf_r", BT_FN_FLOAT_FLOAT_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GAMMAL_R, "gammal_r", BT_FN_LONGDOUBLE_LONGDOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_GCC_BUILTIN (BUILT_IN_HUGE_VAL, "huge_val", BT_FN_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_HUGE_VALF, "huge_valf", BT_FN_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_HUGE_VALL, "huge_vall", BT_FN_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_HYPOT, "hypot", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_HYPOTF, "hypotf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_HYPOTL, "hypotl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ILOGB, "ilogb", BT_FN_INT_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ILOGBF, "ilogbf", BT_FN_INT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ILOGBL, "ilogbl", BT_FN_INT_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_GCC_BUILTIN (BUILT_IN_INF, "inf", BT_FN_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INFF, "inff", BT_FN_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INFL, "infl", BT_FN_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INFD32, "infd32", BT_FN_DFLOAT32, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INFD64, "infd64", BT_FN_DFLOAT64, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INFD128, "infd128", BT_FN_DFLOAT128, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J0, "j0", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J0F, "j0f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J0L, "j0l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J1, "j1", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J1F, "j1f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_J1L, "j1l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_JN, "jn", BT_FN_DOUBLE_INT_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_JNF, "jnf", BT_FN_FLOAT_INT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_JNL, "jnl", BT_FN_LONGDOUBLE_INT_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_GCC_BUILTIN (BUILT_IN_LCEIL, "lceil", BT_FN_LONG_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LCEILF, "lceilf", BT_FN_LONG_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LCEILL, "lceill", BT_FN_LONG_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_LDEXP, "ldexp", BT_FN_DOUBLE_DOUBLE_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LDEXPF, "ldexpf", BT_FN_FLOAT_FLOAT_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LDEXPL, "ldexpl", BT_FN_LONGDOUBLE_LONGDOUBLE_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_GCC_BUILTIN (BUILT_IN_LFLOOR, "lfloor", BT_FN_LONG_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LFLOORF, "lfloorf", BT_FN_LONG_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LFLOORL, "lfloorl", BT_FN_LONG_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_LGAMMA, "lgamma", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_LGAMMAF, "lgammaf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_LGAMMAL, "lgammal", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_LGAMMA_R, "lgamma_r", BT_FN_DOUBLE_DOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_LGAMMAF_R, "lgammaf_r", BT_FN_FLOAT_FLOAT_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_LGAMMAL_R, "lgammal_r", BT_FN_LONGDOUBLE_LONGDOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_GCC_BUILTIN (BUILT_IN_LLCEIL, "llceil", BT_FN_LONGLONG_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LLCEILF, "llceilf", BT_FN_LONGLONG_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LLCEILL, "llceill", BT_FN_LONGLONG_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LLFLOOR, "llfloor", BT_FN_LONGLONG_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LLFLOORF, "llfloorf", BT_FN_LONGLONG_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LLFLOORL, "llfloorl", BT_FN_LONGLONG_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_LLRINT, "llrint", BT_FN_LONGLONG_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LLRINTF, "llrintf", BT_FN_LONGLONG_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LLRINTL, "llrintl", BT_FN_LONGLONG_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LLROUND, "llround", BT_FN_LONGLONG_DOUBLE, ATTR_MATHFN_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LLROUNDF, "llroundf", BT_FN_LONGLONG_FLOAT, ATTR_MATHFN_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LLROUNDL, "llroundl", BT_FN_LONGLONG_LONGDOUBLE, ATTR_MATHFN_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_LOG, "log", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_LOG10, "log10", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LOG10F, "log10f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LOG10L, "log10l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG1P, "log1p", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG1PF, "log1pf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG1PL, "log1pl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG2, "log2", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG2F, "log2f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOG2L, "log2l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOGB, "logb", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOGBF, "logbf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LOGBL, "logbl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LOGF, "logf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_LOGL, "logl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LRINT, "lrint", BT_FN_LONG_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LRINTF, "lrintf", BT_FN_LONG_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LRINTL, "lrintl", BT_FN_LONG_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LROUND, "lround", BT_FN_LONG_DOUBLE, ATTR_MATHFN_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LROUNDF, "lroundf", BT_FN_LONG_FLOAT, ATTR_MATHFN_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_LROUNDL, "lroundl", BT_FN_LONG_LONGDOUBLE, ATTR_MATHFN_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_MODF, "modf", BT_FN_DOUBLE_DOUBLE_DOUBLEPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_MODFF, "modff", BT_FN_FLOAT_FLOAT_FLOATPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_MODFL, "modfl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLEPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_NAN, "nan", BT_FN_DOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_C99_BUILTIN (BUILT_IN_NANF, "nanf", BT_FN_FLOAT_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_C99_BUILTIN (BUILT_IN_NANL, "nanl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NAND32, "nand32", BT_FN_DFLOAT32_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NAND64, "nand64", BT_FN_DFLOAT64_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NAND128, "nand128", BT_FN_DFLOAT128_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NANS, "nans", BT_FN_DOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NANSF, "nansf", BT_FN_FLOAT_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_GCC_BUILTIN (BUILT_IN_NANSL, "nansl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
+DEF_C99_BUILTIN (BUILT_IN_NEARBYINT, "nearbyint", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_NEARBYINTF, "nearbyintf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_NEARBYINTL, "nearbyintl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_NEXTAFTER, "nextafter", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_NEXTAFTERF, "nextafterf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_NEXTAFTERL, "nextafterl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_NEXTTOWARD, "nexttoward", BT_FN_DOUBLE_DOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_NEXTTOWARDF, "nexttowardf", BT_FN_FLOAT_FLOAT_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_NEXTTOWARDL, "nexttowardl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_POW, "pow", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_POW10, "pow10", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_POW10F, "pow10f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_POW10L, "pow10l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_POWF, "powf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_GCC_BUILTIN (BUILT_IN_POWI, "powi", BT_FN_DOUBLE_DOUBLE_INT, ATTR_MATHFN_FPROUNDING)
+DEF_GCC_BUILTIN (BUILT_IN_POWIF, "powif", BT_FN_FLOAT_FLOAT_INT, ATTR_MATHFN_FPROUNDING)
+DEF_GCC_BUILTIN (BUILT_IN_POWIL, "powil", BT_FN_LONGDOUBLE_LONGDOUBLE_INT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_POWL, "powl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_REMAINDER, "remainder", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_REMAINDERF, "remainderf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_REMAINDERL, "remainderl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_REMQUO, "remquo", BT_FN_DOUBLE_DOUBLE_DOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_REMQUOF, "remquof", BT_FN_FLOAT_FLOAT_FLOAT_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_REMQUOL, "remquol", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE_INTPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_BUILTIN (BUILT_IN_RINT, "rint", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_RINTF, "rintf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_RINTL, "rintl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_ROUND, "round", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_ROUNDF, "roundf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_ROUNDL, "roundl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SCALB, "scalb", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SCALBF, "scalbf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SCALBL, "scalbl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBLN, "scalbln", BT_FN_DOUBLE_DOUBLE_LONG, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBLNF, "scalblnf", BT_FN_FLOAT_FLOAT_LONG, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBLNL, "scalblnl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONG, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBN, "scalbn", BT_FN_DOUBLE_DOUBLE_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBNF, "scalbnf", BT_FN_FLOAT_FLOAT_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_SCALBNL, "scalbnl", BT_FN_LONGDOUBLE_LONGDOUBLE_INT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBIT, "signbit", BT_FN_INT_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBITF, "signbitf", BT_FN_INT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBITL, "signbitl", BT_FN_INT_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBITD32, "signbitd32", BT_FN_INT_DFLOAT32, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBITD64, "signbitd64", BT_FN_INT_DFLOAT64, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNBITD128, "signbitd128", BT_FN_INT_DFLOAT128, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNIFICAND, "significand", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNIFICANDF, "significandf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SIGNIFICANDL, "significandl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_SIN, "sin", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SINCOS, "sincos", BT_FN_VOID_DOUBLE_DOUBLEPTR_DOUBLEPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SINCOSF, "sincosf", BT_FN_VOID_FLOAT_FLOATPTR_FLOATPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SINCOSL, "sincosl", BT_FN_VOID_LONGDOUBLE_LONGDOUBLEPTR_LONGDOUBLEPTR, ATTR_MATHFN_FPROUNDING_STORE)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SINF, "sinf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_SINH, "sinh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SINHF, "sinhf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SINHL, "sinhl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SINL, "sinl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_SQRT, "sqrt", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SQRTF, "sqrtf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_SQRTL, "sqrtl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_LIB_BUILTIN (BUILT_IN_TAN, "tan", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_TANF, "tanf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_LIB_BUILTIN (BUILT_IN_TANH, "tanh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_TANHF, "tanhf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_TANHL, "tanhl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_TANL, "tanl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_TGAMMA, "tgamma", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_TGAMMAF, "tgammaf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_TGAMMAL, "tgammal", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_C99_BUILTIN (BUILT_IN_TRUNC, "trunc", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_TRUNCF, "truncf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_TRUNCL, "truncl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y0, "y0", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y0F, "y0f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y0L, "y0l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y1, "y1", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y1F, "y1f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_Y1L, "y1l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_YN, "yn", BT_FN_DOUBLE_INT_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_YNF, "ynf", BT_FN_FLOAT_INT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_YNL, "ynl", BT_FN_LONGDOUBLE_INT_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
+
+/* Category: _Complex math builtins. */
+DEF_C99_BUILTIN (BUILT_IN_CABS, "cabs", BT_FN_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CABSF, "cabsf", BT_FN_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CABSL, "cabsl", BT_FN_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOS, "cacos", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOSF, "cacosf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOSH, "cacosh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOSHF, "cacoshf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOSHL, "cacoshl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CACOSL, "cacosl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CARG, "carg", BT_FN_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CARGF, "cargf", BT_FN_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CARGL, "cargl", BT_FN_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASIN, "casin", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASINF, "casinf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASINH, "casinh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASINHF, "casinhf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASINHL, "casinhl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CASINL, "casinl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATAN, "catan", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATANF, "catanf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATANH, "catanh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATANHF, "catanhf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATANHL, "catanhl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CATANL, "catanl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOS, "ccos", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOSF, "ccosf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOSH, "ccosh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOSHF, "ccoshf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOSHL, "ccoshl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CCOSL, "ccosl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CEXP, "cexp", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CEXPF, "cexpf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CEXPL, "cexpl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_GCC_BUILTIN (BUILT_IN_CEXPI, "cexpi", BT_FN_COMPLEX_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_GCC_BUILTIN (BUILT_IN_CEXPIF, "cexpif", BT_FN_COMPLEX_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_GCC_BUILTIN (BUILT_IN_CEXPIL, "cexpil", BT_FN_COMPLEX_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CIMAG, "cimag", BT_FN_DOUBLE_COMPLEX_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CIMAGF, "cimagf", BT_FN_FLOAT_COMPLEX_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CIMAGL, "cimagl", BT_FN_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CLOG, "clog", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CLOGF, "clogf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CLOGL, "clogl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_EXT_C99RES_BUILTIN (BUILT_IN_CLOG10, "clog10", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_EXT_C99RES_BUILTIN (BUILT_IN_CLOG10F, "clog10f", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_EXT_C99RES_BUILTIN (BUILT_IN_CLOG10L, "clog10l", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CONJ, "conj", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CONJF, "conjf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CONJL, "conjl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CPOW, "cpow", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CPOWF, "cpowf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CPOWL, "cpowl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CPROJ, "cproj", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CPROJF, "cprojf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CPROJL, "cprojl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CREAL, "creal", BT_FN_DOUBLE_COMPLEX_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CREALF, "crealf", BT_FN_FLOAT_COMPLEX_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CREALL, "creall", BT_FN_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_CSIN, "csin", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSINF, "csinf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSINH, "csinh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSINHF, "csinhf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSINHL, "csinhl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSINL, "csinl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSQRT, "csqrt", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSQRTF, "csqrtf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CSQRTL, "csqrtl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTAN, "ctan", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTANF, "ctanf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTANH, "ctanh", BT_FN_COMPLEX_DOUBLE_COMPLEX_DOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTANHF, "ctanhf", BT_FN_COMPLEX_FLOAT_COMPLEX_FLOAT, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTANHL, "ctanhl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+DEF_C99_BUILTIN (BUILT_IN_CTANL, "ctanl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
+
+/* Category: string/memory builtins. */
+/* bcmp, bcopy and bzero have traditionally accepted NULL pointers
+ when the length parameter is zero, so don't apply attribute "nonnull". */
+DEF_EXT_LIB_BUILTIN (BUILT_IN_BCMP, "bcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_BCOPY, "bcopy", BT_FN_VOID_CONST_PTR_PTR_SIZE, ATTR_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_BZERO, "bzero", BT_FN_VOID_PTR_SIZE, ATTR_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_INDEX, "index", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_MEMCHR, "memchr", BT_FN_PTR_CONST_PTR_INT_SIZE, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_MEMCMP, "memcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_MEMCPY, "memcpy", BT_FN_PTR_PTR_CONST_PTR_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_MEMMOVE, "memmove", BT_FN_PTR_PTR_CONST_PTR_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_MEMPCPY, "mempcpy", BT_FN_PTR_PTR_CONST_PTR_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_MEMSET, "memset", BT_FN_PTR_PTR_INT_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_RINDEX, "rindex", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STPCPY, "stpcpy", BT_FN_STRING_STRING_CONST_STRING, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STPNCPY, "stpncpy", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRCASECMP, "strcasecmp", BT_FN_INT_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRCAT, "strcat", BT_FN_STRING_STRING_CONST_STRING, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRCHR, "strchr", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRCMP, "strcmp", BT_FN_INT_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRCPY, "strcpy", BT_FN_STRING_STRING_CONST_STRING, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRCSPN, "strcspn", BT_FN_SIZE_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRDUP, "strdup", BT_FN_STRING_CONST_STRING, ATTR_MALLOC_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRNDUP, "strndup", BT_FN_STRING_CONST_STRING_SIZE, ATTR_MALLOC_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRLEN, "strlen", BT_FN_SIZE_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRNCASECMP, "strncasecmp", BT_FN_INT_CONST_STRING_CONST_STRING_SIZE, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRNCAT, "strncat", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRNCMP, "strncmp", BT_FN_INT_CONST_STRING_CONST_STRING_SIZE, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRNCPY, "strncpy", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRPBRK, "strpbrk", BT_FN_STRING_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRRCHR, "strrchr", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRSPN, "strspn", BT_FN_SIZE_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+DEF_LIB_BUILTIN (BUILT_IN_STRSTR, "strstr", BT_FN_STRING_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL)
+
+/* Category: stdio builtins. */
+DEF_LIB_BUILTIN (BUILT_IN_FPRINTF, "fprintf", BT_FN_INT_FILEPTR_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_2_3)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FPRINTF_UNLOCKED, "fprintf_unlocked", BT_FN_INT_FILEPTR_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_2_3)
+DEF_LIB_BUILTIN (BUILT_IN_PUTC, "putc", BT_FN_INT_INT_FILEPTR, ATTR_NONNULL_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_PUTC_UNLOCKED, "putc_unlocked", BT_FN_INT_INT_FILEPTR, ATTR_NONNULL_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_FPUTC, "fputc", BT_FN_INT_INT_FILEPTR, ATTR_NONNULL_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FPUTC_UNLOCKED, "fputc_unlocked", BT_FN_INT_INT_FILEPTR, ATTR_NONNULL_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_FPUTS, "fputs", BT_FN_INT_CONST_STRING_FILEPTR, ATTR_NONNULL_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FPUTS_UNLOCKED, "fputs_unlocked", BT_FN_INT_CONST_STRING_FILEPTR, ATTR_NONNULL_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_FSCANF, "fscanf", BT_FN_INT_FILEPTR_CONST_STRING_VAR, ATTR_FORMAT_SCANF_2_3)
+DEF_LIB_BUILTIN (BUILT_IN_FWRITE, "fwrite", BT_FN_SIZE_CONST_PTR_SIZE_SIZE_FILEPTR, ATTR_NONNULL_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FWRITE_UNLOCKED, "fwrite_unlocked", BT_FN_SIZE_CONST_PTR_SIZE_SIZE_FILEPTR, ATTR_NONNULL_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_PRINTF, "printf", BT_FN_INT_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_1_2)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_PRINTF_UNLOCKED, "printf_unlocked", BT_FN_INT_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_1_2)
+DEF_LIB_BUILTIN (BUILT_IN_PUTCHAR, "putchar", BT_FN_INT_INT, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_PUTCHAR_UNLOCKED, "putchar_unlocked", BT_FN_INT_INT, ATTR_NULL)
+DEF_LIB_BUILTIN (BUILT_IN_PUTS, "puts", BT_FN_INT_CONST_STRING, ATTR_NONNULL_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_PUTS_UNLOCKED, "puts_unlocked", BT_FN_INT_CONST_STRING, ATTR_NONNULL_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_SCANF, "scanf", BT_FN_INT_CONST_STRING_VAR, ATTR_FORMAT_SCANF_1_2)
+DEF_C99_BUILTIN (BUILT_IN_SNPRINTF, "snprintf", BT_FN_INT_STRING_SIZE_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_NOTHROW_3_4)
+DEF_LIB_BUILTIN (BUILT_IN_SPRINTF, "sprintf", BT_FN_INT_STRING_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_NOTHROW_2_3)
+DEF_LIB_BUILTIN (BUILT_IN_SSCANF, "sscanf", BT_FN_INT_CONST_STRING_CONST_STRING_VAR, ATTR_FORMAT_SCANF_NOTHROW_2_3)
+DEF_LIB_BUILTIN (BUILT_IN_VFPRINTF, "vfprintf", BT_FN_INT_FILEPTR_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_2_0)
+DEF_C99_BUILTIN (BUILT_IN_VFSCANF, "vfscanf", BT_FN_INT_FILEPTR_CONST_STRING_VALIST_ARG, ATTR_FORMAT_SCANF_2_0)
+DEF_LIB_BUILTIN (BUILT_IN_VPRINTF, "vprintf", BT_FN_INT_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_1_0)
+DEF_C99_BUILTIN (BUILT_IN_VSCANF, "vscanf", BT_FN_INT_CONST_STRING_VALIST_ARG, ATTR_FORMAT_SCANF_1_0)
+DEF_C99_BUILTIN (BUILT_IN_VSNPRINTF, "vsnprintf", BT_FN_INT_STRING_SIZE_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_NOTHROW_3_0)
+DEF_LIB_BUILTIN (BUILT_IN_VSPRINTF, "vsprintf", BT_FN_INT_STRING_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_NOTHROW_2_0)
+DEF_C99_BUILTIN (BUILT_IN_VSSCANF, "vsscanf", BT_FN_INT_CONST_STRING_CONST_STRING_VALIST_ARG, ATTR_FORMAT_SCANF_NOTHROW_2_0)
+
+/* Category: ctype builtins. */
+DEF_LIB_BUILTIN (BUILT_IN_ISALNUM, "isalnum", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISALPHA, "isalpha", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISASCII, "isascii", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_ISBLANK, "isblank", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISCNTRL, "iscntrl", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISDIGIT, "isdigit", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISGRAPH, "isgraph", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISLOWER, "islower", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISPRINT, "isprint", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISPUNCT, "ispunct", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISSPACE, "isspace", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISUPPER, "isupper", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ISXDIGIT, "isxdigit", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_TOASCII, "toascii", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_TOLOWER, "tolower", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_TOUPPER, "toupper", BT_FN_INT_INT, ATTR_PURE_NOTHROW_LIST)
+
+/* Category: wctype builtins. */
+DEF_C94_BUILTIN (BUILT_IN_ISWALNUM, "iswalnum", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWALPHA, "iswalpha", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_ISWBLANK, "iswblank", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWCNTRL, "iswcntrl", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWDIGIT, "iswdigit", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWGRAPH, "iswgraph", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWLOWER, "iswlower", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWPRINT, "iswprint", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWPUNCT, "iswpunct", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWSPACE, "iswspace", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWUPPER, "iswupper", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_ISWXDIGIT, "iswxdigit", BT_FN_INT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_TOWLOWER, "towlower", BT_FN_WINT_WINT, ATTR_PURE_NOTHROW_LIST)
+DEF_C94_BUILTIN (BUILT_IN_TOWUPPER, "towupper", BT_FN_WINT_WINT, ATTR_PURE_NOTHROW_LIST)
+
+/* Category: miscellaneous builtins. */
+DEF_LIB_BUILTIN (BUILT_IN_ABORT, "abort", BT_FN_VOID, ATTR_NORETURN_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_ABS, "abs", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_AGGREGATE_INCOMING_ADDRESS, "aggregate_incoming_address", BT_FN_PTR_VAR, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ALLOCA, "alloca", BT_FN_PTR_SIZE, ATTR_MALLOC_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_APPLY, "apply", BT_FN_PTR_PTR_FN_VOID_VAR_PTR_SIZE, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_APPLY_ARGS, "apply_args", BT_FN_PTR_VAR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_ARGS_INFO, "args_info", BT_FN_INT_INT, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_BSWAP32, "bswap32", BT_FN_UINT32_UINT32, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_BSWAP64, "bswap64", BT_FN_UINT64_UINT64, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_CLEAR_CACHE, "__clear_cache", BT_FN_VOID_PTR_PTR, ATTR_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_CALLOC, "calloc", BT_FN_PTR_SIZE_SIZE, ATTR_MALLOC_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CLASSIFY_TYPE, "classify_type", BT_FN_INT_VAR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_CLZ, "clz", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CLZIMAX, "clzimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CLZL, "clzl", BT_FN_INT_ULONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CLZLL, "clzll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CONSTANT_P, "constant_p", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CTZ, "ctz", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CTZIMAX, "ctzimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CTZL, "ctzl", BT_FN_INT_ULONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CTZLL, "ctzll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_DCGETTEXT, "dcgettext", BT_FN_STRING_CONST_STRING_CONST_STRING_INT, ATTR_FORMAT_ARG_2)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_DGETTEXT, "dgettext", BT_FN_STRING_CONST_STRING_CONST_STRING, ATTR_FORMAT_ARG_2)
+DEF_GCC_BUILTIN (BUILT_IN_DWARF_CFA, "dwarf_cfa", BT_FN_PTR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_DWARF_SP_COLUMN, "dwarf_sp_column", BT_FN_UINT, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_EH_RETURN, "eh_return", BT_FN_VOID_PTRMODE_PTR, ATTR_NORETURN_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_EH_RETURN_DATA_REGNO, "eh_return_data_regno", BT_FN_INT_INT, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECL, "execl", BT_FN_INT_CONST_STRING_CONST_STRING_VAR, ATTR_SENTINEL_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECLP, "execlp", BT_FN_INT_CONST_STRING_CONST_STRING_VAR, ATTR_SENTINEL_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECLE, "execle", BT_FN_INT_CONST_STRING_CONST_STRING_VAR, ATTR_NOTHROW_SENTINEL_1)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECV, "execv", BT_FN_INT_CONST_STRING_PTR_CONST_STRING, ATTR_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECVP, "execvp", BT_FN_INT_CONST_STRING_PTR_CONST_STRING, ATTR_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_EXECVE, "execve", BT_FN_INT_CONST_STRING_PTR_CONST_STRING_PTR_CONST_STRING, ATTR_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_EXIT, "exit", BT_FN_VOID_INT, ATTR_NORETURN_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_EXPECT, "expect", BT_FN_LONG_LONG_LONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_EXTEND_POINTER, "extend_pointer", BT_FN_UNWINDWORD_PTR, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_EXTRACT_RETURN_ADDR, "extract_return_addr", BT_FN_PTR_PTR, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FFS, "ffs", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FFSIMAX, "ffsimax", BT_FN_INT_INTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FFSL, "ffsl", BT_FN_INT_LONG, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FFSLL, "ffsll", BT_FN_INT_LONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FORK, "fork", BT_FN_PID, ATTR_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_FRAME_ADDRESS, "frame_address", BT_FN_PTR_UINT, ATTR_NULL)
+DEF_LIB_BUILTIN (BUILT_IN_FREE, "free", BT_FN_VOID_PTR, ATTR_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_FROB_RETURN_ADDR, "frob_return_addr", BT_FN_PTR_PTR, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_GETTEXT, "gettext", BT_FN_STRING_CONST_STRING, ATTR_FORMAT_ARG_1)
+DEF_C99_BUILTIN (BUILT_IN_IMAXABS, "imaxabs", BT_FN_INTMAX_INTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_INIT_DWARF_REG_SIZES, "init_dwarf_reg_size_table", BT_FN_VOID_PTR, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITE, "finite", BT_FN_INT_DOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITEF, "finitef", BT_FN_INT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITEL, "finitel", BT_FN_INT_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITED32, "finited32", BT_FN_INT_DFLOAT32, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITED64, "finited64", BT_FN_INT_DFLOAT64, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FINITED128, "finited128", BT_FN_INT_DFLOAT128, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_FPCLASSIFY, "fpclassify", BT_FN_INT_INT_INT_INT_INT_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISFINITE, "isfinite", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISINF_SIGN, "isinf_sign", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ISINF, "isinf", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISINFF, "isinff", BT_FN_INT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISINFL, "isinfl", BT_FN_INT_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISINFD32, "isinfd32", BT_FN_INT_DFLOAT32, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISINFD64, "isinfd64", BT_FN_INT_DFLOAT64, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISINFD128, "isinfd128", BT_FN_INT_DFLOAT128, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_C90RES_BUILTIN (BUILT_IN_ISNAN, "isnan", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISNANF, "isnanf", BT_FN_INT_FLOAT, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISNANL, "isnanl", BT_FN_INT_LONGDOUBLE, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISNAND32, "isnand32", BT_FN_INT_DFLOAT32, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISNAND64, "isnand64", BT_FN_INT_DFLOAT64, ATTR_CONST_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_ISNAND128, "isnand128", BT_FN_INT_DFLOAT128, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_ISNORMAL, "isnormal", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISGREATER, "isgreater", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISGREATEREQUAL, "isgreaterequal", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISLESS, "isless", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISLESSEQUAL, "islessequal", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISLESSGREATER, "islessgreater", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_GCC_BUILTIN (BUILT_IN_ISUNORDERED, "isunordered", BT_FN_INT_VAR, ATTR_CONST_NOTHROW_TYPEGENERIC)
+DEF_LIB_BUILTIN (BUILT_IN_LABS, "labs", BT_FN_LONG_LONG, ATTR_CONST_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN_LLABS, "llabs", BT_FN_LONGLONG_LONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_LONGJMP, "longjmp", BT_FN_VOID_PTR_INT, ATTR_NORETURN_NOTHROW_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_MALLOC, "malloc", BT_FN_PTR_SIZE, ATTR_MALLOC_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_NEXT_ARG, "next_arg", BT_FN_PTR_VAR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_PARITY, "parity", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_PARITYIMAX, "parityimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_PARITYL, "parityl", BT_FN_INT_ULONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_PARITYLL, "parityll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_POPCOUNT, "popcount", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_POPCOUNTIMAX, "popcountimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_POPCOUNTL, "popcountl", BT_FN_INT_ULONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_POPCOUNTLL, "popcountll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_PREFETCH, "prefetch", BT_FN_VOID_CONST_PTR_VAR, ATTR_NOVOPS_LIST)
+DEF_LIB_BUILTIN (BUILT_IN_REALLOC, "realloc", BT_FN_PTR_PTR_SIZE, ATTR_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_RETURN, "return", BT_FN_VOID_PTR, ATTR_NORETURN_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_RETURN_ADDRESS, "return_address", BT_FN_PTR_UINT, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_SAVEREGS, "saveregs", BT_FN_PTR_VAR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_SETJMP, "setjmp", BT_FN_INT_PTR, ATTR_NULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRFMON, "strfmon", BT_FN_SSIZE_STRING_SIZE_CONST_STRING_VAR, ATTR_FORMAT_STRFMON_NOTHROW_3_4)
+DEF_LIB_BUILTIN (BUILT_IN_STRFTIME, "strftime", BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_PTR, ATTR_FORMAT_STRFTIME_NOTHROW_3_0)
+DEF_GCC_BUILTIN (BUILT_IN_TRAP, "trap", BT_FN_VOID, ATTR_NORETURN_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_UNWIND_INIT, "unwind_init", BT_FN_VOID, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_UPDATE_SETJMP_BUF, "update_setjmp_buf", BT_FN_VOID_PTR_INT, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_VA_COPY, "va_copy", BT_FN_VOID_VALIST_REF_VALIST_ARG, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_VA_END, "va_end", BT_FN_VOID_VALIST_REF, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_VA_START, "va_start", BT_FN_VOID_VALIST_REF_VAR, ATTR_NULL)
+DEF_GCC_BUILTIN (BUILT_IN_VA_ARG_PACK, "va_arg_pack", BT_FN_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_VA_ARG_PACK_LEN, "va_arg_pack_len", BT_FN_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN__EXIT, "_exit", BT_FN_VOID_INT, ATTR_NORETURN_NOTHROW_LIST)
+DEF_C99_BUILTIN (BUILT_IN__EXIT2, "_Exit", BT_FN_VOID_INT, ATTR_NORETURN_NOTHROW_LIST)
+
+/* Implementing nested functions. */
+DEF_BUILTIN_STUB (BUILT_IN_INIT_TRAMPOLINE, "__builtin_init_trampoline")
+DEF_BUILTIN_STUB (BUILT_IN_ADJUST_TRAMPOLINE, "__builtin_adjust_trampoline")
+DEF_BUILTIN_STUB (BUILT_IN_NONLOCAL_GOTO, "__builtin_nonlocal_goto")
+
+/* Implementing __builtin_setjmp. */
+DEF_BUILTIN_STUB (BUILT_IN_SETJMP_SETUP, "__builtin_setjmp_setup")
+DEF_BUILTIN_STUB (BUILT_IN_SETJMP_DISPATCHER, "__builtin_setjmp_dispatcher")
+DEF_BUILTIN_STUB (BUILT_IN_SETJMP_RECEIVER, "__builtin_setjmp_receiver")
+
+/* Implementing variable sized local variables. */
+DEF_BUILTIN_STUB (BUILT_IN_STACK_SAVE, "__builtin_stack_save")
+DEF_BUILTIN_STUB (BUILT_IN_STACK_RESTORE, "__builtin_stack_restore")
+
+/* Object size checking builtins. */
+DEF_GCC_BUILTIN (BUILT_IN_OBJECT_SIZE, "object_size", BT_FN_SIZE_CONST_PTR_INT, ATTR_PURE_NOTHROW_LIST)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_MEMCPY_CHK, "__memcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_MEMMOVE_CHK, "__memmove_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_MEMPCPY_CHK, "__mempcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_MEMSET_CHK, "__memset_chk", BT_FN_PTR_PTR_INT_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STPCPY_CHK, "__stpcpy_chk", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRCAT_CHK, "__strcat_chk", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRCPY_CHK, "__strcpy_chk", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRNCAT_CHK, "__strncat_chk", BT_FN_STRING_STRING_CONST_STRING_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_STRNCPY_CHK, "__strncpy_chk", BT_FN_STRING_STRING_CONST_STRING_SIZE_SIZE, ATTR_NOTHROW_NONNULL)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SNPRINTF_CHK, "__snprintf_chk", BT_FN_INT_STRING_SIZE_INT_SIZE_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_NOTHROW_5_6)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_SPRINTF_CHK, "__sprintf_chk", BT_FN_INT_STRING_INT_SIZE_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_NOTHROW_4_5)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_VSNPRINTF_CHK, "__vsnprintf_chk", BT_FN_INT_STRING_SIZE_INT_SIZE_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_NOTHROW_5_0)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_VSPRINTF_CHK, "__vsprintf_chk", BT_FN_INT_STRING_INT_SIZE_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_NOTHROW_4_0)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_FPRINTF_CHK, "__fprintf_chk", BT_FN_INT_FILEPTR_INT_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_3_4)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_PRINTF_CHK, "__printf_chk", BT_FN_INT_INT_CONST_STRING_VAR, ATTR_FORMAT_PRINTF_2_3)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_VFPRINTF_CHK, "__vfprintf_chk", BT_FN_INT_FILEPTR_INT_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_3_0)
+DEF_EXT_LIB_BUILTIN (BUILT_IN_VPRINTF_CHK, "__vprintf_chk", BT_FN_INT_INT_CONST_STRING_VALIST_ARG, ATTR_FORMAT_PRINTF_2_0)
+
+/* Profiling hooks. */
+DEF_BUILTIN_STUB (BUILT_IN_PROFILE_FUNC_ENTER, "profile_func_enter")
+DEF_BUILTIN_STUB (BUILT_IN_PROFILE_FUNC_EXIT, "profile_func_exit")
+
+/* TLS emulation. */
+DEF_BUILTIN (BUILT_IN_EMUTLS_GET_ADDRESS, targetm.emutls.get_address,
+ BUILT_IN_NORMAL,
+ BT_FN_PTR_PTR, BT_FN_PTR_PTR,
+ true, true, true, ATTR_CONST_NOTHROW_NONNULL, false,
+ !targetm.have_tls)
+DEF_BUILTIN (BUILT_IN_EMUTLS_REGISTER_COMMON,
+ targetm.emutls.register_common, BUILT_IN_NORMAL,
+ BT_FN_VOID_PTR_WORD_WORD_PTR, BT_FN_VOID_PTR_WORD_WORD_PTR,
+ true, true, true, ATTR_NOTHROW_LIST, false,
+ !targetm.have_tls)
+
+/* Multiversioning builtin dispatch hook. */
+DEF_GCC_BUILTIN (BUILT_IN_DISPATCH, "dispatch", BT_FN_INT_PTR_FN_INT_PTR_PTR_VAR, ATTR_NULL)
+
+/* Synchronization Primitives. */
+#include "sync-builtins.def"
+
+/* OpenMP builtins. */
+#include "omp-builtins.def"
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.def
new file mode 100644
index 0000000..54ebfc4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.def
@@ -0,0 +1,38 @@
+/* This file contains the definitions and documentation for the
+ additional tree codes used in the GNU C compiler (see tree.def
+ for the standard codes).
+ Copyright (C) 1987, 1988, 1990, 1993, 1997, 1998,
+ 1999, 2000, 2001, 2004, 2005, 2007 Free Software Foundation, Inc.
+ Written by Benjamin Chelf <chelf@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* Tree nodes used in the C frontend. These are also shared with the
+ C++ and Objective C frontends. */
+
+/* A COMPOUND_LITERAL_EXPR represents a C99 compound literal. The
+ COMPOUND_LITERAL_EXPR_DECL_STMT is the a DECL_STMT containing the decl
+ for the anonymous object represented by the COMPOUND_LITERAL;
+ the DECL_INITIAL of that decl is the CONSTRUCTOR that initializes
+ the compound literal. */
+DEFTREECODE (COMPOUND_LITERAL_EXPR, "compound_literal_expr", tcc_expression, 1)
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.h
new file mode 100644
index 0000000..cec782d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-common.h
@@ -0,0 +1,1047 @@
+/* Definitions for c-common.c.
+ Copyright (C) 1987, 1993, 1994, 1995, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_C_COMMON_H
+#define GCC_C_COMMON_H
+
+#include "splay-tree.h"
+#include "cpplib.h"
+#include "ggc.h"
+
+/* Usage of TREE_LANG_FLAG_?:
+ 0: TREE_NEGATED_INT (in INTEGER_CST).
+ IDENTIFIER_MARKED (used by search routines).
+ DECL_PRETTY_FUNCTION_P (in VAR_DECL)
+ 1: C_DECLARED_LABEL_FLAG (in LABEL_DECL)
+ STATEMENT_LIST_STMT_EXPR (in STATEMENT_LIST)
+ 2: unused
+ 3: STATEMENT_LIST_HAS_LABEL (in STATEMENT_LIST)
+ 4: unused
+*/
+
+/* Reserved identifiers. This is the union of all the keywords for C,
+ C++, and Objective-C. All the type modifiers have to be in one
+ block at the beginning, because they are used as mask bits. There
+ are 27 type modifiers; if we add many more we will have to redesign
+ the mask mechanism. */
+
+enum rid
+{
+ /* Modifiers: */
+ /* C, in empirical order of frequency. */
+ RID_STATIC = 0,
+ RID_UNSIGNED, RID_LONG, RID_CONST, RID_EXTERN,
+ RID_REGISTER, RID_TYPEDEF, RID_SHORT, RID_INLINE,
+ RID_VOLATILE, RID_SIGNED, RID_AUTO, RID_RESTRICT,
+
+ /* C extensions */
+ RID_COMPLEX, RID_THREAD, RID_SAT,
+
+ /* C++ */
+ RID_FRIEND, RID_VIRTUAL, RID_EXPLICIT, RID_EXPORT, RID_MUTABLE,
+
+ /* ObjC */
+ RID_IN, RID_OUT, RID_INOUT, RID_BYCOPY, RID_BYREF, RID_ONEWAY,
+
+ /* C */
+ RID_INT, RID_CHAR, RID_FLOAT, RID_DOUBLE, RID_VOID,
+ RID_ENUM, RID_STRUCT, RID_UNION, RID_IF, RID_ELSE,
+ RID_WHILE, RID_DO, RID_FOR, RID_SWITCH, RID_CASE,
+ RID_DEFAULT, RID_BREAK, RID_CONTINUE, RID_RETURN, RID_GOTO,
+ RID_SIZEOF,
+
+ /* C extensions */
+ RID_ASM, RID_TYPEOF, RID_ALIGNOF, RID_ATTRIBUTE, RID_VA_ARG,
+ RID_EXTENSION, RID_IMAGPART, RID_REALPART, RID_LABEL, RID_CHOOSE_EXPR,
+ RID_TYPES_COMPATIBLE_P,
+ RID_DFLOAT32, RID_DFLOAT64, RID_DFLOAT128,
+ RID_FRACT, RID_ACCUM,
+
+ /* This means to warn that this is a C++ keyword, and then treat it
+ as a normal identifier. */
+ RID_CXX_COMPAT_WARN,
+
+ /* Too many ways of getting the name of a function as a string */
+ RID_FUNCTION_NAME, RID_PRETTY_FUNCTION_NAME, RID_C99_FUNCTION_NAME,
+
+ /* C++ */
+ RID_BOOL, RID_WCHAR, RID_CLASS,
+ RID_PUBLIC, RID_PRIVATE, RID_PROTECTED,
+ RID_TEMPLATE, RID_NULL, RID_CATCH,
+ RID_DELETE, RID_FALSE, RID_NAMESPACE,
+ RID_NEW, RID_OFFSETOF, RID_OPERATOR,
+ RID_THIS, RID_THROW, RID_TRUE,
+ RID_TRY, RID_TYPENAME, RID_TYPEID,
+ RID_USING, RID_CHAR16, RID_CHAR32,
+
+ /* casts */
+ RID_CONSTCAST, RID_DYNCAST, RID_REINTCAST, RID_STATCAST,
+
+ /* C++ extensions */
+ RID_HAS_NOTHROW_ASSIGN, RID_HAS_NOTHROW_CONSTRUCTOR,
+ RID_HAS_NOTHROW_COPY, RID_HAS_TRIVIAL_ASSIGN,
+ RID_HAS_TRIVIAL_CONSTRUCTOR, RID_HAS_TRIVIAL_COPY,
+ RID_HAS_TRIVIAL_DESTRUCTOR, RID_HAS_VIRTUAL_DESTRUCTOR,
+ RID_IS_ABSTRACT, RID_IS_BASE_OF,
+ RID_IS_CONVERTIBLE_TO, RID_IS_CLASS,
+ RID_IS_EMPTY, RID_IS_ENUM,
+ RID_IS_POD, RID_IS_POLYMORPHIC,
+ RID_IS_UNION,
+
+ /* C++0x */
+ RID_STATIC_ASSERT, RID_DECLTYPE,
+
+ /* Objective-C */
+ RID_AT_ENCODE, RID_AT_END,
+ RID_AT_CLASS, RID_AT_ALIAS, RID_AT_DEFS,
+ RID_AT_PRIVATE, RID_AT_PROTECTED, RID_AT_PUBLIC,
+ RID_AT_PROTOCOL, RID_AT_SELECTOR,
+ RID_AT_THROW, RID_AT_TRY, RID_AT_CATCH,
+ RID_AT_FINALLY, RID_AT_SYNCHRONIZED,
+ RID_AT_INTERFACE,
+ RID_AT_IMPLEMENTATION,
+
+ RID_MAX,
+
+ RID_FIRST_MODIFIER = RID_STATIC,
+ RID_LAST_MODIFIER = RID_ONEWAY,
+
+ RID_FIRST_CXX0X = RID_STATIC_ASSERT,
+ RID_LAST_CXX0X = RID_DECLTYPE,
+ RID_FIRST_AT = RID_AT_ENCODE,
+ RID_LAST_AT = RID_AT_IMPLEMENTATION,
+ RID_FIRST_PQ = RID_IN,
+ RID_LAST_PQ = RID_ONEWAY
+};
+
+#define OBJC_IS_AT_KEYWORD(rid) \
+ ((unsigned int) (rid) >= (unsigned int) RID_FIRST_AT && \
+ (unsigned int) (rid) <= (unsigned int) RID_LAST_AT)
+
+#define OBJC_IS_PQ_KEYWORD(rid) \
+ ((unsigned int) (rid) >= (unsigned int) RID_FIRST_PQ && \
+ (unsigned int) (rid) <= (unsigned int) RID_LAST_PQ)
+
+/* The elements of `ridpointers' are identifier nodes for the reserved
+ type names and storage classes. It is indexed by a RID_... value. */
+extern GTY ((length ("(int) RID_MAX"))) tree *ridpointers;
+
+/* Standard named or nameless data types of the C compiler. */
+
+enum c_tree_index
+{
+ CTI_CHAR16_TYPE,
+ CTI_CHAR32_TYPE,
+ CTI_WCHAR_TYPE,
+ CTI_SIGNED_WCHAR_TYPE,
+ CTI_UNSIGNED_WCHAR_TYPE,
+ CTI_WINT_TYPE,
+ CTI_SIGNED_SIZE_TYPE, /* For format checking only. */
+ CTI_UNSIGNED_PTRDIFF_TYPE, /* For format checking only. */
+ CTI_INTMAX_TYPE,
+ CTI_UINTMAX_TYPE,
+ CTI_WIDEST_INT_LIT_TYPE,
+ CTI_WIDEST_UINT_LIT_TYPE,
+
+ CTI_CHAR_ARRAY_TYPE,
+ CTI_CHAR16_ARRAY_TYPE,
+ CTI_CHAR32_ARRAY_TYPE,
+ CTI_WCHAR_ARRAY_TYPE,
+ CTI_INT_ARRAY_TYPE,
+ CTI_STRING_TYPE,
+ CTI_CONST_STRING_TYPE,
+
+ /* Type for boolean expressions (bool in C++, int in C). */
+ CTI_TRUTHVALUE_TYPE,
+ CTI_TRUTHVALUE_TRUE,
+ CTI_TRUTHVALUE_FALSE,
+
+ CTI_DEFAULT_FUNCTION_TYPE,
+
+ /* These are not types, but we have to look them up all the time. */
+ CTI_FUNCTION_NAME_DECL,
+ CTI_PRETTY_FUNCTION_NAME_DECL,
+ CTI_C99_FUNCTION_NAME_DECL,
+ CTI_SAVED_FUNCTION_NAME_DECLS,
+
+ CTI_VOID_ZERO,
+
+ CTI_NULL,
+
+ CTI_MAX
+};
+
+#define C_CPP_HASHNODE(id) \
+ (&(((struct c_common_identifier *) (id))->node))
+#define C_RID_CODE(id) \
+ ((enum rid) (((struct c_common_identifier *) (id))->node.rid_code))
+#define C_SET_RID_CODE(id, code) \
+ (((struct c_common_identifier *) (id))->node.rid_code = (unsigned char) code)
+
+/* Identifier part common to the C front ends. Inherits from
+ tree_identifier, despite appearances. */
+struct c_common_identifier GTY(())
+{
+ struct tree_common common;
+ struct cpp_hashnode node;
+};
+
+/* An entry in the reserved keyword table. */
+
+struct c_common_resword
+{
+ const char *const word;
+ ENUM_BITFIELD(rid) const rid : 16;
+ const unsigned int disable : 16;
+};
+
+/* Disable mask. Keywords are disabled if (reswords[i].disable &
+ mask) is _true_. Thus for keywords which are present in all
+ languages the disable field is zero. */
+
+#define D_CONLY 0x001 /* C only (not in C++). */
+#define D_CXXONLY 0x002 /* C++ only (not in C). */
+#define D_C99 0x004 /* In C, C99 only. */
+#define D_CXX0X 0x008 /* In C++, C++0X only. */
+#define D_EXT 0x010 /* GCC extension. */
+#define D_EXT89 0x020 /* GCC extension incorporated in C99. */
+#define D_ASM 0x040 /* Disabled by -fno-asm. */
+#define D_OBJC 0x080 /* In Objective C and neither C nor C++. */
+#define D_CXX_OBJC 0x100 /* In Objective C, and C++, but not C. */
+#define D_CXXWARN 0x200 /* In C warn with -Wcxx-compat. */
+
+/* The reserved keyword table. */
+extern const struct c_common_resword c_common_reswords[];
+
+/* The number of items in the reserved keyword table. */
+extern const unsigned int num_c_common_reswords;
+
+#define char16_type_node c_global_trees[CTI_CHAR16_TYPE]
+#define char32_type_node c_global_trees[CTI_CHAR32_TYPE]
+#define wchar_type_node c_global_trees[CTI_WCHAR_TYPE]
+#define signed_wchar_type_node c_global_trees[CTI_SIGNED_WCHAR_TYPE]
+#define unsigned_wchar_type_node c_global_trees[CTI_UNSIGNED_WCHAR_TYPE]
+#define wint_type_node c_global_trees[CTI_WINT_TYPE]
+#define signed_size_type_node c_global_trees[CTI_SIGNED_SIZE_TYPE]
+#define unsigned_ptrdiff_type_node c_global_trees[CTI_UNSIGNED_PTRDIFF_TYPE]
+#define intmax_type_node c_global_trees[CTI_INTMAX_TYPE]
+#define uintmax_type_node c_global_trees[CTI_UINTMAX_TYPE]
+#define widest_integer_literal_type_node c_global_trees[CTI_WIDEST_INT_LIT_TYPE]
+#define widest_unsigned_literal_type_node c_global_trees[CTI_WIDEST_UINT_LIT_TYPE]
+
+#define truthvalue_type_node c_global_trees[CTI_TRUTHVALUE_TYPE]
+#define truthvalue_true_node c_global_trees[CTI_TRUTHVALUE_TRUE]
+#define truthvalue_false_node c_global_trees[CTI_TRUTHVALUE_FALSE]
+
+#define char_array_type_node c_global_trees[CTI_CHAR_ARRAY_TYPE]
+#define char16_array_type_node c_global_trees[CTI_CHAR16_ARRAY_TYPE]
+#define char32_array_type_node c_global_trees[CTI_CHAR32_ARRAY_TYPE]
+#define wchar_array_type_node c_global_trees[CTI_WCHAR_ARRAY_TYPE]
+#define int_array_type_node c_global_trees[CTI_INT_ARRAY_TYPE]
+#define string_type_node c_global_trees[CTI_STRING_TYPE]
+#define const_string_type_node c_global_trees[CTI_CONST_STRING_TYPE]
+
+#define default_function_type c_global_trees[CTI_DEFAULT_FUNCTION_TYPE]
+
+#define function_name_decl_node c_global_trees[CTI_FUNCTION_NAME_DECL]
+#define pretty_function_name_decl_node c_global_trees[CTI_PRETTY_FUNCTION_NAME_DECL]
+#define c99_function_name_decl_node c_global_trees[CTI_C99_FUNCTION_NAME_DECL]
+#define saved_function_name_decls c_global_trees[CTI_SAVED_FUNCTION_NAME_DECLS]
+
+/* A node for `((void) 0)'. */
+#define void_zero_node c_global_trees[CTI_VOID_ZERO]
+
+/* The node for C++ `__null'. */
+#define null_node c_global_trees[CTI_NULL]
+
+extern GTY(()) tree c_global_trees[CTI_MAX];
+
+/* In a RECORD_TYPE, a sorted array of the fields of the type, not a
+ tree for size reasons. */
+struct sorted_fields_type GTY(())
+{
+ int len;
+ tree GTY((length ("%h.len"))) elts[1];
+};
+
+/* Mark which labels are explicitly declared.
+ These may be shadowed, and may be referenced from nested functions. */
+#define C_DECLARED_LABEL_FLAG(label) TREE_LANG_FLAG_1 (label)
+
+typedef enum c_language_kind
+{
+ clk_c = 0, /* C90, C94 or C99 */
+ clk_objc = 1, /* clk_c with ObjC features. */
+ clk_cxx = 2, /* ANSI/ISO C++ */
+ clk_objcxx = 3 /* clk_cxx with ObjC features. */
+}
+c_language_kind;
+
+/* To test for a specific language use c_language, defined by each
+ front end. For "ObjC features" or "not C++" use the macros. */
+extern c_language_kind c_language;
+
+#define c_dialect_cxx() (c_language & clk_cxx)
+#define c_dialect_objc() (c_language & clk_objc)
+
+/* Information about a statement tree. */
+
+struct stmt_tree_s GTY(()) {
+ /* The current statement list being collected. */
+ tree x_cur_stmt_list;
+
+ /* In C++, Nonzero if we should treat statements as full
+ expressions. In particular, this variable is no-zero if at the
+ end of a statement we should destroy any temporaries created
+ during that statement. Similarly, if, at the end of a block, we
+ should destroy any local variables in this block. Normally, this
+ variable is nonzero, since those are the normal semantics of
+ C++.
+
+ However, in order to represent aggregate initialization code as
+ tree structure, we use statement-expressions. The statements
+ within the statement expression should not result in cleanups
+ being run until the entire enclosing statement is complete.
+
+ This flag has no effect in C. */
+ int stmts_are_full_exprs_p;
+};
+
+typedef struct stmt_tree_s *stmt_tree;
+
+/* Global state pertinent to the current function. Some C dialects
+ extend this structure with additional fields. */
+
+struct c_language_function GTY(()) {
+ /* While we are parsing the function, this contains information
+ about the statement-tree that we are building. */
+ struct stmt_tree_s x_stmt_tree;
+};
+
+/* When building a statement-tree, this is the current statement list
+ being collected. It's TREE_CHAIN is a back-pointer to the previous
+ statement list. */
+
+#define cur_stmt_list (current_stmt_tree ()->x_cur_stmt_list)
+
+/* Language-specific hooks. */
+
+/* If non-NULL, this function is called after a precompile header file
+ is loaded. */
+extern void (*lang_post_pch_load) (void);
+
+extern void push_file_scope (void);
+extern void pop_file_scope (void);
+extern stmt_tree current_stmt_tree (void);
+extern tree push_stmt_list (void);
+extern tree pop_stmt_list (tree);
+extern tree add_stmt (tree);
+extern void push_cleanup (tree, tree, bool);
+extern tree pushdecl_top_level (tree);
+extern tree pushdecl (tree);
+extern tree build_modify_expr (location_t, tree, enum tree_code, tree);
+extern tree build_indirect_ref (location_t, tree, const char *);
+
+extern int c_expand_decl (tree);
+
+extern int field_decl_cmp (const void *, const void *);
+extern void resort_sorted_fields (void *, void *, gt_pointer_operator,
+ void *);
+extern bool has_c_linkage (const_tree decl);
+
+/* Switches common to the C front ends. */
+
+/* Nonzero if prepreprocessing only. */
+
+extern int flag_preprocess_only;
+
+/* Zero means that faster, ...NonNil variants of objc_msgSend...
+ calls will be used in ObjC; passing nil receivers to such calls
+ will most likely result in crashes. */
+extern int flag_nil_receivers;
+
+/* Nonzero means that we will allow new ObjC exception syntax (@throw,
+ @try, etc.) in source code. */
+extern int flag_objc_exceptions;
+
+/* Nonzero means that we generate NeXT setjmp based exceptions. */
+extern int flag_objc_sjlj_exceptions;
+
+/* Nonzero means that code generation will be altered to support
+ "zero-link" execution. This currently affects ObjC only, but may
+ affect other languages in the future. */
+extern int flag_zero_link;
+
+/* Nonzero means emit an '__OBJC, __image_info' for the current translation
+ unit. It will inform the ObjC runtime that class definition(s) herein
+ contained are to replace one(s) previously loaded. */
+extern int flag_replace_objc_classes;
+
+/* Nonzero means don't output line number information. */
+
+extern char flag_no_line_commands;
+
+/* Nonzero causes -E output not to be done, but directives such as
+ #define that have side effects are still obeyed. */
+
+extern char flag_no_output;
+
+/* Nonzero means dump macros in some fashion; contains the 'D', 'M',
+ 'N' or 'U' of the command line switch. */
+
+extern char flag_dump_macros;
+
+/* Nonzero means pass #include lines through to the output. */
+
+extern char flag_dump_includes;
+
+/* Nonzero means process PCH files while preprocessing. */
+
+extern bool flag_pch_preprocess;
+
+/* The file name to which we should write a precompiled header, or
+ NULL if no header will be written in this compile. */
+
+extern const char *pch_file;
+
+/* Nonzero if an ISO standard was selected. It rejects macros in the
+ user's namespace. */
+
+extern int flag_iso;
+
+/* Nonzero if -undef was given. It suppresses target built-in macros
+ and assertions. */
+
+extern int flag_undef;
+
+/* Nonzero means don't recognize the non-ANSI builtin functions. */
+
+extern int flag_no_builtin;
+
+/* Nonzero means don't recognize the non-ANSI builtin functions.
+ -ansi sets this. */
+
+extern int flag_no_nonansi_builtin;
+
+/* Nonzero means give `double' the same size as `float'. */
+
+extern int flag_short_double;
+
+/* Nonzero means give `wchar_t' the same size as `short'. */
+
+extern int flag_short_wchar;
+
+/* Nonzero means allow implicit conversions between vectors with
+ differing numbers of subparts and/or differing element types. */
+extern int flag_lax_vector_conversions;
+
+/* Nonzero means allow Microsoft extensions without warnings or errors. */
+extern int flag_ms_extensions;
+
+/* Nonzero means don't recognize the keyword `asm'. */
+
+extern int flag_no_asm;
+
+/* Nonzero means give string constants the type `const char *', as mandated
+ by the standard. */
+
+extern int flag_const_strings;
+
+/* Nonzero means to treat bitfields as signed unless they say `unsigned'. */
+
+extern int flag_signed_bitfields;
+
+/* Warn about #pragma directives that are not recognized. */
+
+extern int warn_unknown_pragmas; /* Tri state variable. */
+
+/* Warn about format/argument anomalies in calls to formatted I/O functions
+ (*printf, *scanf, strftime, strfmon, etc.). */
+
+extern int warn_format;
+
+
+/* C/ObjC language option variables. */
+
+
+/* Nonzero means allow type mismatches in conditional expressions;
+ just make their values `void'. */
+
+extern int flag_cond_mismatch;
+
+/* Nonzero means enable C89 Amendment 1 features. */
+
+extern int flag_isoc94;
+
+/* Nonzero means use the ISO C99 dialect of C. */
+
+extern int flag_isoc99;
+
+/* Nonzero means that we have builtin functions, and main is an int. */
+
+extern int flag_hosted;
+
+/* ObjC language option variables. */
+
+
+/* Open and close the file for outputting class declarations, if
+ requested (ObjC). */
+
+extern int flag_gen_declaration;
+
+/* Tells the compiler that this is a special run. Do not perform any
+ compiling, instead we are to test some platform dependent features
+ and output a C header file with appropriate definitions. */
+
+extern int print_struct_values;
+
+/* ???. Undocumented. */
+
+extern const char *constant_string_class_name;
+
+
+/* C++ language option variables. */
+
+
+/* Nonzero means don't recognize any extension keywords. */
+
+extern int flag_no_gnu_keywords;
+
+/* Nonzero means do emit exported implementations of functions even if
+ they can be inlined. */
+
+extern int flag_implement_inlines;
+
+/* Nonzero means that implicit instantiations will be emitted if needed. */
+
+extern int flag_implicit_templates;
+
+/* Nonzero means that implicit instantiations of inline templates will be
+ emitted if needed, even if instantiations of non-inline templates
+ aren't. */
+
+extern int flag_implicit_inline_templates;
+
+/* Nonzero means generate separate instantiation control files and
+ juggle them at link time. */
+
+extern int flag_use_repository;
+
+/* Nonzero if we want to issue diagnostics that the standard says are not
+ required. */
+
+extern int flag_optional_diags;
+
+/* Nonzero means we should attempt to elide constructors when possible. */
+
+extern int flag_elide_constructors;
+
+/* Nonzero means that member functions defined in class scope are
+ inline by default. */
+
+extern int flag_default_inline;
+
+/* Controls whether compiler generates 'type descriptor' that give
+ run-time type information. */
+
+extern int flag_rtti;
+
+/* Nonzero if we want to conserve space in the .o files. We do this
+ by putting uninitialized data and runtime initialized data into
+ .common instead of .data at the expense of not flagging multiple
+ definitions. */
+
+extern int flag_conserve_space;
+
+/* Nonzero if we want to obey access control semantics. */
+
+extern int flag_access_control;
+
+/* Nonzero if we want to check the return value of new and avoid calling
+ constructors if it is a null pointer. */
+
+extern int flag_check_new;
+
+/* The supported C++ dialects. */
+
+enum cxx_dialect {
+ /* C++98 */
+ cxx98,
+ /* Experimental features that are likely to become part of
+ C++0x. */
+ cxx0x
+};
+
+/* The C++ dialect being used. C++98 is the default. */
+extern enum cxx_dialect cxx_dialect;
+
+/* Nonzero if we want the new ISO rules for pushing a new scope for `for'
+ initialization variables.
+ 0: Old rules, set by -fno-for-scope.
+ 2: New ISO rules, set by -ffor-scope.
+ 1: Try to implement new ISO rules, but with backup compatibility
+ (and warnings). This is the default, for now. */
+
+extern int flag_new_for_scope;
+
+/* Nonzero if we want to emit defined symbols with common-like linkage as
+ weak symbols where possible, in order to conform to C++ semantics.
+ Otherwise, emit them as local symbols. */
+
+extern int flag_weak;
+
+/* 0 means we want the preprocessor to not emit line directives for
+ the current working directory. 1 means we want it to do it. -1
+ means we should decide depending on whether debugging information
+ is being emitted or not. */
+
+extern int flag_working_directory;
+
+/* Nonzero to use __cxa_atexit, rather than atexit, to register
+ destructors for local statics and global objects. */
+
+extern int flag_use_cxa_atexit;
+
+/* Nonzero to use __cxa_get_exception_ptr in the C++ exception-handling
+ logic. */
+
+extern int flag_use_cxa_get_exception_ptr;
+
+/* Nonzero means to implement standard semantics for exception
+ specifications, calling unexpected if an exception is thrown that
+ doesn't match the specification. Zero means to treat them as
+ assertions and optimize accordingly, but not check them. */
+
+extern int flag_enforce_eh_specs;
+
+/* Nonzero (the default) means to generate thread-safe code for
+ initializing local statics. */
+
+extern int flag_threadsafe_statics;
+
+/* Nonzero means warn about implicit declarations. */
+
+extern int warn_implicit;
+
+/* Warn about using __null (as NULL in C++) as sentinel. For code compiled
+ with GCC this doesn't matter as __null is guaranteed to have the right
+ size. */
+
+extern int warn_strict_null_sentinel;
+
+/* Maximum template instantiation depth. This limit is rather
+ arbitrary, but it exists to limit the time it takes to notice
+ infinite template instantiations. */
+
+extern int max_tinst_depth;
+
+/* Nonzero means the expression being parsed will never be evaluated.
+ This is a count, since unevaluated expressions can nest. */
+
+extern int skip_evaluation;
+
+/* C types are partitioned into three subsets: object, function, and
+ incomplete types. */
+#define C_TYPE_OBJECT_P(type) \
+ (TREE_CODE (type) != FUNCTION_TYPE && TYPE_SIZE (type))
+
+#define C_TYPE_INCOMPLETE_P(type) \
+ (TREE_CODE (type) != FUNCTION_TYPE && TYPE_SIZE (type) == 0)
+
+#define C_TYPE_FUNCTION_P(type) \
+ (TREE_CODE (type) == FUNCTION_TYPE)
+
+/* For convenience we define a single macro to identify the class of
+ object or incomplete types. */
+#define C_TYPE_OBJECT_OR_INCOMPLETE_P(type) \
+ (!C_TYPE_FUNCTION_P (type))
+
+/* Attribute table common to the C front ends. */
+extern const struct attribute_spec c_common_attribute_table[];
+extern const struct attribute_spec c_common_format_attribute_table[];
+
+/* Pointer to function to lazily generate the VAR_DECL for __FUNCTION__ etc.
+ ID is the identifier to use, NAME is the string.
+ TYPE_DEP indicates whether it depends on type of the function or not
+ (i.e. __PRETTY_FUNCTION__). */
+
+extern tree (*make_fname_decl) (tree, int);
+
+extern tree identifier_global_value (tree);
+extern void record_builtin_type (enum rid, const char *, tree);
+extern tree build_void_list_node (void);
+extern void start_fname_decls (void);
+extern void finish_fname_decls (void);
+extern const char *fname_as_string (int);
+extern tree fname_decl (location_t, unsigned, tree);
+
+extern void check_function_arguments (tree, int, tree *, tree);
+extern void check_function_arguments_recurse (void (*)
+ (void *, tree,
+ unsigned HOST_WIDE_INT),
+ void *, tree,
+ unsigned HOST_WIDE_INT);
+extern bool check_builtin_function_arguments (tree, int, tree *);
+extern void check_function_format (tree, int, tree *);
+extern void set_Wformat (int);
+extern tree handle_format_attribute (tree *, tree, tree, int, bool *);
+extern tree handle_format_arg_attribute (tree *, tree, tree, int, bool *);
+extern int c_common_handle_option (size_t code, const char *arg, int value);
+extern bool c_common_missing_argument (const char *opt, size_t code);
+extern tree c_common_type_for_mode (enum machine_mode, int);
+extern tree c_common_type_for_size (unsigned int, int);
+extern tree c_common_fixed_point_type_for_size (unsigned int, unsigned int,
+ int, int);
+extern tree c_common_unsigned_type (tree);
+extern tree c_common_signed_type (tree);
+extern tree c_common_signed_or_unsigned_type (int, tree);
+extern tree c_build_bitfield_integer_type (unsigned HOST_WIDE_INT, int);
+extern bool decl_with_nonnull_addr_p (const_tree);
+extern tree c_common_truthvalue_conversion (location_t, tree);
+extern void c_apply_type_quals_to_decl (int, tree);
+extern tree c_sizeof_or_alignof_type (tree, bool, int);
+extern tree c_alignof_expr (tree);
+/* Print an error message for invalid operands to arith operation CODE.
+ NOP_EXPR is used as a special case (see truthvalue_conversion). */
+extern void binary_op_error (location_t, enum tree_code, tree, tree);
+extern tree fix_string_type (tree);
+struct varray_head_tag;
+extern void constant_expression_warning (tree);
+extern void constant_expression_error (tree);
+extern bool strict_aliasing_warning (tree, tree, tree);
+extern void warnings_for_convert_and_check (tree, tree, tree);
+extern tree convert_and_check (tree, tree);
+extern void overflow_warning (tree);
+extern void warn_logical_operator (enum tree_code, tree, tree);
+extern void check_main_parameter_types (tree decl);
+extern bool c_determine_visibility (tree);
+extern bool same_scalar_type_ignoring_signedness (tree, tree);
+
+#define c_sizeof(T) c_sizeof_or_alignof_type (T, true, 1)
+#define c_alignof(T) c_sizeof_or_alignof_type (T, false, 1)
+
+/* Subroutine of build_binary_op, used for certain operations. */
+extern tree shorten_binary_op (tree result_type, tree op0, tree op1, bool bitwise);
+
+/* Subroutine of build_binary_op, used for comparison operations.
+ See if the operands have both been converted from subword integer types
+ and, if so, perhaps change them both back to their original type. */
+extern tree shorten_compare (tree *, tree *, tree *, enum tree_code *);
+
+extern tree pointer_int_sum (enum tree_code, tree, tree);
+
+/* Add qualifiers to a type, in the fashion for C. */
+extern tree c_build_qualified_type (tree, int);
+
+/* Build tree nodes and builtin functions common to both C and C++ language
+ frontends. */
+extern void c_common_nodes_and_builtins (void);
+
+extern void set_builtin_user_assembler_name (tree decl, const char *asmspec);
+
+extern void disable_builtin_function (const char *);
+
+extern void set_compound_literal_name (tree decl);
+
+extern tree build_va_arg (tree, tree);
+
+extern unsigned int c_common_init_options (unsigned int, const char **);
+extern bool c_common_post_options (const char **);
+extern bool c_common_init (void);
+extern void c_common_finish (void);
+extern void c_common_parse_file (int);
+extern alias_set_type c_common_get_alias_set (tree);
+extern void c_register_builtin_type (tree, const char*);
+extern bool c_promoting_integer_type_p (const_tree);
+extern int self_promoting_args_p (const_tree);
+extern tree strip_pointer_operator (tree);
+extern tree strip_pointer_or_array_types (tree);
+extern HOST_WIDE_INT c_common_to_target_charset (HOST_WIDE_INT);
+
+/* This is the basic parsing function. */
+extern void c_parse_file (void);
+/* This is misnamed, it actually performs end-of-compilation processing. */
+extern void finish_file (void);
+
+
+/* These macros provide convenient access to the various _STMT nodes. */
+
+/* Nonzero if a given STATEMENT_LIST represents the outermost binding
+ if a statement expression. */
+#define STATEMENT_LIST_STMT_EXPR(NODE) \
+ TREE_LANG_FLAG_1 (STATEMENT_LIST_CHECK (NODE))
+
+/* Nonzero if a label has been added to the statement list. */
+#define STATEMENT_LIST_HAS_LABEL(NODE) \
+ TREE_LANG_FLAG_3 (STATEMENT_LIST_CHECK (NODE))
+
+/* COMPOUND_LITERAL_EXPR accessors. */
+#define COMPOUND_LITERAL_EXPR_DECL_STMT(NODE) \
+ TREE_OPERAND (COMPOUND_LITERAL_EXPR_CHECK (NODE), 0)
+#define COMPOUND_LITERAL_EXPR_DECL(NODE) \
+ DECL_EXPR_DECL (COMPOUND_LITERAL_EXPR_DECL_STMT (NODE))
+
+/* In a FIELD_DECL, nonzero if the decl was originally a bitfield. */
+#define DECL_C_BIT_FIELD(NODE) \
+ (DECL_LANG_FLAG_4 (FIELD_DECL_CHECK (NODE)) == 1)
+#define SET_DECL_C_BIT_FIELD(NODE) \
+ (DECL_LANG_FLAG_4 (FIELD_DECL_CHECK (NODE)) = 1)
+#define CLEAR_DECL_C_BIT_FIELD(NODE) \
+ (DECL_LANG_FLAG_4 (FIELD_DECL_CHECK (NODE)) = 0)
+
+extern void emit_local_var (tree);
+extern tree do_case (tree, tree);
+extern tree build_stmt (enum tree_code, ...);
+extern tree build_case_label (tree, tree, tree);
+
+/* These functions must be defined by each front-end which implements
+ a variant of the C language. They are used in c-common.c. */
+
+extern tree build_unary_op (location_t, enum tree_code, tree, int);
+extern tree build_binary_op (location_t, enum tree_code, tree, tree, int);
+extern tree perform_integral_promotions (tree);
+
+/* These functions must be defined by each front-end which implements
+ a variant of the C language. They are used by port files. */
+
+extern tree default_conversion (tree);
+
+/* Given two integer or real types, return the type for their sum.
+ Given two compatible ANSI C types, returns the merged type. */
+
+extern tree common_type (tree, tree);
+
+extern tree decl_constant_value (tree);
+
+/* Handle increment and decrement of boolean types. */
+extern tree boolean_increment (enum tree_code, tree);
+
+extern int case_compare (splay_tree_key, splay_tree_key);
+
+extern tree c_add_case_label (splay_tree, tree, tree, tree, tree);
+
+extern void c_do_switch_warnings (splay_tree, location_t, tree, tree);
+
+extern tree build_function_call (tree, tree);
+
+extern tree resolve_overloaded_builtin (tree, tree);
+
+extern tree finish_label_address_expr (tree, location_t);
+
+/* Same function prototype, but the C and C++ front ends have
+ different implementations. Used in c-common.c. */
+extern tree lookup_label (tree);
+extern tree lookup_name (tree);
+
+extern bool vector_targets_convertible_p (const_tree t1, const_tree t2);
+extern bool vector_types_convertible_p (const_tree t1, const_tree t2, bool emit_lax_note);
+
+extern rtx c_expand_expr (tree, rtx, enum machine_mode, int, rtx *);
+
+extern tree c_staticp (tree);
+
+extern void init_c_lex (void);
+
+extern void c_cpp_builtins (cpp_reader *);
+extern void c_cpp_builtins_optimize_pragma (cpp_reader *, tree, tree);
+
+/* Positive if an implicit `extern "C"' scope has just been entered;
+ negative if such a scope has just been exited. */
+extern GTY(()) int pending_lang_change;
+
+/* Information recorded about each file examined during compilation. */
+
+struct c_fileinfo
+{
+ int time; /* Time spent in the file. */
+
+ /* Flags used only by C++.
+ INTERFACE_ONLY nonzero means that we are in an "interface" section
+ of the compiler. INTERFACE_UNKNOWN nonzero means we cannot trust
+ the value of INTERFACE_ONLY. If INTERFACE_UNKNOWN is zero and
+ INTERFACE_ONLY is zero, it means that we are responsible for
+ exporting definitions that others might need. */
+ short interface_only;
+ short interface_unknown;
+};
+
+struct c_fileinfo *get_fileinfo (const char *);
+extern void dump_time_statistics (void);
+
+extern bool c_dump_tree (void *, tree);
+
+extern void c_warn_unused_result (gimple_seq);
+
+extern void verify_sequence_points (tree);
+
+extern tree fold_offsetof (tree, tree);
+
+/* Places where an lvalue, or modifiable lvalue, may be required.
+ Used to select diagnostic messages in lvalue_error and
+ readonly_error. */
+enum lvalue_use {
+ lv_assign,
+ lv_increment,
+ lv_decrement,
+ lv_addressof,
+ lv_asm
+};
+
+extern void lvalue_error (enum lvalue_use);
+
+extern int complete_array_type (tree *, tree, bool);
+
+extern tree builtin_type_for_size (int, bool);
+
+extern void warn_array_subscript_with_type_char (tree);
+extern void warn_about_parentheses (enum tree_code,
+ enum tree_code, tree,
+ enum tree_code, tree);
+extern void warn_for_unused_label (tree label);
+extern void warn_for_div_by_zero (location_t, tree divisor);
+extern void warn_for_sign_compare (location_t,
+ tree orig_op0, tree orig_op1,
+ tree op0, tree op1,
+ tree result_type,
+ enum tree_code resultcode);
+extern void check_for_self_assign (location_t, tree, tree);
+
+/* In c-gimplify.c */
+extern void c_genericize (tree);
+extern int c_gimplify_expr (tree *, gimple_seq *, gimple_seq *);
+extern tree c_build_bind_expr (tree, tree);
+
+/* In c-pch.c */
+extern void pch_init (void);
+extern int c_common_valid_pch (cpp_reader *pfile, const char *name, int fd);
+extern void c_common_read_pch (cpp_reader *pfile, const char *name, int fd,
+ const char *orig);
+extern void c_common_write_pch (void);
+extern void c_common_no_more_pch (void);
+extern void c_common_pch_pragma (cpp_reader *pfile, const char *);
+extern void c_common_print_pch_checksum (FILE *f);
+
+/* In *-checksum.c */
+extern const unsigned char executable_checksum[16];
+
+/* In c-cppbuiltin.c */
+extern void builtin_define_std (const char *macro);
+extern void builtin_define_with_value (const char *, const char *, int);
+extern void c_stddef_cpp_builtins (void);
+extern void fe_file_change (const struct line_map *);
+extern void c_parse_error (const char *, enum cpp_ttype, tree);
+
+/* Objective-C / Objective-C++ entry points. */
+
+/* The following ObjC/ObjC++ functions are called by the C and/or C++
+ front-ends; they all must have corresponding stubs in stub-objc.c. */
+extern tree objc_is_class_name (tree);
+extern tree objc_is_object_ptr (tree);
+extern void objc_check_decl (tree);
+extern int objc_is_reserved_word (tree);
+extern bool objc_compare_types (tree, tree, int, tree);
+extern void objc_volatilize_decl (tree);
+extern bool objc_type_quals_match (tree, tree);
+extern tree objc_rewrite_function_call (tree, tree);
+extern tree objc_message_selector (void);
+extern tree objc_lookup_ivar (tree, tree);
+extern void objc_clear_super_receiver (void);
+extern int objc_is_public (tree, tree);
+extern tree objc_is_id (tree);
+extern void objc_declare_alias (tree, tree);
+extern void objc_declare_class (tree);
+extern void objc_declare_protocols (tree);
+extern tree objc_build_message_expr (tree);
+extern tree objc_finish_message_expr (tree, tree, tree);
+extern tree objc_build_selector_expr (tree);
+extern tree objc_build_protocol_expr (tree);
+extern tree objc_build_encode_expr (tree);
+extern tree objc_build_string_object (tree);
+extern tree objc_get_protocol_qualified_type (tree, tree);
+extern tree objc_get_class_reference (tree);
+extern tree objc_get_class_ivars (tree);
+extern void objc_start_class_interface (tree, tree, tree);
+extern void objc_start_category_interface (tree, tree, tree);
+extern void objc_start_protocol (tree, tree);
+extern void objc_continue_interface (void);
+extern void objc_finish_interface (void);
+extern void objc_start_class_implementation (tree, tree);
+extern void objc_start_category_implementation (tree, tree);
+extern void objc_continue_implementation (void);
+extern void objc_finish_implementation (void);
+extern void objc_set_visibility (int);
+extern void objc_set_method_type (enum tree_code);
+extern tree objc_build_method_signature (tree, tree, tree, bool);
+extern void objc_add_method_declaration (tree);
+extern void objc_start_method_definition (tree);
+extern void objc_finish_method_definition (tree);
+extern void objc_add_instance_variable (tree);
+extern tree objc_build_keyword_decl (tree, tree, tree);
+extern tree objc_build_throw_stmt (tree);
+extern void objc_begin_try_stmt (location_t, tree);
+extern tree objc_finish_try_stmt (void);
+extern void objc_begin_catch_clause (tree);
+extern void objc_finish_catch_clause (void);
+extern void objc_build_finally_clause (location_t, tree);
+extern tree objc_build_synchronized (location_t, tree, tree);
+extern int objc_static_init_needed_p (void);
+extern tree objc_generate_static_init_call (tree);
+extern tree objc_generate_write_barrier (tree, enum tree_code, tree);
+
+/* The following are provided by the C and C++ front-ends, and called by
+ ObjC/ObjC++. */
+extern void *objc_get_current_scope (void);
+extern void objc_mark_locals_volatile (void *);
+
+/* In c-ppoutput.c */
+extern void init_pp_output (FILE *);
+extern void preprocess_file (cpp_reader *);
+extern void pp_file_change (const struct line_map *);
+extern void pp_dir_change (cpp_reader *, const char *);
+extern bool check_missing_format_attribute (tree, tree);
+
+/* In c-omp.c */
+extern tree c_finish_omp_master (tree);
+extern tree c_finish_omp_critical (tree, tree);
+extern tree c_finish_omp_ordered (tree);
+extern void c_finish_omp_barrier (void);
+extern tree c_finish_omp_atomic (enum tree_code, tree, tree);
+extern void c_finish_omp_flush (void);
+extern void c_finish_omp_taskwait (void);
+extern tree c_finish_omp_for (location_t, tree, tree, tree, tree, tree, tree);
+extern void c_split_parallel_clauses (tree, tree *, tree *);
+extern enum omp_clause_default_kind c_omp_predetermined_sharing (tree);
+
+/* Not in c-omp.c; provided by the front end. */
+extern bool c_omp_sharing_predetermined (tree);
+extern tree c_omp_remap_decl (tree, bool);
+extern void record_types_used_by_current_var_decl (tree);
+
+/* In order for the format checking to accept the C frontend
+ diagnostic framework extensions, you must include this file before
+ toplev.h, not after. The C front end formats are a subset of those
+ for C++, so they are the appropriate set to use in common code;
+ cp-tree.h overrides this for C++. */
+#ifndef GCC_DIAG_STYLE
+#define GCC_DIAG_STYLE __gcc_cdiag__
+#endif
+
+#endif /* ! GCC_C_COMMON_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-pretty-print.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-pretty-print.h
new file mode 100644
index 0000000..75f31ca
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/c-pretty-print.h
@@ -0,0 +1,211 @@
+/* Various declarations for the C and C++ pretty-printers.
+ Copyright (C) 2002, 2003, 2004, 2007 Free Software Foundation, Inc.
+ Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_C_PRETTY_PRINTER
+#define GCC_C_PRETTY_PRINTER
+
+#include "tree.h"
+#include "c-common.h"
+#include "pretty-print.h"
+
+
+typedef enum
+ {
+ pp_c_flag_abstract = 1 << 1,
+ pp_c_flag_last_bit = 2
+ } pp_c_pretty_print_flags;
+
+
+/* The data type used to bundle information necessary for pretty-printing
+ a C or C++ entity. */
+typedef struct c_pretty_print_info c_pretty_printer;
+
+/* The type of a C pretty-printer 'member' function. */
+typedef void (*c_pretty_print_fn) (c_pretty_printer *, tree);
+
+/* The datatype that contains information necessary for pretty-printing
+ a tree that represents a C construct. Any pretty-printer for a
+ language using C/c++ syntax can derive from this datatype and reuse
+ facilities provided here. It can do so by having a subobject of type
+ c_pretty_printer and override the macro pp_c_base to return a pointer
+ to that subobject. Such a pretty-printer has the responsibility to
+ initialize the pp_base() part, then call pp_c_pretty_printer_init
+ to set up the components that are specific to the C pretty-printer.
+ A derived pretty-printer can override any function listed in the
+ vtable below. See cp/cxx-pretty-print.h and cp/cxx-pretty-print.c
+ for an example of derivation. */
+struct c_pretty_print_info
+{
+ pretty_printer base;
+ /* Points to the first element of an array of offset-list.
+ Not used yet. */
+ int *offset_list;
+
+ pp_flags flags;
+
+ /* These must be overridden by each of the C and C++ front-end to
+ reflect their understanding of syntactic productions when they differ. */
+ c_pretty_print_fn declaration;
+ c_pretty_print_fn declaration_specifiers;
+ c_pretty_print_fn declarator;
+ c_pretty_print_fn abstract_declarator;
+ c_pretty_print_fn direct_abstract_declarator;
+ c_pretty_print_fn type_specifier_seq;
+ c_pretty_print_fn direct_declarator;
+ c_pretty_print_fn ptr_operator;
+ c_pretty_print_fn parameter_list;
+ c_pretty_print_fn type_id;
+ c_pretty_print_fn simple_type_specifier;
+ c_pretty_print_fn function_specifier;
+ c_pretty_print_fn storage_class_specifier;
+ c_pretty_print_fn initializer;
+
+ c_pretty_print_fn statement;
+
+ c_pretty_print_fn constant;
+ c_pretty_print_fn id_expression;
+ c_pretty_print_fn primary_expression;
+ c_pretty_print_fn postfix_expression;
+ c_pretty_print_fn unary_expression;
+ c_pretty_print_fn multiplicative_expression;
+ c_pretty_print_fn conditional_expression;
+ c_pretty_print_fn assignment_expression;
+ c_pretty_print_fn expression;
+};
+
+/* Override the pp_base macro. Derived pretty-printers should not
+ touch this macro. Instead they should override pp_c_base instead. */
+#undef pp_base
+#define pp_base(PP) (&pp_c_base (PP)->base)
+
+
+#define pp_c_tree_identifier(PPI, ID) \
+ pp_c_identifier (PPI, IDENTIFIER_POINTER (ID))
+
+#define pp_declaration(PPI, T) \
+ pp_c_base (PPI)->declaration (pp_c_base (PPI), T)
+#define pp_declaration_specifiers(PPI, D) \
+ pp_c_base (PPI)->declaration_specifiers (pp_c_base (PPI), D)
+#define pp_abstract_declarator(PP, D) \
+ pp_c_base (PP)->abstract_declarator (pp_c_base (PP), D)
+#define pp_type_specifier_seq(PPI, D) \
+ pp_c_base (PPI)->type_specifier_seq (pp_c_base (PPI), D)
+#define pp_declarator(PPI, D) \
+ pp_c_base (PPI)->declarator (pp_c_base (PPI), D)
+#define pp_direct_declarator(PPI, D) \
+ pp_c_base (PPI)->direct_declarator (pp_c_base (PPI), D)
+#define pp_direct_abstract_declarator(PP, D) \
+ pp_c_base (PP)->direct_abstract_declarator (pp_c_base (PP), D)
+#define pp_ptr_operator(PP, D) \
+ pp_c_base (PP)->ptr_operator (pp_c_base (PP), D)
+#define pp_parameter_list(PPI, T) \
+ pp_c_base (PPI)->parameter_list (pp_c_base (PPI), T)
+#define pp_type_id(PPI, D) \
+ pp_c_base (PPI)->type_id (pp_c_base (PPI), D)
+#define pp_simple_type_specifier(PP, T) \
+ pp_c_base (PP)->simple_type_specifier (pp_c_base (PP), T)
+#define pp_function_specifier(PP, D) \
+ pp_c_base (PP)->function_specifier (pp_c_base (PP), D)
+#define pp_storage_class_specifier(PP, D) \
+ pp_c_base (PP)->storage_class_specifier (pp_c_base (PP), D);
+
+#define pp_statement(PPI, S) \
+ pp_c_base (PPI)->statement (pp_c_base (PPI), S)
+
+#define pp_constant(PP, E) \
+ pp_c_base (PP)->constant (pp_c_base (PP), E)
+#define pp_id_expression(PP, E) \
+ pp_c_base (PP)->id_expression (pp_c_base (PP), E)
+#define pp_primary_expression(PPI, E) \
+ pp_c_base (PPI)->primary_expression (pp_c_base (PPI), E)
+#define pp_postfix_expression(PPI, E) \
+ pp_c_base (PPI)->postfix_expression (pp_c_base (PPI), E)
+#define pp_unary_expression(PPI, E) \
+ pp_c_base (PPI)->unary_expression (pp_c_base (PPI), E)
+#define pp_initializer(PPI, E) \
+ pp_c_base (PPI)->initializer (pp_c_base (PPI), E)
+#define pp_multiplicative_expression(PPI, E) \
+ pp_c_base (PPI)->multiplicative_expression (pp_c_base (PPI), E)
+#define pp_conditional_expression(PPI, E) \
+ pp_c_base (PPI)->conditional_expression (pp_c_base (PPI), E)
+#define pp_assignment_expression(PPI, E) \
+ pp_c_base (PPI)->assignment_expression (pp_c_base (PPI), E)
+#define pp_expression(PP, E) \
+ pp_c_base (PP)->expression (pp_c_base (PP), E)
+
+
+/* Returns the c_pretty_printer base object of PRETTY-PRINTER. This
+ macro must be overridden by any subclass of c_pretty_print_info. */
+#define pp_c_base(PP) (PP)
+
+extern void pp_c_pretty_printer_init (c_pretty_printer *);
+void pp_c_whitespace (c_pretty_printer *);
+void pp_c_left_paren (c_pretty_printer *);
+void pp_c_right_paren (c_pretty_printer *);
+void pp_c_left_brace (c_pretty_printer *);
+void pp_c_right_brace (c_pretty_printer *);
+void pp_c_left_bracket (c_pretty_printer *);
+void pp_c_right_bracket (c_pretty_printer *);
+void pp_c_dot (c_pretty_printer *);
+void pp_c_ampersand (c_pretty_printer *);
+void pp_c_star (c_pretty_printer *);
+void pp_c_arrow (c_pretty_printer *);
+void pp_c_semicolon (c_pretty_printer *);
+void pp_c_complement (c_pretty_printer *);
+void pp_c_exclamation (c_pretty_printer *);
+void pp_c_space_for_pointer_operator (c_pretty_printer *, tree);
+
+/* Declarations. */
+void pp_c_tree_decl_identifier (c_pretty_printer *, tree);
+void pp_c_function_definition (c_pretty_printer *, tree);
+void pp_c_attributes (c_pretty_printer *, tree);
+void pp_c_type_qualifier_list (c_pretty_printer *, tree);
+void pp_c_parameter_type_list (c_pretty_printer *, tree);
+void pp_c_declaration (c_pretty_printer *, tree);
+void pp_c_declaration_specifiers (c_pretty_printer *, tree);
+void pp_c_declarator (c_pretty_printer *, tree);
+void pp_c_direct_declarator (c_pretty_printer *, tree);
+void pp_c_specifier_qualifier_list (c_pretty_printer *, tree);
+void pp_c_function_specifier (c_pretty_printer *, tree);
+void pp_c_type_id (c_pretty_printer *, tree);
+void pp_c_direct_abstract_declarator (c_pretty_printer *, tree);
+void pp_c_type_specifier (c_pretty_printer *, tree);
+void pp_c_storage_class_specifier (c_pretty_printer *, tree);
+/* Statements. */
+void pp_c_statement (c_pretty_printer *, tree);
+/* Expressions. */
+void pp_c_expression (c_pretty_printer *, tree);
+void pp_c_logical_or_expression (c_pretty_printer *, tree);
+void pp_c_expression_list (c_pretty_printer *, tree);
+void pp_c_constructor_elts (c_pretty_printer *, VEC(constructor_elt,gc) *);
+void pp_c_call_argument_list (c_pretty_printer *, tree);
+void pp_c_unary_expression (c_pretty_printer *, tree);
+void pp_c_cast_expression (c_pretty_printer *, tree);
+void pp_c_postfix_expression (c_pretty_printer *, tree);
+void pp_c_primary_expression (c_pretty_printer *, tree);
+void pp_c_init_declarator (c_pretty_printer *, tree);
+void pp_c_constant (c_pretty_printer *, tree);
+void pp_c_id_expression (c_pretty_printer *, tree);
+void pp_c_identifier (c_pretty_printer *, const char *);
+void pp_c_string_literal (c_pretty_printer *, tree);
+
+void print_c_tree (FILE *file, tree t);
+
+#endif /* GCC_C_PRETTY_PRINTER */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfghooks.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfghooks.h
new file mode 100644
index 0000000..8d6a669
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfghooks.h
@@ -0,0 +1,197 @@
+/* Hooks for cfg representation specific functions.
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Sebastian Pop <s.pop@laposte.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CFGHOOKS_H
+#define GCC_CFGHOOKS_H
+
+struct cfg_hooks
+{
+ /* Name of the corresponding ir. */
+ const char *name;
+
+ /* Debugging. */
+ int (*verify_flow_info) (void);
+ void (*dump_bb) (basic_block, FILE *, int, int);
+
+ /* Basic CFG manipulation. */
+
+ /* Return new basic block. */
+ basic_block (*create_basic_block) (void *head, void *end, basic_block after);
+
+ /* Redirect edge E to the given basic block B and update underlying program
+ representation. Returns edge representing redirected branch (that may not
+ be equivalent to E in the case of duplicate edges being removed) or NULL
+ if edge is not easily redirectable for whatever reason. */
+ edge (*redirect_edge_and_branch) (edge e, basic_block b);
+
+ /* Same as the above but allows redirecting of fallthru edges. In that case
+ newly created forwarder basic block is returned. The edge must
+ not be abnormal. */
+ basic_block (*redirect_edge_and_branch_force) (edge, basic_block);
+
+ /* Returns true if it is possible to remove the edge by redirecting it
+ to the destination of the other edge going from its source. */
+ bool (*can_remove_branch_p) (const_edge);
+
+ /* Remove statements corresponding to a given basic block. */
+ void (*delete_basic_block) (basic_block);
+
+ /* Creates a new basic block just after basic block B by splitting
+ everything after specified instruction I. */
+ basic_block (*split_block) (basic_block b, void * i);
+
+ /* Move block B immediately after block A. */
+ bool (*move_block_after) (basic_block b, basic_block a);
+
+ /* Return true when blocks A and B can be merged into single basic block. */
+ bool (*can_merge_blocks_p) (basic_block a, basic_block b);
+
+ /* Merge blocks A and B. */
+ void (*merge_blocks) (basic_block a, basic_block b);
+
+ /* Predict edge E using PREDICTOR to given PROBABILITY. */
+ void (*predict_edge) (edge e, enum br_predictor predictor, int probability);
+
+ /* Return true if the one of outgoing edges is already predicted by
+ PREDICTOR. */
+ bool (*predicted_by_p) (const_basic_block bb, enum br_predictor predictor);
+
+ /* Return true when block A can be duplicated. */
+ bool (*can_duplicate_block_p) (const_basic_block a);
+
+ /* Duplicate block A. */
+ basic_block (*duplicate_block) (basic_block a);
+
+ /* Higher level functions representable by primitive operations above if
+ we didn't have some oddities in RTL and Tree representations. */
+ basic_block (*split_edge) (edge);
+ void (*make_forwarder_block) (edge);
+
+ /* Tries to make the edge fallthru. */
+ void (*tidy_fallthru_edge) (edge);
+
+ /* Say whether a block ends with a call, possibly followed by some
+ other code that must stay with the call. */
+ bool (*block_ends_with_call_p) (basic_block);
+
+ /* Say whether a block ends with a conditional branch. Switches
+ and unconditional branches do not qualify. */
+ bool (*block_ends_with_condjump_p) (const_basic_block);
+
+ /* Add fake edges to the function exit for any non constant and non noreturn
+ calls, volatile inline assembly in the bitmap of blocks specified by
+ BLOCKS or to the whole CFG if BLOCKS is zero. Return the number of blocks
+ that were split.
+
+ The goal is to expose cases in which entering a basic block does not imply
+ that all subsequent instructions must be executed. */
+ int (*flow_call_edges_add) (sbitmap);
+
+ /* This function is called immediately after edge E is added to the
+ edge vector E->dest->preds. */
+ void (*execute_on_growing_pred) (edge);
+
+ /* This function is called immediately before edge E is removed from
+ the edge vector E->dest->preds. */
+ void (*execute_on_shrinking_pred) (edge);
+
+ /* A hook for duplicating loop in CFG, currently this is used
+ in loop versioning. */
+ bool (*cfg_hook_duplicate_loop_to_header_edge) (struct loop *, edge,
+ unsigned, sbitmap,
+ edge, VEC (edge, heap) **,
+ int);
+
+ /* Add condition to new basic block and update CFG used in loop
+ versioning. */
+ void (*lv_add_condition_to_bb) (basic_block, basic_block, basic_block,
+ void *);
+ /* Update the PHI nodes in case of loop versioning. */
+ void (*lv_adjust_loop_header_phi) (basic_block, basic_block,
+ basic_block, edge);
+
+ /* Given a condition BB extract the true/false taken/not taken edges
+ (depending if we are on tree's or RTL). */
+ void (*extract_cond_bb_edges) (basic_block, edge *, edge *);
+
+
+ /* Add PHI arguments queued in PENDINT_STMT list on edge E to edge
+ E->dest (only in tree-ssa loop versioning. */
+ void (*flush_pending_stmts) (edge);
+};
+
+extern void verify_flow_info (void);
+extern void dump_bb (basic_block, FILE *, int);
+extern edge redirect_edge_and_branch (edge, basic_block);
+extern basic_block redirect_edge_and_branch_force (edge, basic_block);
+extern bool can_remove_branch_p (const_edge);
+extern void remove_branch (edge);
+extern void remove_edge (edge);
+extern edge split_block (basic_block, void *);
+extern edge split_block_after_labels (basic_block);
+extern bool move_block_after (basic_block, basic_block);
+extern void delete_basic_block (basic_block);
+extern basic_block split_edge (edge);
+extern basic_block create_basic_block (void *, void *, basic_block);
+extern basic_block create_empty_bb (basic_block);
+extern bool can_merge_blocks_p (basic_block, basic_block);
+extern void merge_blocks (basic_block, basic_block);
+extern edge make_forwarder_block (basic_block, bool (*)(edge),
+ void (*) (basic_block));
+extern void tidy_fallthru_edge (edge);
+extern void tidy_fallthru_edges (void);
+extern void predict_edge (edge e, enum br_predictor predictor, int probability);
+extern bool predicted_by_p (const_basic_block bb, enum br_predictor predictor);
+extern bool can_duplicate_block_p (const_basic_block);
+extern basic_block duplicate_block (basic_block, edge, basic_block);
+extern bool block_ends_with_call_p (basic_block bb);
+extern bool block_ends_with_condjump_p (const_basic_block bb);
+extern int flow_call_edges_add (sbitmap);
+extern void execute_on_growing_pred (edge);
+extern void execute_on_shrinking_pred (edge);
+extern bool cfg_hook_duplicate_loop_to_header_edge (struct loop *loop, edge,
+ unsigned int ndupl,
+ sbitmap wont_exit,
+ edge orig,
+ VEC (edge, heap) **to_remove,
+ int flags);
+
+extern void lv_flush_pending_stmts (edge);
+extern void extract_cond_bb_edges (basic_block, edge *, edge*);
+extern void lv_adjust_loop_header_phi (basic_block, basic_block, basic_block,
+ edge);
+extern void lv_add_condition_to_bb (basic_block, basic_block, basic_block,
+ void *);
+
+/* Hooks containers. */
+extern struct cfg_hooks gimple_cfg_hooks;
+extern struct cfg_hooks rtl_cfg_hooks;
+extern struct cfg_hooks cfg_layout_rtl_cfg_hooks;
+
+/* Declarations. */
+extern enum ir_type current_ir_type (void);
+extern void rtl_register_cfg_hooks (void);
+extern void cfg_layout_rtl_register_cfg_hooks (void);
+extern void gimple_register_cfg_hooks (void);
+extern struct cfg_hooks get_cfg_hooks (void);
+extern void set_cfg_hooks (struct cfg_hooks);
+
+#endif /* GCC_CFGHOOKS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfgloop.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfgloop.h
new file mode 100644
index 0000000..0af5be0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cfgloop.h
@@ -0,0 +1,649 @@
+/* Natural loop functions
+ Copyright (C) 1987, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CFGLOOP_H
+#define GCC_CFGLOOP_H
+
+#include "basic-block.h"
+/* For rtx_code. */
+#include "rtl.h"
+#include "vecprim.h"
+#include "double-int.h"
+
+/* Structure to hold decision about unrolling/peeling. */
+enum lpt_dec
+{
+ LPT_NONE,
+ LPT_PEEL_COMPLETELY,
+ LPT_PEEL_SIMPLE,
+ LPT_UNROLL_CONSTANT,
+ LPT_UNROLL_RUNTIME,
+ LPT_UNROLL_STUPID
+};
+
+struct lpt_decision GTY (())
+{
+ enum lpt_dec decision;
+ unsigned times;
+};
+
+/* The structure describing a bound on number of iterations of a loop. */
+
+struct nb_iter_bound GTY ((chain_next ("%h.next")))
+{
+ /* The statement STMT is executed at most ... */
+ gimple stmt;
+
+ /* ... BOUND + 1 times (BOUND must be an unsigned constant).
+ The + 1 is added for the following reasons:
+
+ a) 0 would otherwise be unused, while we would need to care more about
+ overflows (as MAX + 1 is sometimes produced as the estimate on number
+ of executions of STMT).
+ b) it is consistent with the result of number_of_iterations_exit. */
+ double_int bound;
+
+ /* True if the statement will cause the loop to be leaved the (at most)
+ BOUND + 1-st time it is executed, that is, all the statements after it
+ are executed at most BOUND times. */
+ bool is_exit;
+
+ /* The next bound in the list. */
+ struct nb_iter_bound *next;
+};
+
+/* Description of the loop exit. */
+
+struct loop_exit GTY (())
+{
+ /* The exit edge. */
+ struct edge_def *e;
+
+ /* Previous and next exit in the list of the exits of the loop. */
+ struct loop_exit *prev;
+ struct loop_exit *next;
+
+ /* Next element in the list of loops from that E exits. */
+ struct loop_exit *next_e;
+};
+
+typedef struct loop *loop_p;
+DEF_VEC_P (loop_p);
+DEF_VEC_ALLOC_P (loop_p, heap);
+DEF_VEC_ALLOC_P (loop_p, gc);
+
+/* An integer estimation of the number of iterations. Estimate_state
+ describes what is the state of the estimation. */
+enum loop_estimation
+{
+ /* Estimate was not computed yet. */
+ EST_NOT_COMPUTED,
+ /* Estimate is ready. */
+ EST_AVAILABLE
+};
+
+/* Structure to hold information for each natural loop. */
+struct loop GTY ((chain_next ("%h.next")))
+{
+ /* Index into loops array. */
+ int num;
+
+ /* Number of loop insns. */
+ unsigned ninsns;
+
+ /* Basic block of loop header. */
+ struct basic_block_def *header;
+
+ /* Basic block of loop latch. */
+ struct basic_block_def *latch;
+
+ /* For loop unrolling/peeling decision. */
+ struct lpt_decision lpt_decision;
+
+ /* Average number of executed insns per iteration. */
+ unsigned av_ninsns;
+
+ /* Number of blocks contained within the loop. */
+ unsigned num_nodes;
+
+ /* Superloops of the loop, starting with the outermost loop. */
+ VEC (loop_p, gc) *superloops;
+
+ /* The first inner (child) loop or NULL if innermost loop. */
+ struct loop *inner;
+
+ /* Link to the next (sibling) loop. */
+ struct loop *next;
+
+ /* Auxiliary info specific to a pass. */
+ PTR GTY ((skip (""))) aux;
+
+ /* The number of times the latch of the loop is executed.
+ This is an INTEGER_CST or an expression containing symbolic
+ names. Don't access this field directly:
+ number_of_latch_executions computes and caches the computed
+ information in this field. */
+ tree nb_iterations;
+
+ /* An integer guaranteed to bound the number of iterations of the loop
+ from above. */
+ double_int nb_iterations_upper_bound;
+
+ /* An integer giving the expected number of iterations of the loop. */
+ double_int nb_iterations_estimate;
+
+ bool any_upper_bound;
+ bool any_estimate;
+
+ /* An integer estimation of the number of iterations. Estimate_state
+ describes what is the state of the estimation. */
+ enum loop_estimation estimate_state;
+
+ /* Upper bound on number of iterations of a loop. */
+ struct nb_iter_bound *bounds;
+
+ /* Head of the cyclic list of the exits of the loop. */
+ struct loop_exit *exits;
+};
+
+/* Flags for state of loop structure. */
+enum
+{
+ LOOPS_HAVE_PREHEADERS = 1,
+ LOOPS_HAVE_SIMPLE_LATCHES = 2,
+ LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS = 4,
+ LOOPS_HAVE_RECORDED_EXITS = 8,
+ LOOPS_MAY_HAVE_MULTIPLE_LATCHES = 16,
+ LOOP_CLOSED_SSA = 32,
+ LOOPS_NEED_FIXUP = 64,
+ LOOPS_HAVE_FALLTHRU_PREHEADERS = 128
+};
+
+#define LOOPS_NORMAL (LOOPS_HAVE_PREHEADERS | LOOPS_HAVE_SIMPLE_LATCHES \
+ | LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS)
+#define AVOID_CFG_MODIFICATIONS (LOOPS_MAY_HAVE_MULTIPLE_LATCHES)
+
+/* Structure to hold CFG information about natural loops within a function. */
+struct loops GTY (())
+{
+ /* State of loops. */
+ int state;
+
+ /* Array of the loops. */
+ VEC (loop_p, gc) *larray;
+
+ /* Maps edges to the list of their descriptions as loop exits. Edges
+ whose sources or destinations have loop_father == NULL (which may
+ happen during the cfg manipulations) should not appear in EXITS. */
+ htab_t GTY((param_is (struct loop_exit))) exits;
+
+ /* Pointer to root of loop hierarchy tree. */
+ struct loop *tree_root;
+};
+
+/* Loop recognition. */
+extern int flow_loops_find (struct loops *);
+extern void disambiguate_loops_with_multiple_latches (void);
+extern void flow_loops_free (struct loops *);
+extern void flow_loops_dump (FILE *,
+ void (*)(const struct loop *, FILE *, int), int);
+extern void flow_loop_dump (const struct loop *, FILE *,
+ void (*)(const struct loop *, FILE *, int), int);
+struct loop *alloc_loop (void);
+extern void flow_loop_free (struct loop *);
+int flow_loop_nodes_find (basic_block, struct loop *);
+void fix_loop_structure (bitmap changed_bbs);
+void mark_irreducible_loops (void);
+void release_recorded_exits (void);
+void record_loop_exits (void);
+void rescan_loop_exit (edge, bool, bool);
+
+/* Loop data structure manipulation/querying. */
+extern void flow_loop_tree_node_add (struct loop *, struct loop *);
+extern void flow_loop_tree_node_remove (struct loop *);
+extern void add_loop (struct loop *, struct loop *);
+extern bool flow_loop_nested_p (const struct loop *, const struct loop *);
+extern bool flow_bb_inside_loop_p (const struct loop *, const_basic_block);
+extern struct loop * find_common_loop (struct loop *, struct loop *);
+struct loop *superloop_at_depth (struct loop *, unsigned);
+struct eni_weights_d;
+extern unsigned tree_num_loop_insns (struct loop *, struct eni_weights_d *);
+extern int num_loop_insns (const struct loop *);
+extern int average_num_loop_insns (const struct loop *);
+extern unsigned get_loop_level (const struct loop *);
+extern bool loop_exit_edge_p (const struct loop *, const_edge);
+extern bool is_loop_exit (struct loop *, basic_block);
+extern void mark_loop_exit_edges (void);
+
+/* Loops & cfg manipulation. */
+extern basic_block *get_loop_body (const struct loop *);
+extern unsigned get_loop_body_with_size (const struct loop *, basic_block *,
+ unsigned);
+extern basic_block *get_loop_body_in_dom_order (const struct loop *);
+extern basic_block *get_loop_body_in_bfs_order (const struct loop *);
+extern basic_block *get_loop_body_in_custom_order (const struct loop *,
+ int (*) (const void *, const void *));
+
+extern VEC (edge, heap) *get_loop_exit_edges (const struct loop *);
+edge single_exit (const struct loop *);
+extern unsigned num_loop_branches (const struct loop *);
+
+extern edge loop_preheader_edge (const struct loop *);
+extern edge loop_latch_edge (const struct loop *);
+
+extern void add_bb_to_loop (basic_block, struct loop *);
+extern void remove_bb_from_loops (basic_block);
+
+extern void cancel_loop_tree (struct loop *);
+extern void delete_loop (struct loop *);
+
+enum
+{
+ CP_SIMPLE_PREHEADERS = 1,
+ CP_FALLTHRU_PREHEADERS = 2
+};
+
+basic_block create_preheader (struct loop *, int);
+extern void create_preheaders (int);
+extern void force_single_succ_latches (void);
+
+extern void verify_loop_structure (void);
+
+/* Loop analysis. */
+extern bool just_once_each_iteration_p (const struct loop *, const_basic_block);
+gcov_type expected_loop_iterations_unbounded (const struct loop *);
+extern unsigned expected_loop_iterations (const struct loop *);
+extern rtx doloop_condition_get (rtx);
+
+void estimate_numbers_of_iterations_loop (struct loop *);
+HOST_WIDE_INT estimated_loop_iterations_int (struct loop *, bool);
+bool estimated_loop_iterations (struct loop *, bool, double_int *);
+
+/* Loop manipulation. */
+extern bool can_duplicate_loop_p (const struct loop *loop);
+
+#define DLTHE_FLAG_UPDATE_FREQ 1 /* Update frequencies in
+ duplicate_loop_to_header_edge. */
+#define DLTHE_RECORD_COPY_NUMBER 2 /* Record copy number in the aux
+ field of newly create BB. */
+#define DLTHE_FLAG_COMPLETTE_PEEL 4 /* Update frequencies expecting
+ a complete peeling. */
+
+extern edge create_empty_if_region_on_edge (edge, tree);
+extern struct loop *create_empty_loop_on_edge (edge, tree, tree, tree, tree,
+ tree *, struct loop *);
+extern struct loop * duplicate_loop (struct loop *, struct loop *);
+extern bool duplicate_loop_to_header_edge (struct loop *, edge,
+ unsigned, sbitmap, edge,
+ VEC (edge, heap) **, int);
+extern struct loop *loopify (edge, edge,
+ basic_block, edge, edge, bool,
+ unsigned, unsigned);
+struct loop * loop_version (struct loop *, void *,
+ basic_block *, unsigned, unsigned, unsigned, bool);
+extern bool remove_path (edge);
+void scale_loop_frequencies (struct loop *, int, int);
+
+/* Induction variable analysis. */
+
+/* The description of induction variable. The things are a bit complicated
+ due to need to handle subregs and extends. The value of the object described
+ by it can be obtained as follows (all computations are done in extend_mode):
+
+ Value in i-th iteration is
+ delta + mult * extend_{extend_mode} (subreg_{mode} (base + i * step)).
+
+ If first_special is true, the value in the first iteration is
+ delta + mult * base
+
+ If extend = UNKNOWN, first_special must be false, delta 0, mult 1 and value is
+ subreg_{mode} (base + i * step)
+
+ The get_iv_value function can be used to obtain these expressions.
+
+ ??? Add a third mode field that would specify the mode in that inner
+ computation is done, which would enable it to be different from the
+ outer one? */
+
+struct rtx_iv
+{
+ /* Its base and step (mode of base and step is supposed to be extend_mode,
+ see the description above). */
+ rtx base, step;
+
+ /* The type of extend applied to it (SIGN_EXTEND, ZERO_EXTEND or UNKNOWN). */
+ enum rtx_code extend;
+
+ /* Operations applied in the extended mode. */
+ rtx delta, mult;
+
+ /* The mode it is extended to. */
+ enum machine_mode extend_mode;
+
+ /* The mode the variable iterates in. */
+ enum machine_mode mode;
+
+ /* Whether the first iteration needs to be handled specially. */
+ unsigned first_special : 1;
+};
+
+/* The description of an exit from the loop and of the number of iterations
+ till we take the exit. */
+
+struct niter_desc
+{
+ /* The edge out of the loop. */
+ edge out_edge;
+
+ /* The other edge leading from the condition. */
+ edge in_edge;
+
+ /* True if we are able to say anything about number of iterations of the
+ loop. */
+ bool simple_p;
+
+ /* True if the loop iterates the constant number of times. */
+ bool const_iter;
+
+ /* Number of iterations if constant. */
+ unsigned HOST_WIDEST_INT niter;
+
+ /* Upper bound on the number of iterations. */
+ unsigned HOST_WIDEST_INT niter_max;
+
+ /* Assumptions under that the rest of the information is valid. */
+ rtx assumptions;
+
+ /* Assumptions under that the loop ends before reaching the latch,
+ even if value of niter_expr says otherwise. */
+ rtx noloop_assumptions;
+
+ /* Condition under that the loop is infinite. */
+ rtx infinite;
+
+ /* Whether the comparison is signed. */
+ bool signed_p;
+
+ /* The mode in that niter_expr should be computed. */
+ enum machine_mode mode;
+
+ /* The number of iterations of the loop. */
+ rtx niter_expr;
+};
+
+extern void iv_analysis_loop_init (struct loop *);
+extern bool iv_analyze (rtx, rtx, struct rtx_iv *);
+extern bool iv_analyze_result (rtx, rtx, struct rtx_iv *);
+extern bool iv_analyze_expr (rtx, rtx, enum machine_mode, struct rtx_iv *);
+extern rtx get_iv_value (struct rtx_iv *, rtx);
+extern bool biv_p (rtx, rtx);
+extern void find_simple_exit (struct loop *, struct niter_desc *);
+extern void iv_analysis_done (void);
+
+extern struct niter_desc *get_simple_loop_desc (struct loop *loop);
+extern void free_simple_loop_desc (struct loop *loop);
+
+static inline struct niter_desc *
+simple_loop_desc (struct loop *loop)
+{
+ return (struct niter_desc *) loop->aux;
+}
+
+/* Accessors for the loop structures. */
+
+/* Returns the loop with index NUM from current_loops. */
+
+static inline struct loop *
+get_loop (unsigned num)
+{
+ return VEC_index (loop_p, current_loops->larray, num);
+}
+
+/* Returns the number of superloops of LOOP. */
+
+static inline unsigned
+loop_depth (const struct loop *loop)
+{
+ return VEC_length (loop_p, loop->superloops);
+}
+
+/* Returns the immediate superloop of LOOP, or NULL if LOOP is the outermost
+ loop. */
+
+static inline struct loop *
+loop_outer (const struct loop *loop)
+{
+ unsigned n = VEC_length (loop_p, loop->superloops);
+
+ if (n == 0)
+ return NULL;
+
+ return VEC_index (loop_p, loop->superloops, n - 1);
+}
+
+/* Returns the list of loops in current_loops. */
+
+static inline VEC (loop_p, gc) *
+get_loops (void)
+{
+ if (!current_loops)
+ return NULL;
+
+ return current_loops->larray;
+}
+
+/* Returns the number of loops in current_loops (including the removed
+ ones and the fake loop that forms the root of the loop tree). */
+
+static inline unsigned
+number_of_loops (void)
+{
+ if (!current_loops)
+ return 0;
+
+ return VEC_length (loop_p, current_loops->larray);
+}
+
+/* Returns true if state of the loops satisfies all properties
+ described by FLAGS. */
+
+static inline bool
+loops_state_satisfies_p (unsigned flags)
+{
+ return (current_loops->state & flags) == flags;
+}
+
+/* Sets FLAGS to the loops state. */
+
+static inline void
+loops_state_set (unsigned flags)
+{
+ current_loops->state |= flags;
+}
+
+/* Clears FLAGS from the loops state. */
+
+static inline void
+loops_state_clear (unsigned flags)
+{
+ if (!current_loops)
+ return;
+ current_loops->state &= ~flags;
+}
+
+/* Loop iterators. */
+
+/* Flags for loop iteration. */
+
+enum li_flags
+{
+ LI_INCLUDE_ROOT = 1, /* Include the fake root of the loop tree. */
+ LI_FROM_INNERMOST = 2, /* Iterate over the loops in the reverse order,
+ starting from innermost ones. */
+ LI_ONLY_INNERMOST = 4 /* Iterate only over innermost loops. */
+};
+
+/* The iterator for loops. */
+
+typedef struct
+{
+ /* The list of loops to visit. */
+ VEC(int,heap) *to_visit;
+
+ /* The index of the actual loop. */
+ unsigned idx;
+} loop_iterator;
+
+static inline void
+fel_next (loop_iterator *li, loop_p *loop)
+{
+ int anum;
+
+ while (VEC_iterate (int, li->to_visit, li->idx, anum))
+ {
+ li->idx++;
+ *loop = get_loop (anum);
+ if (*loop)
+ return;
+ }
+
+ VEC_free (int, heap, li->to_visit);
+ *loop = NULL;
+}
+
+static inline void
+fel_init (loop_iterator *li, loop_p *loop, unsigned flags)
+{
+ struct loop *aloop;
+ unsigned i;
+ int mn;
+
+ li->idx = 0;
+ if (!current_loops)
+ {
+ li->to_visit = NULL;
+ *loop = NULL;
+ return;
+ }
+
+ li->to_visit = VEC_alloc (int, heap, number_of_loops ());
+ mn = (flags & LI_INCLUDE_ROOT) ? 0 : 1;
+
+ if (flags & LI_ONLY_INNERMOST)
+ {
+ for (i = 0; VEC_iterate (loop_p, current_loops->larray, i, aloop); i++)
+ if (aloop != NULL
+ && aloop->inner == NULL
+ && aloop->num >= mn)
+ VEC_quick_push (int, li->to_visit, aloop->num);
+ }
+ else if (flags & LI_FROM_INNERMOST)
+ {
+ /* Push the loops to LI->TO_VISIT in postorder. */
+ for (aloop = current_loops->tree_root;
+ aloop->inner != NULL;
+ aloop = aloop->inner)
+ continue;
+
+ while (1)
+ {
+ if (aloop->num >= mn)
+ VEC_quick_push (int, li->to_visit, aloop->num);
+
+ if (aloop->next)
+ {
+ for (aloop = aloop->next;
+ aloop->inner != NULL;
+ aloop = aloop->inner)
+ continue;
+ }
+ else if (!loop_outer (aloop))
+ break;
+ else
+ aloop = loop_outer (aloop);
+ }
+ }
+ else
+ {
+ /* Push the loops to LI->TO_VISIT in preorder. */
+ aloop = current_loops->tree_root;
+ while (1)
+ {
+ if (aloop->num >= mn)
+ VEC_quick_push (int, li->to_visit, aloop->num);
+
+ if (aloop->inner != NULL)
+ aloop = aloop->inner;
+ else
+ {
+ while (aloop != NULL && aloop->next == NULL)
+ aloop = loop_outer (aloop);
+ if (aloop == NULL)
+ break;
+ aloop = aloop->next;
+ }
+ }
+ }
+
+ fel_next (li, loop);
+}
+
+#define FOR_EACH_LOOP(LI, LOOP, FLAGS) \
+ for (fel_init (&(LI), &(LOOP), FLAGS); \
+ (LOOP); \
+ fel_next (&(LI), &(LOOP)))
+
+#define FOR_EACH_LOOP_BREAK(LI) \
+ { \
+ VEC_free (int, heap, (LI)->to_visit); \
+ break; \
+ }
+
+/* The properties of the target. */
+
+extern unsigned target_avail_regs;
+extern unsigned target_res_regs;
+extern unsigned target_reg_cost [2];
+extern unsigned target_spill_cost [2];
+
+/* Register pressure estimation for induction variable optimizations & loop
+ invariant motion. */
+extern unsigned estimate_reg_pressure_cost (unsigned, unsigned, bool);
+extern void init_set_costs (void);
+
+/* Loop optimizer initialization. */
+extern void loop_optimizer_init (unsigned);
+extern void loop_optimizer_finalize (void);
+
+/* Optimization passes. */
+extern void unswitch_loops (void);
+
+enum
+{
+ UAP_PEEL = 1, /* Enables loop peeling. */
+ UAP_UNROLL = 2, /* Enables unrolling of loops if it seems profitable. */
+ UAP_UNROLL_ALL = 4 /* Enables unrolling of all loops. */
+};
+
+extern void unroll_and_peel_loops (int);
+extern void doloop_optimize_loops (void);
+extern void move_loop_invariants (void);
+
+#endif /* GCC_CFGLOOP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cgraph.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cgraph.h
new file mode 100644
index 0000000..f83ba05
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cgraph.h
@@ -0,0 +1,550 @@
+/* Callgraph handling code.
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Jan Hubicka
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CGRAPH_H
+#define GCC_CGRAPH_H
+#include "tree.h"
+#include "basic-block.h"
+
+enum availability
+{
+ /* Not yet set by cgraph_function_body_availability. */
+ AVAIL_UNSET,
+ /* Function body/variable initializer is unknown. */
+ AVAIL_NOT_AVAILABLE,
+ /* Function body/variable initializer is known but might be replaced
+ by a different one from other compilation unit and thus needs to
+ be dealt with a care. Like AVAIL_NOT_AVAILABLE it can have
+ arbitrary side effects on escaping variables and functions, while
+ like AVAILABLE it might access static variables. */
+ AVAIL_OVERWRITABLE,
+ /* Function body/variable initializer is known and will be used in final
+ program. */
+ AVAIL_AVAILABLE,
+ /* Function body/variable initializer is known and all it's uses are explicitly
+ visible within current unit (ie it's address is never taken and it is not
+ exported to other units).
+ Currently used only for functions. */
+ AVAIL_LOCAL
+};
+
+extern const char * const cgraph_availability_names[];
+
+/* Information about the function collected locally.
+ Available after function is analyzed. */
+
+struct cgraph_local_info GTY(())
+{
+ struct inline_summary {
+ /* Estimated stack frame consumption by the function. */
+ HOST_WIDE_INT estimated_self_stack_size;
+
+ /* Size of the function before inlining. */
+ int self_insns;
+ /* Size of the hot regions of the function before inlining. */
+ int self_hot_insns;
+ } inline_summary;
+
+ /* Set when function function is visible in current compilation unit only
+ and its address is never taken. */
+ unsigned local : 1;
+
+ /* Set when function is visible by other units. */
+ unsigned externally_visible : 1;
+
+ /* Set once it has been finalized so we consider it to be output. */
+ unsigned finalized : 1;
+
+ /* False when there something makes inlining impossible (such as va_arg). */
+ unsigned inlinable : 1;
+
+ /* True when function should be inlined independently on its size. */
+ unsigned disregard_inline_limits : 1;
+
+ /* True when the function has been originally extern inline, but it is
+ redefined now. */
+ unsigned redefined_extern_inline : 1;
+
+ /* True if statics_read_for_function and
+ statics_written_for_function contain valid data. */
+ unsigned for_functions_valid : 1;
+
+ /* True if the function is going to be emitted in some other translation
+ unit, referenced from vtable. */
+ unsigned vtable_method : 1;
+};
+
+/* Information about the function that needs to be computed globally
+ once compilation is finished. Available only with -funit-at-a-time. */
+
+struct cgraph_global_info GTY(())
+{
+ /* Estimated stack frame consumption by the function. */
+ HOST_WIDE_INT estimated_stack_size;
+ HOST_WIDE_INT estimated_stack_size_pessimistic;
+
+ /* Expected offset of the stack frame of inlined function. */
+ HOST_WIDE_INT stack_frame_offset;
+
+ /* For inline clones this points to the function they will be
+ inlined into. */
+ struct cgraph_node *inlined_to;
+
+ /* Estimated size of the function after inlining. */
+ int insns;
+
+ /* Estimated average per-callsite growth after inlining all calls to
+ this function. INT_MIN if not computed. */
+ int estimated_average_growth;
+
+ /* Set iff the function has been inlined at least once. */
+ bool inlined;
+};
+
+/* Information about the function that is propagated by the RTL backend.
+ Available only for functions that has been already assembled. */
+
+struct cgraph_rtl_info GTY(())
+{
+ unsigned int preferred_incoming_stack_boundary;
+};
+
+/* The cgraph data structure.
+ Each function decl has assigned cgraph_node listing callees and callers. */
+
+struct cgraph_node GTY((chain_next ("%h.next"), chain_prev ("%h.previous")))
+{
+ tree decl;
+ struct cgraph_edge *callees;
+ struct cgraph_edge *callers;
+ struct cgraph_node *next;
+ struct cgraph_node *previous;
+ /* For nested functions points to function the node is nested in. */
+ struct cgraph_node *origin;
+ /* Points to first nested function, if any. */
+ struct cgraph_node *nested;
+ /* Pointer to the next function with same origin, if any. */
+ struct cgraph_node *next_nested;
+ /* Pointer to the next function in cgraph_nodes_queue. */
+ struct cgraph_node *next_needed;
+ /* Pointer to the next clone. */
+ struct cgraph_node *next_clone;
+ struct cgraph_node *prev_clone;
+ /* Pointer to a single unique cgraph node for this function. If the
+ function is to be output, this is the copy that will survive. */
+ struct cgraph_node *master_clone;
+ /* For functions with many calls sites it holds map from call expression
+ to the edge to speed up cgraph_edge function. */
+ htab_t GTY((param_is (struct cgraph_edge))) call_site_hash;
+
+ PTR GTY ((skip)) aux;
+
+ struct cgraph_local_info local;
+ struct cgraph_global_info global;
+ struct cgraph_rtl_info rtl;
+
+ /* Expected number of executions: calculated in profile.c. */
+ gcov_type count;
+ /* Maximum count of any basic block in the function. */
+ gcov_type max_bb_count;
+ /* Unique id of the node. */
+ int uid;
+ /* Ordering of all cgraph nodes. */
+ int order;
+
+ /* unique id for profiling. pid is not suitable because of different
+ number of cfg nodes with -fprofile-generate and -fprofile-use */
+ int pid;
+
+ /* Set when function must be output - it is externally visible
+ or its address is taken. */
+ unsigned needed : 1;
+ /* Set when the address of the function has been taken. */
+ unsigned address_taken : 1;
+ /* Set when decl is an abstract function pointed to by the
+ ABSTRACT_DECL_ORIGIN of a reachable function. */
+ unsigned abstract_and_needed : 1;
+ /* Set when function is reachable by call from other function
+ that is either reachable or needed. */
+ unsigned reachable : 1;
+ /* Set once the function is lowered (i.e. its CFG is built). */
+ unsigned lowered : 1;
+ /* Set once the function has been instantiated and its callee
+ lists created. */
+ unsigned analyzed : 1;
+ /* Set when function is scheduled to be assembled. */
+ unsigned output : 1;
+ /* Set for aliases once they got through assemble_alias. */
+ unsigned alias : 1;
+
+ /* Is this function cloned during versioning ? */
+ unsigned is_versioned_clone : 1;
+
+ /* In non-unit-at-a-time mode the function body of inline candidates is saved
+ into clone before compiling so the function in original form can be
+ inlined later. This pointer points to the clone. */
+ tree inline_decl;
+};
+
+struct cgraph_edge GTY((chain_next ("%h.next_caller"), chain_prev ("%h.prev_caller")))
+{
+ struct cgraph_node *caller;
+ struct cgraph_node *callee;
+ struct cgraph_edge *prev_caller;
+ struct cgraph_edge *next_caller;
+ struct cgraph_edge *prev_callee;
+ struct cgraph_edge *next_callee;
+ gimple call_stmt;
+ PTR GTY ((skip (""))) aux;
+ /* When NULL, inline this call. When non-NULL, points to the explanation
+ why function was not inlined. */
+ const char *inline_failed;
+ /* Expected number of executions: calculated in profile.c. */
+ gcov_type count;
+ /* Expected frequency of executions within the function.
+ When set to CGRAPH_FREQ_BASE, the edge is expected to be called once
+ per function call. The range is 0 to CGRAPH_FREQ_MAX. */
+ int frequency;
+ /* Depth of loop nest, 1 means no loop nest. */
+ unsigned int loop_nest : 31;
+ /* Whether this edge describes a call that was originally indirect. */
+ unsigned int indirect_call : 1;
+ /* Unique id of the edge. */
+ int uid;
+};
+
+#define CGRAPH_FREQ_BASE 1000
+#define CGRAPH_FREQ_MAX 100000
+
+typedef struct cgraph_edge *cgraph_edge_p;
+
+DEF_VEC_P(cgraph_edge_p);
+DEF_VEC_ALLOC_P(cgraph_edge_p,heap);
+
+/* The varpool data structure.
+ Each static variable decl has assigned varpool_node. */
+
+struct varpool_node GTY((chain_next ("%h.next")))
+{
+ tree decl;
+ /* Pointer to the next function in varpool_nodes. */
+ struct varpool_node *next;
+ /* Pointer to the next function in varpool_nodes_queue. */
+ struct varpool_node *next_needed;
+ /* Ordering of all cgraph nodes. */
+ int order;
+
+ /* The module in which it is first declared. */
+ unsigned module_id;
+ /* Set when function must be output - it is externally visible
+ or its address is taken. */
+ unsigned needed : 1;
+ /* Needed variables might become dead by optimization. This flag
+ forces the variable to be output even if it appears dead otherwise. */
+ unsigned force_output : 1;
+ /* Set once the variable has been instantiated and its callee
+ lists created. */
+ unsigned analyzed : 1;
+ /* Set once it has been finalized so we consider it to be output. */
+ unsigned finalized : 1;
+ /* Set when variable is scheduled to be assembled. */
+ unsigned output : 1;
+ /* Set when function is visible by other units. */
+ unsigned externally_visible : 1;
+ /* Set for aliases once they got through assemble_alias. */
+ unsigned alias : 1;
+};
+
+/* Every top level asm statement is put into a cgraph_asm_node. */
+
+struct cgraph_asm_node GTY(())
+{
+ /* Next asm node. */
+ struct cgraph_asm_node *next;
+ /* String for this asm node. */
+ tree asm_str;
+ /* Ordering of all cgraph nodes. */
+ int order;
+};
+
+extern GTY(()) struct cgraph_node *cgraph_nodes;
+extern GTY(()) int cgraph_n_nodes;
+extern GTY(()) int cgraph_max_uid;
+extern GTY(()) int cgraph_edge_max_uid;
+extern GTY(()) int cgraph_max_pid;
+extern bool cgraph_global_info_ready;
+enum cgraph_state
+{
+ /* Callgraph is being constructed. It is safe to add new functions. */
+ CGRAPH_STATE_CONSTRUCTION,
+ /* Callgraph is built and IPA passes are being run. */
+ CGRAPH_STATE_IPA,
+ /* Callgraph is built and all functions are transformed to SSA form. */
+ CGRAPH_STATE_IPA_SSA,
+ /* Functions are now ordered and being passed to RTL expanders. */
+ CGRAPH_STATE_EXPANSION,
+ /* All cgraph expansion is done. */
+ CGRAPH_STATE_FINISHED
+};
+extern enum cgraph_state cgraph_state;
+extern bool cgraph_function_flags_ready;
+extern GTY(()) struct cgraph_node *cgraph_nodes_queue;
+extern GTY(()) struct cgraph_node *cgraph_new_nodes;
+
+extern GTY(()) struct cgraph_asm_node *cgraph_asm_nodes;
+extern GTY(()) int cgraph_order;
+
+/* In cgraph.c */
+void dump_cgraph (FILE *);
+void debug_cgraph (void);
+void dump_cgraph_node (FILE *, struct cgraph_node *);
+void debug_cgraph_node (struct cgraph_node *);
+void cgraph_insert_node_to_hashtable (struct cgraph_node *node);
+void cgraph_remove_edge (struct cgraph_edge *);
+void cgraph_remove_node (struct cgraph_node *);
+void cgraph_add_assembler_hash_node (struct cgraph_node *);
+void cgraph_remove_assembler_hash_node (struct cgraph_node *);
+void cgraph_remove_fake_indirect_call_in_edges (struct cgraph_node *);
+extern bool cgraph_need_artificial_indirect_call_edges;
+extern bool cgraph_is_fake_indirect_call_edge (struct cgraph_edge *e);
+
+void cgraph_release_function_body (struct cgraph_node *);
+void cgraph_node_remove_callees (struct cgraph_node *node);
+struct cgraph_edge *cgraph_create_edge (struct cgraph_node *,
+ struct cgraph_node *,
+ gimple, gcov_type, int, int);
+struct cgraph_node *cgraph_node (tree);
+struct cgraph_node *cgraph_node_for_asm (tree asmname);
+struct cgraph_edge *cgraph_edge (struct cgraph_node *, gimple);
+void cgraph_set_call_stmt (struct cgraph_edge *, gimple);
+void cgraph_update_edges_for_call_stmt (gimple, gimple);
+struct cgraph_local_info *cgraph_local_info (tree);
+struct cgraph_global_info *cgraph_global_info (tree);
+struct cgraph_rtl_info *cgraph_rtl_info (tree);
+const char * cgraph_node_name (struct cgraph_node *);
+struct cgraph_edge * cgraph_clone_edge (struct cgraph_edge *,
+ struct cgraph_node *,
+ gimple, gcov_type, int, int, bool);
+struct cgraph_node * cgraph_clone_node (struct cgraph_node *, gcov_type, int,
+ int, bool);
+
+void cgraph_redirect_edge_callee (struct cgraph_edge *, struct cgraph_node *);
+
+struct cgraph_asm_node *cgraph_add_asm_node (tree);
+
+bool cgraph_function_possibly_inlined_p (tree);
+void cgraph_unnest_node (struct cgraph_node *);
+
+enum availability cgraph_function_body_availability (struct cgraph_node *);
+bool cgraph_is_master_clone (struct cgraph_node *);
+struct cgraph_node *cgraph_master_clone (struct cgraph_node *);
+void cgraph_add_new_function (tree, bool);
+
+void dump_vcg_cgraph (FILE *, int, bool);
+
+bool hot_function_p (struct cgraph_node *);
+
+/* In cgraphunit.c */
+void cgraph_finalize_function (tree, bool);
+void cgraph_mark_if_needed (tree);
+void cgraph_finalize_compilation_unit (void);
+void cgraph_optimize (void);
+void cgraph_mark_needed_node (struct cgraph_node *);
+void cgraph_mark_address_taken (struct cgraph_node *);
+void cgraph_mark_reachable_node (struct cgraph_node *);
+bool cgraph_inline_p (struct cgraph_edge *, const char **reason);
+bool cgraph_preserve_function_body_p (tree);
+void verify_cgraph (void);
+void verify_cgraph_node (struct cgraph_node *);
+void cgraph_build_static_cdtor (char which, tree body, int priority);
+void cgraph_reset_static_var_maps (void);
+void init_cgraph (void);
+struct cgraph_node *cgraph_function_versioning (struct cgraph_node *,
+ VEC(cgraph_edge_p,heap)*,
+ varray_type,
+ bitmap);
+void cgraph_analyze_function (struct cgraph_node *);
+struct cgraph_node *save_inline_function_body (struct cgraph_node *);
+void record_references_in_initializer (tree);
+bool cgraph_process_new_functions (void);
+
+/* Module info structure. */
+struct cgraph_mod_info GTY (())
+{
+ unsigned module_id;
+};
+
+/* LIPO linker symbol table entry for functions. */
+
+struct cgraph_sym GTY(())
+{
+ tree assembler_name;
+ struct cgraph_node *rep_node;
+ tree rep_decl;
+ htab_t GTY ((param_is (struct cgraph_mod_info))) def_module_hash;
+ bool is_promoted_static;
+};
+
+void cgraph_init_gid_map (void);
+void cgraph_add_fake_indirect_call_edges (void);
+void cgraph_do_link (void);
+struct cgraph_sym *cgraph_link_node (struct cgraph_node *);
+tree cgraph_find_decl (tree asm_name);
+void cgraph_remove_link_node (struct cgraph_node *node);
+struct cgraph_node *cgraph_real_node (tree decl);
+struct cgraph_node *cgraph_real_node_1 (tree decl, bool);
+unsigned cgraph_get_module_id (tree fndecl);
+bool cgraph_is_auxiliary (tree fndecl);
+void cgraph_process_module_scope_statics (void);
+bool cgraph_is_promoted_static_func (tree fndecl);
+bool cgraph_is_inline_body_available_in_module (tree fndecl, unsigned module_id);
+bool cgraph_is_decl_external (struct cgraph_node *);
+void cgraph_unify_type_alias_sets (void);
+void varpool_do_link (void);
+void varpool_link_node (struct varpool_node *);
+void varpool_remove_link_node (struct varpool_node *node);
+struct varpool_node *real_varpool_node (tree decl);
+bool varpool_is_auxiliary (struct varpool_node *node);
+void varpool_get_referenced_asm_ids (VEC(tree, gc) **);
+void varpool_clear_asm_id_reference_bit (void);
+void varpool_reset_queue (void);
+void varpool_remove_duplicate_weak_decls (void);
+
+typedef void (*cgraph_edge_hook)(struct cgraph_edge *, void *);
+typedef void (*cgraph_node_hook)(struct cgraph_node *, void *);
+typedef void (*cgraph_2edge_hook)(struct cgraph_edge *, struct cgraph_edge *,
+ void *);
+typedef void (*cgraph_2node_hook)(struct cgraph_node *, struct cgraph_node *,
+ void *);
+struct cgraph_edge_hook_list;
+struct cgraph_node_hook_list;
+struct cgraph_2edge_hook_list;
+struct cgraph_2node_hook_list;
+struct cgraph_edge_hook_list *cgraph_add_edge_removal_hook (cgraph_edge_hook, void *);
+void cgraph_remove_edge_removal_hook (struct cgraph_edge_hook_list *);
+struct cgraph_node_hook_list *cgraph_add_node_removal_hook (cgraph_node_hook,
+ void *);
+void cgraph_remove_node_removal_hook (struct cgraph_node_hook_list *);
+struct cgraph_node_hook_list *cgraph_add_function_insertion_hook (cgraph_node_hook,
+ void *);
+void cgraph_remove_function_insertion_hook (struct cgraph_node_hook_list *);
+void cgraph_call_function_insertion_hooks (struct cgraph_node *node);
+struct cgraph_2edge_hook_list *cgraph_add_edge_duplication_hook (cgraph_2edge_hook, void *);
+void cgraph_remove_edge_duplication_hook (struct cgraph_2edge_hook_list *);
+struct cgraph_2node_hook_list *cgraph_add_node_duplication_hook (cgraph_2node_hook, void *);
+void cgraph_remove_node_duplication_hook (struct cgraph_2node_hook_list *);
+
+/* In cgraphbuild.c */
+unsigned int rebuild_cgraph_edges (void);
+int compute_call_stmt_bb_frequency (basic_block bb);
+
+/* In ipa.c */
+bool cgraph_remove_unreachable_nodes (bool, FILE *);
+int cgraph_postorder (struct cgraph_node **);
+
+bool cgraph_maybe_hot_edge_p (struct cgraph_edge *e);
+
+/* In varpool.c */
+
+extern GTY(()) struct varpool_node *varpool_nodes_queue;
+extern GTY(()) struct varpool_node *varpool_nodes;
+
+struct varpool_node *varpool_node (tree);
+struct varpool_node *varpool_node_for_asm (tree asmname);
+void varpool_mark_needed_node (struct varpool_node *);
+void dump_varpool (FILE *);
+void dump_varpool_node (FILE *, struct varpool_node *);
+
+void varpool_finalize_decl (tree);
+bool decide_is_variable_needed (struct varpool_node *, tree);
+enum availability cgraph_variable_initializer_availability (struct varpool_node *);
+
+bool varpool_assemble_pending_decls (void);
+bool varpool_assemble_decl (struct varpool_node *node);
+bool varpool_analyze_pending_decls (void);
+void varpool_remove_unreferenced_decls (void);
+void varpool_empty_needed_queue (void);
+
+/* Walk all reachable static variables. */
+#define FOR_EACH_STATIC_VARIABLE(node) \
+ for ((node) = varpool_nodes_queue; (node); (node) = (node)->next_needed)
+
+/* Return first reachable static variable with initializer. */
+static inline struct varpool_node *
+varpool_first_static_initializer (void)
+{
+ struct varpool_node *node;
+ for (node = varpool_nodes_queue; node; node = node->next_needed)
+ {
+ gcc_assert (TREE_CODE (node->decl) == VAR_DECL);
+ if (DECL_INITIAL (node->decl))
+ return node;
+ }
+ return NULL;
+}
+
+/* Return next reachable static variable with initializer after NODE. */
+static inline struct varpool_node *
+varpool_next_static_initializer (struct varpool_node *node)
+{
+ for (node = node->next_needed; node; node = node->next_needed)
+ {
+ gcc_assert (TREE_CODE (node->decl) == VAR_DECL);
+ if (DECL_INITIAL (node->decl))
+ return node;
+ }
+ return NULL;
+}
+
+/* Walk all static variables with initializer set. */
+#define FOR_EACH_STATIC_INITIALIZER(node) \
+ for ((node) = varpool_first_static_initializer (); (node); \
+ (node) = varpool_next_static_initializer (node))
+
+/* In ipa-inline.c */
+
+/* Contains list of user-specified files containing inlining decisions
+ for particular inlining passes. */
+
+struct inline_plan_file
+{
+ char *pass_name;
+ char *filename;
+ struct inline_plan_file *next;
+};
+extern struct inline_plan_file *inline_plan_files;
+
+void cgraph_clone_inlined_nodes (struct cgraph_edge *, bool, bool);
+bool cgraph_default_inline_p (struct cgraph_node *, const char **);
+unsigned int compute_inline_parameters (struct cgraph_node *);
+
+void compute_hot_components (void);
+void free_hot_components (void);
+void dump_hot_components (FILE *);
+void verify_hot_components (void);
+bool cgraph_gate_ipa_early_inlining (void);
+
+void cgraph_remove_pid (struct cgraph_node *);
+
+/* Create a new static variable of type TYPE. */
+tree add_new_static_var (tree type);
+
+#endif /* GCC_CGRAPH_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config.h
new file mode 100644
index 0000000..aa6dd6b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config.h
@@ -0,0 +1,10 @@
+#ifndef GCC_CONFIG_H
+#define GCC_CONFIG_H
+#ifdef GENERATOR_FILE
+#error config.h is for the host, not build, machine.
+#endif
+#include "auto-host.h"
+#ifdef IN_GCC
+# include "ansidecl.h"
+#endif
+#endif /* GCC_CONFIG_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/aout.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/aout.h
new file mode 100644
index 0000000..e910422
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/aout.h
@@ -0,0 +1,343 @@
+/* Definitions of target machine for GNU compiler, for ARM with a.out
+ Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef ASM_APP_ON
+#define ASM_APP_ON ""
+#endif
+#ifndef ASM_APP_OFF
+#define ASM_APP_OFF ""
+#endif
+
+/* Switch to the text or data segment. */
+#define TEXT_SECTION_ASM_OP "\t.text"
+#define DATA_SECTION_ASM_OP "\t.data"
+#define BSS_SECTION_ASM_OP "\t.bss"
+
+/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
+ make sure that this change is reflected in the function
+ coff_arm_is_local_label_name() in bfd/coff-arm.c. */
+#ifndef REGISTER_PREFIX
+#define REGISTER_PREFIX ""
+#endif
+
+#ifndef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX "_"
+#endif
+
+#ifndef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX ""
+#endif
+
+/* The assembler's names for the registers. Note that the ?xx registers are
+ there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
+ (each of which is overlaid on two S registers), although there are no
+ actual single-precision registers which correspond to D16-D31. */
+#ifndef REGISTER_NAMES
+#define REGISTER_NAMES \
+{ \
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "cc", "sfp", "afp", \
+ "mv0", "mv1", "mv2", "mv3", \
+ "mv4", "mv5", "mv6", "mv7", \
+ "mv8", "mv9", "mv10", "mv11", \
+ "mv12", "mv13", "mv14", "mv15", \
+ "wcgr0", "wcgr1", "wcgr2", "wcgr3", \
+ "wr0", "wr1", "wr2", "wr3", \
+ "wr4", "wr5", "wr6", "wr7", \
+ "wr8", "wr9", "wr10", "wr11", \
+ "wr12", "wr13", "wr14", "wr15", \
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
+ "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
+ "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
+ "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
+ "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
+ "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
+ "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
+ "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
+ "vfpcc" \
+}
+#endif
+
+#ifndef ADDITIONAL_REGISTER_NAMES
+#define ADDITIONAL_REGISTER_NAMES \
+{ \
+ {"a1", 0}, \
+ {"a2", 1}, \
+ {"a3", 2}, \
+ {"a4", 3}, \
+ {"v1", 4}, \
+ {"v2", 5}, \
+ {"v3", 6}, \
+ {"v4", 7}, \
+ {"v5", 8}, \
+ {"v6", 9}, \
+ {"rfp", 9}, /* Gcc used to call it this */ \
+ {"sb", 9}, \
+ {"v7", 10}, \
+ {"r10", 10}, /* sl */ \
+ {"r11", 11}, /* fp */ \
+ {"r12", 12}, /* ip */ \
+ {"r13", 13}, /* sp */ \
+ {"r14", 14}, /* lr */ \
+ {"r15", 15}, /* pc */ \
+ {"mvf0", 27}, \
+ {"mvf1", 28}, \
+ {"mvf2", 29}, \
+ {"mvf3", 30}, \
+ {"mvf4", 31}, \
+ {"mvf5", 32}, \
+ {"mvf6", 33}, \
+ {"mvf7", 34}, \
+ {"mvf8", 35}, \
+ {"mvf9", 36}, \
+ {"mvf10", 37}, \
+ {"mvf11", 38}, \
+ {"mvf12", 39}, \
+ {"mvf13", 40}, \
+ {"mvf14", 41}, \
+ {"mvf15", 42}, \
+ {"mvd0", 27}, \
+ {"mvd1", 28}, \
+ {"mvd2", 29}, \
+ {"mvd3", 30}, \
+ {"mvd4", 31}, \
+ {"mvd5", 32}, \
+ {"mvd6", 33}, \
+ {"mvd7", 34}, \
+ {"mvd8", 35}, \
+ {"mvd9", 36}, \
+ {"mvd10", 37}, \
+ {"mvd11", 38}, \
+ {"mvd12", 39}, \
+ {"mvd13", 40}, \
+ {"mvd14", 41}, \
+ {"mvd15", 42}, \
+ {"mvfx0", 27}, \
+ {"mvfx1", 28}, \
+ {"mvfx2", 29}, \
+ {"mvfx3", 30}, \
+ {"mvfx4", 31}, \
+ {"mvfx5", 32}, \
+ {"mvfx6", 33}, \
+ {"mvfx7", 34}, \
+ {"mvfx8", 35}, \
+ {"mvfx9", 36}, \
+ {"mvfx10", 37}, \
+ {"mvfx11", 38}, \
+ {"mvfx12", 39}, \
+ {"mvfx13", 40}, \
+ {"mvfx14", 41}, \
+ {"mvfx15", 42}, \
+ {"mvdx0", 27}, \
+ {"mvdx1", 28}, \
+ {"mvdx2", 29}, \
+ {"mvdx3", 30}, \
+ {"mvdx4", 31}, \
+ {"mvdx5", 32}, \
+ {"mvdx6", 33}, \
+ {"mvdx7", 34}, \
+ {"mvdx8", 35}, \
+ {"mvdx9", 36}, \
+ {"mvdx10", 37}, \
+ {"mvdx11", 38}, \
+ {"mvdx12", 39}, \
+ {"mvdx13", 40}, \
+ {"mvdx14", 41}, \
+ {"mvdx15", 42}, \
+ {"d0", 63}, {"q0", 63}, \
+ {"d1", 65}, \
+ {"d2", 67}, {"q1", 67}, \
+ {"d3", 69}, \
+ {"d4", 71}, {"q2", 71}, \
+ {"d5", 73}, \
+ {"d6", 75}, {"q3", 75}, \
+ {"d7", 77}, \
+ {"d8", 79}, {"q4", 79}, \
+ {"d9", 81}, \
+ {"d10", 83}, {"q5", 83}, \
+ {"d11", 85}, \
+ {"d12", 87}, {"q6", 87}, \
+ {"d13", 89}, \
+ {"d14", 91}, {"q7", 91}, \
+ {"d15", 93}, \
+ {"q8", 95}, \
+ {"q9", 99}, \
+ {"q10", 103}, \
+ {"q11", 107}, \
+ {"q12", 111}, \
+ {"q13", 115}, \
+ {"q14", 119}, \
+ {"q15", 123} \
+}
+#endif
+
+#ifndef NO_DOLLAR_IN_LABEL
+#define NO_DOLLAR_IN_LABEL 1
+#endif
+
+/* Generate DBX debugging information. riscix.h will undefine this because
+ the native assembler does not support stabs. */
+#define DBX_DEBUGGING_INFO 1
+
+/* Acorn dbx moans about continuation chars, so don't use any. */
+#ifndef DBX_CONTIN_LENGTH
+#define DBX_CONTIN_LENGTH 0
+#endif
+
+/* Output a function label definition. */
+#ifndef ASM_DECLARE_FUNCTION_NAME
+#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
+ do \
+ { \
+ ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
+ ASM_OUTPUT_LABEL (STREAM, NAME); \
+ } \
+ while (0)
+#endif
+
+/* Globalizing directive for a label. */
+#define GLOBAL_ASM_OP "\t.global\t"
+
+/* Make an internal label into a string. */
+#ifndef ASM_GENERATE_INTERNAL_LABEL
+#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
+ sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
+#endif
+
+/* Output an element of a dispatch table. */
+#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
+ do \
+ { \
+ gcc_assert (!TARGET_THUMB2); \
+ asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
+ } \
+ while (0)
+
+
+/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
+ can be used. For non-pic code where the offsets do not suitable for
+ TBB/TBH the elements are output as absolute labels. */
+#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
+ do \
+ { \
+ if (TARGET_ARM) \
+ asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
+ else if (TARGET_THUMB1) \
+ asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL); \
+ else /* Thumb-2 */ \
+ { \
+ switch (GET_MODE(body)) \
+ { \
+ case QImode: /* TBB */ \
+ asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
+ VALUE, REL); \
+ break; \
+ case HImode: /* TBH */ \
+ asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
+ VALUE, REL); \
+ break; \
+ case SImode: \
+ if (flag_pic) \
+ asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
+ else \
+ asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
+ break; \
+ default: \
+ gcc_unreachable(); \
+ } \
+ } \
+ } \
+ while (0)
+
+
+#undef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
+ output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
+
+/* Output a gap. In fact we fill it with nulls. */
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
+ fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
+
+/* Align output to a power of two. Horrible /bin/as. */
+#ifndef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
+ do \
+ { \
+ register int amount = 1 << (POWER); \
+ \
+ if (amount == 2) \
+ fprintf (STREAM, "\t.even\n"); \
+ else if (amount != 1) \
+ fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
+ } \
+ while (0)
+#endif
+
+/* Output a common block. */
+#ifndef ASM_OUTPUT_COMMON
+#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
+ do \
+ { \
+ fprintf (STREAM, "\t.comm\t"); \
+ assemble_name (STREAM, NAME); \
+ asm_fprintf (STREAM, ", %d\t%@ %d\n", \
+ (int)(ROUNDED), (int)(SIZE)); \
+ } \
+ while (0)
+#endif
+
+/* Output a local common block. /bin/as can't do this, so hack a
+ `.space' into the bss segment. Note that this is *bad* practice,
+ which is guaranteed NOT to work since it doesn't define STATIC
+ COMMON space but merely STATIC BSS space. */
+#ifndef ASM_OUTPUT_ALIGNED_LOCAL
+#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
+ do \
+ { \
+ switch_to_section (bss_section); \
+ ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
+ ASM_OUTPUT_LABEL (STREAM, NAME); \
+ fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
+ } \
+ while (0)
+#endif
+
+/* Output a zero-initialized block. */
+#ifndef ASM_OUTPUT_ALIGNED_BSS
+#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
+ asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
+#endif
+
+/* Output a #ident directive. */
+#ifndef ASM_OUTPUT_IDENT
+#define ASM_OUTPUT_IDENT(STREAM,STRING) \
+ asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
+#endif
+
+#ifndef ASM_COMMENT_START
+#define ASM_COMMENT_START "@"
+#endif
+
+/* This works for GAS and some other assemblers. */
+#define SET_ASM_OP "\t.set\t"
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm-protos.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm-protos.h
new file mode 100644
index 0000000..ee0a343
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm-protos.h
@@ -0,0 +1,217 @@
+/* Prototypes for exported functions defined in arm.c and pe.c
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Richard Earnshaw (rearnsha@arm.com)
+ Minor hacks by Nick Clifton (nickc@cygnus.com)
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_ARM_PROTOS_H
+#define GCC_ARM_PROTOS_H
+
+extern void arm_override_options (void);
+extern void arm_optimization_options (int, int);
+extern int use_return_insn (int, rtx);
+extern int arm_regno_class (int);
+extern void arm_load_pic_register (unsigned long);
+extern int arm_volatile_func (void);
+extern const char *arm_output_epilogue (rtx);
+extern void arm_expand_prologue (void);
+extern const char *arm_strip_name_encoding (const char *);
+extern void arm_asm_output_labelref (FILE *, const char *);
+extern void thumb2_asm_output_opcode (FILE *);
+extern unsigned long arm_current_func_type (void);
+extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
+ unsigned int);
+extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
+ unsigned int);
+extern unsigned int arm_dbx_register_number (unsigned int);
+extern void arm_output_fn_unwind (FILE *, bool);
+
+
+#ifdef RTX_CODE
+extern bool arm_vector_mode_supported_p (enum machine_mode);
+extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode);
+extern int const_ok_for_arm (HOST_WIDE_INT);
+extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx,
+ HOST_WIDE_INT, rtx, rtx, int);
+extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, enum machine_mode,
+ rtx *);
+extern int legitimate_pic_operand_p (rtx);
+extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
+extern rtx legitimize_tls_address (rtx, rtx);
+extern int arm_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, int);
+extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int);
+extern int thumb2_legitimate_address_p (enum machine_mode, rtx, int);
+extern int thumb_legitimate_offset_p (enum machine_mode, HOST_WIDE_INT);
+extern rtx arm_legitimize_address (rtx, rtx, enum machine_mode);
+extern rtx thumb_legitimize_address (rtx, rtx, enum machine_mode);
+extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int,
+ int);
+extern int arm_const_double_rtx (rtx);
+extern int neg_const_double_rtx_ok_for_fpa (rtx);
+extern int vfp3_const_double_rtx (rtx);
+extern int neon_immediate_valid_for_move (rtx, enum machine_mode, rtx *, int *);
+extern int neon_immediate_valid_for_logic (rtx, enum machine_mode, int, rtx *,
+ int *);
+extern char *neon_output_logic_immediate (const char *, rtx *,
+ enum machine_mode, int, int);
+extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode,
+ rtx (*) (rtx, rtx, rtx));
+extern void neon_expand_vector_init (rtx, rtx);
+extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+extern void neon_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+extern HOST_WIDE_INT neon_element_bits (enum machine_mode);
+extern void neon_reinterpret (rtx, rtx);
+extern void neon_emit_pair_result_insn (enum machine_mode,
+ rtx (*) (rtx, rtx, rtx, rtx),
+ rtx, rtx, rtx);
+extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
+extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx,
+ bool);
+extern bool arm_tls_referenced_p (rtx);
+extern bool arm_cannot_force_const_mem (rtx);
+
+extern int cirrus_memory_offset (rtx);
+extern int arm_coproc_mem_operand (rtx, bool);
+extern int neon_vector_mem_operand (rtx, bool);
+extern int neon_struct_mem_operand (rtx);
+extern int arm_no_early_store_addr_dep (rtx, rtx);
+extern int arm_no_early_alu_shift_dep (rtx, rtx);
+extern int arm_no_early_alu_shift_value_dep (rtx, rtx);
+extern int arm_no_early_mul_dep (rtx, rtx);
+extern int arm_mac_accumulator_is_mul_result (rtx, rtx);
+
+extern int tls_mentioned_p (rtx);
+extern int symbol_mentioned_p (rtx);
+extern int label_mentioned_p (rtx);
+extern RTX_CODE minmax_code (rtx);
+extern int adjacent_mem_locations (rtx, rtx);
+extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+extern const char *emit_ldm_seq (rtx *, int);
+extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+extern const char * emit_stm_seq (rtx *, int);
+extern rtx arm_gen_load_multiple (int, int, rtx, int, int,
+ rtx, HOST_WIDE_INT *);
+extern rtx arm_gen_store_multiple (int, int, rtx, int, int,
+ rtx, HOST_WIDE_INT *);
+extern int arm_gen_movmemqi (rtx *);
+extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
+extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
+ HOST_WIDE_INT);
+extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx);
+extern rtx arm_gen_return_addr_mask (void);
+extern void arm_reload_in_hi (rtx *);
+extern void arm_reload_out_hi (rtx *);
+extern int arm_const_double_inline_cost (rtx);
+extern bool arm_const_double_by_parts (rtx);
+extern const char *fp_immediate_constant (rtx);
+extern void arm_emit_call_insn (rtx, rtx);
+extern const char *output_call (rtx *);
+extern const char *output_call_mem (rtx *);
+void arm_emit_movpair (rtx, rtx);
+extern const char *output_mov_long_double_fpa_from_arm (rtx *);
+extern const char *output_mov_long_double_arm_from_fpa (rtx *);
+extern const char *output_mov_long_double_arm_from_arm (rtx *);
+extern const char *output_mov_double_fpa_from_arm (rtx *);
+extern const char *output_mov_double_arm_from_fpa (rtx *);
+extern const char *output_move_double (rtx *);
+extern const char *output_move_quad (rtx *);
+extern const char *output_move_vfp (rtx *operands);
+extern const char *output_move_neon (rtx *operands);
+extern const char *output_add_immediate (rtx *);
+extern const char *arithmetic_instr (rtx, int);
+extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
+extern const char *output_return_instruction (rtx, int, int);
+extern void arm_poke_function_name (FILE *, const char *);
+extern void arm_print_operand (FILE *, rtx, int);
+extern void arm_print_operand_address (FILE *, rtx);
+extern void arm_final_prescan_insn (rtx);
+extern int arm_debugger_arg_offset (int, rtx);
+extern bool arm_is_long_call_p (tree);
+extern int arm_emit_vector_const (FILE *, rtx);
+extern const char * arm_output_load_gr (rtx *);
+extern const char *vfp_output_fstmd (rtx *);
+extern void arm_set_return_address (rtx, rtx);
+extern int arm_eliminable_register (rtx);
+extern const char *arm_output_shift(rtx *, int);
+
+extern bool arm_output_addr_const_extra (FILE *, rtx);
+
+#if defined TREE_CODE
+extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
+extern void arm_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode,
+ tree, bool);
+extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
+extern bool arm_pad_arg_upward (enum machine_mode, const_tree);
+extern bool arm_pad_reg_upward (enum machine_mode, tree, int);
+extern bool arm_needs_doubleword_align (enum machine_mode, tree);
+#endif
+extern int arm_apply_result_size (void);
+extern rtx aapcs_libcall_value (enum machine_mode);
+
+#endif /* RTX_CODE */
+
+extern int arm_float_words_big_endian (void);
+
+/* Thumb functions. */
+extern void arm_init_expanders (void);
+extern const char *thumb_unexpanded_epilogue (void);
+extern void thumb1_expand_prologue (void);
+extern void thumb1_expand_epilogue (void);
+#ifdef TREE_CODE
+extern int is_called_in_ARM_mode (tree);
+#endif
+extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
+#ifdef RTX_CODE
+extern void thumb1_final_prescan_insn (rtx);
+extern void thumb2_final_prescan_insn (rtx);
+extern const char *thumb_load_double_from_address (rtx *);
+extern const char *thumb_output_move_mem_multiple (int, rtx *);
+extern const char *thumb_call_via_reg (rtx);
+extern void thumb_expand_movmemqi (rtx *);
+extern rtx arm_return_addr (int, rtx);
+extern void thumb_reload_out_hi (rtx *);
+extern void thumb_reload_in_hi (rtx *);
+extern void thumb_set_return_address (rtx, rtx);
+extern const char *thumb2_output_casesi(rtx *);
+#endif
+
+/* Defined in pe.c. */
+extern int arm_dllexport_name_p (const char *);
+extern int arm_dllimport_name_p (const char *);
+
+#ifdef TREE_CODE
+extern void arm_pe_unique_section (tree, int);
+extern void arm_pe_encode_section_info (tree, rtx, int);
+extern int arm_dllexport_p (tree);
+extern int arm_dllimport_p (tree);
+extern void arm_mark_dllexport (tree);
+extern void arm_mark_dllimport (tree);
+#endif
+
+extern void arm_pr_long_calls (struct cpp_reader *);
+extern void arm_pr_no_long_calls (struct cpp_reader *);
+extern void arm_pr_long_calls_off (struct cpp_reader *);
+
+extern void arm_lang_object_attributes_init(void);
+
+extern const char *arm_mangle_type (const_tree);
+
+extern void arm_order_regs_for_local_alloc (void);
+
+#endif /* ! GCC_ARM_PROTOS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm.h
new file mode 100644
index 0000000..1189914
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/arm.h
@@ -0,0 +1,2908 @@
+/* Definitions of target machine for GNU compiler, for ARM.
+ Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
+ and Martin Simmons (@harleqn.co.uk).
+ More major hacks by Richard Earnshaw (rearnsha@arm.com)
+ Minor hacks by Nick Clifton (nickc@cygnus.com)
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_ARM_H
+#define GCC_ARM_H
+
+#include "config/vxworks-dummy.h"
+
+/* The architecture define. */
+extern char arm_arch_name[];
+
+/* Target CPU builtins. */
+#define TARGET_CPU_CPP_BUILTINS() \
+ do \
+ { \
+ /* Define __arm__ even when in thumb mode, for \
+ consistency with armcc. */ \
+ builtin_define ("__arm__"); \
+ builtin_define ("__APCS_32__"); \
+ if (TARGET_THUMB) \
+ builtin_define ("__thumb__"); \
+ if (TARGET_THUMB2) \
+ builtin_define ("__thumb2__"); \
+ \
+ if (TARGET_BIG_END) \
+ { \
+ builtin_define ("__ARMEB__"); \
+ if (TARGET_THUMB) \
+ builtin_define ("__THUMBEB__"); \
+ if (TARGET_LITTLE_WORDS) \
+ builtin_define ("__ARMWEL__"); \
+ } \
+ else \
+ { \
+ builtin_define ("__ARMEL__"); \
+ if (TARGET_THUMB) \
+ builtin_define ("__THUMBEL__"); \
+ } \
+ \
+ if (TARGET_SOFT_FLOAT) \
+ builtin_define ("__SOFTFP__"); \
+ \
+ if (TARGET_VFP) \
+ builtin_define ("__VFP_FP__"); \
+ \
+ if (TARGET_NEON) \
+ builtin_define ("__ARM_NEON__"); \
+ \
+ /* Add a define for interworking. \
+ Needed when building libgcc.a. */ \
+ if (arm_cpp_interwork) \
+ builtin_define ("__THUMB_INTERWORK__"); \
+ \
+ builtin_assert ("cpu=arm"); \
+ builtin_assert ("machine=arm"); \
+ \
+ builtin_define (arm_arch_name); \
+ if (arm_arch_cirrus) \
+ builtin_define ("__MAVERICK__"); \
+ if (arm_arch_xscale) \
+ builtin_define ("__XSCALE__"); \
+ if (arm_arch_iwmmxt) \
+ builtin_define ("__IWMMXT__"); \
+ if (TARGET_AAPCS_BASED) \
+ builtin_define ("__ARM_EABI__"); \
+ } while (0)
+
+/* The various ARM cores. */
+enum processor_type
+{
+#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
+ IDENT,
+#include "arm-cores.def"
+#undef ARM_CORE
+ /* Used to indicate that no processor has been specified. */
+ arm_none
+};
+
+enum target_cpus
+{
+#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
+ TARGET_CPU_##IDENT,
+#include "arm-cores.def"
+#undef ARM_CORE
+ TARGET_CPU_generic
+};
+
+/* The processor for which instructions should be scheduled. */
+extern enum processor_type arm_tune;
+
+typedef enum arm_cond_code
+{
+ ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC,
+ ARM_HI, ARM_LS, ARM_GE, ARM_LT, ARM_GT, ARM_LE, ARM_AL, ARM_NV
+}
+arm_cc;
+
+extern arm_cc arm_current_cc;
+
+#define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1))
+
+extern int arm_target_label;
+extern int arm_ccfsm_state;
+extern GTY(()) rtx arm_target_insn;
+/* Define the information needed to generate branch insns. This is
+ stored from the compare operation. */
+extern GTY(()) rtx arm_compare_op0;
+extern GTY(()) rtx arm_compare_op1;
+/* The label of the current constant pool. */
+extern rtx pool_vector_label;
+/* Set to 1 when a return insn is output, this means that the epilogue
+ is not needed. */
+extern int return_used_this_function;
+/* Callback to output language specific object attributes. */
+extern void (*arm_lang_output_object_attributes_hook)(void);
+
+/* Just in case configure has failed to define anything. */
+#ifndef TARGET_CPU_DEFAULT
+#define TARGET_CPU_DEFAULT TARGET_CPU_generic
+#endif
+
+
+#undef CPP_SPEC
+#define CPP_SPEC "%(subtarget_cpp_spec) \
+%{msoft-float:%{mhard-float: \
+ %e-msoft-float and -mhard_float may not be used together}} \
+%{mbig-endian:%{mlittle-endian: \
+ %e-mbig-endian and -mlittle-endian may not be used together}}"
+
+#ifndef CC1_SPEC
+#define CC1_SPEC ""
+#endif
+
+/* This macro defines names of additional specifications to put in the specs
+ that can be used in various specifications like CC1_SPEC. Its definition
+ is an initializer with a subgrouping for each command option.
+
+ Each subgrouping contains a string constant, that defines the
+ specification name, and a string constant that used by the GCC driver
+ program.
+
+ Do not define this macro if it does not need to do anything. */
+#define EXTRA_SPECS \
+ { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \
+ SUBTARGET_EXTRA_SPECS
+
+#ifndef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS
+#endif
+
+#ifndef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC ""
+#endif
+
+/* Run-time Target Specification. */
+#ifndef TARGET_VERSION
+#define TARGET_VERSION fputs (" (ARM/generic)", stderr);
+#endif
+
+#define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT)
+/* Use hardware floating point instructions. */
+#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT)
+/* Use hardware floating point calling convention. */
+#define TARGET_HARD_FLOAT_ABI (arm_float_abi == ARM_FLOAT_ABI_HARD)
+#define TARGET_FPA (arm_fp_model == ARM_FP_MODEL_FPA)
+#define TARGET_MAVERICK (arm_fp_model == ARM_FP_MODEL_MAVERICK)
+#define TARGET_VFP (arm_fp_model == ARM_FP_MODEL_VFP)
+#define TARGET_IWMMXT (arm_arch_iwmmxt)
+#define TARGET_REALLY_IWMMXT (TARGET_IWMMXT && TARGET_32BIT)
+#define TARGET_IWMMXT_ABI (TARGET_32BIT && arm_abi == ARM_ABI_IWMMXT)
+#define TARGET_ARM (! TARGET_THUMB)
+#define TARGET_EITHER 1 /* (TARGET_ARM | TARGET_THUMB) */
+#define TARGET_BACKTRACE (leaf_function_p () \
+ ? TARGET_TPCS_LEAF_FRAME \
+ : TARGET_TPCS_FRAME)
+#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN)
+#define TARGET_AAPCS_BASED \
+ (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)
+
+#define TARGET_HARD_TP (target_thread_pointer == TP_CP15)
+#define TARGET_SOFT_TP (target_thread_pointer == TP_SOFT)
+
+/* Only 16-bit thumb code. */
+#define TARGET_THUMB1 (TARGET_THUMB && !arm_arch_thumb2)
+/* Arm or Thumb-2 32-bit code. */
+#define TARGET_32BIT (TARGET_ARM || arm_arch_thumb2)
+/* 32-bit Thumb-2 code. */
+#define TARGET_THUMB2 (TARGET_THUMB && arm_arch_thumb2)
+/* Thumb-1 only. */
+#define TARGET_THUMB1_ONLY (TARGET_THUMB1 && !arm_arch_notm)
+
+/* The following two macros concern the ability to execute coprocessor
+ instructions for VFPv3 or NEON. TARGET_VFP3/TARGET_VFPD32 are currently
+ only ever tested when we know we are generating for VFP hardware; we need
+ to be more careful with TARGET_NEON as noted below. */
+
+/* FPU is has the full VFPv3/NEON register file of 32 D registers. */
+#define TARGET_VFPD32 (arm_fp_model == ARM_FP_MODEL_VFP \
+ && (arm_fpu_arch == FPUTYPE_VFP3 \
+ || arm_fpu_arch == FPUTYPE_NEON))
+
+/* FPU supports VFPv3 instructions. */
+#define TARGET_VFP3 (arm_fp_model == ARM_FP_MODEL_VFP \
+ && (arm_fpu_arch == FPUTYPE_VFP3D16 \
+ || TARGET_VFPD32))
+
+/* FPU supports Neon instructions. The setting of this macro gets
+ revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
+ and TARGET_HARD_FLOAT to ensure that NEON instructions are
+ available. */
+#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
+ && arm_fp_model == ARM_FP_MODEL_VFP \
+ && arm_fpu_arch == FPUTYPE_NEON)
+
+/* "DSP" multiply instructions, eg. SMULxy. */
+#define TARGET_DSP_MULTIPLY \
+ (TARGET_32BIT && arm_arch5e && arm_arch_notm)
+/* Integer SIMD instructions, and extend-accumulate instructions. */
+#define TARGET_INT_SIMD \
+ (TARGET_32BIT && arm_arch6 && arm_arch_notm)
+
+/* Should MOVW/MOVT be used in preference to a constant pool. */
+#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
+
+/* We could use unified syntax for arm mode, but for now we just use it
+ for Thumb-2. */
+#define TARGET_UNIFIED_ASM TARGET_THUMB2
+
+
+/* True iff the full BPABI is being used. If TARGET_BPABI is true,
+ then TARGET_AAPCS_BASED must be true -- but the converse does not
+ hold. TARGET_BPABI implies the use of the BPABI runtime library,
+ etc., in addition to just the AAPCS calling conventions. */
+#ifndef TARGET_BPABI
+#define TARGET_BPABI false
+#endif
+
+/* Support for a compile-time default CPU, et cetera. The rules are:
+ --with-arch is ignored if -march or -mcpu are specified.
+ --with-cpu is ignored if -march or -mcpu are specified, and is overridden
+ by --with-arch.
+ --with-tune is ignored if -mtune or -mcpu are specified (but not affected
+ by -march).
+ --with-float is ignored if -mhard-float, -msoft-float or -mfloat-abi are
+ specified.
+ --with-fpu is ignored if -mfpu is specified.
+ --with-abi is ignored is -mabi is specified. */
+#define OPTION_DEFAULT_SPECS \
+ {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
+ {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
+ {"tune", "%{!mcpu=*:%{!mtune=*:-mtune=%(VALUE)}}" }, \
+ {"float", \
+ "%{!msoft-float:%{!mhard-float:%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}}}" }, \
+ {"fpu", "%{!mfpu=*:-mfpu=%(VALUE)}"}, \
+ {"abi", "%{!mabi=*:-mabi=%(VALUE)}"}, \
+ {"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"},
+
+/* Which floating point model to use. */
+enum arm_fp_model
+{
+ ARM_FP_MODEL_UNKNOWN,
+ /* FPA model (Hardware or software). */
+ ARM_FP_MODEL_FPA,
+ /* Cirrus Maverick floating point model. */
+ ARM_FP_MODEL_MAVERICK,
+ /* VFP floating point model. */
+ ARM_FP_MODEL_VFP
+};
+
+extern enum arm_fp_model arm_fp_model;
+
+/* Which floating point hardware is available. Also update
+ fp_model_for_fpu in arm.c when adding entries to this list. */
+enum fputype
+{
+ /* No FP hardware. */
+ FPUTYPE_NONE,
+ /* Full FPA support. */
+ FPUTYPE_FPA,
+ /* Emulated FPA hardware, Issue 2 emulator (no LFM/SFM). */
+ FPUTYPE_FPA_EMU2,
+ /* Emulated FPA hardware, Issue 3 emulator. */
+ FPUTYPE_FPA_EMU3,
+ /* Cirrus Maverick floating point co-processor. */
+ FPUTYPE_MAVERICK,
+ /* VFP. */
+ FPUTYPE_VFP,
+ /* VFPv3-D16. */
+ FPUTYPE_VFP3D16,
+ /* VFPv3. */
+ FPUTYPE_VFP3,
+ /* Neon. */
+ FPUTYPE_NEON
+};
+
+/* Recast the floating point class to be the floating point attribute. */
+#define arm_fpu_attr ((enum attr_fpu) arm_fpu_tune)
+
+/* What type of floating point to tune for */
+extern enum fputype arm_fpu_tune;
+
+/* What type of floating point instructions are available */
+extern enum fputype arm_fpu_arch;
+
+enum float_abi_type
+{
+ ARM_FLOAT_ABI_SOFT,
+ ARM_FLOAT_ABI_SOFTFP,
+ ARM_FLOAT_ABI_HARD
+};
+
+extern enum float_abi_type arm_float_abi;
+
+#ifndef TARGET_DEFAULT_FLOAT_ABI
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+#endif
+
+/* Which ABI to use. */
+enum arm_abi_type
+{
+ ARM_ABI_APCS,
+ ARM_ABI_ATPCS,
+ ARM_ABI_AAPCS,
+ ARM_ABI_IWMMXT,
+ ARM_ABI_AAPCS_LINUX
+};
+
+extern enum arm_abi_type arm_abi;
+
+#ifndef ARM_DEFAULT_ABI
+#define ARM_DEFAULT_ABI ARM_ABI_APCS
+#endif
+
+/* Which thread pointer access sequence to use. */
+enum arm_tp_type {
+ TP_AUTO,
+ TP_SOFT,
+ TP_CP15
+};
+
+extern enum arm_tp_type target_thread_pointer;
+
+/* Nonzero if this chip supports the ARM Architecture 3M extensions. */
+extern int arm_arch3m;
+
+/* Nonzero if this chip supports the ARM Architecture 4 extensions. */
+extern int arm_arch4;
+
+/* Nonzero if this chip supports the ARM Architecture 4T extensions. */
+extern int arm_arch4t;
+
+/* Nonzero if this chip supports the ARM Architecture 5 extensions. */
+extern int arm_arch5;
+
+/* Nonzero if this chip supports the ARM Architecture 5E extensions. */
+extern int arm_arch5e;
+
+/* Nonzero if this chip supports the ARM Architecture 6 extensions. */
+extern int arm_arch6;
+
+/* Nonzero if instructions not present in the 'M' profile can be used. */
+extern int arm_arch_notm;
+
+/* Nonzero if this chip can benefit from load scheduling. */
+extern int arm_ld_sched;
+
+/* Nonzero if generating thumb code. */
+extern int thumb_code;
+
+/* Nonzero if this chip is a StrongARM. */
+extern int arm_tune_strongarm;
+
+/* Nonzero if this chip is a Cirrus variant. */
+extern int arm_arch_cirrus;
+
+/* Nonzero if this chip supports Intel XScale with Wireless MMX technology. */
+extern int arm_arch_iwmmxt;
+
+/* Nonzero if this chip is an XScale. */
+extern int arm_arch_xscale;
+
+/* Nonzero if tuning for XScale. */
+extern int arm_tune_xscale;
+
+/* Nonzero if tuning for stores via the write buffer. */
+extern int arm_tune_wbuf;
+
+/* Nonzero if tuning for Cortex-A9. */
+extern int arm_tune_cortex_a9;
+
+/* Nonzero if we should define __THUMB_INTERWORK__ in the
+ preprocessor.
+ XXX This is a bit of a hack, it's intended to help work around
+ problems in GLD which doesn't understand that armv5t code is
+ interworking clean. */
+extern int arm_cpp_interwork;
+
+/* Nonzero if chip supports Thumb 2. */
+extern int arm_arch_thumb2;
+
+/* Nonzero if chip supports integer division instruction. */
+extern int arm_arch_hwdiv;
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
+#endif
+
+/* The frame pointer register used in gcc has nothing to do with debugging;
+ that is controlled by the APCS-FRAME option. */
+#define CAN_DEBUG_WITHOUT_FP
+
+#define OVERRIDE_OPTIONS arm_override_options ()
+
+#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
+ arm_optimization_options ((LEVEL), (SIZE))
+
+/* Nonzero if PIC code requires explicit qualifiers to generate
+ PLT and GOT relocs rather than the assembler doing so implicitly.
+ Subtargets can override these if required. */
+#ifndef NEED_GOT_RELOC
+#define NEED_GOT_RELOC 0
+#endif
+#ifndef NEED_PLT_RELOC
+#define NEED_PLT_RELOC 0
+#endif
+
+/* Nonzero if we need to refer to the GOT with a PC-relative
+ offset. In other words, generate
+
+ .word _GLOBAL_OFFSET_TABLE_ - [. - (.Lxx + 8)]
+
+ rather than
+
+ .word _GLOBAL_OFFSET_TABLE_ - (.Lxx + 8)
+
+ The default is true, which matches NetBSD. Subtargets can
+ override this if required. */
+#ifndef GOT_PCREL
+#define GOT_PCREL 1
+#endif
+
+/* Target machine storage Layout. */
+
+
+/* Define this macro if it is advisable to hold scalars in registers
+ in a wider mode than that declared by the program. In such cases,
+ the value is constrained to be within the bounds of the declared
+ type, but kept valid in the wider mode. The signedness of the
+ extension may differ from that of the type. */
+
+/* It is far faster to zero extend chars than to sign extend them */
+
+#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
+ if (GET_MODE_CLASS (MODE) == MODE_INT \
+ && GET_MODE_SIZE (MODE) < 4) \
+ { \
+ if (MODE == QImode) \
+ UNSIGNEDP = 1; \
+ else if (MODE == HImode) \
+ UNSIGNEDP = 1; \
+ (MODE) = SImode; \
+ }
+
+#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
+ if ((GET_MODE_CLASS (MODE) == MODE_INT \
+ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT) \
+ && GET_MODE_SIZE (MODE) < 4) \
+ (MODE) = SImode; \
+
+/* Define this if most significant bit is lowest numbered
+ in instructions that operate on numbered bit-fields. */
+#define BITS_BIG_ENDIAN 0
+
+/* Define this if most significant byte of a word is the lowest numbered.
+ Most ARM processors are run in little endian mode, so that is the default.
+ If you want to have it run-time selectable, change the definition in a
+ cover file to be TARGET_BIG_ENDIAN. */
+#define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0)
+
+/* Define this if most significant word of a multiword number is the lowest
+ numbered.
+ This is always false, even when in big-endian mode. */
+#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)
+
+/* LIBGCC2_WORDS_BIG_ENDIAN has to be a constant, so we define this based
+ on processor pre-defineds when compiling libgcc2.c. */
+#if defined(__ARMEB__) && !defined(__ARMWEL__)
+#define LIBGCC2_WORDS_BIG_ENDIAN 1
+#else
+#define LIBGCC2_WORDS_BIG_ENDIAN 0
+#endif
+
+/* Define this if most significant word of doubles is the lowest numbered.
+ The rules are different based on whether or not we use FPA-format,
+ VFP-format or some other floating point co-processor's format doubles. */
+#define FLOAT_WORDS_BIG_ENDIAN (arm_float_words_big_endian ())
+
+#define UNITS_PER_WORD 4
+
+/* Use the option -mvectorize-with-neon-quad to override the use of doubleword
+ registers when autovectorizing for Neon, at least until multiple vector
+ widths are supported properly by the middle-end. */
+#define UNITS_PER_SIMD_WORD(MODE) \
+ (TARGET_NEON ? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD)
+
+/* True if natural alignment is used for doubleword types. */
+#define ARM_DOUBLEWORD_ALIGN TARGET_AAPCS_BASED
+
+#define DOUBLEWORD_ALIGNMENT 64
+
+#define PARM_BOUNDARY 32
+
+#define STACK_BOUNDARY (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)
+
+#define PREFERRED_STACK_BOUNDARY \
+ (arm_abi == ARM_ABI_ATPCS ? 64 : STACK_BOUNDARY)
+
+#define FUNCTION_BOUNDARY 32
+
+/* The lowest bit is used to indicate Thumb-mode functions, so the
+ vbit must go into the delta field of pointers to member
+ functions. */
+#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta
+
+#define EMPTY_FIELD_BOUNDARY 32
+
+#define BIGGEST_ALIGNMENT (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)
+
+/* XXX Blah -- this macro is used directly by libobjc. Since it
+ supports no vector modes, cut out the complexity and fall back
+ on BIGGEST_FIELD_ALIGNMENT. */
+#ifdef IN_TARGET_LIBS
+#define BIGGEST_FIELD_ALIGNMENT 64
+#endif
+
+/* Make strings word-aligned so strcpy from constants will be faster. */
+#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_tune_xscale ? 1 : 2)
+
+#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
+ ((TREE_CODE (EXP) == STRING_CST \
+ && !optimize_size \
+ && (ALIGN) < BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR) \
+ ? BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR : (ALIGN))
+
+/* Align definitions of arrays, unions and structures so that
+ initializations and copies can be made more efficient. This is not
+ ABI-changing, so it only affects places where we can see the
+ definition. */
+#define DATA_ALIGNMENT(EXP, ALIGN) \
+ ((((ALIGN) < BITS_PER_WORD) \
+ && (TREE_CODE (EXP) == ARRAY_TYPE \
+ || TREE_CODE (EXP) == UNION_TYPE \
+ || TREE_CODE (EXP) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
+
+/* Similarly, make sure that objects on the stack are sensibly aligned. */
+#define LOCAL_ALIGNMENT(EXP, ALIGN) DATA_ALIGNMENT(EXP, ALIGN)
+
+/* Setting STRUCTURE_SIZE_BOUNDARY to 32 produces more efficient code, but the
+ value set in previous versions of this toolchain was 8, which produces more
+ compact structures. The command line option -mstructure_size_boundary=<n>
+ can be used to change this value. For compatibility with the ARM SDK
+ however the value should be left at 32. ARM SDT Reference Manual (ARM DUI
+ 0020D) page 2-20 says "Structures are aligned on word boundaries".
+ The AAPCS specifies a value of 8. */
+#define STRUCTURE_SIZE_BOUNDARY arm_structure_size_boundary
+extern int arm_structure_size_boundary;
+
+/* This is the value used to initialize arm_structure_size_boundary. If a
+ particular arm target wants to change the default value it should change
+ the definition of this macro, not STRUCTURE_SIZE_BOUNDARY. See netbsd.h
+ for an example of this. */
+#ifndef DEFAULT_STRUCTURE_SIZE_BOUNDARY
+#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 32
+#endif
+
+/* Nonzero if move instructions will actually fail to work
+ when given unaligned data. */
+#define STRICT_ALIGNMENT 1
+
+/* wchar_t is unsigned under the AAPCS. */
+#ifndef WCHAR_TYPE
+#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "int")
+
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+#endif
+
+#ifndef SIZE_TYPE
+#define SIZE_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long unsigned int")
+#endif
+
+#ifndef PTRDIFF_TYPE
+#define PTRDIFF_TYPE (TARGET_AAPCS_BASED ? "int" : "long int")
+#endif
+
+/* AAPCS requires that structure alignment is affected by bitfields. */
+#ifndef PCC_BITFIELD_TYPE_MATTERS
+#define PCC_BITFIELD_TYPE_MATTERS TARGET_AAPCS_BASED
+#endif
+
+
+/* Standard register usage. */
+
+/* Register allocation in ARM Procedure Call Standard (as used on RISCiX):
+ (S - saved over call).
+
+ r0 * argument word/integer result
+ r1-r3 argument word
+
+ r4-r8 S register variable
+ r9 S (rfp) register variable (real frame pointer)
+
+ r10 F S (sl) stack limit (used by -mapcs-stack-check)
+ r11 F S (fp) argument pointer
+ r12 (ip) temp workspace
+ r13 F S (sp) lower end of current stack frame
+ r14 (lr) link address/workspace
+ r15 F (pc) program counter
+
+ f0 floating point result
+ f1-f3 floating point scratch
+
+ f4-f7 S floating point variable
+
+ cc This is NOT a real register, but is used internally
+ to represent things that use or set the condition
+ codes.
+ sfp This isn't either. It is used during rtl generation
+ since the offset between the frame pointer and the
+ auto's isn't known until after register allocation.
+ afp Nor this, we only need this because of non-local
+ goto. Without it fp appears to be used and the
+ elimination code won't get rid of sfp. It tracks
+ fp exactly at all times.
+
+ *: See CONDITIONAL_REGISTER_USAGE */
+
+/*
+ mvf0 Cirrus floating point result
+ mvf1-mvf3 Cirrus floating point scratch
+ mvf4-mvf15 S Cirrus floating point variable. */
+
+/* s0-s15 VFP scratch (aka d0-d7).
+ s16-s31 S VFP variable (aka d8-d15).
+ vfpcc Not a real register. Represents the VFP condition
+ code flags. */
+
+/* The stack backtrace structure is as follows:
+ fp points to here: | save code pointer | [fp]
+ | return link value | [fp, #-4]
+ | return sp value | [fp, #-8]
+ | return fp value | [fp, #-12]
+ [| saved r10 value |]
+ [| saved r9 value |]
+ [| saved r8 value |]
+ [| saved r7 value |]
+ [| saved r6 value |]
+ [| saved r5 value |]
+ [| saved r4 value |]
+ [| saved r3 value |]
+ [| saved r2 value |]
+ [| saved r1 value |]
+ [| saved r0 value |]
+ [| saved f7 value |] three words
+ [| saved f6 value |] three words
+ [| saved f5 value |] three words
+ [| saved f4 value |] three words
+ r0-r3 are not normally saved in a C function. */
+
+/* 1 for registers that have pervasive standard uses
+ and are not available for the register allocator. */
+#define FIXED_REGISTERS \
+{ \
+ 0,0,0,0,0,0,0,0, \
+ 0,0,0,0,0,1,0,1, \
+ 0,0,0,0,0,0,0,0, \
+ 1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1 \
+}
+
+/* 1 for registers not available across function calls.
+ These must include the FIXED_REGISTERS and also any
+ registers that can be used without being saved.
+ The latter must include the registers where values are returned
+ and the register where structure-value addresses are passed.
+ Aside from that, you can include as many other registers as you like.
+ The CC is not preserved over function calls on the ARM 6, so it is
+ easier to assume this for all. SFP is preserved, since FP is. */
+#define CALL_USED_REGISTERS \
+{ \
+ 1,1,1,1,0,0,0,0, \
+ 0,0,0,0,1,1,1,1, \
+ 1,1,1,1,0,0,0,0, \
+ 1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1,1,1,1,1,1,1,1, \
+ 1 \
+}
+
+#ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE
+#define SUBTARGET_CONDITIONAL_REGISTER_USAGE
+#endif
+
+#define CONDITIONAL_REGISTER_USAGE \
+{ \
+ int regno; \
+ \
+ if (TARGET_SOFT_FLOAT || TARGET_THUMB1 || !TARGET_FPA) \
+ { \
+ for (regno = FIRST_FPA_REGNUM; \
+ regno <= LAST_FPA_REGNUM; ++regno) \
+ fixed_regs[regno] = call_used_regs[regno] = 1; \
+ } \
+ \
+ if (TARGET_THUMB1 && optimize_size) \
+ { \
+ /* When optimizing for size on Thumb-1, it's better not \
+ to use the HI regs, because of the overhead of \
+ stacking them. */ \
+ for (regno = FIRST_HI_REGNUM; \
+ regno <= LAST_HI_REGNUM; ++regno) \
+ fixed_regs[regno] = call_used_regs[regno] = 1; \
+ } \
+ \
+ /* The link register can be clobbered by any branch insn, \
+ but we have no way to track that at present, so mark \
+ it as unavailable. */ \
+ if (TARGET_THUMB1) \
+ fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1; \
+ \
+ if (TARGET_32BIT && TARGET_HARD_FLOAT) \
+ { \
+ if (TARGET_MAVERICK) \
+ { \
+ for (regno = FIRST_FPA_REGNUM; \
+ regno <= LAST_FPA_REGNUM; ++ regno) \
+ fixed_regs[regno] = call_used_regs[regno] = 1; \
+ for (regno = FIRST_CIRRUS_FP_REGNUM; \
+ regno <= LAST_CIRRUS_FP_REGNUM; ++ regno) \
+ { \
+ fixed_regs[regno] = 0; \
+ call_used_regs[regno] = regno < FIRST_CIRRUS_FP_REGNUM + 4; \
+ } \
+ } \
+ if (TARGET_VFP) \
+ { \
+ /* VFPv3 registers are disabled when earlier VFP \
+ versions are selected due to the definition of \
+ LAST_VFP_REGNUM. */ \
+ for (regno = FIRST_VFP_REGNUM; \
+ regno <= LAST_VFP_REGNUM; ++ regno) \
+ { \
+ fixed_regs[regno] = 0; \
+ call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16 \
+ || regno >= FIRST_VFP_REGNUM + 32; \
+ } \
+ } \
+ } \
+ \
+ if (TARGET_REALLY_IWMMXT) \
+ { \
+ regno = FIRST_IWMMXT_GR_REGNUM; \
+ /* The 2002/10/09 revision of the XScale ABI has wCG0 \
+ and wCG1 as call-preserved registers. The 2002/11/21 \
+ revision changed this so that all wCG registers are \
+ scratch registers. */ \
+ for (regno = FIRST_IWMMXT_GR_REGNUM; \
+ regno <= LAST_IWMMXT_GR_REGNUM; ++ regno) \
+ fixed_regs[regno] = 0; \
+ /* The XScale ABI has wR0 - wR9 as scratch registers, \
+ the rest as call-preserved registers. */ \
+ for (regno = FIRST_IWMMXT_REGNUM; \
+ regno <= LAST_IWMMXT_REGNUM; ++ regno) \
+ { \
+ fixed_regs[regno] = 0; \
+ call_used_regs[regno] = regno < FIRST_IWMMXT_REGNUM + 10; \
+ } \
+ } \
+ \
+ if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
+ { \
+ fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
+ call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
+ } \
+ else if (TARGET_APCS_STACK) \
+ { \
+ fixed_regs[10] = 1; \
+ call_used_regs[10] = 1; \
+ } \
+ /* -mcaller-super-interworking reserves r11 for calls to \
+ _interwork_r11_call_via_rN(). Making the register global \
+ is an easy way of ensuring that it remains valid for all \
+ calls. */ \
+ if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING \
+ || TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) \
+ { \
+ fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
+ call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
+ if (TARGET_CALLER_INTERWORKING) \
+ global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
+ } \
+ SUBTARGET_CONDITIONAL_REGISTER_USAGE \
+}
+
+/* These are a couple of extensions to the formats accepted
+ by asm_fprintf:
+ %@ prints out ASM_COMMENT_START
+ %r prints out REGISTER_PREFIX reg_names[arg] */
+#define ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P) \
+ case '@': \
+ fputs (ASM_COMMENT_START, FILE); \
+ break; \
+ \
+ case 'r': \
+ fputs (REGISTER_PREFIX, FILE); \
+ fputs (reg_names [va_arg (ARGS, int)], FILE); \
+ break;
+
+/* Round X up to the nearest word. */
+#define ROUND_UP_WORD(X) (((X) + 3) & ~3)
+
+/* Convert fron bytes to ints. */
+#define ARM_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+
+/* The number of (integer) registers required to hold a quantity of type MODE.
+ Also used for VFP registers. */
+#define ARM_NUM_REGS(MODE) \
+ ARM_NUM_INTS (GET_MODE_SIZE (MODE))
+
+/* The number of (integer) registers required to hold a quantity of TYPE MODE. */
+#define ARM_NUM_REGS2(MODE, TYPE) \
+ ARM_NUM_INTS ((MODE) == BLKmode ? \
+ int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))
+
+/* The number of (integer) argument register available. */
+#define NUM_ARG_REGS 4
+
+/* And similarly for the VFP. */
+#define NUM_VFP_ARG_REGS 16
+
+/* Return the register number of the N'th (integer) argument. */
+#define ARG_REGISTER(N) (N - 1)
+
+/* Specify the registers used for certain standard purposes.
+ The values of these macros are register numbers. */
+
+/* The number of the last argument register. */
+#define LAST_ARG_REGNUM ARG_REGISTER (NUM_ARG_REGS)
+
+/* The numbers of the Thumb register ranges. */
+#define FIRST_LO_REGNUM 0
+#define LAST_LO_REGNUM 7
+#define FIRST_HI_REGNUM 8
+#define LAST_HI_REGNUM 11
+
+#ifndef TARGET_UNWIND_INFO
+/* We use sjlj exceptions for backwards compatibility. */
+#define MUST_USE_SJLJ_EXCEPTIONS 1
+#endif
+
+/* We can generate DWARF2 Unwind info, even though we don't use it. */
+#define DWARF2_UNWIND_INFO 1
+
+/* Use r0 and r1 to pass exception handling information. */
+#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? N : INVALID_REGNUM)
+
+/* The register that holds the return address in exception handlers. */
+#define ARM_EH_STACKADJ_REGNUM 2
+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)
+
+/* The native (Norcroft) Pascal compiler for the ARM passes the static chain
+ as an invisible last argument (possible since varargs don't exist in
+ Pascal), so the following is not true. */
+#define STATIC_CHAIN_REGNUM 12
+
+/* Define this to be where the real frame pointer is if it is not possible to
+ work out the offset between the frame pointer and the automatic variables
+ until after register allocation has taken place. FRAME_POINTER_REGNUM
+ should point to a special register that we will make sure is eliminated.
+
+ For the Thumb we have another problem. The TPCS defines the frame pointer
+ as r11, and GCC believes that it is always possible to use the frame pointer
+ as base register for addressing purposes. (See comments in
+ find_reloads_address()). But - the Thumb does not allow high registers,
+ including r11, to be used as base address registers. Hence our problem.
+
+ The solution used here, and in the old thumb port is to use r7 instead of
+ r11 as the hard frame pointer and to have special code to generate
+ backtrace structures on the stack (if required to do so via a command line
+ option) using r11. This is the only 'user visible' use of r11 as a frame
+ pointer. */
+#define ARM_HARD_FRAME_POINTER_REGNUM 11
+#define THUMB_HARD_FRAME_POINTER_REGNUM 7
+
+#define HARD_FRAME_POINTER_REGNUM \
+ (TARGET_ARM \
+ ? ARM_HARD_FRAME_POINTER_REGNUM \
+ : THUMB_HARD_FRAME_POINTER_REGNUM)
+
+#define FP_REGNUM HARD_FRAME_POINTER_REGNUM
+
+/* Register to use for pushing function arguments. */
+#define STACK_POINTER_REGNUM SP_REGNUM
+
+/* ARM floating pointer registers. */
+#define FIRST_FPA_REGNUM 16
+#define LAST_FPA_REGNUM 23
+#define IS_FPA_REGNUM(REGNUM) \
+ (((REGNUM) >= FIRST_FPA_REGNUM) && ((REGNUM) <= LAST_FPA_REGNUM))
+
+#define FIRST_IWMMXT_GR_REGNUM 43
+#define LAST_IWMMXT_GR_REGNUM 46
+#define FIRST_IWMMXT_REGNUM 47
+#define LAST_IWMMXT_REGNUM 62
+#define IS_IWMMXT_REGNUM(REGNUM) \
+ (((REGNUM) >= FIRST_IWMMXT_REGNUM) && ((REGNUM) <= LAST_IWMMXT_REGNUM))
+#define IS_IWMMXT_GR_REGNUM(REGNUM) \
+ (((REGNUM) >= FIRST_IWMMXT_GR_REGNUM) && ((REGNUM) <= LAST_IWMMXT_GR_REGNUM))
+
+/* Base register for access to local variables of the function. */
+#define FRAME_POINTER_REGNUM 25
+
+/* Base register for access to arguments of the function. */
+#define ARG_POINTER_REGNUM 26
+
+#define FIRST_CIRRUS_FP_REGNUM 27
+#define LAST_CIRRUS_FP_REGNUM 42
+#define IS_CIRRUS_REGNUM(REGNUM) \
+ (((REGNUM) >= FIRST_CIRRUS_FP_REGNUM) && ((REGNUM) <= LAST_CIRRUS_FP_REGNUM))
+
+#define FIRST_VFP_REGNUM 63
+#define D7_VFP_REGNUM 78 /* Registers 77 and 78 == VFP reg D7. */
+#define LAST_VFP_REGNUM \
+ (TARGET_VFPD32 ? LAST_HI_VFP_REGNUM : LAST_LO_VFP_REGNUM)
+
+#define IS_VFP_REGNUM(REGNUM) \
+ (((REGNUM) >= FIRST_VFP_REGNUM) && ((REGNUM) <= LAST_VFP_REGNUM))
+
+/* VFP registers are split into two types: those defined by VFP versions < 3
+ have D registers overlaid on consecutive pairs of S registers. VFP version 3
+ defines 16 new D registers (d16-d31) which, for simplicity and correctness
+ in various parts of the backend, we implement as "fake" single-precision
+ registers (which would be S32-S63, but cannot be used in that way). The
+ following macros define these ranges of registers. */
+#define LAST_LO_VFP_REGNUM 94
+#define FIRST_HI_VFP_REGNUM 95
+#define LAST_HI_VFP_REGNUM 126
+
+#define VFP_REGNO_OK_FOR_SINGLE(REGNUM) \
+ ((REGNUM) <= LAST_LO_VFP_REGNUM)
+
+/* DFmode values are only valid in even register pairs. */
+#define VFP_REGNO_OK_FOR_DOUBLE(REGNUM) \
+ ((((REGNUM) - FIRST_VFP_REGNUM) & 1) == 0)
+
+/* Neon Quad values must start at a multiple of four registers. */
+#define NEON_REGNO_OK_FOR_QUAD(REGNUM) \
+ ((((REGNUM) - FIRST_VFP_REGNUM) & 3) == 0)
+
+/* Neon structures of vectors must be in even register pairs and there
+ must be enough registers available. Because of various patterns
+ requiring quad registers, we require them to start at a multiple of
+ four. */
+#define NEON_REGNO_OK_FOR_NREGS(REGNUM, N) \
+ ((((REGNUM) - FIRST_VFP_REGNUM) & 3) == 0 \
+ && (LAST_VFP_REGNUM - (REGNUM) >= 2 * (N) - 1))
+
+/* The number of hard registers is 16 ARM + 8 FPA + 1 CC + 1 SFP + 1 AFP. */
+/* + 16 Cirrus registers take us up to 43. */
+/* Intel Wireless MMX Technology registers add 16 + 4 more. */
+/* VFP (VFP3) adds 32 (64) + 1 more. */
+#define FIRST_PSEUDO_REGISTER 128
+
+#define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO)
+
+/* Value should be nonzero if functions must have frame pointers.
+ Zero means the frame pointer need not be set up (and parms may be accessed
+ via the stack pointer) in functions that seem suitable.
+ If we have to have a frame pointer we might as well make use of it.
+ APCS says that the frame pointer does not need to be pushed in leaf
+ functions, or simple tail call functions. */
+
+#ifndef SUBTARGET_FRAME_POINTER_REQUIRED
+#define SUBTARGET_FRAME_POINTER_REQUIRED 0
+#endif
+
+#define FRAME_POINTER_REQUIRED \
+ (cfun->has_nonlocal_label \
+ || SUBTARGET_FRAME_POINTER_REQUIRED \
+ || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ()))
+
+/* Return number of consecutive hard regs needed starting at reg REGNO
+ to hold something of mode MODE.
+ This is ordinarily the length in words of a value of mode MODE
+ but can be less for certain modes in special long registers.
+
+ On the ARM regs are UNITS_PER_WORD bits wide; FPA regs can hold any FP
+ mode. */
+#define HARD_REGNO_NREGS(REGNO, MODE) \
+ ((TARGET_32BIT \
+ && REGNO >= FIRST_FPA_REGNUM \
+ && REGNO != FRAME_POINTER_REGNUM \
+ && REGNO != ARG_POINTER_REGNUM) \
+ && !IS_VFP_REGNUM (REGNO) \
+ ? 1 : ARM_NUM_REGS (MODE))
+
+/* Return true if REGNO is suitable for holding a quantity of type MODE. */
+#define HARD_REGNO_MODE_OK(REGNO, MODE) \
+ arm_hard_regno_mode_ok ((REGNO), (MODE))
+
+/* Value is 1 if it is a good idea to tie two pseudo registers
+ when one has mode MODE1 and one has mode MODE2.
+ If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
+ for any hard reg, then this must be 0 for correct output. */
+#define MODES_TIEABLE_P(MODE1, MODE2) \
+ (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
+
+#define VALID_IWMMXT_REG_MODE(MODE) \
+ (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)
+
+/* Modes valid for Neon D registers. */
+#define VALID_NEON_DREG_MODE(MODE) \
+ ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
+ || (MODE) == V2SFmode || (MODE) == DImode)
+
+/* Modes valid for Neon Q registers. */
+#define VALID_NEON_QREG_MODE(MODE) \
+ ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
+ || (MODE) == V4SFmode || (MODE) == V2DImode)
+
+/* Structure modes valid for Neon registers. */
+#define VALID_NEON_STRUCT_MODE(MODE) \
+ ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
+ || (MODE) == CImode || (MODE) == XImode)
+
+/* The order in which register should be allocated. It is good to use ip
+ since no saving is required (though calls clobber it) and it never contains
+ function parameters. It is quite good to use lr since other calls may
+ clobber it anyway. Allocate r0 through r3 in reverse order since r3 is
+ least likely to contain a function parameter; in addition results are
+ returned in r0.
+ For VFP/VFPv3, allocate D16-D31 first, then caller-saved registers (D0-D7),
+ then D8-D15. The reason for doing this is to attempt to reduce register
+ pressure when both single- and double-precision registers are used in a
+ function. */
+
+#define REG_ALLOC_ORDER \
+{ \
+ 3, 2, 1, 0, 12, 14, 4, 5, \
+ 6, 7, 8, 10, 9, 11, 13, 15, \
+ 16, 17, 18, 19, 20, 21, 22, 23, \
+ 27, 28, 29, 30, 31, 32, 33, 34, \
+ 35, 36, 37, 38, 39, 40, 41, 42, \
+ 43, 44, 45, 46, 47, 48, 49, 50, \
+ 51, 52, 53, 54, 55, 56, 57, 58, \
+ 59, 60, 61, 62, \
+ 24, 25, 26, \
+ 95, 96, 97, 98, 99, 100, 101, 102, \
+ 103, 104, 105, 106, 107, 108, 109, 110, \
+ 111, 112, 113, 114, 115, 116, 117, 118, \
+ 119, 120, 121, 122, 123, 124, 125, 126, \
+ 78, 77, 76, 75, 74, 73, 72, 71, \
+ 70, 69, 68, 67, 66, 65, 64, 63, \
+ 79, 80, 81, 82, 83, 84, 85, 86, \
+ 87, 88, 89, 90, 91, 92, 93, 94, \
+ 127 \
+}
+
+/* Use different register alloc ordering for Thumb. */
+#define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
+
+/* Tell IRA to use the order we define rather than messing it up with its
+ own cost calculations. */
+#define HONOR_REG_ALLOC_ORDER
+
+/* Interrupt functions can only use registers that have already been
+ saved by the prologue, even if they would normally be
+ call-clobbered. */
+#define HARD_REGNO_RENAME_OK(SRC, DST) \
+ (! IS_INTERRUPT (cfun->machine->func_type) || \
+ df_regs_ever_live_p (DST))
+
+/* Register and constant classes. */
+
+/* Register classes: used to be simple, just all ARM regs or all FPA regs
+ Now that the Thumb is involved it has become more complicated. */
+enum reg_class
+{
+ NO_REGS,
+ FPA_REGS,
+ CIRRUS_REGS,
+ VFP_D0_D7_REGS,
+ VFP_LO_REGS,
+ VFP_HI_REGS,
+ VFP_REGS,
+ IWMMXT_GR_REGS,
+ IWMMXT_REGS,
+ LO_REGS,
+ STACK_REG,
+ BASE_REGS,
+ HI_REGS,
+ CC_REG,
+ VFPCC_REG,
+ GENERAL_REGS,
+ CORE_REGS,
+ ALL_REGS,
+ LIM_REG_CLASSES
+};
+
+#define N_REG_CLASSES (int) LIM_REG_CLASSES
+
+/* Give names of register classes as strings for dump file. */
+#define REG_CLASS_NAMES \
+{ \
+ "NO_REGS", \
+ "FPA_REGS", \
+ "CIRRUS_REGS", \
+ "VFP_D0_D7_REGS", \
+ "VFP_LO_REGS", \
+ "VFP_HI_REGS", \
+ "VFP_REGS", \
+ "IWMMXT_GR_REGS", \
+ "IWMMXT_REGS", \
+ "LO_REGS", \
+ "STACK_REG", \
+ "BASE_REGS", \
+ "HI_REGS", \
+ "CC_REG", \
+ "VFPCC_REG", \
+ "GENERAL_REGS", \
+ "CORE_REGS", \
+ "ALL_REGS", \
+}
+
+/* Define which registers fit in which classes.
+ This is an initializer for a vector of HARD_REG_SET
+ of length N_REG_CLASSES. */
+#define REG_CLASS_CONTENTS \
+{ \
+ { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
+ { 0x00FF0000, 0x00000000, 0x00000000, 0x00000000 }, /* FPA_REGS */ \
+ { 0xF8000000, 0x000007FF, 0x00000000, 0x00000000 }, /* CIRRUS_REGS */ \
+ { 0x00000000, 0x80000000, 0x00007FFF, 0x00000000 }, /* VFP_D0_D7_REGS */ \
+ { 0x00000000, 0x80000000, 0x7FFFFFFF, 0x00000000 }, /* VFP_LO_REGS */ \
+ { 0x00000000, 0x00000000, 0x80000000, 0x7FFFFFFF }, /* VFP_HI_REGS */ \
+ { 0x00000000, 0x80000000, 0xFFFFFFFF, 0x7FFFFFFF }, /* VFP_REGS */ \
+ { 0x00000000, 0x00007800, 0x00000000, 0x00000000 }, /* IWMMXT_GR_REGS */ \
+ { 0x00000000, 0x7FFF8000, 0x00000000, 0x00000000 }, /* IWMMXT_REGS */ \
+ { 0x000000FF, 0x00000000, 0x00000000, 0x00000000 }, /* LO_REGS */ \
+ { 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \
+ { 0x000020FF, 0x00000000, 0x00000000, 0x00000000 }, /* BASE_REGS */ \
+ { 0x0000DF00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \
+ { 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* CC_REG */ \
+ { 0x00000000, 0x00000000, 0x00000000, 0x80000000 }, /* VFPCC_REG */ \
+ { 0x0200DFFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
+ { 0x0200FFFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */ \
+ { 0xFAFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF } /* ALL_REGS */ \
+}
+
+/* Any of the VFP register classes. */
+#define IS_VFP_CLASS(X) \
+ ((X) == VFP_D0_D7_REGS || (X) == VFP_LO_REGS \
+ || (X) == VFP_HI_REGS || (X) == VFP_REGS)
+
+/* The same information, inverted:
+ Return the class number of the smallest class containing
+ reg number REGNO. This could be a conditional expression
+ or could index an array. */
+#define REGNO_REG_CLASS(REGNO) arm_regno_class (REGNO)
+
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ GENERAL_REGS, FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,\
+ LIM_REG_CLASSES \
+}
+
+/* FPA registers can't do subreg as all values are reformatted to internal
+ precision. VFP registers may only be accessed in the mode they
+ were set. */
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+ (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+ ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \
+ || reg_classes_intersect_p (VFP_REGS, (CLASS)) \
+ : 0)
+
+/* We need to define this for LO_REGS on thumb. Otherwise we can end up
+ using r0-r4 for function arguments, r7 for the stack frame and don't
+ have enough left over to do doubleword arithmetic. */
+#define CLASS_LIKELY_SPILLED_P(CLASS) \
+ ((TARGET_THUMB && (CLASS) == LO_REGS) \
+ || (CLASS) == CC_REG)
+
+/* The class value for index registers, and the one for base regs. */
+#define INDEX_REG_CLASS (TARGET_THUMB1 ? LO_REGS : GENERAL_REGS)
+#define BASE_REG_CLASS (TARGET_THUMB1 ? LO_REGS : CORE_REGS)
+
+/* For the Thumb the high registers cannot be used as base registers
+ when addressing quantities in QI or HI mode; if we don't know the
+ mode, then we must be conservative. */
+#define MODE_BASE_REG_CLASS(MODE) \
+ (TARGET_32BIT ? CORE_REGS : \
+ (((MODE) == SImode) ? BASE_REGS : LO_REGS))
+
+/* For Thumb we can not support SP+reg addressing, so we return LO_REGS
+ instead of BASE_REGS. */
+#define MODE_BASE_REG_REG_CLASS(MODE) BASE_REG_CLASS
+
+/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
+ registers explicitly used in the rtl to be used as spill registers
+ but prevents the compiler from extending the lifetime of these
+ registers. */
+#define SMALL_REGISTER_CLASSES TARGET_THUMB1
+
+/* Given an rtx X being reloaded into a reg required to be
+ in class CLASS, return the class of reg to actually use.
+ In general this is just CLASS, but for the Thumb core registers and
+ immediate constants we prefer a LO_REGS class or a subset. */
+#define PREFERRED_RELOAD_CLASS(X, CLASS) \
+ (TARGET_ARM ? (CLASS) : \
+ ((CLASS) == GENERAL_REGS || (CLASS) == HI_REGS \
+ || (CLASS) == NO_REGS || (CLASS) == STACK_REG \
+ ? LO_REGS : (CLASS)))
+
+/* Must leave BASE_REGS reloads alone */
+#define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
+ ((CLASS) != LO_REGS && (CLASS) != BASE_REGS \
+ ? ((true_regnum (X) == -1 ? LO_REGS \
+ : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
+ : NO_REGS)) \
+ : NO_REGS)
+
+#define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
+ ((CLASS) != LO_REGS && (CLASS) != BASE_REGS \
+ ? ((true_regnum (X) == -1 ? LO_REGS \
+ : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
+ : NO_REGS)) \
+ : NO_REGS)
+
+/* Return the register class of a scratch register needed to copy IN into
+ or out of a register in CLASS in MODE. If it can be done directly,
+ NO_REGS is returned. */
+#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
+ /* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \
+ ((TARGET_VFP && TARGET_HARD_FLOAT \
+ && IS_VFP_CLASS (CLASS)) \
+ ? coproc_secondary_reload_class (MODE, X, FALSE) \
+ : (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) \
+ ? coproc_secondary_reload_class (MODE, X, TRUE) \
+ : TARGET_32BIT \
+ ? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \
+ ? GENERAL_REGS : NO_REGS) \
+ : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))
+
+/* If we need to load shorts byte-at-a-time, then we need a scratch. */
+#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
+ /* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \
+ ((TARGET_VFP && TARGET_HARD_FLOAT \
+ && IS_VFP_CLASS (CLASS)) \
+ ? coproc_secondary_reload_class (MODE, X, FALSE) : \
+ (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) ? \
+ coproc_secondary_reload_class (MODE, X, TRUE) : \
+ /* Cannot load constants into Cirrus registers. */ \
+ (TARGET_MAVERICK && TARGET_HARD_FLOAT \
+ && (CLASS) == CIRRUS_REGS \
+ && (CONSTANT_P (X) || GET_CODE (X) == SYMBOL_REF)) \
+ ? GENERAL_REGS : \
+ (TARGET_32BIT ? \
+ (((CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS) \
+ && CONSTANT_P (X)) \
+ ? GENERAL_REGS : \
+ (((MODE) == HImode && ! arm_arch4 \
+ && (GET_CODE (X) == MEM \
+ || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG) \
+ && true_regnum (X) == -1))) \
+ ? GENERAL_REGS : NO_REGS) \
+ : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)))
+
+/* Try a machine-dependent way of reloading an illegitimate address
+ operand. If we find one, push the reload and jump to WIN. This
+ macro is used in only one place: `find_reloads_address' in reload.c.
+
+ For the ARM, we wish to handle large displacements off a base
+ register by splitting the addend across a MOV and the mem insn.
+ This can cut the number of reloads needed. */
+#define ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN) \
+ do \
+ { \
+ if (GET_CODE (X) == PLUS \
+ && GET_CODE (XEXP (X, 0)) == REG \
+ && REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \
+ && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \
+ && GET_CODE (XEXP (X, 1)) == CONST_INT) \
+ { \
+ HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
+ HOST_WIDE_INT low, high; \
+ \
+ if (MODE == DImode || (MODE == DFmode && TARGET_SOFT_FLOAT)) \
+ low = ((val & 0xf) ^ 0x8) - 0x8; \
+ else if (TARGET_MAVERICK && TARGET_HARD_FLOAT) \
+ /* Need to be careful, -256 is not a valid offset. */ \
+ low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); \
+ else if (MODE == SImode \
+ || (MODE == SFmode && TARGET_SOFT_FLOAT) \
+ || ((MODE == HImode || MODE == QImode) && ! arm_arch4)) \
+ /* Need to be careful, -4096 is not a valid offset. */ \
+ low = val >= 0 ? (val & 0xfff) : -((-val) & 0xfff); \
+ else if ((MODE == HImode || MODE == QImode) && arm_arch4) \
+ /* Need to be careful, -256 is not a valid offset. */ \
+ low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); \
+ else if (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ && TARGET_HARD_FLOAT && TARGET_FPA) \
+ /* Need to be careful, -1024 is not a valid offset. */ \
+ low = val >= 0 ? (val & 0x3ff) : -((-val) & 0x3ff); \
+ else \
+ break; \
+ \
+ high = ((((val - low) & (unsigned HOST_WIDE_INT) 0xffffffff) \
+ ^ (unsigned HOST_WIDE_INT) 0x80000000) \
+ - (unsigned HOST_WIDE_INT) 0x80000000); \
+ /* Check for overflow or zero */ \
+ if (low == 0 || high == 0 || (high + low != val)) \
+ break; \
+ \
+ /* Reload the high part into a base reg; leave the low part \
+ in the mem. */ \
+ X = gen_rtx_PLUS (GET_MODE (X), \
+ gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \
+ GEN_INT (high)), \
+ GEN_INT (low)); \
+ push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
+ MODE_BASE_REG_CLASS (MODE), GET_MODE (X), \
+ VOIDmode, 0, 0, OPNUM, TYPE); \
+ goto WIN; \
+ } \
+ } \
+ while (0)
+
+/* XXX If an HImode FP+large_offset address is converted to an HImode
+ SP+large_offset address, then reload won't know how to fix it. It sees
+ only that SP isn't valid for HImode, and so reloads the SP into an index
+ register, but the resulting address is still invalid because the offset
+ is too big. We fix it here instead by reloading the entire address. */
+/* We could probably achieve better results by defining PROMOTE_MODE to help
+ cope with the variances between the Thumb's signed and unsigned byte and
+ halfword load instructions. */
+/* ??? This should be safe for thumb2, but we may be able to do better. */
+#define THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) \
+do { \
+ rtx new_x = thumb_legitimize_reload_address (&X, MODE, OPNUM, TYPE, IND_L); \
+ if (new_x) \
+ { \
+ X = new_x; \
+ goto WIN; \
+ } \
+} while (0)
+
+#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
+ if (TARGET_ARM) \
+ ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \
+ else \
+ THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
+
+/* Return the maximum number of consecutive registers
+ needed to represent mode MODE in a register of class CLASS.
+ ARM regs are UNITS_PER_WORD bits while FPA regs can hold any FP mode */
+#define CLASS_MAX_NREGS(CLASS, MODE) \
+ (((CLASS) == FPA_REGS || (CLASS) == CIRRUS_REGS) ? 1 : ARM_NUM_REGS (MODE))
+
+/* If defined, gives a class of registers that cannot be used as the
+ operand of a SUBREG that changes the mode of the object illegally. */
+
+/* Moves between FPA_REGS and GENERAL_REGS are two memory insns. */
+#define REGISTER_MOVE_COST(MODE, FROM, TO) \
+ (TARGET_32BIT ? \
+ ((FROM) == FPA_REGS && (TO) != FPA_REGS ? 20 : \
+ (FROM) != FPA_REGS && (TO) == FPA_REGS ? 20 : \
+ IS_VFP_CLASS (FROM) && !IS_VFP_CLASS (TO) ? 10 : \
+ !IS_VFP_CLASS (FROM) && IS_VFP_CLASS (TO) ? 10 : \
+ (FROM) == IWMMXT_REGS && (TO) != IWMMXT_REGS ? 4 : \
+ (FROM) != IWMMXT_REGS && (TO) == IWMMXT_REGS ? 4 : \
+ (FROM) == IWMMXT_GR_REGS || (TO) == IWMMXT_GR_REGS ? 20 : \
+ (FROM) == CIRRUS_REGS && (TO) != CIRRUS_REGS ? 20 : \
+ (FROM) != CIRRUS_REGS && (TO) == CIRRUS_REGS ? 20 : \
+ 2) \
+ : \
+ ((FROM) == HI_REGS || (TO) == HI_REGS) ? 4 : 2)
+
+/* Stack layout; function entry, exit and calling. */
+
+/* Define this if pushing a word on the stack
+ makes the stack pointer a smaller address. */
+#define STACK_GROWS_DOWNWARD 1
+
+/* Define this to nonzero if the nominal address of the stack frame
+ is at the high-address end of the local variables;
+ that is, each additional local variable allocated
+ goes at a more negative offset in the frame. */
+#define FRAME_GROWS_DOWNWARD 1
+
+/* The amount of scratch space needed by _interwork_{r7,r11}_call_via_rN().
+ When present, it is one word in size, and sits at the top of the frame,
+ between the soft frame pointer and either r7 or r11.
+
+ We only need _interwork_rM_call_via_rN() for -mcaller-super-interworking,
+ and only then if some outgoing arguments are passed on the stack. It would
+ be tempting to also check whether the stack arguments are passed by indirect
+ calls, but there seems to be no reason in principle why a post-reload pass
+ couldn't convert a direct call into an indirect one. */
+#define CALLER_INTERWORKING_SLOT_SIZE \
+ (TARGET_CALLER_INTERWORKING \
+ && crtl->outgoing_args_size != 0 \
+ ? UNITS_PER_WORD : 0)
+
+/* Offset within stack frame to start allocating local variables at.
+ If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
+ first local allocated. Otherwise, it is the offset to the BEGINNING
+ of the first local allocated. */
+#define STARTING_FRAME_OFFSET 0
+
+/* If we generate an insn to push BYTES bytes,
+ this says how many the stack pointer really advances by. */
+/* The push insns do not do this rounding implicitly.
+ So don't define this. */
+/* #define PUSH_ROUNDING(NPUSHED) ROUND_UP_WORD (NPUSHED) */
+
+/* Define this if the maximum size of all the outgoing args is to be
+ accumulated and pushed during the prologue. The amount can be
+ found in the variable crtl->outgoing_args_size. */
+#define ACCUMULATE_OUTGOING_ARGS 1
+
+/* Offset of first parameter from the argument pointer register value. */
+#define FIRST_PARM_OFFSET(FNDECL) (TARGET_ARM ? 4 : 0)
+
+/* Value is the number of byte of arguments automatically
+ popped when returning from a subroutine call.
+ FUNDECL is the declaration node of the function (as a tree),
+ FUNTYPE is the data type of the function (as a tree),
+ or for a library call it is an identifier node for the subroutine name.
+ SIZE is the number of bytes of arguments passed on the stack.
+
+ On the ARM, the caller does not pop any of its arguments that were passed
+ on the stack. */
+#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
+
+/* Define how to find the value returned by a library function
+ assuming the value has mode MODE. */
+#define LIBCALL_VALUE(MODE) \
+ (TARGET_AAPCS_BASED ? aapcs_libcall_value (MODE) \
+ : (TARGET_32BIT && TARGET_HARD_FLOAT_ABI && TARGET_FPA \
+ && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
+ ? gen_rtx_REG (MODE, FIRST_FPA_REGNUM) \
+ : TARGET_32BIT && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK \
+ && GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ ? gen_rtx_REG (MODE, FIRST_CIRRUS_FP_REGNUM) \
+ : TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (MODE) \
+ ? gen_rtx_REG (MODE, FIRST_IWMMXT_REGNUM) \
+ : gen_rtx_REG (MODE, ARG_REGISTER (1)))
+
+/* 1 if REGNO is a possible register number for a function value. */
+#define FUNCTION_VALUE_REGNO_P(REGNO) \
+ ((REGNO) == ARG_REGISTER (1) \
+ || (TARGET_AAPCS_BASED && TARGET_32BIT \
+ && TARGET_VFP && TARGET_HARD_FLOAT \
+ && (REGNO) == FIRST_VFP_REGNUM) \
+ || (TARGET_32BIT && ((REGNO) == FIRST_CIRRUS_FP_REGNUM) \
+ && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK) \
+ || ((REGNO) == FIRST_IWMMXT_REGNUM && TARGET_IWMMXT_ABI) \
+ || (TARGET_32BIT && ((REGNO) == FIRST_FPA_REGNUM) \
+ && TARGET_HARD_FLOAT_ABI && TARGET_FPA))
+
+/* Amount of memory needed for an untyped call to save all possible return
+ registers. */
+#define APPLY_RESULT_SIZE arm_apply_result_size()
+
+/* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
+ values must be in memory. On the ARM, they need only do so if larger
+ than a word, or if they contain elements offset from zero in the struct. */
+#define DEFAULT_PCC_STRUCT_RETURN 0
+
+/* These bits describe the different types of function supported
+ by the ARM backend. They are exclusive. i.e. a function cannot be both a
+ normal function and an interworked function, for example. Knowing the
+ type of a function is important for determining its prologue and
+ epilogue sequences.
+ Note value 7 is currently unassigned. Also note that the interrupt
+ function types all have bit 2 set, so that they can be tested for easily.
+ Note that 0 is deliberately chosen for ARM_FT_UNKNOWN so that when the
+ machine_function structure is initialized (to zero) func_type will
+ default to unknown. This will force the first use of arm_current_func_type
+ to call arm_compute_func_type. */
+#define ARM_FT_UNKNOWN 0 /* Type has not yet been determined. */
+#define ARM_FT_NORMAL 1 /* Your normal, straightforward function. */
+#define ARM_FT_INTERWORKED 2 /* A function that supports interworking. */
+#define ARM_FT_ISR 4 /* An interrupt service routine. */
+#define ARM_FT_FIQ 5 /* A fast interrupt service routine. */
+#define ARM_FT_EXCEPTION 6 /* An ARM exception handler (subcase of ISR). */
+
+#define ARM_FT_TYPE_MASK ((1 << 3) - 1)
+
+/* In addition functions can have several type modifiers,
+ outlined by these bit masks: */
+#define ARM_FT_INTERRUPT (1 << 2) /* Note overlap with FT_ISR and above. */
+#define ARM_FT_NAKED (1 << 3) /* No prologue or epilogue. */
+#define ARM_FT_VOLATILE (1 << 4) /* Does not return. */
+#define ARM_FT_NESTED (1 << 5) /* Embedded inside another func. */
+#define ARM_FT_STACKALIGN (1 << 6) /* Called with misaligned stack. */
+
+/* Some macros to test these flags. */
+#define ARM_FUNC_TYPE(t) (t & ARM_FT_TYPE_MASK)
+#define IS_INTERRUPT(t) (t & ARM_FT_INTERRUPT)
+#define IS_VOLATILE(t) (t & ARM_FT_VOLATILE)
+#define IS_NAKED(t) (t & ARM_FT_NAKED)
+#define IS_NESTED(t) (t & ARM_FT_NESTED)
+#define IS_STACKALIGN(t) (t & ARM_FT_STACKALIGN)
+
+
+/* Structure used to hold the function stack frame layout. Offsets are
+ relative to the stack pointer on function entry. Positive offsets are
+ in the direction of stack growth.
+ Only soft_frame is used in thumb mode. */
+
+typedef struct arm_stack_offsets GTY(())
+{
+ int saved_args; /* ARG_POINTER_REGNUM. */
+ int frame; /* ARM_HARD_FRAME_POINTER_REGNUM. */
+ int saved_regs;
+ int soft_frame; /* FRAME_POINTER_REGNUM. */
+ int locals_base; /* THUMB_HARD_FRAME_POINTER_REGNUM. */
+ int outgoing_args; /* STACK_POINTER_REGNUM. */
+ unsigned int saved_regs_mask;
+}
+arm_stack_offsets;
+
+/* A C structure for machine-specific, per-function data.
+ This is added to the cfun structure. */
+typedef struct machine_function GTY(())
+{
+ /* Additional stack adjustment in __builtin_eh_throw. */
+ rtx eh_epilogue_sp_ofs;
+ /* Records if LR has to be saved for far jumps. */
+ int far_jump_used;
+ /* Records if ARG_POINTER was ever live. */
+ int arg_pointer_live;
+ /* Records if the save of LR has been eliminated. */
+ int lr_save_eliminated;
+ /* The size of the stack frame. Only valid after reload. */
+ arm_stack_offsets stack_offsets;
+ /* Records the type of the current function. */
+ unsigned long func_type;
+ /* Record if the function has a variable argument list. */
+ int uses_anonymous_args;
+ /* Records if sibcalls are blocked because an argument
+ register is needed to preserve stack alignment. */
+ int sibcall_blocked;
+ /* The PIC register for this function. This might be a pseudo. */
+ rtx pic_reg;
+ /* Labels for per-function Thumb call-via stubs. One per potential calling
+ register. We can never call via LR or PC. We can call via SP if a
+ trampoline happens to be on the top of the stack. */
+ rtx call_via[14];
+}
+machine_function;
+
+/* As in the machine_function, a global set of call-via labels, for code
+ that is in text_section. */
+extern GTY(()) rtx thumb_call_via_label[14];
+
+/* The number of potential ways of assigning to a co-processor. */
+#define ARM_NUM_COPROC_SLOTS 1
+
+/* Enumeration of procedure calling standard variants. We don't really
+ support all of these yet. */
+enum arm_pcs
+{
+ ARM_PCS_AAPCS, /* Base standard AAPCS. */
+ ARM_PCS_AAPCS_VFP, /* Use VFP registers for floating point values. */
+ ARM_PCS_AAPCS_IWMMXT, /* Use iWMMXT registers for vectors. */
+ /* This must be the last AAPCS variant. */
+ ARM_PCS_AAPCS_LOCAL, /* Private call within this compilation unit. */
+ ARM_PCS_ATPCS, /* ATPCS. */
+ ARM_PCS_APCS, /* APCS (legacy Linux etc). */
+ ARM_PCS_UNKNOWN
+};
+
+/* We can't define this inside a generator file because it needs enum
+ machine_mode. */
+/* A C type for declaring a variable that is used as the first argument of
+ `FUNCTION_ARG' and other related values. */
+typedef struct
+{
+ /* This is the number of registers of arguments scanned so far. */
+ int nregs;
+ /* This is the number of iWMMXt register arguments scanned so far. */
+ int iwmmxt_nregs;
+ int named_count;
+ int nargs;
+ /* Which procedure call variant to use for this call. */
+ enum arm_pcs pcs_variant;
+
+ /* AAPCS related state tracking. */
+ int aapcs_arg_processed; /* No need to lay out this argument again. */
+ int aapcs_cprc_slot; /* Index of co-processor rules to handle
+ this argument, or -1 if using core
+ registers. */
+ int aapcs_ncrn;
+ int aapcs_next_ncrn;
+ rtx aapcs_reg; /* Register assigned to this argument. */
+ int aapcs_partial; /* How many bytes are passed in regs (if
+ split between core regs and stack.
+ Zero otherwise. */
+ int aapcs_cprc_failed[ARM_NUM_COPROC_SLOTS];
+ int can_split; /* Argument can be split between core regs
+ and the stack. */
+ /* Private data for tracking VFP register allocation */
+ unsigned aapcs_vfp_regs_free;
+ unsigned aapcs_vfp_reg_alloc;
+ int aapcs_vfp_rcount;
+ /* Can't include insn-modes.h because this header is needed before we
+ generate it. */
+ int /* enum machine_mode */ aapcs_vfp_rmode;
+} CUMULATIVE_ARGS;
+
+/* Define where to put the arguments to a function.
+ Value is zero to push the argument on the stack,
+ or a hard register in which to store the argument.
+
+ MODE is the argument's machine mode.
+ TYPE is the data type of the argument (as a tree).
+ This is null for libcalls where that information may
+ not be available.
+ CUM is a variable of type CUMULATIVE_ARGS which gives info about
+ the preceding args and about the function being called.
+ NAMED is nonzero if this argument is a named parameter
+ (otherwise it is an extra parameter matching an ellipsis).
+
+ On the ARM, normally the first 16 bytes are passed in registers r0-r3; all
+ other arguments are passed on the stack. If (NAMED == 0) (which happens
+ only in assign_parms, since TARGET_SETUP_INCOMING_VARARGS is
+ defined), say it is passed in the stack (function_prologue will
+ indeed make it pass in the stack if necessary). */
+#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
+ arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))
+
+#define FUNCTION_ARG_PADDING(MODE, TYPE) \
+ (arm_pad_arg_upward (MODE, TYPE) ? upward : downward)
+
+#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
+ (arm_pad_reg_upward (MODE, TYPE, FIRST) ? upward : downward)
+
+/* For AAPCS, padding should never be below the argument. For other ABIs,
+ * mimic the default. */
+#define PAD_VARARGS_DOWN \
+ ((TARGET_AAPCS_BASED) ? 0 : BYTES_BIG_ENDIAN)
+
+/* Initialize a variable CUM of type CUMULATIVE_ARGS
+ for a call to a function whose data type is FNTYPE.
+ For a library call, FNTYPE is 0.
+ On the ARM, the offset starts at 0. */
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
+ arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL))
+
+/* Update the data in CUM to advance over an argument
+ of mode MODE and data type TYPE.
+ (TYPE is null for libcalls where that information may not be available.) */
+#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
+ arm_function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
+
+/* If defined, a C expression that gives the alignment boundary, in bits, of an
+ argument with the specified mode and type. If it is not defined,
+ `PARM_BOUNDARY' is used for all arguments. */
+#define FUNCTION_ARG_BOUNDARY(MODE,TYPE) \
+ ((ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (MODE, TYPE)) \
+ ? DOUBLEWORD_ALIGNMENT \
+ : PARM_BOUNDARY )
+
+/* 1 if N is a possible register number for function argument passing.
+ On the ARM, r0-r3 are used to pass args. */
+#define FUNCTION_ARG_REGNO_P(REGNO) \
+ (IN_RANGE ((REGNO), 0, 3) \
+ || (TARGET_AAPCS_BASED && TARGET_VFP && TARGET_HARD_FLOAT \
+ && IN_RANGE ((REGNO), FIRST_VFP_REGNUM, FIRST_VFP_REGNUM + 15)) \
+ || (TARGET_IWMMXT_ABI \
+ && IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9)))
+
+
+/* If your target environment doesn't prefix user functions with an
+ underscore, you may wish to re-define this to prevent any conflicts. */
+#ifndef ARM_MCOUNT_NAME
+#define ARM_MCOUNT_NAME "*mcount"
+#endif
+
+/* Call the function profiler with a given profile label. The Acorn
+ compiler puts this BEFORE the prolog but gcc puts it afterwards.
+ On the ARM the full profile code will look like:
+ .data
+ LP1
+ .word 0
+ .text
+ mov ip, lr
+ bl mcount
+ .word LP1
+
+ profile_function() in final.c outputs the .data section, FUNCTION_PROFILER
+ will output the .text section.
+
+ The ``mov ip,lr'' seems like a good idea to stick with cc convention.
+ ``prof'' doesn't seem to mind about this!
+
+ Note - this version of the code is designed to work in both ARM and
+ Thumb modes. */
+#ifndef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
+{ \
+ char temp[20]; \
+ rtx sym; \
+ \
+ asm_fprintf (STREAM, "\tmov\t%r, %r\n\tbl\t", \
+ IP_REGNUM, LR_REGNUM); \
+ assemble_name (STREAM, ARM_MCOUNT_NAME); \
+ fputc ('\n', STREAM); \
+ ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO); \
+ sym = gen_rtx_SYMBOL_REF (Pmode, temp); \
+ assemble_aligned_integer (UNITS_PER_WORD, sym); \
+}
+#endif
+
+#ifdef THUMB_FUNCTION_PROFILER
+#define FUNCTION_PROFILER(STREAM, LABELNO) \
+ if (TARGET_ARM) \
+ ARM_FUNCTION_PROFILER (STREAM, LABELNO) \
+ else \
+ THUMB_FUNCTION_PROFILER (STREAM, LABELNO)
+#else
+#define FUNCTION_PROFILER(STREAM, LABELNO) \
+ ARM_FUNCTION_PROFILER (STREAM, LABELNO)
+#endif
+
+/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
+ the stack pointer does not matter. The value is tested only in
+ functions that have frame pointers.
+ No definition is equivalent to always zero.
+
+ On the ARM, the function epilogue recovers the stack pointer from the
+ frame. */
+#define EXIT_IGNORE_STACK 1
+
+#define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNUM)
+
+/* Determine if the epilogue should be output as RTL.
+ You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
+/* This is disabled for Thumb-2 because it will confuse the
+ conditional insn counter. */
+#define USE_RETURN_INSN(ISCOND) \
+ (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0)
+
+/* Definitions for register eliminations.
+
+ This is an array of structures. Each structure initializes one pair
+ of eliminable registers. The "from" register number is given first,
+ followed by "to". Eliminations of the same "from" register are listed
+ in order of preference.
+
+ We have two registers that can be eliminated on the ARM. First, the
+ arg pointer register can often be eliminated in favor of the stack
+ pointer register. Secondly, the pseudo frame pointer register can always
+ be eliminated; it is replaced with either the stack or the real frame
+ pointer. Note we have to use {ARM|THUMB}_HARD_FRAME_POINTER_REGNUM
+ because the definition of HARD_FRAME_POINTER_REGNUM is not a constant. */
+
+#define ELIMINABLE_REGS \
+{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\
+ { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\
+ { ARG_POINTER_REGNUM, ARM_HARD_FRAME_POINTER_REGNUM },\
+ { ARG_POINTER_REGNUM, THUMB_HARD_FRAME_POINTER_REGNUM },\
+ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },\
+ { FRAME_POINTER_REGNUM, ARM_HARD_FRAME_POINTER_REGNUM },\
+ { FRAME_POINTER_REGNUM, THUMB_HARD_FRAME_POINTER_REGNUM }}
+
+/* Given FROM and TO register numbers, say whether this elimination is
+ allowed. Frame pointer elimination is automatically handled.
+
+ All eliminations are permissible. Note that ARG_POINTER_REGNUM and
+ HARD_FRAME_POINTER_REGNUM are in fact the same thing. If we need a frame
+ pointer, we must eliminate FRAME_POINTER_REGNUM into
+ HARD_FRAME_POINTER_REGNUM and not into STACK_POINTER_REGNUM or
+ ARG_POINTER_REGNUM. */
+#define CAN_ELIMINATE(FROM, TO) \
+ (((TO) == FRAME_POINTER_REGNUM && (FROM) == ARG_POINTER_REGNUM) ? 0 : \
+ ((TO) == STACK_POINTER_REGNUM && frame_pointer_needed) ? 0 : \
+ ((TO) == ARM_HARD_FRAME_POINTER_REGNUM && TARGET_THUMB) ? 0 : \
+ ((TO) == THUMB_HARD_FRAME_POINTER_REGNUM && TARGET_ARM) ? 0 : \
+ 1)
+
+/* Define the offset between two registers, one to be eliminated, and the
+ other its replacement, at the start of a routine. */
+#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
+ if (TARGET_ARM) \
+ (OFFSET) = arm_compute_initial_elimination_offset (FROM, TO); \
+ else \
+ (OFFSET) = thumb_compute_initial_elimination_offset (FROM, TO)
+
+/* Special case handling of the location of arguments passed on the stack. */
+#define DEBUGGER_ARG_OFFSET(value, addr) value ? value : arm_debugger_arg_offset (value, addr)
+
+/* Initialize data used by insn expanders. This is called from insn_emit,
+ once for every function before code is generated. */
+#define INIT_EXPANDERS arm_init_expanders ()
+
+/* Output assembler code for a block containing the constant parts
+ of a trampoline, leaving space for the variable parts.
+
+ On the ARM, (if r8 is the static chain regnum, and remembering that
+ referencing pc adds an offset of 8) the trampoline looks like:
+ ldr r8, [pc, #0]
+ ldr pc, [pc]
+ .word static chain value
+ .word function's address
+ XXX FIXME: When the trampoline returns, r8 will be clobbered. */
+#define ARM_TRAMPOLINE_TEMPLATE(FILE) \
+{ \
+ asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n", \
+ STATIC_CHAIN_REGNUM, PC_REGNUM); \
+ asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n", \
+ PC_REGNUM, PC_REGNUM); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+}
+
+/* The Thumb-2 trampoline is similar to the arm implementation.
+ Unlike 16-bit Thumb, we enter the stub in thumb mode. */
+#define THUMB2_TRAMPOLINE_TEMPLATE(FILE) \
+{ \
+ asm_fprintf (FILE, "\tldr.w\t%r, [%r, #4]\n", \
+ STATIC_CHAIN_REGNUM, PC_REGNUM); \
+ asm_fprintf (FILE, "\tldr.w\t%r, [%r, #4]\n", \
+ PC_REGNUM, PC_REGNUM); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+}
+
+#define THUMB1_TRAMPOLINE_TEMPLATE(FILE) \
+{ \
+ ASM_OUTPUT_ALIGN(FILE, 2); \
+ fprintf (FILE, "\t.code\t16\n"); \
+ fprintf (FILE, ".Ltrampoline_start:\n"); \
+ asm_fprintf (FILE, "\tpush\t{r0, r1}\n"); \
+ asm_fprintf (FILE, "\tldr\tr0, [%r, #8]\n", \
+ PC_REGNUM); \
+ asm_fprintf (FILE, "\tmov\t%r, r0\n", \
+ STATIC_CHAIN_REGNUM); \
+ asm_fprintf (FILE, "\tldr\tr0, [%r, #8]\n", \
+ PC_REGNUM); \
+ asm_fprintf (FILE, "\tstr\tr0, [%r, #4]\n", \
+ SP_REGNUM); \
+ asm_fprintf (FILE, "\tpop\t{r0, %r}\n", \
+ PC_REGNUM); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
+}
+
+#define TRAMPOLINE_TEMPLATE(FILE) \
+ if (TARGET_ARM) \
+ ARM_TRAMPOLINE_TEMPLATE (FILE) \
+ else if (TARGET_THUMB2) \
+ THUMB2_TRAMPOLINE_TEMPLATE (FILE) \
+ else \
+ THUMB1_TRAMPOLINE_TEMPLATE (FILE)
+
+/* Thumb trampolines should be entered in thumb mode, so set the bottom bit
+ of the address. */
+#define TRAMPOLINE_ADJUST_ADDRESS(ADDR) do \
+{ \
+ if (TARGET_THUMB) \
+ (ADDR) = expand_simple_binop (Pmode, IOR, (ADDR), GEN_INT(1), \
+ gen_reg_rtx (Pmode), 0, OPTAB_LIB_WIDEN); \
+} while(0)
+
+/* Length in units of the trampoline for entering a nested function. */
+#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
+
+/* Alignment required for a trampoline in bits. */
+#define TRAMPOLINE_ALIGNMENT 32
+
+
+/* Emit RTL insns to initialize the variable parts of a trampoline.
+ FNADDR is an RTX for the address of the function's pure code.
+ CXT is an RTX for the static chain value for the function. */
+#ifndef INITIALIZE_TRAMPOLINE
+#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
+{ \
+ emit_move_insn (gen_rtx_MEM (SImode, \
+ plus_constant (TRAMP, \
+ TARGET_32BIT ? 8 : 12)), \
+ CXT); \
+ emit_move_insn (gen_rtx_MEM (SImode, \
+ plus_constant (TRAMP, \
+ TARGET_32BIT ? 12 : 16)), \
+ FNADDR); \
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
+ 0, VOIDmode, 2, TRAMP, Pmode, \
+ plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
+}
+#endif
+
+
+/* Addressing modes, and classification of registers for them. */
+#define HAVE_POST_INCREMENT 1
+#define HAVE_PRE_INCREMENT TARGET_32BIT
+#define HAVE_POST_DECREMENT TARGET_32BIT
+#define HAVE_PRE_DECREMENT TARGET_32BIT
+#define HAVE_PRE_MODIFY_DISP TARGET_32BIT
+#define HAVE_POST_MODIFY_DISP TARGET_32BIT
+#define HAVE_PRE_MODIFY_REG TARGET_32BIT
+#define HAVE_POST_MODIFY_REG TARGET_32BIT
+
+/* Macros to check register numbers against specific register classes. */
+
+/* These assume that REGNO is a hard or pseudo reg number.
+ They give nonzero only if REGNO is a hard reg of the suitable class
+ or a pseudo reg currently allocated to a suitable hard reg.
+ Since they use reg_renumber, they are safe only once reg_renumber
+ has been allocated, which happens in local-alloc.c. */
+#define TEST_REGNO(R, TEST, VALUE) \
+ ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
+
+/* Don't allow the pc to be used. */
+#define ARM_REGNO_OK_FOR_BASE_P(REGNO) \
+ (TEST_REGNO (REGNO, <, PC_REGNUM) \
+ || TEST_REGNO (REGNO, ==, FRAME_POINTER_REGNUM) \
+ || TEST_REGNO (REGNO, ==, ARG_POINTER_REGNUM))
+
+#define THUMB1_REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
+ (TEST_REGNO (REGNO, <=, LAST_LO_REGNUM) \
+ || (GET_MODE_SIZE (MODE) >= 4 \
+ && TEST_REGNO (REGNO, ==, STACK_POINTER_REGNUM)))
+
+#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
+ (TARGET_THUMB1 \
+ ? THUMB1_REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE) \
+ : ARM_REGNO_OK_FOR_BASE_P (REGNO))
+
+/* Nonzero if X can be the base register in a reg+reg addressing mode.
+ For Thumb, we can not use SP + reg, so reject SP. */
+#define REGNO_MODE_OK_FOR_REG_BASE_P(X, MODE) \
+ REGNO_MODE_OK_FOR_BASE_P (X, QImode)
+
+/* For ARM code, we don't care about the mode, but for Thumb, the index
+ must be suitable for use in a QImode load. */
+#define REGNO_OK_FOR_INDEX_P(REGNO) \
+ (REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode) \
+ && !TEST_REGNO (REGNO, ==, STACK_POINTER_REGNUM))
+
+/* Maximum number of registers that can appear in a valid memory address.
+ Shifts in addresses can't be by a register. */
+#define MAX_REGS_PER_ADDRESS 2
+
+/* Recognize any constant value that is a valid address. */
+/* XXX We can address any constant, eventually... */
+/* ??? Should the TARGET_ARM here also apply to thumb2? */
+#define CONSTANT_ADDRESS_P(X) \
+ (GET_CODE (X) == SYMBOL_REF \
+ && (CONSTANT_POOL_ADDRESS_P (X) \
+ || (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X))))
+
+/* True if SYMBOL + OFFSET constants must refer to something within
+ SYMBOL's section. */
+#define ARM_OFFSETS_MUST_BE_WITHIN_SECTIONS_P 0
+
+/* Nonzero if all target requires all absolute relocations be R_ARM_ABS32. */
+#ifndef TARGET_DEFAULT_WORD_RELOCATIONS
+#define TARGET_DEFAULT_WORD_RELOCATIONS 0
+#endif
+
+/* Nonzero if the constant value X is a legitimate general operand.
+ It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
+
+ On the ARM, allow any integer (invalid ones are removed later by insn
+ patterns), nice doubles and symbol_refs which refer to the function's
+ constant pool XXX.
+
+ When generating pic allow anything. */
+#define ARM_LEGITIMATE_CONSTANT_P(X) (flag_pic || ! label_mentioned_p (X))
+
+#define THUMB_LEGITIMATE_CONSTANT_P(X) \
+ ( GET_CODE (X) == CONST_INT \
+ || GET_CODE (X) == CONST_DOUBLE \
+ || CONSTANT_ADDRESS_P (X) \
+ || flag_pic)
+
+#define LEGITIMATE_CONSTANT_P(X) \
+ (!arm_cannot_force_const_mem (X) \
+ && (TARGET_32BIT ? ARM_LEGITIMATE_CONSTANT_P (X) \
+ : THUMB_LEGITIMATE_CONSTANT_P (X)))
+
+#ifndef SUBTARGET_NAME_ENCODING_LENGTHS
+#define SUBTARGET_NAME_ENCODING_LENGTHS
+#endif
+
+/* This is a C fragment for the inside of a switch statement.
+ Each case label should return the number of characters to
+ be stripped from the start of a function's name, if that
+ name starts with the indicated character. */
+#define ARM_NAME_ENCODING_LENGTHS \
+ case '*': return 1; \
+ SUBTARGET_NAME_ENCODING_LENGTHS
+
+/* This is how to output a reference to a user-level label named NAME.
+ `assemble_name' uses this. */
+#undef ASM_OUTPUT_LABELREF
+#define ASM_OUTPUT_LABELREF(FILE, NAME) \
+ arm_asm_output_labelref (FILE, NAME)
+
+/* Output IT instructions for conditionally executed Thumb-2 instructions. */
+#define ASM_OUTPUT_OPCODE(STREAM, PTR) \
+ if (TARGET_THUMB2) \
+ thumb2_asm_output_opcode (STREAM);
+
+/* The EABI specifies that constructors should go in .init_array.
+ Other targets use .ctors for compatibility. */
+#ifndef ARM_EABI_CTORS_SECTION_OP
+#define ARM_EABI_CTORS_SECTION_OP \
+ "\t.section\t.init_array,\"aw\",%init_array"
+#endif
+#ifndef ARM_EABI_DTORS_SECTION_OP
+#define ARM_EABI_DTORS_SECTION_OP \
+ "\t.section\t.fini_array,\"aw\",%fini_array"
+#endif
+#define ARM_CTORS_SECTION_OP \
+ "\t.section\t.ctors,\"aw\",%progbits"
+#define ARM_DTORS_SECTION_OP \
+ "\t.section\t.dtors,\"aw\",%progbits"
+
+/* Define CTORS_SECTION_ASM_OP. */
+#undef CTORS_SECTION_ASM_OP
+#undef DTORS_SECTION_ASM_OP
+#ifndef IN_LIBGCC2
+# define CTORS_SECTION_ASM_OP \
+ (TARGET_AAPCS_BASED ? ARM_EABI_CTORS_SECTION_OP : ARM_CTORS_SECTION_OP)
+# define DTORS_SECTION_ASM_OP \
+ (TARGET_AAPCS_BASED ? ARM_EABI_DTORS_SECTION_OP : ARM_DTORS_SECTION_OP)
+#else /* !defined (IN_LIBGCC2) */
+/* In libgcc, CTORS_SECTION_ASM_OP must be a compile-time constant,
+ so we cannot use the definition above. */
+# ifdef __ARM_EABI__
+/* The .ctors section is not part of the EABI, so we do not define
+ CTORS_SECTION_ASM_OP when in libgcc; that prevents crtstuff
+ from trying to use it. We do define it when doing normal
+ compilation, as .init_array can be used instead of .ctors. */
+/* There is no need to emit begin or end markers when using
+ init_array; the dynamic linker will compute the size of the
+ array itself based on special symbols created by the static
+ linker. However, we do need to arrange to set up
+ exception-handling here. */
+# define CTOR_LIST_BEGIN asm (ARM_EABI_CTORS_SECTION_OP)
+# define CTOR_LIST_END /* empty */
+# define DTOR_LIST_BEGIN asm (ARM_EABI_DTORS_SECTION_OP)
+# define DTOR_LIST_END /* empty */
+# else /* !defined (__ARM_EABI__) */
+# define CTORS_SECTION_ASM_OP ARM_CTORS_SECTION_OP
+# define DTORS_SECTION_ASM_OP ARM_DTORS_SECTION_OP
+# endif /* !defined (__ARM_EABI__) */
+#endif /* !defined (IN_LIBCC2) */
+
+/* True if the operating system can merge entities with vague linkage
+ (e.g., symbols in COMDAT group) during dynamic linking. */
+#ifndef TARGET_ARM_DYNAMIC_VAGUE_LINKAGE_P
+#define TARGET_ARM_DYNAMIC_VAGUE_LINKAGE_P true
+#endif
+
+#define ARM_OUTPUT_FN_UNWIND(F, PROLOGUE) arm_output_fn_unwind (F, PROLOGUE)
+
+#ifdef TARGET_UNWIND_INFO
+#define ARM_EABI_UNWIND_TABLES \
+ ((!USING_SJLJ_EXCEPTIONS && flag_exceptions) || flag_unwind_tables)
+#else
+#define ARM_EABI_UNWIND_TABLES 0
+#endif
+
+/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
+ and check its validity for a certain class.
+ We have two alternate definitions for each of them.
+ The usual definition accepts all pseudo regs; the other rejects
+ them unless they have been allocated suitable hard regs.
+ The symbol REG_OK_STRICT causes the latter definition to be used.
+ Thumb-2 has the same restrictions as arm. */
+#ifndef REG_OK_STRICT
+
+#define ARM_REG_OK_FOR_BASE_P(X) \
+ (REGNO (X) <= LAST_ARM_REGNUM \
+ || REGNO (X) >= FIRST_PSEUDO_REGISTER \
+ || REGNO (X) == FRAME_POINTER_REGNUM \
+ || REGNO (X) == ARG_POINTER_REGNUM)
+
+#define ARM_REG_OK_FOR_INDEX_P(X) \
+ ((REGNO (X) <= LAST_ARM_REGNUM \
+ && REGNO (X) != STACK_POINTER_REGNUM) \
+ || REGNO (X) >= FIRST_PSEUDO_REGISTER \
+ || REGNO (X) == FRAME_POINTER_REGNUM \
+ || REGNO (X) == ARG_POINTER_REGNUM)
+
+#define THUMB1_REG_MODE_OK_FOR_BASE_P(X, MODE) \
+ (REGNO (X) <= LAST_LO_REGNUM \
+ || REGNO (X) >= FIRST_PSEUDO_REGISTER \
+ || (GET_MODE_SIZE (MODE) >= 4 \
+ && (REGNO (X) == STACK_POINTER_REGNUM \
+ || (X) == hard_frame_pointer_rtx \
+ || (X) == arg_pointer_rtx)))
+
+#define REG_STRICT_P 0
+
+#else /* REG_OK_STRICT */
+
+#define ARM_REG_OK_FOR_BASE_P(X) \
+ ARM_REGNO_OK_FOR_BASE_P (REGNO (X))
+
+#define ARM_REG_OK_FOR_INDEX_P(X) \
+ ARM_REGNO_OK_FOR_INDEX_P (REGNO (X))
+
+#define THUMB1_REG_MODE_OK_FOR_BASE_P(X, MODE) \
+ THUMB1_REGNO_MODE_OK_FOR_BASE_P (REGNO (X), MODE)
+
+#define REG_STRICT_P 1
+
+#endif /* REG_OK_STRICT */
+
+/* Now define some helpers in terms of the above. */
+
+#define REG_MODE_OK_FOR_BASE_P(X, MODE) \
+ (TARGET_THUMB1 \
+ ? THUMB1_REG_MODE_OK_FOR_BASE_P (X, MODE) \
+ : ARM_REG_OK_FOR_BASE_P (X))
+
+/* For 16-bit Thumb, a valid index register is anything that can be used in
+ a byte load instruction. */
+#define THUMB1_REG_OK_FOR_INDEX_P(X) \
+ THUMB1_REG_MODE_OK_FOR_BASE_P (X, QImode)
+
+/* Nonzero if X is a hard reg that can be used as an index
+ or if it is a pseudo reg. On the Thumb, the stack pointer
+ is not suitable. */
+#define REG_OK_FOR_INDEX_P(X) \
+ (TARGET_THUMB1 \
+ ? THUMB1_REG_OK_FOR_INDEX_P (X) \
+ : ARM_REG_OK_FOR_INDEX_P (X))
+
+/* Nonzero if X can be the base register in a reg+reg addressing mode.
+ For Thumb, we can not use SP + reg, so reject SP. */
+#define REG_MODE_OK_FOR_REG_BASE_P(X, MODE) \
+ REG_OK_FOR_INDEX_P (X)
+
+/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
+ that is a valid memory address for an instruction.
+ The MODE argument is the machine mode for the MEM expression
+ that wants to use this address. */
+
+#define ARM_BASE_REGISTER_RTX_P(X) \
+ (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))
+
+#define ARM_INDEX_REGISTER_RTX_P(X) \
+ (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))
+
+#define ARM_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \
+ { \
+ if (arm_legitimate_address_p (MODE, X, SET, REG_STRICT_P)) \
+ goto WIN; \
+ }
+
+#define THUMB2_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \
+ { \
+ if (thumb2_legitimate_address_p (MODE, X, REG_STRICT_P)) \
+ goto WIN; \
+ }
+
+#define THUMB1_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \
+ { \
+ if (thumb1_legitimate_address_p (MODE, X, REG_STRICT_P)) \
+ goto WIN; \
+ }
+
+#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
+ if (TARGET_ARM) \
+ ARM_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) \
+ else if (TARGET_THUMB2) \
+ THUMB2_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) \
+ else /* if (TARGET_THUMB1) */ \
+ THUMB1_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN)
+
+
+/* Try machine-dependent ways of modifying an illegitimate address
+ to be legitimate. If we find one, return the new, valid address. */
+#define ARM_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
+do { \
+ X = arm_legitimize_address (X, OLDX, MODE); \
+} while (0)
+
+/* ??? Implement LEGITIMIZE_ADDRESS for thumb2. */
+#define THUMB2_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
+do { \
+} while (0)
+
+#define THUMB1_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
+do { \
+ X = thumb_legitimize_address (X, OLDX, MODE); \
+} while (0)
+
+#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
+do { \
+ if (TARGET_ARM) \
+ ARM_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN); \
+ else if (TARGET_THUMB2) \
+ THUMB2_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN); \
+ else \
+ THUMB1_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN); \
+ \
+ if (memory_address_p (MODE, X)) \
+ goto WIN; \
+} while (0)
+
+/* Go to LABEL if ADDR (a legitimate address expression)
+ has an effect that depends on the machine mode it is used for. */
+#define ARM_GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
+{ \
+ if ( GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC \
+ || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC) \
+ goto LABEL; \
+}
+
+/* Nothing helpful to do for the Thumb */
+#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
+ if (TARGET_32BIT) \
+ ARM_GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL)
+
+/* Define this for compatibility reasons. */
+#define HANDLE_PRAGMA_PACK_PUSH_POP
+
+/* Specify the machine mode that this machine uses
+ for the index in the tablejump instruction. */
+#define CASE_VECTOR_MODE Pmode
+
+#define CASE_VECTOR_PC_RELATIVE TARGET_THUMB2
+
+#define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
+ ((min < 0 || max >= 0x2000 || !TARGET_THUMB2) ? SImode \
+ : (max >= 0x200) ? HImode \
+ : QImode)
+
+/* signed 'char' is most compatible, but RISC OS wants it unsigned.
+ unsigned is probably best, but may break some code. */
+#ifndef DEFAULT_SIGNED_CHAR
+#define DEFAULT_SIGNED_CHAR 0
+#endif
+
+/* Max number of bytes we can move from memory to memory
+ in one reasonably fast instruction. */
+#define MOVE_MAX 4
+
+#undef MOVE_RATIO
+#define MOVE_RATIO(speed) (arm_tune_xscale ? 4 : 2)
+
+/* Define if operations between registers always perform the operation
+ on the full register even if a narrower mode is specified. */
+#define WORD_REGISTER_OPERATIONS
+
+/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
+ will either zero-extend or sign-extend. The value of this macro should
+ be the code that says which one of the two operations is implicitly
+ done, UNKNOWN if none. */
+#define LOAD_EXTEND_OP(MODE) \
+ (TARGET_THUMB ? ZERO_EXTEND : \
+ ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND \
+ : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN)))
+
+/* Nonzero if access to memory by bytes is slow and undesirable. */
+#define SLOW_BYTE_ACCESS 0
+
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
+
+/* Immediate shift counts are truncated by the output routines (or was it
+ the assembler?). Shift counts in a register are truncated by ARM. Note
+ that the native compiler puts too large (> 32) immediate shift counts
+ into a register and shifts by the register, letting the ARM decide what
+ to do instead of doing that itself. */
+/* This is all wrong. Defining SHIFT_COUNT_TRUNCATED tells combine that
+ code like (X << (Y % 32)) for register X, Y is equivalent to (X << Y).
+ On the arm, Y in a register is used modulo 256 for the shift. Only for
+ rotates is modulo 32 used. */
+/* #define SHIFT_COUNT_TRUNCATED 1 */
+
+/* All integers have the same format so truncation is easy. */
+#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
+
+/* Calling from registers is a massive pain. */
+#define NO_FUNCTION_CSE 1
+
+/* The machine modes of pointers and functions */
+#define Pmode SImode
+#define FUNCTION_MODE Pmode
+
+#define ARM_FRAME_RTX(X) \
+ ( (X) == frame_pointer_rtx || (X) == stack_pointer_rtx \
+ || (X) == arg_pointer_rtx)
+
+/* Moves to and from memory are quite expensive */
+#define MEMORY_MOVE_COST(M, CLASS, IN) \
+ (TARGET_32BIT ? 10 : \
+ ((GET_MODE_SIZE (M) < 4 ? 8 : 2 * GET_MODE_SIZE (M)) \
+ * (CLASS == LO_REGS ? 1 : 2)))
+
+/* Try to generate sequences that don't involve branches, we can then use
+ conditional instructions */
+#define BRANCH_COST(speed_p, predictable_p) \
+ (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0))
+
+/* Position Independent Code. */
+/* We decide which register to use based on the compilation options and
+ the assembler in use; this is more general than the APCS restriction of
+ using sb (r9) all the time. */
+extern unsigned arm_pic_register;
+
+/* The register number of the register used to address a table of static
+ data addresses in memory. */
+#define PIC_OFFSET_TABLE_REGNUM arm_pic_register
+
+/* We can't directly access anything that contains a symbol,
+ nor can we indirect via the constant pool. One exception is
+ UNSPEC_TLS, which is always PIC. */
+#define LEGITIMATE_PIC_OPERAND_P(X) \
+ (!(symbol_mentioned_p (X) \
+ || label_mentioned_p (X) \
+ || (GET_CODE (X) == SYMBOL_REF \
+ && CONSTANT_POOL_ADDRESS_P (X) \
+ && (symbol_mentioned_p (get_pool_constant (X)) \
+ || label_mentioned_p (get_pool_constant (X))))) \
+ || tls_mentioned_p (X))
+
+/* We need to know when we are making a constant pool; this determines
+ whether data needs to be in the GOT or can be referenced via a GOT
+ offset. */
+extern int making_const_table;
+
+/* Handle pragmas for compatibility with Intel's compilers. */
+/* Also abuse this to register additional C specific EABI attributes. */
+#define REGISTER_TARGET_PRAGMAS() do { \
+ c_register_pragma (0, "long_calls", arm_pr_long_calls); \
+ c_register_pragma (0, "no_long_calls", arm_pr_no_long_calls); \
+ c_register_pragma (0, "long_calls_off", arm_pr_long_calls_off); \
+ arm_lang_object_attributes_init(); \
+} while (0)
+
+/* Condition code information. */
+/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
+ return the mode to be used for the comparison. */
+
+#define SELECT_CC_MODE(OP, X, Y) arm_select_cc_mode (OP, X, Y)
+
+#define REVERSIBLE_CC_MODE(MODE) 1
+
+#define REVERSE_CONDITION(CODE,MODE) \
+ (((MODE) == CCFPmode || (MODE) == CCFPEmode) \
+ ? reverse_condition_maybe_unordered (code) \
+ : reverse_condition (code))
+
+#define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
+ do \
+ { \
+ if (GET_CODE (OP1) == CONST_INT \
+ && ! (const_ok_for_arm (INTVAL (OP1)) \
+ || (const_ok_for_arm (- INTVAL (OP1))))) \
+ { \
+ rtx const_op = OP1; \
+ CODE = arm_canonicalize_comparison ((CODE), GET_MODE (OP0), \
+ &const_op); \
+ OP1 = const_op; \
+ } \
+ } \
+ while (0)
+
+/* The arm5 clz instruction returns 32. */
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
+
+#undef ASM_APP_OFF
+#define ASM_APP_OFF (TARGET_THUMB1 ? "\t.code\t16\n" : \
+ TARGET_THUMB2 ? "\t.thumb\n" : "")
+
+/* Output a push or a pop instruction (only used when profiling). */
+#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
+ do \
+ { \
+ if (TARGET_ARM) \
+ asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n", \
+ STACK_POINTER_REGNUM, REGNO); \
+ else \
+ asm_fprintf (STREAM, "\tpush {%r}\n", REGNO); \
+ } while (0)
+
+
+#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
+ do \
+ { \
+ if (TARGET_ARM) \
+ asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n", \
+ STACK_POINTER_REGNUM, REGNO); \
+ else \
+ asm_fprintf (STREAM, "\tpop {%r}\n", REGNO); \
+ } while (0)
+
+/* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
+#define ADDR_VEC_ALIGN(JUMPTABLE) 0
+
+/* This is how to output a label which precedes a jumptable. Since
+ Thumb instructions are 2 bytes, we may need explicit alignment here. */
+#undef ASM_OUTPUT_CASE_LABEL
+#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
+ do \
+ { \
+ if (TARGET_THUMB && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \
+ ASM_OUTPUT_ALIGN (FILE, 2); \
+ (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
+ } \
+ while (0)
+
+/* Make sure subsequent insns are aligned after a TBB. */
+#define ASM_OUTPUT_CASE_END(FILE, NUM, JUMPTABLE) \
+ do \
+ { \
+ if (GET_MODE (PATTERN (JUMPTABLE)) == QImode) \
+ ASM_OUTPUT_ALIGN (FILE, 1); \
+ } \
+ while (0)
+
+#define ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
+ do \
+ { \
+ if (TARGET_THUMB) \
+ { \
+ if (is_called_in_ARM_mode (DECL) \
+ || (TARGET_THUMB1 && !TARGET_THUMB1_ONLY \
+ && cfun->is_thunk)) \
+ fprintf (STREAM, "\t.code 32\n") ; \
+ else if (TARGET_THUMB1) \
+ fprintf (STREAM, "\t.code\t16\n\t.thumb_func\n") ; \
+ else \
+ fprintf (STREAM, "\t.thumb\n\t.thumb_func\n") ; \
+ } \
+ if (TARGET_POKE_FUNCTION_NAME) \
+ arm_poke_function_name (STREAM, (const char *) NAME); \
+ } \
+ while (0)
+
+/* For aliases of functions we use .thumb_set instead. */
+#define ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL1, DECL2) \
+ do \
+ { \
+ const char *const LABEL1 = XSTR (XEXP (DECL_RTL (decl), 0), 0); \
+ const char *const LABEL2 = IDENTIFIER_POINTER (DECL2); \
+ \
+ if (TARGET_THUMB && TREE_CODE (DECL1) == FUNCTION_DECL) \
+ { \
+ fprintf (FILE, "\t.thumb_set "); \
+ assemble_name (FILE, LABEL1); \
+ fprintf (FILE, ","); \
+ assemble_name (FILE, LABEL2); \
+ fprintf (FILE, "\n"); \
+ } \
+ else \
+ ASM_OUTPUT_DEF (FILE, LABEL1, LABEL2); \
+ } \
+ while (0)
+
+#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN
+/* To support -falign-* switches we need to use .p2align so
+ that alignment directives in code sections will be padded
+ with no-op instructions, rather than zeroes. */
+#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \
+ if ((LOG) != 0) \
+ { \
+ if ((MAX_SKIP) == 0) \
+ fprintf ((FILE), "\t.p2align %d\n", (int) (LOG)); \
+ else \
+ fprintf ((FILE), "\t.p2align %d,,%d\n", \
+ (int) (LOG), (int) (MAX_SKIP)); \
+ }
+#endif
+
+/* Add two bytes to the length of conditionally executed Thumb-2
+ instructions for the IT instruction. */
+#define ADJUST_INSN_LENGTH(insn, length) \
+ if (TARGET_THUMB2 && GET_CODE (PATTERN (insn)) == COND_EXEC) \
+ length += 2;
+
+/* Only perform branch elimination (by making instructions conditional) if
+ we're optimizing. For Thumb-2 check if any IT instructions need
+ outputting. */
+#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
+ if (TARGET_ARM && optimize) \
+ arm_final_prescan_insn (INSN); \
+ else if (TARGET_THUMB2) \
+ thumb2_final_prescan_insn (INSN); \
+ else if (TARGET_THUMB1) \
+ thumb1_final_prescan_insn (INSN)
+
+#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
+ (CODE == '@' || CODE == '|' || CODE == '.' \
+ || CODE == '(' || CODE == ')' || CODE == '#' \
+ || (TARGET_32BIT && (CODE == '?')) \
+ || (TARGET_THUMB2 && (CODE == '!')) \
+ || (TARGET_THUMB && (CODE == '_')))
+
+/* Output an operand of an instruction. */
+#define PRINT_OPERAND(STREAM, X, CODE) \
+ arm_print_operand (STREAM, X, CODE)
+
+#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \
+ (HOST_BITS_PER_WIDE_INT <= 32 ? (unsigned HOST_WIDE_INT) (x) \
+ : ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0xffffffff) |\
+ ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0x80000000) \
+ ? ((~ (unsigned HOST_WIDE_INT) 0) \
+ & ~ (unsigned HOST_WIDE_INT) 0xffffffff) \
+ : 0))))
+
+/* Output the address of an operand. */
+#define ARM_PRINT_OPERAND_ADDRESS(STREAM, X) \
+{ \
+ int is_minus = GET_CODE (X) == MINUS; \
+ \
+ if (GET_CODE (X) == REG) \
+ asm_fprintf (STREAM, "[%r, #0]", REGNO (X)); \
+ else if (GET_CODE (X) == PLUS || is_minus) \
+ { \
+ rtx base = XEXP (X, 0); \
+ rtx index = XEXP (X, 1); \
+ HOST_WIDE_INT offset = 0; \
+ if (GET_CODE (base) != REG \
+ || (GET_CODE (index) == REG && REGNO (index) == SP_REGNUM)) \
+ { \
+ /* Ensure that BASE is a register. */ \
+ /* (one of them must be). */ \
+ /* Also ensure the SP is not used as in index register. */ \
+ rtx temp = base; \
+ base = index; \
+ index = temp; \
+ } \
+ switch (GET_CODE (index)) \
+ { \
+ case CONST_INT: \
+ offset = INTVAL (index); \
+ if (is_minus) \
+ offset = -offset; \
+ asm_fprintf (STREAM, "[%r, #%wd]", \
+ REGNO (base), offset); \
+ break; \
+ \
+ case REG: \
+ asm_fprintf (STREAM, "[%r, %s%r]", \
+ REGNO (base), is_minus ? "-" : "", \
+ REGNO (index)); \
+ break; \
+ \
+ case MULT: \
+ case ASHIFTRT: \
+ case LSHIFTRT: \
+ case ASHIFT: \
+ case ROTATERT: \
+ { \
+ asm_fprintf (STREAM, "[%r, %s%r", \
+ REGNO (base), is_minus ? "-" : "", \
+ REGNO (XEXP (index, 0))); \
+ arm_print_operand (STREAM, index, 'S'); \
+ fputs ("]", STREAM); \
+ break; \
+ } \
+ \
+ default: \
+ gcc_unreachable (); \
+ } \
+ } \
+ else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
+ || GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC) \
+ { \
+ extern enum machine_mode output_memory_reference_mode; \
+ \
+ gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
+ \
+ if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
+ asm_fprintf (STREAM, "[%r, #%s%d]!", \
+ REGNO (XEXP (X, 0)), \
+ GET_CODE (X) == PRE_DEC ? "-" : "", \
+ GET_MODE_SIZE (output_memory_reference_mode)); \
+ else \
+ asm_fprintf (STREAM, "[%r], #%s%d", \
+ REGNO (XEXP (X, 0)), \
+ GET_CODE (X) == POST_DEC ? "-" : "", \
+ GET_MODE_SIZE (output_memory_reference_mode)); \
+ } \
+ else if (GET_CODE (X) == PRE_MODIFY) \
+ { \
+ asm_fprintf (STREAM, "[%r, ", REGNO (XEXP (X, 0))); \
+ if (GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT) \
+ asm_fprintf (STREAM, "#%wd]!", \
+ INTVAL (XEXP (XEXP (X, 1), 1))); \
+ else \
+ asm_fprintf (STREAM, "%r]!", \
+ REGNO (XEXP (XEXP (X, 1), 1))); \
+ } \
+ else if (GET_CODE (X) == POST_MODIFY) \
+ { \
+ asm_fprintf (STREAM, "[%r], ", REGNO (XEXP (X, 0))); \
+ if (GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT) \
+ asm_fprintf (STREAM, "#%wd", \
+ INTVAL (XEXP (XEXP (X, 1), 1))); \
+ else \
+ asm_fprintf (STREAM, "%r", \
+ REGNO (XEXP (XEXP (X, 1), 1))); \
+ } \
+ else output_addr_const (STREAM, X); \
+}
+
+#define THUMB_PRINT_OPERAND_ADDRESS(STREAM, X) \
+{ \
+ if (GET_CODE (X) == REG) \
+ asm_fprintf (STREAM, "[%r]", REGNO (X)); \
+ else if (GET_CODE (X) == POST_INC) \
+ asm_fprintf (STREAM, "%r!", REGNO (XEXP (X, 0))); \
+ else if (GET_CODE (X) == PLUS) \
+ { \
+ gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
+ if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
+ asm_fprintf (STREAM, "[%r, #%wd]", \
+ REGNO (XEXP (X, 0)), \
+ INTVAL (XEXP (X, 1))); \
+ else \
+ asm_fprintf (STREAM, "[%r, %r]", \
+ REGNO (XEXP (X, 0)), \
+ REGNO (XEXP (X, 1))); \
+ } \
+ else \
+ output_addr_const (STREAM, X); \
+}
+
+#define PRINT_OPERAND_ADDRESS(STREAM, X) \
+ if (TARGET_32BIT) \
+ ARM_PRINT_OPERAND_ADDRESS (STREAM, X) \
+ else \
+ THUMB_PRINT_OPERAND_ADDRESS (STREAM, X)
+
+#define OUTPUT_ADDR_CONST_EXTRA(file, x, fail) \
+ if (arm_output_addr_const_extra (file, x) == FALSE) \
+ goto fail
+
+/* A C expression whose value is RTL representing the value of the return
+ address for the frame COUNT steps up from the current frame. */
+
+#define RETURN_ADDR_RTX(COUNT, FRAME) \
+ arm_return_addr (COUNT, FRAME)
+
+/* Mask of the bits in the PC that contain the real return address
+ when running in 26-bit mode. */
+#define RETURN_ADDR_MASK26 (0x03fffffc)
+
+/* Pick up the return address upon entry to a procedure. Used for
+ dwarf2 unwind information. This also enables the table driven
+ mechanism. */
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM)
+
+/* Used to mask out junk bits from the return address, such as
+ processor state, interrupt status, condition codes and the like. */
+#define MASK_RETURN_ADDR \
+ /* If we are generating code for an ARM2/ARM3 machine or for an ARM6 \
+ in 26 bit mode, the condition codes must be masked out of the \
+ return address. This does not apply to ARM6 and later processors \
+ when running in 32 bit mode. */ \
+ ((arm_arch4 || TARGET_THUMB) \
+ ? (gen_int_mode ((unsigned long)0xffffffff, Pmode)) \
+ : arm_gen_return_addr_mask ())
+
+
+/* Neon defines builtins from ARM_BUILTIN_MAX upwards, though they don't have
+ symbolic names defined here (which would require too much duplication).
+ FIXME? */
+enum arm_builtins
+{
+ ARM_BUILTIN_GETWCX,
+ ARM_BUILTIN_SETWCX,
+
+ ARM_BUILTIN_WZERO,
+
+ ARM_BUILTIN_WAVG2BR,
+ ARM_BUILTIN_WAVG2HR,
+ ARM_BUILTIN_WAVG2B,
+ ARM_BUILTIN_WAVG2H,
+
+ ARM_BUILTIN_WACCB,
+ ARM_BUILTIN_WACCH,
+ ARM_BUILTIN_WACCW,
+
+ ARM_BUILTIN_WMACS,
+ ARM_BUILTIN_WMACSZ,
+ ARM_BUILTIN_WMACU,
+ ARM_BUILTIN_WMACUZ,
+
+ ARM_BUILTIN_WSADB,
+ ARM_BUILTIN_WSADBZ,
+ ARM_BUILTIN_WSADH,
+ ARM_BUILTIN_WSADHZ,
+
+ ARM_BUILTIN_WALIGN,
+
+ ARM_BUILTIN_TMIA,
+ ARM_BUILTIN_TMIAPH,
+ ARM_BUILTIN_TMIABB,
+ ARM_BUILTIN_TMIABT,
+ ARM_BUILTIN_TMIATB,
+ ARM_BUILTIN_TMIATT,
+
+ ARM_BUILTIN_TMOVMSKB,
+ ARM_BUILTIN_TMOVMSKH,
+ ARM_BUILTIN_TMOVMSKW,
+
+ ARM_BUILTIN_TBCSTB,
+ ARM_BUILTIN_TBCSTH,
+ ARM_BUILTIN_TBCSTW,
+
+ ARM_BUILTIN_WMADDS,
+ ARM_BUILTIN_WMADDU,
+
+ ARM_BUILTIN_WPACKHSS,
+ ARM_BUILTIN_WPACKWSS,
+ ARM_BUILTIN_WPACKDSS,
+ ARM_BUILTIN_WPACKHUS,
+ ARM_BUILTIN_WPACKWUS,
+ ARM_BUILTIN_WPACKDUS,
+
+ ARM_BUILTIN_WADDB,
+ ARM_BUILTIN_WADDH,
+ ARM_BUILTIN_WADDW,
+ ARM_BUILTIN_WADDSSB,
+ ARM_BUILTIN_WADDSSH,
+ ARM_BUILTIN_WADDSSW,
+ ARM_BUILTIN_WADDUSB,
+ ARM_BUILTIN_WADDUSH,
+ ARM_BUILTIN_WADDUSW,
+ ARM_BUILTIN_WSUBB,
+ ARM_BUILTIN_WSUBH,
+ ARM_BUILTIN_WSUBW,
+ ARM_BUILTIN_WSUBSSB,
+ ARM_BUILTIN_WSUBSSH,
+ ARM_BUILTIN_WSUBSSW,
+ ARM_BUILTIN_WSUBUSB,
+ ARM_BUILTIN_WSUBUSH,
+ ARM_BUILTIN_WSUBUSW,
+
+ ARM_BUILTIN_WAND,
+ ARM_BUILTIN_WANDN,
+ ARM_BUILTIN_WOR,
+ ARM_BUILTIN_WXOR,
+
+ ARM_BUILTIN_WCMPEQB,
+ ARM_BUILTIN_WCMPEQH,
+ ARM_BUILTIN_WCMPEQW,
+ ARM_BUILTIN_WCMPGTUB,
+ ARM_BUILTIN_WCMPGTUH,
+ ARM_BUILTIN_WCMPGTUW,
+ ARM_BUILTIN_WCMPGTSB,
+ ARM_BUILTIN_WCMPGTSH,
+ ARM_BUILTIN_WCMPGTSW,
+
+ ARM_BUILTIN_TEXTRMSB,
+ ARM_BUILTIN_TEXTRMSH,
+ ARM_BUILTIN_TEXTRMSW,
+ ARM_BUILTIN_TEXTRMUB,
+ ARM_BUILTIN_TEXTRMUH,
+ ARM_BUILTIN_TEXTRMUW,
+ ARM_BUILTIN_TINSRB,
+ ARM_BUILTIN_TINSRH,
+ ARM_BUILTIN_TINSRW,
+
+ ARM_BUILTIN_WMAXSW,
+ ARM_BUILTIN_WMAXSH,
+ ARM_BUILTIN_WMAXSB,
+ ARM_BUILTIN_WMAXUW,
+ ARM_BUILTIN_WMAXUH,
+ ARM_BUILTIN_WMAXUB,
+ ARM_BUILTIN_WMINSW,
+ ARM_BUILTIN_WMINSH,
+ ARM_BUILTIN_WMINSB,
+ ARM_BUILTIN_WMINUW,
+ ARM_BUILTIN_WMINUH,
+ ARM_BUILTIN_WMINUB,
+
+ ARM_BUILTIN_WMULUM,
+ ARM_BUILTIN_WMULSM,
+ ARM_BUILTIN_WMULUL,
+
+ ARM_BUILTIN_PSADBH,
+ ARM_BUILTIN_WSHUFH,
+
+ ARM_BUILTIN_WSLLH,
+ ARM_BUILTIN_WSLLW,
+ ARM_BUILTIN_WSLLD,
+ ARM_BUILTIN_WSRAH,
+ ARM_BUILTIN_WSRAW,
+ ARM_BUILTIN_WSRAD,
+ ARM_BUILTIN_WSRLH,
+ ARM_BUILTIN_WSRLW,
+ ARM_BUILTIN_WSRLD,
+ ARM_BUILTIN_WRORH,
+ ARM_BUILTIN_WRORW,
+ ARM_BUILTIN_WRORD,
+ ARM_BUILTIN_WSLLHI,
+ ARM_BUILTIN_WSLLWI,
+ ARM_BUILTIN_WSLLDI,
+ ARM_BUILTIN_WSRAHI,
+ ARM_BUILTIN_WSRAWI,
+ ARM_BUILTIN_WSRADI,
+ ARM_BUILTIN_WSRLHI,
+ ARM_BUILTIN_WSRLWI,
+ ARM_BUILTIN_WSRLDI,
+ ARM_BUILTIN_WRORHI,
+ ARM_BUILTIN_WRORWI,
+ ARM_BUILTIN_WRORDI,
+
+ ARM_BUILTIN_WUNPCKIHB,
+ ARM_BUILTIN_WUNPCKIHH,
+ ARM_BUILTIN_WUNPCKIHW,
+ ARM_BUILTIN_WUNPCKILB,
+ ARM_BUILTIN_WUNPCKILH,
+ ARM_BUILTIN_WUNPCKILW,
+
+ ARM_BUILTIN_WUNPCKEHSB,
+ ARM_BUILTIN_WUNPCKEHSH,
+ ARM_BUILTIN_WUNPCKEHSW,
+ ARM_BUILTIN_WUNPCKEHUB,
+ ARM_BUILTIN_WUNPCKEHUH,
+ ARM_BUILTIN_WUNPCKEHUW,
+ ARM_BUILTIN_WUNPCKELSB,
+ ARM_BUILTIN_WUNPCKELSH,
+ ARM_BUILTIN_WUNPCKELSW,
+ ARM_BUILTIN_WUNPCKELUB,
+ ARM_BUILTIN_WUNPCKELUH,
+ ARM_BUILTIN_WUNPCKELUW,
+
+ ARM_BUILTIN_THREAD_POINTER,
+
+ ARM_BUILTIN_NEON_BASE,
+
+ ARM_BUILTIN_MAX = ARM_BUILTIN_NEON_BASE /* FIXME: Wrong! */
+};
+
+/* Do emit .note.GNU-stack by default. */
+#ifndef NEED_INDICATE_EXEC_STACK
+#define NEED_INDICATE_EXEC_STACK 1
+#endif
+
+#endif /* ! GCC_ARM_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/bpabi.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/bpabi.h
new file mode 100644
index 0000000..4b37dcf
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/bpabi.h
@@ -0,0 +1,178 @@
+/* Configuration file for ARM BPABI targets.
+ Copyright (C) 2004, 2005, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by CodeSourcery, LLC
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* Use the AAPCS ABI by default. */
+#define ARM_DEFAULT_ABI ARM_ABI_AAPCS
+
+/* Assume that AAPCS ABIs should adhere to the full BPABI. */
+#define TARGET_BPABI (TARGET_AAPCS_BASED)
+
+/* BPABI targets use EABI frame unwinding tables. */
+#define TARGET_UNWIND_INFO 1
+
+/* Section 4.1 of the AAPCS requires the use of VFP format. */
+#undef FPUTYPE_DEFAULT
+#define FPUTYPE_DEFAULT FPUTYPE_VFP
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_ENDIAN_DEFAULT MASK_BIG_END
+#else
+#define TARGET_ENDIAN_DEFAULT 0
+#endif
+
+/* EABI targets should enable interworking by default. */
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
+
+/* The ARM BPABI functions return a boolean; they use no special
+ calling convention. */
+#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) TARGET_BPABI
+
+/* The BPABI integer comparison routines return { -1, 0, 1 }. */
+#define TARGET_LIB_INT_CMP_BIASED !TARGET_BPABI
+
+#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*|march=armv4:--fix-v4bx}"
+
+/* Tell the assembler to build BPABI binaries. */
+#undef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+
+#ifndef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC ""
+#endif
+
+/* The generic link spec in elf.h does not support shared libraries. */
+#define BPABI_LINK_SPEC \
+ "%{mbig-endian:-EB} %{mlittle-endian:-EL} " \
+ "%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic} " \
+ "-X" SUBTARGET_EXTRA_LINK_SPEC TARGET_FIX_V4BX_SPEC
+
+#undef LINK_SPEC
+#define LINK_SPEC BPABI_LINK_SPEC
+
+#if defined (__thumb__)
+#define RENAME_LIBRARY_SET ".thumb_set"
+#else
+#define RENAME_LIBRARY_SET ".set"
+#endif
+
+/* Make __aeabi_AEABI_NAME an alias for __GCC_NAME. */
+#define RENAME_LIBRARY(GCC_NAME, AEABI_NAME) \
+ __asm__ (".globl\t__aeabi_" #AEABI_NAME "\n" \
+ RENAME_LIBRARY_SET "\t__aeabi_" #AEABI_NAME \
+ ", __" #GCC_NAME "\n");
+
+/* Give some libgcc functions an additional __aeabi name. */
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, lmul)
+#endif
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, lmul)
+#endif
+#ifdef L_fixdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, d2lz) \
+ extern DWtype __fixdfdi (DFtype) __attribute__((pcs("aapcs"))); \
+ extern UDWtype __fixunsdfdi (DFtype) __asm__("__aeabi_d2ulz") __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixunsdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, d2ulz) \
+ extern UDWtype __fixunsdfdi (DFtype) __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixsfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, f2lz) \
+ extern DWtype __fixsfdi (SFtype) __attribute__((pcs("aapcs"))); \
+ extern UDWtype __fixunssfdi (SFtype) __asm__("__aeabi_f2ulz") __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixunssfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, f2ulz) \
+ extern UDWtype __fixunssfdi (SFtype) __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_floatdidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdidf, l2d)
+#endif
+#ifdef L_floatdisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, l2f)
+#endif
+
+/* These renames are needed on ARMv6M. Other targets get them from
+ assembly routines. */
+#ifdef L_fixunsdfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfsi, d2uiz)
+#endif
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfsi, f2uiz)
+#endif
+#ifdef L_floatundidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundidf, ul2d)
+#endif
+#ifdef L_floatundisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundisf, ul2f)
+#endif
+
+/* The BPABI requires that we always use an out-of-line implementation
+ of RTTI comparison, even if the target supports weak symbols,
+ because the same object file might be used on a target that does
+ not support merging symbols across DLL boundaries. This macro is
+ broken out separately so that it can be used within
+ TARGET_OS_CPP_BUILTINS in configuration files for systems based on
+ the BPABI. */
+#define TARGET_BPABI_CPP_BUILTINS() \
+ do \
+ { \
+ builtin_define ("__GXX_TYPEINFO_EQUALITY_INLINE=0"); \
+ } \
+ while (false)
+
+#undef TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS() \
+ TARGET_BPABI_CPP_BUILTINS()
+
+/* The BPABI specifies the use of .{init,fini}_array. Therefore, we
+ do not want GCC to put anything into the .{init,fini} sections. */
+#undef INIT_SECTION_ASM_OP
+#undef FINI_SECTION_ASM_OP
+#define INIT_ARRAY_SECTION_ASM_OP ARM_EABI_CTORS_SECTION_OP
+#define FINI_ARRAY_SECTION_ASM_OP ARM_EABI_DTORS_SECTION_OP
+
+/* The legacy _mcount implementation assumes r11 points to a
+ 4-word APCS frame. This is generally not true for EABI targets,
+ particularly not in Thumb mode. We assume the mcount
+ implementation does not require a counter variable (No Counter).
+ Note that __gnu_mcount_nc will be entered with a misaligned stack.
+ This is OK because it uses a special calling convention anyway. */
+
+#undef NO_PROFILE_COUNTERS
+#define NO_PROFILE_COUNTERS 1
+#undef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
+{ \
+ fprintf (STREAM, "\tpush\t{lr}\n"); \
+ fprintf (STREAM, "\tbl\t__gnu_mcount_nc\n"); \
+}
+
+#undef SUBTARGET_FRAME_POINTER_REQUIRED
+#define SUBTARGET_FRAME_POINTER_REQUIRED 0
+
+/* __gnu_mcount_nc restores the original LR value before returning. Ensure
+ that there is no unnecessary hook set up. */
+#undef PROFILE_HOOK
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/elf.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/elf.h
new file mode 100644
index 0000000..7c3eddb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/elf.h
@@ -0,0 +1,165 @@
+/* Definitions of target machine for GNU compiler.
+ For ARM with ELF obj format.
+ Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2004, 2005, 2007,
+ 2008 Free Software Foundation, Inc.
+ Contributed by Philip Blundell <philb@gnu.org> and
+ Catherine Moore <clm@cygnus.com>
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef OBJECT_FORMAT_ELF
+ #error elf.h included before elfos.h
+#endif
+
+#ifndef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+#endif
+
+#ifndef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "-D__ELF__"
+#endif
+
+#ifndef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
+ { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
+ { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
+ SUBSUBTARGET_EXTRA_SPECS
+#endif
+
+#ifndef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC ""
+#endif
+
+#ifndef SUBTARGET_ASM_FLOAT_SPEC
+#define SUBTARGET_ASM_FLOAT_SPEC "\
+%{mapcs-float:-mfloat}"
+#endif
+
+#undef SUBSUBTARGET_EXTRA_SPECS
+#define SUBSUBTARGET_EXTRA_SPECS
+
+#ifndef ASM_SPEC
+#define ASM_SPEC "\
+%{mbig-endian:-EB} \
+%{mlittle-endian:-EL} \
+%{mcpu=*:-mcpu=%*} \
+%{march=*:-march=%*} \
+%{mapcs-*:-mapcs-%*} \
+%(subtarget_asm_float_spec) \
+%{mthumb-interwork:-mthumb-interwork} \
+%{msoft-float:-mfloat-abi=soft} %{mhard-float:-mfloat-abi=hard} \
+%{mfloat-abi=*} %{mfpu=*} \
+%(subtarget_extra_asm_spec)"
+#endif
+
+/* The ARM uses @ are a comment character so we need to redefine
+ TYPE_OPERAND_FMT. */
+#undef TYPE_OPERAND_FMT
+#define TYPE_OPERAND_FMT "%%%s"
+
+/* We might need a ARM specific header to function declarations. */
+#undef ASM_DECLARE_FUNCTION_NAME
+#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
+ do \
+ { \
+ ARM_DECLARE_FUNCTION_NAME (FILE, NAME, DECL); \
+ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
+ ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
+ ASM_OUTPUT_LABEL(FILE, NAME); \
+ ARM_OUTPUT_FN_UNWIND (FILE, TRUE); \
+ } \
+ while (0)
+
+/* We might need an ARM specific trailer for function declarations. */
+#undef ASM_DECLARE_FUNCTION_SIZE
+#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
+ do \
+ { \
+ ARM_OUTPUT_FN_UNWIND (FILE, FALSE); \
+ if (!flag_inhibit_size_directive) \
+ ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
+ } \
+ while (0)
+
+/* Define this macro if jump tables (for `tablejump' insns) should be
+ output in the text section, along with the assembler instructions.
+ Otherwise, the readonly data section is used. */
+/* We put ARM and Thumb-2 jump tables in the text section, because it makes
+ the code more efficient, but for Thumb-1 it's better to put them out of
+ band. */
+#define JUMP_TABLES_IN_TEXT_SECTION (TARGET_32BIT)
+
+#ifndef LINK_SPEC
+#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X"
+#endif
+
+/* Run-time Target Specification. */
+#ifndef TARGET_VERSION
+#define TARGET_VERSION fputs (" (ARM/elf)", stderr)
+#endif
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
+#endif
+
+#ifndef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+ { "marm", "mlittle-endian", "msoft-float", "mno-thumb-interwork", "fno-leading-underscore" }
+#endif
+
+#define TARGET_ASM_FILE_START_APP_OFF true
+#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
+
+
+/* Output an element in the static constructor array. */
+#undef TARGET_ASM_CONSTRUCTOR
+#define TARGET_ASM_CONSTRUCTOR arm_elf_asm_constructor
+
+#undef TARGET_ASM_DESTRUCTOR
+#define TARGET_ASM_DESTRUCTOR arm_elf_asm_destructor
+
+/* For PIC code we need to explicitly specify (PLT) and (GOT) relocs. */
+#define NEED_PLT_RELOC flag_pic
+#define NEED_GOT_RELOC flag_pic
+
+/* The ELF assembler handles GOT addressing differently to NetBSD. */
+#define GOT_PCREL 0
+
+/* Align output to a power of two. Note ".align 0" is redundant,
+ and also GAS will treat it as ".align 2" which we do not want. */
+#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
+ do \
+ { \
+ if ((POWER) > 0) \
+ fprintf (STREAM, "\t.align\t%d\n", POWER); \
+ } \
+ while (0)
+
+/* Horrible hack: We want to prevent some libgcc routines being included
+ for some multilibs. */
+#ifndef __ARM_ARCH_6M__
+#undef L_fixdfsi
+#undef L_fixunsdfsi
+#undef L_truncdfsf2
+#undef L_fixsfsi
+#undef L_fixunssfsi
+#undef L_floatdidf
+#undef L_floatdisf
+#undef L_floatundidf
+#undef L_floatundisf
+#endif
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-eabi.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-eabi.h
new file mode 100644
index 0000000..2ca8818
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-eabi.h
@@ -0,0 +1,111 @@
+/* Configuration file for ARM GNU/Linux EABI targets.
+ Copyright (C) 2004, 2005, 2006, 2007
+ Free Software Foundation, Inc.
+ Contributed by CodeSourcery, LLC
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* On EABI GNU/Linux, we want both the BPABI builtins and the
+ GNU/Linux builtins. */
+#undef TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS() \
+ do \
+ { \
+ TARGET_BPABI_CPP_BUILTINS(); \
+ LINUX_TARGET_OS_CPP_BUILTINS(); \
+ ANDROID_TARGET_OS_CPP_BUILTINS(); \
+ } \
+ while (false)
+
+/* We default to a soft-float ABI so that binaries can run on all
+ target hardware. */
+#undef TARGET_DEFAULT_FLOAT_ABI
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+
+/* We default to the "aapcs-linux" ABI so that enums are int-sized by
+ default. */
+#undef ARM_DEFAULT_ABI
+#define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
+
+/* Default to armv5t so that thumb shared libraries work.
+ The ARM10TDMI core is the default for armv5t, so set
+ SUBTARGET_CPU_DEFAULT to achieve this. */
+#undef SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#undef TARGET_LINKER_EMULATION
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_LINKER_EMULATION "armelfb_linux_eabi"
+#else
+#define TARGET_LINKER_EMULATION "armelf_linux_eabi"
+#endif
+
+#undef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION
+
+/* Use ld-linux.so.3 so that it will be possible to run "classic"
+ GNU/Linux binaries on an EABI system. */
+#undef GLIBC_DYNAMIC_LINKER
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3"
+
+/* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
+ use the GNU/Linux version, not the generic BPABI version. */
+#undef LINK_SPEC
+#define LINK_SPEC \
+ LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \
+ LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC)
+
+#undef CC1_SPEC
+#define CC1_SPEC \
+ LINUX_OR_ANDROID_CC (LINUX_TARGET_CC1_SPEC, \
+ LINUX_TARGET_CC1_SPEC " " ANDROID_CC1_SPEC)
+
+#define CC1PLUS_SPEC \
+ LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
+
+#undef LIB_SPEC
+#define LIB_SPEC \
+ LINUX_OR_ANDROID_LD (LINUX_TARGET_LIB_SPEC, \
+ LINUX_TARGET_LIB_SPEC " " ANDROID_LIB_SPEC)
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+ LINUX_OR_ANDROID_LD (LINUX_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
+
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC \
+ LINUX_OR_ANDROID_LD (LINUX_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC)
+
+/* Use the default LIBGCC_SPEC, not the version in linux-elf.h, as we
+ do not use -lfloat. */
+#undef LIBGCC_SPEC
+
+/* Clear the instruction cache from `beg' to `end'. This makes an
+ inline system call to SYS_cacheflush. */
+#undef CLEAR_INSN_CACHE
+#define CLEAR_INSN_CACHE(BEG, END) \
+{ \
+ register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
+ register unsigned long _end __asm ("a2") = (unsigned long) (END); \
+ register unsigned long _flg __asm ("a3") = 0; \
+ register unsigned long _scno __asm ("r7") = 0xf0002; \
+ __asm __volatile ("swi 0 @ sys_cacheflush" \
+ : "=r" (_beg) \
+ : "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno)); \
+}
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-elf.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-elf.h
new file mode 100644
index 0000000..07455ee
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-elf.h
@@ -0,0 +1,121 @@
+/* Definitions for ARM running Linux-based GNU systems using ELF
+ Copyright (C) 1993, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Philip Blundell <philb@gnu.org>
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* elfos.h should have already been included. Now just override
+ any conflicting definitions and add any extras. */
+
+/* Run-time Target Specification. */
+#undef TARGET_VERSION
+#define TARGET_VERSION fputs (" (ARM GNU/Linux with ELF)", stderr);
+
+#undef TARGET_DEFAULT_FLOAT_ABI
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_ENDIAN_DEFAULT MASK_BIG_END
+#define TARGET_ENDIAN_OPTION "mbig-endian"
+#define TARGET_LINKER_EMULATION "armelfb_linux"
+#else
+#define TARGET_ENDIAN_DEFAULT 0
+#define TARGET_ENDIAN_OPTION "mlittle-endian"
+#define TARGET_LINKER_EMULATION "armelf_linux"
+#endif
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (TARGET_ENDIAN_DEFAULT)
+
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+ { "marm", "mlittle-endian", "mhard-float", "mno-thumb-interwork" }
+
+/* Now we define the strings used to build the spec file. */
+#undef LIB_SPEC
+#define LIB_SPEC \
+ "%{pthread:-lpthread} \
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+#define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc"
+
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+
+#define LINUX_TARGET_LINK_SPEC "%{h*} %{version:-v} \
+ %{b} \
+ %{static:-Bstatic} \
+ %{shared:-shared} \
+ %{symbolic:-Bsymbolic} \
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker " LINUX_DYNAMIC_LINKER "} \
+ -X \
+ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+ SUBTARGET_EXTRA_LINK_SPEC
+
+#undef LINK_SPEC
+#define LINK_SPEC LINUX_TARGET_LINK_SPEC
+
+#define TARGET_OS_CPP_BUILTINS() \
+ do \
+ { \
+ LINUX_TARGET_OS_CPP_BUILTINS(); \
+ } \
+ while (0)
+
+/* This is how we tell the assembler that two symbols have the same value. */
+#define ASM_OUTPUT_DEF(FILE, NAME1, NAME2) \
+ do \
+ { \
+ assemble_name (FILE, NAME1); \
+ fputs (" = ", FILE); \
+ assemble_name (FILE, NAME2); \
+ fputc ('\n', FILE); \
+ } \
+ while (0)
+
+/* NWFPE always understands FPA instructions. */
+#undef FPUTYPE_DEFAULT
+#define FPUTYPE_DEFAULT FPUTYPE_FPA_EMU3
+
+/* Call the function profiler with a given profile label. */
+#undef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
+{ \
+ fprintf (STREAM, "\tbl\tmcount%s\n", \
+ (TARGET_ARM && NEED_PLT_RELOC) ? "(PLT)" : ""); \
+}
+
+/* The GNU/Linux profiler clobbers the link register. Make sure the
+ prologue knows to save it. */
+#define PROFILE_HOOK(X) \
+ emit_clobber (gen_rtx_REG (SImode, LR_REGNUM))
+
+/* The GNU/Linux profiler needs a frame pointer. */
+#define SUBTARGET_FRAME_POINTER_REQUIRED crtl->profile
+
+/* Add .note.GNU-stack. */
+#undef NEED_INDICATE_EXEC_STACK
+#define NEED_INDICATE_EXEC_STACK 1
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-gas.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-gas.h
new file mode 100644
index 0000000..9b6fcde
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/arm/linux-gas.h
@@ -0,0 +1,56 @@
+/* Definitions of target machine for GNU compiler.
+ ARM Linux-based GNU systems version.
+ Copyright (C) 1997, 1998, 1999, 2000, 2001, 2004, 2007
+ Free Software Foundation, Inc.
+ Contributed by Russell King <rmk92@ecs.soton.ac.uk>.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* This is how we tell the assembler that a symbol is weak.
+ GAS always supports weak symbols. */
+
+/* Unsigned chars produces much better code than signed. */
+#define DEFAULT_SIGNED_CHAR 0
+
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+/* Use the AAPCS type for wchar_t, or the previous Linux default for
+ non-AAPCS. */
+#undef WCHAR_TYPE
+#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long int")
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+/* Clear the instruction cache from `beg' to `end'. This makes an
+ inline system call to SYS_cacheflush. */
+#define CLEAR_INSN_CACHE(BEG, END) \
+{ \
+ register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
+ register unsigned long _end __asm ("a2") = (unsigned long) (END); \
+ register unsigned long _flg __asm ("a3") = 0; \
+ __asm __volatile ("swi 0x9f0002 @ sys_cacheflush" \
+ : "=r" (_beg) \
+ : "0" (_beg), "r" (_end), "r" (_flg)); \
+}
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/dbxelf.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/dbxelf.h
new file mode 100644
index 0000000..8d3c265
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/dbxelf.h
@@ -0,0 +1,68 @@
+/* Definitions needed when using stabs embedded in ELF sections.
+ Copyright (C) 1999, 2004, 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* This file may be included by any ELF target which wishes to
+ support -gstabs generating stabs in sections, as produced by gas
+ and understood by gdb. */
+
+#ifndef GCC_DBX_ELF_H
+#define GCC_DBX_ELF_H
+
+/* Output DBX (stabs) debugging information if doing -gstabs. */
+
+#define DBX_DEBUGGING_INFO 1
+
+/* Make LBRAC and RBRAC addresses relative to the start of the
+ function. The native Solaris stabs debugging format works this
+ way, gdb expects it, and it reduces the number of relocation
+ entries... */
+
+#define DBX_BLOCKS_FUNCTION_RELATIVE 1
+
+/* ... but, to make this work, functions must appear prior to line info. */
+
+#define DBX_FUNCTION_FIRST
+
+/* When generating stabs debugging, use N_BINCL entries. */
+
+#define DBX_USE_BINCL
+
+/* There is no limit to the length of stabs strings. */
+
+#ifndef DBX_CONTIN_LENGTH
+#define DBX_CONTIN_LENGTH 0
+#endif
+
+/* Like block addresses, stabs line numbers are relative to the
+ current function. */
+
+#define DBX_LINES_FUNCTION_RELATIVE 1
+
+/* Generate a blank trailing N_SO to mark the end of the .o file, since
+ we can't depend upon the linker to mark .o file boundaries with
+ embedded stabs. */
+
+#define DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END
+
+#endif /* ! GCC_DBX_ELF_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/elfos.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/elfos.h
new file mode 100644
index 0000000..2d818d1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/elfos.h
@@ -0,0 +1,520 @@
+/* elfos.h -- operating system specific defines to be used when
+ targeting GCC for some generic ELF system
+ Copyright (C) 1991, 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2007, 2009 Free Software Foundation, Inc.
+ Based on svr4.h contributed by Ron Guilmette (rfg@netcom.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#define TARGET_OBJFMT_CPP_BUILTINS() \
+ do \
+ { \
+ builtin_define ("__ELF__"); \
+ } \
+ while (0)
+
+/* Define a symbol indicating that we are using elfos.h.
+ Some CPU specific configuration files use this. */
+#define USING_ELFOS_H
+
+/* The prefix to add to user-visible assembler symbols.
+
+ For ELF systems the convention is *not* to prepend a leading
+ underscore onto user-level symbol names. */
+
+#undef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX ""
+
+/* The biggest alignment supported by ELF in bits. 32-bit ELF
+ supports section alignment up to (0x80000000 * 8), while
+ 64-bit ELF supports (0x8000000000000000 * 8). If this macro
+ is not defined, the default is the largest alignment supported
+ by 32-bit ELF and representable on a 32-bit host. Use this
+ macro to limit the alignment which can be specified using
+ the `__attribute__ ((aligned (N)))' construct. */
+#ifndef MAX_OFILE_ALIGNMENT
+#define MAX_OFILE_ALIGNMENT (((unsigned int) 1 << 28) * 8)
+#endif
+
+/* Use periods rather than dollar signs in special g++ assembler names. */
+
+#define NO_DOLLAR_IN_LABEL
+
+/* Writing `int' for a bit-field forces int alignment for the structure. */
+
+#ifndef PCC_BITFIELD_TYPE_MATTERS
+#define PCC_BITFIELD_TYPE_MATTERS 1
+#endif
+
+/* Handle #pragma weak and #pragma pack. */
+
+#define HANDLE_SYSV_PRAGMA 1
+
+/* All ELF targets can support DWARF-2. */
+
+#define DWARF2_DEBUGGING_INFO 1
+
+/* The GNU tools operate better with dwarf2, and it is required by some
+ psABI's. Since we don't have any native tools to be compatible with,
+ default to dwarf2. */
+
+#ifndef PREFERRED_DEBUGGING_TYPE
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+#endif
+
+/* All SVR4 targets use the ELF object file format. */
+#define OBJECT_FORMAT_ELF
+
+
+/* Output #ident as a .ident. */
+
+#define ASM_OUTPUT_IDENT(FILE, NAME) \
+ fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME);
+
+#define IDENT_ASM_OP "\t.ident\t"
+
+#undef SET_ASM_OP
+#define SET_ASM_OP "\t.set\t"
+
+/* Most svr4 assemblers want a .file directive at the beginning of
+ their input file. */
+#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
+
+/* This is how to allocate empty space in some section. The .zero
+ pseudo-op is used for this on most svr4 assemblers. */
+
+#define SKIP_ASM_OP "\t.zero\t"
+
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(FILE, SIZE) \
+ fprintf ((FILE), "%s"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
+ SKIP_ASM_OP, (SIZE))
+
+/* This is how to store into the string LABEL
+ the symbol_ref name of an internal numbered label where
+ PREFIX is the class of label and NUM is the number within the class.
+ This is suitable for output with `assemble_name'.
+
+ For most svr4 systems, the convention is that any symbol which begins
+ with a period is not put into the linker symbol table by the assembler. */
+
+#undef ASM_GENERATE_INTERNAL_LABEL
+#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
+ do \
+ { \
+ sprintf (LABEL, "*.%s%u", PREFIX, (unsigned) (NUM)); \
+ } \
+ while (0)
+
+/* Output the label which precedes a jumptable. Note that for all svr4
+ systems where we actually generate jumptables (which is to say every
+ svr4 target except i386, where we use casesi instead) we put the jump-
+ tables into the .rodata section and since other stuff could have been
+ put into the .rodata section prior to any given jumptable, we have to
+ make sure that the location counter for the .rodata section gets pro-
+ perly re-aligned prior to the actual beginning of the jump table. */
+
+#undef ALIGN_ASM_OP
+#define ALIGN_ASM_OP "\t.align\t"
+
+#ifndef ASM_OUTPUT_BEFORE_CASE_LABEL
+#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
+ ASM_OUTPUT_ALIGN ((FILE), 2);
+#endif
+
+#undef ASM_OUTPUT_CASE_LABEL
+#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
+ do \
+ { \
+ ASM_OUTPUT_BEFORE_CASE_LABEL (FILE, PREFIX, NUM, JUMPTABLE) \
+ (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
+ } \
+ while (0)
+
+/* The standard SVR4 assembler seems to require that certain builtin
+ library routines (e.g. .udiv) be explicitly declared as .globl
+ in each assembly file where they are referenced. */
+
+#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
+ (*targetm.asm_out.globalize_label) (FILE, XSTR (FUN, 0))
+
+/* This says how to output assembler code to declare an
+ uninitialized external linkage data object. Under SVR4,
+ the linker seems to want the alignment of data objects
+ to depend on their types. We do exactly that here. */
+
+#define COMMON_ASM_OP "\t.comm\t"
+
+#undef ASM_OUTPUT_ALIGNED_COMMON
+#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
+ do \
+ { \
+ fprintf ((FILE), "%s", COMMON_ASM_OP); \
+ assemble_name ((FILE), (NAME)); \
+ fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
+ (SIZE), (ALIGN) / BITS_PER_UNIT); \
+ } \
+ while (0)
+
+/* This says how to output assembler code to declare an
+ uninitialized internal linkage data object. Under SVR4,
+ the linker seems to want the alignment of data objects
+ to depend on their types. We do exactly that here. */
+
+#define LOCAL_ASM_OP "\t.local\t"
+
+#undef ASM_OUTPUT_ALIGNED_LOCAL
+#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
+ do \
+ { \
+ fprintf ((FILE), "%s", LOCAL_ASM_OP); \
+ assemble_name ((FILE), (NAME)); \
+ fprintf ((FILE), "\n"); \
+ ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
+ } \
+ while (0)
+
+/* This is the pseudo-op used to generate a contiguous sequence of byte
+ values from a double-quoted string WITHOUT HAVING A TERMINATING NUL
+ AUTOMATICALLY APPENDED. This is the same for most svr4 assemblers. */
+
+#undef ASCII_DATA_ASM_OP
+#define ASCII_DATA_ASM_OP "\t.ascii\t"
+
+/* Support a read-only data section. */
+#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rodata"
+
+/* On svr4, we *do* have support for the .init and .fini sections, and we
+ can put stuff in there to be executed before and after `main'. We let
+ crtstuff.c and other files know this by defining the following symbols.
+ The definitions say how to change sections to the .init and .fini
+ sections. This is the same for all known svr4 assemblers. */
+
+#define INIT_SECTION_ASM_OP "\t.section\t.init"
+#define FINI_SECTION_ASM_OP "\t.section\t.fini"
+
+/* Output assembly directive to move to the beginning of current section. */
+#ifdef HAVE_GAS_SUBSECTION_ORDERING
+# define ASM_SECTION_START_OP "\t.subsection\t-1"
+# define ASM_OUTPUT_SECTION_START(FILE) \
+ fprintf ((FILE), "%s\n", ASM_SECTION_START_OP)
+#endif
+
+#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)
+
+/* Switch into a generic section. */
+#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
+
+#undef TARGET_ASM_SELECT_RTX_SECTION
+#define TARGET_ASM_SELECT_RTX_SECTION default_elf_select_rtx_section
+#undef TARGET_ASM_SELECT_SECTION
+#define TARGET_ASM_SELECT_SECTION default_elf_select_section
+#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
+#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS true
+
+/* Define the strings used for the special svr4 .type and .size directives.
+ These strings generally do not vary from one system running svr4 to
+ another, but if a given system (e.g. m88k running svr) needs to use
+ different pseudo-op names for these, they may be overridden in the
+ file which includes this one. */
+
+#define TYPE_ASM_OP "\t.type\t"
+#define SIZE_ASM_OP "\t.size\t"
+
+/* This is how we tell the assembler that a symbol is weak. */
+
+#define ASM_WEAKEN_LABEL(FILE, NAME) \
+ do \
+ { \
+ fputs ("\t.weak\t", (FILE)); \
+ assemble_name ((FILE), (NAME)); \
+ fputc ('\n', (FILE)); \
+ } \
+ while (0)
+
+/* The following macro defines the format used to output the second
+ operand of the .type assembler directive. Different svr4 assemblers
+ expect various different forms for this operand. The one given here
+ is just a default. You may need to override it in your machine-
+ specific tm.h file (depending upon the particulars of your assembler). */
+
+#define TYPE_OPERAND_FMT "@%s"
+
+/* Write the extra assembler code needed to declare a function's result.
+ Most svr4 assemblers don't require any special declaration of the
+ result value, but there are exceptions. */
+
+#ifndef ASM_DECLARE_RESULT
+#define ASM_DECLARE_RESULT(FILE, RESULT)
+#endif
+
+/* These macros generate the special .type and .size directives which
+ are used to set the corresponding fields of the linker symbol table
+ entries in an ELF object file under SVR4. These macros also output
+ the starting labels for the relevant functions/objects. */
+
+/* Write the extra assembler code needed to declare a function properly.
+ Some svr4 assemblers need to also have something extra said about the
+ function's return value. We allow for that here. */
+
+#ifndef ASM_DECLARE_FUNCTION_NAME
+#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
+ do \
+ { \
+ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
+ ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
+ ASM_OUTPUT_LABEL (FILE, NAME); \
+ } \
+ while (0)
+#endif
+
+/* Write the extra assembler code needed to declare an object properly. */
+
+#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
+ do \
+ { \
+ HOST_WIDE_INT size; \
+ \
+ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
+ \
+ size_directive_output = 0; \
+ if (!flag_inhibit_size_directive \
+ && (DECL) && DECL_SIZE (DECL)) \
+ { \
+ size_directive_output = 1; \
+ size = int_size_in_bytes (TREE_TYPE (DECL)); \
+ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
+ } \
+ \
+ ASM_OUTPUT_LABEL (FILE, NAME); \
+ } \
+ while (0)
+
+/* Output the size directive for a decl in rest_of_decl_compilation
+ in the case where we did not do so before the initializer.
+ Once we find the error_mark_node, we know that the value of
+ size_directive_output was set
+ by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
+
+#undef ASM_FINISH_DECLARE_OBJECT
+#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)\
+ do \
+ { \
+ const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
+ HOST_WIDE_INT size; \
+ \
+ if (!flag_inhibit_size_directive \
+ && DECL_SIZE (DECL) \
+ && ! AT_END && TOP_LEVEL \
+ && DECL_INITIAL (DECL) == error_mark_node \
+ && !size_directive_output) \
+ { \
+ size_directive_output = 1; \
+ size = int_size_in_bytes (TREE_TYPE (DECL)); \
+ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
+ } \
+ } \
+ while (0)
+
+/* This is how to declare the size of a function. */
+#ifndef ASM_DECLARE_FUNCTION_SIZE
+#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
+ do \
+ { \
+ if (!flag_inhibit_size_directive) \
+ ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
+ } \
+ while (0)
+#endif
+
+/* A table of bytes codes used by the ASM_OUTPUT_ASCII and
+ ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
+ corresponds to a particular byte value [0..255]. For any
+ given byte value, if the value in the corresponding table
+ position is zero, the given character can be output directly.
+ If the table value is 1, the byte must be output as a \ooo
+ octal escape. If the tables value is anything else, then the
+ byte value should be output as a \ followed by the value
+ in the table. Note that we can use standard UN*X escape
+ sequences for many control characters, but we don't use
+ \a to represent BEL because some svr4 assemblers (e.g. on
+ the i386) don't know about that. Also, we don't use \v
+ since some versions of gas, such as 2.2 did not accept it. */
+
+#define ESCAPES \
+"\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
+\0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
+\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
+\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
+\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
+\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
+\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
+\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
+
+/* Some svr4 assemblers have a limit on the number of characters which
+ can appear in the operand of a .string directive. If your assembler
+ has such a limitation, you should define STRING_LIMIT to reflect that
+ limit. Note that at least some svr4 assemblers have a limit on the
+ actual number of bytes in the double-quoted string, and that they
+ count each character in an escape sequence as one byte. Thus, an
+ escape sequence like \377 would count as four bytes.
+
+ If your target assembler doesn't support the .string directive, you
+ should define this to zero.
+*/
+
+#define STRING_LIMIT ((unsigned) 256)
+
+#define STRING_ASM_OP "\t.string\t"
+
+/* The routine used to output NUL terminated strings. We use a special
+ version of this for most svr4 targets because doing so makes the
+ generated assembly code more compact (and thus faster to assemble)
+ as well as more readable, especially for targets like the i386
+ (where the only alternative is to output character sequences as
+ comma separated lists of numbers). */
+
+#define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
+ do \
+ { \
+ register const unsigned char *_limited_str = \
+ (const unsigned char *) (STR); \
+ register unsigned ch; \
+ \
+ fprintf ((FILE), "%s\"", STRING_ASM_OP); \
+ \
+ for (; (ch = *_limited_str); _limited_str++) \
+ { \
+ register int escape; \
+ \
+ switch (escape = ESCAPES[ch]) \
+ { \
+ case 0: \
+ putc (ch, (FILE)); \
+ break; \
+ case 1: \
+ fprintf ((FILE), "\\%03o", ch); \
+ break; \
+ default: \
+ putc ('\\', (FILE)); \
+ putc (escape, (FILE)); \
+ break; \
+ } \
+ } \
+ \
+ fprintf ((FILE), "\"\n"); \
+ } \
+ while (0)
+
+/* The routine used to output sequences of byte values. We use a special
+ version of this for most svr4 targets because doing so makes the
+ generated assembly code more compact (and thus faster to assemble)
+ as well as more readable. Note that if we find subparts of the
+ character sequence which end with NUL (and which are shorter than
+ STRING_LIMIT) we output those using ASM_OUTPUT_LIMITED_STRING. */
+
+#undef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
+ do \
+ { \
+ const unsigned char *_ascii_bytes = \
+ (const unsigned char *) (STR); \
+ const unsigned char *limit = _ascii_bytes + (LENGTH); \
+ const unsigned char *last_null = NULL; \
+ unsigned bytes_in_chunk = 0; \
+ \
+ for (; _ascii_bytes < limit; _ascii_bytes++) \
+ { \
+ const unsigned char *p; \
+ \
+ if (bytes_in_chunk >= 60) \
+ { \
+ fprintf ((FILE), "\"\n"); \
+ bytes_in_chunk = 0; \
+ } \
+ \
+ if (_ascii_bytes > last_null) \
+ { \
+ for (p = _ascii_bytes; p < limit && *p != '\0'; p++) \
+ continue; \
+ last_null = p; \
+ } \
+ else \
+ p = last_null; \
+ \
+ if (p < limit && (p - _ascii_bytes) <= (long)STRING_LIMIT) \
+ { \
+ if (bytes_in_chunk > 0) \
+ { \
+ fprintf ((FILE), "\"\n"); \
+ bytes_in_chunk = 0; \
+ } \
+ \
+ ASM_OUTPUT_LIMITED_STRING ((FILE), _ascii_bytes); \
+ _ascii_bytes = p; \
+ } \
+ else \
+ { \
+ register int escape; \
+ register unsigned ch; \
+ \
+ if (bytes_in_chunk == 0) \
+ fprintf ((FILE), "%s\"", ASCII_DATA_ASM_OP); \
+ \
+ switch (escape = ESCAPES[ch = *_ascii_bytes]) \
+ { \
+ case 0: \
+ putc (ch, (FILE)); \
+ bytes_in_chunk++; \
+ break; \
+ case 1: \
+ fprintf ((FILE), "\\%03o", ch); \
+ bytes_in_chunk += 4; \
+ break; \
+ default: \
+ putc ('\\', (FILE)); \
+ putc (escape, (FILE)); \
+ bytes_in_chunk += 2; \
+ break; \
+ } \
+ } \
+ } \
+ \
+ if (bytes_in_chunk > 0) \
+ fprintf ((FILE), "\"\n"); \
+ } \
+ while (0)
+
+/* Allow the use of the -frecord-gcc-switches switch via the
+ elf_record_gcc_switches function defined in varasm.c. */
+#undef TARGET_ASM_RECORD_GCC_SWITCHES
+#define TARGET_ASM_RECORD_GCC_SWITCHES elf_record_gcc_switches
+
+/* A C statement (sans semicolon) to output to the stdio stream STREAM
+ any text necessary for declaring the name of an external symbol
+ named NAME which is referenced in this compilation but not defined.
+ It is needed to properly support non-default visibility. */
+
+#ifndef ASM_OUTPUT_EXTERNAL
+#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
+ default_elf_asm_output_external (FILE, DECL, NAME)
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux-android.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux-android.h
new file mode 100644
index 0000000..5ca3858
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux-android.h
@@ -0,0 +1,60 @@
+/* Configuration file for Linux Android targets.
+ Copyright (C) 2008, 2010
+ Free Software Foundation, Inc.
+ Contributed by Doug Kwan (dougkwan@google.com)
+ Rewritten by CodeSourcery, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#define ANDROID_TARGET_OS_CPP_BUILTINS() \
+ do { \
+ if (OPTION_ANDROID) \
+ builtin_define ("__ANDROID__"); \
+ } while (0)
+
+#if ANDROID_DEFAULT
+# define NOANDROID "mno-android"
+#else
+# define NOANDROID "!mandroid"
+#endif
+
+#define LINUX_OR_ANDROID_CC(LINUX_SPEC, ANDROID_SPEC) \
+ "%{" NOANDROID "|tno-android-cc:" LINUX_SPEC ";:" ANDROID_SPEC "}"
+
+#define LINUX_OR_ANDROID_LD(LINUX_SPEC, ANDROID_SPEC) \
+ "%{" NOANDROID "|tno-android-ld:" LINUX_SPEC ";:" ANDROID_SPEC "}"
+
+#define ANDROID_LINK_SPEC \
+ "%{shared: -Bsymbolic}"
+
+#define ANDROID_CC1_SPEC \
+ "%{!mglibc:%{!muclibc:%{!mbionic: -mbionic}}} " \
+ "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC: -fPIC}}}}"
+
+#define ANDROID_CC1PLUS_SPEC \
+ "%{!fexceptions:%{!fno-exceptions: -fno-exceptions}} " \
+ "%{!frtti:%{!fno-rtti: -fno-rtti}}"
+
+#define ANDROID_LIB_SPEC \
+ "%{!static: -ldl}"
+
+#define ANDROID_STARTFILE_SPEC \
+ "%{!shared:" \
+ " %{static: crtbegin_static%O%s;: crtbegin_dynamic%O%s}}"
+
+#define ANDROID_ENDFILE_SPEC \
+ "%{!shared: crtend_android%O%s}"
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux.h
new file mode 100644
index 0000000..740ddb7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/linux.h
@@ -0,0 +1,172 @@
+/* Definitions for Linux-based GNU systems with ELF format
+ Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2005, 2006,
+ 2007, 2009 Free Software Foundation, Inc.
+ Contributed by Eric Youngdale.
+ Modified for stabs-in-ELF by H.J. Lu (hjl@lucon.org).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* Don't assume anything about the header files. */
+#define NO_IMPLICIT_EXTERN_C
+
+#undef ASM_APP_ON
+#define ASM_APP_ON "#APP\n"
+
+#undef ASM_APP_OFF
+#define ASM_APP_OFF "#NO_APP\n"
+
+#undef MD_EXEC_PREFIX
+#undef MD_STARTFILE_PREFIX
+
+/* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
+ provides part of the support for getting C++ file-scope static
+ object constructed before entering `main'. */
+
+#if defined (HAVE_LD_PIE) && defined (ENABLE_CRTBEGINTS)
+#define LINUX_TARGET_STARTFILE_SPEC \
+ "%{!shared: %{pg|p|profile:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}} crti.o%s \
+ %{static:%{pie:crtbeginTS.o%s;:crtbeginT.o%s}} %{!static:%{shared|pie:crtbeginS.o%s;:crtbegin.o%s}}"
+#elif defined (HAVE_LD_PIE) && ! defined (ENABLE_CRTBEGINTS)
+#define LINUX_TARGET_STARTFILE_SPEC \
+ "%{!shared: %{pg|p|profile:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}} \
+ crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+#else
+#define LINUX_TARGET_STARTFILE_SPEC \
+ "%{!shared: %{pg|p|profile:gcrt1.o%s;:crt1.o%s}} \
+ crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+#endif
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC LINUX_TARGET_STARTFILE_SPEC
+
+/* Provide a ENDFILE_SPEC appropriate for GNU/Linux. Here we tack on
+ the GNU/Linux magical crtend.o file (see crtstuff.c) which
+ provides part of the support for getting C++ file-scope static
+ object constructed before entering `main', followed by a normal
+ GNU/Linux "finalizer" file, `crtn.o'. */
+
+#define LINUX_TARGET_ENDFILE_SPEC \
+ "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC LINUX_TARGET_ENDFILE_SPEC
+
+/* This is for -profile to use -lc_p instead of -lc. */
+#define LINUX_TARGET_CC1_SPEC "%{profile:-p}"
+#ifndef CC1_SPEC
+#define CC1_SPEC LINUX_TARGET_CC1_SPEC
+#endif
+
+/* The GNU C++ standard library requires that these macros be defined. */
+#undef CPLUSPLUS_CPP_SPEC
+#define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)"
+
+#define LINUX_TARGET_LIB_SPEC \
+ "%{pthread:-lpthread} \
+ %{shared:-lc} \
+ %{!shared:%{mieee-fp:-lieee} %{profile:-lc_p}%{!profile:-lc}}"
+#undef LIB_SPEC
+#define LIB_SPEC LINUX_TARGET_LIB_SPEC
+
+/* C libraries supported on Linux. */
+#define OPTION_GLIBC (linux_libc == LIBC_GLIBC)
+#define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC)
+#define OPTION_BIONIC (linux_libc == LIBC_BIONIC)
+
+#define LINUX_TARGET_OS_CPP_BUILTINS() \
+ do { \
+ if (OPTION_GLIBC) \
+ builtin_define ("__gnu_linux__"); \
+ builtin_define_std ("linux"); \
+ builtin_define_std ("unix"); \
+ builtin_assert ("system=linux"); \
+ builtin_assert ("system=unix"); \
+ builtin_assert ("system=posix"); \
+ } while (0)
+
+#if defined(HAVE_LD_EH_FRAME_HDR)
+#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
+#endif
+
+/* Define this so we can compile MS code for use with WINE. */
+#define HANDLE_PRAGMA_PACK_PUSH_POP
+
+#undef LINK_GCC_C_SEQUENCE_SPEC
+#define LINK_GCC_C_SEQUENCE_SPEC \
+ "%{static:--start-group} %G %L %{static:--end-group}%{!static:%G}"
+
+/* Use --as-needed -lgcc_s for eh support. */
+#ifdef HAVE_LD_AS_NEEDED
+#define USE_LD_AS_NEEDED 1
+#endif
+
+/* Determine which dynamic linker to use depending on whether GLIBC or
++ uClibc or Bionic is the default C library and whether
++ -muclibc or -mglibc or -mbionic has been passed to change the default. */
+
+#define CHOOSE_DYNAMIC_LINKER1(LIBC1, LIBC2, LIBC3, LD1, LD2, LD3) \
+ "%{" LIBC2 ":" LD2 ";:%{" LIBC3 ":" LD3 ";:" LD1 "}}"
+
+#if DEFAULT_LIBC == LIBC_GLIBC
+#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+ CHOOSE_DYNAMIC_LINKER1 ("mglibc", "muclibc", "mbionic", G, U, B)
+#elif DEFAULT_LIBC == LIBC_UCLIBC
+#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+ CHOOSE_DYNAMIC_LINKER1 ("muclibc", "mglibc", "mbionic", U, G, B)
+#elif DEFAULT_LIBC == LIBC_BIONIC
+#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+ CHOOSE_DYNAMIC_LINKER1 ("mbionic", "mglibc", "muclibc", B, G, U)
+#else
+#error "Unsupported DEFAULT_LIBC"
+#endif /* DEFAULT_LIBC */
+
+/* For most targets the following definitions suffice;
+ GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
+ GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
+ supporting both 32-bit and 64-bit compilation. */
+#ifndef RUNTIME_ROOT_PREFIX
+#define RUNTIME_ROOT_PREFIX ""
+#endif
+#define UCLIBC_DYNAMIC_LINKER RUNTIME_ROOT_PREFIX "/lib/ld-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER32 RUNTIME_ROOT_PREFIX "/lib/ld-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER64 RUNTIME_ROOT_PREFIX "/lib/ld64-uClibc.so.0"
+#define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
+#define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
+#define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
+
+#define LINUX_DYNAMIC_LINKER \
+ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER, \
+ BIONIC_DYNAMIC_LINKER)
+#define LINUX_DYNAMIC_LINKER32 \
+ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER32, UCLIBC_DYNAMIC_LINKER32, \
+ BIONIC_DYNAMIC_LINKER32)
+#define LINUX_DYNAMIC_LINKER64 \
+ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64, \
+ BIONIC_DYNAMIC_LINKER64)
+
+/* Determine whether the entire c99 runtime
+ is present in the runtime library. */
+#define TARGET_C99_FUNCTIONS (OPTION_GLIBC)
+
+/* Whether we have sincos that follows the GNU extension. */
+#define TARGET_HAS_SINCOS (OPTION_GLIBC)
+
+#define TARGET_POSIX_IO
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/configargs.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/configargs.h
new file mode 100644
index 0000000..85c9d20
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/configargs.h
@@ -0,0 +1,7 @@
+/* Generated automatically. */
+static const char configuration_arguments[] = "/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../gcc/gcc-4.4.3/configure --prefix=/usr/local --target=arm-linux-androideabi --host=i686-linux-gnu --build=i686-linux-gnu --with-gnu-as --with-gnu-ld --enable-languages=c,c++ --with-gmp=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/build/temp-install --with-mpfr=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/build/temp-install --disable-libssp --enable-threads --disable-nls --disable-libmudflap --disable-libgomp --disable-sjlj-exceptions --disable-shared --disable-tls --with-float=soft --with-fpu=vfp --with-arch=armv5te --enable-target-optspace --disable-hosted-libstdcxx --enable-cxx-flags='-fexceptions -frtti' --with-gcc-version=4.4.3 --with-binutils-version=2.20.1 --with-gmp-version=4.2.4 --with-mpfr-version=2.4.1 --with-gdb-version=7.1.x --with-arch=armv5te --with-sysroot=/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/arm-linux-androideabi-4.4.x/sysroot --with-gold-version=20100303 --enable-gold=both/gold --program-transform-name='s,^,arm-linux-androideabi-,'";
+static const char thread_model[] = "posix";
+
+static const struct {
+ const char *name, *value;
+} configure_default_options[] = { { "arch", "armv5te" }, { "float", "soft" }, { "fpu", "vfp" } };
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/coretypes.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/coretypes.h
new file mode 100644
index 0000000..ab87095
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/coretypes.h
@@ -0,0 +1,113 @@
+/* GCC core type declarations.
+ Copyright (C) 2002, 2004, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* Provide forward declarations of core types which are referred to by
+ most of the compiler. This allows header files to use these types
+ (e.g. in function prototypes) without concern for whether the full
+ definitions are visible. Some other declarations that need to be
+ universally visible are here, too.
+
+ In the context of tconfig.h, most of these have special definitions
+ which prevent them from being used except in further type
+ declarations. This is a kludge; the right thing is to avoid
+ including the "tm.h" header set in the context of tconfig.h, but
+ we're not there yet. */
+
+#ifndef GCC_CORETYPES_H
+#define GCC_CORETYPES_H
+
+#define GTY(x) /* nothing - marker for gengtype */
+
+#ifndef USED_FOR_TARGET
+
+struct bitmap_head_def;
+typedef struct bitmap_head_def *bitmap;
+typedef const struct bitmap_head_def *const_bitmap;
+struct rtx_def;
+typedef struct rtx_def *rtx;
+typedef const struct rtx_def *const_rtx;
+struct rtvec_def;
+typedef struct rtvec_def *rtvec;
+typedef const struct rtvec_def *const_rtvec;
+union tree_node;
+typedef union tree_node *tree;
+union gimple_statement_d;
+typedef union gimple_statement_d *gimple;
+typedef const union tree_node *const_tree;
+typedef const union gimple_statement_d *const_gimple;
+union section;
+typedef union section section;
+struct cl_target_option;
+struct cl_optimization;
+struct gimple_seq_d;
+typedef struct gimple_seq_d *gimple_seq;
+typedef const struct gimple_seq_d *const_gimple_seq;
+struct gimple_seq_node_d;
+typedef struct gimple_seq_node_d *gimple_seq_node;
+typedef const struct gimple_seq_node_d *const_gimple_seq_node;
+
+/* The major intermediate representations of GCC. */
+enum ir_type {
+ IR_GIMPLE,
+ IR_RTL_CFGRTL,
+ IR_RTL_CFGLAYOUT
+};
+
+/* Provide forward struct declaration so that we don't have to include
+ all of cpplib.h whenever a random prototype includes a pointer.
+ Note that the cpp_reader and cpp_token typedefs remain part of
+ cpplib.h. */
+
+struct cpp_reader;
+struct cpp_token;
+
+/* The thread-local storage model associated with a given VAR_DECL
+ or SYMBOL_REF. This isn't used much, but both trees and RTL refer
+ to it, so it's here. */
+enum tls_model {
+ TLS_MODEL_NONE,
+ TLS_MODEL_EMULATED,
+ TLS_MODEL_REAL,
+ TLS_MODEL_GLOBAL_DYNAMIC = TLS_MODEL_REAL,
+ TLS_MODEL_LOCAL_DYNAMIC,
+ TLS_MODEL_INITIAL_EXEC,
+ TLS_MODEL_LOCAL_EXEC
+};
+
+#else
+
+struct _dont_use_rtx_here_;
+struct _dont_use_rtvec_here_;
+union _dont_use_tree_here_;
+#define rtx struct _dont_use_rtx_here_ *
+#define const_rtx struct _dont_use_rtx_here_ *
+#define rtvec struct _dont_use_rtvec_here *
+#define const_rtvec struct _dont_use_rtvec_here *
+#define tree union _dont_use_tree_here_ *
+#define const_tree union _dont_use_tree_here_ *
+
+#endif
+
+#endif /* coretypes.h */
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.def
new file mode 100644
index 0000000..a43fa82
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.def
@@ -0,0 +1,430 @@
+/* This file contains the definitions and documentation for the
+ additional tree codes used in the GNU C++ compiler (see tree.def
+ for the standard codes).
+ Copyright (C) 1987, 1988, 1990, 1993, 1997, 1998, 2003, 2004, 2005,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+ Free Software Foundation, Inc.
+ Hacked by Michael Tiemann (tiemann@cygnus.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* An OFFSET_REF is used in two situations:
+
+ 1. An expression of the form `A::m' where `A' is a class and `m' is
+ a non-static member. In this case, operand 0 will be a TYPE
+ (corresponding to `A') and operand 1 will be a FIELD_DECL,
+ BASELINK, or TEMPLATE_ID_EXPR (corresponding to `m').
+
+ The expression is a pointer-to-member if its address is taken,
+ but simply denotes a member of the object if its address is not
+ taken.
+
+ This form is only used during the parsing phase; once semantic
+ analysis has taken place they are eliminated.
+
+ 2. An expression of the form `x.*p'. In this case, operand 0 will
+ be an expression corresponding to `x' and operand 1 will be an
+ expression with pointer-to-member type. */
+DEFTREECODE (OFFSET_REF, "offset_ref", tcc_reference, 2)
+
+/* A pointer-to-member constant. For a pointer-to-member constant
+ `X::Y' The PTRMEM_CST_CLASS is the RECORD_TYPE for `X' and the
+ PTRMEM_CST_MEMBER is the _DECL for `Y'. */
+DEFTREECODE (PTRMEM_CST, "ptrmem_cst", tcc_constant, 0)
+
+/* For NEW_EXPR, operand 0 is the placement list.
+ Operand 1 is the new-declarator.
+ Operand 2 is the number of elements in the array.
+ Operand 3 is the initializer. */
+DEFTREECODE (NEW_EXPR, "nw_expr", tcc_expression, 4)
+DEFTREECODE (VEC_NEW_EXPR, "vec_nw_expr", tcc_expression, 3)
+
+/* For DELETE_EXPR, operand 0 is the store to be destroyed.
+ Operand 1 is the value to pass to the destroying function
+ saying whether the store should be deallocated as well. */
+DEFTREECODE (DELETE_EXPR, "dl_expr", tcc_expression, 2)
+DEFTREECODE (VEC_DELETE_EXPR, "vec_dl_expr", tcc_expression, 2)
+
+/* Value is reference to particular overloaded class method.
+ Operand 0 is the class, operand 1 is the field
+ The COMPLEXITY field holds the class level (usually 0). */
+DEFTREECODE (SCOPE_REF, "scope_ref", tcc_reference, 2)
+
+/* When composing an object with a member, this is the result.
+ Operand 0 is the object. Operand 1 is the member (usually
+ a dereferenced pointer to member). */
+DEFTREECODE (MEMBER_REF, "member_ref", tcc_reference, 2)
+
+/* Type conversion operator in C++. TREE_TYPE is type that this
+ operator converts to. Operand is expression to be converted. */
+DEFTREECODE (TYPE_EXPR, "type_expr", tcc_expression, 1)
+
+/* AGGR_INIT_EXPRs have a variably-sized representation similar to
+ that of CALL_EXPRs. Operand 0 is an INTEGER_CST node containing the
+ operand count, operand 1 is the function which performs initialization,
+ operand 2 is the slot which was allocated for this expression, and
+ the remaining operands are the arguments to the initialization function. */
+DEFTREECODE (AGGR_INIT_EXPR, "aggr_init_expr", tcc_vl_exp, 3)
+
+/* A throw expression. operand 0 is the expression, if there was one,
+ else it is NULL_TREE. */
+DEFTREECODE (THROW_EXPR, "throw_expr", tcc_expression, 1)
+
+/* An empty class object. The TREE_TYPE gives the class type. We use
+ these to avoid actually creating instances of the empty classes. */
+DEFTREECODE (EMPTY_CLASS_EXPR, "empty_class_expr", tcc_expression, 0)
+
+/* A reference to a member function or member functions from a base
+ class. BASELINK_FUNCTIONS gives the FUNCTION_DECL,
+ TEMPLATE_DECL, OVERLOAD, or TEMPLATE_ID_EXPR corresponding to the
+ functions. BASELINK_BINFO gives the base from which the functions
+ come, i.e., the base to which the `this' pointer must be converted
+ before the functions are called. BASELINK_ACCESS_BINFO gives the
+ base used to name the functions.
+
+ A BASELINK is an expression; the TREE_TYPE of the BASELINK gives
+ the type of the expression. This type is either a FUNCTION_TYPE,
+ METHOD_TYPE, or `unknown_type_node' indicating that the function is
+ overloaded. */
+DEFTREECODE (BASELINK, "baselink", tcc_exceptional, 0)
+
+/* Template definition. The following fields have the specified uses,
+ although there are other macros in cp-tree.h that should be used for
+ accessing this data.
+ DECL_ARGUMENTS template parm vector
+ DECL_TEMPLATE_INFO template text &c
+ DECL_VINDEX list of instantiations already produced;
+ only done for functions so far
+ For class template:
+ DECL_INITIAL associated templates (methods &c)
+ DECL_TEMPLATE_RESULT null
+ For non-class templates:
+ TREE_TYPE type of object to be constructed
+ DECL_TEMPLATE_RESULT decl for object to be created
+ (e.g., FUNCTION_DECL with tmpl parms used)
+ */
+DEFTREECODE (TEMPLATE_DECL, "template_decl", tcc_declaration, 0)
+
+/* Index into a template parameter list. The TEMPLATE_PARM_IDX gives
+ the index (from 0) of the parameter, while the TEMPLATE_PARM_LEVEL
+ gives the level (from 1) of the parameter.
+
+ Here's an example:
+
+ template <class T> // Index 0, Level 1.
+ struct S
+ {
+ template <class U, // Index 0, Level 2.
+ class V> // Index 1, Level 2.
+ void f();
+ };
+
+ The DESCENDANTS will be a chain of TEMPLATE_PARM_INDEXs descended
+ from this one. The first descendant will have the same IDX, but
+ its LEVEL will be one less. The TREE_CHAIN field is used to chain
+ together the descendants. The TEMPLATE_PARM_DECL is the
+ declaration of this parameter, either a TYPE_DECL or CONST_DECL.
+ The TEMPLATE_PARM_ORIG_LEVEL is the LEVEL of the most distant
+ parent, i.e., the LEVEL that the parameter originally had when it
+ was declared. For example, if we instantiate S<int>, we will have:
+
+ struct S<int>
+ {
+ template <class U, // Index 0, Level 1, Orig Level 2
+ class V> // Index 1, Level 1, Orig Level 2
+ void f();
+ };
+
+ The LEVEL is the level of the parameter when we are worrying about
+ the types of things; the ORIG_LEVEL is the level when we are
+ worrying about instantiating things. */
+DEFTREECODE (TEMPLATE_PARM_INDEX, "template_parm_index", tcc_exceptional, 0)
+
+/* Index into a template parameter list for template template parameters.
+ This parameter must be a type. The TYPE_FIELDS value will be a
+ TEMPLATE_PARM_INDEX.
+
+ It is used without template arguments like TT in C<TT>,
+ TEMPLATE_TEMPLATE_PARM_TEMPLATE_INFO is NULL_TREE
+ and TYPE_NAME is a TEMPLATE_DECL. */
+DEFTREECODE (TEMPLATE_TEMPLATE_PARM, "template_template_parm", tcc_type, 0)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. TEMPLATE_TYPE_PARM, TYPENAME_TYPE, TYPEOF_TYPE,
+ BOUND_TEMPLATE_TEMPLATE_PARM. */
+
+/* Index into a template parameter list. This parameter must be a type.
+ The type.values field will be a TEMPLATE_PARM_INDEX. */
+DEFTREECODE (TEMPLATE_TYPE_PARM, "template_type_parm", tcc_type, 0)
+
+/* A type designated by `typename T::t'. TYPE_CONTEXT is `T',
+ TYPE_NAME is an IDENTIFIER_NODE for `t'. If the type was named via
+ template-id, TYPENAME_TYPE_FULLNAME will hold the TEMPLATE_ID_EXPR.
+ TREE_TYPE is always NULL. */
+DEFTREECODE (TYPENAME_TYPE, "typename_type", tcc_type, 0)
+
+/* A type designated by `__typeof (expr)'. TYPEOF_TYPE_EXPR is the
+ expression in question. */
+DEFTREECODE (TYPEOF_TYPE, "typeof_type", tcc_type, 0)
+
+/* Like TEMPLATE_TEMPLATE_PARM it is used with bound template arguments
+ like TT<int>.
+ In this case, TEMPLATE_TEMPLATE_PARM_TEMPLATE_INFO contains the
+ template name and its bound arguments. TYPE_NAME is a TYPE_DECL. */
+DEFTREECODE (BOUND_TEMPLATE_TEMPLATE_PARM, "bound_template_template_parm",
+ tcc_type, 0)
+
+/* For template template argument of the form `T::template C'.
+ TYPE_CONTEXT is `T', the template parameter dependent object.
+ TYPE_NAME is an IDENTIFIER_NODE for `C', the member class template. */
+DEFTREECODE (UNBOUND_CLASS_TEMPLATE, "unbound_class_template", tcc_type, 0)
+
+/* A using declaration. USING_DECL_SCOPE contains the specified
+ scope. In a member using decl, unless DECL_DEPENDENT_P is true,
+ USING_DECL_DECLS contains the _DECL or OVERLOAD so named. This is
+ not an alias, but is later expanded into multiple aliases. */
+DEFTREECODE (USING_DECL, "using_decl", tcc_declaration, 0)
+
+/* A using directive. The operand is USING_STMT_NAMESPACE. */
+DEFTREECODE (USING_STMT, "using_directive", tcc_statement, 1)
+
+/* An un-parsed default argument. Holds a vector of input tokens and
+ a vector of places where the argument was instantiated before
+ parsing had occurred. */
+DEFTREECODE (DEFAULT_ARG, "default_arg", tcc_exceptional, 0)
+
+/* A template-id, like foo<int>. The first operand is the template.
+ The second is NULL if there are no explicit arguments, or a
+ TREE_VEC of arguments. The template will be a FUNCTION_DECL,
+ TEMPLATE_DECL, or an OVERLOAD. If the template-id refers to a
+ member template, the template may be an IDENTIFIER_NODE. */
+DEFTREECODE (TEMPLATE_ID_EXPR, "template_id_expr", tcc_expression, 2)
+
+/* A list-like node for chaining overloading candidates. TREE_TYPE is
+ the original name, and the parameter is the FUNCTION_DECL. */
+DEFTREECODE (OVERLOAD, "overload", tcc_exceptional, 0)
+
+/* A pseudo-destructor, of the form "OBJECT.~DESTRUCTOR" or
+ "OBJECT.SCOPE::~DESTRUCTOR. The first operand is the OBJECT. The
+ second operand (if non-NULL) is the SCOPE. The third operand is
+ the TYPE node corresponding to the DESTRUCTOR. The type of the
+ first operand will always be a scalar type.
+
+ The type of a PSEUDO_DTOR_EXPR is always "void", even though it can
+ be used as if it were a zero-argument function. We handle the
+ function-call case specially, and giving it "void" type prevents it
+ being used in expressions in ways that are not permitted. */
+DEFTREECODE (PSEUDO_DTOR_EXPR, "pseudo_dtor_expr", tcc_expression, 3)
+
+/* A whole bunch of tree codes for the initial, superficial parsing of
+ templates. */
+DEFTREECODE (MODOP_EXPR, "modop_expr", tcc_expression, 3)
+DEFTREECODE (CAST_EXPR, "cast_expr", tcc_unary, 1)
+DEFTREECODE (REINTERPRET_CAST_EXPR, "reinterpret_cast_expr", tcc_unary, 1)
+DEFTREECODE (CONST_CAST_EXPR, "const_cast_expr", tcc_unary, 1)
+DEFTREECODE (STATIC_CAST_EXPR, "static_cast_expr", tcc_unary, 1)
+DEFTREECODE (DYNAMIC_CAST_EXPR, "dynamic_cast_expr", tcc_unary, 1)
+DEFTREECODE (DOTSTAR_EXPR, "dotstar_expr", tcc_expression, 2)
+DEFTREECODE (TYPEID_EXPR, "typeid_expr", tcc_expression, 1)
+
+/* A placeholder for an expression that is not type-dependent, but
+ does occur in a template. When an expression that is not
+ type-dependent appears in a larger expression, we must compute the
+ type of that larger expression. That computation would normally
+ modify the original expression, which would change the mangling of
+ that expression if it appeared in a template argument list. In
+ that situation, we create a NON_DEPENDENT_EXPR to take the place of
+ the original expression. The expression is the only operand -- it
+ is only needed for diagnostics. */
+DEFTREECODE (NON_DEPENDENT_EXPR, "non_dependent_expr", tcc_expression, 1)
+
+/* CTOR_INITIALIZER is a placeholder in template code for a call to
+ setup_vtbl_pointer (and appears in all functions, not just ctors). */
+DEFTREECODE (CTOR_INITIALIZER, "ctor_initializer", tcc_expression, 1)
+
+DEFTREECODE (TRY_BLOCK, "try_block", tcc_statement, 2)
+
+DEFTREECODE (EH_SPEC_BLOCK, "eh_spec_block", tcc_statement, 2)
+
+/* A HANDLER wraps a catch handler for the HANDLER_TYPE. If this is
+ CATCH_ALL_TYPE, then the handler catches all types. The declaration of
+ the catch variable is in HANDLER_PARMS, and the body block in
+ HANDLER_BODY. */
+DEFTREECODE (HANDLER, "handler", tcc_statement, 2)
+
+/* A MUST_NOT_THROW_EXPR wraps an expression that may not
+ throw, and must call terminate if it does. */
+DEFTREECODE (MUST_NOT_THROW_EXPR, "must_not_throw_expr", tcc_expression, 1)
+
+/* A CLEANUP_STMT marks the point at which a declaration is fully
+ constructed. The CLEANUP_EXPR is run on behalf of CLEANUP_DECL
+ when CLEANUP_BODY completes. */
+DEFTREECODE (CLEANUP_STMT, "cleanup_stmt", tcc_statement, 3)
+
+/* Represents an 'if' statement. The operands are IF_COND,
+ THEN_CLAUSE, and ELSE_CLAUSE, respectively. */
+/* ??? It is currently still necessary to distinguish between IF_STMT
+ and COND_EXPR for the benefit of templates. */
+DEFTREECODE (IF_STMT, "if_stmt", tcc_statement, 3)
+
+/* Used to represent a `for' statement. The operands are
+ FOR_INIT_STMT, FOR_COND, FOR_EXPR, and FOR_BODY, respectively. */
+DEFTREECODE (FOR_STMT, "for_stmt", tcc_statement, 4)
+
+/* Used to represent a 'while' statement. The operands are WHILE_COND
+ and WHILE_BODY, respectively. */
+DEFTREECODE (WHILE_STMT, "while_stmt", tcc_statement, 2)
+
+/* Used to represent a 'do' statement. The operands are DO_BODY and
+ DO_COND, respectively. */
+DEFTREECODE (DO_STMT, "do_stmt", tcc_statement, 2)
+
+/* Used to represent a 'break' statement. */
+DEFTREECODE (BREAK_STMT, "break_stmt", tcc_statement, 0)
+
+/* Used to represent a 'continue' statement. */
+DEFTREECODE (CONTINUE_STMT, "continue_stmt", tcc_statement, 0)
+
+/* Used to represent a 'switch' statement. The operands are
+ SWITCH_STMT_COND, SWITCH_STMT_BODY and SWITCH_STMT_TYPE, respectively. */
+DEFTREECODE (SWITCH_STMT, "switch_stmt", tcc_statement, 3)
+
+/* Used to represent an expression statement. Use `EXPR_STMT_EXPR' to
+ obtain the expression. */
+DEFTREECODE (EXPR_STMT, "expr_stmt", tcc_expression, 1)
+
+DEFTREECODE (TAG_DEFN, "tag_defn", tcc_expression, 0)
+
+/* Represents an 'offsetof' expression during template expansion. */
+DEFTREECODE (OFFSETOF_EXPR, "offsetof_expr", tcc_expression, 1)
+
+/* Represents a 'sizeof' expression during template expansion. */
+DEFTREECODE (SIZEOF_EXPR, "sizeof_expr", tcc_expression, 1)
+
+/* Represents the -> operator during template expansion. */
+DEFTREECODE (ARROW_EXPR, "arrow_expr", tcc_expression, 1)
+
+/* Represents an '__alignof__' expression during template
+ expansion. */
+DEFTREECODE (ALIGNOF_EXPR, "alignof_expr", tcc_expression, 1)
+
+/* A STMT_EXPR represents a statement-expression during template
+ expansion. This is the GCC extension { ( ... ) }. The
+ STMT_EXPR_STMT is the statement given by the expression. */
+DEFTREECODE (STMT_EXPR, "stmt_expr", tcc_expression, 1)
+
+/* Unary plus. Operand 0 is the expression to which the unary plus
+ is applied. */
+DEFTREECODE (UNARY_PLUS_EXPR, "unary_plus_expr", tcc_unary, 1)
+
+/** C++0x extensions. */
+
+/* A static assertion. This is a C++0x extension.
+ STATIC_ASSERT_CONDITION contains the condition that is being
+ checked. STATIC_ASSERT_MESSAGE contains the message (a string
+ literal) to be displayed if the condition fails to hold. */
+DEFTREECODE (STATIC_ASSERT, "static_assert", tcc_exceptional, 0)
+
+/* Represents an argument pack of types (or templates). An argument
+ pack stores zero or more arguments that will be used to instantiate
+ a parameter pack.
+
+ ARGUMENT_PACK_ARGS retrieves the arguments stored in the argument
+ pack.
+
+ Example:
+ template<typename... Values>
+ class tuple { ... };
+
+ tuple<int, float, double> t;
+
+ Values is a (template) parameter pack. When tuple<int, float,
+ double> is instantiated, the Values parameter pack is instantiated
+ with the argument pack <int, float, double>. ARGUMENT_PACK_ARGS will
+ be a TREE_VEC containing int, float, and double. */
+DEFTREECODE (TYPE_ARGUMENT_PACK, "type_argument_pack", tcc_type, 0)
+
+/* Represents an argument pack of values, which can be used either for
+ non-type template arguments or function call arguments.
+
+ NONTYPE_ARGUMENT_PACK plays precisely the same role as
+ TYPE_ARGUMENT_PACK, but will be used for packing non-type template
+ arguments (e.g., "int... Dimensions") or function arguments ("const
+ Args&... args"). */
+DEFTREECODE (NONTYPE_ARGUMENT_PACK, "nontype_argument_pack", tcc_expression, 1)
+
+/* Represents a type expression that will be expanded into a list of
+ types when instantiated with one or more argument packs.
+
+ PACK_EXPANSION_PATTERN retrieves the expansion pattern. This is
+ the type or expression that we will substitute into with each
+ argument in an argument pack.
+
+ SET_PACK_EXPANSION_PATTERN sets the expansion pattern.
+
+ PACK_EXPANSION_PARAMETER_PACKS contains a TREE_LIST of the parameter
+ packs that are used in this pack expansion.
+
+ Example:
+ template<typename... Values>
+ struct tied : tuple<Values&...> {
+ // ...
+ };
+
+ The derivation from tuple contains a TYPE_PACK_EXPANSION for the
+ template arguments. Its EXPR_PACK_EXPANSION is "Values&" and its
+ PACK_EXPANSION_PARAMETER_PACKS will contain "Values". */
+DEFTREECODE (TYPE_PACK_EXPANSION, "type_pack_expansion", tcc_type, 0)
+
+/* Represents an expression that will be expanded into a list of
+ expressions when instantiated with one or more argument packs.
+
+ EXPR_PACK_EXPANSION plays precisely the same role as TYPE_PACK_EXPANSION,
+ but will be used for expressions. */
+DEFTREECODE (EXPR_PACK_EXPANSION, "expr_pack_expansion", tcc_expression, 1)
+
+/* Selects the Ith parameter out of an argument pack. This node will
+ be used when instantiating pack expansions; see
+ tsubst_pack_expansion.
+
+ ARGUMENT_PACK_SELECT_FROM_PACK contains the *_ARGUMENT_PACK node
+ from which the argument will be selected.
+
+ ARGUMENT_PACK_SELECT_INDEX contains the index into the argument
+ pack that will be returned by this ARGUMENT_PACK_SELECT node. The
+ index is a machine integer. */
+DEFTREECODE (ARGUMENT_PACK_SELECT, "argument_pack_select", tcc_exceptional, 0)
+
+/** C++ extensions. */
+
+/* Represents a trait expression during template expansion. */
+DEFTREECODE (TRAIT_EXPR, "trait_expr", tcc_exceptional, 0)
+
+/* The declared type of an expression. This is a C++0x extension.
+ DECLTYPE_TYPE_EXPR is the expression whose type we are computing.
+ DECLTYPE_TYPE_ID_EXPR_OR_MEMBER_ACCESS_P states whether the
+ expression was parsed as an id-expression or a member access
+ expression. When false, it was parsed as a full expression. */
+DEFTREECODE (DECLTYPE_TYPE, "decltype_type", tcc_type, 0)
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.h
new file mode 100644
index 0000000..29948c9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cp-tree.h
@@ -0,0 +1,5126 @@
+/* Definitions for C++ parsing and type checking.
+ Copyright (C) 1987, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Michael Tiemann (tiemann@cygnus.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CP_TREE_H
+#define GCC_CP_TREE_H
+
+#include "ggc.h"
+#include "function.h"
+#include "hashtab.h"
+#include "splay-tree.h"
+#include "vec.h"
+#include "varray.h"
+#include "c-common.h"
+#include "name-lookup.h"
+#include "l-ipo.h"
+
+/* In order for the format checking to accept the C++ front end
+ diagnostic framework extensions, you must include this file before
+ toplev.h, not after. We override the definition of GCC_DIAG_STYLE
+ in c-common.h. */
+#undef GCC_DIAG_STYLE
+#define GCC_DIAG_STYLE __gcc_cxxdiag__
+#if GCC_VERSION >= 4001
+#define ATTRIBUTE_GCC_CXXDIAG(m, n) __attribute__ ((__format__ (GCC_DIAG_STYLE, m, n))) ATTRIBUTE_NONNULL(m)
+#else
+#define ATTRIBUTE_GCC_CXXDIAG(m, n) ATTRIBUTE_NONNULL(m)
+#endif
+extern void cp_cpp_error (cpp_reader *, int,
+ const char *, va_list *)
+ ATTRIBUTE_GCC_CXXDIAG(3,0);
+#ifdef GCC_TOPLEV_H
+#error \
+In order for the format checking to accept the C++ front end diagnostic \
+framework extensions, you must include this file before toplev.h, not after.
+#endif
+#include "toplev.h"
+#include "diagnostic.h"
+
+/* Usage of TREE_LANG_FLAG_?:
+ 0: IDENTIFIER_MARKED (IDENTIFIER_NODEs)
+ NEW_EXPR_USE_GLOBAL (in NEW_EXPR).
+ DELETE_EXPR_USE_GLOBAL (in DELETE_EXPR).
+ COMPOUND_EXPR_OVERLOADED (in COMPOUND_EXPR).
+ TREE_INDIRECT_USING (in NAMESPACE_DECL).
+ CLEANUP_P (in TRY_BLOCK)
+ AGGR_INIT_VIA_CTOR_P (in AGGR_INIT_EXPR)
+ PTRMEM_OK_P (in ADDR_EXPR, OFFSET_REF)
+ PAREN_STRING_LITERAL (in STRING_CST)
+ DECL_PRETTY_FUNCTION_P (in VAR_DECL)
+ KOENIG_LOOKUP_P (in CALL_EXPR)
+ STATEMENT_LIST_NO_SCOPE (in STATEMENT_LIST).
+ EXPR_STMT_STMT_EXPR_RESULT (in EXPR_STMT)
+ STMT_EXPR_NO_SCOPE (in STMT_EXPR)
+ BIND_EXPR_TRY_BLOCK (in BIND_EXPR)
+ TYPENAME_IS_ENUM_P (in TYPENAME_TYPE)
+ REFERENCE_REF_P (in INDIRECT_EXPR)
+ QUALIFIED_NAME_IS_TEMPLATE (in SCOPE_REF)
+ OMP_FOR_GIMPLIFYING_P (in OMP_FOR)
+ BASELINK_QUALIFIED_P (in BASELINK)
+ TARGET_EXPR_IMPLICIT_P (in TARGET_EXPR)
+ TEMPLATE_PARM_PARAMETER_PACK (in TEMPLATE_PARM_INDEX)
+ TYPE_REF_IS_RVALUE (in REFERENCE_TYPE)
+ ATTR_IS_DEPENDENT (in the TREE_LIST for an attribute)
+ CONSTRUCTOR_IS_DIRECT_INIT (in CONSTRUCTOR)
+ 1: IDENTIFIER_VIRTUAL_P (in IDENTIFIER_NODE)
+ TI_PENDING_TEMPLATE_FLAG.
+ TEMPLATE_PARMS_FOR_INLINE.
+ DELETE_EXPR_USE_VEC (in DELETE_EXPR).
+ (TREE_CALLS_NEW) (in _EXPR or _REF) (commented-out).
+ ICS_ELLIPSIS_FLAG (in _CONV)
+ DECL_INITIALIZED_P (in VAR_DECL)
+ TYPENAME_IS_CLASS_P (in TYPENAME_TYPE)
+ STMT_IS_FULL_EXPR_P (in _STMT)
+ TARGET_EXPR_LIST_INIT_P (in TARGET_EXPR)
+ 2: IDENTIFIER_OPNAME_P (in IDENTIFIER_NODE)
+ ICS_THIS_FLAG (in _CONV)
+ DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (in VAR_DECL)
+ STATEMENT_LIST_TRY_BLOCK (in STATEMENT_LIST)
+ TYPENAME_IS_RESOLVING_P (in TYPE_NAME_TYPE)
+ 3: (TREE_REFERENCE_EXPR) (in NON_LVALUE_EXPR) (commented-out).
+ ICS_BAD_FLAG (in _CONV)
+ FN_TRY_BLOCK_P (in TRY_BLOCK)
+ IDENTIFIER_CTOR_OR_DTOR_P (in IDENTIFIER_NODE)
+ BIND_EXPR_BODY_BLOCK (in BIND_EXPR)
+ DECL_NON_TRIVIALLY_INITIALIZED_P (in VAR_DECL)
+ 4: TREE_HAS_CONSTRUCTOR (in INDIRECT_REF, SAVE_EXPR, CONSTRUCTOR,
+ or FIELD_DECL).
+ IDENTIFIER_TYPENAME_P (in IDENTIFIER_NODE)
+ DECL_TINFO_P (in VAR_DECL)
+ 5: C_IS_RESERVED_WORD (in IDENTIFIER_NODE)
+ DECL_VTABLE_OR_VTT_P (in VAR_DECL)
+ 6: IDENTIFIER_REPO_CHOSEN (in IDENTIFIER_NODE)
+ DECL_CONSTRUCTION_VTABLE_P (in VAR_DECL)
+ TYPE_MARKED_P (in _TYPE)
+
+ Usage of TYPE_LANG_FLAG_?:
+ 0: TYPE_DEPENDENT_P
+ 1: TYPE_HAS_USER_CONSTRUCTOR.
+ 2: Unused
+ 3: TYPE_FOR_JAVA.
+ 4: TYPE_HAS_NONTRIVIAL_DESTRUCTOR
+ 5: CLASS_TYPE_P (in RECORD_TYPE and UNION_TYPE)
+ SCOPED_ENUM_P (in ENUMERAL_TYPE)
+ 6: TYPE_DEPENDENT_P_VALID
+
+ Usage of DECL_LANG_FLAG_?:
+ 0: DECL_ERROR_REPORTED (in VAR_DECL).
+ DECL_TEMPLATE_PARM_P (in PARM_DECL, CONST_DECL, TYPE_DECL, or TEMPLATE_DECL)
+ DECL_LOCAL_FUNCTION_P (in FUNCTION_DECL)
+ DECL_MUTABLE_P (in FIELD_DECL)
+ DECL_DEPENDENT_P (in USING_DECL)
+ 1: C_TYPEDEF_EXPLICITLY_SIGNED (in TYPE_DECL).
+ DECL_TEMPLATE_INSTANTIATED (in a VAR_DECL or a FUNCTION_DECL)
+ DECL_MEMBER_TEMPLATE_P (in TEMPLATE_DECL)
+ FUNCTION_PARAMETER_PACK_P (in PARM_DECL)
+ 2: DECL_THIS_EXTERN (in VAR_DECL or FUNCTION_DECL).
+ DECL_IMPLICIT_TYPEDEF_P (in a TYPE_DECL)
+ 3: DECL_IN_AGGR_P.
+ 4: DECL_C_BIT_FIELD (in a FIELD_DECL)
+ DECL_ANON_UNION_VAR_P (in a VAR_DECL)
+ DECL_SELF_REFERENCE_P (in a TYPE_DECL)
+ DECL_INVALID_OVERRIDER_P (in a FUNCTION_DECL)
+ 5: DECL_INTERFACE_KNOWN.
+ 6: DECL_THIS_STATIC (in VAR_DECL or FUNCTION_DECL).
+ DECL_FIELD_IS_BASE (in FIELD_DECL)
+ 7: DECL_DEAD_FOR_LOCAL (in VAR_DECL).
+ DECL_THUNK_P (in a member FUNCTION_DECL)
+
+ Usage of language-independent fields in a language-dependent manner:
+
+ TYPE_ALIAS_SET
+ This field is used by TYPENAME_TYPEs, TEMPLATE_TYPE_PARMs, and so
+ forth as a substitute for the mark bits provided in `lang_type'.
+ At present, only the six low-order bits are used.
+
+ TYPE_LANG_SLOT_1
+ For an ENUMERAL_TYPE, this is ENUM_TEMPLATE_INFO.
+ For a FUNCTION_TYPE or METHOD_TYPE, this is TYPE_RAISES_EXCEPTIONS
+
+ BINFO_VIRTUALS
+ For a binfo, this is a TREE_LIST. There is an entry for each
+ virtual function declared either in BINFO or its direct and
+ indirect primary bases.
+
+ The BV_DELTA of each node gives the amount by which to adjust the
+ `this' pointer when calling the function. If the method is an
+ overridden version of a base class method, then it is assumed
+ that, prior to adjustment, the this pointer points to an object
+ of the base class.
+
+ The BV_VCALL_INDEX of each node, if non-NULL, gives the vtable
+ index of the vcall offset for this entry.
+
+ The BV_FN is the declaration for the virtual function itself.
+
+ BINFO_VTABLE
+ This is an expression with POINTER_TYPE that gives the value
+ to which the vptr should be initialized. Use get_vtbl_decl_for_binfo
+ to extract the VAR_DECL for the complete vtable.
+
+ DECL_VINDEX
+ This field is NULL for a non-virtual function. For a virtual
+ function, it is eventually set to an INTEGER_CST indicating the
+ index in the vtable at which this function can be found. When
+ a virtual function is declared, but before it is known what
+ function is overridden, this field is the error_mark_node.
+
+ Temporarily, it may be set to a TREE_LIST whose TREE_VALUE is
+ the virtual function this one overrides, and whose TREE_CHAIN is
+ the old DECL_VINDEX. */
+
+/* Language-specific tree checkers. */
+
+#define VAR_OR_FUNCTION_DECL_CHECK(NODE) \
+ TREE_CHECK2(NODE,VAR_DECL,FUNCTION_DECL)
+
+#define VAR_FUNCTION_OR_PARM_DECL_CHECK(NODE) \
+ TREE_CHECK3(NODE,VAR_DECL,FUNCTION_DECL,PARM_DECL)
+
+#define VAR_TEMPL_TYPE_OR_FUNCTION_DECL_CHECK(NODE) \
+ TREE_CHECK4(NODE,VAR_DECL,FUNCTION_DECL,TYPE_DECL,TEMPLATE_DECL)
+
+#define BOUND_TEMPLATE_TEMPLATE_PARM_TYPE_CHECK(NODE) \
+ TREE_CHECK(NODE,BOUND_TEMPLATE_TEMPLATE_PARM)
+
+#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
+#define NON_THUNK_FUNCTION_CHECK(NODE) __extension__ \
+({ __typeof(NODE) const __t = (NODE); \
+ if (TREE_CODE (__t) != FUNCTION_DECL && \
+ TREE_CODE (__t) != TEMPLATE_DECL && __t->decl_common.lang_specific \
+ && __t->decl_common.lang_specific->decl_flags.thunk_p) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, 0); \
+ __t; })
+#define THUNK_FUNCTION_CHECK(NODE) __extension__ \
+({ __typeof (NODE) const __t = (NODE); \
+ if (TREE_CODE (__t) != FUNCTION_DECL || !__t->decl_common.lang_specific \
+ || !__t->decl_common.lang_specific->decl_flags.thunk_p) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, 0); \
+ __t; })
+#else
+#define NON_THUNK_FUNCTION_CHECK(NODE) (NODE)
+#define THUNK_FUNCTION_CHECK(NODE) (NODE)
+#endif
+
+/* Language-dependent contents of an identifier. */
+
+struct lang_identifier GTY(())
+{
+ struct c_common_identifier c_common;
+ cxx_binding *namespace_bindings;
+ cxx_binding *bindings;
+ tree class_template_info;
+ tree label_value;
+};
+
+/* In an IDENTIFIER_NODE, nonzero if this identifier is actually a
+ keyword. C_RID_CODE (node) is then the RID_* value of the keyword,
+ and C_RID_YYCODE is the token number wanted by Yacc. */
+
+#define C_IS_RESERVED_WORD(ID) TREE_LANG_FLAG_5 (ID)
+
+#define LANG_IDENTIFIER_CAST(NODE) \
+ ((struct lang_identifier*)IDENTIFIER_NODE_CHECK (NODE))
+
+struct template_parm_index_s GTY(())
+{
+ struct tree_common common;
+ int index;
+ int level;
+ int orig_level;
+ tree decl;
+};
+typedef struct template_parm_index_s template_parm_index;
+
+struct ptrmem_cst GTY(())
+{
+ struct tree_common common;
+ /* This isn't used, but the middle-end expects all constants to have
+ this field. */
+ rtx rtl;
+ tree member;
+};
+typedef struct ptrmem_cst * ptrmem_cst_t;
+
+#define IDENTIFIER_GLOBAL_VALUE(NODE) \
+ namespace_binding ((NODE), global_namespace)
+#define SET_IDENTIFIER_GLOBAL_VALUE(NODE, VAL) \
+ set_namespace_binding ((NODE), global_namespace, (VAL))
+#define IDENTIFIER_NAMESPACE_VALUE(NODE) \
+ namespace_binding ((NODE), current_namespace)
+#define SET_IDENTIFIER_NAMESPACE_VALUE(NODE, VAL) \
+ set_namespace_binding ((NODE), current_namespace, (VAL))
+
+#define CLEANUP_P(NODE) TREE_LANG_FLAG_0 (TRY_BLOCK_CHECK (NODE))
+
+#define BIND_EXPR_TRY_BLOCK(NODE) \
+ TREE_LANG_FLAG_0 (BIND_EXPR_CHECK (NODE))
+
+/* Used to mark the block around the member initializers and cleanups. */
+#define BIND_EXPR_BODY_BLOCK(NODE) \
+ TREE_LANG_FLAG_3 (BIND_EXPR_CHECK (NODE))
+#define FUNCTION_NEEDS_BODY_BLOCK(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) || DECL_DESTRUCTOR_P (NODE))
+
+#define STATEMENT_LIST_NO_SCOPE(NODE) \
+ TREE_LANG_FLAG_0 (STATEMENT_LIST_CHECK (NODE))
+#define STATEMENT_LIST_TRY_BLOCK(NODE) \
+ TREE_LANG_FLAG_2 (STATEMENT_LIST_CHECK (NODE))
+
+/* Nonzero if this statement should be considered a full-expression,
+ i.e., if temporaries created during this statement should have
+ their destructors run at the end of this statement. */
+#define STMT_IS_FULL_EXPR_P(NODE) TREE_LANG_FLAG_1 ((NODE))
+
+/* Marks the result of a statement expression. */
+#define EXPR_STMT_STMT_EXPR_RESULT(NODE) \
+ TREE_LANG_FLAG_0 (EXPR_STMT_CHECK (NODE))
+
+/* Nonzero if this statement-expression does not have an associated scope. */
+#define STMT_EXPR_NO_SCOPE(NODE) \
+ TREE_LANG_FLAG_0 (STMT_EXPR_CHECK (NODE))
+
+/* Returns nonzero iff TYPE1 and TYPE2 are the same type, in the usual
+ sense of `same'. */
+#define same_type_p(TYPE1, TYPE2) \
+ comptypes ((TYPE1), (TYPE2), COMPARE_STRICT)
+
+/* Returns nonzero iff TYPE1 and TYPE2 are the same type, ignoring
+ top-level qualifiers. */
+#define same_type_ignoring_top_level_qualifiers_p(TYPE1, TYPE2) \
+ same_type_p (TYPE_MAIN_VARIANT (TYPE1), TYPE_MAIN_VARIANT (TYPE2))
+
+/* Nonzero if we are presently building a statement tree, rather
+ than expanding each statement as we encounter it. */
+#define building_stmt_tree() (cur_stmt_list != NULL_TREE)
+
+/* Returns nonzero iff NODE is a declaration for the global function
+ `main'. */
+#define DECL_MAIN_P(NODE) \
+ (DECL_EXTERN_C_FUNCTION_P (NODE) \
+ && DECL_NAME (NODE) != NULL_TREE \
+ && MAIN_NAME_P (DECL_NAME (NODE)) \
+ && flag_hosted)
+
+/* The overloaded FUNCTION_DECL. */
+#define OVL_FUNCTION(NODE) \
+ (((struct tree_overload*)OVERLOAD_CHECK (NODE))->function)
+#define OVL_CHAIN(NODE) TREE_CHAIN (NODE)
+/* Polymorphic access to FUNCTION and CHAIN. */
+#define OVL_CURRENT(NODE) \
+ ((TREE_CODE (NODE) == OVERLOAD) ? OVL_FUNCTION (NODE) : (NODE))
+#define OVL_NEXT(NODE) \
+ ((TREE_CODE (NODE) == OVERLOAD) ? TREE_CHAIN (NODE) : NULL_TREE)
+/* If set, this was imported in a using declaration.
+ This is not to confuse with being used somewhere, which
+ is not important for this node. */
+#define OVL_USED(NODE) TREE_USED (NODE)
+
+struct tree_overload GTY(())
+{
+ struct tree_common common;
+ tree function;
+};
+
+/* Returns true iff NODE is a BASELINK. */
+#define BASELINK_P(NODE) \
+ (TREE_CODE (NODE) == BASELINK)
+/* The BINFO indicating the base from which the BASELINK_FUNCTIONS came. */
+#define BASELINK_BINFO(NODE) \
+ (((struct tree_baselink*) BASELINK_CHECK (NODE))->binfo)
+/* The functions referred to by the BASELINK; either a FUNCTION_DECL,
+ a TEMPLATE_DECL, an OVERLOAD, or a TEMPLATE_ID_EXPR. */
+#define BASELINK_FUNCTIONS(NODE) \
+ (((struct tree_baselink*) BASELINK_CHECK (NODE))->functions)
+/* The BINFO in which the search for the functions indicated by this baselink
+ began. This base is used to determine the accessibility of functions
+ selected by overload resolution. */
+#define BASELINK_ACCESS_BINFO(NODE) \
+ (((struct tree_baselink*) BASELINK_CHECK (NODE))->access_binfo)
+/* For a type-conversion operator, the BASELINK_OPTYPE indicates the type
+ to which the conversion should occur. This value is important if
+ the BASELINK_FUNCTIONS include a template conversion operator --
+ the BASELINK_OPTYPE can be used to determine what type the user
+ requested. */
+#define BASELINK_OPTYPE(NODE) \
+ (TREE_CHAIN (BASELINK_CHECK (NODE)))
+/* Nonzero if this baselink was from a qualified lookup. */
+#define BASELINK_QUALIFIED_P(NODE) \
+ TREE_LANG_FLAG_0 (BASELINK_CHECK (NODE))
+
+struct tree_baselink GTY(())
+{
+ struct tree_common common;
+ tree binfo;
+ tree functions;
+ tree access_binfo;
+};
+
+/* The different kinds of ids that we encounter. */
+
+typedef enum cp_id_kind
+{
+ /* Not an id at all. */
+ CP_ID_KIND_NONE,
+ /* An unqualified-id that is not a template-id. */
+ CP_ID_KIND_UNQUALIFIED,
+ /* An unqualified-id that is a dependent name. */
+ CP_ID_KIND_UNQUALIFIED_DEPENDENT,
+ /* An unqualified template-id. */
+ CP_ID_KIND_TEMPLATE_ID,
+ /* A qualified-id. */
+ CP_ID_KIND_QUALIFIED
+} cp_id_kind;
+
+/* Macros for access to language-specific slots in an identifier. */
+
+#define IDENTIFIER_NAMESPACE_BINDINGS(NODE) \
+ (LANG_IDENTIFIER_CAST (NODE)->namespace_bindings)
+#define IDENTIFIER_TEMPLATE(NODE) \
+ (LANG_IDENTIFIER_CAST (NODE)->class_template_info)
+
+/* The IDENTIFIER_BINDING is the innermost cxx_binding for the
+ identifier. It's PREVIOUS is the next outermost binding. Each
+ VALUE field is a DECL for the associated declaration. Thus,
+ name lookup consists simply of pulling off the node at the front
+ of the list (modulo oddities for looking up the names of types,
+ and such.) You can use SCOPE field to determine the scope
+ that bound the name. */
+#define IDENTIFIER_BINDING(NODE) \
+ (LANG_IDENTIFIER_CAST (NODE)->bindings)
+
+/* TREE_TYPE only indicates on local and class scope the current
+ type. For namespace scope, the presence of a type in any namespace
+ is indicated with global_type_node, and the real type behind must
+ be found through lookup. */
+#define IDENTIFIER_TYPE_VALUE(NODE) identifier_type_value (NODE)
+#define REAL_IDENTIFIER_TYPE_VALUE(NODE) TREE_TYPE (NODE)
+#define SET_IDENTIFIER_TYPE_VALUE(NODE,TYPE) (TREE_TYPE (NODE) = (TYPE))
+#define IDENTIFIER_HAS_TYPE_VALUE(NODE) (IDENTIFIER_TYPE_VALUE (NODE) ? 1 : 0)
+
+#define IDENTIFIER_LABEL_VALUE(NODE) \
+ (LANG_IDENTIFIER_CAST (NODE)->label_value)
+#define SET_IDENTIFIER_LABEL_VALUE(NODE, VALUE) \
+ IDENTIFIER_LABEL_VALUE (NODE) = (VALUE)
+
+/* Nonzero if this identifier is used as a virtual function name somewhere
+ (optimizes searches). */
+#define IDENTIFIER_VIRTUAL_P(NODE) TREE_LANG_FLAG_1 (NODE)
+
+/* Nonzero if this identifier is the prefix for a mangled C++ operator
+ name. */
+#define IDENTIFIER_OPNAME_P(NODE) TREE_LANG_FLAG_2 (NODE)
+
+/* Nonzero if this identifier is the name of a type-conversion
+ operator. */
+#define IDENTIFIER_TYPENAME_P(NODE) \
+ TREE_LANG_FLAG_4 (NODE)
+
+/* Nonzero if this identifier is the name of a constructor or
+ destructor. */
+#define IDENTIFIER_CTOR_OR_DTOR_P(NODE) \
+ TREE_LANG_FLAG_3 (NODE)
+
+/* True iff NAME is the DECL_ASSEMBLER_NAME for an entity with vague
+ linkage which the prelinker has assigned to this translation
+ unit. */
+#define IDENTIFIER_REPO_CHOSEN(NAME) \
+ (TREE_LANG_FLAG_6 (NAME))
+
+/* In a RECORD_TYPE or UNION_TYPE, nonzero if any component is read-only. */
+#define C_TYPE_FIELDS_READONLY(TYPE) \
+ (LANG_TYPE_CLASS_CHECK (TYPE)->fields_readonly)
+
+/* The tokens stored in the default argument. */
+
+#define DEFARG_TOKENS(NODE) \
+ (((struct tree_default_arg *)DEFAULT_ARG_CHECK (NODE))->tokens)
+#define DEFARG_INSTANTIATIONS(NODE) \
+ (((struct tree_default_arg *)DEFAULT_ARG_CHECK (NODE))->instantiations)
+
+struct tree_default_arg GTY (())
+{
+ struct tree_common common;
+ struct cp_token_cache *tokens;
+ VEC(tree,gc) *instantiations;
+};
+
+/* The condition associated with the static assertion. This must be
+ an integral constant expression. */
+#define STATIC_ASSERT_CONDITION(NODE) \
+ (((struct tree_static_assert *)STATIC_ASSERT_CHECK (NODE))->condition)
+
+/* The message associated with the static assertion. This must be a
+ string constant, which will be emitted as an error message when the
+ static assert condition is false. */
+#define STATIC_ASSERT_MESSAGE(NODE) \
+ (((struct tree_static_assert *)STATIC_ASSERT_CHECK (NODE))->message)
+
+/* Source location information for a static assertion. */
+#define STATIC_ASSERT_SOURCE_LOCATION(NODE) \
+ (((struct tree_static_assert *)STATIC_ASSERT_CHECK (NODE))->location)
+
+struct tree_static_assert GTY (())
+{
+ struct tree_common common;
+ tree condition;
+ tree message;
+ location_t location;
+};
+
+struct tree_argument_pack_select GTY (())
+{
+ struct tree_common common;
+ tree argument_pack;
+ int index;
+};
+
+/* The different kinds of traits that we encounter. */
+
+typedef enum cp_trait_kind
+{
+ CPTK_HAS_NOTHROW_ASSIGN,
+ CPTK_HAS_NOTHROW_CONSTRUCTOR,
+ CPTK_HAS_NOTHROW_COPY,
+ CPTK_HAS_TRIVIAL_ASSIGN,
+ CPTK_HAS_TRIVIAL_CONSTRUCTOR,
+ CPTK_HAS_TRIVIAL_COPY,
+ CPTK_HAS_TRIVIAL_DESTRUCTOR,
+ CPTK_HAS_VIRTUAL_DESTRUCTOR,
+ CPTK_IS_ABSTRACT,
+ CPTK_IS_BASE_OF,
+ CPTK_IS_CLASS,
+ CPTK_IS_CONVERTIBLE_TO,
+ CPTK_IS_EMPTY,
+ CPTK_IS_ENUM,
+ CPTK_IS_POD,
+ CPTK_IS_POLYMORPHIC,
+ CPTK_IS_UNION
+} cp_trait_kind;
+
+/* The types that we are processing. */
+#define TRAIT_EXPR_TYPE1(NODE) \
+ (((struct tree_trait_expr *)TRAIT_EXPR_CHECK (NODE))->type1)
+
+#define TRAIT_EXPR_TYPE2(NODE) \
+ (((struct tree_trait_expr *)TRAIT_EXPR_CHECK (NODE))->type2)
+
+/* The specific trait that we are processing. */
+#define TRAIT_EXPR_KIND(NODE) \
+ (((struct tree_trait_expr *)TRAIT_EXPR_CHECK (NODE))->kind)
+
+struct tree_trait_expr GTY (())
+{
+ struct tree_common common;
+ tree type1;
+ tree type2;
+ enum cp_trait_kind kind;
+};
+
+enum cp_tree_node_structure_enum {
+ TS_CP_GENERIC,
+ TS_CP_IDENTIFIER,
+ TS_CP_TPI,
+ TS_CP_PTRMEM,
+ TS_CP_BINDING,
+ TS_CP_OVERLOAD,
+ TS_CP_BASELINK,
+ TS_CP_WRAPPER,
+ TS_CP_DEFAULT_ARG,
+ TS_CP_STATIC_ASSERT,
+ TS_CP_ARGUMENT_PACK_SELECT,
+ TS_CP_TRAIT_EXPR,
+ LAST_TS_CP_ENUM
+};
+
+/* The resulting tree type. */
+union lang_tree_node GTY((desc ("cp_tree_node_structure (&%h)"),
+ chain_next ("(union lang_tree_node *)TREE_CHAIN (&%h.generic)")))
+{
+ union tree_node GTY ((tag ("TS_CP_GENERIC"),
+ desc ("tree_node_structure (&%h)"))) generic;
+ struct template_parm_index_s GTY ((tag ("TS_CP_TPI"))) tpi;
+ struct ptrmem_cst GTY ((tag ("TS_CP_PTRMEM"))) ptrmem;
+ struct tree_overload GTY ((tag ("TS_CP_OVERLOAD"))) overload;
+ struct tree_baselink GTY ((tag ("TS_CP_BASELINK"))) baselink;
+ struct tree_default_arg GTY ((tag ("TS_CP_DEFAULT_ARG"))) default_arg;
+ struct lang_identifier GTY ((tag ("TS_CP_IDENTIFIER"))) identifier;
+ struct tree_static_assert GTY ((tag ("TS_CP_STATIC_ASSERT")))
+ static_assertion;
+ struct tree_argument_pack_select GTY ((tag ("TS_CP_ARGUMENT_PACK_SELECT")))
+ argument_pack_select;
+ struct tree_trait_expr GTY ((tag ("TS_CP_TRAIT_EXPR")))
+ trait_expression;
+};
+
+
+enum cp_tree_index
+{
+ CPTI_JAVA_BYTE_TYPE,
+ CPTI_JAVA_SHORT_TYPE,
+ CPTI_JAVA_INT_TYPE,
+ CPTI_JAVA_LONG_TYPE,
+ CPTI_JAVA_FLOAT_TYPE,
+ CPTI_JAVA_DOUBLE_TYPE,
+ CPTI_JAVA_CHAR_TYPE,
+ CPTI_JAVA_BOOLEAN_TYPE,
+
+ CPTI_WCHAR_DECL,
+ CPTI_VTABLE_ENTRY_TYPE,
+ CPTI_DELTA_TYPE,
+ CPTI_VTABLE_INDEX_TYPE,
+ CPTI_CLEANUP_TYPE,
+ CPTI_VTT_PARM_TYPE,
+
+ CPTI_CLASS_TYPE,
+ CPTI_UNKNOWN_TYPE,
+ CPTI_INIT_LIST_TYPE,
+ CPTI_VTBL_TYPE,
+ CPTI_VTBL_PTR_TYPE,
+ CPTI_STD,
+ CPTI_ABI,
+ CPTI_CONST_TYPE_INFO_TYPE,
+ CPTI_TYPE_INFO_PTR_TYPE,
+ CPTI_ABORT_FNDECL,
+ CPTI_GLOBAL_DELETE_FNDECL,
+ CPTI_AGGR_TAG,
+
+ CPTI_CTOR_IDENTIFIER,
+ CPTI_COMPLETE_CTOR_IDENTIFIER,
+ CPTI_BASE_CTOR_IDENTIFIER,
+ CPTI_DTOR_IDENTIFIER,
+ CPTI_COMPLETE_DTOR_IDENTIFIER,
+ CPTI_BASE_DTOR_IDENTIFIER,
+ CPTI_DELETING_DTOR_IDENTIFIER,
+ CPTI_DELTA_IDENTIFIER,
+ CPTI_IN_CHARGE_IDENTIFIER,
+ CPTI_VTT_PARM_IDENTIFIER,
+ CPTI_NELTS_IDENTIFIER,
+ CPTI_THIS_IDENTIFIER,
+ CPTI_PFN_IDENTIFIER,
+ CPTI_VPTR_IDENTIFIER,
+ CPTI_STD_IDENTIFIER,
+
+ CPTI_LANG_NAME_C,
+ CPTI_LANG_NAME_CPLUSPLUS,
+ CPTI_LANG_NAME_JAVA,
+
+ CPTI_EMPTY_EXCEPT_SPEC,
+ CPTI_JCLASS,
+ CPTI_TERMINATE,
+ CPTI_CALL_UNEXPECTED,
+ CPTI_ATEXIT_FN_PTR_TYPE,
+ CPTI_ATEXIT,
+ CPTI_DSO_HANDLE,
+ CPTI_DCAST,
+
+ CPTI_KEYED_CLASSES,
+
+ CPTI_MAX
+};
+
+extern GTY(()) tree cp_global_trees[CPTI_MAX];
+
+#define java_byte_type_node cp_global_trees[CPTI_JAVA_BYTE_TYPE]
+#define java_short_type_node cp_global_trees[CPTI_JAVA_SHORT_TYPE]
+#define java_int_type_node cp_global_trees[CPTI_JAVA_INT_TYPE]
+#define java_long_type_node cp_global_trees[CPTI_JAVA_LONG_TYPE]
+#define java_float_type_node cp_global_trees[CPTI_JAVA_FLOAT_TYPE]
+#define java_double_type_node cp_global_trees[CPTI_JAVA_DOUBLE_TYPE]
+#define java_char_type_node cp_global_trees[CPTI_JAVA_CHAR_TYPE]
+#define java_boolean_type_node cp_global_trees[CPTI_JAVA_BOOLEAN_TYPE]
+
+#define wchar_decl_node cp_global_trees[CPTI_WCHAR_DECL]
+#define vtable_entry_type cp_global_trees[CPTI_VTABLE_ENTRY_TYPE]
+/* The type used to represent an offset by which to adjust the `this'
+ pointer in pointer-to-member types. */
+#define delta_type_node cp_global_trees[CPTI_DELTA_TYPE]
+/* The type used to represent an index into the vtable. */
+#define vtable_index_type cp_global_trees[CPTI_VTABLE_INDEX_TYPE]
+
+#define class_type_node cp_global_trees[CPTI_CLASS_TYPE]
+#define unknown_type_node cp_global_trees[CPTI_UNKNOWN_TYPE]
+#define init_list_type_node cp_global_trees[CPTI_INIT_LIST_TYPE]
+#define vtbl_type_node cp_global_trees[CPTI_VTBL_TYPE]
+#define vtbl_ptr_type_node cp_global_trees[CPTI_VTBL_PTR_TYPE]
+#define std_node cp_global_trees[CPTI_STD]
+#define abi_node cp_global_trees[CPTI_ABI]
+#define const_type_info_type_node cp_global_trees[CPTI_CONST_TYPE_INFO_TYPE]
+#define type_info_ptr_type cp_global_trees[CPTI_TYPE_INFO_PTR_TYPE]
+#define abort_fndecl cp_global_trees[CPTI_ABORT_FNDECL]
+#define global_delete_fndecl cp_global_trees[CPTI_GLOBAL_DELETE_FNDECL]
+#define current_aggr cp_global_trees[CPTI_AGGR_TAG]
+
+/* We cache these tree nodes so as to call get_identifier less
+ frequently. */
+
+/* The name of a constructor that takes an in-charge parameter to
+ decide whether or not to construct virtual base classes. */
+#define ctor_identifier cp_global_trees[CPTI_CTOR_IDENTIFIER]
+/* The name of a constructor that constructs virtual base classes. */
+#define complete_ctor_identifier cp_global_trees[CPTI_COMPLETE_CTOR_IDENTIFIER]
+/* The name of a constructor that does not construct virtual base classes. */
+#define base_ctor_identifier cp_global_trees[CPTI_BASE_CTOR_IDENTIFIER]
+/* The name of a destructor that takes an in-charge parameter to
+ decide whether or not to destroy virtual base classes and whether
+ or not to delete the object. */
+#define dtor_identifier cp_global_trees[CPTI_DTOR_IDENTIFIER]
+/* The name of a destructor that destroys virtual base classes. */
+#define complete_dtor_identifier cp_global_trees[CPTI_COMPLETE_DTOR_IDENTIFIER]
+/* The name of a destructor that does not destroy virtual base
+ classes. */
+#define base_dtor_identifier cp_global_trees[CPTI_BASE_DTOR_IDENTIFIER]
+/* The name of a destructor that destroys virtual base classes, and
+ then deletes the entire object. */
+#define deleting_dtor_identifier cp_global_trees[CPTI_DELETING_DTOR_IDENTIFIER]
+#define delta_identifier cp_global_trees[CPTI_DELTA_IDENTIFIER]
+#define in_charge_identifier cp_global_trees[CPTI_IN_CHARGE_IDENTIFIER]
+/* The name of the parameter that contains a pointer to the VTT to use
+ for this subobject constructor or destructor. */
+#define vtt_parm_identifier cp_global_trees[CPTI_VTT_PARM_IDENTIFIER]
+#define nelts_identifier cp_global_trees[CPTI_NELTS_IDENTIFIER]
+#define this_identifier cp_global_trees[CPTI_THIS_IDENTIFIER]
+#define pfn_identifier cp_global_trees[CPTI_PFN_IDENTIFIER]
+#define vptr_identifier cp_global_trees[CPTI_VPTR_IDENTIFIER]
+/* The name of the std namespace. */
+#define std_identifier cp_global_trees[CPTI_STD_IDENTIFIER]
+#define lang_name_c cp_global_trees[CPTI_LANG_NAME_C]
+#define lang_name_cplusplus cp_global_trees[CPTI_LANG_NAME_CPLUSPLUS]
+#define lang_name_java cp_global_trees[CPTI_LANG_NAME_JAVA]
+
+/* Exception specifier used for throw(). */
+#define empty_except_spec cp_global_trees[CPTI_EMPTY_EXCEPT_SPEC]
+
+/* If non-NULL, a POINTER_TYPE equivalent to (java::lang::Class*). */
+#define jclass_node cp_global_trees[CPTI_JCLASS]
+
+/* The declaration for `std::terminate'. */
+#define terminate_node cp_global_trees[CPTI_TERMINATE]
+
+/* The declaration for "__cxa_call_unexpected". */
+#define call_unexpected_node cp_global_trees[CPTI_CALL_UNEXPECTED]
+
+/* The type of the function-pointer argument to "__cxa_atexit" (or
+ "std::atexit", if "__cxa_atexit" is not being used). */
+#define atexit_fn_ptr_type_node cp_global_trees[CPTI_ATEXIT_FN_PTR_TYPE]
+
+/* A pointer to `std::atexit'. */
+#define atexit_node cp_global_trees[CPTI_ATEXIT]
+
+/* A pointer to `__dso_handle'. */
+#define dso_handle_node cp_global_trees[CPTI_DSO_HANDLE]
+
+/* The declaration of the dynamic_cast runtime. */
+#define dynamic_cast_node cp_global_trees[CPTI_DCAST]
+
+/* The type of a destructor. */
+#define cleanup_type cp_global_trees[CPTI_CLEANUP_TYPE]
+
+/* The type of the vtt parameter passed to subobject constructors and
+ destructors. */
+#define vtt_parm_type cp_global_trees[CPTI_VTT_PARM_TYPE]
+
+/* A TREE_LIST of the dynamic classes whose vtables may have to be
+ emitted in this translation unit. */
+
+#define keyed_classes cp_global_trees[CPTI_KEYED_CLASSES]
+
+/* Node to indicate default access. This must be distinct from the
+ access nodes in tree.h. */
+
+#define access_default_node null_node
+
+/* Global state. */
+
+struct saved_scope GTY(())
+{
+ VEC(cxx_saved_binding,gc) *old_bindings;
+ tree old_namespace;
+ tree decl_ns_list;
+ tree class_name;
+ tree class_type;
+ tree access_specifier;
+ tree function_decl;
+ VEC(tree,gc) *lang_base;
+ tree lang_name;
+ tree template_parms;
+ struct cp_binding_level *x_previous_class_level;
+ tree x_saved_tree;
+
+ int x_processing_template_decl;
+ int x_processing_specialization;
+ BOOL_BITFIELD x_processing_explicit_instantiation : 1;
+ BOOL_BITFIELD need_pop_function_context : 1;
+ BOOL_BITFIELD skip_evaluation : 1;
+
+ struct stmt_tree_s x_stmt_tree;
+
+ struct cp_binding_level *class_bindings;
+ struct cp_binding_level *bindings;
+
+ struct saved_scope *prev;
+};
+
+/* The current open namespace. */
+
+#define current_namespace scope_chain->old_namespace
+
+/* The stack for namespaces of current declarations. */
+
+#define decl_namespace_list scope_chain->decl_ns_list
+
+/* IDENTIFIER_NODE: name of current class */
+
+#define current_class_name scope_chain->class_name
+
+/* _TYPE: the type of the current class */
+
+#define current_class_type scope_chain->class_type
+
+/* When parsing a class definition, the access specifier most recently
+ given by the user, or, if no access specifier was given, the
+ default value appropriate for the kind of class (i.e., struct,
+ class, or union). */
+
+#define current_access_specifier scope_chain->access_specifier
+
+/* Pointer to the top of the language name stack. */
+
+#define current_lang_base scope_chain->lang_base
+#define current_lang_name scope_chain->lang_name
+
+/* When parsing a template declaration, a TREE_LIST represents the
+ active template parameters. Each node in the list represents one
+ level of template parameters. The innermost level is first in the
+ list. The depth of each level is stored as an INTEGER_CST in the
+ TREE_PURPOSE of each node. The parameters for that level are
+ stored in the TREE_VALUE. */
+
+#define current_template_parms scope_chain->template_parms
+
+#define processing_template_decl scope_chain->x_processing_template_decl
+#define processing_specialization scope_chain->x_processing_specialization
+#define processing_explicit_instantiation scope_chain->x_processing_explicit_instantiation
+
+/* The cached class binding level, from the most recently exited
+ class, or NULL if none. */
+
+#define previous_class_level scope_chain->x_previous_class_level
+
+/* A list of private types mentioned, for deferred access checking. */
+
+extern GTY(()) struct saved_scope *scope_chain;
+
+struct cxx_int_tree_map GTY(())
+{
+ unsigned int uid;
+ tree to;
+};
+
+extern unsigned int cxx_int_tree_map_hash (const void *);
+extern int cxx_int_tree_map_eq (const void *, const void *);
+
+/* Global state pertinent to the current function. */
+
+struct language_function GTY(())
+{
+ struct c_language_function base;
+
+ tree x_cdtor_label;
+ tree x_current_class_ptr;
+ tree x_current_class_ref;
+ tree x_eh_spec_block;
+ tree x_in_charge_parm;
+ tree x_vtt_parm;
+ tree x_return_value;
+
+ BOOL_BITFIELD returns_value : 1;
+ BOOL_BITFIELD returns_null : 1;
+ BOOL_BITFIELD returns_abnormally : 1;
+ BOOL_BITFIELD in_function_try_handler : 1;
+ BOOL_BITFIELD in_base_initializer : 1;
+
+ /* True if this function can throw an exception. */
+ BOOL_BITFIELD can_throw : 1;
+
+ htab_t GTY((param_is(struct named_label_entry))) x_named_labels;
+ struct cp_binding_level *bindings;
+ VEC(tree,gc) *x_local_names;
+ htab_t GTY((param_is (struct cxx_int_tree_map))) extern_decl_map;
+};
+
+/* The current C++-specific per-function global variables. */
+
+#define cp_function_chain (cfun->language)
+
+/* In a constructor destructor, the point at which all derived class
+ destroying/construction has been done. I.e., just before a
+ constructor returns, or before any base class destroying will be done
+ in a destructor. */
+
+#define cdtor_label cp_function_chain->x_cdtor_label
+
+/* When we're processing a member function, current_class_ptr is the
+ PARM_DECL for the `this' pointer. The current_class_ref is an
+ expression for `*this'. */
+
+#define current_class_ptr \
+ (cfun && cp_function_chain \
+ ? cp_function_chain->x_current_class_ptr : NULL_TREE)
+#define current_class_ref \
+ (cfun ? cp_function_chain->x_current_class_ref : NULL_TREE)
+
+/* The EH_SPEC_BLOCK for the exception-specifiers for the current
+ function, if any. */
+
+#define current_eh_spec_block cp_function_chain->x_eh_spec_block
+
+/* The `__in_chrg' parameter for the current function. Only used for
+ constructors and destructors. */
+
+#define current_in_charge_parm cp_function_chain->x_in_charge_parm
+
+/* The `__vtt_parm' parameter for the current function. Only used for
+ constructors and destructors. */
+
+#define current_vtt_parm cp_function_chain->x_vtt_parm
+
+/* Set to 0 at beginning of a function definition, set to 1 if
+ a return statement that specifies a return value is seen. */
+
+#define current_function_returns_value cp_function_chain->returns_value
+
+/* Set to 0 at beginning of a function definition, set to 1 if
+ a return statement with no argument is seen. */
+
+#define current_function_returns_null cp_function_chain->returns_null
+
+/* Set to 0 at beginning of a function definition, set to 1 if
+ a call to a noreturn function is seen. */
+
+#define current_function_returns_abnormally \
+ cp_function_chain->returns_abnormally
+
+/* Nonzero if we are processing a base initializer. Zero elsewhere. */
+#define in_base_initializer cp_function_chain->in_base_initializer
+
+#define in_function_try_handler cp_function_chain->in_function_try_handler
+
+/* Expression always returned from function, or error_mark_node
+ otherwise, for use by the automatic named return value optimization. */
+
+#define current_function_return_value \
+ (cp_function_chain->x_return_value)
+
+/* True if NAME is the IDENTIFIER_NODE for an overloaded "operator
+ new" or "operator delete". */
+#define NEW_DELETE_OPNAME_P(NAME) \
+ ((NAME) == ansi_opname (NEW_EXPR) \
+ || (NAME) == ansi_opname (VEC_NEW_EXPR) \
+ || (NAME) == ansi_opname (DELETE_EXPR) \
+ || (NAME) == ansi_opname (VEC_DELETE_EXPR))
+
+#define ansi_opname(CODE) \
+ (operator_name_info[(int) (CODE)].identifier)
+#define ansi_assopname(CODE) \
+ (assignment_operator_name_info[(int) (CODE)].identifier)
+
+/* True if NODE is an erroneous expression. */
+
+#define error_operand_p(NODE) \
+ ((NODE) == error_mark_node \
+ || ((NODE) && TREE_TYPE ((NODE)) == error_mark_node))
+
+/* TRUE if a tree code represents a statement. */
+extern bool statement_code_p[MAX_TREE_CODES];
+
+#define STATEMENT_CODE_P(CODE) statement_code_p[(int) (CODE)]
+
+enum languages { lang_c, lang_cplusplus, lang_java };
+
+/* Macros to make error reporting functions' lives easier. */
+#define TYPE_IDENTIFIER(NODE) (DECL_NAME (TYPE_NAME (NODE)))
+#define TYPE_LINKAGE_IDENTIFIER(NODE) \
+ (TYPE_IDENTIFIER (TYPE_MAIN_VARIANT (NODE)))
+#define TYPE_NAME_STRING(NODE) (IDENTIFIER_POINTER (TYPE_IDENTIFIER (NODE)))
+#define TYPE_NAME_LENGTH(NODE) (IDENTIFIER_LENGTH (TYPE_IDENTIFIER (NODE)))
+
+/* Nonzero if NODE has no name for linkage purposes. */
+#define TYPE_ANONYMOUS_P(NODE) \
+ (TAGGED_TYPE_P (NODE) && ANON_AGGRNAME_P (TYPE_LINKAGE_IDENTIFIER (NODE)))
+
+/* The _DECL for this _TYPE. */
+#define TYPE_MAIN_DECL(NODE) (TYPE_STUB_DECL (TYPE_MAIN_VARIANT (NODE)))
+
+/* Nonzero if T is a class (or struct or union) type. Also nonzero
+ for template type parameters, typename types, and instantiated
+ template template parameters. Keep these checks in ascending code
+ order. */
+#define MAYBE_CLASS_TYPE_P(T) \
+ (TREE_CODE (T) == TEMPLATE_TYPE_PARM \
+ || TREE_CODE (T) == TYPENAME_TYPE \
+ || TREE_CODE (T) == TYPEOF_TYPE \
+ || TREE_CODE (T) == BOUND_TEMPLATE_TEMPLATE_PARM \
+ || TREE_CODE (T) == DECLTYPE_TYPE \
+ || CLASS_TYPE_P (T))
+
+/* Set CLASS_TYPE_P for T to VAL. T must be a class, struct, or
+ union type. */
+#define SET_CLASS_TYPE_P(T, VAL) \
+ (TYPE_LANG_FLAG_5 (T) = (VAL))
+
+/* Nonzero if T is a class type. Zero for template type parameters,
+ typename types, and so forth. */
+#define CLASS_TYPE_P(T) \
+ (RECORD_OR_UNION_CODE_P (TREE_CODE (T)) && TYPE_LANG_FLAG_5 (T))
+
+/* Nonzero if T is a class type but not an union. */
+#define NON_UNION_CLASS_TYPE_P(T) \
+ (CLASS_TYPE_P (T) && TREE_CODE (T) != UNION_TYPE)
+
+/* Keep these checks in ascending code order. */
+#define RECORD_OR_UNION_CODE_P(T) \
+ ((T) == RECORD_TYPE || (T) == UNION_TYPE)
+#define TAGGED_TYPE_P(T) \
+ (CLASS_TYPE_P (T) || TREE_CODE (T) == ENUMERAL_TYPE)
+#define IS_OVERLOAD_TYPE(T) TAGGED_TYPE_P (T)
+
+/* True if this a "Java" type, defined in 'extern "Java"'. */
+#define TYPE_FOR_JAVA(NODE) TYPE_LANG_FLAG_3 (NODE)
+
+/* True if this type is dependent. This predicate is only valid if
+ TYPE_DEPENDENT_P_VALID is true. */
+#define TYPE_DEPENDENT_P(NODE) TYPE_LANG_FLAG_0 (NODE)
+
+/* True if dependent_type_p has been called for this type, with the
+ result that TYPE_DEPENDENT_P is valid. */
+#define TYPE_DEPENDENT_P_VALID(NODE) TYPE_LANG_FLAG_6(NODE)
+
+/* Nonzero if this type is const-qualified. */
+#define CP_TYPE_CONST_P(NODE) \
+ ((cp_type_quals (NODE) & TYPE_QUAL_CONST) != 0)
+
+/* Nonzero if this type is volatile-qualified. */
+#define CP_TYPE_VOLATILE_P(NODE) \
+ ((cp_type_quals (NODE) & TYPE_QUAL_VOLATILE) != 0)
+
+/* Nonzero if this type is restrict-qualified. */
+#define CP_TYPE_RESTRICT_P(NODE) \
+ ((cp_type_quals (NODE) & TYPE_QUAL_RESTRICT) != 0)
+
+/* Nonzero if this type is const-qualified, but not
+ volatile-qualified. Other qualifiers are ignored. This macro is
+ used to test whether or not it is OK to bind an rvalue to a
+ reference. */
+#define CP_TYPE_CONST_NON_VOLATILE_P(NODE) \
+ ((cp_type_quals (NODE) & (TYPE_QUAL_CONST | TYPE_QUAL_VOLATILE)) \
+ == TYPE_QUAL_CONST)
+
+#define FUNCTION_ARG_CHAIN(NODE) \
+ TREE_CHAIN (TYPE_ARG_TYPES (TREE_TYPE (NODE)))
+
+/* Given a FUNCTION_DECL, returns the first TREE_LIST out of TYPE_ARG_TYPES
+ which refers to a user-written parameter. */
+#define FUNCTION_FIRST_USER_PARMTYPE(NODE) \
+ skip_artificial_parms_for ((NODE), TYPE_ARG_TYPES (TREE_TYPE (NODE)))
+
+/* Similarly, but for DECL_ARGUMENTS. */
+#define FUNCTION_FIRST_USER_PARM(NODE) \
+ skip_artificial_parms_for ((NODE), DECL_ARGUMENTS (NODE))
+
+/* Nonzero iff TYPE is derived from PARENT. Ignores accessibility and
+ ambiguity issues. */
+#define DERIVED_FROM_P(PARENT, TYPE) \
+ (lookup_base ((TYPE), (PARENT), ba_any, NULL) != NULL_TREE)
+/* Nonzero iff TYPE is uniquely derived from PARENT. Ignores
+ accessibility. */
+#define UNIQUELY_DERIVED_FROM_P(PARENT, TYPE) \
+ (lookup_base ((TYPE), (PARENT), ba_unique | ba_quiet, NULL) != NULL_TREE)
+/* Nonzero iff TYPE is publicly & uniquely derived from PARENT. */
+#define PUBLICLY_UNIQUELY_DERIVED_P(PARENT, TYPE) \
+ (lookup_base ((TYPE), (PARENT), ba_ignore_scope | ba_check | ba_quiet, \
+ NULL) != NULL_TREE)
+
+/* Gives the visibility specification for a class type. */
+#define CLASSTYPE_VISIBILITY(TYPE) \
+ DECL_VISIBILITY (TYPE_NAME (TYPE))
+#define CLASSTYPE_VISIBILITY_SPECIFIED(TYPE) \
+ DECL_VISIBILITY_SPECIFIED (TYPE_NAME (TYPE))
+
+typedef struct tree_pair_s GTY (())
+{
+ tree purpose;
+ tree value;
+} tree_pair_s;
+typedef tree_pair_s *tree_pair_p;
+DEF_VEC_O (tree_pair_s);
+DEF_VEC_ALLOC_O (tree_pair_s,gc);
+
+/* This is a few header flags for 'struct lang_type'. Actually,
+ all but the first are used only for lang_type_class; they
+ are put in this structure to save space. */
+struct lang_type_header GTY(())
+{
+ BOOL_BITFIELD is_lang_type_class : 1;
+
+ BOOL_BITFIELD has_type_conversion : 1;
+ BOOL_BITFIELD has_init_ref : 1;
+ BOOL_BITFIELD has_default_ctor : 1;
+ BOOL_BITFIELD const_needs_init : 1;
+ BOOL_BITFIELD ref_needs_init : 1;
+ BOOL_BITFIELD has_const_assign_ref : 1;
+
+ BOOL_BITFIELD spare : 1;
+};
+
+/* This structure provides additional information above and beyond
+ what is provide in the ordinary tree_type. In the past, we used it
+ for the types of class types, template parameters types, typename
+ types, and so forth. However, there can be many (tens to hundreds
+ of thousands) of template parameter types in a compilation, and
+ there's no need for this additional information in that case.
+ Therefore, we now use this data structure only for class types.
+
+ In the past, it was thought that there would be relatively few
+ class types. However, in the presence of heavy use of templates,
+ many (i.e., thousands) of classes can easily be generated.
+ Therefore, we should endeavor to keep the size of this structure to
+ a minimum. */
+struct lang_type_class GTY(())
+{
+ struct lang_type_header h;
+
+ unsigned char align;
+
+ unsigned has_mutable : 1;
+ unsigned com_interface : 1;
+ unsigned non_pod_class : 1;
+ unsigned nearly_empty_p : 1;
+ unsigned user_align : 1;
+ unsigned has_assign_ref : 1;
+ unsigned has_new : 1;
+ unsigned has_array_new : 1;
+
+ unsigned gets_delete : 2;
+ unsigned interface_only : 1;
+ unsigned interface_unknown : 1;
+ unsigned contains_empty_class_p : 1;
+ unsigned anon_aggr : 1;
+ unsigned non_zero_init : 1;
+ unsigned empty_p : 1;
+
+ unsigned vec_new_uses_cookie : 1;
+ unsigned declared_class : 1;
+ unsigned diamond_shaped : 1;
+ unsigned repeated_base : 1;
+ unsigned being_defined : 1;
+ unsigned java_interface : 1;
+ unsigned debug_requested : 1;
+ unsigned fields_readonly : 1;
+
+ unsigned use_template : 2;
+ unsigned ptrmemfunc_flag : 1;
+ unsigned was_anonymous : 1;
+ unsigned lazy_default_ctor : 1;
+ unsigned lazy_copy_ctor : 1;
+ unsigned lazy_assignment_op : 1;
+ unsigned lazy_destructor : 1;
+
+ unsigned has_const_init_ref : 1;
+ unsigned has_complex_init_ref : 1;
+ unsigned has_complex_assign_ref : 1;
+ unsigned non_aggregate : 1;
+ unsigned has_complex_dflt : 1;
+ unsigned has_list_ctor : 1;
+
+ /* When adding a flag here, consider whether or not it ought to
+ apply to a template instance if it applies to the template. If
+ so, make sure to copy it in instantiate_class_template! */
+
+ /* There are some bits left to fill out a 32-bit word. Keep track
+ of this by updating the size of this bitfield whenever you add or
+ remove a flag. */
+ unsigned dummy : 10;
+
+ tree primary_base;
+ VEC(tree_pair_s,gc) *vcall_indices;
+ tree vtables;
+ tree typeinfo_var;
+ VEC(tree,gc) *vbases;
+ binding_table nested_udts;
+ tree as_base;
+ VEC(tree,gc) *pure_virtuals;
+ tree friend_classes;
+ VEC(tree,gc) * GTY((reorder ("resort_type_method_vec"))) methods;
+ tree key_method;
+ tree decl_list;
+ tree template_info;
+ tree befriending_classes;
+ /* In a RECORD_TYPE, information specific to Objective-C++, such
+ as a list of adopted protocols or a pointer to a corresponding
+ @interface. See objc/objc-act.h for details. */
+ tree objc_info;
+};
+
+struct lang_type_ptrmem GTY(())
+{
+ struct lang_type_header h;
+ tree record;
+};
+
+struct lang_type GTY(())
+{
+ union lang_type_u
+ {
+ struct lang_type_header GTY((skip (""))) h;
+ struct lang_type_class GTY((tag ("1"))) c;
+ struct lang_type_ptrmem GTY((tag ("0"))) ptrmem;
+ } GTY((desc ("%h.h.is_lang_type_class"))) u;
+};
+
+#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
+
+#define LANG_TYPE_CLASS_CHECK(NODE) __extension__ \
+({ struct lang_type *lt = TYPE_LANG_SPECIFIC (NODE); \
+ if (! lt->u.h.is_lang_type_class) \
+ lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \
+ <->u.c; })
+
+#define LANG_TYPE_PTRMEM_CHECK(NODE) __extension__ \
+({ struct lang_type *lt = TYPE_LANG_SPECIFIC (NODE); \
+ if (lt->u.h.is_lang_type_class) \
+ lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \
+ <->u.ptrmem; })
+
+#else
+
+#define LANG_TYPE_CLASS_CHECK(NODE) (&TYPE_LANG_SPECIFIC (NODE)->u.c)
+#define LANG_TYPE_PTRMEM_CHECK(NODE) (&TYPE_LANG_SPECIFIC (NODE)->u.ptrmem)
+
+#endif /* ENABLE_TREE_CHECKING */
+
+/* Fields used for storing information before the class is defined.
+ After the class is defined, these fields hold other information. */
+
+/* VEC(tree) of friends which were defined inline in this class
+ definition. */
+#define CLASSTYPE_INLINE_FRIENDS(NODE) CLASSTYPE_PURE_VIRTUALS (NODE)
+
+/* Nonzero for _CLASSTYPE means that operator delete is defined. */
+#define TYPE_GETS_DELETE(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->gets_delete)
+#define TYPE_GETS_REG_DELETE(NODE) (TYPE_GETS_DELETE (NODE) & 1)
+
+/* Nonzero if `new NODE[x]' should cause the allocation of extra
+ storage to indicate how many array elements are in use. */
+#define TYPE_VEC_NEW_USES_COOKIE(NODE) \
+ (CLASS_TYPE_P (NODE) \
+ && LANG_TYPE_CLASS_CHECK (NODE)->vec_new_uses_cookie)
+
+/* Nonzero means that this _CLASSTYPE node defines ways of converting
+ itself to other types. */
+#define TYPE_HAS_CONVERSION(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->h.has_type_conversion)
+
+/* Nonzero means that NODE (a class type) has a default constructor --
+ but that it has not yet been declared. */
+#define CLASSTYPE_LAZY_DEFAULT_CTOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->lazy_default_ctor)
+
+/* Nonzero means that NODE (a class type) has a copy constructor --
+ but that it has not yet been declared. */
+#define CLASSTYPE_LAZY_COPY_CTOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->lazy_copy_ctor)
+
+/* Nonzero means that NODE (a class type) has an assignment operator
+ -- but that it has not yet been declared. */
+#define CLASSTYPE_LAZY_ASSIGNMENT_OP(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->lazy_assignment_op)
+
+/* Nonzero means that NODE (a class type) has a destructor -- but that
+ it has not yet been declared. */
+#define CLASSTYPE_LAZY_DESTRUCTOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->lazy_destructor)
+
+/* Nonzero means that this _CLASSTYPE node overloads operator=(X&). */
+#define TYPE_HAS_ASSIGN_REF(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->has_assign_ref)
+
+/* True iff the class type NODE has an "operator =" whose parameter
+ has a parameter of type "const X&". */
+#define TYPE_HAS_CONST_ASSIGN_REF(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->h.has_const_assign_ref)
+
+/* Nonzero means that this _CLASSTYPE node has an X(X&) constructor. */
+#define TYPE_HAS_INIT_REF(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->h.has_init_ref)
+#define TYPE_HAS_CONST_INIT_REF(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->has_const_init_ref)
+
+/* Nonzero if this class has an X(initializer_list<T>) constructor. */
+#define TYPE_HAS_LIST_CTOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->has_list_ctor)
+
+/* Nonzero if this class defines an overloaded operator new. (An
+ operator new [] doesn't count.) */
+#define TYPE_HAS_NEW_OPERATOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->has_new)
+
+/* Nonzero if this class defines an overloaded operator new[]. */
+#define TYPE_HAS_ARRAY_NEW_OPERATOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->has_array_new)
+
+/* Nonzero means that this type is being defined. I.e., the left brace
+ starting the definition of this type has been seen. */
+#define TYPE_BEING_DEFINED(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->being_defined)
+
+/* Mark bits for repeated base checks. */
+#define TYPE_MARKED_P(NODE) TREE_LANG_FLAG_6 (TYPE_CHECK (NODE))
+
+/* Nonzero if the class NODE has multiple paths to the same (virtual)
+ base object. */
+#define CLASSTYPE_DIAMOND_SHAPED_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK(NODE)->diamond_shaped)
+
+/* Nonzero if the class NODE has multiple instances of the same base
+ type. */
+#define CLASSTYPE_REPEATED_BASE_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK(NODE)->repeated_base)
+
+/* The member function with which the vtable will be emitted:
+ the first noninline non-pure-virtual member function. NULL_TREE
+ if there is no key function or if this is a class template */
+#define CLASSTYPE_KEY_METHOD(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->key_method)
+
+/* Vector member functions defined in this class. Each element is
+ either a FUNCTION_DECL, a TEMPLATE_DECL, or an OVERLOAD. All
+ functions with the same name end up in the same slot. The first
+ two elements are for constructors, and destructors, respectively.
+ All template conversion operators to innermost template dependent
+ types are overloaded on the next slot, if they exist. Note, the
+ names for these functions will not all be the same. The
+ non-template conversion operators & templated conversions to
+ non-innermost template types are next, followed by ordinary member
+ functions. There may be empty entries at the end of the vector.
+ The conversion operators are unsorted. The ordinary member
+ functions are sorted, once the class is complete. */
+#define CLASSTYPE_METHOD_VEC(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->methods)
+
+/* For class templates, this is a TREE_LIST of all member data,
+ functions, types, and friends in the order of declaration.
+ The TREE_PURPOSE of each TREE_LIST is NULL_TREE for a friend,
+ and the RECORD_TYPE for the class template otherwise. */
+#define CLASSTYPE_DECL_LIST(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->decl_list)
+
+/* The slot in the CLASSTYPE_METHOD_VEC where constructors go. */
+#define CLASSTYPE_CONSTRUCTOR_SLOT 0
+
+/* The slot in the CLASSTYPE_METHOD_VEC where destructors go. */
+#define CLASSTYPE_DESTRUCTOR_SLOT 1
+
+/* The first slot in the CLASSTYPE_METHOD_VEC where conversion
+ operators can appear. */
+#define CLASSTYPE_FIRST_CONVERSION_SLOT 2
+
+/* A FUNCTION_DECL or OVERLOAD for the constructors for NODE. These
+ are the constructors that take an in-charge parameter. */
+#define CLASSTYPE_CONSTRUCTORS(NODE) \
+ (VEC_index (tree, CLASSTYPE_METHOD_VEC (NODE), CLASSTYPE_CONSTRUCTOR_SLOT))
+
+/* A FUNCTION_DECL for the destructor for NODE. These are the
+ destructors that take an in-charge parameter. If
+ CLASSTYPE_LAZY_DESTRUCTOR is true, then this entry will be NULL
+ until the destructor is created with lazily_declare_fn. */
+#define CLASSTYPE_DESTRUCTORS(NODE) \
+ (CLASSTYPE_METHOD_VEC (NODE) \
+ ? VEC_index (tree, CLASSTYPE_METHOD_VEC (NODE), CLASSTYPE_DESTRUCTOR_SLOT) \
+ : NULL_TREE)
+
+/* A dictionary of the nested user-defined-types (class-types, or enums)
+ found within this class. This table includes nested member class
+ templates. */
+#define CLASSTYPE_NESTED_UTDS(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->nested_udts)
+
+/* Nonzero if NODE has a primary base class, i.e., a base class with
+ which it shares the virtual function table pointer. */
+#define CLASSTYPE_HAS_PRIMARY_BASE_P(NODE) \
+ (CLASSTYPE_PRIMARY_BINFO (NODE) != NULL_TREE)
+
+/* If non-NULL, this is the binfo for the primary base class, i.e.,
+ the base class which contains the virtual function table pointer
+ for this class. */
+#define CLASSTYPE_PRIMARY_BINFO(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->primary_base)
+
+/* A vector of BINFOs for the direct and indirect virtual base classes
+ that this type uses in a post-order depth-first left-to-right
+ order. (In other words, these bases appear in the order that they
+ should be initialized.) */
+#define CLASSTYPE_VBASECLASSES(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->vbases)
+
+/* The type corresponding to NODE when NODE is used as a base class,
+ i.e., NODE without virtual base classes. */
+
+#define CLASSTYPE_AS_BASE(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->as_base)
+
+/* True iff NODE is the CLASSTYPE_AS_BASE version of some type. */
+
+#define IS_FAKE_BASE_TYPE(NODE) \
+ (TREE_CODE (NODE) == RECORD_TYPE \
+ && TYPE_CONTEXT (NODE) && CLASS_TYPE_P (TYPE_CONTEXT (NODE)) \
+ && CLASSTYPE_AS_BASE (TYPE_CONTEXT (NODE)) == (NODE))
+
+/* These are the size and alignment of the type without its virtual
+ base classes, for when we use this type as a base itself. */
+#define CLASSTYPE_SIZE(NODE) TYPE_SIZE (CLASSTYPE_AS_BASE (NODE))
+#define CLASSTYPE_SIZE_UNIT(NODE) TYPE_SIZE_UNIT (CLASSTYPE_AS_BASE (NODE))
+#define CLASSTYPE_ALIGN(NODE) TYPE_ALIGN (CLASSTYPE_AS_BASE (NODE))
+#define CLASSTYPE_USER_ALIGN(NODE) TYPE_USER_ALIGN (CLASSTYPE_AS_BASE (NODE))
+
+/* The alignment of NODE, without its virtual bases, in bytes. */
+#define CLASSTYPE_ALIGN_UNIT(NODE) \
+ (CLASSTYPE_ALIGN (NODE) / BITS_PER_UNIT)
+
+/* True if this a Java interface type, declared with
+ '__attribute__ ((java_interface))'. */
+#define TYPE_JAVA_INTERFACE(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->java_interface)
+
+/* A VEC(tree) of virtual functions which cannot be inherited by
+ derived classes. When deriving from this type, the derived
+ class must provide its own definition for each of these functions. */
+#define CLASSTYPE_PURE_VIRTUALS(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->pure_virtuals)
+
+/* Nonzero means that this type has an X() constructor. */
+#define TYPE_HAS_DEFAULT_CONSTRUCTOR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->h.has_default_ctor)
+
+/* Nonzero means that this type contains a mutable member. */
+#define CLASSTYPE_HAS_MUTABLE(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->has_mutable)
+#define TYPE_HAS_MUTABLE_P(NODE) (cp_has_mutable_p (NODE))
+
+/* Nonzero means that this class type is a non-POD class. */
+#define CLASSTYPE_NON_POD_P(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->non_pod_class)
+
+/* Nonzero means that this class contains pod types whose default
+ initialization is not a zero initialization (namely, pointers to
+ data members). */
+#define CLASSTYPE_NON_ZERO_INIT_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->non_zero_init)
+
+/* Nonzero if this class is "empty" in the sense of the C++ ABI. */
+#define CLASSTYPE_EMPTY_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->empty_p)
+
+/* Nonzero if this class is "nearly empty", i.e., contains only a
+ virtual function table pointer. */
+#define CLASSTYPE_NEARLY_EMPTY_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->nearly_empty_p)
+
+/* Nonzero if this class contains an empty subobject. */
+#define CLASSTYPE_CONTAINS_EMPTY_CLASS_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->contains_empty_class_p)
+
+/* A list of class types of which this type is a friend. The
+ TREE_VALUE is normally a TYPE, but will be a TEMPLATE_DECL in the
+ case of a template friend. */
+#define CLASSTYPE_FRIEND_CLASSES(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->friend_classes)
+
+/* A list of the classes which grant friendship to this class. */
+#define CLASSTYPE_BEFRIENDING_CLASSES(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->befriending_classes)
+
+/* Say whether this node was declared as a "class" or a "struct". */
+#define CLASSTYPE_DECLARED_CLASS(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->declared_class)
+
+/* Nonzero if this class has const members
+ which have no specified initialization. */
+#define CLASSTYPE_READONLY_FIELDS_NEED_INIT(NODE) \
+ (TYPE_LANG_SPECIFIC (NODE) \
+ ? LANG_TYPE_CLASS_CHECK (NODE)->h.const_needs_init : 0)
+#define SET_CLASSTYPE_READONLY_FIELDS_NEED_INIT(NODE, VALUE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->h.const_needs_init = (VALUE))
+
+/* Nonzero if this class has ref members
+ which have no specified initialization. */
+#define CLASSTYPE_REF_FIELDS_NEED_INIT(NODE) \
+ (TYPE_LANG_SPECIFIC (NODE) \
+ ? LANG_TYPE_CLASS_CHECK (NODE)->h.ref_needs_init : 0)
+#define SET_CLASSTYPE_REF_FIELDS_NEED_INIT(NODE, VALUE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->h.ref_needs_init = (VALUE))
+
+/* Nonzero if this class is included from a header file which employs
+ `#pragma interface', and it is not included in its implementation file. */
+#define CLASSTYPE_INTERFACE_ONLY(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_only)
+
+/* True if we have already determined whether or not vtables, VTTs,
+ typeinfo, and other similar per-class data should be emitted in
+ this translation unit. This flag does not indicate whether or not
+ these items should be emitted; it only indicates that we know one
+ way or the other. */
+#define CLASSTYPE_INTERFACE_KNOWN(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_unknown == 0)
+/* The opposite of CLASSTYPE_INTERFACE_KNOWN. */
+#define CLASSTYPE_INTERFACE_UNKNOWN(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_unknown)
+
+#define SET_CLASSTYPE_INTERFACE_UNKNOWN_X(NODE,X) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_unknown = !!(X))
+#define SET_CLASSTYPE_INTERFACE_UNKNOWN(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_unknown = 1)
+#define SET_CLASSTYPE_INTERFACE_KNOWN(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->interface_unknown = 0)
+
+/* Nonzero if a _DECL node requires us to output debug info for this class. */
+#define CLASSTYPE_DEBUG_REQUESTED(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->debug_requested)
+
+/* Additional macros for inheritance information. */
+
+/* Nonzero means that this class is on a path leading to a new vtable. */
+#define BINFO_VTABLE_PATH_MARKED(NODE) BINFO_FLAG_1 (NODE)
+
+/* Nonzero means B (a BINFO) has its own vtable. Any copies will not
+ have this flag set. */
+#define BINFO_NEW_VTABLE_MARKED(B) (BINFO_FLAG_2 (B))
+
+/* Compare a BINFO_TYPE with another type for equality. For a binfo,
+ this is functionally equivalent to using same_type_p, but
+ measurably faster. At least one of the arguments must be a
+ BINFO_TYPE. The other can be a BINFO_TYPE or a regular type. If
+ BINFO_TYPE(T) ever stops being the main variant of the class the
+ binfo is for, this macro must change. */
+#define SAME_BINFO_TYPE_P(A, B) ((A) == (B))
+
+/* Any subobject that needs a new vtable must have a vptr and must not
+ be a non-virtual primary base (since it would then use the vtable from a
+ derived class and never become non-primary.) */
+#define SET_BINFO_NEW_VTABLE_MARKED(B) \
+ (BINFO_NEW_VTABLE_MARKED (B) = 1, \
+ gcc_assert (!BINFO_PRIMARY_P (B) || BINFO_VIRTUAL_P (B)), \
+ gcc_assert (TYPE_VFIELD (BINFO_TYPE (B))))
+
+/* Nonzero if this binfo is for a dependent base - one that should not
+ be searched. */
+#define BINFO_DEPENDENT_BASE_P(NODE) BINFO_FLAG_3 (NODE)
+
+/* Nonzero if this binfo has lost its primary base binfo (because that
+ is a nearly-empty virtual base that has been taken by some other
+ base in the complete hierarchy. */
+#define BINFO_LOST_PRIMARY_P(NODE) BINFO_FLAG_4 (NODE)
+
+/* Nonzero if this BINFO is a primary base class. */
+#define BINFO_PRIMARY_P(NODE) BINFO_FLAG_5(NODE)
+
+/* Used by various search routines. */
+#define IDENTIFIER_MARKED(NODE) TREE_LANG_FLAG_0 (NODE)
+
+/* A VEC(tree_pair_s) of the vcall indices associated with the class
+ NODE. The PURPOSE of each element is a FUNCTION_DECL for a virtual
+ function. The VALUE is the index into the virtual table where the
+ vcall offset for that function is stored, when NODE is a virtual
+ base. */
+#define CLASSTYPE_VCALL_INDICES(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->vcall_indices)
+
+/* The various vtables for the class NODE. The primary vtable will be
+ first, followed by the construction vtables and VTT, if any. */
+#define CLASSTYPE_VTABLES(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->vtables)
+
+/* The std::type_info variable representing this class, or NULL if no
+ such variable has been created. This field is only set for the
+ TYPE_MAIN_VARIANT of the class. */
+#define CLASSTYPE_TYPEINFO_VAR(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var)
+
+/* Accessor macros for the BINFO_VIRTUALS list. */
+
+/* The number of bytes by which to adjust the `this' pointer when
+ calling this virtual function. Subtract this value from the this
+ pointer. Always non-NULL, might be constant zero though. */
+#define BV_DELTA(NODE) (TREE_PURPOSE (NODE))
+
+/* If non-NULL, the vtable index at which to find the vcall offset
+ when calling this virtual function. Add the value at that vtable
+ index to the this pointer. */
+#define BV_VCALL_INDEX(NODE) (TREE_TYPE (NODE))
+
+/* The function to call. */
+#define BV_FN(NODE) (TREE_VALUE (NODE))
+
+
+/* For FUNCTION_TYPE or METHOD_TYPE, a list of the exceptions that
+ this type can raise. Each TREE_VALUE is a _TYPE. The TREE_VALUE
+ will be NULL_TREE to indicate a throw specification of `()', or
+ no exceptions allowed. */
+#define TYPE_RAISES_EXCEPTIONS(NODE) TYPE_LANG_SLOT_1 (NODE)
+
+/* For FUNCTION_TYPE or METHOD_TYPE, return 1 iff it is declared `throw()'. */
+#define TYPE_NOTHROW_P(NODE) \
+ (TYPE_RAISES_EXCEPTIONS (NODE) \
+ && TREE_VALUE (TYPE_RAISES_EXCEPTIONS (NODE)) == NULL_TREE)
+
+/* The binding level associated with the namespace. */
+#define NAMESPACE_LEVEL(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.u.level)
+
+
+/* If a DECL has DECL_LANG_SPECIFIC, it is either a lang_decl_flags or
+ a lang_decl (which has lang_decl_flags as its initial prefix).
+ This macro is nonzero for tree nodes whose DECL_LANG_SPECIFIC is
+ the full lang_decl, and not just lang_decl_flags. Keep these
+ checks in ascending code order. */
+#define CAN_HAVE_FULL_LANG_DECL_P(NODE) \
+ (!(TREE_CODE (NODE) == FIELD_DECL \
+ || TREE_CODE (NODE) == VAR_DECL \
+ || TREE_CODE (NODE) == CONST_DECL \
+ || TREE_CODE (NODE) == USING_DECL))
+
+struct lang_decl_flags GTY(())
+{
+ ENUM_BITFIELD(languages) language : 4;
+ unsigned global_ctor_p : 1;
+ unsigned global_dtor_p : 1;
+ unsigned anticipated_p : 1;
+ unsigned template_conv_p : 1;
+
+ unsigned operator_attr : 1;
+ unsigned constructor_attr : 1;
+ unsigned destructor_attr : 1;
+ unsigned friend_attr : 1;
+ unsigned static_function : 1;
+ unsigned pure_virtual : 1;
+ unsigned has_in_charge_parm_p : 1;
+ unsigned has_vtt_parm_p : 1;
+
+ unsigned deferred : 1;
+ unsigned use_template : 2;
+ unsigned nonconverting : 1;
+ unsigned not_really_extern : 1;
+ unsigned initialized_in_class : 1;
+ unsigned assignment_operator_p : 1;
+ unsigned u1sel : 1;
+
+ unsigned u2sel : 1;
+ unsigned can_be_full : 1;
+ unsigned thunk_p : 1;
+ unsigned this_thunk_p : 1;
+ unsigned repo_available_p : 1;
+ unsigned hidden_friend_p : 1;
+ unsigned threadprivate_or_deleted_p : 1;
+ unsigned defaulted_p : 1;
+
+ union lang_decl_u {
+ /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is
+ THUNK_ALIAS.
+ In a FUNCTION_DECL for which DECL_THUNK_P does not hold,
+ VAR_DECL, TYPE_DECL, or TEMPLATE_DECL, this is
+ DECL_TEMPLATE_INFO. */
+ tree GTY ((tag ("0"))) template_info;
+
+ /* In a NAMESPACE_DECL, this is NAMESPACE_LEVEL. */
+ struct cp_binding_level * GTY ((tag ("1"))) level;
+ } GTY ((desc ("%1.u1sel"))) u;
+
+ union lang_decl_u2 {
+ /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is
+ THUNK_VIRTUAL_OFFSET.
+ Otherwise this is DECL_ACCESS. */
+ tree GTY ((tag ("0"))) access;
+
+ /* For VAR_DECL in function, this is DECL_DISCRIMINATOR. */
+ int GTY ((tag ("1"))) discriminator;
+ } GTY ((desc ("%1.u2sel"))) u2;
+};
+
+/* sorted_fields is sorted based on a pointer, so we need to be able
+ to resort it if pointers get rearranged. */
+
+struct lang_decl GTY(())
+{
+ struct lang_decl_flags decl_flags;
+
+ union lang_decl_u4
+ {
+ struct full_lang_decl
+ {
+ /* In an overloaded operator, this is the value of
+ DECL_OVERLOADED_OPERATOR_P. */
+ ENUM_BITFIELD (tree_code) operator_code : 16;
+
+ unsigned u3sel : 1;
+ unsigned pending_inline_p : 1;
+ unsigned spare : 14;
+
+ /* For a non-thunk function decl, this is a tree list of
+ friendly classes. For a thunk function decl, it is the
+ thunked to function decl. */
+ tree befriending_classes;
+
+ /* For a non-virtual FUNCTION_DECL, this is
+ DECL_FRIEND_CONTEXT. For a virtual FUNCTION_DECL for which
+ DECL_THIS_THUNK_P does not hold, this is DECL_THUNKS. Both
+ this pointer and result pointer adjusting thunks are
+ chained here. This pointer thunks to return pointer thunks
+ will be chained on the return pointer thunk. */
+ tree context;
+
+ union lang_decl_u5
+ {
+ /* In a non-thunk FUNCTION_DECL or TEMPLATE_DECL, this is
+ DECL_CLONED_FUNCTION. */
+ tree GTY ((tag ("0"))) cloned_function;
+
+ /* In a FUNCTION_DECL for which THUNK_P holds this is the
+ THUNK_FIXED_OFFSET. */
+ HOST_WIDE_INT GTY ((tag ("1"))) fixed_offset;
+ } GTY ((desc ("%0.decl_flags.thunk_p"))) u5;
+
+ union lang_decl_u3
+ {
+ struct sorted_fields_type * GTY ((tag ("0"), reorder ("resort_sorted_fields")))
+ sorted_fields;
+ struct cp_token_cache * GTY ((tag ("2"))) pending_inline_info;
+ struct language_function * GTY ((tag ("1")))
+ saved_language_function;
+ } GTY ((desc ("%1.u3sel + %1.pending_inline_p"))) u;
+ } GTY ((tag ("1"))) f;
+ } GTY ((desc ("%1.decl_flags.can_be_full"))) u;
+};
+
+#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
+
+#define LANG_DECL_U2_CHECK(NODE, TF) __extension__ \
+({ struct lang_decl *lt = DECL_LANG_SPECIFIC (NODE); \
+ if (lt->decl_flags.u2sel != TF) \
+ lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \
+ <->decl_flags.u2; })
+
+#else
+
+#define LANG_DECL_U2_CHECK(NODE, TF) \
+ (&DECL_LANG_SPECIFIC (NODE)->decl_flags.u2)
+
+#endif /* ENABLE_TREE_CHECKING */
+
+/* For a FUNCTION_DECL or a VAR_DECL, the language linkage for the
+ declaration. Some entities (like a member function in a local
+ class, or a local variable) do not have linkage at all, and this
+ macro should not be used in those cases.
+
+ Implementation note: A FUNCTION_DECL without DECL_LANG_SPECIFIC was
+ created by language-independent code, and has C linkage. Most
+ VAR_DECLs have C++ linkage, and do not have DECL_LANG_SPECIFIC, but
+ we do create DECL_LANG_SPECIFIC for variables with non-C++ linkage. */
+#define DECL_LANGUAGE(NODE) \
+ (DECL_LANG_SPECIFIC (NODE) \
+ ? DECL_LANG_SPECIFIC (NODE)->decl_flags.language \
+ : (TREE_CODE (NODE) == FUNCTION_DECL \
+ ? lang_c : lang_cplusplus))
+
+/* Set the language linkage for NODE to LANGUAGE. */
+#define SET_DECL_LANGUAGE(NODE, LANGUAGE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.language = (LANGUAGE))
+
+/* For FUNCTION_DECLs: nonzero means that this function is a constructor. */
+#define DECL_CONSTRUCTOR_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.constructor_attr)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a constructor for a complete
+ object. */
+#define DECL_COMPLETE_CONSTRUCTOR_P(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) \
+ && DECL_NAME (NODE) == complete_ctor_identifier)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a constructor for a base
+ object. */
+#define DECL_BASE_CONSTRUCTOR_P(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) \
+ && DECL_NAME (NODE) == base_ctor_identifier)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a constructor, but not either the
+ specialized in-charge constructor or the specialized not-in-charge
+ constructor. */
+#define DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) && !DECL_CLONED_FUNCTION_P (NODE))
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a copy constructor. */
+#define DECL_COPY_CONSTRUCTOR_P(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) && copy_fn_p (NODE) > 0)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a move constructor. */
+#define DECL_MOVE_CONSTRUCTOR_P(NODE) \
+ (DECL_CONSTRUCTOR_P (NODE) && move_fn_p (NODE))
+
+/* Nonzero if NODE is a destructor. */
+#define DECL_DESTRUCTOR_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.destructor_attr)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a destructor, but not the
+ specialized in-charge constructor, in-charge deleting constructor,
+ or the base destructor. */
+#define DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P(NODE) \
+ (DECL_DESTRUCTOR_P (NODE) && !DECL_CLONED_FUNCTION_P (NODE))
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a destructor for a complete
+ object. */
+#define DECL_COMPLETE_DESTRUCTOR_P(NODE) \
+ (DECL_DESTRUCTOR_P (NODE) \
+ && DECL_NAME (NODE) == complete_dtor_identifier)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a destructor for a base
+ object. */
+#define DECL_BASE_DESTRUCTOR_P(NODE) \
+ (DECL_DESTRUCTOR_P (NODE) \
+ && DECL_NAME (NODE) == base_dtor_identifier)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a destructor for a complete
+ object that deletes the object after it has been destroyed. */
+#define DECL_DELETING_DESTRUCTOR_P(NODE) \
+ (DECL_DESTRUCTOR_P (NODE) \
+ && DECL_NAME (NODE) == deleting_dtor_identifier)
+
+/* Nonzero if NODE (a FUNCTION_DECL) is a cloned constructor or
+ destructor. */
+#define DECL_CLONED_FUNCTION_P(NODE) \
+ ((TREE_CODE (NODE) == FUNCTION_DECL \
+ || TREE_CODE (NODE) == TEMPLATE_DECL) \
+ && DECL_LANG_SPECIFIC (NODE) \
+ && !DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p \
+ && DECL_CLONED_FUNCTION (NODE) != NULL_TREE)
+
+/* If DECL_CLONED_FUNCTION_P holds, this is the function that was
+ cloned. */
+#define DECL_CLONED_FUNCTION(NODE) \
+ (DECL_LANG_SPECIFIC (NON_THUNK_FUNCTION_CHECK(NODE))->u.f.u5.cloned_function)
+
+/* Perform an action for each clone of FN, if FN is a function with
+ clones. This macro should be used like:
+
+ FOR_EACH_CLONE (clone, fn)
+ { ... }
+
+ */
+#define FOR_EACH_CLONE(CLONE, FN) \
+ if (TREE_CODE (FN) == FUNCTION_DECL \
+ && (DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (FN) \
+ || DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P (FN))) \
+ for (CLONE = TREE_CHAIN (FN); \
+ CLONE && DECL_CLONED_FUNCTION_P (CLONE); \
+ CLONE = TREE_CHAIN (CLONE))
+
+/* Nonzero if NODE has DECL_DISCRIMINATOR and not DECL_ACCESS. */
+#define DECL_DISCRIMINATOR_P(NODE) \
+ (TREE_CODE (NODE) == VAR_DECL \
+ && DECL_FUNCTION_SCOPE_P (NODE))
+
+/* Discriminator for name mangling. */
+#define DECL_DISCRIMINATOR(NODE) (LANG_DECL_U2_CHECK (NODE, 1)->discriminator)
+
+/* Nonzero if the VTT parm has been added to NODE. */
+#define DECL_HAS_VTT_PARM_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.has_vtt_parm_p)
+
+/* Nonzero if NODE is a FUNCTION_DECL for which a VTT parameter is
+ required. */
+#define DECL_NEEDS_VTT_PARM_P(NODE) \
+ (CLASSTYPE_VBASECLASSES (DECL_CONTEXT (NODE)) \
+ && (DECL_BASE_CONSTRUCTOR_P (NODE) \
+ || DECL_BASE_DESTRUCTOR_P (NODE)))
+
+/* Nonzero if NODE is a user-defined conversion operator. */
+#define DECL_CONV_FN_P(NODE) \
+ (DECL_NAME (NODE) && IDENTIFIER_TYPENAME_P (DECL_NAME (NODE)))
+
+/* If FN is a conversion operator, the type to which it converts.
+ Otherwise, NULL_TREE. */
+#define DECL_CONV_FN_TYPE(FN) \
+ (DECL_CONV_FN_P (FN) ? TREE_TYPE (DECL_NAME (FN)) : NULL_TREE)
+
+/* Nonzero if NODE, which is a TEMPLATE_DECL, is a template
+ conversion operator to a type dependent on the innermost template
+ args. */
+#define DECL_TEMPLATE_CONV_FN_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.template_conv_p)
+
+/* Set the overloaded operator code for NODE to CODE. */
+#define SET_OVERLOADED_OPERATOR_CODE(NODE, CODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.operator_code = (CODE))
+
+/* If NODE is an overloaded operator, then this returns the TREE_CODE
+ associated with the overloaded operator.
+ DECL_ASSIGNMENT_OPERATOR_P must also be checked to determine
+ whether or not NODE is an assignment operator. If NODE is not an
+ overloaded operator, ERROR_MARK is returned. Since the numerical
+ value of ERROR_MARK is zero, this macro can be used as a predicate
+ to test whether or not NODE is an overloaded operator. */
+#define DECL_OVERLOADED_OPERATOR_P(NODE) \
+ (IDENTIFIER_OPNAME_P (DECL_NAME (NODE)) \
+ ? DECL_LANG_SPECIFIC (NODE)->u.f.operator_code : ERROR_MARK)
+
+/* Nonzero if NODE is an assignment operator (including += and such). */
+#define DECL_ASSIGNMENT_OPERATOR_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.assignment_operator_p)
+
+/* For FUNCTION_DECLs: nonzero means that this function is a
+ constructor or a destructor with an extra in-charge parameter to
+ control whether or not virtual bases are constructed. */
+#define DECL_HAS_IN_CHARGE_PARM_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.has_in_charge_parm_p)
+
+/* Nonzero if DECL is a declaration of __builtin_constant_p. */
+#define DECL_IS_BUILTIN_CONSTANT_P(NODE) \
+ (TREE_CODE (NODE) == FUNCTION_DECL \
+ && DECL_BUILT_IN_CLASS (NODE) == BUILT_IN_NORMAL \
+ && DECL_FUNCTION_CODE (NODE) == BUILT_IN_CONSTANT_P)
+
+/* Nonzero for _DECL means that this decl appears in (or will appear
+ in) as a member in a RECORD_TYPE or UNION_TYPE node. It is also for
+ detecting circularity in case members are multiply defined. In the
+ case of a VAR_DECL, it is also used to determine how program storage
+ should be allocated. */
+#define DECL_IN_AGGR_P(NODE) (DECL_LANG_FLAG_3 (NODE))
+
+/* Nonzero for a VAR_DECL means that the variable's initialization (if
+ any) has been processed. (In general, DECL_INITIALIZED_P is
+ !DECL_EXTERN, but static data members may be initialized even if
+ not defined.) */
+#define DECL_INITIALIZED_P(NODE) \
+ (TREE_LANG_FLAG_1 (VAR_DECL_CHECK (NODE)))
+
+/* Nonzero for a VAR_DECL iff an explicit initializer was provided. */
+#define DECL_NONTRIVIALLY_INITIALIZED_P(NODE) \
+ (TREE_LANG_FLAG_3 (VAR_DECL_CHECK (NODE)))
+
+/* Nonzero for a VAR_DECL that was initialized with a
+ constant-expression. */
+#define DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P(NODE) \
+ (TREE_LANG_FLAG_2 (VAR_DECL_CHECK (NODE)))
+
+/* Nonzero for a VAR_DECL that can be used in an integral constant
+ expression.
+
+ [expr.const]
+
+ An integral constant-expression can only involve ... const
+ variables of static or enumeration types initialized with
+ constant expressions ...
+
+ The standard does not require that the expression be non-volatile.
+ G++ implements the proposed correction in DR 457. */
+#define DECL_INTEGRAL_CONSTANT_VAR_P(NODE) \
+ (TREE_CODE (NODE) == VAR_DECL \
+ && CP_TYPE_CONST_NON_VOLATILE_P (TREE_TYPE (NODE)) \
+ && INTEGRAL_OR_ENUMERATION_TYPE_P (TREE_TYPE (NODE)) \
+ && DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (NODE))
+
+/* Nonzero if the DECL was initialized in the class definition itself,
+ rather than outside the class. This is used for both static member
+ VAR_DECLS, and FUNCTION_DECLS that are defined in the class. */
+#define DECL_INITIALIZED_IN_CLASS_P(DECL) \
+ (DECL_LANG_SPECIFIC (DECL)->decl_flags.initialized_in_class)
+
+/* Nonzero for DECL means that this decl is just a friend declaration,
+ and should not be added to the list of members for this class. */
+#define DECL_FRIEND_P(NODE) (DECL_LANG_SPECIFIC (NODE)->decl_flags.friend_attr)
+
+/* A TREE_LIST of the types which have befriended this FUNCTION_DECL. */
+#define DECL_BEFRIENDING_CLASSES(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.befriending_classes)
+
+/* Nonzero for FUNCTION_DECL means that this decl is a static
+ member function. */
+#define DECL_STATIC_FUNCTION_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.static_function)
+
+/* Nonzero for FUNCTION_DECL means that this decl is a non-static
+ member function. */
+#define DECL_NONSTATIC_MEMBER_FUNCTION_P(NODE) \
+ (TREE_CODE (TREE_TYPE (NODE)) == METHOD_TYPE)
+
+/* Nonzero for FUNCTION_DECL means that this decl is a member function
+ (static or non-static). */
+#define DECL_FUNCTION_MEMBER_P(NODE) \
+ (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) || DECL_STATIC_FUNCTION_P (NODE))
+
+/* Nonzero for FUNCTION_DECL means that this member function
+ has `this' as const X *const. */
+#define DECL_CONST_MEMFUNC_P(NODE) \
+ (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) \
+ && CP_TYPE_CONST_P (TREE_TYPE (TREE_VALUE \
+ (TYPE_ARG_TYPES (TREE_TYPE (NODE))))))
+
+/* Nonzero for FUNCTION_DECL means that this member function
+ has `this' as volatile X *const. */
+#define DECL_VOLATILE_MEMFUNC_P(NODE) \
+ (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) \
+ && CP_TYPE_VOLATILE_P (TREE_TYPE (TREE_VALUE \
+ (TYPE_ARG_TYPES (TREE_TYPE (NODE))))))
+
+/* Nonzero for a DECL means that this member is a non-static member. */
+#define DECL_NONSTATIC_MEMBER_P(NODE) \
+ (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) \
+ || TREE_CODE (NODE) == FIELD_DECL)
+
+/* Nonzero for _DECL means that this member object type
+ is mutable. */
+#define DECL_MUTABLE_P(NODE) (DECL_LANG_FLAG_0 (NODE))
+
+/* Nonzero for _DECL means that this constructor is a non-converting
+ constructor. */
+#define DECL_NONCONVERTING_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.nonconverting)
+
+/* Nonzero for FUNCTION_DECL means that this member function is a pure
+ virtual function. */
+#define DECL_PURE_VIRTUAL_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.pure_virtual)
+
+/* True (in a FUNCTION_DECL) if NODE is a virtual function that is an
+ invalid overrider for a function from a base class. Once we have
+ complained about an invalid overrider we avoid complaining about it
+ again. */
+#define DECL_INVALID_OVERRIDER_P(NODE) \
+ (DECL_LANG_FLAG_4 (NODE))
+
+/* The thunks associated with NODE, a FUNCTION_DECL. */
+#define DECL_THUNKS(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.context)
+
+/* Nonzero if NODE is a thunk, rather than an ordinary function. */
+#define DECL_THUNK_P(NODE) \
+ (TREE_CODE (NODE) == FUNCTION_DECL \
+ && DECL_LANG_SPECIFIC (NODE) \
+ && DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p)
+
+/* Set DECL_THUNK_P for node. */
+#define SET_DECL_THUNK_P(NODE, THIS_ADJUSTING) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p = 1, \
+ DECL_LANG_SPECIFIC (NODE)->u.f.u3sel = 1, \
+ DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p = (THIS_ADJUSTING))
+
+/* Nonzero if NODE is a this pointer adjusting thunk. */
+#define DECL_THIS_THUNK_P(NODE) \
+ (DECL_THUNK_P (NODE) && DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p)
+
+/* Nonzero if NODE is a result pointer adjusting thunk. */
+#define DECL_RESULT_THUNK_P(NODE) \
+ (DECL_THUNK_P (NODE) && !DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p)
+
+/* Nonzero if NODE is a FUNCTION_DECL, but not a thunk. */
+#define DECL_NON_THUNK_FUNCTION_P(NODE) \
+ (TREE_CODE (NODE) == FUNCTION_DECL && !DECL_THUNK_P (NODE))
+
+/* Nonzero if NODE is `extern "C"'. */
+#define DECL_EXTERN_C_P(NODE) \
+ (DECL_LANGUAGE (NODE) == lang_c)
+
+/* Nonzero if NODE is an `extern "C"' function. */
+#define DECL_EXTERN_C_FUNCTION_P(NODE) \
+ (DECL_NON_THUNK_FUNCTION_P (NODE) && DECL_EXTERN_C_P (NODE))
+
+/* True iff DECL is an entity with vague linkage whose definition is
+ available in this translation unit. */
+#define DECL_REPO_AVAILABLE_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.repo_available_p)
+
+/* Nonzero if this DECL is the __PRETTY_FUNCTION__ variable in a
+ template function. */
+#define DECL_PRETTY_FUNCTION_P(NODE) \
+ (TREE_LANG_FLAG_0 (VAR_DECL_CHECK (NODE)))
+
+/* The _TYPE context in which this _DECL appears. This field holds the
+ class where a virtual function instance is actually defined. */
+#define DECL_CLASS_CONTEXT(NODE) \
+ (DECL_CLASS_SCOPE_P (NODE) ? DECL_CONTEXT (NODE) : NULL_TREE)
+
+/* For a non-member friend function, the class (if any) in which this
+ friend was defined. For example, given:
+
+ struct S { friend void f (); };
+
+ the DECL_FRIEND_CONTEXT for `f' will be `S'. */
+#define DECL_FRIEND_CONTEXT(NODE) \
+ ((DECL_FRIEND_P (NODE) && !DECL_FUNCTION_MEMBER_P (NODE)) \
+ ? DECL_LANG_SPECIFIC (NODE)->u.f.context \
+ : NULL_TREE)
+
+/* Set the DECL_FRIEND_CONTEXT for NODE to CONTEXT. */
+#define SET_DECL_FRIEND_CONTEXT(NODE, CONTEXT) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.context = (CONTEXT))
+
+/* NULL_TREE in DECL_CONTEXT represents the global namespace. */
+#define CP_DECL_CONTEXT(NODE) \
+ (DECL_CONTEXT (NODE) ? DECL_CONTEXT (NODE) : global_namespace)
+#define CP_TYPE_CONTEXT(NODE) \
+ (TYPE_CONTEXT (NODE) ? TYPE_CONTEXT (NODE) : global_namespace)
+#define FROB_CONTEXT(NODE) ((NODE) == global_namespace ? NULL_TREE : (NODE))
+
+/* 1 iff NODE has namespace scope, including the global namespace. */
+#define DECL_NAMESPACE_SCOPE_P(NODE) \
+ (!DECL_TEMPLATE_PARM_P (NODE) \
+ && TREE_CODE (CP_DECL_CONTEXT (NODE)) == NAMESPACE_DECL)
+
+/* 1 iff NODE is a class member. */
+#define DECL_CLASS_SCOPE_P(NODE) \
+ (DECL_CONTEXT (NODE) && TYPE_P (DECL_CONTEXT (NODE)))
+
+#define TYPE_CLASS_SCOPE_P(NODE) \
+ (TYPE_CONTEXT (NODE) && TYPE_P (TYPE_CONTEXT (NODE)))
+
+/* 1 iff NODE is function-local. */
+#define DECL_FUNCTION_SCOPE_P(NODE) \
+ (DECL_CONTEXT (NODE) \
+ && TREE_CODE (DECL_CONTEXT (NODE)) == FUNCTION_DECL)
+
+/* 1 iff VAR_DECL node NODE is a type-info decl. This flag is set for
+ both the primary typeinfo object and the associated NTBS name. */
+#define DECL_TINFO_P(NODE) TREE_LANG_FLAG_4 (VAR_DECL_CHECK (NODE))
+
+/* 1 iff VAR_DECL node NODE is virtual table or VTT. */
+#define DECL_VTABLE_OR_VTT_P(NODE) TREE_LANG_FLAG_5 (VAR_DECL_CHECK (NODE))
+
+/* Returns 1 iff VAR_DECL is a construction virtual table.
+ DECL_VTABLE_OR_VTT_P will be true in this case and must be checked
+ before using this macro. */
+#define DECL_CONSTRUCTION_VTABLE_P(NODE) \
+ TREE_LANG_FLAG_6 (VAR_DECL_CHECK (NODE))
+
+/* 1 iff NODE is function-local, but for types. */
+#define LOCAL_CLASS_P(NODE) \
+ (decl_function_context (TYPE_MAIN_DECL (NODE)) != NULL_TREE)
+
+/* For a NAMESPACE_DECL: the list of using namespace directives
+ The PURPOSE is the used namespace, the value is the namespace
+ that is the common ancestor. */
+#define DECL_NAMESPACE_USING(NODE) DECL_VINDEX (NAMESPACE_DECL_CHECK (NODE))
+
+/* In a NAMESPACE_DECL, the DECL_INITIAL is used to record all users
+ of a namespace, to record the transitive closure of using namespace. */
+#define DECL_NAMESPACE_USERS(NODE) DECL_INITIAL (NAMESPACE_DECL_CHECK (NODE))
+
+/* In a NAMESPACE_DECL, the list of namespaces which have associated
+ themselves with this one. */
+#define DECL_NAMESPACE_ASSOCIATIONS(NODE) \
+ (NAMESPACE_DECL_CHECK (NODE)->decl_non_common.saved_tree)
+
+/* In a NAMESPACE_DECL, points to the original namespace if this is
+ a namespace alias. */
+#define DECL_NAMESPACE_ALIAS(NODE) \
+ DECL_ABSTRACT_ORIGIN (NAMESPACE_DECL_CHECK (NODE))
+#define ORIGINAL_NAMESPACE(NODE) \
+ (DECL_NAMESPACE_ALIAS (NODE) ? DECL_NAMESPACE_ALIAS (NODE) : (NODE))
+
+/* Nonzero if NODE is the std namespace. */
+#define DECL_NAMESPACE_STD_P(NODE) \
+ (TREE_CODE (NODE) == NAMESPACE_DECL \
+ && CP_DECL_CONTEXT (NODE) == global_namespace \
+ && DECL_NAME (NODE) == std_identifier)
+
+/* In a TREE_LIST concatenating using directives, indicate indirect
+ directives */
+#define TREE_INDIRECT_USING(NODE) (TREE_LIST_CHECK (NODE)->base.lang_flag_0)
+
+/* In a TREE_LIST in an attribute list, indicates that the attribute
+ must be applied at instantiation time. */
+#define ATTR_IS_DEPENDENT(NODE) (TREE_LIST_CHECK (NODE)->base.lang_flag_0)
+
+extern tree decl_shadowed_for_var_lookup (tree);
+extern void decl_shadowed_for_var_insert (tree, tree);
+
+/* Non zero if this is a using decl for a dependent scope. */
+#define DECL_DEPENDENT_P(NODE) DECL_LANG_FLAG_0 (USING_DECL_CHECK (NODE))
+
+/* The scope named in a using decl. */
+#define USING_DECL_SCOPE(NODE) TREE_TYPE (USING_DECL_CHECK (NODE))
+
+/* The decls named by a using decl. */
+#define USING_DECL_DECLS(NODE) DECL_INITIAL (USING_DECL_CHECK (NODE))
+
+/* In a VAR_DECL, true if we have a shadowed local variable
+ in the shadowed var table for this VAR_DECL. */
+#define DECL_HAS_SHADOWED_FOR_VAR_P(NODE) \
+ (VAR_DECL_CHECK (NODE)->decl_with_vis.shadowed_for_var_p)
+
+/* In a VAR_DECL for a variable declared in a for statement,
+ this is the shadowed (local) variable. */
+#define DECL_SHADOWED_FOR_VAR(NODE) \
+ (DECL_HAS_SHADOWED_FOR_VAR_P(NODE) ? decl_shadowed_for_var_lookup (NODE) : NULL)
+
+#define SET_DECL_SHADOWED_FOR_VAR(NODE, VAL) \
+ (decl_shadowed_for_var_insert (NODE, VAL))
+
+/* In a FUNCTION_DECL, this is nonzero if this function was defined in
+ the class definition. We have saved away the text of the function,
+ but have not yet processed it. */
+#define DECL_PENDING_INLINE_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.pending_inline_p)
+
+/* If DECL_PENDING_INLINE_P holds, this is the saved text of the
+ function. */
+#define DECL_PENDING_INLINE_INFO(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.u.pending_inline_info)
+
+/* For a TYPE_DECL: if this structure has many fields, we'll sort them
+ and put them into a TREE_VEC. */
+#define DECL_SORTED_FIELDS(NODE) \
+ (DECL_LANG_SPECIFIC (TYPE_DECL_CHECK (NODE))->u.f.u.sorted_fields)
+
+/* True if on the deferred_fns (see decl2.c) list. */
+#define DECL_DEFERRED_FN(DECL) \
+ (DECL_LANG_SPECIFIC (DECL)->decl_flags.deferred)
+
+/* If non-NULL for a VAR_DECL, FUNCTION_DECL, TYPE_DECL or
+ TEMPLATE_DECL, the entity is either a template specialization (if
+ DECL_USE_TEMPLATE is nonzero) or the abstract instance of the
+ template itself.
+
+ In either case, DECL_TEMPLATE_INFO is a TREE_LIST, whose
+ TREE_PURPOSE is the TEMPLATE_DECL of which this entity is a
+ specialization or abstract instance. The TREE_VALUE is the
+ template arguments used to specialize the template.
+
+ Consider:
+
+ template <typename T> struct S { friend void f(T) {} };
+
+ In this case, S<int>::f is, from the point of view of the compiler,
+ an instantiation of a template -- but, from the point of view of
+ the language, each instantiation of S results in a wholly unrelated
+ global function f. In this case, DECL_TEMPLATE_INFO for S<int>::f
+ will be non-NULL, but DECL_USE_TEMPLATE will be zero. */
+#define DECL_TEMPLATE_INFO(NODE) \
+ (DECL_LANG_SPECIFIC (VAR_TEMPL_TYPE_OR_FUNCTION_DECL_CHECK (NODE)) \
+ ->decl_flags.u.template_info)
+
+/* For a VAR_DECL, indicates that the variable is actually a
+ non-static data member of anonymous union that has been promoted to
+ variable status. */
+#define DECL_ANON_UNION_VAR_P(NODE) \
+ (DECL_LANG_FLAG_4 (VAR_DECL_CHECK (NODE)))
+
+/* Template information for a RECORD_TYPE or UNION_TYPE. */
+#define CLASSTYPE_TEMPLATE_INFO(NODE) \
+ (LANG_TYPE_CLASS_CHECK (RECORD_OR_UNION_CHECK (NODE))->template_info)
+
+/* Template information for an ENUMERAL_TYPE. Although an enumeration may
+ not be a primary template, it may be declared within the scope of a
+ primary template and the enumeration constants may depend on
+ non-type template parameters. */
+#define ENUM_TEMPLATE_INFO(NODE) \
+ (TYPE_LANG_SLOT_1 (ENUMERAL_TYPE_CHECK (NODE)))
+
+/* Template information for a template template parameter. */
+#define TEMPLATE_TEMPLATE_PARM_TEMPLATE_INFO(NODE) \
+ (LANG_TYPE_CLASS_CHECK (BOUND_TEMPLATE_TEMPLATE_PARM_TYPE_CHECK (NODE)) \
+ ->template_info)
+
+/* Template information for an ENUMERAL_, RECORD_, or UNION_TYPE. */
+#define TYPE_TEMPLATE_INFO(NODE) \
+ (TREE_CODE (NODE) == ENUMERAL_TYPE \
+ ? ENUM_TEMPLATE_INFO (NODE) : \
+ (TREE_CODE (NODE) == BOUND_TEMPLATE_TEMPLATE_PARM \
+ ? TEMPLATE_TEMPLATE_PARM_TEMPLATE_INFO (NODE) : \
+ (TYPE_LANG_SPECIFIC (NODE) \
+ ? CLASSTYPE_TEMPLATE_INFO (NODE) \
+ : NULL_TREE)))
+
+/* Set the template information for an ENUMERAL_, RECORD_, or
+ UNION_TYPE to VAL. */
+#define SET_TYPE_TEMPLATE_INFO(NODE, VAL) \
+ (TREE_CODE (NODE) == ENUMERAL_TYPE \
+ ? (ENUM_TEMPLATE_INFO (NODE) = (VAL)) \
+ : (CLASSTYPE_TEMPLATE_INFO (NODE) = (VAL)))
+
+#define TI_TEMPLATE(NODE) (TREE_PURPOSE (NODE))
+#define TI_ARGS(NODE) (TREE_VALUE (NODE))
+#define TI_PENDING_TEMPLATE_FLAG(NODE) TREE_LANG_FLAG_1 (NODE)
+
+/* For a given TREE_VEC containing a template argument list,
+ this property contains the number of arguments that are not
+ defaulted. */
+#define NON_DEFAULT_TEMPLATE_ARGS_COUNT(NODE) TREE_CHAIN (TREE_VEC_CHECK (NODE))
+/* Below are the setter and getter of the NON_DEFAULT_TEMPLATE_ARGS_COUNT
+ property. */
+#define SET_NON_DEFAULT_TEMPLATE_ARGS_COUNT(NODE, INT_VALUE) \
+ NON_DEFAULT_TEMPLATE_ARGS_COUNT(NODE) = build_int_cst (NULL_TREE, INT_VALUE)
+#ifdef ENABLE_CHECKING
+#define GET_NON_DEFAULT_TEMPLATE_ARGS_COUNT(NODE) \
+ int_cst_value (NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE))
+#else
+#define GET_NON_DEFAULT_TEMPLATE_ARGS_COUNT(NODE) \
+ NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE) \
+ ? int_cst_value (NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE)) \
+ : TREE_VEC_LENGTH (INNERMOST_TEMPLATE_ARGS (NODE))
+#endif
+
+/* We use TREE_VECs to hold template arguments. If there is only one
+ level of template arguments, then the TREE_VEC contains the
+ arguments directly. If there is more than one level of template
+ arguments, then each entry in the TREE_VEC is itself a TREE_VEC,
+ containing the template arguments for a single level. The first
+ entry in the outer TREE_VEC is the outermost level of template
+ parameters; the last is the innermost.
+
+ It is incorrect to ever form a template argument vector containing
+ only one level of arguments, but which is a TREE_VEC containing as
+ its only entry the TREE_VEC for that level.
+
+ For each TREE_VEC containing the template arguments for a single
+ level, it's possible to get or set the number of non defaulted
+ template arguments by using the accessor macros
+ GET_NON_DEFAULT_TEMPLATE_ARGS_COUNT or
+ SET_NON_DEFAULT_TEMPLATE_ARGS_COUNT. */
+
+/* Nonzero if the template arguments is actually a vector of vectors,
+ rather than just a vector. */
+#define TMPL_ARGS_HAVE_MULTIPLE_LEVELS(NODE) \
+ (NODE && TREE_VEC_LENGTH (NODE) && TREE_VEC_ELT (NODE, 0) \
+ && TREE_CODE (TREE_VEC_ELT (NODE, 0)) == TREE_VEC)
+
+/* The depth of a template argument vector. When called directly by
+ the parser, we use a TREE_LIST rather than a TREE_VEC to represent
+ template arguments. In fact, we may even see NULL_TREE if there
+ are no template arguments. In both of those cases, there is only
+ one level of template arguments. */
+#define TMPL_ARGS_DEPTH(NODE) \
+ (TMPL_ARGS_HAVE_MULTIPLE_LEVELS (NODE) ? TREE_VEC_LENGTH (NODE) : 1)
+
+/* The LEVELth level of the template ARGS. The outermost level of
+ args is level 1, not level 0. */
+#define TMPL_ARGS_LEVEL(ARGS, LEVEL) \
+ (TMPL_ARGS_HAVE_MULTIPLE_LEVELS (ARGS) \
+ ? TREE_VEC_ELT (ARGS, (LEVEL) - 1) : (ARGS))
+
+/* Set the LEVELth level of the template ARGS to VAL. This macro does
+ not work with single-level argument vectors. */
+#define SET_TMPL_ARGS_LEVEL(ARGS, LEVEL, VAL) \
+ (TREE_VEC_ELT (ARGS, (LEVEL) - 1) = (VAL))
+
+/* Accesses the IDXth parameter in the LEVELth level of the ARGS. */
+#define TMPL_ARG(ARGS, LEVEL, IDX) \
+ (TREE_VEC_ELT (TMPL_ARGS_LEVEL (ARGS, LEVEL), IDX))
+
+/* Given a single level of template arguments in NODE, return the
+ number of arguments. */
+#define NUM_TMPL_ARGS(NODE) \
+ (TREE_VEC_LENGTH (NODE))
+
+/* Returns the innermost level of template arguments in ARGS. */
+#define INNERMOST_TEMPLATE_ARGS(NODE) \
+ (get_innermost_template_args ((NODE), 1))
+
+/* The number of levels of template parameters given by NODE. */
+#define TMPL_PARMS_DEPTH(NODE) \
+ ((HOST_WIDE_INT) TREE_INT_CST_LOW (TREE_PURPOSE (NODE)))
+
+/* The TEMPLATE_DECL instantiated or specialized by NODE. This
+ TEMPLATE_DECL will be the immediate parent, not the most general
+ template. For example, in:
+
+ template <class T> struct S { template <class U> void f(U); }
+
+ the FUNCTION_DECL for S<int>::f<double> will have, as its
+ DECL_TI_TEMPLATE, `template <class U> S<int>::f<U>'.
+
+ As a special case, for a member friend template of a template
+ class, this value will not be a TEMPLATE_DECL, but rather an
+ IDENTIFIER_NODE or OVERLOAD indicating the name of the template and
+ any explicit template arguments provided. For example, in:
+
+ template <class T> struct S { friend void f<int>(int, double); }
+
+ the DECL_TI_TEMPLATE will be an IDENTIFIER_NODE for `f' and the
+ DECL_TI_ARGS will be {int}. */
+#define DECL_TI_TEMPLATE(NODE) TI_TEMPLATE (DECL_TEMPLATE_INFO (NODE))
+
+/* The template arguments used to obtain this decl from the most
+ general form of DECL_TI_TEMPLATE. For the example given for
+ DECL_TI_TEMPLATE, the DECL_TI_ARGS will be {int, double}. These
+ are always the full set of arguments required to instantiate this
+ declaration from the most general template specialized here. */
+#define DECL_TI_ARGS(NODE) TI_ARGS (DECL_TEMPLATE_INFO (NODE))
+
+/* The TEMPLATE_DECL associated with NODE, a class type. Even if NODE
+ will be generated from a partial specialization, the TEMPLATE_DECL
+ referred to here will be the original template. For example,
+ given:
+
+ template <typename T> struct S {};
+ template <typename T> struct S<T*> {};
+
+ the CLASSTPYE_TI_TEMPLATE for S<int*> will be S, not the S<T*>. */
+#define CLASSTYPE_TI_TEMPLATE(NODE) TI_TEMPLATE (CLASSTYPE_TEMPLATE_INFO (NODE))
+#define CLASSTYPE_TI_ARGS(NODE) TI_ARGS (CLASSTYPE_TEMPLATE_INFO (NODE))
+
+/* For a template instantiation TYPE, returns the TYPE corresponding
+ to the primary template. Otherwise returns TYPE itself. */
+#define CLASSTYPE_PRIMARY_TEMPLATE_TYPE(TYPE) \
+ ((CLASSTYPE_USE_TEMPLATE ((TYPE)) \
+ && !CLASSTYPE_TEMPLATE_SPECIALIZATION ((TYPE))) \
+ ? TREE_TYPE (DECL_TEMPLATE_RESULT (DECL_PRIMARY_TEMPLATE \
+ (CLASSTYPE_TI_TEMPLATE ((TYPE))))) \
+ : (TYPE))
+
+/* Like CLASS_TI_TEMPLATE, but also works for ENUMERAL_TYPEs. */
+#define TYPE_TI_TEMPLATE(NODE) \
+ (TI_TEMPLATE (TYPE_TEMPLATE_INFO (NODE)))
+
+/* Like DECL_TI_ARGS, but for an ENUMERAL_, RECORD_, or UNION_TYPE. */
+#define TYPE_TI_ARGS(NODE) \
+ (TI_ARGS (TYPE_TEMPLATE_INFO (NODE)))
+
+#define INNERMOST_TEMPLATE_PARMS(NODE) TREE_VALUE (NODE)
+
+/* Nonzero if NODE (a TEMPLATE_DECL) is a member template, in the
+ sense of [temp.mem]. */
+#define DECL_MEMBER_TEMPLATE_P(NODE) \
+ (DECL_LANG_FLAG_1 (TEMPLATE_DECL_CHECK (NODE)))
+
+/* Nonzero if the NODE corresponds to the template parameters for a
+ member template, whose inline definition is being processed after
+ the class definition is complete. */
+#define TEMPLATE_PARMS_FOR_INLINE(NODE) TREE_LANG_FLAG_1 (NODE)
+
+/* Determine if a parameter (i.e., a PARM_DECL) is a function
+ parameter pack. */
+#define FUNCTION_PARAMETER_PACK_P(NODE) \
+ (DECL_LANG_FLAG_1 (PARM_DECL_CHECK (NODE)))
+
+/* Determines if NODE is an expansion of one or more parameter packs,
+ e.g., a TYPE_PACK_EXPANSION or EXPR_PACK_EXPANSION. */
+#define PACK_EXPANSION_P(NODE) \
+ (TREE_CODE (NODE) == TYPE_PACK_EXPANSION \
+ || TREE_CODE (NODE) == EXPR_PACK_EXPANSION)
+
+/* Extracts the type or expression pattern from a TYPE_PACK_EXPANSION or
+ EXPR_PACK_EXPANSION. */
+#define PACK_EXPANSION_PATTERN(NODE) \
+ (TREE_CODE (NODE) == TYPE_PACK_EXPANSION? TREE_TYPE (NODE) \
+ : TREE_OPERAND (NODE, 0))
+
+/* Sets the type or expression pattern for a TYPE_PACK_EXPANSION or
+ EXPR_PACK_EXPANSION. */
+#define SET_PACK_EXPANSION_PATTERN(NODE,VALUE) \
+ if (TREE_CODE (NODE) == TYPE_PACK_EXPANSION) \
+ TREE_TYPE (NODE) = VALUE; \
+ else \
+ TREE_OPERAND (NODE, 0) = VALUE
+
+/* The list of parameter packs used in the PACK_EXPANSION_* node. The
+ TREE_VALUE of each TREE_LIST contains the parameter packs. */
+#define PACK_EXPANSION_PARAMETER_PACKS(NODE) TREE_CHAIN (NODE)
+
+/* Determine if this is an argument pack. */
+#define ARGUMENT_PACK_P(NODE) \
+ (TREE_CODE (NODE) == TYPE_ARGUMENT_PACK \
+ || TREE_CODE (NODE) == NONTYPE_ARGUMENT_PACK)
+
+/* The arguments stored in an argument pack. Arguments are stored in a
+ TREE_VEC, which may have length zero. */
+#define ARGUMENT_PACK_ARGS(NODE) \
+ (TREE_CODE (NODE) == TYPE_ARGUMENT_PACK? TREE_TYPE (NODE) \
+ : TREE_OPERAND (NODE, 0))
+
+/* Set the arguments stored in an argument pack. VALUE must be a
+ TREE_VEC. */
+#define SET_ARGUMENT_PACK_ARGS(NODE,VALUE) \
+ if (TREE_CODE (NODE) == TYPE_ARGUMENT_PACK) \
+ TREE_TYPE (NODE) = VALUE; \
+ else \
+ TREE_OPERAND (NODE, 0) = VALUE
+
+/* Whether the argument pack is "incomplete", meaning that more
+ arguments can still be deduced. Incomplete argument packs are only
+ used when the user has provided an explicit template argument list
+ for a variadic function template. Some of the explicit template
+ arguments will be placed into the beginning of the argument pack,
+ but additional arguments might still be deduced. */
+#define ARGUMENT_PACK_INCOMPLETE_P(NODE) \
+ TREE_LANG_FLAG_0 (ARGUMENT_PACK_ARGS (NODE))
+
+/* When ARGUMENT_PACK_INCOMPLETE_P, stores the explicit template
+ arguments used to fill this pack. */
+#define ARGUMENT_PACK_EXPLICIT_ARGS(NODE) \
+ TREE_TYPE (ARGUMENT_PACK_ARGS (NODE))
+
+/* In an ARGUMENT_PACK_SELECT, the argument pack from which an
+ argument will be selected. */
+#define ARGUMENT_PACK_SELECT_FROM_PACK(NODE) \
+ (((struct tree_argument_pack_select *)ARGUMENT_PACK_SELECT_CHECK (NODE))->argument_pack)
+
+/* In an ARGUMENT_PACK_SELECT, the index of the argument we want to
+ select. */
+#define ARGUMENT_PACK_SELECT_INDEX(NODE) \
+ (((struct tree_argument_pack_select *)ARGUMENT_PACK_SELECT_CHECK (NODE))->index)
+
+/* In an ARGUMENT_PACK_SELECT, the actual underlying argument that the
+ ARGUMENT_PACK_SELECT represents. */
+#define ARGUMENT_PACK_SELECT_ARG(NODE) \
+ TREE_VEC_ELT (ARGUMENT_PACK_ARGS (ARGUMENT_PACK_SELECT_FROM_PACK (NODE)), \
+ ARGUMENT_PACK_SELECT_INDEX (NODE));
+
+/* In a FUNCTION_DECL, the saved language-specific per-function data. */
+#define DECL_SAVED_FUNCTION_DATA(NODE) \
+ (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (NODE)) \
+ ->u.f.u.saved_language_function)
+
+/* Indicates an indirect_expr is for converting a reference. */
+#define REFERENCE_REF_P(NODE) \
+ TREE_LANG_FLAG_0 (INDIRECT_REF_CHECK (NODE))
+
+#define NEW_EXPR_USE_GLOBAL(NODE) \
+ TREE_LANG_FLAG_0 (NEW_EXPR_CHECK (NODE))
+#define DELETE_EXPR_USE_GLOBAL(NODE) \
+ TREE_LANG_FLAG_0 (DELETE_EXPR_CHECK (NODE))
+#define DELETE_EXPR_USE_VEC(NODE) \
+ TREE_LANG_FLAG_1 (DELETE_EXPR_CHECK (NODE))
+
+/* Indicates that this is a non-dependent COMPOUND_EXPR which will
+ resolve to a function call. */
+#define COMPOUND_EXPR_OVERLOADED(NODE) \
+ TREE_LANG_FLAG_0 (COMPOUND_EXPR_CHECK (NODE))
+
+/* In a CALL_EXPR appearing in a template, true if Koenig lookup
+ should be performed at instantiation time. */
+#define KOENIG_LOOKUP_P(NODE) TREE_LANG_FLAG_0 (CALL_EXPR_CHECK (NODE))
+
+/* Indicates whether a string literal has been parenthesized. Such
+ usages are disallowed in certain circumstances. */
+
+#define PAREN_STRING_LITERAL_P(NODE) \
+ TREE_LANG_FLAG_0 (STRING_CST_CHECK (NODE))
+
+/* Nonzero if this AGGR_INIT_EXPR provides for initialization via a
+ constructor call, rather than an ordinary function call. */
+#define AGGR_INIT_VIA_CTOR_P(NODE) \
+ TREE_LANG_FLAG_0 (AGGR_INIT_EXPR_CHECK (NODE))
+
+/* Nonzero if expanding this AGGR_INIT_EXPR should first zero-initialize
+ the object. */
+#define AGGR_INIT_ZERO_FIRST(NODE) \
+ TREE_LANG_FLAG_2 (AGGR_INIT_EXPR_CHECK (NODE))
+
+/* AGGR_INIT_EXPR accessors. These are equivalent to the CALL_EXPR
+ accessors, except for AGGR_INIT_EXPR_SLOT (which takes the place of
+ CALL_EXPR_STATIC_CHAIN). */
+
+#define AGGR_INIT_EXPR_FN(NODE) TREE_OPERAND (AGGR_INIT_EXPR_CHECK (NODE), 1)
+#define AGGR_INIT_EXPR_SLOT(NODE) \
+ TREE_OPERAND (AGGR_INIT_EXPR_CHECK (NODE), 2)
+#define AGGR_INIT_EXPR_ARG(NODE, I) \
+ TREE_OPERAND (AGGR_INIT_EXPR_CHECK (NODE), (I) + 3)
+#define aggr_init_expr_nargs(NODE) (VL_EXP_OPERAND_LENGTH(NODE) - 3)
+
+/* AGGR_INIT_EXPR_ARGP returns a pointer to the argument vector for NODE.
+ We can't use &AGGR_INIT_EXPR_ARG (NODE, 0) because that will complain if
+ the argument count is zero when checking is enabled. Instead, do
+ the pointer arithmetic to advance past the 3 fixed operands in a
+ AGGR_INIT_EXPR. That produces a valid pointer to just past the end of
+ the operand array, even if it's not valid to dereference it. */
+#define AGGR_INIT_EXPR_ARGP(NODE) \
+ (&(TREE_OPERAND (AGGR_INIT_EXPR_CHECK (NODE), 0)) + 3)
+
+/* Abstract iterators for AGGR_INIT_EXPRs. */
+
+/* Structure containing iterator state. */
+typedef struct aggr_init_expr_arg_iterator_d GTY (())
+{
+ tree t; /* the aggr_init_expr */
+ int n; /* argument count */
+ int i; /* next argument index */
+} aggr_init_expr_arg_iterator;
+
+/* Initialize the abstract argument list iterator object ITER with the
+ arguments from AGGR_INIT_EXPR node EXP. */
+static inline void
+init_aggr_init_expr_arg_iterator (tree exp,
+ aggr_init_expr_arg_iterator *iter)
+{
+ iter->t = exp;
+ iter->n = aggr_init_expr_nargs (exp);
+ iter->i = 0;
+}
+
+/* Return the next argument from abstract argument list iterator object ITER,
+ and advance its state. Return NULL_TREE if there are no more arguments. */
+static inline tree
+next_aggr_init_expr_arg (aggr_init_expr_arg_iterator *iter)
+{
+ tree result;
+ if (iter->i >= iter->n)
+ return NULL_TREE;
+ result = AGGR_INIT_EXPR_ARG (iter->t, iter->i);
+ iter->i++;
+ return result;
+}
+
+/* Initialize the abstract argument list iterator object ITER, then advance
+ past and return the first argument. Useful in for expressions, e.g.
+ for (arg = first_aggr_init_expr_arg (exp, &iter); arg;
+ arg = next_aggr_init_expr_arg (&iter)) */
+static inline tree
+first_aggr_init_expr_arg (tree exp, aggr_init_expr_arg_iterator *iter)
+{
+ init_aggr_init_expr_arg_iterator (exp, iter);
+ return next_aggr_init_expr_arg (iter);
+}
+
+/* Test whether there are more arguments in abstract argument list iterator
+ ITER, without changing its state. */
+static inline bool
+more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter)
+{
+ return (iter->i < iter->n);
+}
+
+/* Iterate through each argument ARG of AGGR_INIT_EXPR CALL, using variable
+ ITER (of type aggr_init_expr_arg_iterator) to hold the iteration state. */
+#define FOR_EACH_AGGR_INIT_EXPR_ARG(arg, iter, call) \
+ for ((arg) = first_aggr_init_expr_arg ((call), &(iter)); (arg); \
+ (arg) = next_aggr_init_expr_arg (&(iter)))
+
+/* The TYPE_MAIN_DECL for a class template type is a TYPE_DECL, not a
+ TEMPLATE_DECL. This macro determines whether or not a given class
+ type is really a template type, as opposed to an instantiation or
+ specialization of one. */
+#define CLASSTYPE_IS_TEMPLATE(NODE) \
+ (CLASSTYPE_TEMPLATE_INFO (NODE) \
+ && !CLASSTYPE_USE_TEMPLATE (NODE) \
+ && PRIMARY_TEMPLATE_P (CLASSTYPE_TI_TEMPLATE (NODE)))
+
+/* The name used by the user to name the typename type. Typically,
+ this is an IDENTIFIER_NODE, and the same as the DECL_NAME on the
+ corresponding TYPE_DECL. However, this may also be a
+ TEMPLATE_ID_EXPR if we had something like `typename X::Y<T>'. */
+#define TYPENAME_TYPE_FULLNAME(NODE) (TYPENAME_TYPE_CHECK (NODE))->type.values
+
+/* True if a TYPENAME_TYPE was declared as an "enum". */
+#define TYPENAME_IS_ENUM_P(NODE) \
+ (TREE_LANG_FLAG_0 (TYPENAME_TYPE_CHECK (NODE)))
+
+/* True if a TYPENAME_TYPE was declared as a "class", "struct", or
+ "union". */
+#define TYPENAME_IS_CLASS_P(NODE) \
+ (TREE_LANG_FLAG_1 (TYPENAME_TYPE_CHECK (NODE)))
+
+/* True if a TYPENAME_TYPE is in the process of being resolved. */
+#define TYPENAME_IS_RESOLVING_P(NODE) \
+ (TREE_LANG_FLAG_2 (TYPENAME_TYPE_CHECK (NODE)))
+
+/* Nonzero in INTEGER_CST means that this int is negative by dint of
+ using a twos-complement negated operand. */
+#define TREE_NEGATED_INT(NODE) TREE_LANG_FLAG_0 (INTEGER_CST_CHECK (NODE))
+
+/* [class.virtual]
+
+ A class that declares or inherits a virtual function is called a
+ polymorphic class. */
+#define TYPE_POLYMORPHIC_P(NODE) (TREE_LANG_FLAG_2 (NODE))
+
+/* Nonzero if this class has a virtual function table pointer. */
+#define TYPE_CONTAINS_VPTR_P(NODE) \
+ (TYPE_POLYMORPHIC_P (NODE) || CLASSTYPE_VBASECLASSES (NODE))
+
+/* This flag is true of a local VAR_DECL if it was declared in a for
+ statement, but we are no longer in the scope of the for. */
+#define DECL_DEAD_FOR_LOCAL(NODE) DECL_LANG_FLAG_7 (VAR_DECL_CHECK (NODE))
+
+/* This flag is set on a VAR_DECL that is a DECL_DEAD_FOR_LOCAL
+ if we already emitted a warning about using it. */
+#define DECL_ERROR_REPORTED(NODE) DECL_LANG_FLAG_0 (VAR_DECL_CHECK (NODE))
+
+/* Nonzero if NODE is a FUNCTION_DECL (for a function with global
+ scope) declared in a local scope. */
+#define DECL_LOCAL_FUNCTION_P(NODE) \
+ DECL_LANG_FLAG_0 (FUNCTION_DECL_CHECK (NODE))
+
+/* Nonzero if NODE is a DECL which we know about but which has not
+ been explicitly declared, such as a built-in function or a friend
+ declared inside a class. In the latter case DECL_HIDDEN_FRIEND_P
+ will be set. */
+#define DECL_ANTICIPATED(NODE) \
+ (DECL_LANG_SPECIFIC (DECL_COMMON_CHECK (NODE))->decl_flags.anticipated_p)
+
+/* Nonzero if NODE is a FUNCTION_DECL which was declared as a friend
+ within a class but has not been declared in the surrounding scope.
+ The function is invisible except via argument dependent lookup. */
+#define DECL_HIDDEN_FRIEND_P(NODE) \
+ (DECL_LANG_SPECIFIC (DECL_COMMON_CHECK (NODE))->decl_flags.hidden_friend_p)
+
+/* Nonzero if DECL has been declared threadprivate by
+ #pragma omp threadprivate. */
+#define CP_DECL_THREADPRIVATE_P(DECL) \
+ (DECL_LANG_SPECIFIC (VAR_DECL_CHECK (DECL))->decl_flags.threadprivate_or_deleted_p)
+
+/* Nonzero if DECL was declared with '= delete'. */
+#define DECL_DELETED_FN(DECL) \
+ (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.threadprivate_or_deleted_p)
+
+/* Nonzero if DECL was declared with '= default'. */
+#define DECL_DEFAULTED_FN(DECL) \
+ (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.defaulted_p)
+
+/* Record whether a typedef for type `int' was actually `signed int'. */
+#define C_TYPEDEF_EXPLICITLY_SIGNED(EXP) DECL_LANG_FLAG_1 (EXP)
+
+/* Returns nonzero if DECL has external linkage, as specified by the
+ language standard. (This predicate may hold even when the
+ corresponding entity is not actually given external linkage in the
+ object file; see decl_linkage for details.) */
+#define DECL_EXTERNAL_LINKAGE_P(DECL) \
+ (decl_linkage (DECL) == lk_external)
+
+/* Keep these codes in ascending code order. */
+
+#define INTEGRAL_CODE_P(CODE) \
+ ((CODE) == ENUMERAL_TYPE \
+ || (CODE) == BOOLEAN_TYPE \
+ || (CODE) == INTEGER_TYPE)
+
+/* [basic.fundamental]
+
+ Types bool, char, wchar_t, and the signed and unsigned integer types
+ are collectively called integral types.
+
+ Note that INTEGRAL_TYPE_P, as defined in tree.h, allows enumeration
+ types as well, which is incorrect in C++. Keep these checks in
+ ascending code order. */
+#define CP_INTEGRAL_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == BOOLEAN_TYPE \
+ || TREE_CODE (TYPE) == INTEGER_TYPE)
+
+/* Returns true if TYPE is an integral or enumeration name. Keep
+ these checks in ascending code order. */
+#define INTEGRAL_OR_ENUMERATION_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == ENUMERAL_TYPE || CP_INTEGRAL_TYPE_P (TYPE))
+
+/* Returns true if TYPE is an integral or unscoped enumeration type. */
+#define INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P(TYPE) \
+ (UNSCOPED_ENUM_P (TYPE) || CP_INTEGRAL_TYPE_P (TYPE))
+
+/* [basic.fundamental]
+
+ Integral and floating types are collectively called arithmetic
+ types.
+
+ As a GNU extension, we also accept complex types.
+
+ Keep these checks in ascending code order. */
+#define ARITHMETIC_TYPE_P(TYPE) \
+ (CP_INTEGRAL_TYPE_P (TYPE) \
+ || TREE_CODE (TYPE) == REAL_TYPE \
+ || TREE_CODE (TYPE) == COMPLEX_TYPE)
+
+/* [basic.types]
+
+ Arithmetic types, enumeration types, pointer types, and
+ pointer-to-member types, are collectively called scalar types.
+
+ Keep these checks in ascending code order. */
+#define SCALAR_TYPE_P(TYPE) \
+ (TYPE_PTRMEM_P (TYPE) \
+ || TREE_CODE (TYPE) == ENUMERAL_TYPE \
+ || ARITHMETIC_TYPE_P (TYPE) \
+ || TYPE_PTR_P (TYPE) \
+ || TYPE_PTRMEMFUNC_P (TYPE))
+
+/* Determines whether this type is a C++0x scoped enumeration
+ type. Scoped enumerations types are introduced via "enum class" or
+ "enum struct", e.g.,
+
+ enum class Color {
+ Red, Green, Blue
+ };
+
+ Scoped enumeration types are different from normal (unscoped)
+ enumeration types in several ways:
+
+ - The enumerators of a scoped enumeration type are only available
+ within the scope of the enumeration type and not in the
+ enclosing scope. For example, the Red color can be referred to
+ with "Color::Red" but not "Red".
+
+ - Scoped enumerators and enumerations do not implicitly convert
+ to integers or 'bool'.
+
+ - The underlying type of the enum is well-defined. */
+#define SCOPED_ENUM_P(TYPE) \
+ (TREE_CODE (TYPE) == ENUMERAL_TYPE && TYPE_LANG_FLAG_5 (TYPE))
+
+/* Determine whether this is an unscoped enumeration type. */
+#define UNSCOPED_ENUM_P(TYPE) \
+ (TREE_CODE (TYPE) == ENUMERAL_TYPE && !TYPE_LANG_FLAG_5 (TYPE))
+
+/* Set the flag indicating whether an ENUMERAL_TYPE is a C++0x scoped
+ enumeration type (1) or a normal (unscoped) enumeration type
+ (0). */
+#define SET_SCOPED_ENUM_P(TYPE, VAL) \
+ (TYPE_LANG_FLAG_5 (ENUMERAL_TYPE_CHECK (TYPE)) = (VAL))
+
+/* Returns the underlying type of the given enumeration type. The
+ underlying type is determined in different ways, depending on the
+ properties of the enum:
+
+ - In C++0x, the underlying type can be explicitly specified, e.g.,
+
+ enum E1 : char { ... } // underlying type is char
+
+ - In a C++0x scoped enumeration, the underlying type is int
+ unless otherwises specified:
+
+ enum class E2 { ... } // underlying type is int
+
+ - Otherwise, the underlying type is determined based on the
+ values of the enumerators. In this case, the
+ ENUM_UNDERLYING_TYPE will not be set until after the definition
+ of the enumeration is completed by finish_enum. */
+#define ENUM_UNDERLYING_TYPE(TYPE) \
+ TREE_TYPE (ENUMERAL_TYPE_CHECK (TYPE))
+
+/* [dcl.init.aggr]
+
+ An aggregate is an array or a class with no user-declared
+ constructors, no private or protected non-static data members, no
+ base classes, and no virtual functions.
+
+ As an extension, we also treat vectors as aggregates. Keep these
+ checks in ascending code order. */
+#define CP_AGGREGATE_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == VECTOR_TYPE \
+ ||TREE_CODE (TYPE) == ARRAY_TYPE \
+ || (CLASS_TYPE_P (TYPE) && !CLASSTYPE_NON_AGGREGATE (TYPE)))
+
+/* Nonzero for a class type means that the class type has a
+ user-declared constructor. */
+#define TYPE_HAS_USER_CONSTRUCTOR(NODE) (TYPE_LANG_FLAG_1 (NODE))
+
+/* When appearing in an INDIRECT_REF, it means that the tree structure
+ underneath is actually a call to a constructor. This is needed
+ when the constructor must initialize local storage (which can
+ be automatically destroyed), rather than allowing it to allocate
+ space from the heap.
+
+ When appearing in a SAVE_EXPR, it means that underneath
+ is a call to a constructor.
+
+ When appearing in a CONSTRUCTOR, the expression is a
+ compound literal.
+
+ When appearing in a FIELD_DECL, it means that this field
+ has been duly initialized in its constructor. */
+#define TREE_HAS_CONSTRUCTOR(NODE) (TREE_LANG_FLAG_4 (NODE))
+
+/* True if NODE is a brace-enclosed initializer. */
+#define BRACE_ENCLOSED_INITIALIZER_P(NODE) \
+ (TREE_CODE (NODE) == CONSTRUCTOR && TREE_TYPE (NODE) == init_list_type_node)
+
+/* True if NODE is a compound-literal, i.e., a brace-enclosed
+ initializer cast to a particular type. */
+#define COMPOUND_LITERAL_P(NODE) \
+ (TREE_CODE (NODE) == CONSTRUCTOR && TREE_HAS_CONSTRUCTOR (NODE))
+
+#define EMPTY_CONSTRUCTOR_P(NODE) (TREE_CODE (NODE) == CONSTRUCTOR \
+ && VEC_empty (constructor_elt, \
+ CONSTRUCTOR_ELTS (NODE)) \
+ && !TREE_HAS_CONSTRUCTOR (NODE))
+
+/* True if NODE is a init-list used as a direct-initializer, i.e.
+ B b{1,2}, not B b({1,2}) or B b = {1,2}. */
+#define CONSTRUCTOR_IS_DIRECT_INIT(NODE) (TREE_LANG_FLAG_0 (CONSTRUCTOR_CHECK (NODE)))
+
+/* Nonzero means that an object of this type can not be initialized using
+ an initializer list. */
+#define CLASSTYPE_NON_AGGREGATE(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->non_aggregate)
+#define TYPE_NON_AGGREGATE_CLASS(NODE) \
+ (CLASS_TYPE_P (NODE) && CLASSTYPE_NON_AGGREGATE (NODE))
+
+/* Nonzero if there is a user-defined X::op=(x&) for this class. */
+#define TYPE_HAS_COMPLEX_ASSIGN_REF(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->has_complex_assign_ref)
+
+/* Nonzero if there is a user-defined X::X(x&) for this class. */
+#define TYPE_HAS_COMPLEX_INIT_REF(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->has_complex_init_ref)
+
+/* Nonzero if there is a user-defined default constructor for this class. */
+#define TYPE_HAS_COMPLEX_DFLT(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->has_complex_dflt)
+
+/* Nonzero if TYPE has a trivial destructor. From [class.dtor]:
+
+ A destructor is trivial if it is an implicitly declared
+ destructor and if:
+
+ - all of the direct base classes of its class have trivial
+ destructors,
+
+ - for all of the non-static data members of its class that are
+ of class type (or array thereof), each such class has a
+ trivial destructor. */
+#define TYPE_HAS_TRIVIAL_DESTRUCTOR(NODE) \
+ (!TYPE_HAS_NONTRIVIAL_DESTRUCTOR (NODE))
+
+/* Nonzero for _TYPE node means that this type does not have a trivial
+ destructor. Therefore, destroying an object of this type will
+ involve a call to a destructor. This can apply to objects of
+ ARRAY_TYPE is the type of the elements needs a destructor. */
+#define TYPE_HAS_NONTRIVIAL_DESTRUCTOR(NODE) \
+ (TYPE_LANG_FLAG_4 (NODE))
+
+/* Nonzero for class type means that the default constructor is trivial. */
+#define TYPE_HAS_TRIVIAL_DFLT(NODE) \
+ (TYPE_HAS_DEFAULT_CONSTRUCTOR (NODE) && ! TYPE_HAS_COMPLEX_DFLT (NODE))
+
+/* Nonzero for class type means that copy initialization of this type can use
+ a bitwise copy. */
+#define TYPE_HAS_TRIVIAL_INIT_REF(NODE) \
+ (TYPE_HAS_INIT_REF (NODE) && ! TYPE_HAS_COMPLEX_INIT_REF (NODE))
+
+/* Nonzero for class type means that assignment of this type can use
+ a bitwise copy. */
+#define TYPE_HAS_TRIVIAL_ASSIGN_REF(NODE) \
+ (TYPE_HAS_ASSIGN_REF (NODE) && ! TYPE_HAS_COMPLEX_ASSIGN_REF (NODE))
+
+/* Returns true if NODE is a pointer-to-data-member. */
+#define TYPE_PTRMEM_P(NODE) \
+ (TREE_CODE (NODE) == OFFSET_TYPE)
+/* Returns true if NODE is a pointer. */
+#define TYPE_PTR_P(NODE) \
+ (TREE_CODE (NODE) == POINTER_TYPE)
+
+/* Returns true if NODE is an object type:
+
+ [basic.types]
+
+ An object type is a (possibly cv-qualified) type that is not a
+ function type, not a reference type, and not a void type.
+
+ Keep these checks in ascending order, for speed. */
+#define TYPE_OBJ_P(NODE) \
+ (TREE_CODE (NODE) != REFERENCE_TYPE \
+ && TREE_CODE (NODE) != VOID_TYPE \
+ && TREE_CODE (NODE) != FUNCTION_TYPE \
+ && TREE_CODE (NODE) != METHOD_TYPE)
+
+/* Returns true if NODE is a pointer to an object. Keep these checks
+ in ascending tree code order. */
+#define TYPE_PTROB_P(NODE) \
+ (TYPE_PTR_P (NODE) && TYPE_OBJ_P (TREE_TYPE (NODE)))
+
+/* Returns true if NODE is a reference to an object. Keep these checks
+ in ascending tree code order. */
+#define TYPE_REF_OBJ_P(NODE) \
+ (TREE_CODE (NODE) == REFERENCE_TYPE && TYPE_OBJ_P (TREE_TYPE (NODE)))
+
+/* True if reference type NODE is an rvalue reference */
+#define TYPE_REF_IS_RVALUE(NODE) \
+ TREE_LANG_FLAG_0 (REFERENCE_TYPE_CHECK (NODE))
+
+/* Returns true if NODE is a pointer to an object, or a pointer to
+ void. Keep these checks in ascending tree code order. */
+#define TYPE_PTROBV_P(NODE) \
+ (TYPE_PTR_P (NODE) \
+ && !(TREE_CODE (TREE_TYPE (NODE)) == FUNCTION_TYPE \
+ || TREE_CODE (TREE_TYPE (NODE)) == METHOD_TYPE))
+
+/* Returns true if NODE is a pointer to function. */
+#define TYPE_PTRFN_P(NODE) \
+ (TREE_CODE (NODE) == POINTER_TYPE \
+ && TREE_CODE (TREE_TYPE (NODE)) == FUNCTION_TYPE)
+
+/* Returns true if NODE is a reference to function. */
+#define TYPE_REFFN_P(NODE) \
+ (TREE_CODE (NODE) == REFERENCE_TYPE \
+ && TREE_CODE (TREE_TYPE (NODE)) == FUNCTION_TYPE)
+
+/* Nonzero for _TYPE node means that this type is a pointer to member
+ function type. */
+#define TYPE_PTRMEMFUNC_P(NODE) \
+ (TREE_CODE (NODE) == RECORD_TYPE \
+ && TYPE_LANG_SPECIFIC (NODE) \
+ && TYPE_PTRMEMFUNC_FLAG (NODE))
+
+#define TYPE_PTRMEMFUNC_FLAG(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->ptrmemfunc_flag)
+
+/* Returns true if NODE is a pointer-to-member. */
+#define TYPE_PTR_TO_MEMBER_P(NODE) \
+ (TYPE_PTRMEM_P (NODE) || TYPE_PTRMEMFUNC_P (NODE))
+
+/* Indicates when overload resolution may resolve to a pointer to
+ member function. [expr.unary.op]/3 */
+#define PTRMEM_OK_P(NODE) \
+ TREE_LANG_FLAG_0 (TREE_CHECK2 ((NODE), ADDR_EXPR, OFFSET_REF))
+
+/* Get the POINTER_TYPE to the METHOD_TYPE associated with this
+ pointer to member function. TYPE_PTRMEMFUNC_P _must_ be true,
+ before using this macro. */
+#define TYPE_PTRMEMFUNC_FN_TYPE(NODE) \
+ (TREE_TYPE (TYPE_FIELDS (NODE)))
+
+/* Returns `A' for a type like `int (A::*)(double)' */
+#define TYPE_PTRMEMFUNC_OBJECT_TYPE(NODE) \
+ TYPE_METHOD_BASETYPE (TREE_TYPE (TYPE_PTRMEMFUNC_FN_TYPE (NODE)))
+
+/* These are use to manipulate the canonical RECORD_TYPE from the
+ hashed POINTER_TYPE, and can only be used on the POINTER_TYPE. */
+#define TYPE_GET_PTRMEMFUNC_TYPE(NODE) \
+ (TYPE_LANG_SPECIFIC (NODE) ? LANG_TYPE_PTRMEM_CHECK (NODE)->record : NULL)
+#define TYPE_SET_PTRMEMFUNC_TYPE(NODE, VALUE) \
+ do { \
+ if (TYPE_LANG_SPECIFIC (NODE) == NULL) \
+ { \
+ TYPE_LANG_SPECIFIC (NODE) = GGC_CNEWVAR \
+ (struct lang_type, sizeof (struct lang_type_ptrmem)); \
+ TYPE_LANG_SPECIFIC (NODE)->u.ptrmem.h.is_lang_type_class = 0; \
+ } \
+ TYPE_LANG_SPECIFIC (NODE)->u.ptrmem.record = (VALUE); \
+ } while (0)
+
+/* For a pointer-to-member type of the form `T X::*', this is `X'.
+ For a type like `void (X::*)() const', this type is `X', not `const
+ X'. To get at the `const X' you have to look at the
+ TYPE_PTRMEM_POINTED_TO_TYPE; there, the first parameter will have
+ type `const X*'. */
+#define TYPE_PTRMEM_CLASS_TYPE(NODE) \
+ (TYPE_PTRMEM_P (NODE) \
+ ? TYPE_OFFSET_BASETYPE (NODE) \
+ : TYPE_PTRMEMFUNC_OBJECT_TYPE (NODE))
+
+/* For a pointer-to-member type of the form `T X::*', this is `T'. */
+#define TYPE_PTRMEM_POINTED_TO_TYPE(NODE) \
+ (TYPE_PTRMEM_P (NODE) \
+ ? TREE_TYPE (NODE) \
+ : TREE_TYPE (TYPE_PTRMEMFUNC_FN_TYPE (NODE)))
+
+/* For a pointer-to-member constant `X::Y' this is the RECORD_TYPE for
+ `X'. */
+#define PTRMEM_CST_CLASS(NODE) \
+ TYPE_PTRMEM_CLASS_TYPE (TREE_TYPE (PTRMEM_CST_CHECK (NODE)))
+
+/* For a pointer-to-member constant `X::Y' this is the _DECL for
+ `Y'. */
+#define PTRMEM_CST_MEMBER(NODE) (((ptrmem_cst_t)PTRMEM_CST_CHECK (NODE))->member)
+
+/* The expression in question for a TYPEOF_TYPE. */
+#define TYPEOF_TYPE_EXPR(NODE) (TYPEOF_TYPE_CHECK (NODE))->type.values
+
+/* The expression in question for a DECLTYPE_TYPE. */
+#define DECLTYPE_TYPE_EXPR(NODE) (DECLTYPE_TYPE_CHECK (NODE))->type.values
+
+/* Whether the DECLTYPE_TYPE_EXPR of NODE was originally parsed as an
+ id-expression or a member-access expression. When false, it was
+ parsed as a full expression. */
+#define DECLTYPE_TYPE_ID_EXPR_OR_MEMBER_ACCESS_P(NODE) \
+ (DECLTYPE_TYPE_CHECK (NODE))->type.string_flag
+
+/* Nonzero for VAR_DECL and FUNCTION_DECL node means that `extern' was
+ specified in its declaration. This can also be set for an
+ erroneously declared PARM_DECL. */
+#define DECL_THIS_EXTERN(NODE) \
+ DECL_LANG_FLAG_2 (VAR_FUNCTION_OR_PARM_DECL_CHECK (NODE))
+
+/* Nonzero for VAR_DECL and FUNCTION_DECL node means that `static' was
+ specified in its declaration. This can also be set for an
+ erroneously declared PARM_DECL. */
+#define DECL_THIS_STATIC(NODE) \
+ DECL_LANG_FLAG_6 (VAR_FUNCTION_OR_PARM_DECL_CHECK (NODE))
+
+/* Nonzero for FIELD_DECL node means that this field is a base class
+ of the parent object, as opposed to a member field. */
+#define DECL_FIELD_IS_BASE(NODE) \
+ DECL_LANG_FLAG_6 (FIELD_DECL_CHECK (NODE))
+
+/* Nonzero if TYPE is an anonymous union or struct type. We have to use a
+ flag for this because "A union for which objects or pointers are
+ declared is not an anonymous union" [class.union]. */
+#define ANON_AGGR_TYPE_P(NODE) \
+ (CLASS_TYPE_P (NODE) && LANG_TYPE_CLASS_CHECK (NODE)->anon_aggr)
+#define SET_ANON_AGGR_TYPE_P(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->anon_aggr = 1)
+
+/* Nonzero if TYPE is an anonymous union type. */
+#define ANON_UNION_TYPE_P(NODE) \
+ (TREE_CODE (NODE) == UNION_TYPE && ANON_AGGR_TYPE_P (NODE))
+
+#define UNKNOWN_TYPE LANG_TYPE
+
+/* Define fields and accessors for nodes representing declared names. */
+
+#define TYPE_WAS_ANONYMOUS(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->was_anonymous)
+
+/* C++: all of these are overloaded! These apply only to TYPE_DECLs. */
+
+/* The format of each node in the DECL_FRIENDLIST is as follows:
+
+ The TREE_PURPOSE will be the name of a function, i.e., an
+ IDENTIFIER_NODE. The TREE_VALUE will be itself a TREE_LIST, whose
+ TREE_VALUEs are friends with the given name. */
+#define DECL_FRIENDLIST(NODE) (DECL_INITIAL (NODE))
+#define FRIEND_NAME(LIST) (TREE_PURPOSE (LIST))
+#define FRIEND_DECLS(LIST) (TREE_VALUE (LIST))
+
+/* The DECL_ACCESS, if non-NULL, is a TREE_LIST. The TREE_PURPOSE of
+ each node is a type; the TREE_VALUE is the access granted for this
+ DECL in that type. The DECL_ACCESS is set by access declarations.
+ For example, if a member that would normally be public in a
+ derived class is made protected, then the derived class and the
+ protected_access_node will appear in the DECL_ACCESS for the node. */
+#define DECL_ACCESS(NODE) (LANG_DECL_U2_CHECK (NODE, 0)->access)
+
+/* Nonzero if the FUNCTION_DECL is a global constructor. */
+#define DECL_GLOBAL_CTOR_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.global_ctor_p)
+
+/* Nonzero if the FUNCTION_DECL is a global destructor. */
+#define DECL_GLOBAL_DTOR_P(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.global_dtor_p)
+
+/* Accessor macros for C++ template decl nodes. */
+
+/* The DECL_TEMPLATE_PARMS are a list. The TREE_PURPOSE of each node
+ is a INT_CST whose TREE_INT_CST_LOW indicates the level of the
+ template parameters, with 1 being the outermost set of template
+ parameters. The TREE_VALUE is a vector, whose elements are the
+ template parameters at each level. Each element in the vector is a
+ TREE_LIST, whose TREE_VALUE is a PARM_DECL (if the parameter is a
+ non-type parameter), or a TYPE_DECL (if the parameter is a type
+ parameter). The TREE_PURPOSE is the default value, if any. The
+ TEMPLATE_PARM_INDEX for the parameter is available as the
+ DECL_INITIAL (for a PARM_DECL) or as the TREE_TYPE (for a
+ TYPE_DECL). */
+#define DECL_TEMPLATE_PARMS(NODE) DECL_NON_COMMON_CHECK (NODE)->decl_non_common.arguments
+#define DECL_INNERMOST_TEMPLATE_PARMS(NODE) \
+ INNERMOST_TEMPLATE_PARMS (DECL_TEMPLATE_PARMS (NODE))
+#define DECL_NTPARMS(NODE) \
+ TREE_VEC_LENGTH (DECL_INNERMOST_TEMPLATE_PARMS (NODE))
+/* For function, method, class-data templates. */
+#define DECL_TEMPLATE_RESULT(NODE) DECL_RESULT_FLD (NODE)
+/* For a static member variable template, the
+ DECL_TEMPLATE_INSTANTIATIONS list contains the explicitly and
+ implicitly generated instantiations of the variable. There are no
+ partial instantiations of static member variables, so all of these
+ will be full instantiations.
+
+ For a class template the DECL_TEMPLATE_INSTANTIATIONS lists holds
+ all instantiations and specializations of the class type, including
+ partial instantiations and partial specializations.
+
+ In both cases, the TREE_PURPOSE of each node contains the arguments
+ used; the TREE_VALUE contains the generated variable. The template
+ arguments are always complete. For example, given:
+
+ template <class T> struct S1 {
+ template <class U> struct S2 {};
+ template <class U> struct S2<U*> {};
+ };
+
+ the record for the partial specialization will contain, as its
+ argument list, { {T}, {U*} }, and will be on the
+ DECL_TEMPLATE_INSTANTIATIONS list for `template <class T> template
+ <class U> struct S1<T>::S2'.
+
+ This list is not used for function templates. */
+#define DECL_TEMPLATE_INSTANTIATIONS(NODE) DECL_VINDEX (NODE)
+/* For a function template, the DECL_TEMPLATE_SPECIALIZATIONS lists
+ contains all instantiations and specializations of the function,
+ including partial instantiations. For a partial instantiation
+ which is a specialization, this list holds only full
+ specializations of the template that are instantiations of the
+ partial instantiation. For example, given:
+
+ template <class T> struct S {
+ template <class U> void f(U);
+ template <> void f(T);
+ };
+
+ the `S<int>::f<int>(int)' function will appear on the
+ DECL_TEMPLATE_SPECIALIZATIONS list for both `template <class T>
+ template <class U> void S<T>::f(U)' and `template <class T> void
+ S<int>::f(T)'. In the latter case, however, it will have only the
+ innermost set of arguments (T, in this case). The DECL_TI_TEMPLATE
+ for the function declaration will point at the specialization, not
+ the fully general template.
+
+ For a class template, this list contains the partial
+ specializations of this template. (Full specializations are not
+ recorded on this list.) The TREE_PURPOSE holds the arguments used
+ in the partial specialization (e.g., for `template <class T> struct
+ S<T*, int>' this will be `T*'.) The arguments will also include
+ any outer template arguments. The TREE_VALUE holds the innermost
+ template parameters for the specialization (e.g., `T' in the
+ example above.) The TREE_TYPE is the _TYPE node for the partial
+ specialization.
+
+ This list is not used for static variable templates. */
+#define DECL_TEMPLATE_SPECIALIZATIONS(NODE) DECL_SIZE (NODE)
+
+/* Nonzero for a DECL which is actually a template parameter. Keep
+ these checks in ascending tree code order. */
+#define DECL_TEMPLATE_PARM_P(NODE) \
+ (DECL_LANG_FLAG_0 (NODE) \
+ && (TREE_CODE (NODE) == CONST_DECL \
+ || TREE_CODE (NODE) == PARM_DECL \
+ || TREE_CODE (NODE) == TYPE_DECL \
+ || TREE_CODE (NODE) == TEMPLATE_DECL))
+
+/* Mark NODE as a template parameter. */
+#define SET_DECL_TEMPLATE_PARM_P(NODE) \
+ (DECL_LANG_FLAG_0 (NODE) = 1)
+
+/* Nonzero if NODE is a template template parameter. */
+#define DECL_TEMPLATE_TEMPLATE_PARM_P(NODE) \
+ (TREE_CODE (NODE) == TEMPLATE_DECL && DECL_TEMPLATE_PARM_P (NODE))
+
+/* Nonzero if NODE is a TEMPLATE_DECL representing an
+ UNBOUND_CLASS_TEMPLATE tree node. */
+#define DECL_UNBOUND_CLASS_TEMPLATE_P(NODE) \
+ (TREE_CODE (NODE) == TEMPLATE_DECL && !DECL_TEMPLATE_RESULT (NODE))
+
+#define DECL_FUNCTION_TEMPLATE_P(NODE) \
+ (TREE_CODE (NODE) == TEMPLATE_DECL \
+ && !DECL_UNBOUND_CLASS_TEMPLATE_P (NODE) \
+ && TREE_CODE (DECL_TEMPLATE_RESULT (NODE)) == FUNCTION_DECL)
+
+/* Nonzero for a DECL that represents a template class. */
+#define DECL_CLASS_TEMPLATE_P(NODE) \
+ (TREE_CODE (NODE) == TEMPLATE_DECL \
+ && !DECL_UNBOUND_CLASS_TEMPLATE_P (NODE) \
+ && TREE_CODE (DECL_TEMPLATE_RESULT (NODE)) == TYPE_DECL \
+ && !DECL_TEMPLATE_TEMPLATE_PARM_P (NODE))
+
+/* Nonzero if NODE which declares a type. */
+#define DECL_DECLARES_TYPE_P(NODE) \
+ (TREE_CODE (NODE) == TYPE_DECL || DECL_CLASS_TEMPLATE_P (NODE))
+
+/* Nonzero if NODE is the typedef implicitly generated for a type when
+ the type is declared. In C++, `struct S {};' is roughly
+ equivalent to `struct S {}; typedef struct S S;' in C.
+ DECL_IMPLICIT_TYPEDEF_P will hold for the typedef indicated in this
+ example. In C++, there is a second implicit typedef for each
+ class, in the scope of `S' itself, so that you can say `S::S'.
+ DECL_SELF_REFERENCE_P will hold for that second typedef. */
+#define DECL_IMPLICIT_TYPEDEF_P(NODE) \
+ (TREE_CODE (NODE) == TYPE_DECL && DECL_LANG_FLAG_2 (NODE))
+#define SET_DECL_IMPLICIT_TYPEDEF_P(NODE) \
+ (DECL_LANG_FLAG_2 (NODE) = 1)
+#define DECL_SELF_REFERENCE_P(NODE) \
+ (TREE_CODE (NODE) == TYPE_DECL && DECL_LANG_FLAG_4 (NODE))
+#define SET_DECL_SELF_REFERENCE_P(NODE) \
+ (DECL_LANG_FLAG_4 (NODE) = 1)
+
+/* A `primary' template is one that has its own template header. A
+ member function of a class template is a template, but not primary.
+ A member template is primary. Friend templates are primary, too. */
+
+/* Returns the primary template corresponding to these parameters. */
+#define DECL_PRIMARY_TEMPLATE(NODE) \
+ (TREE_TYPE (DECL_INNERMOST_TEMPLATE_PARMS (NODE)))
+
+/* Returns nonzero if NODE is a primary template. */
+#define PRIMARY_TEMPLATE_P(NODE) (DECL_PRIMARY_TEMPLATE (NODE) == (NODE))
+
+/* Nonzero iff NODE is a specialization of a template. The value
+ indicates the type of specializations:
+
+ 1=implicit instantiation
+
+ 2=partial or explicit specialization, e.g.:
+
+ template <> int min<int> (int, int),
+
+ 3=explicit instantiation, e.g.:
+
+ template int min<int> (int, int);
+
+ Note that NODE will be marked as a specialization even if the
+ template it is instantiating is not a primary template. For
+ example, given:
+
+ template <typename T> struct O {
+ void f();
+ struct I {};
+ };
+
+ both O<int>::f and O<int>::I will be marked as instantiations.
+
+ If DECL_USE_TEMPLATE is nonzero, then DECL_TEMPLATE_INFO will also
+ be non-NULL. */
+#define DECL_USE_TEMPLATE(NODE) (DECL_LANG_SPECIFIC (NODE)->decl_flags.use_template)
+
+/* Like DECL_USE_TEMPLATE, but for class types. */
+#define CLASSTYPE_USE_TEMPLATE(NODE) \
+ (LANG_TYPE_CLASS_CHECK (NODE)->use_template)
+
+/* True if NODE is a specialization of a primary template. */
+#define CLASSTYPE_SPECIALIZATION_OF_PRIMARY_TEMPLATE_P(NODE) \
+ (CLASS_TYPE_P (NODE) \
+ && CLASSTYPE_USE_TEMPLATE (NODE) \
+ && PRIMARY_TEMPLATE_P (CLASSTYPE_TI_TEMPLATE (arg)))
+
+#define DECL_TEMPLATE_INSTANTIATION(NODE) (DECL_USE_TEMPLATE (NODE) & 1)
+#define CLASSTYPE_TEMPLATE_INSTANTIATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) & 1)
+
+#define DECL_TEMPLATE_SPECIALIZATION(NODE) (DECL_USE_TEMPLATE (NODE) == 2)
+#define SET_DECL_TEMPLATE_SPECIALIZATION(NODE) (DECL_USE_TEMPLATE (NODE) = 2)
+
+/* Returns true for an explicit or partial specialization of a class
+ template. */
+#define CLASSTYPE_TEMPLATE_SPECIALIZATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) == 2)
+#define SET_CLASSTYPE_TEMPLATE_SPECIALIZATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) = 2)
+
+#define DECL_IMPLICIT_INSTANTIATION(NODE) (DECL_USE_TEMPLATE (NODE) == 1)
+#define SET_DECL_IMPLICIT_INSTANTIATION(NODE) (DECL_USE_TEMPLATE (NODE) = 1)
+#define CLASSTYPE_IMPLICIT_INSTANTIATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) == 1)
+#define SET_CLASSTYPE_IMPLICIT_INSTANTIATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) = 1)
+
+#define DECL_EXPLICIT_INSTANTIATION(NODE) (DECL_USE_TEMPLATE (NODE) == 3)
+#define SET_DECL_EXPLICIT_INSTANTIATION(NODE) (DECL_USE_TEMPLATE (NODE) = 3)
+#define CLASSTYPE_EXPLICIT_INSTANTIATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) == 3)
+#define SET_CLASSTYPE_EXPLICIT_INSTANTIATION(NODE) \
+ (CLASSTYPE_USE_TEMPLATE (NODE) = 3)
+
+/* Nonzero if DECL is a friend function which is an instantiation
+ from the point of view of the compiler, but not from the point of
+ view of the language. For example given:
+ template <class T> struct S { friend void f(T) {}; };
+ the declaration of `void f(int)' generated when S<int> is
+ instantiated will not be a DECL_TEMPLATE_INSTANTIATION, but will be
+ a DECL_FRIEND_PSEUDO_TEMPLATE_INSTANTIATION. */
+#define DECL_FRIEND_PSEUDO_TEMPLATE_INSTANTIATION(DECL) \
+ (DECL_TEMPLATE_INFO (DECL) && !DECL_USE_TEMPLATE (DECL))
+
+/* Nonzero iff we are currently processing a declaration for an
+ entity with its own template parameter list, and which is not a
+ full specialization. */
+#define PROCESSING_REAL_TEMPLATE_DECL_P() \
+ (processing_template_decl > template_class_depth (current_scope ()))
+
+/* Nonzero if this VAR_DECL or FUNCTION_DECL has already been
+ instantiated, i.e. its definition has been generated from the
+ pattern given in the template. */
+#define DECL_TEMPLATE_INSTANTIATED(NODE) \
+ DECL_LANG_FLAG_1 (VAR_OR_FUNCTION_DECL_CHECK (NODE))
+
+/* We know what we're doing with this decl now. */
+#define DECL_INTERFACE_KNOWN(NODE) DECL_LANG_FLAG_5 (NODE)
+
+/* DECL_EXTERNAL must be set on a decl until the decl is actually emitted,
+ so that assemble_external will work properly. So we have this flag to
+ tell us whether the decl is really not external.
+
+ This flag does not indicate whether or not the decl is defined in the
+ current translation unit; it indicates whether or not we should emit the
+ decl at the end of compilation if it is defined and needed. */
+#define DECL_NOT_REALLY_EXTERN(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->decl_flags.not_really_extern)
+
+#define DECL_REALLY_EXTERN(NODE) \
+ (DECL_EXTERNAL (NODE) && ! DECL_NOT_REALLY_EXTERN (NODE))
+
+/* A thunk is a stub function.
+
+ A thunk is an alternate entry point for an ordinary FUNCTION_DECL.
+ The address of the ordinary FUNCTION_DECL is given by the
+ DECL_INITIAL, which is always an ADDR_EXPR whose operand is a
+ FUNCTION_DECL. The job of the thunk is to either adjust the this
+ pointer before transferring control to the FUNCTION_DECL, or call
+ FUNCTION_DECL and then adjust the result value. Note, the result
+ pointer adjusting thunk must perform a call to the thunked
+ function, (or be implemented via passing some invisible parameter
+ to the thunked function, which is modified to perform the
+ adjustment just before returning).
+
+ A thunk may perform either, or both, of the following operations:
+
+ o Adjust the this or result pointer by a constant offset.
+ o Adjust the this or result pointer by looking up a vcall or vbase offset
+ in the vtable.
+
+ A this pointer adjusting thunk converts from a base to a derived
+ class, and hence adds the offsets. A result pointer adjusting thunk
+ converts from a derived class to a base, and hence subtracts the
+ offsets. If both operations are performed, then the constant
+ adjustment is performed first for this pointer adjustment and last
+ for the result pointer adjustment.
+
+ The constant adjustment is given by THUNK_FIXED_OFFSET. If the
+ vcall or vbase offset is required, THUNK_VIRTUAL_OFFSET is
+ used. For this pointer adjusting thunks, it is the vcall offset
+ into the vtable. For result pointer adjusting thunks it is the
+ binfo of the virtual base to convert to. Use that binfo's vbase
+ offset.
+
+ It is possible to have equivalent covariant thunks. These are
+ distinct virtual covariant thunks whose vbase offsets happen to
+ have the same value. THUNK_ALIAS is used to pick one as the
+ canonical thunk, which will get all the this pointer adjusting
+ thunks attached to it. */
+
+/* An integer indicating how many bytes should be subtracted from the
+ this or result pointer when this function is called. */
+#define THUNK_FIXED_OFFSET(DECL) \
+ (DECL_LANG_SPECIFIC (THUNK_FUNCTION_CHECK (DECL))->u.f.u5.fixed_offset)
+
+/* A tree indicating how to perform the virtual adjustment. For a this
+ adjusting thunk it is the number of bytes to be added to the vtable
+ to find the vcall offset. For a result adjusting thunk, it is the
+ binfo of the relevant virtual base. If NULL, then there is no
+ virtual adjust. (The vptr is always located at offset zero from
+ the this or result pointer.) (If the covariant type is within the
+ class hierarchy being laid out, the vbase index is not yet known
+ at the point we need to create the thunks, hence the need to use
+ binfos.) */
+
+#define THUNK_VIRTUAL_OFFSET(DECL) \
+ (LANG_DECL_U2_CHECK (FUNCTION_DECL_CHECK (DECL), 0)->access)
+
+/* A thunk which is equivalent to another thunk. */
+#define THUNK_ALIAS(DECL) \
+ (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.u.template_info)
+
+/* For thunk NODE, this is the FUNCTION_DECL thunked to. It is
+ possible for the target to be a thunk too. */
+#define THUNK_TARGET(NODE) \
+ (DECL_LANG_SPECIFIC (NODE)->u.f.befriending_classes)
+
+/* True for a SCOPE_REF iff the "template" keyword was used to
+ indicate that the qualified name denotes a template. */
+#define QUALIFIED_NAME_IS_TEMPLATE(NODE) \
+ (TREE_LANG_FLAG_0 (SCOPE_REF_CHECK (NODE)))
+
+/* True for an OMP_ATOMIC that has dependent parameters. These are stored
+ as an expr in operand 1, and integer_zero_node in operand 0. */
+#define OMP_ATOMIC_DEPENDENT_P(NODE) \
+ (TREE_CODE (TREE_OPERAND (OMP_ATOMIC_CHECK (NODE), 0)) == INTEGER_CST)
+
+/* Used while gimplifying continue statements bound to OMP_FOR nodes. */
+#define OMP_FOR_GIMPLIFYING_P(NODE) \
+ (TREE_LANG_FLAG_0 (OMP_FOR_CHECK (NODE)))
+
+/* A language-specific token attached to the OpenMP data clauses to
+ hold code (or code fragments) related to ctors, dtors, and op=.
+ See semantics.c for details. */
+#define CP_OMP_CLAUSE_INFO(NODE) \
+ TREE_TYPE (OMP_CLAUSE_RANGE_CHECK (NODE, OMP_CLAUSE_PRIVATE, \
+ OMP_CLAUSE_COPYPRIVATE))
+
+/* These macros provide convenient access to the various _STMT nodes
+ created when parsing template declarations. */
+#define TRY_STMTS(NODE) TREE_OPERAND (TRY_BLOCK_CHECK (NODE), 0)
+#define TRY_HANDLERS(NODE) TREE_OPERAND (TRY_BLOCK_CHECK (NODE), 1)
+
+#define EH_SPEC_STMTS(NODE) TREE_OPERAND (EH_SPEC_BLOCK_CHECK (NODE), 0)
+#define EH_SPEC_RAISES(NODE) TREE_OPERAND (EH_SPEC_BLOCK_CHECK (NODE), 1)
+
+#define USING_STMT_NAMESPACE(NODE) TREE_OPERAND (USING_STMT_CHECK (NODE), 0)
+
+/* Nonzero if this try block is a function try block. */
+#define FN_TRY_BLOCK_P(NODE) TREE_LANG_FLAG_3 (TRY_BLOCK_CHECK (NODE))
+#define HANDLER_PARMS(NODE) TREE_OPERAND (HANDLER_CHECK (NODE), 0)
+#define HANDLER_BODY(NODE) TREE_OPERAND (HANDLER_CHECK (NODE), 1)
+#define HANDLER_TYPE(NODE) TREE_TYPE (HANDLER_CHECK (NODE))
+
+/* CLEANUP_STMT accessors. The statement(s) covered, the cleanup to run
+ and the VAR_DECL for which this cleanup exists. */
+#define CLEANUP_BODY(NODE) TREE_OPERAND (CLEANUP_STMT_CHECK (NODE), 0)
+#define CLEANUP_EXPR(NODE) TREE_OPERAND (CLEANUP_STMT_CHECK (NODE), 1)
+#define CLEANUP_DECL(NODE) TREE_OPERAND (CLEANUP_STMT_CHECK (NODE), 2)
+
+/* IF_STMT accessors. These give access to the condition of the if
+ statement, the then block of the if statement, and the else block
+ of the if statement if it exists. */
+#define IF_COND(NODE) TREE_OPERAND (IF_STMT_CHECK (NODE), 0)
+#define THEN_CLAUSE(NODE) TREE_OPERAND (IF_STMT_CHECK (NODE), 1)
+#define ELSE_CLAUSE(NODE) TREE_OPERAND (IF_STMT_CHECK (NODE), 2)
+
+/* WHILE_STMT accessors. These give access to the condition of the
+ while statement and the body of the while statement, respectively. */
+#define WHILE_COND(NODE) TREE_OPERAND (WHILE_STMT_CHECK (NODE), 0)
+#define WHILE_BODY(NODE) TREE_OPERAND (WHILE_STMT_CHECK (NODE), 1)
+
+/* DO_STMT accessors. These give access to the condition of the do
+ statement and the body of the do statement, respectively. */
+#define DO_COND(NODE) TREE_OPERAND (DO_STMT_CHECK (NODE), 0)
+#define DO_BODY(NODE) TREE_OPERAND (DO_STMT_CHECK (NODE), 1)
+
+/* FOR_STMT accessors. These give access to the init statement,
+ condition, update expression, and body of the for statement,
+ respectively. */
+#define FOR_INIT_STMT(NODE) TREE_OPERAND (FOR_STMT_CHECK (NODE), 0)
+#define FOR_COND(NODE) TREE_OPERAND (FOR_STMT_CHECK (NODE), 1)
+#define FOR_EXPR(NODE) TREE_OPERAND (FOR_STMT_CHECK (NODE), 2)
+#define FOR_BODY(NODE) TREE_OPERAND (FOR_STMT_CHECK (NODE), 3)
+
+#define SWITCH_STMT_COND(NODE) TREE_OPERAND (SWITCH_STMT_CHECK (NODE), 0)
+#define SWITCH_STMT_BODY(NODE) TREE_OPERAND (SWITCH_STMT_CHECK (NODE), 1)
+#define SWITCH_STMT_TYPE(NODE) TREE_OPERAND (SWITCH_STMT_CHECK (NODE), 2)
+
+/* STMT_EXPR accessor. */
+#define STMT_EXPR_STMT(NODE) TREE_OPERAND (STMT_EXPR_CHECK (NODE), 0)
+
+/* EXPR_STMT accessor. This gives the expression associated with an
+ expression statement. */
+#define EXPR_STMT_EXPR(NODE) TREE_OPERAND (EXPR_STMT_CHECK (NODE), 0)
+
+/* True if this TARGET_EXPR was created by build_cplus_new, and so we can
+ discard it if it isn't useful. */
+#define TARGET_EXPR_IMPLICIT_P(NODE) \
+ TREE_LANG_FLAG_0 (TARGET_EXPR_CHECK (NODE))
+
+/* True if this TARGET_EXPR is the result of list-initialization of a
+ temporary. */
+#define TARGET_EXPR_LIST_INIT_P(NODE) \
+ TREE_LANG_FLAG_1 (TARGET_EXPR_CHECK (NODE))
+
+/* An enumeration of the kind of tags that C++ accepts. */
+enum tag_types {
+ none_type = 0, /* Not a tag type. */
+ record_type, /* "struct" types. */
+ class_type, /* "class" types. */
+ union_type, /* "union" types. */
+ enum_type, /* "enum" types. */
+ typename_type /* "typename" types. */
+};
+
+/* The various kinds of lvalues we distinguish. */
+typedef enum cp_lvalue_kind {
+ clk_none = 0, /* Things that are not an lvalue. */
+ clk_ordinary = 1, /* An ordinary lvalue. */
+ clk_rvalueref = 2,/* An rvalue formed using an rvalue reference */
+ clk_class = 4, /* An rvalue of class-type. */
+ clk_bitfield = 8, /* An lvalue for a bit-field. */
+ clk_packed = 16 /* An lvalue for a packed field. */
+} cp_lvalue_kind;
+
+/* Various kinds of template specialization, instantiation, etc. */
+typedef enum tmpl_spec_kind {
+ tsk_none, /* Not a template at all. */
+ tsk_invalid_member_spec, /* An explicit member template
+ specialization, but the enclosing
+ classes have not all been explicitly
+ specialized. */
+ tsk_invalid_expl_inst, /* An explicit instantiation containing
+ template parameter lists. */
+ tsk_excessive_parms, /* A template declaration with too many
+ template parameter lists. */
+ tsk_insufficient_parms, /* A template declaration with too few
+ parameter lists. */
+ tsk_template, /* A template declaration. */
+ tsk_expl_spec, /* An explicit specialization. */
+ tsk_expl_inst /* An explicit instantiation. */
+} tmpl_spec_kind;
+
+/* The various kinds of access. BINFO_ACCESS depends on these being
+ two bit quantities. The numerical values are important; they are
+ used to initialize RTTI data structures, so changing them changes
+ the ABI. */
+typedef enum access_kind {
+ ak_none = 0, /* Inaccessible. */
+ ak_public = 1, /* Accessible, as a `public' thing. */
+ ak_protected = 2, /* Accessible, as a `protected' thing. */
+ ak_private = 3 /* Accessible, as a `private' thing. */
+} access_kind;
+
+/* The various kinds of special functions. If you add to this list,
+ you should update special_function_p as well. */
+typedef enum special_function_kind {
+ sfk_none = 0, /* Not a special function. This enumeral
+ must have value zero; see
+ special_function_p. */
+ sfk_constructor, /* A constructor. */
+ sfk_copy_constructor, /* A copy constructor. */
+ sfk_assignment_operator, /* An assignment operator. */
+ sfk_destructor, /* A destructor. */
+ sfk_complete_destructor, /* A destructor for complete objects. */
+ sfk_base_destructor, /* A destructor for base subobjects. */
+ sfk_deleting_destructor, /* A destructor for complete objects that
+ deletes the object after it has been
+ destroyed. */
+ sfk_conversion /* A conversion operator. */
+} special_function_kind;
+
+/* The various kinds of linkage. From [basic.link],
+
+ A name is said to have linkage when it might denote the same
+ object, reference, function, type, template, namespace or value
+ as a name introduced in another scope:
+
+ -- When a name has external linkage, the entity it denotes can
+ be referred to from scopes of other translation units or from
+ other scopes of the same translation unit.
+
+ -- When a name has internal linkage, the entity it denotes can
+ be referred to by names from other scopes in the same
+ translation unit.
+
+ -- When a name has no linkage, the entity it denotes cannot be
+ referred to by names from other scopes. */
+
+typedef enum linkage_kind {
+ lk_none, /* No linkage. */
+ lk_internal, /* Internal linkage. */
+ lk_external /* External linkage. */
+} linkage_kind;
+
+/* Bitmask flags to control type substitution. */
+typedef enum tsubst_flags_t {
+ tf_none = 0, /* nothing special */
+ tf_error = 1 << 0, /* give error messages */
+ tf_warning = 1 << 1, /* give warnings too */
+ tf_ignore_bad_quals = 1 << 2, /* ignore bad cvr qualifiers */
+ tf_keep_type_decl = 1 << 3, /* retain typedef type decls
+ (make_typename_type use) */
+ tf_ptrmem_ok = 1 << 4, /* pointers to member ok (internal
+ instantiate_type use) */
+ tf_user = 1 << 5, /* found template must be a user template
+ (lookup_template_class use) */
+ tf_conv = 1 << 6, /* We are determining what kind of
+ conversion might be permissible,
+ not actually performing the
+ conversion. */
+ tf_no_access_control = 1 << 7, /* Do not perform access checks, even
+ when issuing other errors. */
+ /* Do not instantiate classes (used by count_non_default_template_args). */
+ tf_no_class_instantiations = 1 << 8,
+ /* Convenient substitution flags combinations. */
+ tf_warning_or_error = tf_warning | tf_error
+} tsubst_flags_t;
+
+/* The kind of checking we can do looking in a class hierarchy. */
+typedef enum base_access {
+ ba_any = 0, /* Do not check access, allow an ambiguous base,
+ prefer a non-virtual base */
+ ba_unique = 1 << 0, /* Must be a unique base. */
+ ba_check_bit = 1 << 1, /* Check access. */
+ ba_check = ba_unique | ba_check_bit,
+ ba_ignore_scope = 1 << 2, /* Ignore access allowed by local scope. */
+ ba_quiet = 1 << 3 /* Do not issue error messages. */
+} base_access;
+
+/* The various kinds of access check during parsing. */
+typedef enum deferring_kind {
+ dk_no_deferred = 0, /* Check access immediately */
+ dk_deferred = 1, /* Deferred check */
+ dk_no_check = 2 /* No access check */
+} deferring_kind;
+
+/* The kind of base we can find, looking in a class hierarchy.
+ Values <0 indicate we failed. */
+typedef enum base_kind {
+ bk_inaccessible = -3, /* The base is inaccessible */
+ bk_ambig = -2, /* The base is ambiguous */
+ bk_not_base = -1, /* It is not a base */
+ bk_same_type = 0, /* It is the same type */
+ bk_proper_base = 1, /* It is a proper base */
+ bk_via_virtual = 2 /* It is a proper base, but via a virtual
+ path. This might not be the canonical
+ binfo. */
+} base_kind;
+
+/* Node for "pointer to (virtual) function".
+ This may be distinct from ptr_type_node so gdb can distinguish them. */
+#define vfunc_ptr_type_node vtable_entry_type
+
+
+/* For building calls to `delete'. */
+extern GTY(()) tree integer_two_node;
+extern GTY(()) tree integer_three_node;
+
+/* The number of function bodies which we are currently processing.
+ (Zero if we are at namespace scope, one inside the body of a
+ function, two inside the body of a function in a local class, etc.) */
+extern int function_depth;
+
+/* in pt.c */
+
+/* These values are used for the `STRICT' parameter to type_unification and
+ fn_type_unification. Their meanings are described with the
+ documentation for fn_type_unification. */
+
+typedef enum unification_kind_t {
+ DEDUCE_CALL,
+ DEDUCE_CONV,
+ DEDUCE_EXACT
+} unification_kind_t;
+
+/* in class.c */
+
+extern int current_class_depth;
+
+/* An array of all local classes present in this translation unit, in
+ declaration order. */
+extern GTY(()) VEC(tree,gc) *local_classes;
+
+/* Here's where we control how name mangling takes place. */
+
+/* Cannot use '$' up front, because this confuses gdb
+ (names beginning with '$' are gdb-local identifiers).
+
+ Note that all forms in which the '$' is significant are long enough
+ for direct indexing (meaning that if we know there is a '$'
+ at a particular location, we can index into the string at
+ any other location that provides distinguishing characters). */
+
+/* Define NO_DOT_IN_LABEL in your favorite tm file if your assembler
+ doesn't allow '.' in symbol names. */
+#ifndef NO_DOT_IN_LABEL
+
+#define JOINER '.'
+
+#define AUTO_TEMP_NAME "_.tmp_"
+#define VFIELD_BASE ".vf"
+#define VFIELD_NAME "_vptr."
+#define VFIELD_NAME_FORMAT "_vptr.%s"
+
+#define ANON_AGGRNAME_FORMAT "._%d"
+
+#else /* NO_DOT_IN_LABEL */
+
+#ifndef NO_DOLLAR_IN_LABEL
+
+#define JOINER '$'
+
+#define AUTO_TEMP_NAME "_$tmp_"
+#define VFIELD_BASE "$vf"
+#define VFIELD_NAME "_vptr$"
+#define VFIELD_NAME_FORMAT "_vptr$%s"
+#define ANON_AGGRNAME_FORMAT "$_%d"
+
+#else /* NO_DOLLAR_IN_LABEL */
+
+#define IN_CHARGE_NAME "__in_chrg"
+#define AUTO_TEMP_NAME "__tmp_"
+#define TEMP_NAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), AUTO_TEMP_NAME, \
+ sizeof (AUTO_TEMP_NAME) - 1))
+#define VTABLE_NAME "__vt_"
+#define VTABLE_NAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), VTABLE_NAME, \
+ sizeof (VTABLE_NAME) - 1))
+#define VFIELD_BASE "__vfb"
+#define VFIELD_NAME "__vptr_"
+#define VFIELD_NAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), VFIELD_NAME, \
+ sizeof (VFIELD_NAME) - 1))
+#define VFIELD_NAME_FORMAT "__vptr_%s"
+
+#define ANON_AGGRNAME_PREFIX "__anon_"
+#define ANON_AGGRNAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), ANON_AGGRNAME_PREFIX, \
+ sizeof (ANON_AGGRNAME_PREFIX) - 1))
+#define ANON_AGGRNAME_FORMAT "__anon_%d"
+
+#endif /* NO_DOLLAR_IN_LABEL */
+#endif /* NO_DOT_IN_LABEL */
+
+#define THIS_NAME "this"
+
+#define IN_CHARGE_NAME "__in_chrg"
+
+#define VTBL_PTR_TYPE "__vtbl_ptr_type"
+#define VTABLE_DELTA_NAME "__delta"
+#define VTABLE_PFN_NAME "__pfn"
+
+#if !defined(NO_DOLLAR_IN_LABEL) || !defined(NO_DOT_IN_LABEL)
+
+#define VTABLE_NAME_P(ID_NODE) (IDENTIFIER_POINTER (ID_NODE)[1] == 'v' \
+ && IDENTIFIER_POINTER (ID_NODE)[2] == 't' \
+ && IDENTIFIER_POINTER (ID_NODE)[3] == JOINER)
+
+#define TEMP_NAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), AUTO_TEMP_NAME, sizeof (AUTO_TEMP_NAME)-1))
+#define VFIELD_NAME_P(ID_NODE) \
+ (!strncmp (IDENTIFIER_POINTER (ID_NODE), VFIELD_NAME, sizeof(VFIELD_NAME)-1))
+
+/* For anonymous aggregate types, we need some sort of name to
+ hold on to. In practice, this should not appear, but it should
+ not be harmful if it does. */
+#define ANON_AGGRNAME_P(ID_NODE) (IDENTIFIER_POINTER (ID_NODE)[0] == JOINER \
+ && IDENTIFIER_POINTER (ID_NODE)[1] == '_')
+#endif /* !defined(NO_DOLLAR_IN_LABEL) || !defined(NO_DOT_IN_LABEL) */
+
+
+/* Nonzero if we're done parsing and into end-of-file activities. */
+
+extern int at_eof;
+
+/* A list of namespace-scope objects which have constructors or
+ destructors which reside in the global scope. The decl is stored
+ in the TREE_VALUE slot and the initializer is stored in the
+ TREE_PURPOSE slot. */
+extern GTY(()) tree static_aggregates;
+
+enum overload_flags { NO_SPECIAL = 0, DTOR_FLAG, OP_FLAG, TYPENAME_FLAG };
+
+/* These are uses as bits in flags passed to various functions to
+ control their behavior. Despite the LOOKUP_ prefix, many of these
+ do not control name lookup. ??? Functions using these flags should
+ probably be modified to accept explicit boolean flags for the
+ behaviors relevant to them. */
+/* Check for access violations. */
+#define LOOKUP_PROTECT (1 << 0)
+/* Complain if no suitable member function matching the arguments is
+ found. */
+#define LOOKUP_COMPLAIN (1 << 1)
+#define LOOKUP_NORMAL (LOOKUP_PROTECT | LOOKUP_COMPLAIN)
+/* Even if the function found by lookup is a virtual function, it
+ should be called directly. */
+#define LOOKUP_NONVIRTUAL (1 << 2)
+/* Non-converting (i.e., "explicit") constructors are not tried. */
+#define LOOKUP_ONLYCONVERTING (1 << 3)
+/* If a temporary is created, it should be created so that it lives
+ as long as the current variable bindings; otherwise it only lives
+ until the end of the complete-expression. It also forces
+ direct-initialization in cases where other parts of the compiler
+ have already generated a temporary, such as reference
+ initialization and the catch parameter. */
+#define DIRECT_BIND (1 << 4)
+/* User-defined conversions are not permitted. (Built-in conversions
+ are permitted.) */
+#define LOOKUP_NO_CONVERSION (1 << 5)
+/* The user has explicitly called a destructor. (Therefore, we do
+ not need to check that the object is non-NULL before calling the
+ destructor.) */
+#define LOOKUP_DESTRUCTOR (1 << 6)
+/* Do not permit references to bind to temporaries. */
+#define LOOKUP_NO_TEMP_BIND (1 << 7)
+/* Do not accept objects, and possibly namespaces. */
+#define LOOKUP_PREFER_TYPES (1 << 8)
+/* Do not accept objects, and possibly types. */
+#define LOOKUP_PREFER_NAMESPACES (1 << 9)
+/* Accept types or namespaces. */
+#define LOOKUP_PREFER_BOTH (LOOKUP_PREFER_TYPES | LOOKUP_PREFER_NAMESPACES)
+/* Return friend declarations and un-declared builtin functions.
+ (Normally, these entities are registered in the symbol table, but
+ not found by lookup.) */
+#define LOOKUP_HIDDEN (LOOKUP_PREFER_NAMESPACES << 1)
+/* Prefer that the lvalue be treated as an rvalue. */
+#define LOOKUP_PREFER_RVALUE (LOOKUP_HIDDEN << 1)
+/* We're inside an init-list, so narrowing conversions are ill-formed. */
+#define LOOKUP_NO_NARROWING (LOOKUP_PREFER_RVALUE << 1)
+/* Avoid user-defined conversions for the first parameter of a copy
+ constructor. */
+#define LOOKUP_NO_COPY_CTOR_CONVERSION (LOOKUP_NO_NARROWING << 1)
+/* An instantiation with explicit template arguments. */
+#define LOOKUP_EXPLICIT_TMPL_ARGS (LOOKUP_NO_COPY_CTOR_CONVERSION << 1)
+
+#define LOOKUP_NAMESPACES_ONLY(F) \
+ (((F) & LOOKUP_PREFER_NAMESPACES) && !((F) & LOOKUP_PREFER_TYPES))
+#define LOOKUP_TYPES_ONLY(F) \
+ (!((F) & LOOKUP_PREFER_NAMESPACES) && ((F) & LOOKUP_PREFER_TYPES))
+#define LOOKUP_QUALIFIERS_ONLY(F) ((F) & LOOKUP_PREFER_BOTH)
+
+
+/* These flags are used by the conversion code.
+ CONV_IMPLICIT : Perform implicit conversions (standard and user-defined).
+ CONV_STATIC : Perform the explicit conversions for static_cast.
+ CONV_CONST : Perform the explicit conversions for const_cast.
+ CONV_REINTERPRET: Perform the explicit conversions for reinterpret_cast.
+ CONV_PRIVATE : Perform upcasts to private bases.
+ CONV_FORCE_TEMP : Require a new temporary when converting to the same
+ aggregate type. */
+
+#define CONV_IMPLICIT 1
+#define CONV_STATIC 2
+#define CONV_CONST 4
+#define CONV_REINTERPRET 8
+#define CONV_PRIVATE 16
+/* #define CONV_NONCONVERTING 32 */
+#define CONV_FORCE_TEMP 64
+#define CONV_OLD_CONVERT (CONV_IMPLICIT | CONV_STATIC | CONV_CONST \
+ | CONV_REINTERPRET)
+#define CONV_C_CAST (CONV_IMPLICIT | CONV_STATIC | CONV_CONST \
+ | CONV_REINTERPRET | CONV_PRIVATE | CONV_FORCE_TEMP)
+
+/* Used by build_expr_type_conversion to indicate which types are
+ acceptable as arguments to the expression under consideration. */
+
+#define WANT_INT 1 /* integer types, including bool */
+#define WANT_FLOAT 2 /* floating point types */
+#define WANT_ENUM 4 /* enumerated types */
+#define WANT_POINTER 8 /* pointer types */
+#define WANT_NULL 16 /* null pointer constant */
+#define WANT_VECTOR 32 /* vector types */
+#define WANT_ARITH (WANT_INT | WANT_FLOAT | WANT_VECTOR)
+
+/* Used with comptypes, and related functions, to guide type
+ comparison. */
+
+#define COMPARE_STRICT 0 /* Just check if the types are the
+ same. */
+#define COMPARE_BASE 1 /* Check to see if the second type is
+ derived from the first. */
+#define COMPARE_DERIVED 2 /* Like COMPARE_BASE, but in
+ reverse. */
+#define COMPARE_REDECLARATION 4 /* The comparison is being done when
+ another declaration of an existing
+ entity is seen. */
+#define COMPARE_STRUCTURAL 8 /* The comparison is intended to be
+ structural. The actual comparison
+ will be identical to
+ COMPARE_STRICT. */
+
+/* Used with push_overloaded_decl. */
+#define PUSH_GLOBAL 0 /* Push the DECL into namespace scope,
+ regardless of the current scope. */
+#define PUSH_LOCAL 1 /* Push the DECL into the current
+ scope. */
+#define PUSH_USING 2 /* We are pushing this DECL as the
+ result of a using declaration. */
+
+/* Used with start function. */
+#define SF_DEFAULT 0 /* No flags. */
+#define SF_PRE_PARSED 1 /* The function declaration has
+ already been parsed. */
+#define SF_INCLASS_INLINE 2 /* The function is an inline, defined
+ in the class body. */
+
+/* Used with start_decl's initialized parameter. */
+#define SD_UNINITIALIZED 0
+#define SD_INITIALIZED 1
+#define SD_DEFAULTED 2
+#define SD_DELETED 3
+
+/* Returns nonzero iff TYPE1 and TYPE2 are the same type, or if TYPE2
+ is derived from TYPE1, or if TYPE2 is a pointer (reference) to a
+ class derived from the type pointed to (referred to) by TYPE1. */
+#define same_or_base_type_p(TYPE1, TYPE2) \
+ comptypes ((TYPE1), (TYPE2), COMPARE_BASE)
+
+/* These macros are used to access a TEMPLATE_PARM_INDEX. */
+#define TEMPLATE_PARM_INDEX_CAST(NODE) \
+ ((template_parm_index*)TEMPLATE_PARM_INDEX_CHECK (NODE))
+#define TEMPLATE_PARM_IDX(NODE) (TEMPLATE_PARM_INDEX_CAST (NODE)->index)
+#define TEMPLATE_PARM_LEVEL(NODE) (TEMPLATE_PARM_INDEX_CAST (NODE)->level)
+#define TEMPLATE_PARM_DESCENDANTS(NODE) (TREE_CHAIN (NODE))
+#define TEMPLATE_PARM_ORIG_LEVEL(NODE) (TEMPLATE_PARM_INDEX_CAST (NODE)->orig_level)
+#define TEMPLATE_PARM_DECL(NODE) (TEMPLATE_PARM_INDEX_CAST (NODE)->decl)
+#define TEMPLATE_PARM_PARAMETER_PACK(NODE) \
+ (TREE_LANG_FLAG_0 (TEMPLATE_PARM_INDEX_CHECK (NODE)))
+
+/* These macros are for accessing the fields of TEMPLATE_TYPE_PARM,
+ TEMPLATE_TEMPLATE_PARM and BOUND_TEMPLATE_TEMPLATE_PARM nodes. */
+#define TEMPLATE_TYPE_PARM_INDEX(NODE) \
+ (TREE_CHECK3 ((NODE), TEMPLATE_TYPE_PARM, TEMPLATE_TEMPLATE_PARM, \
+ BOUND_TEMPLATE_TEMPLATE_PARM))->type.values
+#define TEMPLATE_TYPE_IDX(NODE) \
+ (TEMPLATE_PARM_IDX (TEMPLATE_TYPE_PARM_INDEX (NODE)))
+#define TEMPLATE_TYPE_LEVEL(NODE) \
+ (TEMPLATE_PARM_LEVEL (TEMPLATE_TYPE_PARM_INDEX (NODE)))
+#define TEMPLATE_TYPE_ORIG_LEVEL(NODE) \
+ (TEMPLATE_PARM_ORIG_LEVEL (TEMPLATE_TYPE_PARM_INDEX (NODE)))
+#define TEMPLATE_TYPE_DECL(NODE) \
+ (TEMPLATE_PARM_DECL (TEMPLATE_TYPE_PARM_INDEX (NODE)))
+#define TEMPLATE_TYPE_PARAMETER_PACK(NODE) \
+ (TEMPLATE_PARM_PARAMETER_PACK (TEMPLATE_TYPE_PARM_INDEX (NODE)))
+
+/* These constants can used as bit flags in the process of tree formatting.
+
+ TFF_PLAIN_IDENTIFIER: unqualified part of a name.
+ TFF_SCOPE: include the class and namespace scope of the name.
+ TFF_CHASE_TYPEDEF: print the original type-id instead of the typedef-name.
+ TFF_DECL_SPECIFIERS: print decl-specifiers.
+ TFF_CLASS_KEY_OR_ENUM: precede a class-type name (resp. enum name) with
+ a class-key (resp. `enum').
+ TFF_RETURN_TYPE: include function return type.
+ TFF_FUNCTION_DEFAULT_ARGUMENTS: include function default parameter values.
+ TFF_EXCEPTION_SPECIFICATION: show function exception specification.
+ TFF_TEMPLATE_HEADER: show the template<...> header in a
+ template-declaration.
+ TFF_TEMPLATE_NAME: show only template-name.
+ TFF_EXPR_IN_PARENS: parenthesize expressions.
+ TFF_NO_FUNCTION_ARGUMENTS: don't show function arguments.
+ TFF_UNQUALIFIED_NAME: do not print the qualifying scope of the
+ top-level entity.
+ TFF_NO_OMIT_DEFAULT_TEMPLATE_ARGUMENTS: do not omit template arguments
+ identical to their defaults. */
+
+#define TFF_PLAIN_IDENTIFIER (0)
+#define TFF_SCOPE (1)
+#define TFF_CHASE_TYPEDEF (1 << 1)
+#define TFF_DECL_SPECIFIERS (1 << 2)
+#define TFF_CLASS_KEY_OR_ENUM (1 << 3)
+#define TFF_RETURN_TYPE (1 << 4)
+#define TFF_FUNCTION_DEFAULT_ARGUMENTS (1 << 5)
+#define TFF_EXCEPTION_SPECIFICATION (1 << 6)
+#define TFF_TEMPLATE_HEADER (1 << 7)
+#define TFF_TEMPLATE_NAME (1 << 8)
+#define TFF_EXPR_IN_PARENS (1 << 9)
+#define TFF_NO_FUNCTION_ARGUMENTS (1 << 10)
+#define TFF_UNQUALIFIED_NAME (1 << 11)
+#define TFF_NO_OMIT_DEFAULT_TEMPLATE_ARGUMENTS (1 << 12)
+
+/* Returns the TEMPLATE_DECL associated to a TEMPLATE_TEMPLATE_PARM
+ node. */
+#define TEMPLATE_TEMPLATE_PARM_TEMPLATE_DECL(NODE) \
+ ((TREE_CODE (NODE) == BOUND_TEMPLATE_TEMPLATE_PARM) \
+ ? TYPE_TI_TEMPLATE (NODE) \
+ : TYPE_NAME (NODE))
+
+/* in lex.c */
+
+extern void init_reswords (void);
+
+/* Indexed by TREE_CODE, these tables give C-looking names to
+ operators represented by TREE_CODES. For example,
+ opname_tab[(int) MINUS_EXPR] == "-". */
+extern const char **opname_tab, **assignop_tab;
+
+typedef struct operator_name_info_t GTY(())
+{
+ /* The IDENTIFIER_NODE for the operator. */
+ tree identifier;
+ /* The name of the operator. */
+ const char *name;
+ /* The mangled name of the operator. */
+ const char *mangled_name;
+ /* The arity of the operator. */
+ int arity;
+} operator_name_info_t;
+
+/* A mapping from tree codes to operator name information. */
+extern GTY(()) operator_name_info_t operator_name_info
+ [(int) MAX_TREE_CODES];
+/* Similar, but for assignment operators. */
+extern GTY(()) operator_name_info_t assignment_operator_name_info
+ [(int) MAX_TREE_CODES];
+
+/* A type-qualifier, or bitmask therefore, using the TYPE_QUAL
+ constants. */
+
+typedef int cp_cv_quals;
+
+/* A storage class. */
+
+typedef enum cp_storage_class {
+ /* sc_none must be zero so that zeroing a cp_decl_specifier_seq
+ sets the storage_class field to sc_none. */
+ sc_none = 0,
+ sc_auto,
+ sc_register,
+ sc_static,
+ sc_extern,
+ sc_mutable
+} cp_storage_class;
+
+/* An individual decl-specifier. */
+
+typedef enum cp_decl_spec {
+ ds_first,
+ ds_signed = ds_first,
+ ds_unsigned,
+ ds_short,
+ ds_long,
+ ds_const,
+ ds_volatile,
+ ds_restrict,
+ ds_inline,
+ ds_virtual,
+ ds_explicit,
+ ds_friend,
+ ds_typedef,
+ ds_complex,
+ ds_thread,
+ ds_last
+} cp_decl_spec;
+
+/* A decl-specifier-seq. */
+
+typedef struct cp_decl_specifier_seq {
+ /* The number of times each of the keywords has been seen. */
+ unsigned specs[(int) ds_last];
+ /* The primary type, if any, given by the decl-specifier-seq.
+ Modifiers, like "short", "const", and "unsigned" are not
+ reflected here. This field will be a TYPE, unless a typedef-name
+ was used, in which case it will be a TYPE_DECL. */
+ tree type;
+ /* The location of the primary type. Mainly used for error
+ reporting. */
+ location_t type_location;
+ /* The attributes, if any, provided with the specifier sequence. */
+ tree attributes;
+ /* If non-NULL, a built-in type that the user attempted to redefine
+ to some other type. */
+ tree redefined_builtin_type;
+ /* The storage class specified -- or sc_none if no storage class was
+ explicitly specified. */
+ cp_storage_class storage_class;
+ /* True iff TYPE_SPEC indicates a user-defined type. */
+ BOOL_BITFIELD user_defined_type_p : 1;
+ /* True iff multiple types were (erroneously) specified for this
+ decl-specifier-seq. */
+ BOOL_BITFIELD multiple_types_p : 1;
+ /* True iff multiple storage classes were (erroneously) specified
+ for this decl-specifier-seq or a combination of a storage class
+ with a typedef specifier. */
+ BOOL_BITFIELD conflicting_specifiers_p : 1;
+ /* True iff at least one decl-specifier was found. */
+ BOOL_BITFIELD any_specifiers_p : 1;
+ /* True iff "int" was explicitly provided. */
+ BOOL_BITFIELD explicit_int_p : 1;
+ /* True iff "char" was explicitly provided. */
+ BOOL_BITFIELD explicit_char_p : 1;
+} cp_decl_specifier_seq;
+
+/* The various kinds of declarators. */
+
+typedef enum cp_declarator_kind {
+ cdk_id,
+ cdk_function,
+ cdk_array,
+ cdk_pointer,
+ cdk_reference,
+ cdk_ptrmem,
+ cdk_error
+} cp_declarator_kind;
+
+/* A declarator. */
+
+typedef struct cp_declarator cp_declarator;
+
+typedef struct cp_parameter_declarator cp_parameter_declarator;
+
+/* A parameter, before it has been semantically analyzed. */
+struct cp_parameter_declarator {
+ /* The next parameter, or NULL_TREE if none. */
+ cp_parameter_declarator *next;
+ /* The decl-specifiers-seq for the parameter. */
+ cp_decl_specifier_seq decl_specifiers;
+ /* The declarator for the parameter. */
+ cp_declarator *declarator;
+ /* The default-argument expression, or NULL_TREE, if none. */
+ tree default_argument;
+ /* True iff this is the first parameter in the list and the
+ parameter sequence ends with an ellipsis. */
+ bool ellipsis_p;
+};
+
+/* A declarator. */
+struct cp_declarator {
+ /* The kind of declarator. */
+ ENUM_BITFIELD (cp_declarator_kind) kind : 4;
+ /* Whether we parsed an ellipsis (`...') just before the declarator,
+ to indicate this is a parameter pack. */
+ BOOL_BITFIELD parameter_pack_p : 1;
+ /* Attributes that apply to this declarator. */
+ tree attributes;
+ /* For all but cdk_id and cdk_error, the contained declarator. For
+ cdk_id and cdk_error, guaranteed to be NULL. */
+ cp_declarator *declarator;
+ location_t id_loc; /* Currently only set for cdk_id and cdk_function. */
+ union {
+ /* For identifiers. */
+ struct {
+ /* If non-NULL, the qualifying scope (a NAMESPACE_DECL or
+ *_TYPE) for this identifier. */
+ tree qualifying_scope;
+ /* The unqualified name of the entity -- an IDENTIFIER_NODE,
+ BIT_NOT_EXPR, or TEMPLATE_ID_EXPR. */
+ tree unqualified_name;
+ /* If this is the name of a function, what kind of special
+ function (if any). */
+ special_function_kind sfk;
+ } id;
+ /* For functions. */
+ struct {
+ /* The parameters to the function as a TREE_LIST of decl/default. */
+ tree parameters;
+ /* The cv-qualifiers for the function. */
+ cp_cv_quals qualifiers;
+ /* The exception-specification for the function. */
+ tree exception_specification;
+ /* The late-specified return type, if any. */
+ tree late_return_type;
+ } function;
+ /* For arrays. */
+ struct {
+ /* The bounds to the array. */
+ tree bounds;
+ } array;
+ /* For cdk_pointer and cdk_ptrmem. */
+ struct {
+ /* The cv-qualifiers for the pointer. */
+ cp_cv_quals qualifiers;
+ /* For cdk_ptrmem, the class type containing the member. */
+ tree class_type;
+ } pointer;
+ /* For cdk_reference */
+ struct {
+ /* The cv-qualifiers for the reference. These qualifiers are
+ only used to diagnose ill-formed code. */
+ cp_cv_quals qualifiers;
+ /* Whether this is an rvalue reference */
+ bool rvalue_ref;
+ } reference;
+ } u;
+};
+
+/* A level of template instantiation. */
+struct tinst_level GTY(())
+{
+ /* The immediately deeper level in the chain. */
+ struct tinst_level *next;
+
+ /* The original node. Can be either a DECL (for a function or static
+ data member) or a TYPE (for a class), depending on what we were
+ asked to instantiate. */
+ tree decl;
+
+ /* The location where the template is instantiated. */
+ location_t locus;
+
+ /* True if the location is in a system header. */
+ bool in_system_header_p;
+};
+
+/* A parameter list indicating for a function with no parameters,
+ e.g "int f(void)". */
+extern cp_parameter_declarator *no_parameters;
+
+/* True if we saw "#pragma GCC java_exceptions". */
+extern bool pragma_java_exceptions;
+
+/* in call.c */
+extern bool check_dtor_name (tree, tree);
+
+extern tree build_vfield_ref (tree, tree);
+extern tree build_conditional_expr (tree, tree, tree,
+ tsubst_flags_t);
+extern tree build_addr_func (tree);
+extern tree build_call_a (tree, int, tree*);
+extern tree build_call_n (tree, int, ...);
+extern bool null_ptr_cst_p (tree);
+extern bool sufficient_parms_p (const_tree);
+extern tree type_decays_to (tree);
+extern tree build_user_type_conversion (tree, tree, int);
+extern tree build_new_function_call (tree, tree, bool,
+ tsubst_flags_t);
+extern tree build_operator_new_call (tree, tree, tree *, tree *,
+ tree *);
+extern tree build_new_method_call (tree, tree, tree, tree, int,
+ tree *, tsubst_flags_t);
+extern tree build_special_member_call (tree, tree, tree, tree, int,
+ tsubst_flags_t);
+extern tree build_new_op (enum tree_code, int, tree,
+ tree, tree, bool *,
+ tsubst_flags_t);
+extern tree build_op_delete_call (enum tree_code, tree, tree, bool, tree, tree);
+extern bool can_convert (tree, tree);
+extern bool can_convert_arg (tree, tree, tree, int);
+extern bool can_convert_arg_bad (tree, tree, tree);
+extern bool enforce_access (tree, tree, tree);
+extern tree convert_default_arg (tree, tree, tree, int);
+extern tree convert_arg_to_ellipsis (tree);
+extern tree build_x_va_arg (tree, tree);
+extern tree cxx_type_promotes_to (tree);
+extern tree type_passed_as (tree);
+extern tree convert_for_arg_passing (tree, tree);
+extern bool is_properly_derived_from (tree, tree);
+extern tree set_up_extended_ref_temp (tree, tree, tree *, tree *);
+extern tree initialize_reference (tree, tree, tree, tree *);
+extern tree make_temporary_var_for_ref_to_temp (tree, tree);
+extern tree strip_top_quals (tree);
+extern tree perform_implicit_conversion (tree, tree, tsubst_flags_t);
+extern tree perform_direct_initialization_if_possible (tree, tree, bool,
+ tsubst_flags_t);
+extern tree in_charge_arg_for_name (tree);
+extern tree build_cxx_call (tree, int, tree *);
+extern bool is_std_init_list (tree);
+extern bool is_list_ctor (tree);
+#ifdef ENABLE_CHECKING
+extern void validate_conversion_obstack (void);
+#endif /* ENABLE_CHECKING */
+
+/* in class.c */
+extern tree build_base_path (enum tree_code, tree,
+ tree, int);
+extern tree convert_to_base (tree, tree, bool, bool);
+extern tree convert_to_base_statically (tree, tree);
+extern tree build_vtbl_ref (tree, tree);
+extern tree build_vfn_ref (tree, tree);
+extern tree get_vtable_decl (tree, int);
+extern void resort_type_method_vec (void *, void *,
+ gt_pointer_operator, void *);
+extern bool add_method (tree, tree, tree);
+extern bool currently_open_class (tree);
+extern tree currently_open_derived_class (tree);
+extern tree finish_struct (tree, tree);
+extern void finish_struct_1 (tree);
+extern int resolves_to_fixed_type_p (tree, int *);
+extern void init_class_processing (void);
+extern int is_empty_class (tree);
+extern bool is_really_empty_class (tree);
+extern void pushclass (tree);
+extern void popclass (void);
+extern void push_nested_class (tree);
+extern void pop_nested_class (void);
+extern int current_lang_depth (void);
+extern void push_lang_context (tree);
+extern void pop_lang_context (void);
+extern tree instantiate_type (tree, tree, tsubst_flags_t);
+extern void print_class_statistics (void);
+extern void cxx_print_statistics (void);
+extern void cxx_print_xnode (FILE *, tree, int);
+extern void cxx_print_decl (FILE *, tree, int);
+extern void cxx_print_type (FILE *, tree, int);
+extern void cxx_print_identifier (FILE *, tree, int);
+extern void cxx_print_error_function (struct diagnostic_context *,
+ const char *,
+ struct diagnostic_info *);
+extern void build_self_reference (void);
+extern int same_signature_p (const_tree, const_tree);
+extern void maybe_add_class_template_decl_list (tree, tree, int);
+extern void unreverse_member_declarations (tree);
+extern void invalidate_class_lookup_cache (void);
+extern void maybe_note_name_used_in_class (tree, tree);
+extern void note_name_declared_in_class (tree, tree);
+extern tree get_vtbl_decl_for_binfo (tree);
+extern void debug_class (tree);
+extern void debug_thunks (tree);
+extern tree cp_get_virtual_function_decl (tree, tree);
+extern tree cp_fold_obj_type_ref (tree, tree);
+extern bool cp_decl_is_base_field (tree);
+extern bool cp_decl_is_constructor (tree);
+extern bool cp_decl_is_destructor (tree);
+extern int cp_decl_is_const_member_func (tree);
+extern void set_linkage_according_to_type (tree, tree);
+extern void determine_key_method (tree);
+extern void check_for_override (tree, tree);
+extern void push_class_stack (void);
+extern void pop_class_stack (void);
+extern bool type_has_user_nondefault_constructor (tree);
+extern bool type_has_user_provided_constructor (tree);
+extern bool type_has_user_provided_default_constructor (tree);
+extern bool defaultable_fn_p (tree);
+
+/* in cvt.c */
+extern tree convert_to_reference (tree, tree, int, int, tree);
+extern tree convert_from_reference (tree);
+extern tree force_rvalue (tree);
+extern tree ocp_convert (tree, tree, int, int);
+extern tree cp_convert (tree, tree);
+extern tree cp_convert_and_check (tree, tree);
+extern tree convert_to_void (tree, const char */*implicit context*/,
+ tsubst_flags_t);
+extern tree convert_force (tree, tree, int);
+extern tree build_expr_type_conversion (int, tree, bool);
+extern tree type_promotes_to (tree);
+extern tree perform_qualification_conversions (tree, tree);
+extern void clone_function_decl (tree, int);
+extern void adjust_clone_args (tree);
+
+/* decl.c */
+extern tree poplevel (int, int, int);
+extern void insert_block (tree);
+extern tree pushdecl (tree);
+extern tree pushdecl_maybe_friend (tree, bool);
+extern void cxx_init_decl_processing (void);
+enum cp_tree_node_structure_enum cp_tree_node_structure
+ (union lang_tree_node *);
+extern bool cxx_mark_addressable (tree);
+extern void maybe_push_cleanup_level (tree);
+extern void finish_scope (void);
+extern void push_switch (tree);
+extern void pop_switch (void);
+extern tree pushtag (tree, tree, tag_scope);
+extern tree make_anon_name (void);
+extern int decls_match (tree, tree);
+extern tree duplicate_decls (tree, tree, bool);
+extern tree pushdecl_top_level_maybe_friend (tree, bool);
+extern tree pushdecl_top_level_and_finish (tree, tree);
+extern tree declare_local_label (tree);
+extern tree define_label (location_t, tree);
+extern void check_goto (tree);
+extern bool check_omp_return (void);
+extern tree make_typename_type (tree, tree, enum tag_types, tsubst_flags_t);
+extern tree make_unbound_class_template (tree, tree, tree, tsubst_flags_t);
+extern tree check_for_out_of_scope_variable (tree);
+extern tree build_library_fn_ptr (const char *, tree);
+extern tree build_cp_library_fn_ptr (const char *, tree);
+extern tree push_library_fn (tree, tree, tree);
+extern tree push_void_library_fn (tree, tree);
+extern tree push_throw_library_fn (tree, tree);
+extern tree check_tag_decl (cp_decl_specifier_seq *);
+extern tree shadow_tag (cp_decl_specifier_seq *);
+extern tree groktypename (cp_decl_specifier_seq *, const cp_declarator *, bool);
+extern tree start_decl (const cp_declarator *, cp_decl_specifier_seq *, int, tree, tree, tree *);
+extern void start_decl_1 (tree, bool);
+extern bool check_array_initializer (tree, tree, tree);
+extern void cp_finish_decl (tree, tree, bool, tree, int);
+extern void finish_decl (tree, tree, tree);
+extern int cp_complete_array_type (tree *, tree, bool);
+extern tree build_ptrmemfunc_type (tree);
+extern tree build_ptrmem_type (tree, tree);
+/* the grokdeclarator prototype is in decl.h */
+extern tree build_this_parm (tree, cp_cv_quals);
+extern int copy_fn_p (const_tree);
+extern bool move_fn_p (const_tree);
+extern tree get_scope_of_declarator (const cp_declarator *);
+extern void grok_special_member_properties (tree);
+extern int grok_ctor_properties (const_tree, const_tree);
+extern bool grok_op_properties (tree, bool);
+extern tree xref_tag (enum tag_types, tree, tag_scope, bool);
+extern tree xref_tag_from_type (tree, tree, tag_scope);
+extern bool xref_basetypes (tree, tree);
+extern tree start_enum (tree, tree, bool);
+extern void finish_enum (tree);
+extern void build_enumerator (tree, tree, tree);
+extern tree lookup_enumerator (tree, tree);
+extern void start_preparsed_function (tree, tree, int);
+extern int start_function (cp_decl_specifier_seq *, const cp_declarator *, tree);
+extern tree begin_function_body (void);
+extern void finish_function_body (tree);
+extern tree outer_curly_brace_block (tree);
+extern tree finish_function (int);
+extern tree start_method (cp_decl_specifier_seq *, const cp_declarator *, tree);
+extern tree finish_method (tree);
+extern void maybe_register_incomplete_var (tree);
+extern void maybe_commonize_var (tree);
+extern void complete_vars (tree);
+extern void finish_stmt (void);
+extern void print_other_binding_stack (struct cp_binding_level *);
+extern void revert_static_member_fn (tree);
+extern void fixup_anonymous_aggr (tree);
+extern int check_static_variable_definition (tree, tree);
+extern tree compute_array_index_type (tree, tree);
+extern tree check_default_argument (tree, tree);
+typedef int (*walk_namespaces_fn) (tree, void *);
+extern int walk_namespaces (walk_namespaces_fn,
+ void *);
+extern int wrapup_globals_for_namespace (tree, void *);
+extern tree create_implicit_typedef (tree, tree);
+extern tree maybe_push_decl (tree);
+extern tree force_target_expr (tree, tree);
+extern tree build_target_expr_with_type (tree, tree);
+extern int local_variable_p (const_tree);
+extern tree register_dtor_fn (tree);
+extern tmpl_spec_kind current_tmpl_spec_kind (int);
+extern tree cp_fname_init (const char *, tree *);
+extern tree cxx_builtin_function (tree decl);
+extern tree cxx_builtin_function_ext_scope (tree decl);
+extern tree check_elaborated_type_specifier (enum tag_types, tree, bool);
+extern void warn_extern_redeclared_static (tree, tree);
+extern const char *cxx_comdat_group (tree);
+extern bool cp_missing_noreturn_ok_p (tree);
+extern void initialize_artificial_var (tree, tree);
+extern tree check_var_type (tree, tree);
+extern tree reshape_init (tree, tree);
+
+extern bool defer_mark_used_calls;
+extern GTY(()) VEC(tree, gc) *deferred_mark_used_calls;
+
+/* in decl2.c */
+extern bool check_java_method (tree);
+extern tree build_memfn_type (tree, tree, cp_cv_quals);
+extern void maybe_retrofit_in_chrg (tree);
+extern void maybe_make_one_only (tree);
+extern void grokclassfn (tree, tree,
+ enum overload_flags);
+extern tree grok_array_decl (tree, tree);
+extern tree delete_sanity (tree, tree, bool, int);
+extern tree check_classfn (tree, tree, tree);
+extern void check_member_template (tree);
+extern tree grokfield (const cp_declarator *, cp_decl_specifier_seq *,
+ tree, bool, tree, tree);
+extern tree grokbitfield (const cp_declarator *, cp_decl_specifier_seq *,
+ tree, tree);
+extern tree cp_reconstruct_complex_type (tree, tree);
+extern void cplus_decl_attributes (tree *, tree, int);
+extern void finish_anon_union (tree);
+extern void cp_write_global_declarations (void);
+extern void cp_process_pending_declarations (location_t);
+extern void cp_clear_deferred_fns (void);
+extern void cp_clear_conv_type_map (void);
+extern tree coerce_new_type (tree);
+extern tree coerce_delete_type (tree);
+extern void comdat_linkage (tree);
+extern void determine_visibility (tree);
+extern void constrain_class_visibility (tree);
+extern void update_member_visibility (tree);
+extern void import_export_decl (tree);
+extern tree build_cleanup (tree);
+extern tree build_offset_ref_call_from_tree (tree, tree);
+extern void check_default_args (tree);
+extern void mark_used (tree);
+extern void finish_static_data_member_decl (tree, tree, bool, tree, int);
+extern tree cp_build_parm_decl (tree, tree);
+extern tree get_guard (tree);
+extern tree get_guard_cond (tree);
+extern tree set_guard (tree);
+extern tree cxx_callgraph_analyze_expr (tree *, int *);
+extern void mark_needed (tree);
+extern bool decl_needed_p (tree);
+extern void note_vague_linkage_fn (tree);
+extern tree build_artificial_parm (tree, tree);
+extern bool possibly_inlined_p (tree);
+extern int parm_index (tree);
+
+/* in error.c */
+extern void init_error (void);
+extern const char *type_as_string (tree, int);
+extern const char *decl_as_string (tree, int);
+extern const char *expr_as_string (tree, int);
+extern const char *lang_decl_name (tree, int);
+extern const char *language_to_string (enum languages);
+extern const char *class_key_or_enum_as_string (tree);
+extern void print_instantiation_context (void);
+extern void maybe_warn_variadic_templates (void);
+extern void maybe_warn_cpp0x (const char *);
+
+/* in except.c */
+extern void init_exception_processing (void);
+extern tree expand_start_catch_block (tree);
+extern void expand_end_catch_block (void);
+extern tree build_exc_ptr (void);
+extern tree build_throw (tree);
+extern int nothrow_libfn_p (const_tree);
+extern void check_handlers (tree);
+extern void choose_personality_routine (enum languages);
+extern tree eh_type_info (tree);
+
+/* in expr.c */
+extern tree cplus_expand_constant (tree);
+
+/* friend.c */
+extern int is_friend (tree, tree);
+extern void make_friend_class (tree, tree, bool);
+extern void add_friend (tree, tree, bool);
+extern tree do_friend (tree, tree, tree, tree, enum overload_flags, bool);
+
+/* in init.c */
+extern tree expand_member_init (tree);
+extern void emit_mem_initializers (tree);
+extern tree build_aggr_init (tree, tree, int,
+ tsubst_flags_t);
+extern int is_class_type (tree, int);
+extern tree get_type_value (tree);
+extern tree build_zero_init (tree, tree, bool);
+extern tree build_value_init (tree);
+extern tree build_value_init_noctor (tree);
+extern tree build_offset_ref (tree, tree, bool);
+extern tree build_new (tree, tree, tree, tree, int,
+ tsubst_flags_t);
+extern tree build_vec_init (tree, tree, tree, bool, int,
+ tsubst_flags_t);
+extern tree build_delete (tree, tree,
+ special_function_kind,
+ int, int);
+extern void push_base_cleanups (void);
+extern tree build_vec_delete (tree, tree,
+ special_function_kind, int);
+extern tree create_temporary_var (tree);
+extern void initialize_vtbl_ptrs (tree);
+extern tree build_java_class_ref (tree);
+extern tree integral_constant_value (tree);
+
+/* in lex.c */
+extern void cxx_dup_lang_specific_decl (tree);
+extern void yyungetc (int, int);
+
+extern tree unqualified_name_lookup_error (tree);
+extern tree unqualified_fn_lookup_error (tree);
+extern tree build_lang_decl (enum tree_code, tree, tree);
+extern void retrofit_lang_decl (tree);
+extern tree copy_decl (tree);
+extern tree copy_type (tree);
+extern tree cxx_make_type (enum tree_code);
+extern tree make_class_type (enum tree_code);
+extern void yyerror (const char *);
+extern void yyhook (int);
+extern bool cxx_init (void);
+extern void cxx_finish (void);
+extern bool in_main_input_context (void);
+
+/* in method.c */
+extern void init_method (void);
+extern tree make_thunk (tree, bool, tree, tree);
+extern void finish_thunk (tree);
+extern void use_thunk (tree, bool);
+extern void synthesize_method (tree);
+extern tree lazily_declare_fn (special_function_kind,
+ tree);
+extern tree skip_artificial_parms_for (const_tree, tree);
+extern int num_artificial_parms_for (const_tree);
+extern tree make_alias_for (tree, tree);
+extern tree locate_copy (tree, void *);
+extern tree locate_ctor (tree, void *);
+extern tree locate_dtor (tree, void *);
+
+/* In optimize.c */
+extern bool maybe_clone_body (tree);
+
+/* in pt.c */
+extern bool check_template_shadow (tree);
+extern tree get_innermost_template_args (tree, int);
+extern void maybe_begin_member_template_processing (tree);
+extern void maybe_end_member_template_processing (void);
+extern tree finish_member_template_decl (tree);
+extern void begin_template_parm_list (void);
+extern bool begin_specialization (void);
+extern void reset_specialization (void);
+extern void end_specialization (void);
+extern void begin_explicit_instantiation (void);
+extern void end_explicit_instantiation (void);
+extern tree check_explicit_specialization (tree, tree, int, int);
+extern tree make_auto (void);
+extern tree do_auto_deduction (tree, tree, tree);
+extern tree type_uses_auto (tree);
+extern tree splice_late_return_type (tree, tree);
+extern bool is_auto (const_tree);
+extern tree process_template_parm (tree, tree, bool, bool);
+extern tree end_template_parm_list (tree);
+extern void end_template_decl (void);
+extern bool check_default_tmpl_args (tree, tree, int, int, int);
+extern tree push_template_decl (tree);
+extern tree push_template_decl_real (tree, bool);
+extern bool redeclare_class_template (tree, tree);
+extern tree lookup_template_class (tree, tree, tree, tree,
+ int, tsubst_flags_t);
+extern tree lookup_template_function (tree, tree);
+extern int uses_template_parms (tree);
+extern int uses_template_parms_level (tree, int);
+extern tree instantiate_class_template (tree);
+extern tree instantiate_template (tree, tree, tsubst_flags_t);
+extern int fn_type_unification (tree, tree, tree, tree,
+ tree, unification_kind_t, int);
+extern void mark_decl_instantiated (tree, int);
+extern int more_specialized_fn (tree, tree, int);
+extern void do_decl_instantiation (tree, tree);
+extern void do_type_instantiation (tree, tree, tsubst_flags_t);
+extern tree instantiate_decl (tree, int, bool);
+extern int comp_template_parms (const_tree, const_tree);
+extern bool uses_parameter_packs (tree);
+extern bool template_parameter_pack_p (const_tree);
+extern tree make_pack_expansion (tree);
+extern bool check_for_bare_parameter_packs (tree);
+extern tree get_template_info (tree);
+extern int template_class_depth (tree);
+extern int is_specialization_of (tree, tree);
+extern bool is_specialization_of_friend (tree, tree);
+extern tree get_pattern_parm (tree, tree);
+extern int comp_template_args (tree, tree);
+extern tree maybe_process_partial_specialization (tree);
+extern tree most_specialized_instantiation (tree);
+extern void print_candidates (tree);
+extern void instantiate_pending_templates (int);
+extern tree tsubst_default_argument (tree, tree, tree);
+extern tree tsubst_copy_and_build (tree, tree, tsubst_flags_t,
+ tree, bool, bool);
+extern tree most_general_template (tree);
+extern tree get_mostly_instantiated_function_type (tree);
+extern int problematic_instantiation_changed (void);
+extern void record_last_problematic_instantiation (void);
+extern struct tinst_level *current_instantiation(void);
+extern tree maybe_get_template_decl_from_type_decl (tree);
+extern int processing_template_parmlist;
+extern bool dependent_type_p (tree);
+extern bool dependent_scope_p (tree);
+extern bool any_dependent_template_arguments_p (const_tree);
+extern bool dependent_template_p (tree);
+extern bool dependent_template_id_p (tree, tree);
+extern bool type_dependent_expression_p (tree);
+extern bool any_type_dependent_arguments_p (const_tree);
+extern bool type_dependent_expression_p_push (tree);
+extern bool value_dependent_expression_p (tree);
+extern bool any_value_dependent_elements_p (const_tree);
+extern bool dependent_omp_for_p (tree, tree, tree, tree);
+extern tree resolve_typename_type (tree, bool);
+extern tree template_for_substitution (tree);
+extern tree build_non_dependent_expr (tree);
+extern tree build_non_dependent_args (tree);
+extern bool reregister_specialization (tree, tree, tree);
+extern tree fold_non_dependent_expr (tree);
+extern bool explicit_class_specialization_p (tree);
+extern struct tinst_level *outermost_tinst_level(void);
+extern bool parameter_of_template_p (tree, tree);
+
+/* in repo.c */
+extern void init_repo (void);
+extern int repo_emit_p (tree);
+extern bool repo_export_class_p (const_tree);
+extern void finish_repo (void);
+
+/* in rtti.c */
+/* A vector of all tinfo decls that haven't been emitted yet. */
+extern GTY(()) VEC(tree,gc) *unemitted_tinfo_decls;
+
+extern void init_rtti_processing (void);
+extern tree build_typeid (tree);
+extern tree get_tinfo_decl (tree);
+extern tree get_typeid (tree);
+extern tree build_headof (tree);
+extern tree build_dynamic_cast (tree, tree, tsubst_flags_t);
+extern void emit_support_tinfos (void);
+extern bool emit_tinfo_decl (tree);
+
+/* in search.c */
+extern bool accessible_base_p (tree, tree, bool);
+extern tree lookup_base (tree, tree, base_access,
+ base_kind *);
+extern tree dcast_base_hint (tree, tree);
+extern int accessible_p (tree, tree, bool);
+extern tree lookup_field_1 (tree, tree, bool);
+extern tree lookup_field (tree, tree, int, bool);
+extern int lookup_fnfields_1 (tree, tree);
+extern int class_method_index_for_fn (tree, tree);
+extern tree lookup_fnfields (tree, tree, int);
+extern tree lookup_member (tree, tree, int, bool);
+extern int look_for_overrides (tree, tree);
+extern void get_pure_virtuals (tree);
+extern void maybe_suppress_debug_info (tree);
+extern void note_debug_info_needed (tree);
+extern void print_search_statistics (void);
+extern void reinit_search_statistics (void);
+extern tree current_scope (void);
+extern int at_function_scope_p (void);
+extern bool at_class_scope_p (void);
+extern bool at_namespace_scope_p (void);
+extern tree context_for_name_lookup (tree);
+extern tree lookup_conversions (tree);
+extern tree binfo_from_vbase (tree);
+extern tree binfo_for_vbase (tree, tree);
+extern tree look_for_overrides_here (tree, tree);
+#define dfs_skip_bases ((tree)1)
+extern tree dfs_walk_all (tree, tree (*) (tree, void *),
+ tree (*) (tree, void *), void *);
+extern tree dfs_walk_once (tree, tree (*) (tree, void *),
+ tree (*) (tree, void *), void *);
+extern tree binfo_via_virtual (tree, tree);
+extern tree build_baselink (tree, tree, tree, tree);
+extern tree adjust_result_of_qualified_name_lookup
+ (tree, tree, tree);
+extern tree copied_binfo (tree, tree);
+extern tree original_binfo (tree, tree);
+extern int shared_member_p (tree);
+
+
+/* The representation of a deferred access check. */
+
+typedef struct deferred_access_check GTY(())
+{
+ /* The base class in which the declaration is referenced. */
+ tree binfo;
+ /* The declaration whose access must be checked. */
+ tree decl;
+ /* The declaration that should be used in the error message. */
+ tree diag_decl;
+} deferred_access_check;
+DEF_VEC_O(deferred_access_check);
+DEF_VEC_ALLOC_O(deferred_access_check,gc);
+
+/* in semantics.c */
+extern void push_deferring_access_checks (deferring_kind);
+extern void resume_deferring_access_checks (void);
+extern void stop_deferring_access_checks (void);
+extern void pop_deferring_access_checks (void);
+extern VEC (deferred_access_check,gc)* get_deferred_access_checks (void);
+extern void pop_to_parent_deferring_access_checks (void);
+extern void perform_access_checks (VEC (deferred_access_check,gc)*);
+extern void perform_deferred_access_checks (void);
+extern void perform_or_defer_access_check (tree, tree, tree);
+extern int stmts_are_full_exprs_p (void);
+extern void init_cp_semantics (void);
+extern tree do_poplevel (tree);
+extern void add_decl_expr (tree);
+extern tree finish_expr_stmt (tree);
+extern tree begin_if_stmt (void);
+extern void finish_if_stmt_cond (tree, tree);
+extern tree finish_then_clause (tree);
+extern void begin_else_clause (tree);
+extern void finish_else_clause (tree);
+extern void finish_if_stmt (tree);
+extern tree begin_while_stmt (void);
+extern void finish_while_stmt_cond (tree, tree);
+extern void finish_while_stmt (tree);
+extern tree begin_do_stmt (void);
+extern void finish_do_body (tree);
+extern void finish_do_stmt (tree, tree);
+extern tree finish_return_stmt (tree);
+extern tree begin_for_stmt (void);
+extern void finish_for_init_stmt (tree);
+extern void finish_for_cond (tree, tree);
+extern void finish_for_expr (tree, tree);
+extern void finish_for_stmt (tree);
+extern tree finish_break_stmt (void);
+extern tree finish_continue_stmt (void);
+extern tree begin_switch_stmt (void);
+extern void finish_switch_cond (tree, tree);
+extern void finish_switch_stmt (tree);
+extern tree finish_case_label (tree, tree);
+extern tree finish_goto_stmt (tree);
+extern tree begin_try_block (void);
+extern void finish_try_block (tree);
+extern tree begin_eh_spec_block (void);
+extern void finish_eh_spec_block (tree, tree);
+extern void finish_handler_sequence (tree);
+extern tree begin_function_try_block (tree *);
+extern void finish_function_try_block (tree);
+extern void finish_function_handler_sequence (tree, tree);
+extern void finish_cleanup_try_block (tree);
+extern tree begin_handler (void);
+extern void finish_handler_parms (tree, tree);
+extern void finish_handler (tree);
+extern void finish_cleanup (tree, tree);
+
+enum {
+ BCS_NO_SCOPE = 1,
+ BCS_TRY_BLOCK = 2,
+ BCS_FN_BODY = 4
+};
+extern tree begin_compound_stmt (unsigned int);
+
+extern void finish_compound_stmt (tree);
+extern tree finish_asm_stmt (int, tree, tree, tree, tree);
+extern tree finish_label_stmt (tree);
+extern void finish_label_decl (tree);
+extern tree finish_parenthesized_expr (tree);
+extern tree finish_non_static_data_member (tree, tree, tree);
+extern tree begin_stmt_expr (void);
+extern tree finish_stmt_expr_expr (tree, tree);
+extern tree finish_stmt_expr (tree, bool);
+extern tree stmt_expr_value_expr (tree);
+extern tree perform_koenig_lookup (tree, tree);
+extern tree finish_call_expr (tree, tree, bool, bool,
+ tsubst_flags_t);
+extern tree finish_increment_expr (tree, enum tree_code);
+extern tree finish_this_expr (void);
+extern tree finish_pseudo_destructor_expr (tree, tree, tree);
+extern tree finish_unary_op_expr (enum tree_code, tree);
+extern tree finish_compound_literal (tree, tree);
+extern tree finish_fname (tree);
+extern void finish_translation_unit (void);
+extern tree finish_template_type_parm (tree, tree);
+extern tree finish_template_template_parm (tree, tree);
+extern tree begin_class_definition (tree, tree);
+extern void finish_template_decl (tree);
+extern tree finish_template_type (tree, tree, int);
+extern tree finish_base_specifier (tree, tree, bool);
+extern void finish_member_declaration (tree);
+extern void qualified_name_lookup_error (tree, tree, tree,
+ location_t);
+extern void check_template_keyword (tree);
+extern tree finish_id_expression (tree, tree, tree,
+ cp_id_kind *,
+ bool, bool, bool *,
+ bool, bool, bool, bool,
+ const char **,
+ location_t);
+extern tree finish_typeof (tree);
+extern tree finish_offsetof (tree);
+extern void finish_decl_cleanup (tree, tree);
+extern void finish_eh_cleanup (tree);
+extern void emit_associated_thunks (tree);
+extern void finish_mem_initializers (tree);
+extern tree check_template_template_default_arg (tree);
+extern void expand_or_defer_fn (tree);
+extern void check_accessibility_of_qualified_id (tree, tree, tree);
+extern tree finish_qualified_id_expr (tree, tree, bool, bool,
+ bool, bool);
+extern void simplify_aggr_init_expr (tree *);
+extern void finalize_nrv (tree *, tree, tree);
+extern void note_decl_for_pch (tree);
+extern tree finish_omp_clauses (tree);
+extern void finish_omp_threadprivate (tree);
+extern tree begin_omp_structured_block (void);
+extern tree finish_omp_structured_block (tree);
+extern tree begin_omp_parallel (void);
+extern tree finish_omp_parallel (tree, tree);
+extern tree begin_omp_task (void);
+extern tree finish_omp_task (tree, tree);
+extern tree finish_omp_for (location_t, tree, tree,
+ tree, tree, tree, tree, tree);
+extern void finish_omp_atomic (enum tree_code, tree, tree);
+extern void finish_omp_barrier (void);
+extern void finish_omp_flush (void);
+extern void finish_omp_taskwait (void);
+extern enum omp_clause_default_kind cxx_omp_predetermined_sharing (tree);
+extern tree cxx_omp_clause_default_ctor (tree, tree, tree);
+extern tree cxx_omp_clause_copy_ctor (tree, tree, tree);
+extern tree cxx_omp_clause_assign_op (tree, tree, tree);
+extern tree cxx_omp_clause_dtor (tree, tree);
+extern void cxx_omp_finish_clause (tree);
+extern bool cxx_omp_privatize_by_reference (const_tree);
+extern bool cxx_omp_create_clause_info (tree, tree, bool, bool, bool);
+extern tree baselink_for_fns (tree);
+extern void finish_static_assert (tree, tree, location_t,
+ bool);
+extern tree describable_type (tree);
+extern tree finish_decltype_type (tree, bool);
+extern tree finish_trait_expr (enum cp_trait_kind, tree, tree);
+
+/* in tree.c */
+extern void lang_check_failed (const char *, int,
+ const char *) ATTRIBUTE_NORETURN;
+extern tree stabilize_expr (tree, tree *);
+extern void stabilize_call (tree, tree *);
+extern void stabilize_aggr_init (tree, tree *);
+extern bool stabilize_init (tree, tree *);
+extern tree add_stmt_to_compound (tree, tree);
+extern tree cxx_maybe_build_cleanup (tree);
+extern void init_tree (void);
+extern int pod_type_p (const_tree);
+extern bool class_tmpl_impl_spec_p (const_tree);
+extern int zero_init_p (const_tree);
+extern tree canonical_type_variant (tree);
+extern tree copy_binfo (tree, tree, tree,
+ tree *, int);
+extern int member_p (const_tree);
+extern cp_lvalue_kind real_lvalue_p (tree);
+extern bool lvalue_or_rvalue_with_address_p (tree);
+extern bool builtin_valid_in_constant_expr_p (const_tree);
+extern tree build_min (enum tree_code, tree, ...);
+extern tree build_min_nt (enum tree_code, ...);
+extern tree build_min_non_dep (enum tree_code, tree, ...);
+extern tree build_min_non_dep_call_list (tree, tree, tree);
+extern tree build_cplus_new (tree, tree);
+extern tree build_aggr_init_expr (tree, tree);
+extern tree get_target_expr (tree);
+extern tree build_cplus_array_type (tree, tree);
+extern tree build_array_of_n_type (tree, int);
+extern tree hash_tree_cons (tree, tree, tree);
+extern tree hash_tree_chain (tree, tree);
+extern tree build_qualified_name (tree, tree, tree, bool);
+extern int is_overloaded_fn (tree);
+extern tree get_first_fn (tree);
+extern tree ovl_cons (tree, tree);
+extern tree build_overload (tree, tree);
+extern const char *cxx_printable_name (tree, int);
+extern tree build_exception_variant (tree, tree);
+extern tree bind_template_template_parm (tree, tree);
+extern tree array_type_nelts_total (tree);
+extern tree array_type_nelts_top (tree);
+extern tree break_out_target_exprs (tree);
+extern tree get_type_decl (tree);
+extern tree decl_namespace_context (tree);
+extern bool decl_anon_ns_mem_p (const_tree);
+extern tree lvalue_type (tree);
+extern tree error_type (tree);
+extern int varargs_function_p (const_tree);
+extern bool really_overloaded_fn (tree);
+extern bool cp_tree_equal (tree, tree);
+extern tree no_linkage_check (tree, bool);
+extern void debug_binfo (tree);
+extern tree build_dummy_object (tree);
+extern tree maybe_dummy_object (tree, tree *);
+extern int is_dummy_object (const_tree);
+extern const struct attribute_spec cxx_attribute_table[];
+extern tree make_ptrmem_cst (tree, tree);
+extern tree cp_build_type_attribute_variant (tree, tree);
+extern tree cp_build_reference_type (tree, bool);
+extern tree cp_build_qualified_type_real (tree, int, tsubst_flags_t);
+#define cp_build_qualified_type(TYPE, QUALS) \
+ cp_build_qualified_type_real ((TYPE), (QUALS), tf_warning_or_error)
+extern special_function_kind special_function_p (const_tree);
+extern int count_trees (tree);
+extern int char_type_p (tree);
+extern void verify_stmt_tree (tree);
+extern linkage_kind decl_linkage (tree);
+extern tree cp_walk_subtrees (tree*, int*, walk_tree_fn,
+ void*, struct pointer_set_t*);
+#define cp_walk_tree(a,b,c,d) \
+ walk_tree_1 (a, b, c, d, cp_walk_subtrees)
+#define cp_walk_tree_without_duplicates(a,b,c) \
+ walk_tree_without_duplicates_1 (a, b, c, cp_walk_subtrees)
+extern tree fold_if_not_in_template (tree);
+extern tree rvalue (tree);
+extern tree convert_bitfield_to_declared_type (tree);
+extern tree cp_save_expr (tree);
+extern bool cast_valid_in_integral_constant_expression_p (tree);
+extern bool cxx_type_hash_eq (const_tree, const_tree);
+
+/* in typeck.c */
+extern int string_conv_p (const_tree, const_tree, int);
+extern tree cp_truthvalue_conversion (tree);
+extern tree condition_conversion (tree);
+extern tree require_complete_type (tree);
+extern tree complete_type (tree);
+extern tree complete_type_or_else (tree, tree);
+extern int type_unknown_p (const_tree);
+extern bool comp_except_specs (const_tree, const_tree, bool);
+extern bool comptypes (tree, tree, int);
+extern bool compparms (const_tree, const_tree);
+extern int comp_cv_qualification (const_tree, const_tree);
+extern int comp_cv_qual_signature (tree, tree);
+extern tree cxx_sizeof_or_alignof_expr (tree, enum tree_code, bool);
+extern tree cxx_sizeof_or_alignof_type (tree, enum tree_code, bool);
+extern tree cxx_sizeof_nowarn (tree);
+extern tree is_bitfield_expr_with_lowered_type (const_tree);
+extern tree unlowered_expr_type (const_tree);
+extern tree decay_conversion (tree);
+extern tree build_class_member_access_expr (tree, tree, tree, bool,
+ tsubst_flags_t);
+extern tree finish_class_member_access_expr (tree, tree, bool,
+ tsubst_flags_t);
+extern tree build_x_indirect_ref (tree, const char *,
+ tsubst_flags_t);
+extern tree cp_build_indirect_ref (tree, const char *,
+ tsubst_flags_t);
+extern tree build_array_ref (tree, tree, location_t);
+extern tree get_member_function_from_ptrfunc (tree *, tree);
+extern tree cp_build_function_call (tree, tree, tsubst_flags_t);
+extern tree build_x_binary_op (enum tree_code, tree,
+ enum tree_code, tree,
+ enum tree_code, bool *,
+ tsubst_flags_t);
+extern tree build_x_array_ref (tree, tree, tsubst_flags_t);
+extern tree build_x_unary_op (enum tree_code, tree,
+ tsubst_flags_t);
+extern tree cp_build_unary_op (enum tree_code, tree, int,
+ tsubst_flags_t);
+extern tree unary_complex_lvalue (enum tree_code, tree);
+extern tree build_x_conditional_expr (tree, tree, tree,
+ tsubst_flags_t);
+extern tree build_x_compound_expr_from_list (tree, const char *);
+extern tree build_x_compound_expr (tree, tree, tsubst_flags_t);
+extern tree build_compound_expr (tree, tree);
+extern tree cp_build_compound_expr (tree, tree, tsubst_flags_t);
+extern tree build_static_cast (tree, tree, tsubst_flags_t);
+extern tree build_reinterpret_cast (tree, tree, tsubst_flags_t);
+extern tree build_const_cast (tree, tree, tsubst_flags_t);
+extern tree build_c_cast (tree, tree);
+extern tree cp_build_c_cast (tree, tree, tsubst_flags_t);
+extern tree build_x_modify_expr (tree, enum tree_code, tree,
+ tsubst_flags_t);
+extern tree cp_build_modify_expr (tree, enum tree_code, tree,
+ tsubst_flags_t);
+extern tree convert_for_initialization (tree, tree, tree, int,
+ const char *, tree, int,
+ tsubst_flags_t);
+extern int comp_ptr_ttypes (tree, tree);
+extern bool comp_ptr_ttypes_const (tree, tree);
+extern int ptr_reasonably_similar (const_tree, const_tree);
+extern tree build_ptrmemfunc (tree, tree, int, bool);
+extern int cp_type_quals (const_tree);
+extern bool cp_type_readonly (const_tree);
+extern bool cp_has_mutable_p (const_tree);
+extern bool at_least_as_qualified_p (const_tree, const_tree);
+extern void cp_apply_type_quals_to_decl (int, tree);
+extern tree build_ptrmemfunc1 (tree, tree, tree);
+extern void expand_ptrmemfunc_cst (tree, tree *, tree *);
+extern tree type_after_usual_arithmetic_conversions (tree, tree);
+extern tree common_pointer_type (tree, tree);
+extern tree composite_pointer_type (tree, tree, tree, tree,
+ const char*, tsubst_flags_t);
+extern tree merge_types (tree, tree);
+extern tree check_return_expr (tree, bool *);
+extern tree cp_build_binary_op (location_t,
+ enum tree_code, tree, tree,
+ tsubst_flags_t);
+#define cxx_sizeof(T) cxx_sizeof_or_alignof_type (T, SIZEOF_EXPR, true)
+extern tree build_ptrmemfunc_access_expr (tree, tree);
+extern tree build_address (tree);
+extern tree build_nop (tree, tree);
+extern tree non_reference (tree);
+extern tree lookup_anon_field (tree, tree);
+extern bool invalid_nonstatic_memfn_p (const_tree, tsubst_flags_t);
+extern tree convert_member_func_to_ptr (tree, tree);
+extern tree convert_ptrmem (tree, tree, bool, bool);
+extern int lvalue_or_else (tree, enum lvalue_use,
+ tsubst_flags_t);
+extern int lvalue_p (tree);
+
+/* in typeck2.c */
+extern void require_complete_eh_spec_types (tree, tree);
+extern void cxx_incomplete_type_diagnostic (const_tree, const_tree, diagnostic_t);
+#undef cxx_incomplete_type_error
+extern void cxx_incomplete_type_error (const_tree, const_tree);
+#define cxx_incomplete_type_error(V,T) \
+ (cxx_incomplete_type_diagnostic ((V), (T), DK_ERROR))
+extern tree error_not_base_type (tree, tree);
+extern tree binfo_or_else (tree, tree);
+extern void readonly_error (tree, const char *);
+extern void complete_type_check_abstract (tree);
+extern int abstract_virtuals_error (tree, tree);
+
+extern tree store_init_value (tree, tree);
+extern void check_narrowing (tree, tree);
+extern tree digest_init (tree, tree);
+extern tree build_scoped_ref (tree, tree, tree *);
+extern tree build_x_arrow (tree);
+extern tree build_m_component_ref (tree, tree);
+extern tree build_functional_cast (tree, tree, tsubst_flags_t);
+extern tree add_exception_specifier (tree, tree, int);
+extern tree merge_exception_specifiers (tree, tree);
+
+/* in mangle.c */
+extern void init_mangle (void);
+extern void mangle_decl (tree);
+extern const char *mangle_type_string (tree);
+extern tree mangle_typeinfo_for_type (tree);
+extern tree mangle_typeinfo_string_for_type (tree);
+extern tree mangle_vtbl_for_type (tree);
+extern tree mangle_vtt_for_type (tree);
+extern tree mangle_ctor_vtbl_for_type (tree, tree);
+extern tree mangle_thunk (tree, int, tree, tree);
+extern tree mangle_conv_op_name_for_type (tree);
+extern tree mangle_guard_variable (tree);
+extern tree mangle_ref_init_variable (tree);
+extern tree mangle_compound_literal (void);
+
+/* in dump.c */
+extern bool cp_dump_tree (void *, tree);
+
+/* In cp/cp-objcp-common.c. */
+
+extern alias_set_type cxx_get_alias_set (tree);
+extern bool cxx_warn_unused_global_decl (const_tree);
+extern tree cp_expr_size (const_tree);
+extern size_t cp_tree_size (enum tree_code);
+extern bool cp_var_mod_type_p (tree, tree);
+extern void cxx_initialize_diagnostics (struct diagnostic_context *);
+extern int cxx_types_compatible_p (tree, tree);
+extern void init_shadowed_var_for_decl (void);
+extern tree cxx_staticp (tree);
+
+/* LIPO support. */
+extern bool cp_is_compiler_generated_type (tree);
+extern void cp_clear_global_name_bindings (tree);
+extern bool
+cp_is_non_sharable_global_decl (tree, void *);
+extern void cp_lipo_dup_lang_type (tree, tree);
+extern void cp_lipo_copy_lang_type (tree, tree);
+extern int cp_get_lang_decl_size (tree);
+extern int cp_cmp_lang_type (tree, tree);
+extern void cp_add_built_in_decl (tree);
+extern void cp_save_built_in_decl_pre_parsing (void);
+extern void cp_restore_built_in_decl_pre_parsing (void);
+extern void cp_save_built_in_decl_post_parsing (void);
+extern void cp_restore_built_in_decl_post_parsing (void);
+
+
+/* in cp-gimplify.c */
+extern int cp_gimplify_expr (tree *, gimple_seq *,
+ gimple_seq *);
+extern void cp_genericize (tree);
+
+/* -- end of C++ */
+
+#endif /* ! GCC_CP_TREE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cxx-pretty-print.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cxx-pretty-print.h
new file mode 100644
index 0000000..e7c4220
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/cxx-pretty-print.h
@@ -0,0 +1,76 @@
+/* Interface for the GNU C++ pretty-printer.
+ Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
+ Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CXX_PRETTY_PRINT_H
+#define GCC_CXX_PRETTY_PRINT_H
+
+#include "c-pretty-print.h"
+
+#undef pp_c_base
+#define pp_c_base(PP) (&(PP)->c_base)
+
+typedef enum
+{
+ /* Ask for a qualified-id. */
+ pp_cxx_flag_default_argument = 1 << pp_c_flag_last_bit
+
+} cxx_pretty_printer_flags;
+
+typedef struct
+{
+ c_pretty_printer c_base;
+ /* This is the enclosing scope of the entity being pretty-printed. */
+ tree enclosing_scope;
+} cxx_pretty_printer;
+
+#define pp_cxx_cv_qualifier_seq(PP, T) \
+ pp_c_type_qualifier_list (pp_c_base (PP), T)
+
+#define pp_cxx_whitespace(PP) pp_c_whitespace (pp_c_base (PP))
+#define pp_cxx_left_paren(PP) pp_c_left_paren (pp_c_base (PP))
+#define pp_cxx_right_paren(PP) pp_c_right_paren (pp_c_base (PP))
+#define pp_cxx_left_brace(PP) pp_c_left_brace (pp_c_base (PP))
+#define pp_cxx_right_brace(PP) pp_c_right_brace (pp_c_base (PP))
+#define pp_cxx_left_bracket(PP) pp_c_left_bracket (pp_c_base (PP))
+#define pp_cxx_right_bracket(PP) pp_c_right_bracket (pp_c_base (PP))
+#define pp_cxx_dot(PP) pp_c_dot (pp_c_base (PP))
+#define pp_cxx_ampersand(PP) pp_c_ampersand (pp_c_base (PP))
+#define pp_cxx_star(PP) pp_c_star (pp_c_base (PP))
+#define pp_cxx_arrow(PP) pp_c_arrow (pp_c_base (PP))
+#define pp_cxx_semicolon(PP) pp_c_semicolon (pp_c_base (PP))
+#define pp_cxx_complement(PP) pp_c_complement (pp_c_base (PP))
+
+#define pp_cxx_identifier(PP, I) pp_c_identifier (pp_c_base (PP), I)
+#define pp_cxx_tree_identifier(PP, T) \
+ pp_c_tree_identifier (pp_c_base (PP), T)
+
+void pp_cxx_pretty_printer_init (cxx_pretty_printer *);
+void pp_cxx_begin_template_argument_list (cxx_pretty_printer *);
+void pp_cxx_end_template_argument_list (cxx_pretty_printer *);
+void pp_cxx_colon_colon (cxx_pretty_printer *);
+void pp_cxx_separate_with (cxx_pretty_printer *, int);
+
+void pp_cxx_declaration (cxx_pretty_printer *, tree);
+void pp_cxx_canonical_template_parameter (cxx_pretty_printer *, tree);
+void pp_cxx_trait_expression (cxx_pretty_printer *, tree);
+void pp_cxx_va_arg_expression (cxx_pretty_printer *, tree);
+void pp_cxx_offsetof_expression (cxx_pretty_printer *, tree);
+
+#endif /* GCC_CXX_PRETTY_PRINT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/name-lookup.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/name-lookup.h
new file mode 100644
index 0000000..3e3a33f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cp/name-lookup.h
@@ -0,0 +1,370 @@
+/* Declarations for C++ name lookup routines.
+ Copyright (C) 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_CP_NAME_LOOKUP_H
+#define GCC_CP_NAME_LOOKUP_H
+
+#include "c-common.h"
+
+/* The type of dictionary used to map names to types declared at
+ a given scope. */
+typedef struct binding_table_s *binding_table;
+typedef struct binding_entry_s *binding_entry;
+
+/* The type of a routine repeatedly called by binding_table_foreach. */
+typedef void (*bt_foreach_proc) (binding_entry, void *);
+
+struct binding_entry_s GTY(())
+{
+ binding_entry chain;
+ tree name;
+ tree type;
+};
+
+/* These macros indicate the initial chains count for binding_table. */
+#define SCOPE_DEFAULT_HT_SIZE (1 << 3)
+#define CLASS_SCOPE_HT_SIZE (1 << 3)
+#define NAMESPACE_ORDINARY_HT_SIZE (1 << 5)
+#define NAMESPACE_STD_HT_SIZE (1 << 8)
+#define GLOBAL_SCOPE_HT_SIZE (1 << 8)
+
+extern void binding_table_foreach (binding_table, bt_foreach_proc, void *);
+extern binding_entry binding_table_find (binding_table, tree);
+
+/* Datatype that represents binding established by a declaration between
+ a name and a C++ entity. */
+typedef struct cxx_binding cxx_binding;
+
+/* The datatype used to implement C++ scope. */
+typedef struct cp_binding_level cxx_scope;
+
+/* Nonzero if this binding is for a local scope, as opposed to a class
+ or namespace scope. */
+#define LOCAL_BINDING_P(NODE) ((NODE)->is_local)
+
+/* True if NODE->value is from a base class of the class which is
+ currently being defined. */
+#define INHERITED_VALUE_BINDING_P(NODE) ((NODE)->value_is_inherited)
+
+struct cxx_binding GTY(())
+{
+ /* Link to chain together various bindings for this name. */
+ cxx_binding *previous;
+ /* The non-type entity this name is bound to. */
+ tree value;
+ /* The type entity this name is bound to. */
+ tree type;
+ /* The scope at which this binding was made. */
+ cxx_scope *scope;
+ unsigned value_is_inherited : 1;
+ unsigned is_local : 1;
+};
+
+/* Datatype used to temporarily save C++ bindings (for implicit
+ instantiations purposes and like). Implemented in decl.c. */
+typedef struct cxx_saved_binding GTY(())
+{
+ /* The name of the current binding. */
+ tree identifier;
+ /* The binding we're saving. */
+ cxx_binding *binding;
+ tree real_type_value;
+} cxx_saved_binding;
+
+DEF_VEC_O(cxx_saved_binding);
+DEF_VEC_ALLOC_O(cxx_saved_binding,gc);
+
+extern tree identifier_type_value (tree);
+extern void set_identifier_type_value (tree, tree);
+extern void pop_binding (tree, tree);
+extern void pop_global_binding (tree, cxx_binding*);
+extern tree constructor_name (tree);
+extern bool constructor_name_p (tree, tree);
+
+/* The kinds of scopes we recognize. */
+typedef enum scope_kind {
+ sk_block = 0, /* An ordinary block scope. This enumerator must
+ have the value zero because "cp_binding_level"
+ is initialized by using "memset" to set the
+ contents to zero, and the default scope kind
+ is "sk_block". */
+ sk_cleanup, /* A scope for (pseudo-)scope for cleanup. It is
+ pseudo in that it is transparent to name lookup
+ activities. */
+ sk_try, /* A try-block. */
+ sk_catch, /* A catch-block. */
+ sk_for, /* The scope of the variable declared in a
+ for-init-statement. */
+ sk_function_parms, /* The scope containing function parameters. */
+ sk_class, /* The scope containing the members of a class. */
+ sk_scoped_enum, /* The scope containing the enumertors of a C++0x
+ scoped enumeration. */
+ sk_namespace, /* The scope containing the members of a
+ namespace, including the global scope. */
+ sk_template_parms, /* A scope for template parameters. */
+ sk_template_spec, /* Like sk_template_parms, but for an explicit
+ specialization. Since, by definition, an
+ explicit specialization is introduced by
+ "template <>", this scope is always empty. */
+ sk_omp /* An OpenMP structured block. */
+} scope_kind;
+
+/* The scope where the class/struct/union/enum tag applies. */
+typedef enum tag_scope {
+ ts_current = 0, /* Current scope only. This is for the
+ class-key identifier;
+ case mentioned in [basic.lookup.elab]/2,
+ or the class/enum definition
+ class-key identifier { ... }; */
+ ts_global = 1, /* All scopes. This is the 3.4.1
+ [basic.lookup.unqual] lookup mentioned
+ in [basic.lookup.elab]/2. */
+ ts_within_enclosing_non_class = 2 /* Search within enclosing non-class
+ only, for friend class lookup
+ according to [namespace.memdef]/3
+ and [class.friend]/9. */
+} tag_scope;
+
+typedef struct cp_class_binding GTY(())
+{
+ cxx_binding base;
+ /* The bound name. */
+ tree identifier;
+} cp_class_binding;
+
+DEF_VEC_O(cp_class_binding);
+DEF_VEC_ALLOC_O(cp_class_binding,gc);
+
+/* For each binding contour we allocate a binding_level structure
+ which records the names defined in that contour.
+ Contours include:
+ 0) the global one
+ 1) one for each function definition,
+ where internal declarations of the parameters appear.
+ 2) one for each compound statement,
+ to record its declarations.
+
+ The current meaning of a name can be found by searching the levels
+ from the current one out to the global one.
+
+ Off to the side, may be the class_binding_level. This exists only
+ to catch class-local declarations. It is otherwise nonexistent.
+
+ Also there may be binding levels that catch cleanups that must be
+ run when exceptions occur. Thus, to see whether a name is bound in
+ the current scope, it is not enough to look in the
+ CURRENT_BINDING_LEVEL. You should use lookup_name_current_level
+ instead. */
+
+/* Note that the information in the `names' component of the global contour
+ is duplicated in the IDENTIFIER_GLOBAL_VALUEs of all identifiers. */
+
+struct cp_binding_level GTY(())
+ {
+ /* A chain of _DECL nodes for all variables, constants, functions,
+ and typedef types. These are in the reverse of the order
+ supplied. There may be OVERLOADs on this list, too, but they
+ are wrapped in TREE_LISTs; the TREE_VALUE is the OVERLOAD. */
+ tree names;
+
+ /* Count of elements in names chain. */
+ size_t names_size;
+
+ /* A chain of NAMESPACE_DECL nodes. */
+ tree namespaces;
+
+ /* An array of static functions and variables (for namespaces only) */
+ VEC(tree,gc) *static_decls;
+
+ /* A list of USING_DECL nodes. */
+ tree usings;
+
+ /* A list of used namespaces. PURPOSE is the namespace,
+ VALUE the common ancestor with this binding_level's namespace. */
+ tree using_directives;
+
+ /* For the binding level corresponding to a class, the entities
+ declared in the class or its base classes. */
+ VEC(cp_class_binding,gc) *class_shadowed;
+
+ /* Similar to class_shadowed, but for IDENTIFIER_TYPE_VALUE, and
+ is used for all binding levels. The TREE_PURPOSE is the name of
+ the entity, the TREE_TYPE is the associated type. In addition
+ the TREE_VALUE is the IDENTIFIER_TYPE_VALUE before we entered
+ the class. */
+ tree type_shadowed;
+
+ /* A TREE_LIST. Each TREE_VALUE is the LABEL_DECL for a local
+ label in this scope. The TREE_PURPOSE is the previous value of
+ the IDENTIFIER_LABEL VALUE. */
+ tree shadowed_labels;
+
+ /* For each level (except not the global one),
+ a chain of BLOCK nodes for all the levels
+ that were entered and exited one level down. */
+ tree blocks;
+
+ /* The entity (namespace, class, function) the scope of which this
+ binding contour corresponds to. Otherwise NULL. */
+ tree this_entity;
+
+ /* The binding level which this one is contained in (inherits from). */
+ struct cp_binding_level *level_chain;
+
+ /* List of VAR_DECLS saved from a previous for statement.
+ These would be dead in ISO-conforming code, but might
+ be referenced in ARM-era code. These are stored in a
+ TREE_LIST; the TREE_VALUE is the actual declaration. */
+ tree dead_vars_from_for;
+
+ /* STATEMENT_LIST for statements in this binding contour.
+ Only used at present for SK_CLEANUP temporary bindings. */
+ tree statement_list;
+
+ /* Binding depth at which this level began. */
+ int binding_depth;
+
+ /* The kind of scope that this object represents. However, a
+ SK_TEMPLATE_SPEC scope is represented with KIND set to
+ SK_TEMPLATE_PARMS and EXPLICIT_SPEC_P set to true. */
+ ENUM_BITFIELD (scope_kind) kind : 4;
+
+ /* True if this scope is an SK_TEMPLATE_SPEC scope. This field is
+ only valid if KIND == SK_TEMPLATE_PARMS. */
+ BOOL_BITFIELD explicit_spec_p : 1;
+
+ /* true means make a BLOCK for this level regardless of all else. */
+ unsigned keep : 1;
+
+ /* Nonzero if this level can safely have additional
+ cleanup-needing variables added to it. */
+ unsigned more_cleanups_ok : 1;
+ unsigned have_cleanups : 1;
+
+ /* 24 bits left to fill a 32-bit word. */
+ };
+
+/* The binding level currently in effect. */
+
+#define current_binding_level \
+ (*(cfun && cp_function_chain->bindings \
+ ? &cp_function_chain->bindings \
+ : &scope_chain->bindings))
+
+/* The binding level of the current class, if any. */
+
+#define class_binding_level scope_chain->class_bindings
+
+/* The tree node representing the global scope. */
+extern GTY(()) tree global_namespace;
+extern GTY(()) tree global_scope_name;
+
+/* Indicates that there is a type value in some namespace, although
+ that is not necessarily in scope at the moment. */
+
+extern GTY(()) tree global_type_node;
+
+/* True if SCOPE designates the global scope binding contour. */
+#define global_scope_p(SCOPE) \
+ ((SCOPE) == NAMESPACE_LEVEL (global_namespace))
+
+extern cxx_scope *leave_scope (void);
+extern bool kept_level_p (void);
+extern int global_bindings_p (void);
+extern bool toplevel_bindings_p (void);
+extern bool namespace_bindings_p (void);
+extern bool template_parm_scope_p (void);
+extern scope_kind innermost_scope_kind (void);
+extern cxx_scope *begin_scope (scope_kind, tree);
+extern void print_binding_stack (void);
+extern void push_to_top_level (void);
+extern void pop_from_top_level (void);
+extern void pop_everything (void);
+extern void keep_next_level (bool);
+extern bool is_ancestor (tree, tree);
+extern tree push_scope (tree);
+extern void pop_scope (tree);
+extern tree push_inner_scope (tree);
+extern void pop_inner_scope (tree, tree);
+extern void push_binding_level (struct cp_binding_level *);
+
+extern void push_namespace (tree);
+extern void pop_namespace (void);
+extern void push_nested_namespace (tree);
+extern void pop_nested_namespace (tree);
+extern bool handle_namespace_attrs (tree, tree);
+extern void pushlevel_class (void);
+extern void poplevel_class (void);
+extern tree pushdecl_with_scope (tree, cxx_scope *, bool);
+extern tree lookup_name_prefer_type (tree, int);
+extern tree lookup_name_real (tree, int, int, bool, int, int);
+extern tree lookup_type_scope (tree, tag_scope);
+extern tree namespace_binding (tree, tree);
+extern void set_namespace_binding (tree, tree, tree);
+extern bool hidden_name_p (tree);
+extern tree remove_hidden_names (tree);
+extern tree lookup_qualified_name (tree, tree, bool, bool);
+extern tree lookup_name_nonclass (tree);
+extern tree lookup_name_innermost_nonclass_level (tree);
+extern tree lookup_function_nonclass (tree, tree, bool);
+extern void push_local_binding (tree, tree, int);
+extern bool pushdecl_class_level (tree);
+extern tree pushdecl_namespace_level (tree, bool);
+extern bool push_class_level_binding (tree, tree);
+extern tree getdecls (void);
+extern tree cp_namespace_decls (tree);
+extern void set_decl_namespace (tree, tree, bool);
+extern void push_decl_namespace (tree);
+extern void pop_decl_namespace (void);
+extern void do_namespace_alias (tree, tree);
+extern void do_toplevel_using_decl (tree, tree, tree);
+extern void do_local_using_decl (tree, tree, tree);
+extern tree do_class_using_decl (tree, tree);
+extern void do_using_directive (tree);
+extern tree lookup_arg_dependent (tree, tree, tree);
+extern bool is_associated_namespace (tree, tree);
+extern void parse_using_directive (tree, tree);
+extern tree innermost_non_namespace_value (tree);
+extern cxx_binding *outer_binding (tree, cxx_binding *, bool);
+extern void cp_emit_debug_info_for_using (tree, tree);
+
+/* Set *DECL to the (non-hidden) declaration for ID at global scope,
+ if present and return true; otherwise return false. */
+
+static inline bool
+get_global_value_if_present (tree id, tree *decl)
+{
+ tree global_value = namespace_binding (id, global_namespace);
+ if (global_value)
+ *decl = global_value;
+ return global_value != NULL;
+}
+
+/* True is the binding of IDENTIFIER at global scope names a type. */
+
+static inline bool
+is_typename_at_global_scope (tree id)
+{
+ tree global_value = namespace_binding (id, global_namespace);
+
+ return global_value && TREE_CODE (global_value) == TYPE_DECL;
+}
+
+#endif /* GCC_CP_NAME_LOOKUP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cpplib.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cpplib.h
new file mode 100644
index 0000000..a0ffe0b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/cpplib.h
@@ -0,0 +1,950 @@
+/* Definitions for CPP library.
+ Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+ 2004, 2005, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Written by Per Bothner, 1994-95.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>.
+
+ In other words, you are welcome to use, share and improve this program.
+ You are forbidden to forbid anyone else to use, share and improve
+ what you give them. Help stamp out software-hoarding! */
+#ifndef LIBCPP_CPPLIB_H
+#define LIBCPP_CPPLIB_H
+
+#include <sys/types.h>
+#include "symtab.h"
+#include "line-map.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct cpp_reader cpp_reader;
+typedef struct cpp_buffer cpp_buffer;
+typedef struct cpp_options cpp_options;
+typedef struct cpp_token cpp_token;
+typedef struct cpp_string cpp_string;
+typedef struct cpp_hashnode cpp_hashnode;
+typedef struct cpp_macro cpp_macro;
+typedef struct cpp_callbacks cpp_callbacks;
+typedef struct cpp_dir cpp_dir;
+
+struct answer;
+struct _cpp_file;
+
+/* The first three groups, apart from '=', can appear in preprocessor
+ expressions (+= and -= are used to indicate unary + and - resp.).
+ This allows a lookup table to be implemented in _cpp_parse_expr.
+
+ The first group, to CPP_LAST_EQ, can be immediately followed by an
+ '='. The lexer needs operators ending in '=', like ">>=", to be in
+ the same order as their counterparts without the '=', like ">>".
+
+ See the cpp_operator table optab in expr.c if you change the order or
+ add or remove anything in the first group. */
+
+#define TTYPE_TABLE \
+ OP(EQ, "=") \
+ OP(NOT, "!") \
+ OP(GREATER, ">") /* compare */ \
+ OP(LESS, "<") \
+ OP(PLUS, "+") /* math */ \
+ OP(MINUS, "-") \
+ OP(MULT, "*") \
+ OP(DIV, "/") \
+ OP(MOD, "%") \
+ OP(AND, "&") /* bit ops */ \
+ OP(OR, "|") \
+ OP(XOR, "^") \
+ OP(RSHIFT, ">>") \
+ OP(LSHIFT, "<<") \
+ \
+ OP(COMPL, "~") \
+ OP(AND_AND, "&&") /* logical */ \
+ OP(OR_OR, "||") \
+ OP(QUERY, "?") \
+ OP(COLON, ":") \
+ OP(COMMA, ",") /* grouping */ \
+ OP(OPEN_PAREN, "(") \
+ OP(CLOSE_PAREN, ")") \
+ TK(EOF, NONE) \
+ OP(EQ_EQ, "==") /* compare */ \
+ OP(NOT_EQ, "!=") \
+ OP(GREATER_EQ, ">=") \
+ OP(LESS_EQ, "<=") \
+ \
+ /* These two are unary + / - in preprocessor expressions. */ \
+ OP(PLUS_EQ, "+=") /* math */ \
+ OP(MINUS_EQ, "-=") \
+ \
+ OP(MULT_EQ, "*=") \
+ OP(DIV_EQ, "/=") \
+ OP(MOD_EQ, "%=") \
+ OP(AND_EQ, "&=") /* bit ops */ \
+ OP(OR_EQ, "|=") \
+ OP(XOR_EQ, "^=") \
+ OP(RSHIFT_EQ, ">>=") \
+ OP(LSHIFT_EQ, "<<=") \
+ /* Digraphs together, beginning with CPP_FIRST_DIGRAPH. */ \
+ OP(HASH, "#") /* digraphs */ \
+ OP(PASTE, "##") \
+ OP(OPEN_SQUARE, "[") \
+ OP(CLOSE_SQUARE, "]") \
+ OP(OPEN_BRACE, "{") \
+ OP(CLOSE_BRACE, "}") \
+ /* The remainder of the punctuation. Order is not significant. */ \
+ OP(SEMICOLON, ";") /* structure */ \
+ OP(ELLIPSIS, "...") \
+ OP(PLUS_PLUS, "++") /* increment */ \
+ OP(MINUS_MINUS, "--") \
+ OP(DEREF, "->") /* accessors */ \
+ OP(DOT, ".") \
+ OP(SCOPE, "::") \
+ OP(DEREF_STAR, "->*") \
+ OP(DOT_STAR, ".*") \
+ OP(ATSIGN, "@") /* used in Objective-C */ \
+ \
+ TK(NAME, IDENT) /* word */ \
+ TK(AT_NAME, IDENT) /* @word - Objective-C */ \
+ TK(NUMBER, LITERAL) /* 34_be+ta */ \
+ \
+ TK(CHAR, LITERAL) /* 'char' */ \
+ TK(WCHAR, LITERAL) /* L'char' */ \
+ TK(CHAR16, LITERAL) /* u'char' */ \
+ TK(CHAR32, LITERAL) /* U'char' */ \
+ TK(OTHER, LITERAL) /* stray punctuation */ \
+ \
+ TK(STRING, LITERAL) /* "string" */ \
+ TK(WSTRING, LITERAL) /* L"string" */ \
+ TK(STRING16, LITERAL) /* u"string" */ \
+ TK(STRING32, LITERAL) /* U"string" */ \
+ TK(OBJC_STRING, LITERAL) /* @"string" - Objective-C */ \
+ TK(HEADER_NAME, LITERAL) /* <stdio.h> in #include */ \
+ \
+ TK(COMMENT, LITERAL) /* Only if output comments. */ \
+ /* SPELL_LITERAL happens to DTRT. */ \
+ TK(MACRO_ARG, NONE) /* Macro argument. */ \
+ TK(PRAGMA, NONE) /* Only for deferred pragmas. */ \
+ TK(PRAGMA_EOL, NONE) /* End-of-line for deferred pragmas. */ \
+ TK(PADDING, NONE) /* Whitespace for -E. */
+
+#define OP(e, s) CPP_ ## e,
+#define TK(e, s) CPP_ ## e,
+enum cpp_ttype
+{
+ TTYPE_TABLE
+ N_TTYPES,
+
+ /* Positions in the table. */
+ CPP_LAST_EQ = CPP_LSHIFT,
+ CPP_FIRST_DIGRAPH = CPP_HASH,
+ CPP_LAST_PUNCTUATOR= CPP_ATSIGN,
+ CPP_LAST_CPP_OP = CPP_LESS_EQ
+};
+#undef OP
+#undef TK
+
+/* C language kind, used when calling cpp_create_reader. */
+enum c_lang {CLK_GNUC89 = 0, CLK_GNUC99, CLK_STDC89, CLK_STDC94, CLK_STDC99,
+ CLK_GNUCXX, CLK_CXX98, CLK_GNUCXX0X, CLK_CXX0X, CLK_ASM};
+
+/* Payload of a NUMBER, STRING, CHAR or COMMENT token. */
+struct cpp_string GTY(())
+{
+ unsigned int len;
+ const unsigned char *text;
+};
+
+/* Flags for the cpp_token structure. */
+#define PREV_WHITE (1 << 0) /* If whitespace before this token. */
+#define DIGRAPH (1 << 1) /* If it was a digraph. */
+#define STRINGIFY_ARG (1 << 2) /* If macro argument to be stringified. */
+#define PASTE_LEFT (1 << 3) /* If on LHS of a ## operator. */
+#define NAMED_OP (1 << 4) /* C++ named operators. */
+#define NO_EXPAND (1 << 5) /* Do not macro-expand this token. */
+#define BOL (1 << 6) /* Token at beginning of line. */
+#define PURE_ZERO (1 << 7) /* Single 0 digit, used by the C++ frontend,
+ set in c-lex.c. */
+
+/* Specify which field, if any, of the cpp_token union is used. */
+
+enum cpp_token_fld_kind {
+ CPP_TOKEN_FLD_NODE,
+ CPP_TOKEN_FLD_SOURCE,
+ CPP_TOKEN_FLD_STR,
+ CPP_TOKEN_FLD_ARG_NO,
+ CPP_TOKEN_FLD_PRAGMA,
+ CPP_TOKEN_FLD_NONE
+};
+
+/* A preprocessing token. This has been carefully packed and should
+ occupy 16 bytes on 32-bit hosts and 24 bytes on 64-bit hosts. */
+struct cpp_token GTY(())
+{
+ source_location src_loc; /* Location of first char of token. */
+ ENUM_BITFIELD(cpp_ttype) type : CHAR_BIT; /* token type */
+ unsigned char flags; /* flags - see above */
+
+ union cpp_token_u
+ {
+ /* An identifier. */
+ cpp_hashnode *
+ GTY ((nested_ptr (union tree_node,
+ "%h ? CPP_HASHNODE (GCC_IDENT_TO_HT_IDENT (%h)) : NULL",
+ "%h ? HT_IDENT_TO_GCC_IDENT (HT_NODE (%h)) : NULL"),
+ tag ("CPP_TOKEN_FLD_NODE")))
+ node;
+
+ /* Inherit padding from this token. */
+ cpp_token * GTY ((tag ("CPP_TOKEN_FLD_SOURCE"))) source;
+
+ /* A string, or number. */
+ struct cpp_string GTY ((tag ("CPP_TOKEN_FLD_STR"))) str;
+
+ /* Argument no. for a CPP_MACRO_ARG. */
+ unsigned int GTY ((tag ("CPP_TOKEN_FLD_ARG_NO"))) arg_no;
+
+ /* Caller-supplied identifier for a CPP_PRAGMA. */
+ unsigned int GTY ((tag ("CPP_TOKEN_FLD_PRAGMA"))) pragma;
+ } GTY ((desc ("cpp_token_val_index (&%1)"))) val;
+};
+
+/* Say which field is in use. */
+extern enum cpp_token_fld_kind cpp_token_val_index (cpp_token *tok);
+
+/* A type wide enough to hold any multibyte source character.
+ cpplib's character constant interpreter requires an unsigned type.
+ Also, a typedef for the signed equivalent.
+ The width of this type is capped at 32 bits; there do exist targets
+ where wchar_t is 64 bits, but only in a non-default mode, and there
+ would be no meaningful interpretation for a wchar_t value greater
+ than 2^32 anyway -- the widest wide-character encoding around is
+ ISO 10646, which stops at 2^31. */
+#if CHAR_BIT * SIZEOF_INT >= 32
+# define CPPCHAR_SIGNED_T int
+#elif CHAR_BIT * SIZEOF_LONG >= 32
+# define CPPCHAR_SIGNED_T long
+#else
+# error "Cannot find a least-32-bit signed integer type"
+#endif
+typedef unsigned CPPCHAR_SIGNED_T cppchar_t;
+typedef CPPCHAR_SIGNED_T cppchar_signed_t;
+
+/* Style of header dependencies to generate. */
+enum cpp_deps_style { DEPS_NONE = 0, DEPS_USER, DEPS_SYSTEM };
+
+/* The possible normalization levels, from most restrictive to least. */
+enum cpp_normalize_level {
+ /* In NFKC. */
+ normalized_KC = 0,
+ /* In NFC. */
+ normalized_C,
+ /* In NFC, except for subsequences where being in NFC would make
+ the identifier invalid. */
+ normalized_identifier_C,
+ /* Not normalized at all. */
+ normalized_none
+};
+
+/* This structure is nested inside struct cpp_reader, and
+ carries all the options visible to the command line. */
+struct cpp_options
+{
+ /* Characters between tab stops. */
+ unsigned int tabstop;
+
+ /* The language we're preprocessing. */
+ enum c_lang lang;
+
+ /* Nonzero means use extra default include directories for C++. */
+ unsigned char cplusplus;
+
+ /* Nonzero means handle cplusplus style comments. */
+ unsigned char cplusplus_comments;
+
+ /* Nonzero means define __OBJC__, treat @ as a special token, use
+ the OBJC[PLUS]_INCLUDE_PATH environment variable, and allow
+ "#import". */
+ unsigned char objc;
+
+ /* Nonzero means don't copy comments into the output file. */
+ unsigned char discard_comments;
+
+ /* Nonzero means don't copy comments into the output file during
+ macro expansion. */
+ unsigned char discard_comments_in_macro_exp;
+
+ /* Nonzero means process the ISO trigraph sequences. */
+ unsigned char trigraphs;
+
+ /* Nonzero means process the ISO digraph sequences. */
+ unsigned char digraphs;
+
+ /* Nonzero means to allow hexadecimal floats and LL suffixes. */
+ unsigned char extended_numbers;
+
+ /* Nonzero means process u/U prefix literals (UTF-16/32). */
+ unsigned char uliterals;
+
+ /* Nonzero means print names of header files (-H). */
+ unsigned char print_include_names;
+
+ /* Nonzero means cpp_pedwarn causes a hard error. */
+ unsigned char pedantic_errors;
+
+ /* Nonzero means don't print warning messages. */
+ unsigned char inhibit_warnings;
+
+ /* Nonzero means complain about deprecated features. */
+ unsigned char warn_deprecated;
+
+ /* Nonzero means don't suppress warnings from system headers. */
+ unsigned char warn_system_headers;
+
+ /* Nonzero means don't print error messages. Has no option to
+ select it, but can be set by a user of cpplib (e.g. fix-header). */
+ unsigned char inhibit_errors;
+
+ /* Nonzero means warn if slash-star appears in a comment. */
+ unsigned char warn_comments;
+
+ /* Nonzero means warn if a user-supplied include directory does not
+ exist. */
+ unsigned char warn_missing_include_dirs;
+
+ /* Nonzero means warn if there are any trigraphs. */
+ unsigned char warn_trigraphs;
+
+ /* Nonzero means warn about multicharacter charconsts. */
+ unsigned char warn_multichar;
+
+ /* Nonzero means warn about various incompatibilities with
+ traditional C. */
+ unsigned char warn_traditional;
+
+ /* Nonzero means warn about long long numeric constants. */
+ unsigned char warn_long_long;
+
+ /* Nonzero means warn about text after an #endif (or #else). */
+ unsigned char warn_endif_labels;
+
+ /* Nonzero means warn about implicit sign changes owing to integer
+ promotions. */
+ unsigned char warn_num_sign_change;
+
+ /* Zero means don't warn about __VA_ARGS__ usage in c89 pedantic mode.
+ Presumably the usage is protected by the appropriate #ifdef. */
+ unsigned char warn_variadic_macros;
+
+ /* Nonzero means warn about builtin macros that are redefined or
+ explicitly undefined. */
+ unsigned char warn_builtin_macro_redefined;
+
+ /* Nonzero means turn warnings into errors. */
+ unsigned char warnings_are_errors;
+
+ /* Nonzero means we should look for header.gcc files that remap file
+ names. */
+ unsigned char remap;
+
+ /* Zero means dollar signs are punctuation. */
+ unsigned char dollars_in_ident;
+
+ /* Nonzero means UCNs are accepted in identifiers. */
+ unsigned char extended_identifiers;
+
+ /* True if we should warn about dollars in identifiers or numbers
+ for this translation unit. */
+ unsigned char warn_dollars;
+
+ /* Nonzero means warn if undefined identifiers are evaluated in an #if. */
+ unsigned char warn_undef;
+
+ /* Nonzero means warn of unused macros from the main file. */
+ unsigned char warn_unused_macros;
+
+ /* Nonzero for the 1999 C Standard, including corrigenda and amendments. */
+ unsigned char c99;
+
+ /* Nonzero if we are conforming to a specific C or C++ standard. */
+ unsigned char std;
+
+ /* Nonzero means give all the error messages the ANSI standard requires. */
+ unsigned char pedantic;
+
+ /* Nonzero means we're looking at already preprocessed code, so don't
+ bother trying to do macro expansion and whatnot. */
+ unsigned char preprocessed;
+
+ /* Print column number in error messages. */
+ unsigned char show_column;
+
+ /* Nonzero means handle C++ alternate operator names. */
+ unsigned char operator_names;
+
+ /* True for traditional preprocessing. */
+ unsigned char traditional;
+
+ /* Holds the name of the target (execution) character set. */
+ const char *narrow_charset;
+
+ /* Holds the name of the target wide character set. */
+ const char *wide_charset;
+
+ /* Holds the name of the input character set. */
+ const char *input_charset;
+
+ /* The minimum permitted level of normalization before a warning
+ is generated. */
+ enum cpp_normalize_level warn_normalize;
+
+ /* True to warn about precompiled header files we couldn't use. */
+ bool warn_invalid_pch;
+
+ /* True if dependencies should be restored from a precompiled header. */
+ bool restore_pch_deps;
+
+ /* Dependency generation. */
+ struct
+ {
+ /* Style of header dependencies to generate. */
+ enum cpp_deps_style style;
+
+ /* Assume missing files are generated files. */
+ bool missing_files;
+
+ /* Generate phony targets for each dependency apart from the first
+ one. */
+ bool phony_targets;
+
+ /* If true, no dependency is generated on the main file. */
+ bool ignore_main_file;
+
+ /* If true, intend to use the preprocessor output (e.g., for compilation)
+ in addition to the dependency info. */
+ bool need_preprocessor_output;
+ } deps;
+
+ /* Target-specific features set by the front end or client. */
+
+ /* Precision for target CPP arithmetic, target characters, target
+ ints and target wide characters, respectively. */
+ size_t precision, char_precision, int_precision, wchar_precision;
+
+ /* True means chars (wide chars) are unsigned. */
+ bool unsigned_char, unsigned_wchar;
+
+ /* True if the most significant byte in a word has the lowest
+ address in memory. */
+ bool bytes_big_endian;
+
+ /* Nonzero means __STDC__ should have the value 0 in system headers. */
+ unsigned char stdc_0_in_system_headers;
+
+ /* True means error callback should be used for diagnostics. */
+ bool client_diagnostic;
+
+ /* True disables tokenization outside of preprocessing directives. */
+ bool directives_only;
+};
+
+/* Callback for header lookup for HEADER, which is the name of a
+ source file. It is used as a method of last resort to find headers
+ that are not otherwise found during the normal include processing.
+ The return value is the malloced name of a header to try and open,
+ if any, or NULL otherwise. This callback is called only if the
+ header is otherwise unfound. */
+typedef const char *(*missing_header_cb)(cpp_reader *, const char *header, cpp_dir **);
+
+/* Call backs to cpplib client. */
+struct cpp_callbacks
+{
+ /* Called when a new line of preprocessed output is started. */
+ void (*line_change) (cpp_reader *, const cpp_token *, int);
+
+ /* Called when switching to/from a new file.
+ The line_map is for the new file. It is NULL if there is no new file.
+ (In C this happens when done with <built-in>+<command line> and also
+ when done with a main file.) This can be used for resource cleanup. */
+ void (*file_change) (cpp_reader *, const struct line_map *);
+
+ void (*dir_change) (cpp_reader *, const char *);
+ void (*include) (cpp_reader *, unsigned int, const unsigned char *,
+ const char *, int, const cpp_token **);
+ void (*define) (cpp_reader *, unsigned int, cpp_hashnode *);
+ void (*undef) (cpp_reader *, unsigned int, cpp_hashnode *);
+ void (*ident) (cpp_reader *, unsigned int, const cpp_string *);
+ void (*def_pragma) (cpp_reader *, unsigned int);
+ int (*valid_pch) (cpp_reader *, const char *, int);
+ void (*read_pch) (cpp_reader *, const char *, int, const char *);
+ missing_header_cb missing_header;
+
+ /* Context-sensitive macro support. Returns macro (if any) that should
+ be expanded. */
+ cpp_hashnode * (*macro_to_expand) (cpp_reader *, const cpp_token *);
+
+ /* Called to emit a diagnostic if client_diagnostic option is true.
+ This callback receives the translated message. */
+ void (*error) (cpp_reader *, int, const char *, va_list *)
+ ATTRIBUTE_FPTR_PRINTF(3,0);
+
+ /* Callbacks for when a macro is expanded, or tested (whether
+ defined or not at the time) in #ifdef, #ifndef or "defined". */
+ void (*used_define) (cpp_reader *, unsigned int, cpp_hashnode *);
+ void (*used_undef) (cpp_reader *, unsigned int, cpp_hashnode *);
+ /* Called before #define and #undef or other macro definition
+ changes are processed. */
+ void (*before_define) (cpp_reader *);
+};
+
+/* Chain of directories to look for include files in. */
+struct cpp_dir
+{
+ /* NULL-terminated singly-linked list. */
+ struct cpp_dir *next;
+
+ /* NAME of the directory, NUL-terminated. */
+ char *name;
+ unsigned int len;
+
+ /* One if a system header, two if a system header that has extern
+ "C" guards for C++. */
+ unsigned char sysp;
+
+ /* Is this a user-supplied directory? */
+ bool user_supplied_p;
+
+ /* The canonicalized NAME as determined by lrealpath. This field
+ is only used by hosts that lack reliable inode numbers. */
+ char *canonical_name;
+
+ /* Mapping of file names for this directory for MS-DOS and related
+ platforms. A NULL-terminated array of (from, to) pairs. */
+ const char **name_map;
+
+ /* Routine to construct pathname, given the search path name and the
+ HEADER we are trying to find, return a constructed pathname to
+ try and open. If this is NULL, the constructed pathname is as
+ constructed by append_file_to_dir. */
+ char *(*construct) (const char *header, cpp_dir *dir);
+
+ /* The C front end uses these to recognize duplicated
+ directories in the search path. */
+ ino_t ino;
+ dev_t dev;
+};
+
+/* Name under which this program was invoked. */
+extern const char *progname;
+
+/* The structure of a node in the hash table. The hash table has
+ entries for all identifiers: either macros defined by #define
+ commands (type NT_MACRO), assertions created with #assert
+ (NT_ASSERTION), or neither of the above (NT_VOID). Builtin macros
+ like __LINE__ are flagged NODE_BUILTIN. Poisoned identifiers are
+ flagged NODE_POISONED. NODE_OPERATOR (C++ only) indicates an
+ identifier that behaves like an operator such as "xor".
+ NODE_DIAGNOSTIC is for speed in lex_token: it indicates a
+ diagnostic may be required for this node. Currently this only
+ applies to __VA_ARGS__ and poisoned identifiers. */
+
+/* Hash node flags. */
+#define NODE_OPERATOR (1 << 0) /* C++ named operator. */
+#define NODE_POISONED (1 << 1) /* Poisoned identifier. */
+#define NODE_BUILTIN (1 << 2) /* Builtin macro. */
+#define NODE_DIAGNOSTIC (1 << 3) /* Possible diagnostic when lexed. */
+#define NODE_WARN (1 << 4) /* Warn if redefined or undefined. */
+#define NODE_DISABLED (1 << 5) /* A disabled macro. */
+#define NODE_MACRO_ARG (1 << 6) /* Used during #define processing. */
+#define NODE_USED (1 << 7) /* Dumped with -dU. */
+#define NODE_CONDITIONAL (1 << 8) /* Conditional macro */
+
+/* Different flavors of hash node. */
+enum node_type
+{
+ NT_VOID = 0, /* No definition yet. */
+ NT_MACRO, /* A macro of some form. */
+ NT_ASSERTION /* Predicate for #assert. */
+};
+
+/* Different flavors of builtin macro. _Pragma is an operator, but we
+ handle it with the builtin code for efficiency reasons. */
+enum builtin_type
+{
+ BT_SPECLINE = 0, /* `__LINE__' */
+ BT_DATE, /* `__DATE__' */
+ BT_FILE, /* `__FILE__' */
+ BT_BASE_FILE, /* `__BASE_FILE__' */
+ BT_INCLUDE_LEVEL, /* `__INCLUDE_LEVEL__' */
+ BT_TIME, /* `__TIME__' */
+ BT_STDC, /* `__STDC__' */
+ BT_PRAGMA, /* `_Pragma' operator */
+ BT_TIMESTAMP, /* `__TIMESTAMP__' */
+ BT_COUNTER /* `__COUNTER__' */
+};
+
+#define CPP_HASHNODE(HNODE) ((cpp_hashnode *) (HNODE))
+#define HT_NODE(NODE) ((ht_identifier *) (NODE))
+#define NODE_LEN(NODE) HT_LEN (&(NODE)->ident)
+#define NODE_NAME(NODE) HT_STR (&(NODE)->ident)
+
+/* Specify which field, if any, of the union is used. */
+
+enum {
+ NTV_MACRO,
+ NTV_ANSWER,
+ NTV_BUILTIN,
+ NTV_ARGUMENT,
+ NTV_NONE
+};
+
+#define CPP_HASHNODE_VALUE_IDX(HNODE) \
+ ((HNODE.flags & NODE_MACRO_ARG) ? NTV_ARGUMENT \
+ : HNODE.type == NT_MACRO ? ((HNODE.flags & NODE_BUILTIN) \
+ ? NTV_BUILTIN : NTV_MACRO) \
+ : HNODE.type == NT_ASSERTION ? NTV_ANSWER \
+ : NTV_NONE)
+
+/* The common part of an identifier node shared amongst all 3 C front
+ ends. Also used to store CPP identifiers, which are a superset of
+ identifiers in the grammatical sense. */
+
+union _cpp_hashnode_value GTY(())
+{
+ /* If a macro. */
+ cpp_macro * GTY((tag ("NTV_MACRO"))) macro;
+ /* Answers to an assertion. */
+ struct answer * GTY ((tag ("NTV_ANSWER"))) answers;
+ /* Code for a builtin macro. */
+ enum builtin_type GTY ((tag ("NTV_BUILTIN"))) builtin;
+ /* Macro argument index. */
+ unsigned short GTY ((tag ("NTV_ARGUMENT"))) arg_index;
+};
+
+struct cpp_hashnode GTY(())
+{
+ struct ht_identifier ident;
+ unsigned int is_directive : 1;
+ unsigned int directive_index : 7; /* If is_directive,
+ then index into directive table.
+ Otherwise, a NODE_OPERATOR. */
+ unsigned char rid_code; /* Rid code - for front ends. */
+ ENUM_BITFIELD(node_type) type : 7; /* CPP node type. */
+ unsigned int flags : 9; /* CPP flags. */
+
+ union _cpp_hashnode_value GTY ((desc ("CPP_HASHNODE_VALUE_IDX (%1)"))) value;
+};
+
+/* Call this first to get a handle to pass to other functions.
+
+ If you want cpplib to manage its own hashtable, pass in a NULL
+ pointer. Otherwise you should pass in an initialized hash table
+ that cpplib will share; this technique is used by the C front
+ ends. */
+extern cpp_reader *cpp_create_reader (enum c_lang, struct ht *,
+ struct line_maps *);
+
+/* Reset the cpp_reader's line_map. This is only used after reading a
+ PCH file. */
+extern void cpp_set_line_map (cpp_reader *, struct line_maps *);
+
+/* Call this to change the selected language standard (e.g. because of
+ command line options). */
+extern void cpp_set_lang (cpp_reader *, enum c_lang);
+
+/* Set the include paths. */
+extern void cpp_set_include_chains (cpp_reader *, cpp_dir *, cpp_dir *, int);
+
+/* Call these to get pointers to the options, callback, and deps
+ structures for a given reader. These pointers are good until you
+ call cpp_finish on that reader. You can either edit the callbacks
+ through the pointer returned from cpp_get_callbacks, or set them
+ with cpp_set_callbacks. */
+extern cpp_options *cpp_get_options (cpp_reader *);
+extern cpp_callbacks *cpp_get_callbacks (cpp_reader *);
+extern void cpp_set_callbacks (cpp_reader *, cpp_callbacks *);
+extern struct deps *cpp_get_deps (cpp_reader *);
+
+/* This function reads the file, but does not start preprocessing. It
+ returns the name of the original file; this is the same as the
+ input file, except for preprocessed input. This will generate at
+ least one file change callback, and possibly a line change callback
+ too. If there was an error opening the file, it returns NULL. */
+extern const char *cpp_read_main_file (cpp_reader *, const char *);
+
+/* Set up built-ins with special behavior. Use cpp_init_builtins()
+ instead unless your know what you are doing. */
+extern void cpp_init_special_builtins (cpp_reader *);
+
+/* Set up built-ins like __FILE__. */
+extern void cpp_init_builtins (cpp_reader *, int);
+
+/* This is called after options have been parsed, and partially
+ processed. */
+extern void cpp_post_options (cpp_reader *);
+
+/* Set up translation to the target character set. */
+extern void cpp_init_iconv (cpp_reader *);
+
+/* Call this to finish preprocessing. If you requested dependency
+ generation, pass an open stream to write the information to,
+ otherwise NULL. It is your responsibility to close the stream.
+
+ Returns cpp_errors (pfile). */
+extern int cpp_finish (cpp_reader *, FILE *deps_stream);
+
+/* Call this to release the handle at the end of preprocessing. Any
+ use of the handle after this function returns is invalid. Returns
+ cpp_errors (pfile). */
+extern void cpp_destroy (cpp_reader *);
+
+/* Error count. */
+extern unsigned int cpp_errors (cpp_reader *);
+
+extern unsigned int cpp_token_len (const cpp_token *);
+extern unsigned char *cpp_token_as_text (cpp_reader *, const cpp_token *);
+extern unsigned char *cpp_spell_token (cpp_reader *, const cpp_token *,
+ unsigned char *, bool);
+extern void cpp_register_pragma (cpp_reader *, const char *, const char *,
+ void (*) (cpp_reader *), bool);
+extern void cpp_register_deferred_pragma (cpp_reader *, const char *,
+ const char *, unsigned, bool, bool);
+extern int cpp_avoid_paste (cpp_reader *, const cpp_token *,
+ const cpp_token *);
+extern const cpp_token *cpp_get_token (cpp_reader *);
+extern const cpp_token *cpp_get_token_with_location (cpp_reader *,
+ source_location *);
+extern const unsigned char *cpp_macro_definition (cpp_reader *,
+ const cpp_hashnode *);
+extern void _cpp_backup_tokens (cpp_reader *, unsigned int);
+extern const cpp_token *cpp_peek_token (cpp_reader *, int);
+
+/* Evaluate a CPP_CHAR or CPP_WCHAR token. */
+extern cppchar_t cpp_interpret_charconst (cpp_reader *, const cpp_token *,
+ unsigned int *, int *);
+/* Evaluate a vector of CPP_STRING or CPP_WSTRING tokens. */
+extern bool cpp_interpret_string (cpp_reader *,
+ const cpp_string *, size_t,
+ cpp_string *, enum cpp_ttype);
+extern bool cpp_interpret_string_notranslate (cpp_reader *,
+ const cpp_string *, size_t,
+ cpp_string *, enum cpp_ttype);
+
+/* Convert a host character constant to the execution character set. */
+extern cppchar_t cpp_host_to_exec_charset (cpp_reader *, cppchar_t);
+
+/* Used to register macros and assertions, perhaps from the command line.
+ The text is the same as the command line argument. */
+extern void cpp_define (cpp_reader *, const char *);
+extern void cpp_define_formatted (cpp_reader *pfile,
+ const char *fmt, ...) ATTRIBUTE_PRINTF_2;
+extern void cpp_assert (cpp_reader *, const char *);
+extern void cpp_undef (cpp_reader *, const char *);
+extern void cpp_unassert (cpp_reader *, const char *);
+
+extern cpp_macro *cpp_push_definition (cpp_reader *, const char *);
+extern void cpp_pop_definition (cpp_reader *, const char *, cpp_macro *);
+
+/* Undefine all macros and assertions. */
+extern void cpp_undef_all (cpp_reader *);
+
+extern cpp_buffer *cpp_push_buffer (cpp_reader *, const unsigned char *,
+ size_t, int);
+extern int cpp_defined (cpp_reader *, const unsigned char *, int);
+
+/* A preprocessing number. Code assumes that any unused high bits of
+ the double integer are set to zero. */
+typedef unsigned HOST_WIDE_INT cpp_num_part;
+typedef struct cpp_num cpp_num;
+struct cpp_num
+{
+ cpp_num_part high;
+ cpp_num_part low;
+ bool unsignedp; /* True if value should be treated as unsigned. */
+ bool overflow; /* True if the most recent calculation overflowed. */
+};
+
+/* cpplib provides two interfaces for interpretation of preprocessing
+ numbers.
+
+ cpp_classify_number categorizes numeric constants according to
+ their field (integer, floating point, or invalid), radix (decimal,
+ octal, hexadecimal), and type suffixes. */
+
+#define CPP_N_CATEGORY 0x000F
+#define CPP_N_INVALID 0x0000
+#define CPP_N_INTEGER 0x0001
+#define CPP_N_FLOATING 0x0002
+
+#define CPP_N_WIDTH 0x00F0
+#define CPP_N_SMALL 0x0010 /* int, float, shrot _Fract/Accum */
+#define CPP_N_MEDIUM 0x0020 /* long, double, long _Fract/_Accum. */
+#define CPP_N_LARGE 0x0040 /* long long, long double,
+ long long _Fract/Accum. */
+
+#define CPP_N_WIDTH_MD 0xF0000 /* machine defined. */
+#define CPP_N_MD_W 0x10000
+#define CPP_N_MD_Q 0x20000
+
+#define CPP_N_RADIX 0x0F00
+#define CPP_N_DECIMAL 0x0100
+#define CPP_N_HEX 0x0200
+#define CPP_N_OCTAL 0x0400
+#define CPP_N_BINARY 0x0800
+
+#define CPP_N_UNSIGNED 0x1000 /* Properties. */
+#define CPP_N_IMAGINARY 0x2000
+#define CPP_N_DFLOAT 0x4000
+
+#define CPP_N_FRACT 0x100000 /* Fract types. */
+#define CPP_N_ACCUM 0x200000 /* Accum types. */
+
+/* Classify a CPP_NUMBER token. The return value is a combination of
+ the flags from the above sets. */
+extern unsigned cpp_classify_number (cpp_reader *, const cpp_token *);
+
+/* Evaluate a token classified as category CPP_N_INTEGER. */
+extern cpp_num cpp_interpret_integer (cpp_reader *, const cpp_token *,
+ unsigned int type);
+
+/* Sign extend a number, with PRECISION significant bits and all
+ others assumed clear, to fill out a cpp_num structure. */
+cpp_num cpp_num_sign_extend (cpp_num, size_t);
+
+/* Diagnostic levels. To get a diagnostic without associating a
+ position in the translation unit with it, use cpp_error_with_line
+ with a line number of zero. */
+
+/* Warning, an error with -Werror. */
+#define CPP_DL_WARNING 0x00
+/* Same as CPP_DL_WARNING, except it is not suppressed in system headers. */
+#define CPP_DL_WARNING_SYSHDR 0x01
+/* Warning, an error with -pedantic-errors or -Werror. */
+#define CPP_DL_PEDWARN 0x02
+/* An error. */
+#define CPP_DL_ERROR 0x03
+/* An internal consistency check failed. Prints "internal error: ",
+ otherwise the same as CPP_DL_ERROR. */
+#define CPP_DL_ICE 0x04
+/* Extracts a diagnostic level from an int. */
+#define CPP_DL_EXTRACT(l) (l & 0xf)
+/* Nonzero if a diagnostic level is one of the warnings. */
+#define CPP_DL_WARNING_P(l) (CPP_DL_EXTRACT (l) >= CPP_DL_WARNING \
+ && CPP_DL_EXTRACT (l) <= CPP_DL_PEDWARN)
+
+/* Output a diagnostic of some kind. */
+extern void cpp_error (cpp_reader *, int, const char *msgid, ...)
+ ATTRIBUTE_PRINTF_3;
+
+/* Output a diagnostic with "MSGID: " preceding the
+ error string of errno. No location is printed. */
+extern void cpp_errno (cpp_reader *, int, const char *msgid);
+
+/* Same as cpp_error, except additionally specifies a position as a
+ (translation unit) physical line and physical column. If the line is
+ zero, then no location is printed. */
+extern void cpp_error_with_line (cpp_reader *, int, source_location, unsigned,
+ const char *msgid, ...) ATTRIBUTE_PRINTF_5;
+
+/* In lex.c */
+extern int cpp_ideq (const cpp_token *, const char *);
+extern void cpp_output_line (cpp_reader *, FILE *);
+extern unsigned char *cpp_output_line_to_string (cpp_reader *,
+ const unsigned char *);
+extern void cpp_output_token (const cpp_token *, FILE *);
+extern const char *cpp_type2name (enum cpp_ttype);
+/* Returns the value of an escape sequence, truncated to the correct
+ target precision. PSTR points to the input pointer, which is just
+ after the backslash. LIMIT is how much text we have. WIDE is true
+ if the escape sequence is part of a wide character constant or
+ string literal. Handles all relevant diagnostics. */
+extern cppchar_t cpp_parse_escape (cpp_reader *, const unsigned char ** pstr,
+ const unsigned char *limit, int wide);
+
+/* Structure used to hold a comment block at a given location in the
+ source code. */
+
+typedef struct
+{
+ /* Text of the comment including the terminators. */
+ char *comment;
+
+ /* source location for the given comment. */
+ source_location sloc;
+} cpp_comment;
+
+/* Structure holding all comments for a given cpp_reader. */
+
+typedef struct
+{
+ /* table of comment entries. */
+ cpp_comment *entries;
+
+ /* number of actual entries entered in the table. */
+ int count;
+
+ /* number of entries allocated currently. */
+ int allocated;
+} cpp_comment_table;
+
+/* Returns the table of comments encountered by the preprocessor. This
+ table is only populated when pfile->state.save_comments is true. */
+extern cpp_comment_table *cpp_get_comments (cpp_reader *);
+
+/* In hash.c */
+
+/* Lookup an identifier in the hashtable. Puts the identifier in the
+ table if it is not already there. */
+extern cpp_hashnode *cpp_lookup (cpp_reader *, const unsigned char *,
+ unsigned int);
+
+typedef int (*cpp_cb) (cpp_reader *, cpp_hashnode *, void *);
+extern void cpp_forall_identifiers (cpp_reader *, cpp_cb, void *);
+
+/* In macro.c */
+extern void cpp_scan_nooutput (cpp_reader *);
+extern int cpp_sys_macro_p (cpp_reader *);
+extern unsigned char *cpp_quote_string (unsigned char *, const unsigned char *,
+ unsigned int);
+
+/* In files.c */
+extern bool cpp_included (cpp_reader *, const char *);
+extern bool cpp_included_before (cpp_reader *, const char *, source_location);
+extern void cpp_make_system_header (cpp_reader *, int, int);
+extern bool cpp_push_include (cpp_reader *, const char *);
+extern void cpp_change_file (cpp_reader *, enum lc_reason, const char *);
+extern const char *cpp_get_path (struct _cpp_file *);
+extern cpp_dir *cpp_get_dir (struct _cpp_file *);
+extern cpp_buffer *cpp_get_buffer (cpp_reader *);
+extern struct _cpp_file *cpp_get_file (cpp_buffer *);
+extern cpp_buffer *cpp_get_prev (cpp_buffer *);
+extern void cpp_clear_file_cache (cpp_reader *);
+
+/* In pch.c */
+struct save_macro_data;
+extern int cpp_save_state (cpp_reader *, FILE *);
+extern int cpp_write_pch_deps (cpp_reader *, FILE *);
+extern int cpp_write_pch_state (cpp_reader *, FILE *);
+extern int cpp_valid_state (cpp_reader *, const char *, int);
+extern void cpp_prepare_state (cpp_reader *, struct save_macro_data **);
+extern int cpp_read_state (cpp_reader *, const char *, FILE *,
+ struct save_macro_data *);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! LIBCPP_CPPLIB_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/defaults.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/defaults.h
new file mode 100644
index 0000000..349c1f7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/defaults.h
@@ -0,0 +1,976 @@
+/* Definitions of various defaults for tm.h macros.
+ Copyright (C) 1992, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Ron Guilmette (rfg@monkeys.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_DEFAULTS_H
+#define GCC_DEFAULTS_H
+
+#ifndef GET_ENVIRONMENT
+#define GET_ENVIRONMENT(VALUE, NAME) do { (VALUE) = getenv (NAME); } while (0)
+#endif
+
+#define obstack_chunk_alloc ((void *(*) (long)) xmalloc)
+#define obstack_chunk_free ((void (*) (void *)) free)
+#define OBSTACK_CHUNK_SIZE 0
+#define gcc_obstack_init(OBSTACK) \
+ _obstack_begin ((OBSTACK), OBSTACK_CHUNK_SIZE, 0, \
+ obstack_chunk_alloc, \
+ obstack_chunk_free)
+
+/* Store in OUTPUT a string (made with alloca) containing an
+ assembler-name for a local static variable or function named NAME.
+ LABELNO is an integer which is different for each call. */
+
+#ifndef ASM_PN_FORMAT
+# ifndef NO_DOT_IN_LABEL
+# define ASM_PN_FORMAT "%s.%lu"
+# else
+# ifndef NO_DOLLAR_IN_LABEL
+# define ASM_PN_FORMAT "%s$%lu"
+# else
+# define ASM_PN_FORMAT "__%s_%lu"
+# endif
+# endif
+#endif /* ! ASM_PN_FORMAT */
+
+#ifndef ASM_FORMAT_PRIVATE_NAME
+# define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
+ do { const char *const name_ = (NAME); \
+ char *const output_ = (OUTPUT) = \
+ (char *) alloca (strlen (name_) + 32); \
+ sprintf (output_, ASM_PN_FORMAT, name_, (unsigned long)(LABELNO)); \
+ } while (0)
+#endif
+
+/* Choose a reasonable default for ASM_OUTPUT_ASCII. */
+
+#ifndef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
+ do { \
+ FILE *_hide_asm_out_file = (MYFILE); \
+ const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
+ int _hide_thissize = (MYLENGTH); \
+ { \
+ FILE *asm_out_file = _hide_asm_out_file; \
+ const unsigned char *p = _hide_p; \
+ int thissize = _hide_thissize; \
+ int i; \
+ fprintf (asm_out_file, "\t.ascii \""); \
+ \
+ for (i = 0; i < thissize; i++) \
+ { \
+ int c = p[i]; \
+ if (c == '\"' || c == '\\') \
+ putc ('\\', asm_out_file); \
+ if (ISPRINT(c)) \
+ putc (c, asm_out_file); \
+ else \
+ { \
+ fprintf (asm_out_file, "\\%o", c); \
+ /* After an octal-escape, if a digit follows, \
+ terminate one string constant and start another. \
+ The VAX assembler fails to stop reading the escape \
+ after three digits, so this is the only way we \
+ can get it to parse the data properly. */ \
+ if (i < thissize - 1 && ISDIGIT(p[i + 1])) \
+ fprintf (asm_out_file, "\"\n\t.ascii \""); \
+ } \
+ } \
+ fprintf (asm_out_file, "\"\n"); \
+ } \
+ } \
+ while (0)
+#endif
+
+/* This is how we tell the assembler to equate two values. */
+#ifdef SET_ASM_OP
+#ifndef ASM_OUTPUT_DEF
+#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
+ do { fprintf ((FILE), "%s", SET_ASM_OP); \
+ assemble_name (FILE, LABEL1); \
+ fprintf (FILE, ","); \
+ assemble_name (FILE, LABEL2); \
+ fprintf (FILE, "\n"); \
+ } while (0)
+#endif
+#endif
+
+#if defined (HAVE_AS_TLS) && !defined (ASM_OUTPUT_TLS_COMMON)
+#define ASM_OUTPUT_TLS_COMMON(FILE, DECL, NAME, SIZE) \
+ do \
+ { \
+ fprintf ((FILE), "\t.tls_common\t"); \
+ assemble_name ((FILE), (NAME)); \
+ fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
+ (SIZE), DECL_ALIGN (DECL) / BITS_PER_UNIT); \
+ } \
+ while (0)
+#endif
+
+/* Decide whether to defer emitting the assembler output for an equate
+ of two values. The default is to not defer output. */
+#ifndef TARGET_DEFERRED_OUTPUT_DEFS
+#define TARGET_DEFERRED_OUTPUT_DEFS(DECL,TARGET) false
+#endif
+
+/* This is how to output the definition of a user-level label named
+ NAME, such as the label on a static function or variable NAME. */
+
+#ifndef ASM_OUTPUT_LABEL
+#define ASM_OUTPUT_LABEL(FILE,NAME) \
+ do { assemble_name ((FILE), (NAME)); fputs (":\n", (FILE)); } while (0)
+#endif
+
+/* Output the definition of a compiler-generated label named NAME. */
+#ifndef ASM_OUTPUT_INTERNAL_LABEL
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
+ do { \
+ assemble_name_raw ((FILE), (NAME)); \
+ fputs (":\n", (FILE)); \
+ } while (0)
+#endif
+
+/* This is how to output a reference to a user-level label named NAME. */
+
+#ifndef ASM_OUTPUT_LABELREF
+#define ASM_OUTPUT_LABELREF(FILE,NAME) asm_fprintf ((FILE), "%U%s", (NAME))
+#endif
+
+/* Allow target to print debug info labels specially. This is useful for
+ VLIW targets, since debug info labels should go into the middle of
+ instruction bundles instead of breaking them. */
+
+#ifndef ASM_OUTPUT_DEBUG_LABEL
+#define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
+ (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM)
+#endif
+
+/* This is how we tell the assembler that a symbol is weak. */
+#ifndef ASM_OUTPUT_WEAK_ALIAS
+#if defined (ASM_WEAKEN_LABEL) && defined (ASM_OUTPUT_DEF)
+#define ASM_OUTPUT_WEAK_ALIAS(STREAM, NAME, VALUE) \
+ do \
+ { \
+ ASM_WEAKEN_LABEL (STREAM, NAME); \
+ if (VALUE) \
+ ASM_OUTPUT_DEF (STREAM, NAME, VALUE); \
+ } \
+ while (0)
+#endif
+#endif
+
+/* This is how we tell the assembler that a symbol is a weak alias to
+ another symbol that doesn't require the other symbol to be defined.
+ Uses of the former will turn into weak uses of the latter, i.e.,
+ uses that, in case the latter is undefined, will not cause errors,
+ and will add it to the symbol table as weak undefined. However, if
+ the latter is referenced directly, a strong reference prevails. */
+#ifndef ASM_OUTPUT_WEAKREF
+#if defined HAVE_GAS_WEAKREF
+#define ASM_OUTPUT_WEAKREF(FILE, DECL, NAME, VALUE) \
+ do \
+ { \
+ fprintf ((FILE), "\t.weakref\t"); \
+ assemble_name ((FILE), (NAME)); \
+ fprintf ((FILE), ","); \
+ assemble_name ((FILE), (VALUE)); \
+ fprintf ((FILE), "\n"); \
+ } \
+ while (0)
+#endif
+#endif
+
+/* How to emit a .type directive. */
+#ifndef ASM_OUTPUT_TYPE_DIRECTIVE
+#if defined TYPE_ASM_OP && defined TYPE_OPERAND_FMT
+#define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
+ do \
+ { \
+ fputs (TYPE_ASM_OP, STREAM); \
+ assemble_name (STREAM, NAME); \
+ fputs (", ", STREAM); \
+ fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
+ putc ('\n', STREAM); \
+ } \
+ while (0)
+#endif
+#endif
+
+/* How to emit a .size directive. */
+#ifndef ASM_OUTPUT_SIZE_DIRECTIVE
+#ifdef SIZE_ASM_OP
+#define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
+ do \
+ { \
+ HOST_WIDE_INT size_ = (SIZE); \
+ fputs (SIZE_ASM_OP, STREAM); \
+ assemble_name (STREAM, NAME); \
+ fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
+ } \
+ while (0)
+
+#define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
+ do \
+ { \
+ fputs (SIZE_ASM_OP, STREAM); \
+ assemble_name (STREAM, NAME); \
+ fputs (", .-", STREAM); \
+ assemble_name (STREAM, NAME); \
+ putc ('\n', STREAM); \
+ } \
+ while (0)
+
+#endif
+#endif
+
+/* This determines whether or not we support weak symbols. */
+#ifndef SUPPORTS_WEAK
+#if defined (ASM_WEAKEN_LABEL) || defined (ASM_WEAKEN_DECL)
+#define SUPPORTS_WEAK 1
+#else
+#define SUPPORTS_WEAK 0
+#endif
+#endif
+
+/* This determines whether or not we support the discriminator
+ attribute in the .loc directive. */
+#ifndef SUPPORTS_DISCRIMINATOR
+#ifdef HAVE_GAS_DISCRIMINATOR
+#define SUPPORTS_DISCRIMINATOR 1
+#else
+#define SUPPORTS_DISCRIMINATOR 0
+#endif
+#endif
+
+/* This determines whether or not we support link-once semantics. */
+#ifndef SUPPORTS_ONE_ONLY
+#ifdef MAKE_DECL_ONE_ONLY
+#define SUPPORTS_ONE_ONLY 1
+#else
+#define SUPPORTS_ONE_ONLY 0
+#endif
+#endif
+
+/* This determines whether weak symbols must be left out of a static
+ archive's table of contents. Defining this macro to be nonzero has
+ the consequence that certain symbols will not be made weak that
+ otherwise would be. The C++ ABI requires this macro to be zero;
+ see the documentation. */
+#ifndef TARGET_WEAK_NOT_IN_ARCHIVE_TOC
+#define TARGET_WEAK_NOT_IN_ARCHIVE_TOC 0
+#endif
+
+/* This determines whether or not we need linkonce unwind information. */
+#ifndef TARGET_USES_WEAK_UNWIND_INFO
+#define TARGET_USES_WEAK_UNWIND_INFO 0
+#endif
+
+/* By default, there is no prefix on user-defined symbols. */
+#ifndef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX ""
+#endif
+
+/* If the target supports weak symbols, define TARGET_ATTRIBUTE_WEAK to
+ provide a weak attribute. Else define it to nothing.
+
+ This would normally belong in ansidecl.h, but SUPPORTS_WEAK is
+ not available at that time.
+
+ Note, this is only for use by target files which we know are to be
+ compiled by GCC. */
+#ifndef TARGET_ATTRIBUTE_WEAK
+# if SUPPORTS_WEAK
+# define TARGET_ATTRIBUTE_WEAK __attribute__ ((weak))
+# else
+# define TARGET_ATTRIBUTE_WEAK
+# endif
+#endif
+
+/* Determines whether we may use common symbols to represent one-only
+ semantics (a.k.a. "vague linkage"). */
+#ifndef USE_COMMON_FOR_ONE_ONLY
+# define USE_COMMON_FOR_ONE_ONLY 1
+#endif
+
+/* By default we can assume that all global symbols are in one namespace,
+ across all shared libraries. */
+#ifndef MULTIPLE_SYMBOL_SPACES
+# define MULTIPLE_SYMBOL_SPACES 0
+#endif
+
+/* If the target supports init_priority C++ attribute, give
+ SUPPORTS_INIT_PRIORITY a nonzero value. */
+#ifndef SUPPORTS_INIT_PRIORITY
+#define SUPPORTS_INIT_PRIORITY 1
+#endif /* SUPPORTS_INIT_PRIORITY */
+
+/* If duplicate library search directories can be removed from a
+ linker command without changing the linker's semantics, give this
+ symbol a nonzero. */
+#ifndef LINK_ELIMINATE_DUPLICATE_LDIRECTORIES
+#define LINK_ELIMINATE_DUPLICATE_LDIRECTORIES 0
+#endif /* LINK_ELIMINATE_DUPLICATE_LDIRECTORIES */
+
+/* If we have a definition of INCOMING_RETURN_ADDR_RTX, assume that
+ the rest of the DWARF 2 frame unwind support is also provided. */
+#if !defined (DWARF2_UNWIND_INFO) && defined (INCOMING_RETURN_ADDR_RTX) \
+ && !defined (TARGET_UNWIND_INFO)
+#define DWARF2_UNWIND_INFO 1
+#endif
+
+/* If we have named sections, and we're using crtstuff to run ctors,
+ use them for registering eh frame information. */
+#if defined (TARGET_ASM_NAMED_SECTION) && DWARF2_UNWIND_INFO \
+ && !defined(EH_FRAME_IN_DATA_SECTION)
+#ifndef EH_FRAME_SECTION_NAME
+#define EH_FRAME_SECTION_NAME ".eh_frame"
+#endif
+#endif
+
+/* On many systems, different EH table encodings are used under
+ difference circumstances. Some will require runtime relocations;
+ some will not. For those that do not require runtime relocations,
+ we would like to make the table read-only. However, since the
+ read-only tables may need to be combined with read-write tables
+ that do require runtime relocation, it is not safe to make the
+ tables read-only unless the linker will merge read-only and
+ read-write sections into a single read-write section. If your
+ linker does not have this ability, but your system is such that no
+ encoding used with non-PIC code will ever require a runtime
+ relocation, then you can define EH_TABLES_CAN_BE_READ_ONLY to 1 in
+ your target configuration file. */
+#ifndef EH_TABLES_CAN_BE_READ_ONLY
+#ifdef HAVE_LD_RO_RW_SECTION_MIXING
+#define EH_TABLES_CAN_BE_READ_ONLY 1
+#else
+#define EH_TABLES_CAN_BE_READ_ONLY 0
+#endif
+#endif
+
+/* If we have named section and we support weak symbols, then use the
+ .jcr section for recording java classes which need to be registered
+ at program start-up time. */
+#if defined (TARGET_ASM_NAMED_SECTION) && SUPPORTS_WEAK
+#ifndef JCR_SECTION_NAME
+#define JCR_SECTION_NAME ".jcr"
+#endif
+#endif
+
+/* This decision to use a .jcr section can be overridden by defining
+ USE_JCR_SECTION to 0 in target file. This is necessary if target
+ can define JCR_SECTION_NAME but does not have crtstuff or
+ linker support for .jcr section. */
+#ifndef TARGET_USE_JCR_SECTION
+#ifdef JCR_SECTION_NAME
+#define TARGET_USE_JCR_SECTION 1
+#else
+#define TARGET_USE_JCR_SECTION 0
+#endif
+#endif
+
+/* Number of hardware registers that go into the DWARF-2 unwind info.
+ If not defined, equals FIRST_PSEUDO_REGISTER */
+
+#ifndef DWARF_FRAME_REGISTERS
+#define DWARF_FRAME_REGISTERS FIRST_PSEUDO_REGISTER
+#endif
+
+/* How to renumber registers for dbx and gdb. If not defined, assume
+ no renumbering is necessary. */
+
+#ifndef DBX_REGISTER_NUMBER
+#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#endif
+
+/* Default sizes for base C types. If the sizes are different for
+ your target, you should override these values by defining the
+ appropriate symbols in your tm.h file. */
+
+#ifndef BITS_PER_UNIT
+#define BITS_PER_UNIT 8
+#endif
+
+#ifndef BITS_PER_WORD
+#define BITS_PER_WORD (BITS_PER_UNIT * UNITS_PER_WORD)
+#endif
+
+#ifndef CHAR_TYPE_SIZE
+#define CHAR_TYPE_SIZE BITS_PER_UNIT
+#endif
+
+#ifndef BOOL_TYPE_SIZE
+/* `bool' has size and alignment `1', on almost all platforms. */
+#define BOOL_TYPE_SIZE CHAR_TYPE_SIZE
+#endif
+
+#ifndef SHORT_TYPE_SIZE
+#define SHORT_TYPE_SIZE (BITS_PER_UNIT * MIN ((UNITS_PER_WORD + 1) / 2, 2))
+#endif
+
+#ifndef INT_TYPE_SIZE
+#define INT_TYPE_SIZE BITS_PER_WORD
+#endif
+
+#ifndef LONG_TYPE_SIZE
+#define LONG_TYPE_SIZE BITS_PER_WORD
+#endif
+
+#ifndef LONG_LONG_TYPE_SIZE
+#define LONG_LONG_TYPE_SIZE (BITS_PER_WORD * 2)
+#endif
+
+#ifndef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE INT_TYPE_SIZE
+#endif
+
+#ifndef FLOAT_TYPE_SIZE
+#define FLOAT_TYPE_SIZE BITS_PER_WORD
+#endif
+
+#ifndef DOUBLE_TYPE_SIZE
+#define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
+#endif
+
+#ifndef LONG_DOUBLE_TYPE_SIZE
+#define LONG_DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
+#endif
+
+#ifndef DECIMAL32_TYPE_SIZE
+#define DECIMAL32_TYPE_SIZE 32
+#endif
+
+#ifndef DECIMAL64_TYPE_SIZE
+#define DECIMAL64_TYPE_SIZE 64
+#endif
+
+#ifndef DECIMAL128_TYPE_SIZE
+#define DECIMAL128_TYPE_SIZE 128
+#endif
+
+#ifndef SHORT_FRACT_TYPE_SIZE
+#define SHORT_FRACT_TYPE_SIZE BITS_PER_UNIT
+#endif
+
+#ifndef FRACT_TYPE_SIZE
+#define FRACT_TYPE_SIZE (BITS_PER_UNIT * 2)
+#endif
+
+#ifndef LONG_FRACT_TYPE_SIZE
+#define LONG_FRACT_TYPE_SIZE (BITS_PER_UNIT * 4)
+#endif
+
+#ifndef LONG_LONG_FRACT_TYPE_SIZE
+#define LONG_LONG_FRACT_TYPE_SIZE (BITS_PER_UNIT * 8)
+#endif
+
+#ifndef SHORT_ACCUM_TYPE_SIZE
+#define SHORT_ACCUM_TYPE_SIZE (SHORT_FRACT_TYPE_SIZE * 2)
+#endif
+
+#ifndef ACCUM_TYPE_SIZE
+#define ACCUM_TYPE_SIZE (FRACT_TYPE_SIZE * 2)
+#endif
+
+#ifndef LONG_ACCUM_TYPE_SIZE
+#define LONG_ACCUM_TYPE_SIZE (LONG_FRACT_TYPE_SIZE * 2)
+#endif
+
+#ifndef LONG_LONG_ACCUM_TYPE_SIZE
+#define LONG_LONG_ACCUM_TYPE_SIZE (LONG_LONG_FRACT_TYPE_SIZE * 2)
+#endif
+
+/* Width in bits of a pointer. Mind the value of the macro `Pmode'. */
+#ifndef POINTER_SIZE
+#define POINTER_SIZE BITS_PER_WORD
+#endif
+
+#ifndef PIC_OFFSET_TABLE_REGNUM
+#define PIC_OFFSET_TABLE_REGNUM INVALID_REGNUM
+#endif
+
+#ifndef TARGET_DLLIMPORT_DECL_ATTRIBUTES
+#define TARGET_DLLIMPORT_DECL_ATTRIBUTES 0
+#endif
+
+#ifndef TARGET_DECLSPEC
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+/* If the target supports the "dllimport" attribute, users are
+ probably used to the "__declspec" syntax. */
+#define TARGET_DECLSPEC 1
+#else
+#define TARGET_DECLSPEC 0
+#endif
+#endif
+
+/* By default, the preprocessor should be invoked the same way in C++
+ as in C. */
+#ifndef CPLUSPLUS_CPP_SPEC
+#ifdef CPP_SPEC
+#define CPLUSPLUS_CPP_SPEC CPP_SPEC
+#endif
+#endif
+
+#ifndef ACCUMULATE_OUTGOING_ARGS
+#define ACCUMULATE_OUTGOING_ARGS 0
+#endif
+
+/* Supply a default definition for PUSH_ARGS. */
+#ifndef PUSH_ARGS
+#ifdef PUSH_ROUNDING
+#define PUSH_ARGS !ACCUMULATE_OUTGOING_ARGS
+#else
+#define PUSH_ARGS 0
+#endif
+#endif
+
+/* Decide whether a function's arguments should be processed
+ from first to last or from last to first.
+
+ They should if the stack and args grow in opposite directions, but
+ only if we have push insns. */
+
+#ifdef PUSH_ROUNDING
+
+#ifndef PUSH_ARGS_REVERSED
+#if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
+#define PUSH_ARGS_REVERSED PUSH_ARGS
+#endif
+#endif
+
+#endif
+
+#ifndef PUSH_ARGS_REVERSED
+#define PUSH_ARGS_REVERSED 0
+#endif
+
+/* Default value for the alignment (in bits) a C conformant malloc has to
+ provide. This default is intended to be safe and always correct. */
+#ifndef MALLOC_ABI_ALIGNMENT
+#define MALLOC_ABI_ALIGNMENT BITS_PER_WORD
+#endif
+
+/* If PREFERRED_STACK_BOUNDARY is not defined, set it to STACK_BOUNDARY.
+ STACK_BOUNDARY is required. */
+#ifndef PREFERRED_STACK_BOUNDARY
+#define PREFERRED_STACK_BOUNDARY STACK_BOUNDARY
+#endif
+
+/* Set INCOMING_STACK_BOUNDARY to PREFERRED_STACK_BOUNDARY if it is not
+ defined. */
+#ifndef INCOMING_STACK_BOUNDARY
+#define INCOMING_STACK_BOUNDARY PREFERRED_STACK_BOUNDARY
+#endif
+
+#ifndef TARGET_DEFAULT_PACK_STRUCT
+#define TARGET_DEFAULT_PACK_STRUCT 0
+#endif
+
+/* By default, the C++ compiler will use function addresses in the
+ vtable entries. Setting this nonzero tells the compiler to use
+ function descriptors instead. The value of this macro says how
+ many words wide the descriptor is (normally 2). It is assumed
+ that the address of a function descriptor may be treated as a
+ pointer to a function. */
+#ifndef TARGET_VTABLE_USES_DESCRIPTORS
+#define TARGET_VTABLE_USES_DESCRIPTORS 0
+#endif
+
+/* By default, the vtable entries are void pointers, the so the alignment
+ is the same as pointer alignment. The value of this macro specifies
+ the alignment of the vtable entry in bits. It should be defined only
+ when special alignment is necessary. */
+#ifndef TARGET_VTABLE_ENTRY_ALIGN
+#define TARGET_VTABLE_ENTRY_ALIGN POINTER_SIZE
+#endif
+
+/* There are a few non-descriptor entries in the vtable at offsets below
+ zero. If these entries must be padded (say, to preserve the alignment
+ specified by TARGET_VTABLE_ENTRY_ALIGN), set this to the number of
+ words in each data entry. */
+#ifndef TARGET_VTABLE_DATA_ENTRY_DISTANCE
+#define TARGET_VTABLE_DATA_ENTRY_DISTANCE 1
+#endif
+
+/* Decide whether it is safe to use a local alias for a virtual function
+ when constructing thunks. */
+#ifndef TARGET_USE_LOCAL_THUNK_ALIAS_P
+#ifdef ASM_OUTPUT_DEF
+#define TARGET_USE_LOCAL_THUNK_ALIAS_P(DECL) 1
+#else
+#define TARGET_USE_LOCAL_THUNK_ALIAS_P(DECL) 0
+#endif
+#endif
+
+/* Select a format to encode pointers in exception handling data. We
+ prefer those that result in fewer dynamic relocations. Assume no
+ special support here and encode direct references. */
+#ifndef ASM_PREFERRED_EH_DATA_FORMAT
+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_absptr
+#endif
+
+/* By default, the C++ compiler will use the lowest bit of the pointer
+ to function to indicate a pointer-to-member-function points to a
+ virtual member function. However, if FUNCTION_BOUNDARY indicates
+ function addresses aren't always even, the lowest bit of the delta
+ field will be used. */
+#ifndef TARGET_PTRMEMFUNC_VBIT_LOCATION
+#define TARGET_PTRMEMFUNC_VBIT_LOCATION \
+ (FUNCTION_BOUNDARY >= 2 * BITS_PER_UNIT \
+ ? ptrmemfunc_vbit_in_pfn : ptrmemfunc_vbit_in_delta)
+#endif
+
+#ifndef DEFAULT_GDB_EXTENSIONS
+#define DEFAULT_GDB_EXTENSIONS 1
+#endif
+
+/* If more than one debugging type is supported, you must define
+ PREFERRED_DEBUGGING_TYPE to choose the default. */
+
+#if 1 < (defined (DBX_DEBUGGING_INFO) + defined (SDB_DEBUGGING_INFO) \
+ + defined (DWARF2_DEBUGGING_INFO) + defined (XCOFF_DEBUGGING_INFO) \
+ + defined (VMS_DEBUGGING_INFO))
+#ifndef PREFERRED_DEBUGGING_TYPE
+#error You must define PREFERRED_DEBUGGING_TYPE
+#endif /* no PREFERRED_DEBUGGING_TYPE */
+
+/* If only one debugging format is supported, define PREFERRED_DEBUGGING_TYPE
+ here so other code needn't care. */
+#elif defined DBX_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+
+#elif defined SDB_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
+
+#elif defined DWARF2_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+
+#elif defined VMS_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE VMS_AND_DWARF2_DEBUG
+
+#elif defined XCOFF_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE XCOFF_DEBUG
+
+#else
+/* No debugging format is supported by this target. */
+#define PREFERRED_DEBUGGING_TYPE NO_DEBUG
+#endif
+
+#ifndef LARGEST_EXPONENT_IS_NORMAL
+#define LARGEST_EXPONENT_IS_NORMAL(SIZE) 0
+#endif
+
+#ifndef ROUND_TOWARDS_ZERO
+#define ROUND_TOWARDS_ZERO 0
+#endif
+
+#ifndef FLOAT_LIB_COMPARE_RETURNS_BOOL
+#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) false
+#endif
+
+/* True if the targets integer-comparison functions return { 0, 1, 2
+ } to indicate { <, ==, > }. False if { -1, 0, 1 } is used
+ instead. The libgcc routines are biased. */
+#ifndef TARGET_LIB_INT_CMP_BIASED
+#define TARGET_LIB_INT_CMP_BIASED (true)
+#endif
+
+/* If FLOAT_WORDS_BIG_ENDIAN is not defined in the header files,
+ then the word-endianness is the same as for integers. */
+#ifndef FLOAT_WORDS_BIG_ENDIAN
+#define FLOAT_WORDS_BIG_ENDIAN WORDS_BIG_ENDIAN
+#endif
+
+#ifndef TARGET_FLT_EVAL_METHOD
+#define TARGET_FLT_EVAL_METHOD 0
+#endif
+
+#ifndef TARGET_DEC_EVAL_METHOD
+#define TARGET_DEC_EVAL_METHOD 2
+#endif
+
+#ifndef HOT_TEXT_SECTION_NAME
+#define HOT_TEXT_SECTION_NAME ".text.hot"
+#endif
+
+#ifndef UNLIKELY_EXECUTED_TEXT_SECTION_NAME
+#define UNLIKELY_EXECUTED_TEXT_SECTION_NAME ".text.unlikely"
+#endif
+
+#ifndef HAS_LONG_COND_BRANCH
+#define HAS_LONG_COND_BRANCH 0
+#endif
+
+#ifndef HAS_LONG_UNCOND_BRANCH
+#define HAS_LONG_UNCOND_BRANCH 0
+#endif
+
+/* By default, only attempt to parallelize bitwise operations, and
+ possibly adds/subtracts using bit-twiddling. */
+#ifndef UNITS_PER_SIMD_WORD
+#define UNITS_PER_SIMD_WORD(MODE) UNITS_PER_WORD
+#endif
+
+/* Determine whether __cxa_atexit, rather than atexit, is used to
+ register C++ destructors for local statics and global objects. */
+#ifndef DEFAULT_USE_CXA_ATEXIT
+#define DEFAULT_USE_CXA_ATEXIT 0
+#endif
+
+/* If none of these macros are defined, the port must use the new
+ technique of defining constraints in the machine description.
+ tm_p.h will define those macros that machine-independent code
+ still uses. */
+#if !defined CONSTRAINT_LEN \
+ && !defined REG_CLASS_FROM_LETTER \
+ && !defined REG_CLASS_FROM_CONSTRAINT \
+ && !defined CONST_OK_FOR_LETTER_P \
+ && !defined CONST_OK_FOR_CONSTRAINT_P \
+ && !defined CONST_DOUBLE_OK_FOR_LETTER_P \
+ && !defined CONST_DOUBLE_OK_FOR_CONSTRAINT_P \
+ && !defined EXTRA_CONSTRAINT \
+ && !defined EXTRA_CONSTRAINT_STR \
+ && !defined EXTRA_MEMORY_CONSTRAINT \
+ && !defined EXTRA_ADDRESS_CONSTRAINT
+
+#define USE_MD_CONSTRAINTS
+
+#if GCC_VERSION >= 3000 && defined IN_GCC
+/* These old constraint macros shouldn't appear anywhere in a
+ configuration using MD constraint definitions. */
+#pragma GCC poison REG_CLASS_FROM_LETTER CONST_OK_FOR_LETTER_P \
+ CONST_DOUBLE_OK_FOR_LETTER_P EXTRA_CONSTRAINT
+#endif
+
+#else /* old constraint mechanism in use */
+
+/* Determine whether extra constraint letter should be handled
+ via address reload (like 'o'). */
+#ifndef EXTRA_MEMORY_CONSTRAINT
+#define EXTRA_MEMORY_CONSTRAINT(C,STR) 0
+#endif
+
+/* Determine whether extra constraint letter should be handled
+ as an address (like 'p'). */
+#ifndef EXTRA_ADDRESS_CONSTRAINT
+#define EXTRA_ADDRESS_CONSTRAINT(C,STR) 0
+#endif
+
+/* When a port defines CONSTRAINT_LEN, it should use DEFAULT_CONSTRAINT_LEN
+ for all the characters that it does not want to change, so things like the
+ 'length' of a digit in a matching constraint is an implementation detail,
+ and not part of the interface. */
+#define DEFAULT_CONSTRAINT_LEN(C,STR) 1
+
+#ifndef CONSTRAINT_LEN
+#define CONSTRAINT_LEN(C,STR) DEFAULT_CONSTRAINT_LEN (C, STR)
+#endif
+
+#if defined (CONST_OK_FOR_LETTER_P) && ! defined (CONST_OK_FOR_CONSTRAINT_P)
+#define CONST_OK_FOR_CONSTRAINT_P(VAL,C,STR) CONST_OK_FOR_LETTER_P (VAL, C)
+#endif
+
+#if defined (CONST_DOUBLE_OK_FOR_LETTER_P) && ! defined (CONST_DOUBLE_OK_FOR_CONSTRAINT_P)
+#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(OP,C,STR) \
+ CONST_DOUBLE_OK_FOR_LETTER_P (OP, C)
+#endif
+
+#ifndef REG_CLASS_FROM_CONSTRAINT
+#define REG_CLASS_FROM_CONSTRAINT(C,STR) REG_CLASS_FROM_LETTER (C)
+#endif
+
+#if defined (EXTRA_CONSTRAINT) && ! defined (EXTRA_CONSTRAINT_STR)
+#define EXTRA_CONSTRAINT_STR(OP, C,STR) EXTRA_CONSTRAINT (OP, C)
+#endif
+
+#endif /* old constraint mechanism in use */
+
+#ifndef REGISTER_MOVE_COST
+#define REGISTER_MOVE_COST(m, x, y) 2
+#endif
+
+/* Determine whether the entire c99 runtime
+ is present in the runtime library. */
+#ifndef TARGET_C99_FUNCTIONS
+#define TARGET_C99_FUNCTIONS 0
+#endif
+
+/* Determine whether the target runtime library has
+ a sincos implementation following the GNU extension. */
+#ifndef TARGET_HAS_SINCOS
+#define TARGET_HAS_SINCOS 0
+#endif
+
+/* Indicate that CLZ and CTZ are undefined at zero. */
+#ifndef CLZ_DEFINED_VALUE_AT_ZERO
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
+#endif
+#ifndef CTZ_DEFINED_VALUE_AT_ZERO
+#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
+#endif
+
+/* Provide a default value for STORE_FLAG_VALUE. */
+#ifndef STORE_FLAG_VALUE
+#define STORE_FLAG_VALUE 1
+#endif
+
+/* This macro is used to determine what the largest unit size that
+ move_by_pieces can use is. */
+
+/* MOVE_MAX_PIECES is the number of bytes at a time which we can
+ move efficiently, as opposed to MOVE_MAX which is the maximum
+ number of bytes we can move with a single instruction. */
+
+#ifndef MOVE_MAX_PIECES
+#define MOVE_MAX_PIECES MOVE_MAX
+#endif
+
+#ifndef STACK_POINTER_OFFSET
+#define STACK_POINTER_OFFSET 0
+#endif
+
+#ifndef LOCAL_REGNO
+#define LOCAL_REGNO(REGNO) 0
+#endif
+
+/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
+ the stack pointer does not matter. The value is tested only in
+ functions that have frame pointers. */
+#ifndef EXIT_IGNORE_STACK
+#define EXIT_IGNORE_STACK 0
+#endif
+
+/* Assume that case vectors are not pc-relative. */
+#ifndef CASE_VECTOR_PC_RELATIVE
+#define CASE_VECTOR_PC_RELATIVE 0
+#endif
+
+/* Assume that trampolines need function alignment. */
+#ifndef TRAMPOLINE_ALIGNMENT
+#define TRAMPOLINE_ALIGNMENT FUNCTION_BOUNDARY
+#endif
+
+/* Register mappings for target machines without register windows. */
+#ifndef INCOMING_REGNO
+#define INCOMING_REGNO(N) (N)
+#endif
+
+#ifndef OUTGOING_REGNO
+#define OUTGOING_REGNO(N) (N)
+#endif
+
+#ifndef SHIFT_COUNT_TRUNCATED
+#define SHIFT_COUNT_TRUNCATED 0
+#endif
+
+#ifndef LEGITIMIZE_ADDRESS
+#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
+#endif
+
+#ifndef LEGITIMATE_PIC_OPERAND_P
+#define LEGITIMATE_PIC_OPERAND_P(X) 1
+#endif
+
+#ifndef TARGET_MEM_CONSTRAINT
+#define TARGET_MEM_CONSTRAINT 'm'
+#endif
+
+#ifndef REVERSIBLE_CC_MODE
+#define REVERSIBLE_CC_MODE(MODE) 0
+#endif
+
+/* Biggest alignment supported by the object file format of this machine. */
+#ifndef MAX_OFILE_ALIGNMENT
+#define MAX_OFILE_ALIGNMENT BIGGEST_ALIGNMENT
+#endif
+
+#ifndef FRAME_GROWS_DOWNWARD
+#define FRAME_GROWS_DOWNWARD 0
+#endif
+
+/* On most machines, the CFA coincides with the first incoming parm. */
+#ifndef ARG_POINTER_CFA_OFFSET
+#define ARG_POINTER_CFA_OFFSET(FNDECL) FIRST_PARM_OFFSET (FNDECL)
+#endif
+
+/* On most machines, we use the CFA as DW_AT_frame_base. */
+#ifndef CFA_FRAME_BASE_OFFSET
+#define CFA_FRAME_BASE_OFFSET(FNDECL) 0
+#endif
+
+/* The offset from the incoming value of %sp to the top of the stack frame
+ for the current function. */
+#ifndef INCOMING_FRAME_SP_OFFSET
+#define INCOMING_FRAME_SP_OFFSET 0
+#endif
+
+#ifndef HARD_REGNO_NREGS_HAS_PADDING
+#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) 0
+#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) -1
+#endif
+
+#ifndef OUTGOING_REG_PARM_STACK_SPACE
+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 0
+#endif
+
+/* MAX_STACK_ALIGNMENT is the maximum stack alignment guaranteed by
+ the backend. MAX_SUPPORTED_STACK_ALIGNMENT is the maximum best
+ effort stack alignment supported by the backend. If the backend
+ supports stack alignment, MAX_SUPPORTED_STACK_ALIGNMENT and
+ MAX_STACK_ALIGNMENT are the same. Otherwise, the incoming stack
+ boundary will limit the maximum guaranteed stack alignment. */
+#ifdef MAX_STACK_ALIGNMENT
+#define MAX_SUPPORTED_STACK_ALIGNMENT MAX_STACK_ALIGNMENT
+#else
+#define MAX_STACK_ALIGNMENT STACK_BOUNDARY
+#define MAX_SUPPORTED_STACK_ALIGNMENT PREFERRED_STACK_BOUNDARY
+#endif
+
+#define SUPPORTS_STACK_ALIGNMENT (MAX_STACK_ALIGNMENT > STACK_BOUNDARY)
+
+#ifndef LOCAL_ALIGNMENT
+#define LOCAL_ALIGNMENT(TYPE, ALIGNMENT) ALIGNMENT
+#endif
+
+#ifndef STACK_SLOT_ALIGNMENT
+#define STACK_SLOT_ALIGNMENT(TYPE,MODE,ALIGN) \
+ ((TYPE) ? LOCAL_ALIGNMENT ((TYPE), (ALIGN)) : (ALIGN))
+#endif
+
+#ifndef LOCAL_DECL_ALIGNMENT
+#define LOCAL_DECL_ALIGNMENT(DECL) \
+ LOCAL_ALIGNMENT (TREE_TYPE (DECL), DECL_ALIGN (DECL))
+#endif
+
+#ifndef MINIMUM_ALIGNMENT
+#define MINIMUM_ALIGNMENT(EXP,MODE,ALIGN) (ALIGN)
+#endif
+
+/* Alignment value for attribute ((aligned)). */
+#ifndef ATTRIBUTE_ALIGNED_VALUE
+#define ATTRIBUTE_ALIGNED_VALUE BIGGEST_ALIGNMENT
+#endif
+
+#endif /* ! GCC_DEFAULTS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.def
new file mode 100644
index 0000000..3906419
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.def
@@ -0,0 +1,27 @@
+/* DK_UNSPECIFIED must be first so it has a value of zero. We never
+ assign this kind to an actual diagnostic, we only use this in
+ variables that can hold a kind, to mean they have yet to have a
+ kind specified. I.e. they're uninitialized. Within the diagnostic
+ machinery, this kind also means "don't change the existing kind",
+ meaning "no change is specified". */
+DEFINE_DIAGNOSTIC_KIND (DK_UNSPECIFIED, "")
+
+/* If a diagnostic is set to DK_IGNORED, it won't get reported at all.
+ This is used by the diagnostic machinery when it wants to disable a
+ diagnostic without disabling the option which causes it. */
+DEFINE_DIAGNOSTIC_KIND (DK_IGNORED, "")
+
+/* The remainder are real diagnostic types. */
+DEFINE_DIAGNOSTIC_KIND (DK_FATAL, "fatal error: ")
+DEFINE_DIAGNOSTIC_KIND (DK_ICE, "internal compiler error: ")
+DEFINE_DIAGNOSTIC_KIND (DK_ERROR, "error: ")
+DEFINE_DIAGNOSTIC_KIND (DK_SORRY, "sorry, unimplemented: ")
+DEFINE_DIAGNOSTIC_KIND (DK_WARNING, "warning: ")
+DEFINE_DIAGNOSTIC_KIND (DK_ANACHRONISM, "anachronism: ")
+DEFINE_DIAGNOSTIC_KIND (DK_NOTE, "note: ")
+DEFINE_DIAGNOSTIC_KIND (DK_DEBUG, "debug: ")
+/* These two would be re-classified as DK_WARNING or DK_ERROR, so the
+prefix does not matter. */
+DEFINE_DIAGNOSTIC_KIND (DK_PEDWARN, "pedwarn: ")
+DEFINE_DIAGNOSTIC_KIND (DK_PERMERROR, "permerror: ")
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.h
new file mode 100644
index 0000000..19bc5e9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/diagnostic.h
@@ -0,0 +1,236 @@
+/* Various declarations for language-independent diagnostics subroutines.
+ Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Gabriel Dos Reis <gdr@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_DIAGNOSTIC_H
+#define GCC_DIAGNOSTIC_H
+
+#include "pretty-print.h"
+#include "options.h"
+
+/* Constants used to discriminate diagnostics. */
+typedef enum
+{
+#define DEFINE_DIAGNOSTIC_KIND(K, msgid) K,
+#include "diagnostic.def"
+#undef DEFINE_DIAGNOSTIC_KIND
+ DK_LAST_DIAGNOSTIC_KIND
+} diagnostic_t;
+
+/* A diagnostic is described by the MESSAGE to send, the FILE and LINE of
+ its context and its KIND (ice, error, warning, note, ...) See complete
+ list in diagnostic.def. */
+typedef struct diagnostic_info
+{
+ text_info message;
+ location_t location;
+ /* TREE_BLOCK if the diagnostic is to be reported in some inline
+ function inlined into other function, otherwise NULL. */
+ tree abstract_origin;
+ /* The kind of diagnostic it is about. */
+ diagnostic_t kind;
+ /* Which OPT_* directly controls this diagnostic. */
+ int option_index;
+} diagnostic_info;
+
+/* Forward declarations. */
+typedef struct diagnostic_context diagnostic_context;
+typedef void (*diagnostic_starter_fn) (diagnostic_context *,
+ diagnostic_info *);
+typedef diagnostic_starter_fn diagnostic_finalizer_fn;
+
+/* This data structure bundles altogether any information relevant to
+ the context of a diagnostic message. */
+struct diagnostic_context
+{
+ /* Where most of the diagnostic formatting work is done. */
+ pretty_printer *printer;
+
+ /* The number of times we have issued diagnostics. */
+ int diagnostic_count[DK_LAST_DIAGNOSTIC_KIND];
+
+ /* True if we should display the "warnings are being tread as error"
+ message, usually displayed once per compiler run. */
+ bool issue_warnings_are_errors_message;
+
+ /* True if it has been requested that warnings be treated as errors. */
+ bool warning_as_error_requested;
+
+ /* For each option index that can be passed to warning() et all
+ (OPT_* from options.h), this array may contain a new kind that
+ the diagnostic should be changed to before reporting, or
+ DK_UNSPECIFIED to leave it as the reported kind, or DK_IGNORED to
+ not report it at all. N_OPTS is from <options.h>. */
+ diagnostic_t classify_diagnostic[N_OPTS];
+
+ /* True if we should print the command line option which controls
+ each diagnostic, if known. */
+ bool show_option_requested;
+
+ /* True if we should raise a SIGABRT on errors. */
+ bool abort_on_error;
+
+ /* This function is called before any message is printed out. It is
+ responsible for preparing message prefix and such. For example, it
+ might say:
+ In file included from "/usr/local/include/curses.h:5:
+ from "/home/gdr/src/nifty_printer.h:56:
+ ...
+ */
+ diagnostic_starter_fn begin_diagnostic;
+
+ /* This function is called after the diagnostic message is printed. */
+ diagnostic_finalizer_fn end_diagnostic;
+
+ /* Client hook to report an internal error. */
+ void (*internal_error) (const char *, va_list *);
+
+ /* Function of last diagnostic message; more generally, function such that
+ if next diagnostic message is in it then we don't have to mention the
+ function name. */
+ tree last_function;
+
+ /* Used to detect when the input file stack has changed since last
+ described. */
+ const struct line_map *last_module;
+
+ int lock;
+};
+
+/* Client supplied function to announce a diagnostic. */
+#define diagnostic_starter(DC) (DC)->begin_diagnostic
+
+/* Client supplied function called after a diagnostic message is
+ displayed. */
+#define diagnostic_finalizer(DC) (DC)->end_diagnostic
+
+/* Extension hook for client. */
+#define diagnostic_auxiliary_data(DC) (DC)->x_data
+
+/* Same as pp_format_decoder. Works on 'diagnostic_context *'. */
+#define diagnostic_format_decoder(DC) ((DC)->printer->format_decoder)
+
+/* Same as output_prefixing_rule. Works on 'diagnostic_context *'. */
+#define diagnostic_prefixing_rule(DC) ((DC)->printer->wrapping.rule)
+
+/* Maximum characters per line in automatic line wrapping mode.
+ Zero means don't wrap lines. */
+#define diagnostic_line_cutoff(DC) ((DC)->printer->wrapping.line_cutoff)
+
+#define diagnostic_flush_buffer(DC) pp_base_flush ((DC)->printer)
+
+/* True if the last function in which a diagnostic was reported is
+ different from the current one. */
+#define diagnostic_last_function_changed(DC, DI) \
+ ((DC)->last_function != ((DI)->abstract_origin \
+ ? (DI)->abstract_origin : current_function_decl))
+
+/* Remember the current function as being the last one in which we report
+ a diagnostic. */
+#define diagnostic_set_last_function(DC, DI) \
+ (DC)->last_function = (((DI) && (DI)->abstract_origin) \
+ ? (DI)->abstract_origin : current_function_decl)
+
+/* True if the last module or file in which a diagnostic was reported is
+ different from the current one. */
+#define diagnostic_last_module_changed(DC, MAP) \
+ ((DC)->last_module != MAP)
+
+/* Remember the current module or file as being the last one in which we
+ report a diagnostic. */
+#define diagnostic_set_last_module(DC, MAP) \
+ (DC)->last_module = MAP
+
+/* Raise SIGABRT on any diagnostic of severity DK_ERROR or higher. */
+#define diagnostic_abort_on_error(DC) \
+ (DC)->abort_on_error = true
+
+/* This diagnostic_context is used by front-ends that directly output
+ diagnostic messages without going through `error', `warning',
+ and similar functions. */
+extern diagnostic_context *global_dc;
+
+/* The total count of a KIND of diagnostics emitted so far. */
+#define diagnostic_kind_count(DC, DK) (DC)->diagnostic_count[(int) (DK)]
+
+/* The number of errors that have been issued so far. Ideally, these
+ would take a diagnostic_context as an argument. */
+#define errorcount diagnostic_kind_count (global_dc, DK_ERROR)
+/* Similarly, but for warnings. */
+#define warningcount diagnostic_kind_count (global_dc, DK_WARNING)
+/* Similarly, but for sorrys. */
+#define sorrycount diagnostic_kind_count (global_dc, DK_SORRY)
+
+/* Returns nonzero if warnings should be emitted. */
+#define diagnostic_report_warnings_p(LOC) \
+ (!inhibit_warnings \
+ && !(in_system_header_at (LOC) && !warn_system_headers))
+
+#define report_diagnostic(D) diagnostic_report_diagnostic (global_dc, D)
+
+/* Diagnostic related functions. */
+extern void diagnostic_initialize (diagnostic_context *);
+extern void diagnostic_report_current_module (diagnostic_context *);
+extern void diagnostic_report_current_function (diagnostic_context *,
+ diagnostic_info *);
+
+/* Force diagnostics controlled by OPTIDX to be kind KIND. */
+extern diagnostic_t diagnostic_classify_diagnostic (diagnostic_context *,
+ int /* optidx */,
+ diagnostic_t /* kind */);
+extern bool diagnostic_report_diagnostic (diagnostic_context *,
+ diagnostic_info *);
+#ifdef ATTRIBUTE_GCC_DIAG
+extern void diagnostic_set_info (diagnostic_info *, const char *, va_list *,
+ location_t, diagnostic_t) ATTRIBUTE_GCC_DIAG(2,0);
+extern void diagnostic_set_info_translated (diagnostic_info *, const char *,
+ va_list *, location_t,
+ diagnostic_t)
+ ATTRIBUTE_GCC_DIAG(2,0);
+extern bool emit_diagnostic (diagnostic_t, location_t, int,
+ const char *, ...) ATTRIBUTE_GCC_DIAG(4,5);
+#endif
+extern char *diagnostic_build_prefix (diagnostic_info *);
+
+/* Pure text formatting support functions. */
+extern char *file_name_as_prefix (const char *);
+
+/* In tree-pretty-print.c */
+extern void print_declaration (pretty_printer *, tree, int, int);
+extern int dump_generic_node (pretty_printer *, tree, int, int, bool);
+extern void print_generic_stmt (FILE *, tree, int);
+extern void print_generic_stmt_indented (FILE *, tree, int, int);
+extern void print_generic_expr (FILE *, tree, int);
+extern void print_generic_decl (FILE *, tree, int);
+extern void debug_c_tree (tree);
+extern void dump_omp_clauses (pretty_printer *, tree, int, int);
+
+/* In gimple-pretty-print.c */
+extern void debug_generic_expr (tree);
+extern void debug_generic_stmt (tree);
+extern void debug_tree_chain (tree);
+extern void debug_gimple_stmt (gimple);
+extern void debug_gimple_seq (gimple_seq);
+extern void print_gimple_seq (FILE *, gimple_seq, int, int);
+extern void print_gimple_stmt (FILE *, gimple, int, int);
+extern void print_gimple_expr (FILE *, gimple, int, int);
+extern void dump_gimple_stmt (pretty_printer *, gimple, int, int);
+
+#endif /* ! GCC_DIAGNOSTIC_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/double-int.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/double-int.h
new file mode 100644
index 0000000..d35a52c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/double-int.h
@@ -0,0 +1,188 @@
+/* Operations with long integers.
+ Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef DOUBLE_INT_H
+#define DOUBLE_INT_H
+
+#ifndef GENERATOR_FILE
+#include <gmp.h>
+#endif
+#include "coretypes.h"
+
+/* A large integer is currently represented as a pair of HOST_WIDE_INTs.
+ It therefore represents a number with precision of
+ 2 * HOST_BITS_PER_WIDE_INT bits (it is however possible that the
+ internal representation will change, if numbers with greater precision
+ are needed, so the users should not rely on it). The representation does
+ not contain any information about signedness of the represented value, so
+ it can be used to represent both signed and unsigned numbers. For
+ operations where the results depend on signedness (division, comparisons),
+ it must be specified separately. For each such operation, there are three
+ versions of the function -- double_int_op, that takes an extra UNS argument
+ giving the signedness of the values, and double_int_sop and double_int_uop
+ that stand for its specializations for signed and unsigned values.
+
+ You may also represent with numbers in smaller precision using double_int.
+ You however need to use double_int_ext (that fills in the bits of the
+ number over the prescribed precision with zeros or with the sign bit) before
+ operations that do not perform arithmetics modulo 2^precision (comparisons,
+ division), and possibly before storing the results, if you want to keep
+ them in some canonical form). In general, the signedness of double_int_ext
+ should match the signedness of the operation.
+
+ ??? The components of double_int differ in signedness mostly for
+ historical reasons (they replace an older structure used to represent
+ numbers with precision higher than HOST_WIDE_INT). It might be less
+ confusing to have them both signed or both unsigned. */
+
+typedef struct
+{
+ unsigned HOST_WIDE_INT low;
+ HOST_WIDE_INT high;
+} double_int;
+
+union tree_node;
+
+/* Constructors and conversions. */
+
+union tree_node *double_int_to_tree (union tree_node *, double_int);
+bool double_int_fits_to_tree_p (const union tree_node *, double_int);
+double_int tree_to_double_int (const union tree_node *);
+
+/* Constructs double_int from integer CST. The bits over the precision of
+ HOST_WIDE_INT are filled with the sign bit. */
+
+static inline double_int
+shwi_to_double_int (HOST_WIDE_INT cst)
+{
+ double_int r;
+
+ r.low = (unsigned HOST_WIDE_INT) cst;
+ r.high = cst < 0 ? -1 : 0;
+
+ return r;
+}
+
+/* Some useful constants. */
+
+#define double_int_minus_one (shwi_to_double_int (-1))
+#define double_int_zero (shwi_to_double_int (0))
+#define double_int_one (shwi_to_double_int (1))
+#define double_int_two (shwi_to_double_int (2))
+#define double_int_ten (shwi_to_double_int (10))
+
+/* Constructs double_int from unsigned integer CST. The bits over the
+ precision of HOST_WIDE_INT are filled with zeros. */
+
+static inline double_int
+uhwi_to_double_int (unsigned HOST_WIDE_INT cst)
+{
+ double_int r;
+
+ r.low = cst;
+ r.high = 0;
+
+ return r;
+}
+
+/* The following operations perform arithmetics modulo 2^precision,
+ so you do not need to call double_int_ext between them, even if
+ you are representing numbers with precision less than
+ 2 * HOST_BITS_PER_WIDE_INT bits. */
+
+double_int double_int_mul (double_int, double_int);
+double_int double_int_add (double_int, double_int);
+double_int double_int_neg (double_int);
+
+/* You must ensure that double_int_ext is called on the operands
+ of the following operations, if the precision of the numbers
+ is less than 2 * HOST_BITS_PER_WIDE_INT bits. */
+bool double_int_fits_in_hwi_p (double_int, bool);
+bool double_int_fits_in_shwi_p (double_int);
+bool double_int_fits_in_uhwi_p (double_int);
+HOST_WIDE_INT double_int_to_shwi (double_int);
+unsigned HOST_WIDE_INT double_int_to_uhwi (double_int);
+double_int double_int_div (double_int, double_int, bool, unsigned);
+double_int double_int_sdiv (double_int, double_int, unsigned);
+double_int double_int_udiv (double_int, double_int, unsigned);
+double_int double_int_mod (double_int, double_int, bool, unsigned);
+double_int double_int_smod (double_int, double_int, unsigned);
+double_int double_int_umod (double_int, double_int, unsigned);
+double_int double_int_divmod (double_int, double_int, bool, unsigned, double_int *);
+double_int double_int_sdivmod (double_int, double_int, unsigned, double_int *);
+double_int double_int_udivmod (double_int, double_int, unsigned, double_int *);
+bool double_int_negative_p (double_int);
+int double_int_cmp (double_int, double_int, bool);
+int double_int_scmp (double_int, double_int);
+int double_int_ucmp (double_int, double_int);
+void dump_double_int (FILE *, double_int, bool);
+
+/* Zero and sign extension of numbers in smaller precisions. */
+
+double_int double_int_ext (double_int, unsigned, bool);
+double_int double_int_sext (double_int, unsigned);
+double_int double_int_zext (double_int, unsigned);
+double_int double_int_mask (unsigned);
+
+#define ALL_ONES (~((unsigned HOST_WIDE_INT) 0))
+
+/* The operands of the following comparison functions must be processed
+ with double_int_ext, if their precision is less than
+ 2 * HOST_BITS_PER_WIDE_INT bits. */
+
+/* Returns true if CST is zero. */
+
+static inline bool
+double_int_zero_p (double_int cst)
+{
+ return cst.low == 0 && cst.high == 0;
+}
+
+/* Returns true if CST is one. */
+
+static inline bool
+double_int_one_p (double_int cst)
+{
+ return cst.low == 1 && cst.high == 0;
+}
+
+/* Returns true if CST is minus one. */
+
+static inline bool
+double_int_minus_one_p (double_int cst)
+{
+ return (cst.low == ALL_ONES && cst.high == -1);
+}
+
+/* Returns true if CST1 == CST2. */
+
+static inline bool
+double_int_equal_p (double_int cst1, double_int cst2)
+{
+ return cst1.low == cst2.low && cst1.high == cst2.high;
+}
+
+#ifndef GENERATOR_FILE
+/* Conversion to and from GMP integer representations. */
+
+void mpz_set_double_int (mpz_t, double_int, bool);
+double_int mpz_get_double_int (const_tree, mpz_t, bool);
+#endif
+
+#endif /* DOUBLE_INT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/filenames.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/filenames.h
new file mode 100644
index 0000000..0d411cc
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/filenames.h
@@ -0,0 +1,60 @@
+/* Macros for taking apart, interpreting and processing file names.
+
+ These are here because some non-Posix (a.k.a. DOSish) systems have
+ drive letter brain-damage at the beginning of an absolute file name,
+ use forward- and back-slash in path names interchangeably, and
+ some of them have case-insensitive file names.
+
+ Copyright 2000, 2001, 2007 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef FILENAMES_H
+#define FILENAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__)
+
+#ifndef HAVE_DOS_BASED_FILE_SYSTEM
+#define HAVE_DOS_BASED_FILE_SYSTEM 1
+#endif
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/' || (c) == '\\')
+/* Note that IS_ABSOLUTE_PATH accepts d:foo as well, although it is
+ only semi-absolute. This is because the users of IS_ABSOLUTE_PATH
+ want to know whether to prepend the current working directory to
+ a file name, which should not be done with a name like d:foo. */
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]) || (((f)[0]) && ((f)[1] == ':')))
+
+#else /* not DOSish */
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/')
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]))
+
+#endif /* not DOSish */
+
+extern int filename_cmp (const char *s1, const char *s2);
+#define FILENAME_CMP(s1, s2) filename_cmp(s1, s2)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FILENAMES_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/fixed-value.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/fixed-value.h
new file mode 100644
index 0000000..69db190
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/fixed-value.h
@@ -0,0 +1,100 @@
+/* Fixed-point arithmetic support.
+ Copyright (C) 2006, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_FIXED_VALUE_H
+#define GCC_FIXED_VALUE_H
+
+#include "machmode.h"
+#include "real.h"
+#include "double-int.h"
+
+struct fixed_value GTY(())
+{
+ double_int data; /* Store data up to 2 wide integers. */
+ unsigned int mode; /* Use machine mode to know IBIT and FBIT. */
+};
+
+#define FIXED_VALUE_TYPE struct fixed_value
+
+#define MAX_FCONST0 18 /* For storing 18 fixed-point zeros per
+ fract, ufract, accum, and uaccum modes . */
+#define MAX_FCONST1 8 /* For storing 8 fixed-point ones per accum
+ and uaccum modes. */
+/* Constant fixed-point values 0 and 1. */
+extern FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
+extern FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
+
+/* Macros to access fconst0 and fconst1 via machine modes. */
+#define FCONST0(mode) fconst0[mode - QQmode]
+#define FCONST1(mode) fconst1[mode - HAmode]
+
+/* Return a CONST_FIXED with value R and mode M. */
+#define CONST_FIXED_FROM_FIXED_VALUE(r, m) \
+ const_fixed_from_fixed_value (r, m)
+extern rtx const_fixed_from_fixed_value (FIXED_VALUE_TYPE, enum machine_mode);
+
+/* Initialize from a decimal or hexadecimal string. */
+extern void fixed_from_string (FIXED_VALUE_TYPE *, const char *,
+ enum machine_mode);
+
+/* In tree.c: wrap up a FIXED_VALUE_TYPE in a tree node. */
+extern tree build_fixed (tree, FIXED_VALUE_TYPE);
+
+/* Extend or truncate to a new mode. */
+extern bool fixed_convert (FIXED_VALUE_TYPE *, enum machine_mode,
+ const FIXED_VALUE_TYPE *, bool);
+
+/* Convert to a fixed-point mode from an integer. */
+extern bool fixed_convert_from_int (FIXED_VALUE_TYPE *, enum machine_mode,
+ double_int, bool, bool);
+
+/* Convert to a fixed-point mode from a real. */
+extern bool fixed_convert_from_real (FIXED_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *, bool);
+
+/* Convert to a real mode from a fixed-point. */
+extern void real_convert_from_fixed (REAL_VALUE_TYPE *, enum machine_mode,
+ const FIXED_VALUE_TYPE *);
+
+/* Compare two fixed-point objects for bitwise identity. */
+extern bool fixed_identical (const FIXED_VALUE_TYPE *, const FIXED_VALUE_TYPE *);
+
+/* Calculate a hash value. */
+extern unsigned int fixed_hash (const FIXED_VALUE_TYPE *);
+
+#define FIXED_VALUES_IDENTICAL(x, y) fixed_identical (&(x), &(y))
+
+/* Determine whether a fixed-point value X is negative. */
+#define FIXED_VALUE_NEGATIVE(x) fixed_isneg (&(x))
+
+/* Render F as a decimal floating point constant. */
+extern void fixed_to_decimal (char *str, const FIXED_VALUE_TYPE *, size_t);
+
+/* Binary or unary arithmetic on tree_code. */
+extern bool fixed_arithmetic (FIXED_VALUE_TYPE *, int, const FIXED_VALUE_TYPE *,
+ const FIXED_VALUE_TYPE *, bool);
+
+/* Compare fixed-point values by tree_code. */
+extern bool fixed_compare (int, const FIXED_VALUE_TYPE *,
+ const FIXED_VALUE_TYPE *);
+
+/* Determine whether a fixed-point value X is negative. */
+extern bool fixed_isneg (const FIXED_VALUE_TYPE *);
+
+#endif /* GCC_FIXED_VALUE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/function.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/function.h
new file mode 100644
index 0000000..9678467
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/function.h
@@ -0,0 +1,749 @@
+/* Structure for saving state for a nested function.
+ Copyright (C) 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_FUNCTION_H
+#define GCC_FUNCTION_H
+
+#include "tree.h"
+#include "hashtab.h"
+#include "varray.h"
+
+/* Stack of pending (incomplete) sequences saved by `start_sequence'.
+ Each element describes one pending sequence.
+ The main insn-chain is saved in the last element of the chain,
+ unless the chain is empty. */
+
+struct sequence_stack GTY(())
+{
+ /* First and last insns in the chain of the saved sequence. */
+ rtx first;
+ rtx last;
+ struct sequence_stack *next;
+};
+
+struct emit_status GTY(())
+{
+ /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
+ After rtl generation, it is 1 plus the largest register number used. */
+ int x_reg_rtx_no;
+
+ /* Lowest label number in current function. */
+ int x_first_label_num;
+
+ /* The ends of the doubly-linked chain of rtl for the current function.
+ Both are reset to null at the start of rtl generation for the function.
+
+ start_sequence saves both of these on `sequence_stack' and then starts
+ a new, nested sequence of insns. */
+ rtx x_first_insn;
+ rtx x_last_insn;
+
+ /* Stack of pending (incomplete) sequences saved by `start_sequence'.
+ Each element describes one pending sequence.
+ The main insn-chain is saved in the last element of the chain,
+ unless the chain is empty. */
+ struct sequence_stack *sequence_stack;
+
+ /* INSN_UID for next insn emitted.
+ Reset to 1 for each function compiled. */
+ int x_cur_insn_uid;
+
+ /* Location the last line-number NOTE emitted.
+ This is used to avoid generating duplicates. */
+ location_t x_last_location;
+
+ /* The length of the regno_pointer_align, regno_decl, and x_regno_reg_rtx
+ vectors. Since these vectors are needed during the expansion phase when
+ the total number of registers in the function is not yet known, the
+ vectors are copied and made bigger when necessary. */
+ int regno_pointer_align_length;
+
+ /* Indexed by pseudo register number, if nonzero gives the known alignment
+ for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
+ Allocated in parallel with x_regno_reg_rtx. */
+ unsigned char * GTY((skip)) regno_pointer_align;
+};
+
+
+/* Indexed by pseudo register number, gives the rtx for that pseudo.
+ Allocated in parallel with regno_pointer_align.
+ FIXME: We could put it into emit_status struct, but gengtype is not able to deal
+ with length attribute nested in top level structures. */
+
+extern GTY ((length ("crtl->emit.x_reg_rtx_no"))) rtx * regno_reg_rtx;
+
+/* For backward compatibility... eventually these should all go away. */
+#define reg_rtx_no (crtl->emit.x_reg_rtx_no)
+#define seq_stack (crtl->emit.sequence_stack)
+
+#define REGNO_POINTER_ALIGN(REGNO) (crtl->emit.regno_pointer_align[REGNO])
+
+struct expr_status GTY(())
+{
+ /* Number of units that we should eventually pop off the stack.
+ These are the arguments to function calls that have already returned. */
+ int x_pending_stack_adjust;
+
+ /* Under some ABIs, it is the caller's responsibility to pop arguments
+ pushed for function calls. A naive implementation would simply pop
+ the arguments immediately after each call. However, if several
+ function calls are made in a row, it is typically cheaper to pop
+ all the arguments after all of the calls are complete since a
+ single pop instruction can be used. Therefore, GCC attempts to
+ defer popping the arguments until absolutely necessary. (For
+ example, at the end of a conditional, the arguments must be popped,
+ since code outside the conditional won't know whether or not the
+ arguments need to be popped.)
+
+ When INHIBIT_DEFER_POP is nonzero, however, the compiler does not
+ attempt to defer pops. Instead, the stack is popped immediately
+ after each call. Rather then setting this variable directly, use
+ NO_DEFER_POP and OK_DEFER_POP. */
+ int x_inhibit_defer_pop;
+
+ /* If PREFERRED_STACK_BOUNDARY and PUSH_ROUNDING are defined, the stack
+ boundary can be momentarily unaligned while pushing the arguments.
+ Record the delta since last aligned boundary here in order to get
+ stack alignment in the nested function calls working right. */
+ int x_stack_pointer_delta;
+
+ /* Nonzero means __builtin_saveregs has already been done in this function.
+ The value is the pseudoreg containing the value __builtin_saveregs
+ returned. */
+ rtx x_saveregs_value;
+
+ /* Similarly for __builtin_apply_args. */
+ rtx x_apply_args_value;
+
+ /* List of labels that must never be deleted. */
+ rtx x_forced_labels;
+};
+
+typedef struct call_site_record *call_site_record;
+DEF_VEC_P(call_site_record);
+DEF_VEC_ALLOC_P(call_site_record, gc);
+
+/* RTL representation of exception handling. */
+struct rtl_eh GTY(())
+{
+ rtx filter;
+ rtx exc_ptr;
+
+ int built_landing_pads;
+
+ rtx ehr_stackadj;
+ rtx ehr_handler;
+ rtx ehr_label;
+
+ rtx sjlj_fc;
+ rtx sjlj_exit_after;
+
+ htab_t GTY ((param_is (struct ehl_map_entry))) exception_handler_label_map;
+
+ VEC(tree,gc) *ttype_data;
+ varray_type ehspec_data;
+ varray_type action_record_data;
+
+ VEC(call_site_record,gc) *call_site_record;
+};
+
+#define pending_stack_adjust (crtl->expr.x_pending_stack_adjust)
+#define inhibit_defer_pop (crtl->expr.x_inhibit_defer_pop)
+#define saveregs_value (crtl->expr.x_saveregs_value)
+#define apply_args_value (crtl->expr.x_apply_args_value)
+#define forced_labels (crtl->expr.x_forced_labels)
+#define stack_pointer_delta (crtl->expr.x_stack_pointer_delta)
+
+struct gimple_df;
+struct temp_slot;
+typedef struct temp_slot *temp_slot_p;
+struct call_site_record;
+
+DEF_VEC_P(temp_slot_p);
+DEF_VEC_ALLOC_P(temp_slot_p,gc);
+struct ipa_opt_pass;
+typedef struct ipa_opt_pass *ipa_opt_pass;
+
+DEF_VEC_P(ipa_opt_pass);
+DEF_VEC_ALLOC_P(ipa_opt_pass,heap);
+
+enum function_frequency {
+ /* This function most likely won't be executed at all.
+ (set only when profile feedback is available or via function attribute). */
+ FUNCTION_FREQUENCY_UNLIKELY_EXECUTED,
+ /* The default value. */
+ FUNCTION_FREQUENCY_NORMAL,
+ /* Optimize this function hard
+ (set only when profile feedback is available or via function attribute). */
+ FUNCTION_FREQUENCY_HOT
+};
+
+struct varasm_status GTY(())
+{
+ /* If we're using a per-function constant pool, this is it. */
+ struct rtx_constant_pool *pool;
+
+ /* Number of tree-constants deferred during the expansion of this
+ function. */
+ unsigned int deferred_constants;
+};
+
+/* Information mainlined about RTL representation of incoming arguments. */
+struct incoming_args GTY(())
+{
+ /* Number of bytes of args popped by function being compiled on its return.
+ Zero if no bytes are to be popped.
+ May affect compilation of return insn or of function epilogue. */
+ int pops_args;
+
+ /* If function's args have a fixed size, this is that size, in bytes.
+ Otherwise, it is -1.
+ May affect compilation of return insn or of function epilogue. */
+ int size;
+
+ /* # bytes the prologue should push and pretend that the caller pushed them.
+ The prologue must do this, but only if parms can be passed in
+ registers. */
+ int pretend_args_size;
+
+ /* This is the offset from the arg pointer to the place where the first
+ anonymous arg can be found, if there is one. */
+ rtx arg_offset_rtx;
+
+ /* Quantities of various kinds of registers
+ used for the current function's args. */
+ CUMULATIVE_ARGS info;
+
+ /* The arg pointer hard register, or the pseudo into which it was copied. */
+ rtx internal_arg_pointer;
+};
+
+/* Data for function partitioning. */
+struct function_subsections GTY(())
+{
+ /* Assembly labels for the hot and cold text sections, to
+ be used by debugger functions for determining the size of text
+ sections. */
+
+ const char *hot_section_label;
+ const char *cold_section_label;
+ const char *hot_section_end_label;
+ const char *cold_section_end_label;
+
+ /* String to be used for name of cold text sections, via
+ targetm.asm_out.named_section. */
+
+ const char *unlikely_text_section_name;
+};
+
+/* Datastructures maintained for currently processed function in RTL form. */
+struct rtl_data GTY(())
+{
+ struct expr_status expr;
+ struct emit_status emit;
+ struct varasm_status varasm;
+ struct incoming_args args;
+ struct function_subsections subsections;
+ struct rtl_eh eh;
+
+ /* For function.c */
+
+ /* # of bytes of outgoing arguments. If ACCUMULATE_OUTGOING_ARGS is
+ defined, the needed space is pushed by the prologue. */
+ int outgoing_args_size;
+
+ /* If nonzero, an RTL expression for the location at which the current
+ function returns its result. If the current function returns its
+ result in a register, current_function_return_rtx will always be
+ the hard register containing the result. */
+ rtx return_rtx;
+
+ /* Opaque pointer used by get_hard_reg_initial_val and
+ has_hard_reg_initial_val (see integrate.[hc]). */
+ struct initial_value_struct *hard_reg_initial_vals;
+
+ /* A variable living at the top of the frame that holds a known value.
+ Used for detecting stack clobbers. */
+ tree stack_protect_guard;
+
+ /* List (chain of EXPR_LIST) of labels heading the current handlers for
+ nonlocal gotos. */
+ rtx x_nonlocal_goto_handler_labels;
+
+ /* Label that will go on function epilogue.
+ Jumping to this label serves as a "return" instruction
+ on machines which require execution of the epilogue on all returns. */
+ rtx x_return_label;
+
+ /* Label that will go on the end of function epilogue.
+ Jumping to this label serves as a "naked return" instruction
+ on machines which require execution of the epilogue on all returns. */
+ rtx x_naked_return_label;
+
+ /* List (chain of EXPR_LISTs) of all stack slots in this function.
+ Made for the sake of unshare_all_rtl. */
+ rtx x_stack_slot_list;
+
+ /* Place after which to insert the tail_recursion_label if we need one. */
+ rtx x_stack_check_probe_note;
+
+ /* Location at which to save the argument pointer if it will need to be
+ referenced. There are two cases where this is done: if nonlocal gotos
+ exist, or if vars stored at an offset from the argument pointer will be
+ needed by inner routines. */
+ rtx x_arg_pointer_save_area;
+
+ /* Dynamic Realign Argument Pointer used for realigning stack. */
+ rtx drap_reg;
+
+ /* Offset to end of allocated area of stack frame.
+ If stack grows down, this is the address of the last stack slot allocated.
+ If stack grows up, this is the address for the next slot. */
+ HOST_WIDE_INT x_frame_offset;
+
+ /* Insn after which register parms and SAVE_EXPRs are born, if nonopt. */
+ rtx x_parm_birth_insn;
+
+ /* List of all used temporaries allocated, by level. */
+ VEC(temp_slot_p,gc) *x_used_temp_slots;
+
+ /* List of available temp slots. */
+ struct temp_slot *x_avail_temp_slots;
+
+ /* Current nesting level for temporaries. */
+ int x_temp_slot_level;
+
+ /* The largest alignment needed on the stack, including requirement
+ for outgoing stack alignment. */
+ unsigned int stack_alignment_needed;
+
+ /* Preferred alignment of the end of stack frame, which is preferred
+ to call other functions. */
+ unsigned int preferred_stack_boundary;
+
+ /* The minimum alignment of parameter stack. */
+ unsigned int parm_stack_boundary;
+
+ /* The largest alignment of slot allocated on the stack. */
+ unsigned int max_used_stack_slot_alignment;
+
+ /* The stack alignment estimated before reload, with consideration of
+ following factors:
+ 1. Alignment of local stack variables (max_used_stack_slot_alignment)
+ 2. Alignment requirement to call other functions
+ (preferred_stack_boundary)
+ 3. Alignment of non-local stack variables but might be spilled in
+ local stack. */
+ unsigned int stack_alignment_estimated;
+
+ /* For reorg. */
+
+ /* If some insns can be deferred to the delay slots of the epilogue, the
+ delay list for them is recorded here. */
+ rtx epilogue_delay_list;
+
+ /* Nonzero if function being compiled called builtin_return_addr or
+ builtin_frame_address with nonzero count. */
+ bool accesses_prior_frames;
+
+ /* Nonzero if the function calls __builtin_eh_return. */
+ bool calls_eh_return;
+
+ /* Nonzero if function saves all registers, e.g. if it has a nonlocal
+ label that can reach the exit block via non-exceptional paths. */
+ bool saves_all_registers;
+
+ /* Nonzero if function being compiled has nonlocal gotos to parent
+ function. */
+ bool has_nonlocal_goto;
+
+ /* Nonzero if function being compiled has an asm statement. */
+ bool has_asm_statement;
+
+ /* This bit is used by the exception handling logic. It is set if all
+ calls (if any) are sibling calls. Such functions do not have to
+ have EH tables generated, as they cannot throw. A call to such a
+ function, however, should be treated as throwing if any of its callees
+ can throw. */
+ bool all_throwers_are_sibcalls;
+
+ /* Nonzero if stack limit checking should be enabled in the current
+ function. */
+ bool limit_stack;
+
+ /* Nonzero if profiling code should be generated. */
+ bool profile;
+
+ /* Nonzero if the current function uses the constant pool. */
+ bool uses_const_pool;
+
+ /* Nonzero if the current function uses pic_offset_table_rtx. */
+ bool uses_pic_offset_table;
+
+ /* Nonzero if the current function needs an lsda for exception handling. */
+ bool uses_eh_lsda;
+
+ /* Set when the tail call has been produced. */
+ bool tail_call_emit;
+
+ /* Nonzero if code to initialize arg_pointer_save_area has been emitted. */
+ bool arg_pointer_save_area_init;
+
+ /* Nonzero if current function must be given a frame pointer.
+ Set in global.c if anything is allocated on the stack there. */
+ bool frame_pointer_needed;
+
+ /* When set, expand should optimize for speed. */
+ bool maybe_hot_insn_p;
+
+ /* Nonzero if function stack realignment is needed. This flag may be
+ set twice: before and after reload. It is set before reload wrt
+ stack alignment estimation before reload. It will be changed after
+ reload if by then criteria of stack realignment is different.
+ The value set after reload is the accurate one and is finalized. */
+ bool stack_realign_needed;
+
+ /* Nonzero if function stack realignment is tried. This flag is set
+ only once before reload. It affects register elimination. This
+ is used to generate DWARF debug info for stack variables. */
+ bool stack_realign_tried;
+
+ /* Nonzero if function being compiled needs dynamic realigned
+ argument pointer (drap) if stack needs realigning. */
+ bool need_drap;
+
+ /* Nonzero if function stack realignment estimation is done, namely
+ stack_realign_needed flag has been set before reload wrt estimated
+ stack alignment info. */
+ bool stack_realign_processed;
+
+ /* Nonzero if function stack realignment has been finalized, namely
+ stack_realign_needed flag has been set and finalized after reload. */
+ bool stack_realign_finalized;
+
+ /* True if dbr_schedule has already been called for this function. */
+ bool dbr_scheduled_p;
+};
+
+#define return_label (crtl->x_return_label)
+#define naked_return_label (crtl->x_naked_return_label)
+#define stack_slot_list (crtl->x_stack_slot_list)
+#define parm_birth_insn (crtl->x_parm_birth_insn)
+#define frame_offset (crtl->x_frame_offset)
+#define stack_check_probe_note (crtl->x_stack_check_probe_note)
+#define arg_pointer_save_area (crtl->x_arg_pointer_save_area)
+#define used_temp_slots (crtl->x_used_temp_slots)
+#define avail_temp_slots (crtl->x_avail_temp_slots)
+#define temp_slot_level (crtl->x_temp_slot_level)
+#define nonlocal_goto_handler_labels (crtl->x_nonlocal_goto_handler_labels)
+#define frame_pointer_needed (crtl->frame_pointer_needed)
+#define stack_realign_fp (crtl->stack_realign_needed && !crtl->need_drap)
+#define stack_realign_drap (crtl->stack_realign_needed && crtl->need_drap)
+
+extern GTY(()) struct rtl_data x_rtl;
+
+/* Accessor to RTL datastructures. We keep them statically allocated now since
+ we never keep multiple functions. For threaded compiler we might however
+ want to do differently. */
+#define crtl (&x_rtl)
+
+/* This structure can save all the important global and static variables
+ describing the status of the current function. */
+
+struct function GTY(())
+{
+ struct eh_status *eh;
+
+ /* The control flow graph for this function. */
+ struct control_flow_graph *cfg;
+
+ /* GIMPLE body for this function. */
+ struct gimple_seq_d *gimple_body;
+
+ /* SSA and dataflow information. */
+ struct gimple_df *gimple_df;
+
+ /* The loops in this function. */
+ struct loops *x_current_loops;
+
+ /* Value histograms attached to particular statements. */
+ htab_t GTY((skip)) value_histograms;
+
+ /* For function.c. */
+
+ /* Points to the FUNCTION_DECL of this function. */
+ tree decl;
+
+ /* A PARM_DECL that should contain the static chain for this function.
+ It will be initialized at the beginning of the function. */
+ tree static_chain_decl;
+
+ /* An expression that contains the non-local goto save area. The first
+ word is the saved frame pointer and the second is the saved stack
+ pointer. */
+ tree nonlocal_goto_save_area;
+
+ /* Function's module id. */
+ unsigned module_id;
+
+ /* Function sequence number for profiling, debugging, etc. */
+ int funcdef_no;
+
+ /* List of function local variables, functions, types and constants. */
+ tree local_decls;
+
+ /* For md files. */
+
+ /* tm.h can use this to store whatever it likes. */
+ struct machine_function * GTY ((maybe_undef)) machine;
+
+ /* Language-specific code can use this to store whatever it likes. */
+ struct language_function * language;
+
+ /* Used types hash table. */
+ htab_t GTY ((param_is (union tree_node))) used_types_hash;
+
+ /* Map between variables synthesized in stack_overlay to the original
+ variables. Used in RTL emission.*/
+ htab_t GTY ((param_is (struct overlay_decl_mapping))) union_decl_list_map;
+
+ /* Last statement uid. */
+ int last_stmt_uid;
+
+ /* Line number of the start of the function for debugging purposes. */
+ location_t function_start_locus;
+
+ /* Line number of the end of the function. */
+ location_t function_end_locus;
+
+ /* Properties used by the pass manager. */
+ unsigned int curr_properties;
+ unsigned int last_verified;
+ /* Interprocedural passes scheduled to have their transform functions
+ applied next time we execute local pass on them. We maintain it
+ per-function in order to allow IPA passes to introduce new functions. */
+ VEC(ipa_opt_pass,heap) * GTY((skip)) ipa_transforms_to_apply;
+
+ /* Collected bit flags. */
+
+ /* Number of units of general registers that need saving in stdarg
+ function. What unit is depends on the backend, either it is number
+ of bytes, or it can be number of registers. */
+ unsigned int va_list_gpr_size : 8;
+
+ /* Number of units of floating point registers that need saving in stdarg
+ function. */
+ unsigned int va_list_fpr_size : 8;
+
+
+ /* How commonly executed the function is. Initialized during branch
+ probabilities pass. */
+ ENUM_BITFIELD (function_frequency) function_frequency : 2;
+
+ /* Nonzero if function being compiled can call setjmp. */
+ unsigned int calls_setjmp : 1;
+
+ /* Nonzero if function being compiled can call alloca,
+ either as a subroutine or builtin. */
+ unsigned int calls_alloca : 1;
+
+ /* Nonzero if function being compiled receives nonlocal gotos
+ from nested functions. */
+ unsigned int has_nonlocal_label : 1;
+
+ /* Nonzero if current function uses stdarg.h or equivalent. */
+ unsigned int stdarg : 1;
+
+ /* Nonzero if the back-end should not keep track of expressions that
+ determine the size of variable-sized objects. Normally, such
+ expressions are saved away, and then expanded when the next
+ function is started. For example, if a parameter has a
+ variable-sized type, then the size of the parameter is computed
+ when the function body is entered. However, some front-ends do
+ not desire this behavior. */
+ unsigned int dont_save_pending_sizes_p : 1;
+
+ unsigned int after_inlining : 1;
+ unsigned int always_inline_functions_inlined : 1;
+
+ /* Fields below this point are not set for abstract functions; see
+ allocate_struct_function. */
+
+ /* Nonzero if function being compiled needs to be given an address
+ where the value should be stored. */
+ unsigned int returns_struct : 1;
+
+ /* Nonzero if function being compiled needs to
+ return the address of where it has put a structure value. */
+ unsigned int returns_pcc_struct : 1;
+
+ /* Nonzero if pass_tree_profile was run on this function. */
+ unsigned int after_tree_profile : 1;
+
+ /* Nonzero if this function has local DECL_HARD_REGISTER variables.
+ In this case code motion has to be done more carefully. */
+ unsigned int has_local_explicit_reg_vars : 1;
+
+ /* Nonzero if the current function is a thunk, i.e., a lightweight
+ function implemented by the output_mi_thunk hook) that just
+ adjusts one of its arguments and forwards to another
+ function. */
+ unsigned int is_thunk : 1;
+};
+
+/* The bit width of function id in the global function id used
+ in LIPO. */
+#define FUNC_ID_WIDTH HOST_BITS_PER_WIDEST_INT / 2
+/* The mask to extract function id from the global function id. */
+#define FUNC_ID_MASK ((1ll << FUNC_ID_WIDTH) - 1)
+/* Macro to extract module id from global function id GID. */
+#define EXTRACT_MODULE_ID_FROM_GLOBAL_ID(gid) (unsigned)(((gid) >>\
+ FUNC_ID_WIDTH) & FUNC_ID_MASK)
+/* Macro to extract function id from global function id GID. */
+#define EXTRACT_FUNC_ID_FROM_GLOBAL_ID(gid) (unsigned)((gid) & FUNC_ID_MASK)
+/* Macro to generate a global function id from module id M and
+ function id F. */
+#define GEN_FUNC_GLOBAL_ID(m,f) ((((HOST_WIDEST_INT) (m)) << FUNC_ID_WIDTH)\
+ | (f))
+/* Access macro for module_id field of function FUNC. */
+#define FUNC_DECL_MODULE_ID(func) ((func)->module_id)
+/* Access macro for funcdef_no field of function FUNC. */
+#define FUNC_DECL_FUNC_ID(func) ((func)->funcdef_no + 1)
+/* Macro to compute global function id for FUNC. */
+#define FUNC_DECL_GLOBAL_ID(func) \
+ GEN_FUNC_GLOBAL_ID (FUNC_DECL_MODULE_ID (func), FUNC_DECL_FUNC_ID (func))
+/* 32 bit wide unique id used for asm label (limit: 30k modules,
+ 128k funcs per module. */
+#define FUNC_LABEL_ID(func) ((FUNC_DECL_MODULE_ID (func) << 17) +\
+ (func)->funcdef_no)
+
+/* If va_list_[gf]pr_size is set to this, it means we don't know how
+ many units need to be saved. */
+#define VA_LIST_MAX_GPR_SIZE 255
+#define VA_LIST_MAX_FPR_SIZE 255
+
+/* The function currently being compiled. */
+extern GTY(()) struct function *cfun;
+
+/* In order to ensure that cfun is not set directly, we redefine it so
+ that it is not an lvalue. Rather than assign to cfun, use
+ push_cfun or set_cfun. */
+#define cfun (cfun + 0)
+
+/* Nonzero if we've already converted virtual regs to hard regs. */
+extern int virtuals_instantiated;
+
+/* Nonzero if at least one trampoline has been created. */
+extern int trampolines_created;
+
+struct types_used_by_vars_entry GTY(()) {
+ tree type;
+ tree var_decl;
+};
+
+/* Hash table making the relationship between a global variable
+ and the types it references in its initializer. The key of the
+ entry is a referenced type, and the value is the DECL of the global
+ variable. types_use_by_vars_do_hash and types_used_by_vars_eq below are
+ the hash and equality functions to use for this hash table. */
+extern GTY((param_is (struct types_used_by_vars_entry))) htab_t
+ types_used_by_vars_hash;
+
+hashval_t types_used_by_vars_do_hash (const void*);
+int types_used_by_vars_eq (const void *, const void *);
+void types_used_by_var_decl_insert (tree type, tree var_decl);
+
+/* During parsing of a global variable, this linked list points to
+ the list of types referenced by the global variable. */
+extern GTY(()) tree types_used_by_cur_var_decl;
+
+
+/* cfun shouldn't be set directly; use one of these functions instead. */
+extern void set_cfun (struct function *new_cfun);
+extern void push_cfun (struct function *new_cfun);
+extern void pop_cfun (void);
+extern void instantiate_decl_rtl (rtx x);
+
+/* For backward compatibility... eventually these should all go away. */
+#define current_function_funcdef_no (cfun->funcdef_no)
+
+#define current_loops (cfun->x_current_loops)
+#define dom_computed (cfun->cfg->x_dom_computed)
+#define n_bbs_in_dom_tree (cfun->cfg->x_n_bbs_in_dom_tree)
+#define VALUE_HISTOGRAMS(fun) (fun)->value_histograms
+
+/* Identify BLOCKs referenced by more than one NOTE_INSN_BLOCK_{BEG,END},
+ and create duplicate blocks. */
+extern void reorder_blocks (void);
+
+/* Set BLOCK_NUMBER for all the blocks in FN. */
+extern void number_blocks (tree);
+
+extern void clear_block_marks (tree);
+extern tree blocks_nreverse (tree);
+
+/* Return size needed for stack frame based on slots so far allocated.
+ This size counts from zero. It is not rounded to STACK_BOUNDARY;
+ the caller may have to do that. */
+extern HOST_WIDE_INT get_frame_size (void);
+
+/* Issue an error message and return TRUE if frame OFFSET overflows in
+ the signed target pointer arithmetics for function FUNC. Otherwise
+ return FALSE. */
+extern bool frame_offset_overflow (HOST_WIDE_INT, tree);
+
+/* A pointer to a function to create target specific, per-function
+ data structures. */
+extern struct machine_function * (*init_machine_status) (void);
+
+/* Save and restore status information for a nested function. */
+extern void free_after_parsing (struct function *);
+extern void free_after_compilation (struct function *);
+
+extern void init_varasm_status (void);
+
+#ifdef RTX_CODE
+extern void diddle_return_value (void (*)(rtx, void*), void*);
+extern void clobber_return_register (void);
+#endif
+
+extern rtx get_arg_pointer_save_area (void);
+
+/* Returns the name of the current function. */
+extern const char *current_function_name (void);
+/* Returns the assembler name (raw, mangled) of the current function. */
+extern const char *current_function_assembler_name (void);
+
+extern void do_warn_unused_parameter (tree);
+
+extern bool pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
+ tree, bool);
+extern bool reference_callee_copied (CUMULATIVE_ARGS *, enum machine_mode,
+ tree, bool);
+
+extern void used_types_insert (tree);
+
+extern int get_next_funcdef_no (void);
+extern int get_current_funcdef_no (void);
+
+extern void reset_funcdef_no (void);
+extern void set_funcdef_no (int);
+#endif /* GCC_FUNCTION_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gcc-plugin.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gcc-plugin.h
new file mode 100644
index 0000000..30586e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gcc-plugin.h
@@ -0,0 +1,157 @@
+/* Public header file for plugins to include.
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_PLUGIN_H
+#define GCC_PLUGIN_H
+
+#ifndef IN_GCC
+#define IN_GCC
+#define IN_GCC_PLUGIN
+#endif
+
+#include "config.h"
+#include "system.h"
+
+/* Event names. Keep in sync with plugin_event_name[]. */
+enum plugin_event
+{
+ PLUGIN_PASS_MANAGER_SETUP, /* To hook into pass manager. */
+ PLUGIN_FINISH_TYPE, /* After finishing parsing a type. */
+ PLUGIN_FINISH_UNIT, /* Useful for summary processing. */
+ PLUGIN_CXX_CP_PRE_GENERICIZE, /* Allows to see low level AST in C++ FE. */
+ PLUGIN_FINISH, /* Called before GCC exits. */
+ PLUGIN_INFO, /* Information about the plugin. */
+ PLUGIN_GGC_START, /* Called at start of GCC Garbage Collection. */
+ PLUGIN_GGC_MARKING, /* Extend the GGC marking. */
+ PLUGIN_GGC_END, /* Called at end of GGC. */
+ PLUGIN_REGISTER_GGC_ROOTS, /* Register an extra GGC root table. */
+ PLUGIN_ATTRIBUTES, /* Called during attribute registration. */
+ PLUGIN_START_UNIT, /* Called before processing a translation unit. */
+ PLUGIN_EVENT_LAST /* Dummy event used for indexing callback
+ array. */
+};
+
+extern const char *plugin_event_name[];
+
+struct plugin_argument
+{
+ char *key; /* key of the argument. */
+ char *value; /* value is optional and can be NULL. */
+};
+
+enum pass_positioning_ops
+{
+ PASS_POS_INSERT_AFTER, /* Insert after the reference pass. */
+ PASS_POS_INSERT_BEFORE, /* Insert before the reference pass. */
+ PASS_POS_REPLACE /* Replace the reference pass. */
+};
+
+struct plugin_pass
+{
+ struct opt_pass *pass; /* New pass provided by the plugin. */
+ const char *reference_pass_name; /* Name of the reference pass for hooking
+ up the new pass. */
+ int ref_pass_instance_number; /* Insert the pass at the specified
+ instance number of the reference pass.
+ Do it for every instance if it is 0. */
+ enum pass_positioning_ops pos_op; /* how to insert the new pass. */
+};
+
+/* Additional information about the plugin. Used by --help and --version. */
+
+struct plugin_info
+{
+ const char *version;
+ const char *help;
+};
+
+/* Represents the gcc version. Used to avoid using an incompatible plugin. */
+
+struct plugin_gcc_version
+{
+ const char *basever;
+ const char *datestamp;
+ const char *devphase;
+ const char *revision;
+ const char *configuration_arguments;
+};
+
+/* Object that keeps track of the plugin name and its arguments. */
+struct plugin_name_args
+{
+ char *base_name; /* Short name of the plugin (filename without
+ .so suffix). */
+ const char *full_name; /* Path to the plugin as specified with
+ -fplugin=. */
+ int argc; /* Number of arguments specified with
+ -fplugin-arg-... */
+ struct plugin_argument *argv; /* Array of ARGC key-value pairs. */
+ const char *version; /* Version string provided by plugin. */
+ const char *help; /* Help string provided by plugin. */
+};
+
+/* The default version check. Compares every field in VERSION. */
+
+extern bool plugin_default_version_check (struct plugin_gcc_version *,
+ struct plugin_gcc_version *);
+
+/* Function type for the plugin initialization routine. Each plugin module
+ should define this as an externally-visible function with name
+ "plugin_init."
+
+ PLUGIN_INFO - plugin invocation information.
+ VERSION - the plugin_gcc_version symbol of GCC.
+
+ Returns 0 if initialization finishes successfully. */
+
+typedef int (*plugin_init_func) (struct plugin_name_args *plugin_info,
+ struct plugin_gcc_version *version);
+
+/* Declaration for "plugin_init" function so that it doesn't need to be
+ duplicated in every plugin. */
+extern int plugin_init (struct plugin_name_args *plugin_info,
+ struct plugin_gcc_version *version);
+
+/* Function type for a plugin callback routine.
+
+ GCC_DATA - event-specific data provided by GCC
+ USER_DATA - plugin-specific data provided by the plugin */
+
+typedef void (*plugin_callback_func) (void *gcc_data, void *user_data);
+
+/* Called from the plugin's initialization code. Register a single callback.
+ This function can be called multiple times.
+
+ PLUGIN_NAME - display name for this plugin
+ EVENT - which event the callback is for
+ CALLBACK - the callback to be called at the event
+ USER_DATA - plugin-provided data.
+*/
+
+/* This is also called without a callback routine for the
+ PLUGIN_PASS_MANAGER_SETUP, PLUGIN_INFO, PLUGIN_REGISTER_GGC_ROOTS
+ pseudo-events, with a specific user_data.
+ */
+
+extern void register_callback (const char *plugin_name,
+ enum plugin_event event,
+ plugin_callback_func callback,
+ void *user_data);
+
+#endif /* GCC_PLUGIN_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/genrtl.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/genrtl.h
new file mode 100644
index 0000000..89f7688
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/genrtl.h
@@ -0,0 +1,580 @@
+/* Generated automatically by gengenrtl from rtl.def. */
+
+#ifndef GCC_GENRTL_H
+#define GCC_GENRTL_H
+
+#include "statistics.h"
+
+extern rtx gen_rtx_fmt_ee_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, rtx arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_ee(c, m, p0, p1)\
+ gen_rtx_fmt_ee_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ue_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, rtx arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_ue(c, m, p0, p1)\
+ gen_rtx_fmt_ue_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_E_stat (RTX_CODE, enum machine_mode mode,
+ rtvec arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_E(c, m, p0)\
+ gen_rtx_fmt_E_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_e_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_e(c, m, p0)\
+ gen_rtx_fmt_e_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iuuBieie_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtx arg1, rtx arg2,
+ struct basic_block_def *arg3,
+ int arg4, rtx arg5, int arg6,
+ rtx arg7 MEM_STAT_DECL);
+#define gen_rtx_fmt_iuuBieie(c, m, p0, p1, p2, p3, p4, p5, p6, p7)\
+ gen_rtx_fmt_iuuBieie_stat (c, m, p0, p1, p2, p3, p4, p5, p6, p7 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iuuBieie0_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtx arg1, rtx arg2,
+ struct basic_block_def *arg3,
+ int arg4, rtx arg5, int arg6,
+ rtx arg7 MEM_STAT_DECL);
+#define gen_rtx_fmt_iuuBieie0(c, m, p0, p1, p2, p3, p4, p5, p6, p7)\
+ gen_rtx_fmt_iuuBieie0_stat (c, m, p0, p1, p2, p3, p4, p5, p6, p7 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iuuBieiee_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtx arg1, rtx arg2,
+ struct basic_block_def *arg3,
+ int arg4, rtx arg5, int arg6,
+ rtx arg7, rtx arg8 MEM_STAT_DECL);
+#define gen_rtx_fmt_iuuBieiee(c, m, p0, p1, p2, p3, p4, p5, p6, p7, p8)\
+ gen_rtx_fmt_iuuBieiee_stat (c, m, p0, p1, p2, p3, p4, p5, p6, p7, p8 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iuu00000_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtx arg1, rtx arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_iuu00000(c, m, p0, p1, p2)\
+ gen_rtx_fmt_iuu00000_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iuuB00is_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtx arg1, rtx arg2,
+ struct basic_block_def *arg3,
+ int arg4, const char *arg5 MEM_STAT_DECL);
+#define gen_rtx_fmt_iuuB00is(c, m, p0, p1, p2, p3, p4, p5)\
+ gen_rtx_fmt_iuuB00is_stat (c, m, p0, p1, p2, p3, p4, p5 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_si_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, int arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_si(c, m, p0, p1)\
+ gen_rtx_fmt_si_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ssiEEi_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, const char *arg1,
+ int arg2, rtvec arg3, rtvec arg4,
+ int arg5 MEM_STAT_DECL);
+#define gen_rtx_fmt_ssiEEi(c, m, p0, p1, p2, p3, p4, p5)\
+ gen_rtx_fmt_ssiEEi_stat (c, m, p0, p1, p2, p3, p4, p5 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_Ei_stat (RTX_CODE, enum machine_mode mode,
+ rtvec arg0, int arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_Ei(c, m, p0, p1)\
+ gen_rtx_fmt_Ei_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_eEee0_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, rtvec arg1, rtx arg2,
+ rtx arg3 MEM_STAT_DECL);
+#define gen_rtx_fmt_eEee0(c, m, p0, p1, p2, p3)\
+ gen_rtx_fmt_eEee0_stat (c, m, p0, p1, p2, p3 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_eee_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, rtx arg1, rtx arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_eee(c, m, p0, p1, p2)\
+ gen_rtx_fmt_eee_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt__stat (RTX_CODE, enum machine_mode mode MEM_STAT_DECL);
+#define gen_rtx_fmt_(c, m)\
+ gen_rtx_fmt__stat (c, m MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_i_stat (RTX_CODE, enum machine_mode mode,
+ int arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_i(c, m, p0)\
+ gen_rtx_fmt_i_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_w_stat (RTX_CODE, enum machine_mode mode,
+ HOST_WIDE_INT arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_w(c, m, p0)\
+ gen_rtx_fmt_w_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_www_stat (RTX_CODE, enum machine_mode mode,
+ HOST_WIDE_INT arg0,
+ HOST_WIDE_INT arg1,
+ HOST_WIDE_INT arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_www(c, m, p0, p1, p2)\
+ gen_rtx_fmt_www_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_s_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_s(c, m, p0)\
+ gen_rtx_fmt_s_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_0_stat (RTX_CODE, enum machine_mode mode MEM_STAT_DECL);
+#define gen_rtx_fmt_0(c, m)\
+ gen_rtx_fmt_0_stat (c, m MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_i00_stat (RTX_CODE, enum machine_mode mode,
+ int arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_i00(c, m, p0)\
+ gen_rtx_fmt_i00_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ei_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, int arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_ei(c, m, p0, p1)\
+ gen_rtx_fmt_ei_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_e0_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_e0(c, m, p0)\
+ gen_rtx_fmt_e0_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_u_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_u(c, m, p0)\
+ gen_rtx_fmt_u_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_s00_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0 MEM_STAT_DECL);
+#define gen_rtx_fmt_s00(c, m, p0)\
+ gen_rtx_fmt_s00_stat (c, m, p0 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_tei_stat (RTX_CODE, enum machine_mode mode,
+ union tree_node *arg0, rtx arg1,
+ int arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_tei(c, m, p0, p1, p2)\
+ gen_rtx_fmt_tei_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iss_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, const char *arg1,
+ const char *arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_iss(c, m, p0, p1, p2)\
+ gen_rtx_fmt_iss_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_is_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, const char *arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_is(c, m, p0, p1)\
+ gen_rtx_fmt_is_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_isE_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, const char *arg1,
+ rtvec arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_isE(c, m, p0, p1, p2)\
+ gen_rtx_fmt_isE_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_iE_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, rtvec arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_iE(c, m, p0, p1)\
+ gen_rtx_fmt_iE_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ss_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, const char *arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_ss(c, m, p0, p1)\
+ gen_rtx_fmt_ss_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_sEss_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, rtvec arg1,
+ const char *arg2, const char *arg3 MEM_STAT_DECL);
+#define gen_rtx_fmt_sEss(c, m, p0, p1, p2, p3)\
+ gen_rtx_fmt_sEss_stat (c, m, p0, p1, p2, p3 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_eE_stat (RTX_CODE, enum machine_mode mode,
+ rtx arg0, rtvec arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_eE(c, m, p0, p1)\
+ gen_rtx_fmt_eE_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_Ess_stat (RTX_CODE, enum machine_mode mode,
+ rtvec arg0, const char *arg1,
+ const char *arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_Ess(c, m, p0, p1, p2)\
+ gen_rtx_fmt_Ess_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ses_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, rtx arg1,
+ const char *arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_ses(c, m, p0, p1, p2)\
+ gen_rtx_fmt_ses_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_sss_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, const char *arg1,
+ const char *arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_sss(c, m, p0, p1, p2)\
+ gen_rtx_fmt_sss_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_sse_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, const char *arg1,
+ rtx arg2 MEM_STAT_DECL);
+#define gen_rtx_fmt_sse(c, m, p0, p1, p2)\
+ gen_rtx_fmt_sse_stat (c, m, p0, p1, p2 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_sies_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, int arg1,
+ rtx arg2, const char *arg3 MEM_STAT_DECL);
+#define gen_rtx_fmt_sies(c, m, p0, p1, p2, p3)\
+ gen_rtx_fmt_sies_stat (c, m, p0, p1, p2, p3 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_sE_stat (RTX_CODE, enum machine_mode mode,
+ const char *arg0, rtvec arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_sE(c, m, p0, p1)\
+ gen_rtx_fmt_sE_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_ii_stat (RTX_CODE, enum machine_mode mode,
+ int arg0, int arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_ii(c, m, p0, p1)\
+ gen_rtx_fmt_ii_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+extern rtx gen_rtx_fmt_Ee_stat (RTX_CODE, enum machine_mode mode,
+ rtvec arg0, rtx arg1 MEM_STAT_DECL);
+#define gen_rtx_fmt_Ee(c, m, p0, p1)\
+ gen_rtx_fmt_Ee_stat (c, m, p0, p1 MEM_STAT_INFO)
+
+
+#define gen_rtx_EXPR_LIST(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (EXPR_LIST, (MODE), (ARG0), (ARG1))
+#define gen_rtx_INSN_LIST(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ue (INSN_LIST, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SEQUENCE(MODE, ARG0) \
+ gen_rtx_fmt_E (SEQUENCE, (MODE), (ARG0))
+#define gen_rtx_ADDRESS(MODE, ARG0) \
+ gen_rtx_fmt_e (ADDRESS, (MODE), (ARG0))
+#define gen_rtx_DEBUG_INSN(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6, ARG7) \
+ gen_rtx_fmt_iuuBieie (DEBUG_INSN, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5), (ARG6), (ARG7))
+#define gen_rtx_INSN(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6, ARG7) \
+ gen_rtx_fmt_iuuBieie (INSN, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5), (ARG6), (ARG7))
+#define gen_rtx_JUMP_INSN(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6, ARG7) \
+ gen_rtx_fmt_iuuBieie0 (JUMP_INSN, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5), (ARG6), (ARG7))
+#define gen_rtx_CALL_INSN(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6, ARG7, ARG8) \
+ gen_rtx_fmt_iuuBieiee (CALL_INSN, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5), (ARG6), (ARG7), (ARG8))
+#define gen_rtx_BARRIER(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_iuu00000 (BARRIER, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_CODE_LABEL(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) \
+ gen_rtx_fmt_iuuB00is (CODE_LABEL, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5))
+#define gen_rtx_COND_EXEC(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (COND_EXEC, (MODE), (ARG0), (ARG1))
+#define gen_rtx_PARALLEL(MODE, ARG0) \
+ gen_rtx_fmt_E (PARALLEL, (MODE), (ARG0))
+#define gen_rtx_ASM_INPUT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ASM_OPERANDS(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) \
+ gen_rtx_fmt_ssiEEi (ASM_OPERANDS, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5))
+#define gen_rtx_UNSPEC(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_Ei (UNSPEC, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNSPEC_VOLATILE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_Ei (UNSPEC_VOLATILE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ADDR_VEC(MODE, ARG0) \
+ gen_rtx_fmt_E (ADDR_VEC, (MODE), (ARG0))
+#define gen_rtx_ADDR_DIFF_VEC(MODE, ARG0, ARG1, ARG2, ARG3) \
+ gen_rtx_fmt_eEee0 (ADDR_DIFF_VEC, (MODE), (ARG0), (ARG1), (ARG2), (ARG3))
+#define gen_rtx_PREFETCH(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_eee (PREFETCH, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_USE(MODE, ARG0) \
+ gen_rtx_fmt_e (USE, (MODE), (ARG0))
+#define gen_rtx_CLOBBER(MODE, ARG0) \
+ gen_rtx_fmt_e (CLOBBER, (MODE), (ARG0))
+#define gen_rtx_CALL(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (CALL, (MODE), (ARG0), (ARG1))
+#define gen_rtx_RETURN(MODE) \
+ gen_rtx_fmt_ (RETURN, (MODE))
+#define gen_rtx_EH_RETURN(MODE) \
+ gen_rtx_fmt_ (EH_RETURN, (MODE))
+#define gen_rtx_TRAP_IF(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (TRAP_IF, (MODE), (ARG0), (ARG1))
+#define gen_rtx_RESX(MODE, ARG0) \
+ gen_rtx_fmt_i (RESX, (MODE), (ARG0))
+#define gen_rtx_raw_CONST_INT(MODE, ARG0) \
+ gen_rtx_fmt_w (CONST_INT, (MODE), (ARG0))
+#define gen_rtx_raw_CONST_VECTOR(MODE, ARG0) \
+ gen_rtx_fmt_E (CONST_VECTOR, (MODE), (ARG0))
+#define gen_rtx_CONST_STRING(MODE, ARG0) \
+ gen_rtx_fmt_s (CONST_STRING, (MODE), (ARG0))
+#define gen_rtx_CONST(MODE, ARG0) \
+ gen_rtx_fmt_e (CONST, (MODE), (ARG0))
+#define gen_rtx_PC(MODE) \
+ gen_rtx_fmt_ (PC, (MODE))
+#define gen_rtx_VALUE(MODE) \
+ gen_rtx_fmt_0 (VALUE, (MODE))
+#define gen_rtx_raw_REG(MODE, ARG0) \
+ gen_rtx_fmt_i00 (REG, (MODE), (ARG0))
+#define gen_rtx_SCRATCH(MODE) \
+ gen_rtx_fmt_0 (SCRATCH, (MODE))
+#define gen_rtx_raw_SUBREG(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ei (SUBREG, (MODE), (ARG0), (ARG1))
+#define gen_rtx_STRICT_LOW_PART(MODE, ARG0) \
+ gen_rtx_fmt_e (STRICT_LOW_PART, (MODE), (ARG0))
+#define gen_rtx_CONCAT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (CONCAT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_CONCATN(MODE, ARG0) \
+ gen_rtx_fmt_E (CONCATN, (MODE), (ARG0))
+#define gen_rtx_raw_MEM(MODE, ARG0) \
+ gen_rtx_fmt_e0 (MEM, (MODE), (ARG0))
+#define gen_rtx_LABEL_REF(MODE, ARG0) \
+ gen_rtx_fmt_u (LABEL_REF, (MODE), (ARG0))
+#define gen_rtx_SYMBOL_REF(MODE, ARG0) \
+ gen_rtx_fmt_s00 (SYMBOL_REF, (MODE), (ARG0))
+#define gen_rtx_CC0(MODE) \
+ gen_rtx_fmt_ (CC0, (MODE))
+#define gen_rtx_IF_THEN_ELSE(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_eee (IF_THEN_ELSE, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_COMPARE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (COMPARE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_PLUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (PLUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MINUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (MINUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_NEG(MODE, ARG0) \
+ gen_rtx_fmt_e (NEG, (MODE), (ARG0))
+#define gen_rtx_MULT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (MULT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SS_MULT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SS_MULT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_US_MULT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (US_MULT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_DIV(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (DIV, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SS_DIV(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SS_DIV, (MODE), (ARG0), (ARG1))
+#define gen_rtx_US_DIV(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (US_DIV, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MOD(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (MOD, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UDIV(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UDIV, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UMOD(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UMOD, (MODE), (ARG0), (ARG1))
+#define gen_rtx_AND(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (AND, (MODE), (ARG0), (ARG1))
+#define gen_rtx_IOR(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (IOR, (MODE), (ARG0), (ARG1))
+#define gen_rtx_XOR(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (XOR, (MODE), (ARG0), (ARG1))
+#define gen_rtx_NOT(MODE, ARG0) \
+ gen_rtx_fmt_e (NOT, (MODE), (ARG0))
+#define gen_rtx_ASHIFT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (ASHIFT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ROTATE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (ROTATE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ASHIFTRT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (ASHIFTRT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LSHIFTRT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LSHIFTRT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ROTATERT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (ROTATERT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SMIN(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SMIN, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SMAX(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SMAX, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UMIN(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UMIN, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UMAX(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UMAX, (MODE), (ARG0), (ARG1))
+#define gen_rtx_PRE_DEC(MODE, ARG0) \
+ gen_rtx_fmt_e (PRE_DEC, (MODE), (ARG0))
+#define gen_rtx_PRE_INC(MODE, ARG0) \
+ gen_rtx_fmt_e (PRE_INC, (MODE), (ARG0))
+#define gen_rtx_POST_DEC(MODE, ARG0) \
+ gen_rtx_fmt_e (POST_DEC, (MODE), (ARG0))
+#define gen_rtx_POST_INC(MODE, ARG0) \
+ gen_rtx_fmt_e (POST_INC, (MODE), (ARG0))
+#define gen_rtx_PRE_MODIFY(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (PRE_MODIFY, (MODE), (ARG0), (ARG1))
+#define gen_rtx_POST_MODIFY(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (POST_MODIFY, (MODE), (ARG0), (ARG1))
+#define gen_rtx_NE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (NE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_EQ(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (EQ, (MODE), (ARG0), (ARG1))
+#define gen_rtx_GE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (GE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_GT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (GT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_GEU(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (GEU, (MODE), (ARG0), (ARG1))
+#define gen_rtx_GTU(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (GTU, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LEU(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LEU, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LTU(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LTU, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNORDERED(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNORDERED, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ORDERED(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (ORDERED, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNEQ(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNEQ, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNGE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNGE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNGT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNGT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNLE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNLE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_UNLT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (UNLT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_LTGT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LTGT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SIGN_EXTEND(MODE, ARG0) \
+ gen_rtx_fmt_e (SIGN_EXTEND, (MODE), (ARG0))
+#define gen_rtx_ZERO_EXTEND(MODE, ARG0) \
+ gen_rtx_fmt_e (ZERO_EXTEND, (MODE), (ARG0))
+#define gen_rtx_TRUNCATE(MODE, ARG0) \
+ gen_rtx_fmt_e (TRUNCATE, (MODE), (ARG0))
+#define gen_rtx_FLOAT_EXTEND(MODE, ARG0) \
+ gen_rtx_fmt_e (FLOAT_EXTEND, (MODE), (ARG0))
+#define gen_rtx_FLOAT_TRUNCATE(MODE, ARG0) \
+ gen_rtx_fmt_e (FLOAT_TRUNCATE, (MODE), (ARG0))
+#define gen_rtx_FLOAT(MODE, ARG0) \
+ gen_rtx_fmt_e (FLOAT, (MODE), (ARG0))
+#define gen_rtx_FIX(MODE, ARG0) \
+ gen_rtx_fmt_e (FIX, (MODE), (ARG0))
+#define gen_rtx_UNSIGNED_FLOAT(MODE, ARG0) \
+ gen_rtx_fmt_e (UNSIGNED_FLOAT, (MODE), (ARG0))
+#define gen_rtx_UNSIGNED_FIX(MODE, ARG0) \
+ gen_rtx_fmt_e (UNSIGNED_FIX, (MODE), (ARG0))
+#define gen_rtx_FRACT_CONVERT(MODE, ARG0) \
+ gen_rtx_fmt_e (FRACT_CONVERT, (MODE), (ARG0))
+#define gen_rtx_UNSIGNED_FRACT_CONVERT(MODE, ARG0) \
+ gen_rtx_fmt_e (UNSIGNED_FRACT_CONVERT, (MODE), (ARG0))
+#define gen_rtx_SAT_FRACT(MODE, ARG0) \
+ gen_rtx_fmt_e (SAT_FRACT, (MODE), (ARG0))
+#define gen_rtx_UNSIGNED_SAT_FRACT(MODE, ARG0) \
+ gen_rtx_fmt_e (UNSIGNED_SAT_FRACT, (MODE), (ARG0))
+#define gen_rtx_ABS(MODE, ARG0) \
+ gen_rtx_fmt_e (ABS, (MODE), (ARG0))
+#define gen_rtx_SQRT(MODE, ARG0) \
+ gen_rtx_fmt_e (SQRT, (MODE), (ARG0))
+#define gen_rtx_BSWAP(MODE, ARG0) \
+ gen_rtx_fmt_e (BSWAP, (MODE), (ARG0))
+#define gen_rtx_FFS(MODE, ARG0) \
+ gen_rtx_fmt_e (FFS, (MODE), (ARG0))
+#define gen_rtx_CLZ(MODE, ARG0) \
+ gen_rtx_fmt_e (CLZ, (MODE), (ARG0))
+#define gen_rtx_CTZ(MODE, ARG0) \
+ gen_rtx_fmt_e (CTZ, (MODE), (ARG0))
+#define gen_rtx_POPCOUNT(MODE, ARG0) \
+ gen_rtx_fmt_e (POPCOUNT, (MODE), (ARG0))
+#define gen_rtx_PARITY(MODE, ARG0) \
+ gen_rtx_fmt_e (PARITY, (MODE), (ARG0))
+#define gen_rtx_SIGN_EXTRACT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_eee (SIGN_EXTRACT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_ZERO_EXTRACT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_eee (ZERO_EXTRACT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_HIGH(MODE, ARG0) \
+ gen_rtx_fmt_e (HIGH, (MODE), (ARG0))
+#define gen_rtx_LO_SUM(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (LO_SUM, (MODE), (ARG0), (ARG1))
+#define gen_rtx_VEC_MERGE(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_eee (VEC_MERGE, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_VEC_SELECT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (VEC_SELECT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_VEC_CONCAT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (VEC_CONCAT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_VEC_DUPLICATE(MODE, ARG0) \
+ gen_rtx_fmt_e (VEC_DUPLICATE, (MODE), (ARG0))
+#define gen_rtx_SS_PLUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SS_PLUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_US_PLUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (US_PLUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SS_MINUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SS_MINUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SS_NEG(MODE, ARG0) \
+ gen_rtx_fmt_e (SS_NEG, (MODE), (ARG0))
+#define gen_rtx_US_NEG(MODE, ARG0) \
+ gen_rtx_fmt_e (US_NEG, (MODE), (ARG0))
+#define gen_rtx_SS_ABS(MODE, ARG0) \
+ gen_rtx_fmt_e (SS_ABS, (MODE), (ARG0))
+#define gen_rtx_SS_ASHIFT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (SS_ASHIFT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_US_ASHIFT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (US_ASHIFT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_US_MINUS(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ee (US_MINUS, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SS_TRUNCATE(MODE, ARG0) \
+ gen_rtx_fmt_e (SS_TRUNCATE, (MODE), (ARG0))
+#define gen_rtx_US_TRUNCATE(MODE, ARG0) \
+ gen_rtx_fmt_e (US_TRUNCATE, (MODE), (ARG0))
+#define gen_rtx_VAR_LOCATION(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_tei (VAR_LOCATION, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_INCLUDE(MODE, ARG0) \
+ gen_rtx_fmt_s (INCLUDE, (MODE), (ARG0))
+#define gen_rtx_MATCH_OPERAND(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_iss (MATCH_OPERAND, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_MATCH_SCRATCH(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_is (MATCH_SCRATCH, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MATCH_OPERATOR(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_isE (MATCH_OPERATOR, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_MATCH_PARALLEL(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_isE (MATCH_PARALLEL, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_MATCH_DUP(MODE, ARG0) \
+ gen_rtx_fmt_i (MATCH_DUP, (MODE), (ARG0))
+#define gen_rtx_MATCH_OP_DUP(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_iE (MATCH_OP_DUP, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MATCH_PAR_DUP(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_iE (MATCH_PAR_DUP, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MATCH_CODE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (MATCH_CODE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_MATCH_TEST(MODE, ARG0) \
+ gen_rtx_fmt_s (MATCH_TEST, (MODE), (ARG0))
+#define gen_rtx_DEFINE_EXPAND(MODE, ARG0, ARG1, ARG2, ARG3) \
+ gen_rtx_fmt_sEss (DEFINE_EXPAND, (MODE), (ARG0), (ARG1), (ARG2), (ARG3))
+#define gen_rtx_DEFINE_DELAY(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_eE (DEFINE_DELAY, (MODE), (ARG0), (ARG1))
+#define gen_rtx_DEFINE_COND_EXEC(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_Ess (DEFINE_COND_EXEC, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_PREDICATE(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_ses (DEFINE_PREDICATE, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_SPECIAL_PREDICATE(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_ses (DEFINE_SPECIAL_PREDICATE, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_REGISTER_CONSTRAINT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_sss (DEFINE_REGISTER_CONSTRAINT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_CONSTRAINT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_sse (DEFINE_CONSTRAINT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_MEMORY_CONSTRAINT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_sse (DEFINE_MEMORY_CONSTRAINT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_DEFINE_ADDRESS_CONSTRAINT(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_sse (DEFINE_ADDRESS_CONSTRAINT, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_EXCLUSION_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (EXCLUSION_SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_PRESENCE_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (PRESENCE_SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_FINAL_PRESENCE_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (FINAL_PRESENCE_SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ABSENCE_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (ABSENCE_SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_FINAL_ABSENCE_SET(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (FINAL_ABSENCE_SET, (MODE), (ARG0), (ARG1))
+#define gen_rtx_DEFINE_AUTOMATON(MODE, ARG0) \
+ gen_rtx_fmt_s (DEFINE_AUTOMATON, (MODE), (ARG0))
+#define gen_rtx_AUTOMATA_OPTION(MODE, ARG0) \
+ gen_rtx_fmt_s (AUTOMATA_OPTION, (MODE), (ARG0))
+#define gen_rtx_DEFINE_RESERVATION(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (DEFINE_RESERVATION, (MODE), (ARG0), (ARG1))
+#define gen_rtx_DEFINE_INSN_RESERVATION(MODE, ARG0, ARG1, ARG2, ARG3) \
+ gen_rtx_fmt_sies (DEFINE_INSN_RESERVATION, (MODE), (ARG0), (ARG1), (ARG2), (ARG3))
+#define gen_rtx_DEFINE_ATTR(MODE, ARG0, ARG1, ARG2) \
+ gen_rtx_fmt_sse (DEFINE_ATTR, (MODE), (ARG0), (ARG1), (ARG2))
+#define gen_rtx_ATTR(MODE, ARG0) \
+ gen_rtx_fmt_s (ATTR, (MODE), (ARG0))
+#define gen_rtx_SET_ATTR(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (SET_ATTR, (MODE), (ARG0), (ARG1))
+#define gen_rtx_SET_ATTR_ALTERNATIVE(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_sE (SET_ATTR_ALTERNATIVE, (MODE), (ARG0), (ARG1))
+#define gen_rtx_EQ_ATTR(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ss (EQ_ATTR, (MODE), (ARG0), (ARG1))
+#define gen_rtx_EQ_ATTR_ALT(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_ii (EQ_ATTR_ALT, (MODE), (ARG0), (ARG1))
+#define gen_rtx_ATTR_FLAG(MODE, ARG0) \
+ gen_rtx_fmt_s (ATTR_FLAG, (MODE), (ARG0))
+#define gen_rtx_COND(MODE, ARG0, ARG1) \
+ gen_rtx_fmt_Ee (COND, (MODE), (ARG0), (ARG1))
+
+#endif /* GCC_GENRTL_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ggc.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ggc.h
new file mode 100644
index 0000000..f9670ac
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ggc.h
@@ -0,0 +1,333 @@
+/* Garbage collection for the GNU compiler.
+
+ Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
+ 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_GGC_H
+#define GCC_GGC_H
+#include "statistics.h"
+
+/* Symbols are marked with `ggc' for `gcc gc' so as not to interfere with
+ an external gc library that might be linked in. */
+
+/* Constants for general use. */
+extern const char empty_string[]; /* empty string */
+extern const char digit_vector[]; /* "0" .. "9" */
+#define digit_string(d) (digit_vector + ((d) * 2))
+
+/* Internal functions and data structures used by the GTY
+ machinery. */
+
+/* The first parameter is a pointer to a pointer, the second a cookie. */
+typedef void (*gt_pointer_operator) (void *, void *);
+
+#include "gtype-desc.h"
+
+/* One of these applies its third parameter (with cookie in the fourth
+ parameter) to each pointer in the object pointed to by the first
+ parameter, using the second parameter. */
+typedef void (*gt_note_pointers) (void *, void *, gt_pointer_operator,
+ void *);
+
+/* One of these is called before objects are re-ordered in memory.
+ The first parameter is the original object, the second is the
+ subobject that has had its pointers reordered, the third parameter
+ can compute the new values of a pointer when given the cookie in
+ the fourth parameter. */
+typedef void (*gt_handle_reorder) (void *, void *, gt_pointer_operator,
+ void *);
+
+/* Used by the gt_pch_n_* routines. Register an object in the hash table. */
+extern int gt_pch_note_object (void *, void *, gt_note_pointers,
+ enum gt_types_enum);
+
+/* Used by the gt_pch_n_* routines. Register that an object has a reorder
+ function. */
+extern void gt_pch_note_reorder (void *, void *, gt_handle_reorder);
+
+/* Mark the object in the first parameter and anything it points to. */
+typedef void (*gt_pointer_walker) (void *);
+
+/* Structures for the easy way to mark roots.
+ In an array, terminated by having base == NULL. */
+struct ggc_root_tab {
+ void *base;
+ size_t nelt;
+ size_t stride;
+ gt_pointer_walker cb;
+ gt_pointer_walker pchw;
+};
+#define LAST_GGC_ROOT_TAB { NULL, 0, 0, NULL, NULL }
+/* Pointers to arrays of ggc_root_tab, terminated by NULL. */
+extern const struct ggc_root_tab * const gt_ggc_rtab[];
+extern const struct ggc_root_tab * const gt_ggc_deletable_rtab[];
+extern const struct ggc_root_tab * const gt_pch_cache_rtab[];
+extern const struct ggc_root_tab * const gt_pch_scalar_rtab[];
+
+/* Structure for hash table cache marking. */
+struct htab;
+struct ggc_cache_tab {
+ struct htab * *base;
+ size_t nelt;
+ size_t stride;
+ gt_pointer_walker cb;
+ gt_pointer_walker pchw;
+ int (*marked_p) (const void *);
+};
+#define LAST_GGC_CACHE_TAB { NULL, 0, 0, NULL, NULL, NULL }
+/* Pointers to arrays of ggc_cache_tab, terminated by NULL. */
+extern const struct ggc_cache_tab * const gt_ggc_cache_rtab[];
+
+/* If EXPR is not NULL and previously unmarked, mark it and evaluate
+ to true. Otherwise evaluate to false. */
+#define ggc_test_and_set_mark(EXPR) \
+ ((EXPR) != NULL && ((void *) (EXPR)) != (void *) 1 && ! ggc_set_mark (EXPR))
+
+#define ggc_mark(EXPR) \
+ do { \
+ const void *const a__ = (EXPR); \
+ if (a__ != NULL && a__ != (void *) 1) \
+ ggc_set_mark (a__); \
+ } while (0)
+
+/* Actually set the mark on a particular region of memory, but don't
+ follow pointers. This function is called by ggc_mark_*. It
+ returns zero if the object was not previously marked; nonzero if
+ the object was already marked, or if, for any other reason,
+ pointers in this data structure should not be traversed. */
+extern int ggc_set_mark (const void *);
+
+/* Return 1 if P has been marked, zero otherwise.
+ P must have been allocated by the GC allocator; it mustn't point to
+ static objects, stack variables, or memory allocated with malloc. */
+extern int ggc_marked_p (const void *);
+
+/* Mark the entries in the string pool. */
+extern void ggc_mark_stringpool (void);
+
+/* Purge the entries in the string pool. */
+extern void ggc_purge_stringpool (void);
+
+/* Call ggc_set_mark on all the roots. */
+
+extern void ggc_mark_roots (void);
+
+/* Save and restore the string pool entries for PCH. */
+
+extern void gt_pch_save_stringpool (void);
+extern void gt_pch_fixup_stringpool (void);
+extern void gt_pch_restore_stringpool (void);
+
+/* PCH and GGC handling for strings, mostly trivial. */
+
+extern void gt_pch_p_S (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_n_S (const void *);
+extern void gt_ggc_m_S (const void *);
+
+/* Initialize the string pool. */
+extern void init_stringpool (void);
+
+/* A GC implementation must provide these functions. They are internal
+ to the GC system. */
+
+/* Forward declare the zone structure. Only ggc_zone implements this. */
+struct alloc_zone;
+
+/* Initialize the garbage collector. */
+extern void init_ggc (void);
+
+/* Start a new GGC zone. */
+extern struct alloc_zone *new_ggc_zone (const char *);
+
+/* Free a complete GGC zone, destroying everything in it. */
+extern void destroy_ggc_zone (struct alloc_zone *);
+
+struct ggc_pch_data;
+
+/* Return a new ggc_pch_data structure. */
+extern struct ggc_pch_data *init_ggc_pch (void);
+
+/* The second parameter and third parameters give the address and size
+ of an object. Update the ggc_pch_data structure with as much of
+ that information as is necessary. The bool argument should be true
+ if the object is a string. */
+extern void ggc_pch_count_object (struct ggc_pch_data *, void *, size_t, bool,
+ enum gt_types_enum);
+
+/* Return the total size of the data to be written to hold all
+ the objects previously passed to ggc_pch_count_object. */
+extern size_t ggc_pch_total_size (struct ggc_pch_data *);
+
+/* The objects, when read, will most likely be at the address
+ in the second parameter. */
+extern void ggc_pch_this_base (struct ggc_pch_data *, void *);
+
+/* Assuming that the objects really do end up at the address
+ passed to ggc_pch_this_base, return the address of this object.
+ The bool argument should be true if the object is a string. */
+extern char *ggc_pch_alloc_object (struct ggc_pch_data *, void *, size_t, bool,
+ enum gt_types_enum);
+
+/* Write out any initial information required. */
+extern void ggc_pch_prepare_write (struct ggc_pch_data *, FILE *);
+/* Write out this object, including any padding. The last argument should be
+ true if the object is a string. */
+extern void ggc_pch_write_object (struct ggc_pch_data *, FILE *, void *,
+ void *, size_t, bool);
+/* All objects have been written, write out any final information
+ required. */
+extern void ggc_pch_finish (struct ggc_pch_data *, FILE *);
+
+/* A PCH file has just been read in at the address specified second
+ parameter. Set up the GC implementation for the new objects. */
+extern void ggc_pch_read (FILE *, void *);
+
+
+/* Allocation. */
+
+/* When set, ggc_collect will do collection. */
+extern bool ggc_force_collect;
+
+/* When true, identifier nodes are considered as GC roots. When
+ false, identifier nodes are treated like any other GC-allocated
+ object, and the identifier hash table is treated as a weak
+ hash. */
+extern bool ggc_protect_identifiers;
+
+/* The internal primitive. */
+extern void *ggc_alloc_stat (size_t MEM_STAT_DECL);
+#define ggc_alloc(s) ggc_alloc_stat (s MEM_STAT_INFO)
+/* Allocate an object of the specified type and size. */
+extern void *ggc_alloc_typed_stat (enum gt_types_enum, size_t MEM_STAT_DECL);
+#define ggc_alloc_typed(s,z) ggc_alloc_typed_stat (s,z MEM_STAT_INFO)
+/* Like ggc_alloc, but allocates cleared memory. */
+extern void *ggc_alloc_cleared_stat (size_t MEM_STAT_DECL);
+#define ggc_alloc_cleared(s) ggc_alloc_cleared_stat (s MEM_STAT_INFO)
+/* Resize a block. */
+extern void *ggc_realloc_stat (void *, size_t MEM_STAT_DECL);
+#define ggc_realloc(s,z) ggc_realloc_stat (s,z MEM_STAT_INFO)
+/* Like ggc_alloc_cleared, but performs a multiplication. */
+extern void *ggc_calloc (size_t, size_t);
+/* Free a block. To be used when known for certain it's not reachable. */
+extern void ggc_free (void *);
+
+extern void ggc_record_overhead (size_t, size_t, void * MEM_STAT_DECL);
+extern void ggc_free_overhead (void *);
+extern void ggc_prune_overhead_list (void);
+
+extern void dump_ggc_loc_statistics (bool);
+
+/* Type-safe, C++-friendly versions of ggc_alloc() and gcc_calloc(). */
+#define GGC_NEW(T) ((T *) ggc_alloc (sizeof (T)))
+#define GGC_CNEW(T) ((T *) ggc_alloc_cleared (sizeof (T)))
+#define GGC_NEWVEC(T, N) ((T *) ggc_alloc ((N) * sizeof(T)))
+#define GGC_CNEWVEC(T, N) ((T *) ggc_alloc_cleared ((N) * sizeof(T)))
+#define GGC_RESIZEVEC(T, P, N) ((T *) ggc_realloc ((P), (N) * sizeof (T)))
+#define GGC_NEWVAR(T, S) ((T *) ggc_alloc ((S)))
+#define GGC_CNEWVAR(T, S) ((T *) ggc_alloc_cleared ((S)))
+#define GGC_RESIZEVAR(T, P, N) ((T *) ggc_realloc ((P), (N)))
+
+#define ggc_alloc_rtvec(NELT) \
+ ((rtvec) ggc_alloc_zone (sizeof (struct rtvec_def) + ((NELT) - 1) \
+ * sizeof (rtx), &rtl_zone))
+
+#define ggc_alloc_tree(LENGTH) ((tree) ggc_alloc_zone (LENGTH, &tree_zone))
+
+#define htab_create_ggc(SIZE, HASH, EQ, DEL) \
+ htab_create_alloc (SIZE, HASH, EQ, DEL, ggc_calloc, ggc_free)
+
+#define splay_tree_new_ggc(COMPARE) \
+ splay_tree_new_with_allocator (COMPARE, NULL, NULL, \
+ &ggc_splay_alloc, &ggc_splay_dont_free, \
+ NULL)
+extern void *ggc_splay_alloc (int, void *);
+extern void ggc_splay_dont_free (void *, void *);
+
+/* Allocate a gc-able string, and fill it with LENGTH bytes from CONTENTS.
+ If LENGTH is -1, then CONTENTS is assumed to be a
+ null-terminated string and the memory sized accordingly. */
+extern const char *ggc_alloc_string (const char *contents, int length);
+
+/* Make a copy of S, in GC-able memory. */
+#define ggc_strdup(S) ggc_alloc_string((S), -1)
+
+/* Invoke the collector. Garbage collection occurs only when this
+ function is called, not during allocations. */
+extern void ggc_collect (void);
+
+/* Register an additional root table. This can be useful for some
+ plugins. Does nothing if the passed pointer is null. */
+extern void ggc_register_root_tab (const struct ggc_root_tab *);
+
+/* Return the number of bytes allocated at the indicated address. */
+extern size_t ggc_get_size (const void *);
+
+/* Write out all GCed objects to F. */
+extern void gt_pch_save (FILE *f);
+
+/* Read objects previously saved with gt_pch_save from F. */
+extern void gt_pch_restore (FILE *f);
+
+/* Statistics. */
+
+/* This structure contains the statistics common to all collectors.
+ Particular collectors can extend this structure. */
+typedef struct ggc_statistics
+{
+ /* At present, we don't really gather any interesting statistics. */
+ int unused;
+} ggc_statistics;
+
+/* Used by the various collectors to gather and print statistics that
+ do not depend on the collector in use. */
+extern void ggc_print_common_statistics (FILE *, ggc_statistics *);
+
+/* Print allocation statistics. */
+extern void ggc_print_statistics (void);
+extern void stringpool_statistics (void);
+
+/* Heuristics. */
+extern int ggc_min_expand_heuristic (void);
+extern int ggc_min_heapsize_heuristic (void);
+extern void init_ggc_heuristics (void);
+
+/* Zone collection. */
+#if defined (GGC_ZONE) && !defined (GENERATOR_FILE)
+
+/* For regular rtl allocations. */
+extern struct alloc_zone rtl_zone;
+/* For regular tree allocations. */
+extern struct alloc_zone tree_zone;
+/* For IDENTIFIER_NODE allocations. */
+extern struct alloc_zone tree_id_zone;
+
+/* Allocate an object into the specified allocation zone. */
+extern void *ggc_alloc_zone_stat (size_t, struct alloc_zone * MEM_STAT_DECL);
+# define ggc_alloc_zone(s,z) ggc_alloc_zone_stat (s,z MEM_STAT_INFO)
+# define ggc_alloc_zone_pass_stat(s,z) ggc_alloc_zone_stat (s,z PASS_MEM_STAT)
+#else
+
+# define ggc_alloc_zone(s, z) ggc_alloc (s)
+# define ggc_alloc_zone_pass_stat(s, z) ggc_alloc_stat (s PASS_MEM_STAT)
+
+#endif
+
+extern size_t ggc_total_allocated (void);
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.def
new file mode 100644
index 0000000..23eaae2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.def
@@ -0,0 +1,357 @@
+/* This file contains the definitions of the GIMPLE IR tuples used in GCC.
+
+ Copyright (C) 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Aldy Hernandez <aldyh@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* The format of this file is
+ DEFGSCODE(GIMPLE_symbol, printable name, structure).
+
+ Where symbol is the enumeration name without the ``GIMPLE_''.
+ The argument STRUCTURE is used to compute offsets into each of the
+ tuple structures that contain operands. Since vector operands
+ are at different offsets depending on the particular structure
+ used, these offsets are computed at compile time for efficient
+ lookup at runtime. See gimple_ops().
+
+ If a code does not use operand vectors, STRUCTURE should be NULL. */
+
+/* Error marker. This is used in similar ways as ERROR_MARK in tree.def. */
+DEFGSCODE(GIMPLE_ERROR_MARK, "gimple_error_mark", NULL)
+
+/* IMPORTANT. Do not rearrange the codes between GIMPLE_COND and
+ GIMPLE_RETURN. The ordering is exposed by gimple_has_ops calls.
+ These are all the GIMPLE statements with register operands. */
+
+/* GIMPLE_COND <COND_CODE, OP1, OP2, TRUE_LABEL, FALSE_LABEL>
+ represents the conditional jump:
+
+ if (OP1 COND_CODE OP2) goto TRUE_LABEL else goto FALSE_LABEL
+
+ COND_CODE is the tree code used as the comparison predicate. It
+ must be of class tcc_comparison.
+
+ OP1 and OP2 are the operands used in the comparison. They must be
+ accepted by is_gimple_operand.
+
+ TRUE_LABEL and FALSE_LABEL are the LABEL_DECL nodes used as the
+ jump target for the comparison. */
+DEFGSCODE(GIMPLE_COND, "gimple_cond", struct gimple_statement_with_ops)
+
+/* GIMPLE_GOTO <TARGET> represents unconditional jumps.
+ TARGET is a LABEL_DECL or an expression node for computed GOTOs. */
+DEFGSCODE(GIMPLE_GOTO, "gimple_goto", struct gimple_statement_with_ops)
+
+/* GIMPLE_LABEL <LABEL> represents label statements. LABEL is a
+ LABEL_DECL representing a jump target. */
+DEFGSCODE(GIMPLE_LABEL, "gimple_label", struct gimple_statement_with_ops)
+
+/* GIMPLE_SWITCH <INDEX, DEFAULT_LAB, LAB1, ..., LABN> represents the
+ multiway branch:
+
+ switch (INDEX)
+ {
+ case LAB1: ...; break;
+ ...
+ case LABN: ...; break;
+ default: ...
+ }
+
+ INDEX is the variable evaluated to decide which label to jump to.
+
+ DEFAULT_LAB, LAB1 ... LABN are the tree nodes representing case labels.
+ They must be CASE_LABEL_EXPR nodes. */
+DEFGSCODE(GIMPLE_SWITCH, "gimple_switch", struct gimple_statement_with_ops)
+
+/* GIMPLE_CHANGE_DYNAMIC_TYPE indicates a change in the dynamic type
+ of a memory location. This has no value and generates no
+ executable code. It is only used for type based alias analysis.
+ This is generated by C++ placement new and it's a direct
+ translation from CHANGE_DYNAMIC_TYPE_EXPR. The first operand
+ (gimple_cdt_new_type) is the new type. The second operand
+ (gimple_cdt_location) is the location (pointer) whose type is being
+ changed. */
+DEFGSCODE(GIMPLE_CHANGE_DYNAMIC_TYPE, "gimple_change_dynamic_type",
+ struct gimple_statement_with_ops)
+
+/* IMPORTANT.
+
+ Do not rearrange the codes between GIMPLE_ASSIGN and GIMPLE_RETURN.
+ It's exposed by GIMPLE_RANGE_CHECK calls. These are all the GIMPLE
+ statements with memory and register operands. */
+
+/* GIMPLE_ASSIGN <SUBCODE, LHS, RHS1[, RHS2]> represents the assignment
+ statement
+
+ LHS = RHS1 SUBCODE RHS2.
+
+ SUBCODE is the tree code for the expression computed by the RHS of the
+ assignment. It must be one of the tree codes accepted by
+ get_gimple_rhs_class.
+
+ LHS is the operand on the LHS of the assignment. It must be a tree node
+ accepted by is_gimple_operand.
+
+ RHS1 is the first operand on the RHS of the assignment. It must be a tree
+ node accepted by is_gimple_operand.
+
+ RHS2 is the second operand on the RHS of the assignemnt. It must be a tree
+ node accepted by is_gimple_operand. This argument exists only if SUBCODE is
+ of class GIMPLE_BINARY_RHS. */
+DEFGSCODE(GIMPLE_ASSIGN, "gimple_assign",
+ struct gimple_statement_with_memory_ops)
+
+/* GIMPLE_ASM <STRING, I1, ..., IN, O1, ... OM, C1, ..., CP>
+ represents inline assembly statements.
+
+ STRING is the string containing the assembly statements.
+ I1 ... IN are the N input operands.
+ O1 ... OM are the M output operands.
+ C1 ... CP are the P clobber operands. */
+DEFGSCODE(GIMPLE_ASM, "gimple_asm", struct gimple_statement_asm)
+
+/* GIMPLE_CALL <FN, LHS, ARG1, ..., ARGN[, CHAIN]> represents function
+ calls.
+
+ FN is the callee. It must be accepted by is_gimple_call_addr.
+
+ LHS is the operand where the return value from FN is stored. It may
+ be NULL.
+
+ ARG1 ... ARGN are the arguments. They must all be accepted by
+ is_gimple_operand.
+
+ CHAIN is the optional static chain link for nested functions. */
+DEFGSCODE(GIMPLE_CALL, "gimple_call",
+ struct gimple_statement_with_memory_ops)
+
+/* GIMPLE_RETURN <RETVAL> represents return statements.
+
+ RETVAL is the value to return or NULL. If a value is returned it
+ must be accepted by is_gimple_operand. */
+DEFGSCODE(GIMPLE_RETURN, "gimple_return",
+ struct gimple_statement_with_memory_ops)
+
+/* GIMPLE_BIND <VARS, BLOCK, BODY> represents a lexical scope.
+ VARS is the set of variables declared in that scope.
+ BLOCK is the symbol binding block used for debug information.
+ BODY is the sequence of statements in the scope. */
+DEFGSCODE(GIMPLE_BIND, "gimple_bind", NULL)
+
+/* GIMPLE_CATCH <TYPES, HANDLER> represents a typed exception handler.
+ TYPES is the type (or list of types) handled. HANDLER is the
+ sequence of statements that handle these types. */
+DEFGSCODE(GIMPLE_CATCH, "gimple_catch", NULL)
+
+/* GIMPLE_EH_FILTER <TYPES, FAILURE> represents an exception
+ specification. TYPES is a list of allowed types and FAILURE is the
+ sequence of statements to execute on failure. */
+DEFGSCODE(GIMPLE_EH_FILTER, "gimple_eh_filter", NULL)
+
+/* GIMPLE_PHI <RESULT, ARG1, ..., ARGN> represents the PHI node
+
+ RESULT = PHI <ARG1, ..., ARGN>
+
+ RESULT is the SSA name created by this PHI node.
+
+ ARG1 ... ARGN are the arguments to the PHI node. N must be
+ exactly the same as the number of incoming edges to the basic block
+ holding the PHI node. Every argument is either an SSA name or a
+ tree node of class tcc_constant. */
+DEFGSCODE(GIMPLE_PHI, "gimple_phi", NULL)
+
+/* GIMPLE_RESX <REGION> resumes execution after an exception.
+ REGION is the region number being left. */
+DEFGSCODE(GIMPLE_RESX, "gimple_resx", NULL)
+
+/* GIMPLE_TRY <TRY_KIND, EVAL, CLEANUP>
+ represents a try/catch or a try/finally statement.
+
+ TRY_KIND is either GIMPLE_TRY_CATCH or GIMPLE_TRY_FINALLY.
+
+ EVAL is the sequence of statements to execute on entry to GIMPLE_TRY.
+
+ CLEANUP is the sequence of statements to execute according to
+ TRY_KIND. If TRY_KIND is GIMPLE_TRY_CATCH, CLEANUP is only exected
+ if an exception is thrown during execution of EVAL. If TRY_KIND is
+ GIMPLE_TRY_FINALLY, CLEANUP is always executed after executing EVAL
+ (regardless of whether EVAL finished normally, or jumped out or an
+ exception was thrown). */
+DEFGSCODE(GIMPLE_TRY, "gimple_try", NULL)
+
+/* GIMPLE_NOP represents the "do nothing" statement. */
+DEFGSCODE(GIMPLE_NOP, "gimple_nop", NULL)
+
+
+/* IMPORTANT.
+
+ Do not rearrange any of the GIMPLE_OMP_* codes. This ordering is
+ exposed by the range check in gimple_omp_subcode(). */
+
+
+/* Tuples used for lowering of OMP_ATOMIC. Although the form of the OMP_ATOMIC
+ expression is very simple (just in form mem op= expr), various implicit
+ conversions may cause the expression to become more complex, so that it does
+ not fit the gimple grammar very well. To overcome this problem, OMP_ATOMIC
+ is rewritten as a sequence of two codes in gimplification:
+
+ GIMPLE_OMP_LOAD (tmp, mem)
+ val = some computations involving tmp;
+ GIMPLE_OMP_STORE (val). */
+DEFGSCODE(GIMPLE_OMP_ATOMIC_LOAD, "gimple_omp_atomic_load", NULL)
+DEFGSCODE(GIMPLE_OMP_ATOMIC_STORE, "gimple_omp_atomic_store", NULL)
+
+/* GIMPLE_OMP_CONTINUE marks the location of the loop or sections
+ iteration in partially lowered OpenMP code. */
+DEFGSCODE(GIMPLE_OMP_CONTINUE, "gimple_omp_continue", NULL)
+
+/* GIMPLE_OMP_CRITICAL <NAME, BODY> represents
+
+ #pragma omp critical [name]
+
+ NAME is the name given to the critical section.
+ BODY is the sequence of statements that are inside the critical section. */
+DEFGSCODE(GIMPLE_OMP_CRITICAL, "gimple_omp_critical", NULL)
+
+/* GIMPLE_OMP_FOR <BODY, CLAUSES, INDEX, INITIAL, FINAL, COND, INCR, PRE_BODY>
+ represents
+
+ PRE_BODY
+ #pragma omp for [clause1 ... clauseN]
+ for (INDEX = INITIAL; INDEX COND FINAL; INDEX {+=,-=} INCR)
+ BODY
+
+ BODY is the loop body.
+
+ CLAUSES is the list of clauses.
+
+ INDEX must be an integer or pointer variable, which is implicitly thread
+ private. It must be accepted by is_gimple_operand.
+
+ INITIAL is the initial value given to INDEX. It must be
+ accepted by is_gimple_operand.
+
+ FINAL is the final value that INDEX should take. It must
+ be accepted by is_gimple_operand.
+
+ COND is the condition code for the controlling predicate. It must
+ be one of { <, >, <=, >= }
+
+ INCR is the loop index increment. It must be tree node of type
+ tcc_constant.
+
+ PRE_BODY is a landing pad filled by the gimplifier with things from
+ INIT, COND, and INCR that are technically part of the OMP_FOR
+ structured block, but are evaluated before the loop body begins.
+
+ INITIAL, FINAL and INCR are required to be loop invariant integer
+ expressions that are evaluated without any synchronization.
+ The evaluation order, frequency of evaluation and side-effects are
+ unspecified by the standard. */
+DEFGSCODE(GIMPLE_OMP_FOR, "gimple_omp_for", NULL)
+
+/* GIMPLE_OMP_MASTER <BODY> represents #pragma omp master.
+ BODY is the sequence of statements to execute in the master section. */
+DEFGSCODE(GIMPLE_OMP_MASTER, "gimple_omp_master", NULL)
+
+/* GIMPLE_OMP_ORDERED <BODY> represents #pragma omp ordered.
+ BODY is the sequence of statements to execute in the ordered section. */
+DEFGSCODE(GIMPLE_OMP_ORDERED, "gimple_omp_ordered", NULL)
+
+/* GIMPLE_OMP_PARALLEL <BODY, CLAUSES, CHILD_FN, DATA_ARG> represents
+
+ #pragma omp parallel [CLAUSES]
+ BODY
+
+ BODY is a the sequence of statements to be executed by all threads.
+
+ CLAUSES is a TREE_LIST node with all the clauses.
+
+ CHILD_FN is set when outlining the body of the parallel region.
+ All the statements in BODY are moved into this newly created
+ function when converting OMP constructs into low-GIMPLE.
+
+ DATA_ARG is a local variable in the parent function containing data
+ to be shared with CHILD_FN. This is used to implement all the data
+ sharing clauses. */
+DEFGSCODE(GIMPLE_OMP_PARALLEL, "gimple_omp_parallel", NULL)
+
+/* GIMPLE_OMP_TASK <BODY, CLAUSES, CHILD_FN, DATA_ARG, COPY_FN,
+ ARG_SIZE, ARG_ALIGN> represents
+
+ #pragma omp task [CLAUSES]
+ BODY
+
+ BODY is a the sequence of statements to be executed by all threads.
+
+ CLAUSES is a TREE_LIST node with all the clauses.
+
+ CHILD_FN is set when outlining the body of the explicit task region.
+ All the statements in BODY are moved into this newly created
+ function when converting OMP constructs into low-GIMPLE.
+
+ DATA_ARG is a local variable in the parent function containing data
+ to be shared with CHILD_FN. This is used to implement all the data
+ sharing clauses.
+
+ COPY_FN is set when outlining the firstprivate var initialization.
+ All the needed statements are emitted into the newly created
+ function, or when only memcpy is needed, it is NULL.
+
+ ARG_SIZE and ARG_ALIGN are the size and alignment of the incoming
+ data area allocated by GOMP_task and passed to CHILD_FN. */
+DEFGSCODE(GIMPLE_OMP_TASK, "gimple_omp_task", NULL)
+
+/* OMP_RETURN marks the end of an OpenMP directive. */
+DEFGSCODE(GIMPLE_OMP_RETURN, "gimple_omp_return", NULL)
+
+/* OMP_SECTION <BODY> represents #pragma omp section.
+ BODY is the sequence of statements in the section body. */
+DEFGSCODE(GIMPLE_OMP_SECTION, "gimple_omp_section", NULL)
+
+/* OMP_SECTIONS <BODY, CLAUSES, CONTROL> represents #pragma omp sections.
+
+ BODY is the sequence of statements in the sections body.
+ CLAUSES is a TREE_LIST node holding the list of associated clauses.
+ CONTROL is a VAR_DECL used for deciding which of the sections
+ to execute. */
+DEFGSCODE(GIMPLE_OMP_SECTIONS, "gimple_omp_sections", NULL)
+
+/* GIMPLE_OMP_SECTIONS_SWITCH is a marker placed immediately after
+ OMP_SECTIONS. It represents the GIMPLE_SWITCH used to decide which
+ branch is taken. */
+DEFGSCODE(GIMPLE_OMP_SECTIONS_SWITCH, "gimple_omp_sections_switch", NULL)
+
+/* GIMPLE_OMP_SINGLE <BODY, CLAUSES> represents #pragma omp single
+ BODY is the sequence of statements inside the single section.
+ CLAUSES is a TREE_LIST node holding the associated clauses. */
+DEFGSCODE(GIMPLE_OMP_SINGLE, "gimple_omp_single", NULL)
+
+/* GIMPLE_PREDICT <PREDICT, OUTCOME> specifies a hint for branch prediction.
+
+ PREDICT is one of the predictors from predict.def.
+
+ OUTCOME is NOT_TAKEN or TAKEN. */
+DEFGSCODE(GIMPLE_PREDICT, "gimple_predict", NULL)
+
+/* This node represents a cleanup expression. It is ONLY USED INTERNALLY
+ by the gimplifier as a placeholder for cleanups, and its uses will be
+ cleaned up by the time gimplification is done.
+
+ This tuple should not exist outside of the gimplifier proper. */
+DEFGSCODE(GIMPLE_WITH_CLEANUP_EXPR, "gimple_with_cleanup_expr", NULL)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.h
new file mode 100644
index 0000000..ef1b2ac
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gimple.h
@@ -0,0 +1,4605 @@
+/* Gimple IR definitions.
+
+ Copyright 2007, 2008, 2009 Free Software Foundation, Inc.
+ Contributed by Aldy Hernandez <aldyh@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_GIMPLE_H
+#define GCC_GIMPLE_H
+
+#include "pointer-set.h"
+#include "vec.h"
+#include "ggc.h"
+#include "tm.h"
+#include "hard-reg-set.h"
+#include "basic-block.h"
+#include "tree-ssa-operands.h"
+
+DEF_VEC_P(gimple);
+DEF_VEC_ALLOC_P(gimple,heap);
+DEF_VEC_ALLOC_P(gimple,gc);
+
+DEF_VEC_P(gimple_seq);
+DEF_VEC_ALLOC_P(gimple_seq,gc);
+DEF_VEC_ALLOC_P(gimple_seq,heap);
+
+/* For each block, the PHI nodes that need to be rewritten are stored into
+ these vectors. */
+typedef VEC(gimple, heap) *gimple_vec;
+DEF_VEC_P (gimple_vec);
+DEF_VEC_ALLOC_P (gimple_vec, heap);
+
+enum gimple_code {
+#define DEFGSCODE(SYM, STRING, STRUCT) SYM,
+#include "gimple.def"
+#undef DEFGSCODE
+ LAST_AND_UNUSED_GIMPLE_CODE
+};
+
+extern const char *const gimple_code_name[];
+extern const unsigned char gimple_rhs_class_table[];
+
+/* Error out if a gimple tuple is addressed incorrectly. */
+#if defined ENABLE_GIMPLE_CHECKING
+extern void gimple_check_failed (const_gimple, const char *, int, \
+ const char *, enum gimple_code, \
+ enum tree_code) ATTRIBUTE_NORETURN;
+
+#define GIMPLE_CHECK(GS, CODE) \
+ do { \
+ const_gimple __gs = (GS); \
+ if (gimple_code (__gs) != (CODE)) \
+ gimple_check_failed (__gs, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE), 0); \
+ } while (0)
+#else /* not ENABLE_GIMPLE_CHECKING */
+#define GIMPLE_CHECK(GS, CODE) (void)0
+#endif
+
+/* Class of GIMPLE expressions suitable for the RHS of assignments. See
+ get_gimple_rhs_class. */
+enum gimple_rhs_class
+{
+ GIMPLE_INVALID_RHS, /* The expression cannot be used on the RHS. */
+ GIMPLE_BINARY_RHS, /* The expression is a binary operation. */
+ GIMPLE_UNARY_RHS, /* The expression is a unary operation. */
+ GIMPLE_SINGLE_RHS /* The expression is a single object (an SSA
+ name, a _DECL, a _REF, etc. */
+};
+
+/* Specific flags for individual GIMPLE statements. These flags are
+ always stored in gimple_statement_base.subcode and they may only be
+ defined for statement codes that do not use sub-codes.
+
+ Values for the masks can overlap as long as the overlapping values
+ are never used in the same statement class.
+
+ The maximum mask value that can be defined is 1 << 15 (i.e., each
+ statement code can hold up to 16 bitflags).
+
+ Keep this list sorted. */
+enum gf_mask {
+ GF_ASM_INPUT = 1 << 0,
+ GF_ASM_VOLATILE = 1 << 1,
+ GF_CALL_CANNOT_INLINE = 1 << 0,
+ GF_CALL_FROM_THUNK = 1 << 1,
+ GF_CALL_RETURN_SLOT_OPT = 1 << 2,
+ GF_CALL_TAILCALL = 1 << 3,
+ GF_CALL_VA_ARG_PACK = 1 << 4,
+ GF_OMP_PARALLEL_COMBINED = 1 << 0,
+
+ /* True on an GIMPLE_OMP_RETURN statement if the return does not require
+ a thread synchronization via some sort of barrier. The exact barrier
+ that would otherwise be emitted is dependent on the OMP statement with
+ which this return is associated. */
+ GF_OMP_RETURN_NOWAIT = 1 << 0,
+
+ GF_OMP_SECTION_LAST = 1 << 0,
+ GF_PREDICT_TAKEN = 1 << 15
+};
+
+/* Masks for selecting a pass local flag (PLF) to work on. These
+ masks are used by gimple_set_plf and gimple_plf. */
+enum plf_mask {
+ GF_PLF_1 = 1 << 0,
+ GF_PLF_2 = 1 << 1
+};
+
+/* A node in a gimple_seq_d. */
+struct gimple_seq_node_d GTY((chain_next ("%h.next"), chain_prev ("%h.prev")))
+{
+ gimple stmt;
+ struct gimple_seq_node_d *prev;
+ struct gimple_seq_node_d *next;
+};
+
+/* A double-linked sequence of gimple statements. */
+struct gimple_seq_d GTY ((chain_next ("%h.next_free")))
+{
+ /* First and last statements in the sequence. */
+ gimple_seq_node first;
+ gimple_seq_node last;
+
+ /* Sequences are created/destroyed frequently. To minimize
+ allocation activity, deallocated sequences are kept in a pool of
+ available sequences. This is the pointer to the next free
+ sequence in the pool. */
+ gimple_seq next_free;
+};
+
+
+/* Return the first node in GIMPLE sequence S. */
+
+static inline gimple_seq_node
+gimple_seq_first (const_gimple_seq s)
+{
+ return s ? s->first : NULL;
+}
+
+
+/* Return the first statement in GIMPLE sequence S. */
+
+static inline gimple
+gimple_seq_first_stmt (const_gimple_seq s)
+{
+ gimple_seq_node n = gimple_seq_first (s);
+ return (n) ? n->stmt : NULL;
+}
+
+
+/* Return the last node in GIMPLE sequence S. */
+
+static inline gimple_seq_node
+gimple_seq_last (const_gimple_seq s)
+{
+ return s ? s->last : NULL;
+}
+
+
+/* Return the last statement in GIMPLE sequence S. */
+
+static inline gimple
+gimple_seq_last_stmt (const_gimple_seq s)
+{
+ gimple_seq_node n = gimple_seq_last (s);
+ return (n) ? n->stmt : NULL;
+}
+
+
+/* Set the last node in GIMPLE sequence S to LAST. */
+
+static inline void
+gimple_seq_set_last (gimple_seq s, gimple_seq_node last)
+{
+ s->last = last;
+}
+
+
+/* Set the first node in GIMPLE sequence S to FIRST. */
+
+static inline void
+gimple_seq_set_first (gimple_seq s, gimple_seq_node first)
+{
+ s->first = first;
+}
+
+
+/* Return true if GIMPLE sequence S is empty. */
+
+static inline bool
+gimple_seq_empty_p (const_gimple_seq s)
+{
+ return s == NULL || s->first == NULL;
+}
+
+
+void gimple_seq_add_stmt (gimple_seq *, gimple);
+
+/* Allocate a new sequence and initialize its first element with STMT. */
+
+static inline gimple_seq
+gimple_seq_alloc_with_stmt (gimple stmt)
+{
+ gimple_seq seq = NULL;
+ gimple_seq_add_stmt (&seq, stmt);
+ return seq;
+}
+
+
+/* Returns the sequence of statements in BB. */
+
+static inline gimple_seq
+bb_seq (const_basic_block bb)
+{
+ return (!(bb->flags & BB_RTL) && bb->il.gimple) ? bb->il.gimple->seq : NULL;
+}
+
+
+/* Sets the sequence of statements in BB to SEQ. */
+
+static inline void
+set_bb_seq (basic_block bb, gimple_seq seq)
+{
+ gcc_assert (!(bb->flags & BB_RTL));
+ bb->il.gimple->seq = seq;
+}
+
+/* Iterator object for GIMPLE statement sequences. */
+
+typedef struct
+{
+ /* Sequence node holding the current statement. */
+ gimple_seq_node ptr;
+
+ /* Sequence and basic block holding the statement. These fields
+ are necessary to handle edge cases such as when statement is
+ added to an empty basic block or when the last statement of a
+ block/sequence is removed. */
+ gimple_seq seq;
+ basic_block bb;
+} gimple_stmt_iterator;
+
+
+/* Data structure definitions for GIMPLE tuples. NOTE: word markers
+ are for 64 bit hosts. */
+
+struct gimple_statement_base GTY(())
+{
+ /* [ WORD 1 ]
+ Main identifying code for a tuple. */
+ ENUM_BITFIELD(gimple_code) code : 8;
+
+ /* Nonzero if a warning should not be emitted on this tuple. */
+ unsigned int no_warning : 1;
+
+ /* Nonzero if this tuple has been visited. Passes are responsible
+ for clearing this bit before using it. */
+ unsigned int visited : 1;
+
+ /* Nonzero if this tuple represents a non-temporal move. */
+ unsigned int nontemporal_move : 1;
+
+ /* Pass local flags. These flags are free for any pass to use as
+ they see fit. Passes should not assume that these flags contain
+ any useful value when the pass starts. Any initial state that
+ the pass requires should be set on entry to the pass. See
+ gimple_set_plf and gimple_plf for usage. */
+ unsigned int plf : 2;
+
+ /* Nonzero if this statement has been modified and needs to have its
+ operands rescanned. */
+ unsigned modified : 1;
+
+ /* Nonzero if this statement contains volatile operands. */
+ unsigned has_volatile_ops : 1;
+
+ /* Nonzero if this statement contains memory refernces. */
+ unsigned references_memory_p : 1;
+
+ /* The SUBCODE field can be used for tuple-specific flags for tuples
+ that do not require subcodes. Note that SUBCODE should be at
+ least as wide as tree codes, as several tuples store tree codes
+ in there. */
+ unsigned int subcode : 16;
+
+ /* UID of this statement. This is used by passes that want to
+ assign IDs to statements. It must be assigned and used by each
+ pass. By default it should be assumed to contain garbage. */
+ unsigned uid;
+
+ /* [ WORD 2 ]
+ Locus information for debug info. */
+ location_t location;
+
+ /* Number of operands in this tuple. */
+ unsigned num_ops;
+
+ /* [ WORD 3 ]
+ Basic block holding this statement. */
+ struct basic_block_def *bb;
+
+ /* [ WORD 4 ]
+ Lexical block holding this statement. */
+ tree block;
+};
+
+
+/* Base structure for tuples with operands. */
+
+struct gimple_statement_with_ops_base GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ]
+ Symbols whose addresses are taken by this statement (i.e., they
+ appear inside ADDR_EXPR nodes). */
+ bitmap GTY((skip (""))) addresses_taken;
+
+ /* [ WORD 6-7 ]
+ SSA operand vectors. NOTE: It should be possible to
+ amalgamate these vectors with the operand vector OP. However,
+ the SSA operand vectors are organized differently and contain
+ more information (like immediate use chaining). */
+ struct def_optype_d GTY((skip (""))) *def_ops;
+ struct use_optype_d GTY((skip (""))) *use_ops;
+};
+
+
+/* Statements that take register operands. */
+
+struct gimple_statement_with_ops GTY(())
+{
+ /* [ WORD 1-7 ] */
+ struct gimple_statement_with_ops_base opbase;
+
+ /* [ WORD 8 ]
+ Operand vector. NOTE! This must always be the last field
+ of this structure. In particular, this means that this
+ structure cannot be embedded inside another one. */
+ tree GTY((length ("%h.opbase.gsbase.num_ops"))) op[1];
+};
+
+
+/* Base for statements that take both memory and register operands. */
+
+struct gimple_statement_with_memory_ops_base GTY(())
+{
+ /* [ WORD 1-7 ] */
+ struct gimple_statement_with_ops_base opbase;
+
+ /* [ WORD 8-9 ]
+ Vectors for virtual operands. */
+ struct voptype_d GTY((skip (""))) *vdef_ops;
+ struct voptype_d GTY((skip (""))) *vuse_ops;
+
+ /* [ WORD 9-10 ]
+ Symbols stored/loaded by this statement. */
+ bitmap GTY((skip (""))) stores;
+ bitmap GTY((skip (""))) loads;
+};
+
+
+/* Statements that take both memory and register operands. */
+
+struct gimple_statement_with_memory_ops GTY(())
+{
+ /* [ WORD 1-10 ] */
+ struct gimple_statement_with_memory_ops_base membase;
+
+ /* [ WORD 11 ]
+ Operand vector. NOTE! This must always be the last field
+ of this structure. In particular, this means that this
+ structure cannot be embedded inside another one. */
+ tree GTY((length ("%h.membase.opbase.gsbase.num_ops"))) op[1];
+};
+
+
+/* OpenMP statements (#pragma omp). */
+
+struct gimple_statement_omp GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ] */
+ gimple_seq body;
+};
+
+
+/* GIMPLE_BIND */
+
+struct gimple_statement_bind GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ]
+ Variables declared in this scope. */
+ tree vars;
+
+ /* [ WORD 6 ]
+ This is different than the BLOCK field in gimple_statement_base,
+ which is analogous to TREE_BLOCK (i.e., the lexical block holding
+ this statement). This field is the equivalent of BIND_EXPR_BLOCK
+ in tree land (i.e., the lexical scope defined by this bind). See
+ gimple-low.c. */
+ tree block;
+
+ /* [ WORD 7 ] */
+ gimple_seq body;
+};
+
+
+/* GIMPLE_CATCH */
+
+struct gimple_statement_catch GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ] */
+ tree types;
+
+ /* [ WORD 6 ] */
+ gimple_seq handler;
+};
+
+
+/* GIMPLE_EH_FILTER */
+
+struct gimple_statement_eh_filter GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* Subcode: EH_FILTER_MUST_NOT_THROW. A boolean flag analogous to
+ the tree counterpart. */
+
+ /* [ WORD 5 ]
+ Filter types. */
+ tree types;
+
+ /* [ WORD 6 ]
+ Failure actions. */
+ gimple_seq failure;
+};
+
+
+/* GIMPLE_PHI */
+
+struct gimple_statement_phi GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ] */
+ unsigned capacity;
+ unsigned nargs;
+
+ /* [ WORD 6 ] */
+ tree result;
+
+ /* [ WORD 7 ] */
+ struct phi_arg_d GTY ((length ("%h.nargs"))) args[1];
+};
+
+
+/* GIMPLE_RESX */
+
+struct gimple_statement_resx GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ]
+ Exception region number. */
+ int region;
+};
+
+
+/* GIMPLE_TRY */
+
+struct gimple_statement_try GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ]
+ Expression to evaluate. */
+ gimple_seq eval;
+
+ /* [ WORD 6 ]
+ Cleanup expression. */
+ gimple_seq cleanup;
+};
+
+/* Kind of GIMPLE_TRY statements. */
+enum gimple_try_flags
+{
+ /* A try/catch. */
+ GIMPLE_TRY_CATCH = 1 << 0,
+
+ /* A try/finally. */
+ GIMPLE_TRY_FINALLY = 1 << 1,
+ GIMPLE_TRY_KIND = GIMPLE_TRY_CATCH | GIMPLE_TRY_FINALLY,
+
+ /* Analogous to TRY_CATCH_IS_CLEANUP. */
+ GIMPLE_TRY_CATCH_IS_CLEANUP = 1 << 2
+};
+
+/* GIMPLE_WITH_CLEANUP_EXPR */
+
+struct gimple_statement_wce GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* Subcode: CLEANUP_EH_ONLY. True if the cleanup should only be
+ executed if an exception is thrown, not on normal exit of its
+ scope. This flag is analogous to the CLEANUP_EH_ONLY flag
+ in TARGET_EXPRs. */
+
+ /* [ WORD 5 ]
+ Cleanup expression. */
+ gimple_seq cleanup;
+};
+
+
+/* GIMPLE_ASM */
+
+struct gimple_statement_asm GTY(())
+{
+ /* [ WORD 1-10 ] */
+ struct gimple_statement_with_memory_ops_base membase;
+
+ /* [ WORD 11 ]
+ __asm__ statement. */
+ const char *string;
+
+ /* [ WORD 12 ]
+ Number of inputs, outputs and clobbers. */
+ unsigned char ni;
+ unsigned char no;
+ unsigned short nc;
+
+ /* [ WORD 13 ]
+ Operand vector. NOTE! This must always be the last field
+ of this structure. In particular, this means that this
+ structure cannot be embedded inside another one. */
+ tree GTY((length ("%h.membase.opbase.gsbase.num_ops"))) op[1];
+};
+
+/* GIMPLE_OMP_CRITICAL */
+
+struct gimple_statement_omp_critical GTY(())
+{
+ /* [ WORD 1-5 ] */
+ struct gimple_statement_omp omp;
+
+ /* [ WORD 6 ]
+ Critical section name. */
+ tree name;
+};
+
+
+struct gimple_omp_for_iter GTY(())
+{
+ /* Condition code. */
+ enum tree_code cond;
+
+ /* Index variable. */
+ tree index;
+
+ /* Initial value. */
+ tree initial;
+
+ /* Final value. */
+ tree final;
+
+ /* Increment. */
+ tree incr;
+};
+
+/* GIMPLE_OMP_FOR */
+
+struct gimple_statement_omp_for GTY(())
+{
+ /* [ WORD 1-5 ] */
+ struct gimple_statement_omp omp;
+
+ /* [ WORD 6 ] */
+ tree clauses;
+
+ /* [ WORD 7 ]
+ Number of elements in iter array. */
+ size_t collapse;
+
+ /* [ WORD 8 ] */
+ struct gimple_omp_for_iter * GTY((length ("%h.collapse"))) iter;
+
+ /* [ WORD 9 ]
+ Pre-body evaluated before the loop body begins. */
+ gimple_seq pre_body;
+};
+
+
+/* GIMPLE_OMP_PARALLEL */
+
+struct gimple_statement_omp_parallel GTY(())
+{
+ /* [ WORD 1-5 ] */
+ struct gimple_statement_omp omp;
+
+ /* [ WORD 6 ]
+ Clauses. */
+ tree clauses;
+
+ /* [ WORD 7 ]
+ Child function holding the body of the parallel region. */
+ tree child_fn;
+
+ /* [ WORD 8 ]
+ Shared data argument. */
+ tree data_arg;
+};
+
+
+/* GIMPLE_OMP_TASK */
+
+struct gimple_statement_omp_task GTY(())
+{
+ /* [ WORD 1-8 ] */
+ struct gimple_statement_omp_parallel par;
+
+ /* [ WORD 9 ]
+ Child function holding firstprivate initialization if needed. */
+ tree copy_fn;
+
+ /* [ WORD 10-11 ]
+ Size and alignment in bytes of the argument data block. */
+ tree arg_size;
+ tree arg_align;
+};
+
+
+/* GIMPLE_OMP_SECTION */
+/* Uses struct gimple_statement_omp. */
+
+
+/* GIMPLE_OMP_SECTIONS */
+
+struct gimple_statement_omp_sections GTY(())
+{
+ /* [ WORD 1-5 ] */
+ struct gimple_statement_omp omp;
+
+ /* [ WORD 6 ] */
+ tree clauses;
+
+ /* [ WORD 7 ]
+ The control variable used for deciding which of the sections to
+ execute. */
+ tree control;
+};
+
+/* GIMPLE_OMP_CONTINUE.
+
+ Note: This does not inherit from gimple_statement_omp, because we
+ do not need the body field. */
+
+struct gimple_statement_omp_continue GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ] */
+ tree control_def;
+
+ /* [ WORD 6 ] */
+ tree control_use;
+};
+
+/* GIMPLE_OMP_SINGLE */
+
+struct gimple_statement_omp_single GTY(())
+{
+ /* [ WORD 1-5 ] */
+ struct gimple_statement_omp omp;
+
+ /* [ WORD 6 ] */
+ tree clauses;
+};
+
+
+/* GIMPLE_OMP_ATOMIC_LOAD.
+ Note: This is based on gimple_statement_base, not g_s_omp, because g_s_omp
+ contains a sequence, which we don't need here. */
+
+struct gimple_statement_omp_atomic_load GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5-6 ] */
+ tree rhs, lhs;
+};
+
+/* GIMPLE_OMP_ATOMIC_STORE.
+ See note on GIMPLE_OMP_ATOMIC_LOAD. */
+
+struct gimple_statement_omp_atomic_store GTY(())
+{
+ /* [ WORD 1-4 ] */
+ struct gimple_statement_base gsbase;
+
+ /* [ WORD 5 ] */
+ tree val;
+};
+
+enum gimple_statement_structure_enum {
+#define DEFGSSTRUCT(SYM, STRING) SYM,
+#include "gsstruct.def"
+#undef DEFGSSTRUCT
+ LAST_GSS_ENUM
+};
+
+
+/* Define the overall contents of a gimple tuple. It may be any of the
+ structures declared above for various types of tuples. */
+
+union gimple_statement_d GTY ((desc ("gimple_statement_structure (&%h)")))
+{
+ struct gimple_statement_base GTY ((tag ("GSS_BASE"))) gsbase;
+ struct gimple_statement_with_ops GTY ((tag ("GSS_WITH_OPS"))) gsops;
+ struct gimple_statement_with_memory_ops GTY ((tag ("GSS_WITH_MEM_OPS"))) gsmem;
+ struct gimple_statement_omp GTY ((tag ("GSS_OMP"))) omp;
+ struct gimple_statement_bind GTY ((tag ("GSS_BIND"))) gimple_bind;
+ struct gimple_statement_catch GTY ((tag ("GSS_CATCH"))) gimple_catch;
+ struct gimple_statement_eh_filter GTY ((tag ("GSS_EH_FILTER"))) gimple_eh_filter;
+ struct gimple_statement_phi GTY ((tag ("GSS_PHI"))) gimple_phi;
+ struct gimple_statement_resx GTY ((tag ("GSS_RESX"))) gimple_resx;
+ struct gimple_statement_try GTY ((tag ("GSS_TRY"))) gimple_try;
+ struct gimple_statement_wce GTY ((tag ("GSS_WCE"))) gimple_wce;
+ struct gimple_statement_asm GTY ((tag ("GSS_ASM"))) gimple_asm;
+ struct gimple_statement_omp_critical GTY ((tag ("GSS_OMP_CRITICAL"))) gimple_omp_critical;
+ struct gimple_statement_omp_for GTY ((tag ("GSS_OMP_FOR"))) gimple_omp_for;
+ struct gimple_statement_omp_parallel GTY ((tag ("GSS_OMP_PARALLEL"))) gimple_omp_parallel;
+ struct gimple_statement_omp_task GTY ((tag ("GSS_OMP_TASK"))) gimple_omp_task;
+ struct gimple_statement_omp_sections GTY ((tag ("GSS_OMP_SECTIONS"))) gimple_omp_sections;
+ struct gimple_statement_omp_single GTY ((tag ("GSS_OMP_SINGLE"))) gimple_omp_single;
+ struct gimple_statement_omp_continue GTY ((tag ("GSS_OMP_CONTINUE"))) gimple_omp_continue;
+ struct gimple_statement_omp_atomic_load GTY ((tag ("GSS_OMP_ATOMIC_LOAD"))) gimple_omp_atomic_load;
+ struct gimple_statement_omp_atomic_store GTY ((tag ("GSS_OMP_ATOMIC_STORE"))) gimple_omp_atomic_store;
+};
+
+/* In gimple.c. */
+gimple gimple_build_return (tree);
+
+gimple gimple_build_assign_stat (tree, tree MEM_STAT_DECL);
+#define gimple_build_assign(l,r) gimple_build_assign_stat (l, r MEM_STAT_INFO)
+
+void extract_ops_from_tree (tree, enum tree_code *, tree *, tree *);
+
+gimple gimple_build_assign_with_ops_stat (enum tree_code, tree, tree,
+ tree MEM_STAT_DECL);
+#define gimple_build_assign_with_ops(c,o1,o2,o3) \
+ gimple_build_assign_with_ops_stat (c, o1, o2, o3 MEM_STAT_INFO)
+
+gimple gimple_build_call_vec (tree, VEC(tree, heap) *);
+gimple gimple_build_call (tree, unsigned, ...);
+gimple gimple_build_call_from_tree (tree);
+gimple gimplify_assign (tree, tree, gimple_seq *);
+gimple gimple_build_cond (enum tree_code, tree, tree, tree, tree);
+gimple gimple_build_label (tree label);
+gimple gimple_build_goto (tree dest);
+gimple gimple_build_nop (void);
+gimple gimple_build_bind (tree, gimple_seq, tree);
+gimple gimple_build_asm (const char *, unsigned, unsigned, unsigned, ...);
+gimple gimple_build_asm_vec (const char *, VEC(tree,gc) *, VEC(tree,gc) *,
+ VEC(tree,gc) *);
+gimple gimple_build_catch (tree, gimple_seq);
+gimple gimple_build_eh_filter (tree, gimple_seq);
+gimple gimple_build_try (gimple_seq, gimple_seq, enum gimple_try_flags);
+gimple gimple_build_wce (gimple_seq);
+gimple gimple_build_resx (int);
+gimple gimple_build_switch (unsigned, tree, tree, ...);
+gimple gimple_build_switch_vec (tree, tree, VEC(tree,heap) *);
+gimple gimple_build_omp_parallel (gimple_seq, tree, tree, tree);
+gimple gimple_build_omp_task (gimple_seq, tree, tree, tree, tree, tree, tree);
+gimple gimple_build_omp_for (gimple_seq, tree, size_t, gimple_seq);
+gimple gimple_build_omp_critical (gimple_seq, tree);
+gimple gimple_build_omp_section (gimple_seq);
+gimple gimple_build_omp_continue (tree, tree);
+gimple gimple_build_omp_master (gimple_seq);
+gimple gimple_build_omp_return (bool);
+gimple gimple_build_omp_ordered (gimple_seq);
+gimple gimple_build_omp_sections (gimple_seq, tree);
+gimple gimple_build_omp_sections_switch (void);
+gimple gimple_build_omp_single (gimple_seq, tree);
+gimple gimple_build_cdt (tree, tree);
+gimple gimple_build_omp_atomic_load (tree, tree);
+gimple gimple_build_omp_atomic_store (tree);
+gimple gimple_build_predict (enum br_predictor, enum prediction);
+enum gimple_statement_structure_enum gimple_statement_structure (gimple);
+enum gimple_statement_structure_enum gss_for_assign (enum tree_code);
+void sort_case_labels (VEC(tree,heap) *);
+void gimple_set_body (tree, gimple_seq);
+gimple_seq gimple_body (tree);
+bool gimple_has_body_p (tree);
+gimple_seq gimple_seq_alloc (void);
+void gimple_seq_free (gimple_seq);
+void gimple_seq_add_seq (gimple_seq *, gimple_seq);
+gimple_seq gimple_seq_copy (gimple_seq);
+int gimple_call_flags (const_gimple);
+bool gimple_assign_copy_p (gimple);
+bool gimple_assign_ssa_name_copy_p (gimple);
+bool gimple_assign_single_p (gimple);
+bool gimple_assign_unary_nop_p (gimple);
+void gimple_set_bb (gimple, struct basic_block_def *);
+tree gimple_fold (const_gimple);
+void gimple_assign_set_rhs_from_tree (gimple_stmt_iterator *, tree);
+void gimple_assign_set_rhs_with_ops (gimple_stmt_iterator *, enum tree_code,
+ tree, tree);
+tree gimple_get_lhs (const_gimple);
+void gimple_set_lhs (gimple, tree);
+gimple gimple_copy (gimple);
+bool is_gimple_operand (const_tree);
+void gimple_set_modified (gimple, bool);
+void gimple_cond_get_ops_from_tree (tree, enum tree_code *, tree *, tree *);
+gimple gimple_build_cond_from_tree (tree, tree, tree);
+void gimple_cond_set_condition_from_tree (gimple, tree);
+bool gimple_has_side_effects (const_gimple);
+bool gimple_rhs_has_side_effects (const_gimple);
+bool gimple_could_trap_p (gimple);
+bool gimple_assign_rhs_could_trap_p (gimple);
+void gimple_regimplify_operands (gimple, gimple_stmt_iterator *);
+bool empty_body_p (gimple_seq);
+unsigned get_gimple_rhs_num_ops (enum tree_code);
+
+/* Returns true iff T is a valid GIMPLE statement. */
+extern bool is_gimple_stmt (tree);
+
+/* Returns true iff TYPE is a valid type for a scalar register variable. */
+extern bool is_gimple_reg_type (tree);
+/* Returns true iff T is a scalar register variable. */
+extern bool is_gimple_reg (tree);
+/* Returns true if T is a GIMPLE temporary variable, false otherwise. */
+extern bool is_gimple_formal_tmp_var (tree);
+/* Returns true if T is a GIMPLE temporary register variable. */
+extern bool is_gimple_formal_tmp_reg (tree);
+/* Returns true iff T is any sort of variable. */
+extern bool is_gimple_variable (tree);
+/* Returns true iff T is any sort of symbol. */
+extern bool is_gimple_id (tree);
+/* Returns true iff T is a variable or an INDIRECT_REF (of a variable). */
+extern bool is_gimple_min_lval (tree);
+/* Returns true iff T is something whose address can be taken. */
+extern bool is_gimple_addressable (tree);
+/* Returns true iff T is any valid GIMPLE lvalue. */
+extern bool is_gimple_lvalue (tree);
+
+/* Returns true iff T is a GIMPLE address. */
+bool is_gimple_address (const_tree);
+/* Returns true iff T is a GIMPLE invariant address. */
+bool is_gimple_invariant_address (const_tree);
+/* Returns true iff T is a GIMPLE invariant address at interprocedural
+ level. */
+bool is_gimple_ip_invariant_address (const_tree);
+/* Returns true iff T is a valid GIMPLE constant. */
+bool is_gimple_constant (const_tree);
+/* Returns true iff T is a GIMPLE restricted function invariant. */
+extern bool is_gimple_min_invariant (const_tree);
+/* Returns true iff T is a GIMPLE restricted interprecodural invariant. */
+extern bool is_gimple_ip_invariant (const_tree);
+/* Returns true iff T is a GIMPLE rvalue. */
+extern bool is_gimple_val (tree);
+/* Returns true iff T is a GIMPLE asm statement input. */
+extern bool is_gimple_asm_val (tree);
+/* Returns true iff T is a valid rhs for a MODIFY_EXPR where the LHS is a
+ GIMPLE temporary, a renamed user variable, or something else,
+ respectively. */
+extern bool is_gimple_formal_tmp_rhs (tree);
+extern bool is_gimple_reg_rhs (tree);
+extern bool is_gimple_mem_rhs (tree);
+
+/* Returns true iff T is a valid if-statement condition. */
+extern bool is_gimple_condexpr (tree);
+
+/* Returns true iff T is a type conversion. */
+extern bool is_gimple_cast (tree);
+/* Returns true iff T is a variable that does not need to live in memory. */
+extern bool is_gimple_non_addressable (tree t);
+
+/* Returns true iff T is a valid call address expression. */
+extern bool is_gimple_call_addr (tree);
+/* If T makes a function call, returns the CALL_EXPR operand. */
+extern tree get_call_expr_in (tree t);
+
+extern void recalculate_side_effects (tree);
+
+/* In gimplify.c */
+extern tree create_tmp_var_raw (tree, const char *);
+extern tree create_tmp_var_name (const char *);
+extern tree create_tmp_var (tree, const char *);
+extern tree get_initialized_tmp_var (tree, gimple_seq *, gimple_seq *);
+extern tree get_formal_tmp_var (tree, gimple_seq *);
+extern void declare_vars (tree, gimple, bool);
+extern void tree_annotate_all_with_location (tree *, location_t);
+extern void annotate_all_with_location (gimple_seq, location_t);
+
+/* Validation of GIMPLE expressions. Note that these predicates only check
+ the basic form of the expression, they don't recurse to make sure that
+ underlying nodes are also of the right form. */
+typedef bool (*gimple_predicate)(tree);
+
+
+/* FIXME we should deduce this from the predicate. */
+typedef enum fallback_t {
+ fb_none = 0, /* Do not generate a temporary. */
+
+ fb_rvalue = 1, /* Generate an rvalue to hold the result of a
+ gimplified expression. */
+
+ fb_lvalue = 2, /* Generate an lvalue to hold the result of a
+ gimplified expression. */
+
+ fb_mayfail = 4, /* Gimplification may fail. Error issued
+ afterwards. */
+ fb_either= fb_rvalue | fb_lvalue
+} fallback_t;
+
+enum gimplify_status {
+ GS_ERROR = -2, /* Something Bad Seen. */
+ GS_UNHANDLED = -1, /* A langhook result for "I dunno". */
+ GS_OK = 0, /* We did something, maybe more to do. */
+ GS_ALL_DONE = 1 /* The expression is fully gimplified. */
+};
+
+struct gimplify_ctx
+{
+ struct gimplify_ctx *prev_context;
+
+ VEC(gimple,heap) *bind_expr_stack;
+ tree temps;
+ gimple_seq conditional_cleanups;
+ tree exit_label;
+ tree return_temp;
+
+ VEC(tree,heap) *case_labels;
+ /* The formal temporary table. Should this be persistent? */
+ htab_t temp_htab;
+
+ int conditions;
+ bool save_stack;
+ bool into_ssa;
+ bool allow_rhs_cond_expr;
+};
+
+extern enum gimplify_status gimplify_expr (tree *, gimple_seq *, gimple_seq *,
+ bool (*) (tree), fallback_t);
+extern void gimplify_type_sizes (tree, gimple_seq *);
+extern void gimplify_one_sizepos (tree *, gimple_seq *);
+extern bool gimplify_stmt (tree *, gimple_seq *);
+extern gimple gimplify_body (tree *, tree, bool);
+extern void push_gimplify_context (struct gimplify_ctx *);
+extern void pop_gimplify_context (gimple);
+extern void gimplify_and_add (tree, gimple_seq *);
+
+/* Miscellaneous helpers. */
+extern void gimple_add_tmp_var (tree);
+extern gimple gimple_current_bind_expr (void);
+extern VEC(gimple, heap) *gimple_bind_expr_stack (void);
+extern tree voidify_wrapper_expr (tree, tree);
+extern tree build_and_jump (tree *);
+extern tree alloc_stmt_list (void);
+extern void free_stmt_list (tree);
+extern tree force_labels_r (tree *, int *, void *);
+extern enum gimplify_status gimplify_va_arg_expr (tree *, gimple_seq *,
+ gimple_seq *);
+struct gimplify_omp_ctx;
+extern void omp_firstprivatize_variable (struct gimplify_omp_ctx *, tree);
+extern tree gimple_boolify (tree);
+extern gimple_predicate rhs_predicate_for (tree);
+extern tree canonicalize_cond_expr_cond (tree);
+
+/* In omp-low.c. */
+extern void diagnose_omp_structured_block_errors (tree);
+extern tree omp_reduction_init (tree, tree);
+
+/* In tree-nested.c. */
+extern void lower_nested_functions (tree);
+extern void insert_field_into_struct (tree, tree);
+
+/* In gimplify.c. */
+extern void gimplify_function_tree (tree);
+
+/* In cfgexpand.c. */
+extern tree gimple_assign_rhs_to_tree (gimple);
+
+/* In builtins.c */
+extern bool validate_gimple_arglist (const_gimple, ...);
+
+/* In tree-ssa-operands.c */
+extern void gimple_add_to_addresses_taken (gimple, tree);
+
+/* In tree-ssa.c */
+extern bool tree_ssa_useless_type_conversion (tree);
+extern bool useless_type_conversion_p (tree, tree);
+extern bool types_compatible_p (tree, tree);
+
+/* Return the code for GIMPLE statement G. */
+
+static inline enum gimple_code
+gimple_code (const_gimple g)
+{
+ return g->gsbase.code;
+}
+
+
+/* Return true if statement G has sub-statements. This is only true for
+ High GIMPLE statements. */
+
+static inline bool
+gimple_has_substatements (gimple g)
+{
+ switch (gimple_code (g))
+ {
+ case GIMPLE_BIND:
+ case GIMPLE_CATCH:
+ case GIMPLE_EH_FILTER:
+ case GIMPLE_TRY:
+ case GIMPLE_OMP_FOR:
+ case GIMPLE_OMP_MASTER:
+ case GIMPLE_OMP_ORDERED:
+ case GIMPLE_OMP_SECTION:
+ case GIMPLE_OMP_PARALLEL:
+ case GIMPLE_OMP_TASK:
+ case GIMPLE_OMP_SECTIONS:
+ case GIMPLE_OMP_SINGLE:
+ case GIMPLE_OMP_CRITICAL:
+ case GIMPLE_WITH_CLEANUP_EXPR:
+ return true;
+
+ default:
+ return false;
+ }
+}
+
+
+/* Return the basic block holding statement G. */
+
+static inline struct basic_block_def *
+gimple_bb (const_gimple g)
+{
+ return g->gsbase.bb;
+}
+
+
+/* Return the lexical scope block holding statement G. */
+
+static inline tree
+gimple_block (const_gimple g)
+{
+ return g->gsbase.block;
+}
+
+
+/* Set BLOCK to be the lexical scope block holding statement G. */
+
+static inline void
+gimple_set_block (gimple g, tree block)
+{
+ g->gsbase.block = block;
+}
+
+
+/* Return location information for statement G. */
+
+static inline location_t
+gimple_location (const_gimple g)
+{
+ return g->gsbase.location;
+}
+
+/* Return pointer to location information for statement G. */
+
+static inline const location_t *
+gimple_location_ptr (const_gimple g)
+{
+ return &g->gsbase.location;
+}
+
+
+/* Set location information for statement G. */
+
+static inline void
+gimple_set_location (gimple g, location_t location)
+{
+ g->gsbase.location = location;
+}
+
+
+/* Return true if G contains location information. */
+
+static inline bool
+gimple_has_location (const_gimple g)
+{
+ return gimple_location (g) != UNKNOWN_LOCATION;
+}
+
+
+/* Return the file name of the location of STMT. */
+
+static inline const char *
+gimple_filename (const_gimple stmt)
+{
+ return LOCATION_FILE (gimple_location (stmt));
+}
+
+
+/* Return the line number of the location of STMT. */
+
+static inline int
+gimple_lineno (const_gimple stmt)
+{
+ return LOCATION_LINE (gimple_location (stmt));
+}
+
+
+/* Determine whether SEQ is a singleton. */
+
+static inline bool
+gimple_seq_singleton_p (gimple_seq seq)
+{
+ return ((gimple_seq_first (seq) != NULL)
+ && (gimple_seq_first (seq) == gimple_seq_last (seq)));
+}
+
+/* Return true if no warnings should be emitted for statement STMT. */
+
+static inline bool
+gimple_no_warning_p (const_gimple stmt)
+{
+ return stmt->gsbase.no_warning;
+}
+
+/* Set the no_warning flag of STMT to NO_WARNING. */
+
+static inline void
+gimple_set_no_warning (gimple stmt, bool no_warning)
+{
+ stmt->gsbase.no_warning = (unsigned) no_warning;
+}
+
+/* Set the visited status on statement STMT to VISITED_P. */
+
+static inline void
+gimple_set_visited (gimple stmt, bool visited_p)
+{
+ stmt->gsbase.visited = (unsigned) visited_p;
+}
+
+
+/* Return the visited status for statement STMT. */
+
+static inline bool
+gimple_visited_p (gimple stmt)
+{
+ return stmt->gsbase.visited;
+}
+
+
+/* Set pass local flag PLF on statement STMT to VAL_P. */
+
+static inline void
+gimple_set_plf (gimple stmt, enum plf_mask plf, bool val_p)
+{
+ if (val_p)
+ stmt->gsbase.plf |= (unsigned int) plf;
+ else
+ stmt->gsbase.plf &= ~((unsigned int) plf);
+}
+
+
+/* Return the value of pass local flag PLF on statement STMT. */
+
+static inline unsigned int
+gimple_plf (gimple stmt, enum plf_mask plf)
+{
+ return stmt->gsbase.plf & ((unsigned int) plf);
+}
+
+
+/* Set the UID of statement. */
+
+static inline void
+gimple_set_uid (gimple g, unsigned uid)
+{
+ g->gsbase.uid = uid;
+}
+
+
+/* Return the UID of statement. */
+
+static inline unsigned
+gimple_uid (const_gimple g)
+{
+ return g->gsbase.uid;
+}
+
+
+/* Return true if GIMPLE statement G has register or memory operands. */
+
+static inline bool
+gimple_has_ops (const_gimple g)
+{
+ return gimple_code (g) >= GIMPLE_COND && gimple_code (g) <= GIMPLE_RETURN;
+}
+
+
+/* Return true if GIMPLE statement G has memory operands. */
+
+static inline bool
+gimple_has_mem_ops (const_gimple g)
+{
+ return gimple_code (g) >= GIMPLE_ASSIGN && gimple_code (g) <= GIMPLE_RETURN;
+}
+
+/* Return the set of addresses taken by statement G. */
+
+static inline bitmap
+gimple_addresses_taken (const_gimple g)
+{
+ if (gimple_has_ops (g))
+ return g->gsops.opbase.addresses_taken;
+ else
+ return NULL;
+}
+
+
+/* Return a pointer to the set of addresses taken by statement G. */
+
+static inline bitmap *
+gimple_addresses_taken_ptr (gimple g)
+{
+ if (gimple_has_ops (g))
+ return &g->gsops.opbase.addresses_taken;
+ else
+ return NULL;
+}
+
+
+/* Set B to be the set of addresses taken by statement G. The
+ previous set is freed. */
+
+static inline void
+gimple_set_addresses_taken (gimple g, bitmap b)
+{
+ gcc_assert (gimple_has_ops (g));
+ BITMAP_FREE (g->gsops.opbase.addresses_taken);
+ g->gsops.opbase.addresses_taken = b;
+}
+
+
+/* Return the set of DEF operands for statement G. */
+
+static inline struct def_optype_d *
+gimple_def_ops (const_gimple g)
+{
+ if (!gimple_has_ops (g))
+ return NULL;
+ return g->gsops.opbase.def_ops;
+}
+
+
+/* Set DEF to be the set of DEF operands for statement G. */
+
+static inline void
+gimple_set_def_ops (gimple g, struct def_optype_d *def)
+{
+ gcc_assert (gimple_has_ops (g));
+ g->gsops.opbase.def_ops = def;
+}
+
+
+/* Return the set of USE operands for statement G. */
+
+static inline struct use_optype_d *
+gimple_use_ops (const_gimple g)
+{
+ if (!gimple_has_ops (g))
+ return NULL;
+ return g->gsops.opbase.use_ops;
+}
+
+
+/* Set USE to be the set of USE operands for statement G. */
+
+static inline void
+gimple_set_use_ops (gimple g, struct use_optype_d *use)
+{
+ gcc_assert (gimple_has_ops (g));
+ g->gsops.opbase.use_ops = use;
+}
+
+
+/* Return the set of VUSE operands for statement G. */
+
+static inline struct voptype_d *
+gimple_vuse_ops (const_gimple g)
+{
+ if (!gimple_has_mem_ops (g))
+ return NULL;
+ return g->gsmem.membase.vuse_ops;
+}
+
+
+/* Set OPS to be the set of VUSE operands for statement G. */
+
+static inline void
+gimple_set_vuse_ops (gimple g, struct voptype_d *ops)
+{
+ gcc_assert (gimple_has_mem_ops (g));
+ g->gsmem.membase.vuse_ops = ops;
+}
+
+
+/* Return the set of VDEF operands for statement G. */
+
+static inline struct voptype_d *
+gimple_vdef_ops (const_gimple g)
+{
+ if (!gimple_has_mem_ops (g))
+ return NULL;
+ return g->gsmem.membase.vdef_ops;
+}
+
+
+/* Set OPS to be the set of VDEF operands for statement G. */
+
+static inline void
+gimple_set_vdef_ops (gimple g, struct voptype_d *ops)
+{
+ gcc_assert (gimple_has_mem_ops (g));
+ g->gsmem.membase.vdef_ops = ops;
+}
+
+
+/* Return the set of symbols loaded by statement G. Each element of the
+ set is the DECL_UID of the corresponding symbol. */
+
+static inline bitmap
+gimple_loaded_syms (const_gimple g)
+{
+ if (!gimple_has_mem_ops (g))
+ return NULL;
+ return g->gsmem.membase.loads;
+}
+
+
+/* Return the set of symbols stored by statement G. Each element of
+ the set is the DECL_UID of the corresponding symbol. */
+
+static inline bitmap
+gimple_stored_syms (const_gimple g)
+{
+ if (!gimple_has_mem_ops (g))
+ return NULL;
+ return g->gsmem.membase.stores;
+}
+
+
+/* Return true if statement G has operands and the modified field has
+ been set. */
+
+static inline bool
+gimple_modified_p (const_gimple g)
+{
+ return (gimple_has_ops (g)) ? (bool) g->gsbase.modified : false;
+}
+
+
+/* Return the tree code for the expression computed by STMT. This is
+ only valid for GIMPLE_COND, GIMPLE_CALL and GIMPLE_ASSIGN. For
+ GIMPLE_CALL, return CALL_EXPR as the expression code for
+ consistency. This is useful when the caller needs to deal with the
+ three kinds of computation that GIMPLE supports. */
+
+static inline enum tree_code
+gimple_expr_code (const_gimple stmt)
+{
+ enum gimple_code code = gimple_code (stmt);
+ if (code == GIMPLE_ASSIGN || code == GIMPLE_COND)
+ return (enum tree_code) stmt->gsbase.subcode;
+ else if (code == GIMPLE_CALL)
+ return CALL_EXPR;
+ else
+ gcc_unreachable ();
+}
+
+
+/* Mark statement S as modified, and update it. */
+
+static inline void
+update_stmt (gimple s)
+{
+ if (gimple_has_ops (s))
+ {
+ gimple_set_modified (s, true);
+ update_stmt_operands (s);
+ }
+}
+
+/* Update statement S if it has been optimized. */
+
+static inline void
+update_stmt_if_modified (gimple s)
+{
+ if (gimple_modified_p (s))
+ update_stmt_operands (s);
+}
+
+/* Return true if statement STMT contains volatile operands. */
+
+static inline bool
+gimple_has_volatile_ops (const_gimple stmt)
+{
+ if (gimple_has_mem_ops (stmt))
+ return stmt->gsbase.has_volatile_ops;
+ else
+ return false;
+}
+
+
+/* Set the HAS_VOLATILE_OPS flag to VOLATILEP. */
+
+static inline void
+gimple_set_has_volatile_ops (gimple stmt, bool volatilep)
+{
+ if (gimple_has_mem_ops (stmt))
+ stmt->gsbase.has_volatile_ops = (unsigned) volatilep;
+}
+
+
+/* Return true if statement STMT may access memory. */
+
+static inline bool
+gimple_references_memory_p (gimple stmt)
+{
+ return gimple_has_mem_ops (stmt) && stmt->gsbase.references_memory_p;
+}
+
+
+/* Set the REFERENCES_MEMORY_P flag for STMT to MEM_P. */
+
+static inline void
+gimple_set_references_memory (gimple stmt, bool mem_p)
+{
+ if (gimple_has_mem_ops (stmt))
+ stmt->gsbase.references_memory_p = (unsigned) mem_p;
+}
+
+/* Return the subcode for OMP statement S. */
+
+static inline unsigned
+gimple_omp_subcode (const_gimple s)
+{
+ gcc_assert (gimple_code (s) >= GIMPLE_OMP_ATOMIC_LOAD
+ && gimple_code (s) <= GIMPLE_OMP_SINGLE);
+ return s->gsbase.subcode;
+}
+
+/* Set the subcode for OMP statement S to SUBCODE. */
+
+static inline void
+gimple_omp_set_subcode (gimple s, unsigned int subcode)
+{
+ /* We only have 16 bits for the subcode. Assert that we are not
+ overflowing it. */
+ gcc_assert (subcode < (1 << 16));
+ s->gsbase.subcode = subcode;
+}
+
+/* Set the nowait flag on OMP_RETURN statement S. */
+
+static inline void
+gimple_omp_return_set_nowait (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_OMP_RETURN);
+ s->gsbase.subcode |= GF_OMP_RETURN_NOWAIT;
+}
+
+
+/* Return true if OMP return statement G has the GF_OMP_RETURN_NOWAIT
+ flag set. */
+
+static inline bool
+gimple_omp_return_nowait_p (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_RETURN);
+ return (gimple_omp_subcode (g) & GF_OMP_RETURN_NOWAIT) != 0;
+}
+
+
+/* Return true if OMP section statement G has the GF_OMP_SECTION_LAST
+ flag set. */
+
+static inline bool
+gimple_omp_section_last_p (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_SECTION);
+ return (gimple_omp_subcode (g) & GF_OMP_SECTION_LAST) != 0;
+}
+
+
+/* Set the GF_OMP_SECTION_LAST flag on G. */
+
+static inline void
+gimple_omp_section_set_last (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_SECTION);
+ g->gsbase.subcode |= GF_OMP_SECTION_LAST;
+}
+
+
+/* Return true if OMP parallel statement G has the
+ GF_OMP_PARALLEL_COMBINED flag set. */
+
+static inline bool
+gimple_omp_parallel_combined_p (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_PARALLEL);
+ return (gimple_omp_subcode (g) & GF_OMP_PARALLEL_COMBINED) != 0;
+}
+
+
+/* Set the GF_OMP_PARALLEL_COMBINED field in G depending on the boolean
+ value of COMBINED_P. */
+
+static inline void
+gimple_omp_parallel_set_combined_p (gimple g, bool combined_p)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_PARALLEL);
+ if (combined_p)
+ g->gsbase.subcode |= GF_OMP_PARALLEL_COMBINED;
+ else
+ g->gsbase.subcode &= ~GF_OMP_PARALLEL_COMBINED;
+}
+
+
+/* Return the number of operands for statement GS. */
+
+static inline unsigned
+gimple_num_ops (const_gimple gs)
+{
+ return gs->gsbase.num_ops;
+}
+
+
+/* Set the number of operands for statement GS. */
+
+static inline void
+gimple_set_num_ops (gimple gs, unsigned num_ops)
+{
+ gs->gsbase.num_ops = num_ops;
+}
+
+
+/* Return the array of operands for statement GS. */
+
+static inline tree *
+gimple_ops (gimple gs)
+{
+ /* Offset in bytes to the location of the operand vector in every
+ tuple structure. Defined in gimple.c */
+ extern size_t const gimple_ops_offset_[];
+
+ if (!gimple_has_ops (gs))
+ return NULL;
+
+ /* All the tuples have their operand vector at the very bottom
+ of the structure. */
+ return ((tree *) ((char *) gs + gimple_ops_offset_[gimple_code (gs)]));
+}
+
+
+/* Return operand I for statement GS. */
+
+static inline tree
+gimple_op (const_gimple gs, unsigned i)
+{
+ if (gimple_has_ops (gs))
+ {
+ gcc_assert (i < gimple_num_ops (gs));
+ return gimple_ops (CONST_CAST_GIMPLE (gs))[i];
+ }
+ else
+ return NULL_TREE;
+}
+
+/* Return a pointer to operand I for statement GS. */
+
+static inline tree *
+gimple_op_ptr (const_gimple gs, unsigned i)
+{
+ if (gimple_has_ops (gs))
+ {
+ gcc_assert (i < gimple_num_ops (gs));
+ return gimple_ops (CONST_CAST_GIMPLE (gs)) + i;
+ }
+ else
+ return NULL;
+}
+
+/* Set operand I of statement GS to OP. */
+
+static inline void
+gimple_set_op (gimple gs, unsigned i, tree op)
+{
+ gcc_assert (gimple_has_ops (gs) && i < gimple_num_ops (gs));
+
+ /* Note. It may be tempting to assert that OP matches
+ is_gimple_operand, but that would be wrong. Different tuples
+ accept slightly different sets of tree operands. Each caller
+ should perform its own validation. */
+ gimple_ops (gs)[i] = op;
+}
+
+/* Return true if GS is a GIMPLE_ASSIGN. */
+
+static inline bool
+is_gimple_assign (const_gimple gs)
+{
+ return gimple_code (gs) == GIMPLE_ASSIGN;
+}
+
+/* Determine if expression CODE is one of the valid expressions that can
+ be used on the RHS of GIMPLE assignments. */
+
+static inline enum gimple_rhs_class
+get_gimple_rhs_class (enum tree_code code)
+{
+ return (enum gimple_rhs_class) gimple_rhs_class_table[(int) code];
+}
+
+/* Return the LHS of assignment statement GS. */
+
+static inline tree
+gimple_assign_lhs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gimple_op (gs, 0);
+}
+
+
+/* Return a pointer to the LHS of assignment statement GS. */
+
+static inline tree *
+gimple_assign_lhs_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gimple_op_ptr (gs, 0);
+}
+
+
+/* Set LHS to be the LHS operand of assignment statement GS. */
+
+static inline void
+gimple_assign_set_lhs (gimple gs, tree lhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ gcc_assert (is_gimple_operand (lhs));
+ gimple_set_op (gs, 0, lhs);
+
+ if (lhs && TREE_CODE (lhs) == SSA_NAME)
+ SSA_NAME_DEF_STMT (lhs) = gs;
+}
+
+
+/* Return the first operand on the RHS of assignment statement GS. */
+
+static inline tree
+gimple_assign_rhs1 (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gimple_op (gs, 1);
+}
+
+
+/* Return a pointer to the first operand on the RHS of assignment
+ statement GS. */
+
+static inline tree *
+gimple_assign_rhs1_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gimple_op_ptr (gs, 1);
+}
+
+/* Set RHS to be the first operand on the RHS of assignment statement GS. */
+
+static inline void
+gimple_assign_set_rhs1 (gimple gs, tree rhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+
+ /* If there are 3 or more operands, the 2 operands on the RHS must be
+ GIMPLE values. */
+ if (gimple_num_ops (gs) >= 3)
+ gcc_assert (is_gimple_val (rhs));
+ else
+ gcc_assert (is_gimple_operand (rhs));
+
+ gimple_set_op (gs, 1, rhs);
+}
+
+
+/* Return the second operand on the RHS of assignment statement GS.
+ If GS does not have two operands, NULL is returned instead. */
+
+static inline tree
+gimple_assign_rhs2 (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+
+ if (gimple_num_ops (gs) >= 3)
+ return gimple_op (gs, 2);
+ else
+ return NULL_TREE;
+}
+
+
+/* Return a pointer to the second operand on the RHS of assignment
+ statement GS. */
+
+static inline tree *
+gimple_assign_rhs2_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gimple_op_ptr (gs, 2);
+}
+
+
+/* Set RHS to be the second operand on the RHS of assignment statement GS. */
+
+static inline void
+gimple_assign_set_rhs2 (gimple gs, tree rhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+
+ /* The 2 operands on the RHS must be GIMPLE values. */
+ gcc_assert (is_gimple_val (rhs));
+
+ gimple_set_op (gs, 2, rhs);
+}
+
+/* Returns true if GS is a nontemporal move. */
+
+static inline bool
+gimple_assign_nontemporal_move_p (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ return gs->gsbase.nontemporal_move;
+}
+
+/* Sets nontemporal move flag of GS to NONTEMPORAL. */
+
+static inline void
+gimple_assign_set_nontemporal_move (gimple gs, bool nontemporal)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+ gs->gsbase.nontemporal_move = nontemporal;
+}
+
+
+/* Return the code of the expression computed on the rhs of assignment
+ statement GS. In case that the RHS is a single object, returns the
+ tree code of the object. */
+
+static inline enum tree_code
+gimple_assign_rhs_code (const_gimple gs)
+{
+ enum tree_code code;
+ GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
+
+ code = gimple_expr_code (gs);
+ if (get_gimple_rhs_class (code) == GIMPLE_SINGLE_RHS)
+ code = TREE_CODE (gimple_assign_rhs1 (gs));
+
+ return code;
+}
+
+
+/* Set CODE to be the code for the expression computed on the RHS of
+ assignment S. */
+
+static inline void
+gimple_assign_set_rhs_code (gimple s, enum tree_code code)
+{
+ GIMPLE_CHECK (s, GIMPLE_ASSIGN);
+ s->gsbase.subcode = code;
+}
+
+
+/* Return the gimple rhs class of the code of the expression computed on
+ the rhs of assignment statement GS.
+ This will never return GIMPLE_INVALID_RHS. */
+
+static inline enum gimple_rhs_class
+gimple_assign_rhs_class (const_gimple gs)
+{
+ return get_gimple_rhs_class (gimple_assign_rhs_code (gs));
+}
+
+
+/* Return true if S is a type-cast assignment. */
+
+static inline bool
+gimple_assign_cast_p (gimple s)
+{
+ if (is_gimple_assign (s))
+ {
+ enum tree_code sc = gimple_assign_rhs_code (s);
+ return CONVERT_EXPR_CODE_P (sc)
+ || sc == VIEW_CONVERT_EXPR
+ || sc == FIX_TRUNC_EXPR;
+ }
+
+ return false;
+}
+
+
+/* Return true if GS is a GIMPLE_CALL. */
+
+static inline bool
+is_gimple_call (const_gimple gs)
+{
+ return gimple_code (gs) == GIMPLE_CALL;
+}
+
+/* Return the LHS of call statement GS. */
+
+static inline tree
+gimple_call_lhs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op (gs, 0);
+}
+
+
+/* Return a pointer to the LHS of call statement GS. */
+
+static inline tree *
+gimple_call_lhs_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op_ptr (gs, 0);
+}
+
+
+/* Set LHS to be the LHS operand of call statement GS. */
+
+static inline void
+gimple_call_set_lhs (gimple gs, tree lhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ gcc_assert (!lhs || is_gimple_operand (lhs));
+ gimple_set_op (gs, 0, lhs);
+ if (lhs && TREE_CODE (lhs) == SSA_NAME)
+ SSA_NAME_DEF_STMT (lhs) = gs;
+}
+
+
+/* Return the tree node representing the function called by call
+ statement GS. */
+
+static inline tree
+gimple_call_fn (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op (gs, 1);
+}
+
+
+/* Return a pointer to the tree node representing the function called by call
+ statement GS. */
+
+static inline tree *
+gimple_call_fn_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op_ptr (gs, 1);
+}
+
+
+/* Set FN to be the function called by call statement GS. */
+
+static inline void
+gimple_call_set_fn (gimple gs, tree fn)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ gcc_assert (is_gimple_operand (fn));
+ gimple_set_op (gs, 1, fn);
+}
+
+
+/* Set FNDECL to be the function called by call statement GS. */
+
+static inline void
+gimple_call_set_fndecl (gimple gs, tree decl)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
+ gimple_set_op (gs, 1, build_fold_addr_expr (decl));
+}
+
+
+/* If a given GIMPLE_CALL's callee is a FUNCTION_DECL, return it.
+ Otherwise return NULL. This function is analogous to
+ get_callee_fndecl in tree land. */
+
+static inline tree
+gimple_call_fndecl (const_gimple gs)
+{
+ tree addr = gimple_call_fn (gs);
+ if (TREE_CODE (addr) == ADDR_EXPR)
+ {
+ gcc_assert (TREE_CODE (TREE_OPERAND (addr, 0)) == FUNCTION_DECL);
+ return TREE_OPERAND (addr, 0);
+ }
+ return NULL_TREE;
+}
+
+
+/* Return the type returned by call statement GS. */
+
+static inline tree
+gimple_call_return_type (const_gimple gs)
+{
+ tree fn = gimple_call_fn (gs);
+ tree type = TREE_TYPE (fn);
+
+ /* See through the pointer. */
+ gcc_assert (POINTER_TYPE_P (type));
+ type = TREE_TYPE (type);
+
+ gcc_assert (TREE_CODE (type) == FUNCTION_TYPE
+ || TREE_CODE (type) == METHOD_TYPE);
+
+ /* The type returned by a FUNCTION_DECL is the type of its
+ function type. */
+ return TREE_TYPE (type);
+}
+
+
+/* Return the static chain for call statement GS. */
+
+static inline tree
+gimple_call_chain (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op (gs, 2);
+}
+
+
+/* Return a pointer to the static chain for call statement GS. */
+
+static inline tree *
+gimple_call_chain_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op_ptr (gs, 2);
+}
+
+/* Set CHAIN to be the static chain for call statement GS. */
+
+static inline void
+gimple_call_set_chain (gimple gs, tree chain)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ gcc_assert (chain == NULL
+ || TREE_CODE (chain) == ADDR_EXPR
+ || SSA_VAR_P (chain));
+ gimple_set_op (gs, 2, chain);
+}
+
+
+/* Return the number of arguments used by call statement GS. */
+
+static inline unsigned
+gimple_call_num_args (const_gimple gs)
+{
+ unsigned num_ops;
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ num_ops = gimple_num_ops (gs);
+ gcc_assert (num_ops >= 3);
+ return num_ops - 3;
+}
+
+
+/* Return the argument at position INDEX for call statement GS. */
+
+static inline tree
+gimple_call_arg (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op (gs, index + 3);
+}
+
+
+/* Return a pointer to the argument at position INDEX for call
+ statement GS. */
+
+static inline tree *
+gimple_call_arg_ptr (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ return gimple_op_ptr (gs, index + 3);
+}
+
+
+/* Set ARG to be the argument at position INDEX for call statement GS. */
+
+static inline void
+gimple_call_set_arg (gimple gs, unsigned index, tree arg)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CALL);
+ gcc_assert (is_gimple_operand (arg));
+ gimple_set_op (gs, index + 3, arg);
+}
+
+
+/* If TAIL_P is true, mark call statement S as being a tail call
+ (i.e., a call just before the exit of a function). These calls are
+ candidate for tail call optimization. */
+
+static inline void
+gimple_call_set_tail (gimple s, bool tail_p)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ if (tail_p)
+ s->gsbase.subcode |= GF_CALL_TAILCALL;
+ else
+ s->gsbase.subcode &= ~GF_CALL_TAILCALL;
+}
+
+
+/* Return true if GIMPLE_CALL S is marked as a tail call. */
+
+static inline bool
+gimple_call_tail_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (s->gsbase.subcode & GF_CALL_TAILCALL) != 0;
+}
+
+
+/* Set the inlinable status of GIMPLE_CALL S to INLINABLE_P. */
+
+static inline void
+gimple_call_set_cannot_inline (gimple s, bool inlinable_p)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ if (inlinable_p)
+ s->gsbase.subcode |= GF_CALL_CANNOT_INLINE;
+ else
+ s->gsbase.subcode &= ~GF_CALL_CANNOT_INLINE;
+}
+
+
+/* Return true if GIMPLE_CALL S cannot be inlined. */
+
+static inline bool
+gimple_call_cannot_inline_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (s->gsbase.subcode & GF_CALL_CANNOT_INLINE) != 0;
+}
+
+
+/* If RETURN_SLOT_OPT_P is true mark GIMPLE_CALL S as valid for return
+ slot optimization. This transformation uses the target of the call
+ expansion as the return slot for calls that return in memory. */
+
+static inline void
+gimple_call_set_return_slot_opt (gimple s, bool return_slot_opt_p)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ if (return_slot_opt_p)
+ s->gsbase.subcode |= GF_CALL_RETURN_SLOT_OPT;
+ else
+ s->gsbase.subcode &= ~GF_CALL_RETURN_SLOT_OPT;
+}
+
+
+/* Return true if S is marked for return slot optimization. */
+
+static inline bool
+gimple_call_return_slot_opt_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (s->gsbase.subcode & GF_CALL_RETURN_SLOT_OPT) != 0;
+}
+
+
+/* If FROM_THUNK_P is true, mark GIMPLE_CALL S as being the jump from a
+ thunk to the thunked-to function. */
+
+static inline void
+gimple_call_set_from_thunk (gimple s, bool from_thunk_p)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ if (from_thunk_p)
+ s->gsbase.subcode |= GF_CALL_FROM_THUNK;
+ else
+ s->gsbase.subcode &= ~GF_CALL_FROM_THUNK;
+}
+
+
+/* Return true if GIMPLE_CALL S is a jump from a thunk. */
+
+static inline bool
+gimple_call_from_thunk_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (s->gsbase.subcode & GF_CALL_FROM_THUNK) != 0;
+}
+
+
+/* If PASS_ARG_PACK_P is true, GIMPLE_CALL S is a stdarg call that needs the
+ argument pack in its argument list. */
+
+static inline void
+gimple_call_set_va_arg_pack (gimple s, bool pass_arg_pack_p)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ if (pass_arg_pack_p)
+ s->gsbase.subcode |= GF_CALL_VA_ARG_PACK;
+ else
+ s->gsbase.subcode &= ~GF_CALL_VA_ARG_PACK;
+}
+
+
+/* Return true if GIMPLE_CALL S is a stdarg call that needs the
+ argument pack in its argument list. */
+
+static inline bool
+gimple_call_va_arg_pack_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (s->gsbase.subcode & GF_CALL_VA_ARG_PACK) != 0;
+}
+
+
+/* Return true if S is a noreturn call. */
+
+static inline bool
+gimple_call_noreturn_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (gimple_call_flags (s) & ECF_NORETURN) != 0;
+}
+
+
+/* Return true if S is a nothrow call. */
+
+static inline bool
+gimple_call_nothrow_p (gimple s)
+{
+ GIMPLE_CHECK (s, GIMPLE_CALL);
+ return (gimple_call_flags (s) & ECF_NOTHROW) != 0;
+}
+
+
+/* Copy all the GF_CALL_* flags from ORIG_CALL to DEST_CALL. */
+
+static inline void
+gimple_call_copy_flags (gimple dest_call, gimple orig_call)
+{
+ GIMPLE_CHECK (dest_call, GIMPLE_CALL);
+ GIMPLE_CHECK (orig_call, GIMPLE_CALL);
+ dest_call->gsbase.subcode = orig_call->gsbase.subcode;
+}
+
+
+/* Returns true if this is a GIMPLE_ASSIGN or a GIMPLE_CALL with a
+ non-NULL lhs. */
+
+static inline bool
+gimple_has_lhs (gimple stmt)
+{
+ return (is_gimple_assign (stmt)
+ || (is_gimple_call (stmt)
+ && gimple_call_lhs (stmt) != NULL_TREE));
+}
+
+
+/* Return the code of the predicate computed by conditional statement GS. */
+
+static inline enum tree_code
+gimple_cond_code (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gs->gsbase.subcode;
+}
+
+
+/* Set CODE to be the predicate code for the conditional statement GS. */
+
+static inline void
+gimple_cond_set_code (gimple gs, enum tree_code code)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ gcc_assert (TREE_CODE_CLASS (code) == tcc_comparison);
+ gs->gsbase.subcode = code;
+}
+
+
+/* Return the LHS of the predicate computed by conditional statement GS. */
+
+static inline tree
+gimple_cond_lhs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op (gs, 0);
+}
+
+/* Return the pointer to the LHS of the predicate computed by conditional
+ statement GS. */
+
+static inline tree *
+gimple_cond_lhs_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op_ptr (gs, 0);
+}
+
+/* Set LHS to be the LHS operand of the predicate computed by
+ conditional statement GS. */
+
+static inline void
+gimple_cond_set_lhs (gimple gs, tree lhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ gcc_assert (is_gimple_operand (lhs));
+ gimple_set_op (gs, 0, lhs);
+}
+
+
+/* Return the RHS operand of the predicate computed by conditional GS. */
+
+static inline tree
+gimple_cond_rhs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op (gs, 1);
+}
+
+/* Return the pointer to the RHS operand of the predicate computed by
+ conditional GS. */
+
+static inline tree *
+gimple_cond_rhs_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op_ptr (gs, 1);
+}
+
+
+/* Set RHS to be the RHS operand of the predicate computed by
+ conditional statement GS. */
+
+static inline void
+gimple_cond_set_rhs (gimple gs, tree rhs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ gcc_assert (is_gimple_operand (rhs));
+ gimple_set_op (gs, 1, rhs);
+}
+
+
+/* Return the label used by conditional statement GS when its
+ predicate evaluates to true. */
+
+static inline tree
+gimple_cond_true_label (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op (gs, 2);
+}
+
+
+/* Set LABEL to be the label used by conditional statement GS when its
+ predicate evaluates to true. */
+
+static inline void
+gimple_cond_set_true_label (gimple gs, tree label)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ gcc_assert (!label || TREE_CODE (label) == LABEL_DECL);
+ gimple_set_op (gs, 2, label);
+}
+
+
+/* Set LABEL to be the label used by conditional statement GS when its
+ predicate evaluates to false. */
+
+static inline void
+gimple_cond_set_false_label (gimple gs, tree label)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ gcc_assert (!label || TREE_CODE (label) == LABEL_DECL);
+ gimple_set_op (gs, 3, label);
+}
+
+
+/* Return the label used by conditional statement GS when its
+ predicate evaluates to false. */
+
+static inline tree
+gimple_cond_false_label (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_COND);
+ return gimple_op (gs, 3);
+}
+
+
+/* Set the conditional COND_STMT to be of the form 'if (1 == 0)'. */
+
+static inline void
+gimple_cond_make_false (gimple gs)
+{
+ gimple_cond_set_lhs (gs, boolean_true_node);
+ gimple_cond_set_rhs (gs, boolean_false_node);
+ gs->gsbase.subcode = EQ_EXPR;
+}
+
+
+/* Set the conditional COND_STMT to be of the form 'if (1 == 1)'. */
+
+static inline void
+gimple_cond_make_true (gimple gs)
+{
+ gimple_cond_set_lhs (gs, boolean_true_node);
+ gimple_cond_set_rhs (gs, boolean_true_node);
+ gs->gsbase.subcode = EQ_EXPR;
+}
+
+/* Check if conditional statemente GS is of the form 'if (1 == 1)',
+ 'if (0 == 0)', 'if (1 != 0)' or 'if (0 != 1)' */
+
+static inline bool
+gimple_cond_true_p (const_gimple gs)
+{
+ tree lhs = gimple_cond_lhs (gs);
+ tree rhs = gimple_cond_rhs (gs);
+ enum tree_code code = gimple_cond_code (gs);
+
+ if (lhs != boolean_true_node && lhs != boolean_false_node)
+ return false;
+
+ if (rhs != boolean_true_node && rhs != boolean_false_node)
+ return false;
+
+ if (code == NE_EXPR && lhs != rhs)
+ return true;
+
+ if (code == EQ_EXPR && lhs == rhs)
+ return true;
+
+ return false;
+}
+
+/* Check if conditional statement GS is of the form 'if (1 != 1)',
+ 'if (0 != 0)', 'if (1 == 0)' or 'if (0 == 1)' */
+
+static inline bool
+gimple_cond_false_p (const_gimple gs)
+{
+ tree lhs = gimple_cond_lhs (gs);
+ tree rhs = gimple_cond_rhs (gs);
+ enum tree_code code = gimple_cond_code (gs);
+
+ if (lhs != boolean_true_node && lhs != boolean_false_node)
+ return false;
+
+ if (rhs != boolean_true_node && rhs != boolean_false_node)
+ return false;
+
+ if (code == NE_EXPR && lhs == rhs)
+ return true;
+
+ if (code == EQ_EXPR && lhs != rhs)
+ return true;
+
+ return false;
+}
+
+/* Check if conditional statement GS is of the form 'if (var != 0)' or
+ 'if (var == 1)' */
+
+static inline bool
+gimple_cond_single_var_p (gimple gs)
+{
+ if (gimple_cond_code (gs) == NE_EXPR
+ && gimple_cond_rhs (gs) == boolean_false_node)
+ return true;
+
+ if (gimple_cond_code (gs) == EQ_EXPR
+ && gimple_cond_rhs (gs) == boolean_true_node)
+ return true;
+
+ return false;
+}
+
+/* Set the code, LHS and RHS of GIMPLE_COND STMT from CODE, LHS and RHS. */
+
+static inline void
+gimple_cond_set_condition (gimple stmt, enum tree_code code, tree lhs, tree rhs)
+{
+ gimple_cond_set_code (stmt, code);
+ gimple_cond_set_lhs (stmt, lhs);
+ gimple_cond_set_rhs (stmt, rhs);
+}
+
+/* Return the LABEL_DECL node used by GIMPLE_LABEL statement GS. */
+
+static inline tree
+gimple_label_label (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_LABEL);
+ return gimple_op (gs, 0);
+}
+
+
+/* Set LABEL to be the LABEL_DECL node used by GIMPLE_LABEL statement
+ GS. */
+
+static inline void
+gimple_label_set_label (gimple gs, tree label)
+{
+ GIMPLE_CHECK (gs, GIMPLE_LABEL);
+ gcc_assert (TREE_CODE (label) == LABEL_DECL);
+ gimple_set_op (gs, 0, label);
+}
+
+
+/* Return the destination of the unconditional jump GS. */
+
+static inline tree
+gimple_goto_dest (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_GOTO);
+ return gimple_op (gs, 0);
+}
+
+
+/* Set DEST to be the destination of the unconditonal jump GS. */
+
+static inline void
+gimple_goto_set_dest (gimple gs, tree dest)
+{
+ GIMPLE_CHECK (gs, GIMPLE_GOTO);
+ gcc_assert (is_gimple_operand (dest));
+ gimple_set_op (gs, 0, dest);
+}
+
+
+/* Return the variables declared in the GIMPLE_BIND statement GS. */
+
+static inline tree
+gimple_bind_vars (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ return gs->gimple_bind.vars;
+}
+
+
+/* Set VARS to be the set of variables declared in the GIMPLE_BIND
+ statement GS. */
+
+static inline void
+gimple_bind_set_vars (gimple gs, tree vars)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gs->gimple_bind.vars = vars;
+}
+
+
+/* Append VARS to the set of variables declared in the GIMPLE_BIND
+ statement GS. */
+
+static inline void
+gimple_bind_append_vars (gimple gs, tree vars)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gs->gimple_bind.vars = chainon (gs->gimple_bind.vars, vars);
+}
+
+
+/* Return the GIMPLE sequence contained in the GIMPLE_BIND statement GS. */
+
+static inline gimple_seq
+gimple_bind_body (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ return gs->gimple_bind.body;
+}
+
+
+/* Set SEQ to be the GIMPLE sequence contained in the GIMPLE_BIND
+ statement GS. */
+
+static inline void
+gimple_bind_set_body (gimple gs, gimple_seq seq)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gs->gimple_bind.body = seq;
+}
+
+
+/* Append a statement to the end of a GIMPLE_BIND's body. */
+
+static inline void
+gimple_bind_add_stmt (gimple gs, gimple stmt)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gimple_seq_add_stmt (&gs->gimple_bind.body, stmt);
+}
+
+
+/* Append a sequence of statements to the end of a GIMPLE_BIND's body. */
+
+static inline void
+gimple_bind_add_seq (gimple gs, gimple_seq seq)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gimple_seq_add_seq (&gs->gimple_bind.body, seq);
+}
+
+
+/* Return the TREE_BLOCK node associated with GIMPLE_BIND statement
+ GS. This is analogous to the BIND_EXPR_BLOCK field in trees. */
+
+static inline tree
+gimple_bind_block (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ return gs->gimple_bind.block;
+}
+
+
+/* Set BLOCK to be the TREE_BLOCK node associated with GIMPLE_BIND
+ statement GS. */
+
+static inline void
+gimple_bind_set_block (gimple gs, tree block)
+{
+ GIMPLE_CHECK (gs, GIMPLE_BIND);
+ gcc_assert (block == NULL_TREE || TREE_CODE (block) == BLOCK);
+ gs->gimple_bind.block = block;
+}
+
+
+/* Return the number of input operands for GIMPLE_ASM GS. */
+
+static inline unsigned
+gimple_asm_ninputs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return gs->gimple_asm.ni;
+}
+
+
+/* Return the number of output operands for GIMPLE_ASM GS. */
+
+static inline unsigned
+gimple_asm_noutputs (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return gs->gimple_asm.no;
+}
+
+
+/* Return the number of clobber operands for GIMPLE_ASM GS. */
+
+static inline unsigned
+gimple_asm_nclobbers (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return gs->gimple_asm.nc;
+}
+
+
+/* Return input operand INDEX of GIMPLE_ASM GS. */
+
+static inline tree
+gimple_asm_input_op (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.ni);
+ return gimple_op (gs, index);
+}
+
+/* Return a pointer to input operand INDEX of GIMPLE_ASM GS. */
+
+static inline tree *
+gimple_asm_input_op_ptr (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.ni);
+ return gimple_op_ptr (gs, index);
+}
+
+
+/* Set IN_OP to be input operand INDEX in GIMPLE_ASM GS. */
+
+static inline void
+gimple_asm_set_input_op (gimple gs, unsigned index, tree in_op)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.ni);
+ gcc_assert (TREE_CODE (in_op) == TREE_LIST);
+ gimple_set_op (gs, index, in_op);
+}
+
+
+/* Return output operand INDEX of GIMPLE_ASM GS. */
+
+static inline tree
+gimple_asm_output_op (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.no);
+ return gimple_op (gs, index + gs->gimple_asm.ni);
+}
+
+/* Return a pointer to output operand INDEX of GIMPLE_ASM GS. */
+
+static inline tree *
+gimple_asm_output_op_ptr (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.no);
+ return gimple_op_ptr (gs, index + gs->gimple_asm.ni);
+}
+
+
+/* Set OUT_OP to be output operand INDEX in GIMPLE_ASM GS. */
+
+static inline void
+gimple_asm_set_output_op (gimple gs, unsigned index, tree out_op)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.no);
+ gcc_assert (TREE_CODE (out_op) == TREE_LIST);
+ gimple_set_op (gs, index + gs->gimple_asm.ni, out_op);
+}
+
+
+/* Return clobber operand INDEX of GIMPLE_ASM GS. */
+
+static inline tree
+gimple_asm_clobber_op (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.nc);
+ return gimple_op (gs, index + gs->gimple_asm.ni + gs->gimple_asm.no);
+}
+
+
+/* Set CLOBBER_OP to be clobber operand INDEX in GIMPLE_ASM GS. */
+
+static inline void
+gimple_asm_set_clobber_op (gimple gs, unsigned index, tree clobber_op)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ gcc_assert (index <= gs->gimple_asm.nc);
+ gcc_assert (TREE_CODE (clobber_op) == TREE_LIST);
+ gimple_set_op (gs, index + gs->gimple_asm.ni + gs->gimple_asm.no, clobber_op);
+}
+
+
+/* Return the string representing the assembly instruction in
+ GIMPLE_ASM GS. */
+
+static inline const char *
+gimple_asm_string (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return gs->gimple_asm.string;
+}
+
+
+/* Return true if GS is an asm statement marked volatile. */
+
+static inline bool
+gimple_asm_volatile_p (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return (gs->gsbase.subcode & GF_ASM_VOLATILE) != 0;
+}
+
+
+/* If VOLATLE_P is true, mark asm statement GS as volatile. */
+
+static inline void
+gimple_asm_set_volatile (gimple gs, bool volatile_p)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ if (volatile_p)
+ gs->gsbase.subcode |= GF_ASM_VOLATILE;
+ else
+ gs->gsbase.subcode &= ~GF_ASM_VOLATILE;
+}
+
+
+/* If INPUT_P is true, mark asm GS as an ASM_INPUT. */
+
+static inline void
+gimple_asm_set_input (gimple gs, bool input_p)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ if (input_p)
+ gs->gsbase.subcode |= GF_ASM_INPUT;
+ else
+ gs->gsbase.subcode &= ~GF_ASM_INPUT;
+}
+
+
+/* Return true if asm GS is an ASM_INPUT. */
+
+static inline bool
+gimple_asm_input_p (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_ASM);
+ return (gs->gsbase.subcode & GF_ASM_INPUT) != 0;
+}
+
+
+/* Return the types handled by GIMPLE_CATCH statement GS. */
+
+static inline tree
+gimple_catch_types (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ return gs->gimple_catch.types;
+}
+
+
+/* Return a pointer to the types handled by GIMPLE_CATCH statement GS. */
+
+static inline tree *
+gimple_catch_types_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ return &gs->gimple_catch.types;
+}
+
+
+/* Return the GIMPLE sequence representing the body of the handler of
+ GIMPLE_CATCH statement GS. */
+
+static inline gimple_seq
+gimple_catch_handler (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ return gs->gimple_catch.handler;
+}
+
+
+/* Return a pointer to the GIMPLE sequence representing the body of
+ the handler of GIMPLE_CATCH statement GS. */
+
+static inline gimple_seq *
+gimple_catch_handler_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ return &gs->gimple_catch.handler;
+}
+
+
+/* Set T to be the set of types handled by GIMPLE_CATCH GS. */
+
+static inline void
+gimple_catch_set_types (gimple gs, tree t)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ gs->gimple_catch.types = t;
+}
+
+
+/* Set HANDLER to be the body of GIMPLE_CATCH GS. */
+
+static inline void
+gimple_catch_set_handler (gimple gs, gimple_seq handler)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CATCH);
+ gs->gimple_catch.handler = handler;
+}
+
+
+/* Return the types handled by GIMPLE_EH_FILTER statement GS. */
+
+static inline tree
+gimple_eh_filter_types (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ return gs->gimple_eh_filter.types;
+}
+
+
+/* Return a pointer to the types handled by GIMPLE_EH_FILTER statement
+ GS. */
+
+static inline tree *
+gimple_eh_filter_types_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ return &gs->gimple_eh_filter.types;
+}
+
+
+/* Return the sequence of statement to execute when GIMPLE_EH_FILTER
+ statement fails. */
+
+static inline gimple_seq
+gimple_eh_filter_failure (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ return gs->gimple_eh_filter.failure;
+}
+
+
+/* Set TYPES to be the set of types handled by GIMPLE_EH_FILTER GS. */
+
+static inline void
+gimple_eh_filter_set_types (gimple gs, tree types)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ gs->gimple_eh_filter.types = types;
+}
+
+
+/* Set FAILURE to be the sequence of statements to execute on failure
+ for GIMPLE_EH_FILTER GS. */
+
+static inline void
+gimple_eh_filter_set_failure (gimple gs, gimple_seq failure)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ gs->gimple_eh_filter.failure = failure;
+}
+
+/* Return the EH_FILTER_MUST_NOT_THROW flag. */
+
+static inline bool
+
+gimple_eh_filter_must_not_throw (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ return gs->gsbase.subcode != 0;
+}
+
+/* Set the EH_FILTER_MUST_NOT_THROW flag to the value MNTP. */
+
+static inline void
+gimple_eh_filter_set_must_not_throw (gimple gs, bool mntp)
+{
+ GIMPLE_CHECK (gs, GIMPLE_EH_FILTER);
+ gs->gsbase.subcode = (unsigned int) mntp;
+}
+
+
+/* GIMPLE_TRY accessors. */
+
+/* Return the kind of try block represented by GIMPLE_TRY GS. This is
+ either GIMPLE_TRY_CATCH or GIMPLE_TRY_FINALLY. */
+
+static inline enum gimple_try_flags
+gimple_try_kind (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ return (enum gimple_try_flags) (gs->gsbase.subcode & GIMPLE_TRY_KIND);
+}
+
+
+/* Set the kind of try block represented by GIMPLE_TRY GS. */
+
+static inline void
+gimple_try_set_kind (gimple gs, enum gimple_try_flags kind)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ gcc_assert (kind == GIMPLE_TRY_CATCH || kind == GIMPLE_TRY_FINALLY);
+ if (gimple_try_kind (gs) != kind)
+ gs->gsbase.subcode = (unsigned int) kind;
+}
+
+
+/* Return the GIMPLE_TRY_CATCH_IS_CLEANUP flag. */
+
+static inline bool
+gimple_try_catch_is_cleanup (const_gimple gs)
+{
+ gcc_assert (gimple_try_kind (gs) == GIMPLE_TRY_CATCH);
+ return (gs->gsbase.subcode & GIMPLE_TRY_CATCH_IS_CLEANUP) != 0;
+}
+
+
+/* Return the sequence of statements used as the body for GIMPLE_TRY GS. */
+
+static inline gimple_seq
+gimple_try_eval (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ return gs->gimple_try.eval;
+}
+
+
+/* Return the sequence of statements used as the cleanup body for
+ GIMPLE_TRY GS. */
+
+static inline gimple_seq
+gimple_try_cleanup (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ return gs->gimple_try.cleanup;
+}
+
+
+/* Set the GIMPLE_TRY_CATCH_IS_CLEANUP flag. */
+
+static inline void
+gimple_try_set_catch_is_cleanup (gimple g, bool catch_is_cleanup)
+{
+ gcc_assert (gimple_try_kind (g) == GIMPLE_TRY_CATCH);
+ if (catch_is_cleanup)
+ g->gsbase.subcode |= GIMPLE_TRY_CATCH_IS_CLEANUP;
+ else
+ g->gsbase.subcode &= ~GIMPLE_TRY_CATCH_IS_CLEANUP;
+}
+
+
+/* Set EVAL to be the sequence of statements to use as the body for
+ GIMPLE_TRY GS. */
+
+static inline void
+gimple_try_set_eval (gimple gs, gimple_seq eval)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ gs->gimple_try.eval = eval;
+}
+
+
+/* Set CLEANUP to be the sequence of statements to use as the cleanup
+ body for GIMPLE_TRY GS. */
+
+static inline void
+gimple_try_set_cleanup (gimple gs, gimple_seq cleanup)
+{
+ GIMPLE_CHECK (gs, GIMPLE_TRY);
+ gs->gimple_try.cleanup = cleanup;
+}
+
+
+/* Return the cleanup sequence for cleanup statement GS. */
+
+static inline gimple_seq
+gimple_wce_cleanup (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_WITH_CLEANUP_EXPR);
+ return gs->gimple_wce.cleanup;
+}
+
+
+/* Set CLEANUP to be the cleanup sequence for GS. */
+
+static inline void
+gimple_wce_set_cleanup (gimple gs, gimple_seq cleanup)
+{
+ GIMPLE_CHECK (gs, GIMPLE_WITH_CLEANUP_EXPR);
+ gs->gimple_wce.cleanup = cleanup;
+}
+
+
+/* Return the CLEANUP_EH_ONLY flag for a WCE tuple. */
+
+static inline bool
+gimple_wce_cleanup_eh_only (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_WITH_CLEANUP_EXPR);
+ return gs->gsbase.subcode != 0;
+}
+
+
+/* Set the CLEANUP_EH_ONLY flag for a WCE tuple. */
+
+static inline void
+gimple_wce_set_cleanup_eh_only (gimple gs, bool eh_only_p)
+{
+ GIMPLE_CHECK (gs, GIMPLE_WITH_CLEANUP_EXPR);
+ gs->gsbase.subcode = (unsigned int) eh_only_p;
+}
+
+
+/* Return the maximum number of arguments supported by GIMPLE_PHI GS. */
+
+static inline unsigned
+gimple_phi_capacity (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ return gs->gimple_phi.capacity;
+}
+
+
+/* Return the number of arguments in GIMPLE_PHI GS. This must always
+ be exactly the number of incoming edges for the basic block holding
+ GS. */
+
+static inline unsigned
+gimple_phi_num_args (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ return gs->gimple_phi.nargs;
+}
+
+
+/* Return the SSA name created by GIMPLE_PHI GS. */
+
+static inline tree
+gimple_phi_result (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ return gs->gimple_phi.result;
+}
+
+/* Return a pointer to the SSA name created by GIMPLE_PHI GS. */
+
+static inline tree *
+gimple_phi_result_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ return &gs->gimple_phi.result;
+}
+
+/* Set RESULT to be the SSA name created by GIMPLE_PHI GS. */
+
+static inline void
+gimple_phi_set_result (gimple gs, tree result)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ gs->gimple_phi.result = result;
+}
+
+
+/* Return the PHI argument corresponding to incoming edge INDEX for
+ GIMPLE_PHI GS. */
+
+static inline struct phi_arg_d *
+gimple_phi_arg (gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ gcc_assert (index <= gs->gimple_phi.capacity);
+ return &(gs->gimple_phi.args[index]);
+}
+
+/* Set PHIARG to be the argument corresponding to incoming edge INDEX
+ for GIMPLE_PHI GS. */
+
+static inline void
+gimple_phi_set_arg (gimple gs, unsigned index, struct phi_arg_d * phiarg)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PHI);
+ gcc_assert (index <= gs->gimple_phi.nargs);
+ memcpy (gs->gimple_phi.args + index, phiarg, sizeof (struct phi_arg_d));
+}
+
+/* Return the region number for GIMPLE_RESX GS. */
+
+static inline int
+gimple_resx_region (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_RESX);
+ return gs->gimple_resx.region;
+}
+
+/* Set REGION to be the region number for GIMPLE_RESX GS. */
+
+static inline void
+gimple_resx_set_region (gimple gs, int region)
+{
+ GIMPLE_CHECK (gs, GIMPLE_RESX);
+ gs->gimple_resx.region = region;
+}
+
+
+/* Return the number of labels associated with the switch statement GS. */
+
+static inline unsigned
+gimple_switch_num_labels (const_gimple gs)
+{
+ unsigned num_ops;
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ num_ops = gimple_num_ops (gs);
+ gcc_assert (num_ops > 1);
+ return num_ops - 1;
+}
+
+
+/* Set NLABELS to be the number of labels for the switch statement GS. */
+
+static inline void
+gimple_switch_set_num_labels (gimple g, unsigned nlabels)
+{
+ GIMPLE_CHECK (g, GIMPLE_SWITCH);
+ gimple_set_num_ops (g, nlabels + 1);
+}
+
+
+/* Return the index variable used by the switch statement GS. */
+
+static inline tree
+gimple_switch_index (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ return gimple_op (gs, 0);
+}
+
+
+/* Return a pointer to the index variable for the switch statement GS. */
+
+static inline tree *
+gimple_switch_index_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ return gimple_op_ptr (gs, 0);
+}
+
+
+/* Set INDEX to be the index variable for switch statement GS. */
+
+static inline void
+gimple_switch_set_index (gimple gs, tree index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ gcc_assert (SSA_VAR_P (index) || CONSTANT_CLASS_P (index));
+ gimple_set_op (gs, 0, index);
+}
+
+
+/* Return the label numbered INDEX. The default label is 0, followed by any
+ labels in a switch statement. */
+
+static inline tree
+gimple_switch_label (const_gimple gs, unsigned index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ gcc_assert (gimple_num_ops (gs) > index + 1);
+ return gimple_op (gs, index + 1);
+}
+
+/* Set the label number INDEX to LABEL. 0 is always the default label. */
+
+static inline void
+gimple_switch_set_label (gimple gs, unsigned index, tree label)
+{
+ GIMPLE_CHECK (gs, GIMPLE_SWITCH);
+ gcc_assert (gimple_num_ops (gs) > index + 1);
+ gcc_assert (label == NULL_TREE || TREE_CODE (label) == CASE_LABEL_EXPR);
+ gimple_set_op (gs, index + 1, label);
+}
+
+/* Return the default label for a switch statement. */
+
+static inline tree
+gimple_switch_default_label (const_gimple gs)
+{
+ return gimple_switch_label (gs, 0);
+}
+
+/* Set the default label for a switch statement. */
+
+static inline void
+gimple_switch_set_default_label (gimple gs, tree label)
+{
+ gimple_switch_set_label (gs, 0, label);
+}
+
+
+/* Return the body for the OMP statement GS. */
+
+static inline gimple_seq
+gimple_omp_body (gimple gs)
+{
+ return gs->omp.body;
+}
+
+/* Set BODY to be the body for the OMP statement GS. */
+
+static inline void
+gimple_omp_set_body (gimple gs, gimple_seq body)
+{
+ gs->omp.body = body;
+}
+
+
+/* Return the name associated with OMP_CRITICAL statement GS. */
+
+static inline tree
+gimple_omp_critical_name (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_CRITICAL);
+ return gs->gimple_omp_critical.name;
+}
+
+
+/* Return a pointer to the name associated with OMP critical statement GS. */
+
+static inline tree *
+gimple_omp_critical_name_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_CRITICAL);
+ return &gs->gimple_omp_critical.name;
+}
+
+
+/* Set NAME to be the name associated with OMP critical statement GS. */
+
+static inline void
+gimple_omp_critical_set_name (gimple gs, tree name)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_CRITICAL);
+ gs->gimple_omp_critical.name = name;
+}
+
+
+/* Return the clauses associated with OMP_FOR GS. */
+
+static inline tree
+gimple_omp_for_clauses (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ return gs->gimple_omp_for.clauses;
+}
+
+
+/* Return a pointer to the OMP_FOR GS. */
+
+static inline tree *
+gimple_omp_for_clauses_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ return &gs->gimple_omp_for.clauses;
+}
+
+
+/* Set CLAUSES to be the list of clauses associated with OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_clauses (gimple gs, tree clauses)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gs->gimple_omp_for.clauses = clauses;
+}
+
+
+/* Get the collapse count of OMP_FOR GS. */
+
+static inline size_t
+gimple_omp_for_collapse (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ return gs->gimple_omp_for.collapse;
+}
+
+
+/* Return the index variable for OMP_FOR GS. */
+
+static inline tree
+gimple_omp_for_index (const_gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return gs->gimple_omp_for.iter[i].index;
+}
+
+
+/* Return a pointer to the index variable for OMP_FOR GS. */
+
+static inline tree *
+gimple_omp_for_index_ptr (gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return &gs->gimple_omp_for.iter[i].index;
+}
+
+
+/* Set INDEX to be the index variable for OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_index (gimple gs, size_t i, tree index)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ gs->gimple_omp_for.iter[i].index = index;
+}
+
+
+/* Return the initial value for OMP_FOR GS. */
+
+static inline tree
+gimple_omp_for_initial (const_gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return gs->gimple_omp_for.iter[i].initial;
+}
+
+
+/* Return a pointer to the initial value for OMP_FOR GS. */
+
+static inline tree *
+gimple_omp_for_initial_ptr (gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return &gs->gimple_omp_for.iter[i].initial;
+}
+
+
+/* Set INITIAL to be the initial value for OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_initial (gimple gs, size_t i, tree initial)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ gs->gimple_omp_for.iter[i].initial = initial;
+}
+
+
+/* Return the final value for OMP_FOR GS. */
+
+static inline tree
+gimple_omp_for_final (const_gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return gs->gimple_omp_for.iter[i].final;
+}
+
+
+/* Return a pointer to the final value for OMP_FOR GS. */
+
+static inline tree *
+gimple_omp_for_final_ptr (gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return &gs->gimple_omp_for.iter[i].final;
+}
+
+
+/* Set FINAL to be the final value for OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_final (gimple gs, size_t i, tree final)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ gs->gimple_omp_for.iter[i].final = final;
+}
+
+
+/* Return the increment value for OMP_FOR GS. */
+
+static inline tree
+gimple_omp_for_incr (const_gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return gs->gimple_omp_for.iter[i].incr;
+}
+
+
+/* Return a pointer to the increment value for OMP_FOR GS. */
+
+static inline tree *
+gimple_omp_for_incr_ptr (gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return &gs->gimple_omp_for.iter[i].incr;
+}
+
+
+/* Set INCR to be the increment value for OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_incr (gimple gs, size_t i, tree incr)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ gs->gimple_omp_for.iter[i].incr = incr;
+}
+
+
+/* Return the sequence of statements to execute before the OMP_FOR
+ statement GS starts. */
+
+static inline gimple_seq
+gimple_omp_for_pre_body (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ return gs->gimple_omp_for.pre_body;
+}
+
+
+/* Set PRE_BODY to be the sequence of statements to execute before the
+ OMP_FOR statement GS starts. */
+
+static inline void
+gimple_omp_for_set_pre_body (gimple gs, gimple_seq pre_body)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gs->gimple_omp_for.pre_body = pre_body;
+}
+
+
+/* Return the clauses associated with OMP_PARALLEL GS. */
+
+static inline tree
+gimple_omp_parallel_clauses (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Return a pointer to the clauses associated with OMP_PARALLEL GS. */
+
+static inline tree *
+gimple_omp_parallel_clauses_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return &gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Set CLAUSES to be the list of clauses associated with OMP_PARALLEL
+ GS. */
+
+static inline void
+gimple_omp_parallel_set_clauses (gimple gs, tree clauses)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ gs->gimple_omp_parallel.clauses = clauses;
+}
+
+
+/* Return the child function used to hold the body of OMP_PARALLEL GS. */
+
+static inline tree
+gimple_omp_parallel_child_fn (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return gs->gimple_omp_parallel.child_fn;
+}
+
+/* Return a pointer to the child function used to hold the body of
+ OMP_PARALLEL GS. */
+
+static inline tree *
+gimple_omp_parallel_child_fn_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return &gs->gimple_omp_parallel.child_fn;
+}
+
+
+/* Set CHILD_FN to be the child function for OMP_PARALLEL GS. */
+
+static inline void
+gimple_omp_parallel_set_child_fn (gimple gs, tree child_fn)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ gs->gimple_omp_parallel.child_fn = child_fn;
+}
+
+
+/* Return the artificial argument used to send variables and values
+ from the parent to the children threads in OMP_PARALLEL GS. */
+
+static inline tree
+gimple_omp_parallel_data_arg (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Return a pointer to the data argument for OMP_PARALLEL GS. */
+
+static inline tree *
+gimple_omp_parallel_data_arg_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ return &gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Set DATA_ARG to be the data argument for OMP_PARALLEL GS. */
+
+static inline void
+gimple_omp_parallel_set_data_arg (gimple gs, tree data_arg)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_PARALLEL);
+ gs->gimple_omp_parallel.data_arg = data_arg;
+}
+
+
+/* Return the clauses associated with OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_clauses (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Return a pointer to the clauses associated with OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_clauses_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Set CLAUSES to be the list of clauses associated with OMP_TASK
+ GS. */
+
+static inline void
+gimple_omp_task_set_clauses (gimple gs, tree clauses)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.clauses = clauses;
+}
+
+
+/* Return the child function used to hold the body of OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_child_fn (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.child_fn;
+}
+
+/* Return a pointer to the child function used to hold the body of
+ OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_child_fn_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.child_fn;
+}
+
+
+/* Set CHILD_FN to be the child function for OMP_TASK GS. */
+
+static inline void
+gimple_omp_task_set_child_fn (gimple gs, tree child_fn)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.child_fn = child_fn;
+}
+
+
+/* Return the artificial argument used to send variables and values
+ from the parent to the children threads in OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_data_arg (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Return a pointer to the data argument for OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_data_arg_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Set DATA_ARG to be the data argument for OMP_TASK GS. */
+
+static inline void
+gimple_omp_task_set_data_arg (gimple gs, tree data_arg)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.data_arg = data_arg;
+}
+
+
+/* Return the clauses associated with OMP_TASK GS. */
+
+static inline tree
+gimple_omp_taskreg_clauses (const_gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Return a pointer to the clauses associated with OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_taskreg_clauses_ptr (gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.clauses;
+}
+
+
+/* Set CLAUSES to be the list of clauses associated with OMP_TASK
+ GS. */
+
+static inline void
+gimple_omp_taskreg_set_clauses (gimple gs, tree clauses)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.clauses = clauses;
+}
+
+
+/* Return the child function used to hold the body of OMP_TASK GS. */
+
+static inline tree
+gimple_omp_taskreg_child_fn (const_gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.child_fn;
+}
+
+/* Return a pointer to the child function used to hold the body of
+ OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_taskreg_child_fn_ptr (gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.child_fn;
+}
+
+
+/* Set CHILD_FN to be the child function for OMP_TASK GS. */
+
+static inline void
+gimple_omp_taskreg_set_child_fn (gimple gs, tree child_fn)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.child_fn = child_fn;
+}
+
+
+/* Return the artificial argument used to send variables and values
+ from the parent to the children threads in OMP_TASK GS. */
+
+static inline tree
+gimple_omp_taskreg_data_arg (const_gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Return a pointer to the data argument for OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_taskreg_data_arg_ptr (gimple gs)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_parallel.data_arg;
+}
+
+
+/* Set DATA_ARG to be the data argument for OMP_TASK GS. */
+
+static inline void
+gimple_omp_taskreg_set_data_arg (gimple gs, tree data_arg)
+{
+ if (gimple_code (gs) != GIMPLE_OMP_PARALLEL)
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_parallel.data_arg = data_arg;
+}
+
+
+/* Return the copy function used to hold the body of OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_copy_fn (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_task.copy_fn;
+}
+
+/* Return a pointer to the copy function used to hold the body of
+ OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_copy_fn_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_task.copy_fn;
+}
+
+
+/* Set CHILD_FN to be the copy function for OMP_TASK GS. */
+
+static inline void
+gimple_omp_task_set_copy_fn (gimple gs, tree copy_fn)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_task.copy_fn = copy_fn;
+}
+
+
+/* Return size of the data block in bytes in OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_arg_size (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_task.arg_size;
+}
+
+
+/* Return a pointer to the data block size for OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_arg_size_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_task.arg_size;
+}
+
+
+/* Set ARG_SIZE to be the data block size for OMP_TASK GS. */
+
+static inline void
+gimple_omp_task_set_arg_size (gimple gs, tree arg_size)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_task.arg_size = arg_size;
+}
+
+
+/* Return align of the data block in bytes in OMP_TASK GS. */
+
+static inline tree
+gimple_omp_task_arg_align (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return gs->gimple_omp_task.arg_align;
+}
+
+
+/* Return a pointer to the data block align for OMP_TASK GS. */
+
+static inline tree *
+gimple_omp_task_arg_align_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ return &gs->gimple_omp_task.arg_align;
+}
+
+
+/* Set ARG_SIZE to be the data block align for OMP_TASK GS. */
+
+static inline void
+gimple_omp_task_set_arg_align (gimple gs, tree arg_align)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_TASK);
+ gs->gimple_omp_task.arg_align = arg_align;
+}
+
+
+/* Return the clauses associated with OMP_SINGLE GS. */
+
+static inline tree
+gimple_omp_single_clauses (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SINGLE);
+ return gs->gimple_omp_single.clauses;
+}
+
+
+/* Return a pointer to the clauses associated with OMP_SINGLE GS. */
+
+static inline tree *
+gimple_omp_single_clauses_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SINGLE);
+ return &gs->gimple_omp_single.clauses;
+}
+
+
+/* Set CLAUSES to be the clauses associated with OMP_SINGLE GS. */
+
+static inline void
+gimple_omp_single_set_clauses (gimple gs, tree clauses)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SINGLE);
+ gs->gimple_omp_single.clauses = clauses;
+}
+
+
+/* Return the clauses associated with OMP_SECTIONS GS. */
+
+static inline tree
+gimple_omp_sections_clauses (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ return gs->gimple_omp_sections.clauses;
+}
+
+
+/* Return a pointer to the clauses associated with OMP_SECTIONS GS. */
+
+static inline tree *
+gimple_omp_sections_clauses_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ return &gs->gimple_omp_sections.clauses;
+}
+
+
+/* Set CLAUSES to be the set of clauses associated with OMP_SECTIONS
+ GS. */
+
+static inline void
+gimple_omp_sections_set_clauses (gimple gs, tree clauses)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ gs->gimple_omp_sections.clauses = clauses;
+}
+
+
+/* Return the control variable associated with the GIMPLE_OMP_SECTIONS
+ in GS. */
+
+static inline tree
+gimple_omp_sections_control (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ return gs->gimple_omp_sections.control;
+}
+
+
+/* Return a pointer to the clauses associated with the GIMPLE_OMP_SECTIONS
+ GS. */
+
+static inline tree *
+gimple_omp_sections_control_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ return &gs->gimple_omp_sections.control;
+}
+
+
+/* Set CONTROL to be the set of clauses associated with the
+ GIMPLE_OMP_SECTIONS in GS. */
+
+static inline void
+gimple_omp_sections_set_control (gimple gs, tree control)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_SECTIONS);
+ gs->gimple_omp_sections.control = control;
+}
+
+
+/* Set COND to be the condition code for OMP_FOR GS. */
+
+static inline void
+gimple_omp_for_set_cond (gimple gs, size_t i, enum tree_code cond)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (TREE_CODE_CLASS (cond) == tcc_comparison);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ gs->gimple_omp_for.iter[i].cond = cond;
+}
+
+
+/* Return the condition code associated with OMP_FOR GS. */
+
+static inline enum tree_code
+gimple_omp_for_cond (const_gimple gs, size_t i)
+{
+ GIMPLE_CHECK (gs, GIMPLE_OMP_FOR);
+ gcc_assert (i < gs->gimple_omp_for.collapse);
+ return gs->gimple_omp_for.iter[i].cond;
+}
+
+
+/* Set the value being stored in an atomic store. */
+
+static inline void
+gimple_omp_atomic_store_set_val (gimple g, tree val)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_STORE);
+ g->gimple_omp_atomic_store.val = val;
+}
+
+
+/* Return the value being stored in an atomic store. */
+
+static inline tree
+gimple_omp_atomic_store_val (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_STORE);
+ return g->gimple_omp_atomic_store.val;
+}
+
+
+/* Return a pointer to the value being stored in an atomic store. */
+
+static inline tree *
+gimple_omp_atomic_store_val_ptr (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_STORE);
+ return &g->gimple_omp_atomic_store.val;
+}
+
+
+/* Set the LHS of an atomic load. */
+
+static inline void
+gimple_omp_atomic_load_set_lhs (gimple g, tree lhs)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ g->gimple_omp_atomic_load.lhs = lhs;
+}
+
+
+/* Get the LHS of an atomic load. */
+
+static inline tree
+gimple_omp_atomic_load_lhs (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ return g->gimple_omp_atomic_load.lhs;
+}
+
+
+/* Return a pointer to the LHS of an atomic load. */
+
+static inline tree *
+gimple_omp_atomic_load_lhs_ptr (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ return &g->gimple_omp_atomic_load.lhs;
+}
+
+
+/* Set the RHS of an atomic load. */
+
+static inline void
+gimple_omp_atomic_load_set_rhs (gimple g, tree rhs)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ g->gimple_omp_atomic_load.rhs = rhs;
+}
+
+
+/* Get the RHS of an atomic load. */
+
+static inline tree
+gimple_omp_atomic_load_rhs (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ return g->gimple_omp_atomic_load.rhs;
+}
+
+
+/* Return a pointer to the RHS of an atomic load. */
+
+static inline tree *
+gimple_omp_atomic_load_rhs_ptr (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_ATOMIC_LOAD);
+ return &g->gimple_omp_atomic_load.rhs;
+}
+
+
+/* Get the definition of the control variable in a GIMPLE_OMP_CONTINUE. */
+
+static inline tree
+gimple_omp_continue_control_def (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ return g->gimple_omp_continue.control_def;
+}
+
+/* The same as above, but return the address. */
+
+static inline tree *
+gimple_omp_continue_control_def_ptr (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ return &g->gimple_omp_continue.control_def;
+}
+
+/* Set the definition of the control variable in a GIMPLE_OMP_CONTINUE. */
+
+static inline void
+gimple_omp_continue_set_control_def (gimple g, tree def)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ g->gimple_omp_continue.control_def = def;
+}
+
+
+/* Get the use of the control variable in a GIMPLE_OMP_CONTINUE. */
+
+static inline tree
+gimple_omp_continue_control_use (const_gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ return g->gimple_omp_continue.control_use;
+}
+
+
+/* The same as above, but return the address. */
+
+static inline tree *
+gimple_omp_continue_control_use_ptr (gimple g)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ return &g->gimple_omp_continue.control_use;
+}
+
+
+/* Set the use of the control variable in a GIMPLE_OMP_CONTINUE. */
+
+static inline void
+gimple_omp_continue_set_control_use (gimple g, tree use)
+{
+ GIMPLE_CHECK (g, GIMPLE_OMP_CONTINUE);
+ g->gimple_omp_continue.control_use = use;
+}
+
+
+/* Return a pointer to the return value for GIMPLE_RETURN GS. */
+
+static inline tree *
+gimple_return_retval_ptr (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_RETURN);
+ gcc_assert (gimple_num_ops (gs) == 1);
+ return gimple_op_ptr (gs, 0);
+}
+
+/* Return the return value for GIMPLE_RETURN GS. */
+
+static inline tree
+gimple_return_retval (const_gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_RETURN);
+ gcc_assert (gimple_num_ops (gs) == 1);
+ return gimple_op (gs, 0);
+}
+
+
+/* Set RETVAL to be the return value for GIMPLE_RETURN GS. */
+
+static inline void
+gimple_return_set_retval (gimple gs, tree retval)
+{
+ GIMPLE_CHECK (gs, GIMPLE_RETURN);
+ gcc_assert (gimple_num_ops (gs) == 1);
+ gcc_assert (retval == NULL_TREE
+ || TREE_CODE (retval) == RESULT_DECL
+ || is_gimple_val (retval));
+ gimple_set_op (gs, 0, retval);
+}
+
+
+/* Returns true when the gimple statment STMT is any of the OpenMP types. */
+
+static inline bool
+is_gimple_omp (const_gimple stmt)
+{
+ return (gimple_code (stmt) == GIMPLE_OMP_PARALLEL
+ || gimple_code (stmt) == GIMPLE_OMP_TASK
+ || gimple_code (stmt) == GIMPLE_OMP_FOR
+ || gimple_code (stmt) == GIMPLE_OMP_SECTIONS
+ || gimple_code (stmt) == GIMPLE_OMP_SECTIONS_SWITCH
+ || gimple_code (stmt) == GIMPLE_OMP_SINGLE
+ || gimple_code (stmt) == GIMPLE_OMP_SECTION
+ || gimple_code (stmt) == GIMPLE_OMP_MASTER
+ || gimple_code (stmt) == GIMPLE_OMP_ORDERED
+ || gimple_code (stmt) == GIMPLE_OMP_CRITICAL
+ || gimple_code (stmt) == GIMPLE_OMP_RETURN
+ || gimple_code (stmt) == GIMPLE_OMP_ATOMIC_LOAD
+ || gimple_code (stmt) == GIMPLE_OMP_ATOMIC_STORE
+ || gimple_code (stmt) == GIMPLE_OMP_CONTINUE);
+}
+
+
+/* Returns TRUE if statement G is a GIMPLE_NOP. */
+
+static inline bool
+gimple_nop_p (const_gimple g)
+{
+ return gimple_code (g) == GIMPLE_NOP;
+}
+
+
+/* Return the new type set by GIMPLE_CHANGE_DYNAMIC_TYPE statement GS. */
+
+static inline tree
+gimple_cdt_new_type (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ return gimple_op (gs, 1);
+}
+
+/* Return a pointer to the new type set by GIMPLE_CHANGE_DYNAMIC_TYPE
+ statement GS. */
+
+static inline tree *
+gimple_cdt_new_type_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ return gimple_op_ptr (gs, 1);
+}
+
+/* Set NEW_TYPE to be the type returned by GIMPLE_CHANGE_DYNAMIC_TYPE
+ statement GS. */
+
+static inline void
+gimple_cdt_set_new_type (gimple gs, tree new_type)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ gcc_assert (TREE_CODE_CLASS (TREE_CODE (new_type)) == tcc_type);
+ gimple_set_op (gs, 1, new_type);
+}
+
+
+/* Return the location affected by GIMPLE_CHANGE_DYNAMIC_TYPE statement GS. */
+
+static inline tree
+gimple_cdt_location (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ return gimple_op (gs, 0);
+}
+
+
+/* Return a pointer to the location affected by GIMPLE_CHANGE_DYNAMIC_TYPE
+ statement GS. */
+
+static inline tree *
+gimple_cdt_location_ptr (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ return gimple_op_ptr (gs, 0);
+}
+
+
+/* Set PTR to be the location affected by GIMPLE_CHANGE_DYNAMIC_TYPE
+ statement GS. */
+
+static inline void
+gimple_cdt_set_location (gimple gs, tree ptr)
+{
+ GIMPLE_CHECK (gs, GIMPLE_CHANGE_DYNAMIC_TYPE);
+ gimple_set_op (gs, 0, ptr);
+}
+
+
+/* Return the predictor of GIMPLE_PREDICT statement GS. */
+
+static inline enum br_predictor
+gimple_predict_predictor (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PREDICT);
+ return (enum br_predictor) (gs->gsbase.subcode & ~GF_PREDICT_TAKEN);
+}
+
+
+/* Set the predictor of GIMPLE_PREDICT statement GS to PREDICT. */
+
+static inline void
+gimple_predict_set_predictor (gimple gs, enum br_predictor predictor)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PREDICT);
+ gs->gsbase.subcode = (gs->gsbase.subcode & GF_PREDICT_TAKEN)
+ | (unsigned) predictor;
+}
+
+
+/* Return the outcome of GIMPLE_PREDICT statement GS. */
+
+static inline enum prediction
+gimple_predict_outcome (gimple gs)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PREDICT);
+ return (gs->gsbase.subcode & GF_PREDICT_TAKEN) ? TAKEN : NOT_TAKEN;
+}
+
+
+/* Set the outcome of GIMPLE_PREDICT statement GS to OUTCOME. */
+
+static inline void
+gimple_predict_set_outcome (gimple gs, enum prediction outcome)
+{
+ GIMPLE_CHECK (gs, GIMPLE_PREDICT);
+ if (outcome == TAKEN)
+ gs->gsbase.subcode |= GF_PREDICT_TAKEN;
+ else
+ gs->gsbase.subcode &= ~GF_PREDICT_TAKEN;
+}
+
+
+/* Return the type of the main expression computed by STMT. Return
+ void_type_node if the statement computes nothing. */
+
+static inline tree
+gimple_expr_type (const_gimple stmt)
+{
+ enum gimple_code code = gimple_code (stmt);
+
+ if (code == GIMPLE_ASSIGN || code == GIMPLE_CALL)
+ {
+ tree type;
+ /* In general we want to pass out a type that can be substituted
+ for both the RHS and the LHS types if there is a possibly
+ useless conversion involved. That means returning the
+ original RHS type as far as we can reconstruct it. */
+ if (code == GIMPLE_CALL)
+ type = gimple_call_return_type (stmt);
+ else
+ switch (gimple_assign_rhs_code (stmt))
+ {
+ case POINTER_PLUS_EXPR:
+ type = TREE_TYPE (gimple_assign_rhs1 (stmt));
+ break;
+
+ default:
+ /* As fallback use the type of the LHS. */
+ type = TREE_TYPE (gimple_get_lhs (stmt));
+ break;
+ }
+
+ /* Integral sub-types are never the type of the expression,
+ but they still can be the type of the result as the base
+ type (in which expressions are computed) is trivially
+ convertible to one of its sub-types. So always return
+ the base type here. */
+ if (INTEGRAL_TYPE_P (type)
+ && TREE_TYPE (type)
+ /* But only if they are trivially convertible. */
+ && useless_type_conversion_p (type, TREE_TYPE (type)))
+ type = TREE_TYPE (type);
+ return type;
+ }
+ else if (code == GIMPLE_COND)
+ return boolean_type_node;
+ else
+ return void_type_node;
+}
+
+
+/* Return a new iterator pointing to GIMPLE_SEQ's first statement. */
+
+static inline gimple_stmt_iterator
+gsi_start (gimple_seq seq)
+{
+ gimple_stmt_iterator i;
+
+ i.ptr = gimple_seq_first (seq);
+ i.seq = seq;
+ i.bb = (i.ptr && i.ptr->stmt) ? gimple_bb (i.ptr->stmt) : NULL;
+
+ return i;
+}
+
+
+/* Return a new iterator pointing to the first statement in basic block BB. */
+
+static inline gimple_stmt_iterator
+gsi_start_bb (basic_block bb)
+{
+ gimple_stmt_iterator i;
+ gimple_seq seq;
+
+ seq = bb_seq (bb);
+ i.ptr = gimple_seq_first (seq);
+ i.seq = seq;
+ i.bb = bb;
+
+ return i;
+}
+
+
+/* Return a new iterator initially pointing to GIMPLE_SEQ's last statement. */
+
+static inline gimple_stmt_iterator
+gsi_last (gimple_seq seq)
+{
+ gimple_stmt_iterator i;
+
+ i.ptr = gimple_seq_last (seq);
+ i.seq = seq;
+ i.bb = (i.ptr && i.ptr->stmt) ? gimple_bb (i.ptr->stmt) : NULL;
+
+ return i;
+}
+
+
+/* Return a new iterator pointing to the last statement in basic block BB. */
+
+static inline gimple_stmt_iterator
+gsi_last_bb (basic_block bb)
+{
+ gimple_stmt_iterator i;
+ gimple_seq seq;
+
+ seq = bb_seq (bb);
+ i.ptr = gimple_seq_last (seq);
+ i.seq = seq;
+ i.bb = bb;
+
+ return i;
+}
+
+
+/* Return true if I is at the end of its sequence. */
+
+static inline bool
+gsi_end_p (gimple_stmt_iterator i)
+{
+ return i.ptr == NULL;
+}
+
+
+/* Return true if I is one statement before the end of its sequence. */
+
+static inline bool
+gsi_one_before_end_p (gimple_stmt_iterator i)
+{
+ return i.ptr != NULL && i.ptr->next == NULL;
+}
+
+
+/* Advance the iterator to the next gimple statement. */
+
+static inline void
+gsi_next (gimple_stmt_iterator *i)
+{
+ i->ptr = i->ptr->next;
+}
+
+/* Advance the iterator to the previous gimple statement. */
+
+static inline void
+gsi_prev (gimple_stmt_iterator *i)
+{
+ i->ptr = i->ptr->prev;
+}
+
+/* Return the current stmt. */
+
+static inline gimple
+gsi_stmt (gimple_stmt_iterator i)
+{
+ return i.ptr->stmt;
+}
+
+/* Return a block statement iterator that points to the first non-label
+ statement in block BB. */
+
+static inline gimple_stmt_iterator
+gsi_after_labels (basic_block bb)
+{
+ gimple_stmt_iterator gsi = gsi_start_bb (bb);
+
+ while (!gsi_end_p (gsi) && gimple_code (gsi_stmt (gsi)) == GIMPLE_LABEL)
+ gsi_next (&gsi);
+
+ return gsi;
+}
+
+/* Return a pointer to the current stmt.
+
+ NOTE: You may want to use gsi_replace on the iterator itself,
+ as this performs additional bookkeeping that will not be done
+ if you simply assign through a pointer returned by gsi_stmt_ptr. */
+
+static inline gimple *
+gsi_stmt_ptr (gimple_stmt_iterator *i)
+{
+ return &i->ptr->stmt;
+}
+
+
+/* Return the basic block associated with this iterator. */
+
+static inline basic_block
+gsi_bb (gimple_stmt_iterator i)
+{
+ return i.bb;
+}
+
+
+/* Return the sequence associated with this iterator. */
+
+static inline gimple_seq
+gsi_seq (gimple_stmt_iterator i)
+{
+ return i.seq;
+}
+
+
+enum gsi_iterator_update
+{
+ GSI_NEW_STMT, /* Only valid when single statement is added, move
+ iterator to it. */
+ GSI_SAME_STMT, /* Leave the iterator at the same statement. */
+ GSI_CONTINUE_LINKING /* Move iterator to whatever position is suitable
+ for linking other statements in the same
+ direction. */
+};
+
+/* In gimple-iterator.c */
+gimple_stmt_iterator gsi_start_phis (basic_block);
+gimple_seq gsi_split_seq_after (gimple_stmt_iterator);
+gimple_seq gsi_split_seq_before (gimple_stmt_iterator *);
+void gsi_replace (gimple_stmt_iterator *, gimple, bool);
+void gsi_insert_before (gimple_stmt_iterator *, gimple,
+ enum gsi_iterator_update);
+void gsi_insert_before_without_update (gimple_stmt_iterator *, gimple,
+ enum gsi_iterator_update);
+void gsi_insert_seq_before (gimple_stmt_iterator *, gimple_seq,
+ enum gsi_iterator_update);
+void gsi_insert_seq_before_without_update (gimple_stmt_iterator *, gimple_seq,
+ enum gsi_iterator_update);
+void gsi_insert_after (gimple_stmt_iterator *, gimple,
+ enum gsi_iterator_update);
+void gsi_insert_after_without_update (gimple_stmt_iterator *, gimple,
+ enum gsi_iterator_update);
+void gsi_insert_seq_after (gimple_stmt_iterator *, gimple_seq,
+ enum gsi_iterator_update);
+void gsi_insert_seq_after_without_update (gimple_stmt_iterator *, gimple_seq,
+ enum gsi_iterator_update);
+void gsi_remove (gimple_stmt_iterator *, bool);
+gimple_stmt_iterator gsi_for_stmt (gimple);
+void gsi_move_after (gimple_stmt_iterator *, gimple_stmt_iterator *);
+void gsi_move_before (gimple_stmt_iterator *, gimple_stmt_iterator *);
+void gsi_move_to_bb_end (gimple_stmt_iterator *, struct basic_block_def *);
+void gsi_insert_on_edge (edge, gimple);
+void gsi_insert_seq_on_edge (edge, gimple_seq);
+basic_block gsi_insert_on_edge_immediate (edge, gimple);
+basic_block gsi_insert_seq_on_edge_immediate (edge, gimple_seq);
+void gsi_commit_one_edge_insert (edge, basic_block *);
+void gsi_commit_edge_inserts (void);
+gimple gimple_call_copy_skip_args (gimple, bitmap);
+
+
+/* Convenience routines to walk all statements of a gimple function.
+ Note that this is useful exclusively before the code is converted
+ into SSA form. Once the program is in SSA form, the standard
+ operand interface should be used to analyze/modify statements. */
+struct walk_stmt_info
+{
+ /* Points to the current statement being walked. */
+ gimple_stmt_iterator gsi;
+
+ /* Additional data that the callback functions may want to carry
+ through the recursion. */
+ void *info;
+
+ /* Pointer map used to mark visited tree nodes when calling
+ walk_tree on each operand. If set to NULL, duplicate tree nodes
+ will be visited more than once. */
+ struct pointer_set_t *pset;
+
+ /* Indicates whether the operand being examined may be replaced
+ with something that matches is_gimple_val (if true) or something
+ slightly more complicated (if false). "Something" technically
+ means the common subset of is_gimple_lvalue and is_gimple_rhs,
+ but we never try to form anything more complicated than that, so
+ we don't bother checking.
+
+ Also note that CALLBACK should update this flag while walking the
+ sub-expressions of a statement. For instance, when walking the
+ statement 'foo (&var)', the flag VAL_ONLY will initially be set
+ to true, however, when walking &var, the operand of that
+ ADDR_EXPR does not need to be a GIMPLE value. */
+ bool val_only;
+
+ /* True if we are currently walking the LHS of an assignment. */
+ bool is_lhs;
+
+ /* Optional. Set to true by the callback functions if they made any
+ changes. */
+ bool changed;
+
+ /* True if we're interested in location information. */
+ bool want_locations;
+
+ /* Operand returned by the callbacks. This is set when calling
+ walk_gimple_seq. If the walk_stmt_fn or walk_tree_fn callback
+ returns non-NULL, this field will contain the tree returned by
+ the last callback. */
+ tree callback_result;
+};
+
+/* Callback for walk_gimple_stmt. Called for every statement found
+ during traversal. The first argument points to the statement to
+ walk. The second argument is a flag that the callback sets to
+ 'true' if it the callback handled all the operands and
+ sub-statements of the statement (the default value of this flag is
+ 'false'). The third argument is an anonymous pointer to data
+ to be used by the callback. */
+typedef tree (*walk_stmt_fn) (gimple_stmt_iterator *, bool *,
+ struct walk_stmt_info *);
+
+gimple walk_gimple_seq (gimple_seq, walk_stmt_fn, walk_tree_fn,
+ struct walk_stmt_info *);
+tree walk_gimple_stmt (gimple_stmt_iterator *, walk_stmt_fn, walk_tree_fn,
+ struct walk_stmt_info *);
+tree walk_gimple_op (gimple, walk_tree_fn, struct walk_stmt_info *);
+
+#ifdef GATHER_STATISTICS
+/* Enum and arrays used for allocation stats. Keep in sync with
+ gimple.c:gimple_alloc_kind_names. */
+enum gimple_alloc_kind
+{
+ gimple_alloc_kind_assign, /* Assignments. */
+ gimple_alloc_kind_phi, /* PHI nodes. */
+ gimple_alloc_kind_cond, /* Conditionals. */
+ gimple_alloc_kind_seq, /* Sequences. */
+ gimple_alloc_kind_rest, /* Everything else. */
+ gimple_alloc_kind_all
+};
+
+extern int gimple_alloc_counts[];
+extern int gimple_alloc_sizes[];
+
+/* Return the allocation kind for a given stmt CODE. */
+static inline enum gimple_alloc_kind
+gimple_alloc_kind (enum gimple_code code)
+{
+ switch (code)
+ {
+ case GIMPLE_ASSIGN:
+ return gimple_alloc_kind_assign;
+ case GIMPLE_PHI:
+ return gimple_alloc_kind_phi;
+ case GIMPLE_COND:
+ return gimple_alloc_kind_cond;
+ default:
+ return gimple_alloc_kind_rest;
+ }
+}
+#endif /* GATHER_STATISTICS */
+
+extern void dump_gimple_statistics (void);
+
+#endif /* GCC_GIMPLE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gsstruct.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gsstruct.def
new file mode 100644
index 0000000..58f4476
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gsstruct.def
@@ -0,0 +1,48 @@
+/* This file contains the definitions for the gimple IR structure
+ enumeration used in GCC.
+
+ Copyright (C) 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Aldy Hernandez <aldyh@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* The format of this file is
+ DEFGSSTRUCT(GSS_enumeration value, printable name).
+ Each enum value should correspond with a single member of the union
+ gimple_statement_d. */
+
+DEFGSSTRUCT(GSS_BASE, "base")
+DEFGSSTRUCT(GSS_WITH_OPS, "with_ops")
+DEFGSSTRUCT(GSS_WITH_MEM_OPS, "with_mem_ops")
+DEFGSSTRUCT(GSS_OMP, "omp")
+DEFGSSTRUCT(GSS_BIND, "bind")
+DEFGSSTRUCT(GSS_CATCH, "catch")
+DEFGSSTRUCT(GSS_EH_FILTER, "eh_filter")
+DEFGSSTRUCT(GSS_PHI, "phi")
+DEFGSSTRUCT(GSS_RESX, "resx")
+DEFGSSTRUCT(GSS_TRY, "try")
+DEFGSSTRUCT(GSS_WCE, "with_cleanup_expression")
+DEFGSSTRUCT(GSS_ASM, "asm")
+DEFGSSTRUCT(GSS_OMP_CRITICAL, "omp_critical")
+DEFGSSTRUCT(GSS_OMP_FOR, "omp_for")
+DEFGSSTRUCT(GSS_OMP_PARALLEL, "omp_parallel")
+DEFGSSTRUCT(GSS_OMP_TASK, "omp_task")
+DEFGSSTRUCT(GSS_OMP_SECTIONS, "sections")
+DEFGSSTRUCT(GSS_OMP_SINGLE, "single")
+DEFGSSTRUCT(GSS_OMP_CONTINUE, "omp_continue")
+DEFGSSTRUCT(GSS_OMP_ATOMIC_LOAD, "omp_atomic_load")
+DEFGSSTRUCT(GSS_OMP_ATOMIC_STORE, "omp_atomic_store")
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gtype-desc.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gtype-desc.h
new file mode 100644
index 0000000..ea7c170
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/gtype-desc.h
@@ -0,0 +1,1997 @@
+/* Type information for GCC.
+ Copyright (C) 2004, 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* This file is machine generated. Do not edit. */
+
+/* Enumeration of types known. */
+enum gt_types_enum {
+ gt_ggc_e_15interface_tuple,
+ gt_ggc_e_16volatilized_type,
+ gt_ggc_e_17string_descriptor,
+ gt_ggc_e_22VEC_c_saved_builtin_gc,
+ gt_ggc_e_7c_scope,
+ gt_ggc_e_9c_binding,
+ gt_ggc_e_8c_parser,
+ gt_ggc_e_9imp_entry,
+ gt_ggc_e_16hashed_attribute,
+ gt_ggc_e_12hashed_entry,
+ gt_ggc_e_14type_assertion,
+ gt_ggc_e_18treetreehash_entry,
+ gt_ggc_e_5CPool,
+ gt_ggc_e_3JCF,
+ gt_ggc_e_17module_htab_entry,
+ gt_ggc_e_13binding_level,
+ gt_ggc_e_20VEC_saved_builtin_gc,
+ gt_ggc_e_9opt_stack,
+ gt_ggc_e_11align_stack,
+ gt_ggc_e_19VEC_const_char_p_gc,
+ gt_ggc_e_21pending_abstract_type,
+ gt_ggc_e_9cp_parser,
+ gt_ggc_e_17cp_parser_context,
+ gt_ggc_e_8cp_lexer,
+ gt_ggc_e_10tree_check,
+ gt_ggc_e_22VEC_deferred_access_gc,
+ gt_ggc_e_26VEC_pending_attribute_p_gc,
+ gt_ggc_e_17pending_attribute,
+ gt_ggc_e_16pending_template,
+ gt_ggc_e_21named_label_use_entry,
+ gt_ggc_e_28VEC_deferred_access_check_gc,
+ gt_ggc_e_11tinst_level,
+ gt_ggc_e_18sorted_fields_type,
+ gt_ggc_e_18VEC_tree_pair_s_gc,
+ gt_ggc_e_17named_label_entry,
+ gt_ggc_e_14cp_token_cache,
+ gt_ggc_e_11saved_scope,
+ gt_ggc_e_16cxx_int_tree_map,
+ gt_ggc_e_23VEC_cp_class_binding_gc,
+ gt_ggc_e_24VEC_cxx_saved_binding_gc,
+ gt_ggc_e_16cp_binding_level,
+ gt_ggc_e_11cxx_binding,
+ gt_ggc_e_15binding_entry_s,
+ gt_ggc_e_15binding_table_s,
+ gt_ggc_e_14VEC_tinfo_s_gc,
+ gt_ggc_e_18gnat_binding_level,
+ gt_ggc_e_9elab_info,
+ gt_ggc_e_10stmt_group,
+ gt_ggc_e_16VEC_parm_attr_gc,
+ gt_ggc_e_9parm_attr,
+ gt_ggc_e_20ssa_operand_memory_d,
+ gt_ggc_e_13scev_info_str,
+ gt_ggc_e_13VEC_gimple_gc,
+ gt_ggc_e_17VEC_alias_pair_gc,
+ gt_ggc_e_24constant_descriptor_tree,
+ gt_ggc_e_9type_hash,
+ gt_ggc_e_16string_pool_data,
+ gt_ggc_e_13libfunc_entry,
+ gt_ggc_e_23temp_slot_address_entry,
+ gt_ggc_e_15throw_stmt_node,
+ gt_ggc_e_16VEC_eh_region_gc,
+ gt_ggc_e_9eh_region,
+ gt_ggc_e_18saved_module_scope,
+ gt_ggc_e_10vcall_insn,
+ gt_ggc_e_18VEC_vcall_entry_gc,
+ gt_ggc_e_18VEC_dcall_entry_gc,
+ gt_ggc_e_16var_loc_list_def,
+ gt_ggc_e_12var_loc_node,
+ gt_ggc_e_16limbo_die_struct,
+ gt_ggc_e_20VEC_pubname_entry_gc,
+ gt_ggc_e_19VEC_dw_attr_node_gc,
+ gt_ggc_e_18comdat_type_struct,
+ gt_ggc_e_25dw_ranges_by_label_struct,
+ gt_ggc_e_16dw_ranges_struct,
+ gt_ggc_e_28dw_separate_line_info_struct,
+ gt_ggc_e_19dw_line_info_struct,
+ gt_ggc_e_25VEC_deferred_locations_gc,
+ gt_ggc_e_18dw_loc_list_struct,
+ gt_ggc_e_15dwarf_file_data,
+ gt_ggc_e_15queued_reg_save,
+ gt_ggc_e_20indirect_string_node,
+ gt_ggc_e_19dw_loc_descr_struct,
+ gt_ggc_e_13dw_fde_struct,
+ gt_ggc_e_13dw_cfi_struct,
+ gt_ggc_e_8typeinfo,
+ gt_ggc_e_22VEC_alias_set_entry_gc,
+ gt_ggc_e_15alias_set_entry,
+ gt_ggc_e_10cgraph_sym,
+ gt_ggc_e_15cgraph_mod_info,
+ gt_ggc_e_15cgraph_asm_node,
+ gt_ggc_e_12varpool_node,
+ gt_ggc_e_11cgraph_edge,
+ gt_ggc_e_18VEC_basic_block_gc,
+ gt_ggc_e_14gimple_bb_info,
+ gt_ggc_e_11rtl_bb_info,
+ gt_ggc_e_11VEC_edge_gc,
+ gt_ggc_e_17cselib_val_struct,
+ gt_ggc_e_12elt_loc_list,
+ gt_ggc_e_13VEC_loop_p_gc,
+ gt_ggc_e_4loop,
+ gt_ggc_e_9loop_exit,
+ gt_ggc_e_13nb_iter_bound,
+ gt_ggc_e_24types_used_by_vars_entry,
+ gt_ggc_e_20overlay_decl_mapping,
+ gt_ggc_e_17language_function,
+ gt_ggc_e_5loops,
+ gt_ggc_e_18control_flow_graph,
+ gt_ggc_e_9eh_status,
+ gt_ggc_e_20initial_value_struct,
+ gt_ggc_e_17rtx_constant_pool,
+ gt_ggc_e_18VEC_temp_slot_p_gc,
+ gt_ggc_e_9temp_slot,
+ gt_ggc_e_9gimple_df,
+ gt_ggc_e_13ehl_map_entry,
+ gt_ggc_e_23VEC_call_site_record_gc,
+ gt_ggc_e_16call_site_record,
+ gt_ggc_e_14sequence_stack,
+ gt_ggc_e_8edge_def,
+ gt_ggc_e_8elt_list,
+ gt_ggc_e_17tree_priority_map,
+ gt_ggc_e_12tree_int_map,
+ gt_ggc_e_8tree_map,
+ gt_ggc_e_14lang_tree_node,
+ gt_ggc_e_24tree_statement_list_node,
+ gt_ggc_e_9lang_decl,
+ gt_ggc_e_9lang_type,
+ gt_ggc_e_10die_struct,
+ gt_ggc_e_15varray_head_tag,
+ gt_ggc_e_12ptr_info_def,
+ gt_ggc_e_22VEC_constructor_elt_gc,
+ gt_ggc_e_10tree_ann_d,
+ gt_ggc_e_11VEC_tree_gc,
+ gt_ggc_e_8function,
+ gt_ggc_e_23constant_descriptor_rtx,
+ gt_ggc_e_15basic_block_def,
+ gt_ggc_e_11fixed_value,
+ gt_ggc_e_10real_value,
+ gt_ggc_e_10VEC_rtx_gc,
+ gt_ggc_e_12object_block,
+ gt_ggc_e_9reg_attrs,
+ gt_ggc_e_9mem_attrs,
+ gt_ggc_e_11cgraph_node,
+ gt_ggc_e_14bitmap_obstack,
+ gt_ggc_e_18bitmap_element_def,
+ gt_ggc_e_16machine_function,
+ gt_ggc_e_17gimple_seq_node_d,
+ gt_ggc_e_12gimple_seq_d,
+ gt_ggc_e_7section,
+ gt_ggc_e_18gimple_statement_d,
+ gt_ggc_e_9rtvec_def,
+ gt_ggc_e_7rtx_def,
+ gt_ggc_e_15bitmap_head_def,
+ gt_ggc_e_9tree_node,
+ gt_ggc_e_6answer,
+ gt_ggc_e_9cpp_macro,
+ gt_ggc_e_9cpp_token,
+ gt_ggc_e_9line_maps,
+ gt_e_II17splay_tree_node_s,
+ gt_e_SP9tree_node17splay_tree_node_s,
+ gt_e_P9tree_nodeP9tree_node17splay_tree_node_s,
+ gt_e_IP9tree_node17splay_tree_node_s,
+ gt_e_P15interface_tuple4htab,
+ gt_e_P16volatilized_type4htab,
+ gt_e_P17string_descriptor4htab,
+ gt_e_P14type_assertion4htab,
+ gt_e_P18treetreehash_entry4htab,
+ gt_e_P17module_htab_entry4htab,
+ gt_e_P21pending_abstract_type4htab,
+ gt_e_P16cxx_int_tree_map4htab,
+ gt_e_P17named_label_entry4htab,
+ gt_e_P12tree_int_map4htab,
+ gt_e_IP9tree_node12splay_tree_s,
+ gt_e_P9tree_nodeP9tree_node12splay_tree_s,
+ gt_e_P13scev_info_str4htab,
+ gt_e_P23constant_descriptor_rtx4htab,
+ gt_e_P24constant_descriptor_tree4htab,
+ gt_e_P12object_block4htab,
+ gt_e_P7section4htab,
+ gt_e_P17tree_priority_map4htab,
+ gt_e_P8tree_map4htab,
+ gt_e_P9type_hash4htab,
+ gt_e_P13libfunc_entry4htab,
+ gt_e_P23temp_slot_address_entry4htab,
+ gt_e_P15throw_stmt_node4htab,
+ gt_e_P9reg_attrs4htab,
+ gt_e_P9mem_attrs4htab,
+ gt_e_P7rtx_def4htab,
+ gt_e_P12varpool_node4htab,
+ gt_e_P10cgraph_sym4htab,
+ gt_e_P18saved_module_scope4htab,
+ gt_e_SP9tree_node12splay_tree_s,
+ gt_e_P10vcall_insn4htab,
+ gt_e_P16var_loc_list_def4htab,
+ gt_e_P10die_struct4htab,
+ gt_e_P15dwarf_file_data4htab,
+ gt_e_P20indirect_string_node4htab,
+ gt_e_P11cgraph_node4htab,
+ gt_e_II12splay_tree_s,
+ gt_e_P15cgraph_mod_info4htab,
+ gt_e_P11cgraph_edge4htab,
+ gt_e_P9loop_exit4htab,
+ gt_e_P24types_used_by_vars_entry4htab,
+ gt_e_P20overlay_decl_mapping4htab,
+ gt_e_P9tree_node4htab,
+ gt_e_P13ehl_map_entry4htab,
+ gt_types_enum_last
+};
+
+/* GC marker procedures. */
+#define gt_ggc_m_15interface_tuple(X) do { \
+ if (X != NULL) gt_ggc_mx_interface_tuple (X);\
+ } while (0)
+extern void gt_ggc_mx_interface_tuple (void *);
+#define gt_ggc_m_16volatilized_type(X) do { \
+ if (X != NULL) gt_ggc_mx_volatilized_type (X);\
+ } while (0)
+extern void gt_ggc_mx_volatilized_type (void *);
+#define gt_ggc_m_17string_descriptor(X) do { \
+ if (X != NULL) gt_ggc_mx_string_descriptor (X);\
+ } while (0)
+extern void gt_ggc_mx_string_descriptor (void *);
+#define gt_ggc_m_22VEC_c_saved_builtin_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_c_saved_builtin_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_c_saved_builtin_gc (void *);
+#define gt_ggc_m_7c_scope(X) do { \
+ if (X != NULL) gt_ggc_mx_c_scope (X);\
+ } while (0)
+extern void gt_ggc_mx_c_scope (void *);
+#define gt_ggc_m_9c_binding(X) do { \
+ if (X != NULL) gt_ggc_mx_c_binding (X);\
+ } while (0)
+extern void gt_ggc_mx_c_binding (void *);
+#define gt_ggc_m_8c_parser(X) do { \
+ if (X != NULL) gt_ggc_mx_c_parser (X);\
+ } while (0)
+extern void gt_ggc_mx_c_parser (void *);
+#define gt_ggc_m_9imp_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_imp_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_imp_entry (void *);
+#define gt_ggc_m_16hashed_attribute(X) do { \
+ if (X != NULL) gt_ggc_mx_hashed_attribute (X);\
+ } while (0)
+extern void gt_ggc_mx_hashed_attribute (void *);
+#define gt_ggc_m_12hashed_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_hashed_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_hashed_entry (void *);
+#define gt_ggc_m_14type_assertion(X) do { \
+ if (X != NULL) gt_ggc_mx_type_assertion (X);\
+ } while (0)
+extern void gt_ggc_mx_type_assertion (void *);
+#define gt_ggc_m_18treetreehash_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_treetreehash_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_treetreehash_entry (void *);
+#define gt_ggc_m_5CPool(X) do { \
+ if (X != NULL) gt_ggc_mx_CPool (X);\
+ } while (0)
+extern void gt_ggc_mx_CPool (void *);
+#define gt_ggc_m_3JCF(X) do { \
+ if (X != NULL) gt_ggc_mx_JCF (X);\
+ } while (0)
+extern void gt_ggc_mx_JCF (void *);
+#define gt_ggc_m_17module_htab_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_module_htab_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_module_htab_entry (void *);
+#define gt_ggc_m_13binding_level(X) do { \
+ if (X != NULL) gt_ggc_mx_binding_level (X);\
+ } while (0)
+extern void gt_ggc_mx_binding_level (void *);
+#define gt_ggc_m_20VEC_saved_builtin_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_saved_builtin_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_saved_builtin_gc (void *);
+#define gt_ggc_m_9opt_stack(X) do { \
+ if (X != NULL) gt_ggc_mx_opt_stack (X);\
+ } while (0)
+extern void gt_ggc_mx_opt_stack (void *);
+#define gt_ggc_m_11align_stack(X) do { \
+ if (X != NULL) gt_ggc_mx_align_stack (X);\
+ } while (0)
+extern void gt_ggc_mx_align_stack (void *);
+#define gt_ggc_m_19VEC_const_char_p_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_const_char_p_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_const_char_p_gc (void *);
+#define gt_ggc_m_21pending_abstract_type(X) do { \
+ if (X != NULL) gt_ggc_mx_pending_abstract_type (X);\
+ } while (0)
+extern void gt_ggc_mx_pending_abstract_type (void *);
+#define gt_ggc_m_9cp_parser(X) do { \
+ if (X != NULL) gt_ggc_mx_cp_parser (X);\
+ } while (0)
+extern void gt_ggc_mx_cp_parser (void *);
+#define gt_ggc_m_17cp_parser_context(X) do { \
+ if (X != NULL) gt_ggc_mx_cp_parser_context (X);\
+ } while (0)
+extern void gt_ggc_mx_cp_parser_context (void *);
+#define gt_ggc_m_8cp_lexer(X) do { \
+ if (X != NULL) gt_ggc_mx_cp_lexer (X);\
+ } while (0)
+extern void gt_ggc_mx_cp_lexer (void *);
+#define gt_ggc_m_10tree_check(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_check (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_check (void *);
+#define gt_ggc_m_22VEC_deferred_access_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_deferred_access_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_deferred_access_gc (void *);
+#define gt_ggc_m_26VEC_pending_attribute_p_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_pending_attribute_p_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_pending_attribute_p_gc (void *);
+#define gt_ggc_m_17pending_attribute(X) do { \
+ if (X != NULL) gt_ggc_mx_pending_attribute (X);\
+ } while (0)
+extern void gt_ggc_mx_pending_attribute (void *);
+#define gt_ggc_m_16pending_template(X) do { \
+ if (X != NULL) gt_ggc_mx_pending_template (X);\
+ } while (0)
+extern void gt_ggc_mx_pending_template (void *);
+#define gt_ggc_m_21named_label_use_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_named_label_use_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_named_label_use_entry (void *);
+#define gt_ggc_m_28VEC_deferred_access_check_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_deferred_access_check_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_deferred_access_check_gc (void *);
+#define gt_ggc_m_11tinst_level(X) do { \
+ if (X != NULL) gt_ggc_mx_tinst_level (X);\
+ } while (0)
+extern void gt_ggc_mx_tinst_level (void *);
+#define gt_ggc_m_18sorted_fields_type(X) do { \
+ if (X != NULL) gt_ggc_mx_sorted_fields_type (X);\
+ } while (0)
+extern void gt_ggc_mx_sorted_fields_type (void *);
+#define gt_ggc_m_18VEC_tree_pair_s_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_tree_pair_s_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_tree_pair_s_gc (void *);
+#define gt_ggc_m_17named_label_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_named_label_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_named_label_entry (void *);
+#define gt_ggc_m_14cp_token_cache(X) do { \
+ if (X != NULL) gt_ggc_mx_cp_token_cache (X);\
+ } while (0)
+extern void gt_ggc_mx_cp_token_cache (void *);
+#define gt_ggc_m_11saved_scope(X) do { \
+ if (X != NULL) gt_ggc_mx_saved_scope (X);\
+ } while (0)
+extern void gt_ggc_mx_saved_scope (void *);
+#define gt_ggc_m_16cxx_int_tree_map(X) do { \
+ if (X != NULL) gt_ggc_mx_cxx_int_tree_map (X);\
+ } while (0)
+extern void gt_ggc_mx_cxx_int_tree_map (void *);
+#define gt_ggc_m_23VEC_cp_class_binding_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_cp_class_binding_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_cp_class_binding_gc (void *);
+#define gt_ggc_m_24VEC_cxx_saved_binding_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_cxx_saved_binding_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_cxx_saved_binding_gc (void *);
+#define gt_ggc_m_16cp_binding_level(X) do { \
+ if (X != NULL) gt_ggc_mx_cp_binding_level (X);\
+ } while (0)
+extern void gt_ggc_mx_cp_binding_level (void *);
+#define gt_ggc_m_11cxx_binding(X) do { \
+ if (X != NULL) gt_ggc_mx_cxx_binding (X);\
+ } while (0)
+extern void gt_ggc_mx_cxx_binding (void *);
+#define gt_ggc_m_15binding_entry_s(X) do { \
+ if (X != NULL) gt_ggc_mx_binding_entry_s (X);\
+ } while (0)
+extern void gt_ggc_mx_binding_entry_s (void *);
+#define gt_ggc_m_15binding_table_s(X) do { \
+ if (X != NULL) gt_ggc_mx_binding_table_s (X);\
+ } while (0)
+extern void gt_ggc_mx_binding_table_s (void *);
+#define gt_ggc_m_14VEC_tinfo_s_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_tinfo_s_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_tinfo_s_gc (void *);
+#define gt_ggc_m_18gnat_binding_level(X) do { \
+ if (X != NULL) gt_ggc_mx_gnat_binding_level (X);\
+ } while (0)
+extern void gt_ggc_mx_gnat_binding_level (void *);
+#define gt_ggc_m_9elab_info(X) do { \
+ if (X != NULL) gt_ggc_mx_elab_info (X);\
+ } while (0)
+extern void gt_ggc_mx_elab_info (void *);
+#define gt_ggc_m_10stmt_group(X) do { \
+ if (X != NULL) gt_ggc_mx_stmt_group (X);\
+ } while (0)
+extern void gt_ggc_mx_stmt_group (void *);
+#define gt_ggc_m_16VEC_parm_attr_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_parm_attr_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_parm_attr_gc (void *);
+#define gt_ggc_m_9parm_attr(X) do { \
+ if (X != NULL) gt_ggc_mx_parm_attr (X);\
+ } while (0)
+extern void gt_ggc_mx_parm_attr (void *);
+#define gt_ggc_m_20ssa_operand_memory_d(X) do { \
+ if (X != NULL) gt_ggc_mx_ssa_operand_memory_d (X);\
+ } while (0)
+extern void gt_ggc_mx_ssa_operand_memory_d (void *);
+#define gt_ggc_m_13scev_info_str(X) do { \
+ if (X != NULL) gt_ggc_mx_scev_info_str (X);\
+ } while (0)
+extern void gt_ggc_mx_scev_info_str (void *);
+#define gt_ggc_m_13VEC_gimple_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_gimple_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_gimple_gc (void *);
+#define gt_ggc_m_17VEC_alias_pair_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_alias_pair_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_alias_pair_gc (void *);
+#define gt_ggc_m_24constant_descriptor_tree(X) do { \
+ if (X != NULL) gt_ggc_mx_constant_descriptor_tree (X);\
+ } while (0)
+extern void gt_ggc_mx_constant_descriptor_tree (void *);
+#define gt_ggc_m_9type_hash(X) do { \
+ if (X != NULL) gt_ggc_mx_type_hash (X);\
+ } while (0)
+extern void gt_ggc_mx_type_hash (void *);
+#define gt_ggc_m_16string_pool_data(X) do { \
+ if (X != NULL) gt_ggc_mx_string_pool_data (X);\
+ } while (0)
+extern void gt_ggc_mx_string_pool_data (void *);
+#define gt_ggc_m_13libfunc_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_libfunc_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_libfunc_entry (void *);
+#define gt_ggc_m_23temp_slot_address_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_temp_slot_address_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_temp_slot_address_entry (void *);
+#define gt_ggc_m_15throw_stmt_node(X) do { \
+ if (X != NULL) gt_ggc_mx_throw_stmt_node (X);\
+ } while (0)
+extern void gt_ggc_mx_throw_stmt_node (void *);
+#define gt_ggc_m_16VEC_eh_region_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_eh_region_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_eh_region_gc (void *);
+#define gt_ggc_m_9eh_region(X) do { \
+ if (X != NULL) gt_ggc_mx_eh_region (X);\
+ } while (0)
+extern void gt_ggc_mx_eh_region (void *);
+#define gt_ggc_m_18saved_module_scope(X) do { \
+ if (X != NULL) gt_ggc_mx_saved_module_scope (X);\
+ } while (0)
+extern void gt_ggc_mx_saved_module_scope (void *);
+#define gt_ggc_m_10vcall_insn(X) do { \
+ if (X != NULL) gt_ggc_mx_vcall_insn (X);\
+ } while (0)
+extern void gt_ggc_mx_vcall_insn (void *);
+#define gt_ggc_m_18VEC_vcall_entry_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_vcall_entry_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_vcall_entry_gc (void *);
+#define gt_ggc_m_18VEC_dcall_entry_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_dcall_entry_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_dcall_entry_gc (void *);
+#define gt_ggc_m_16var_loc_list_def(X) do { \
+ if (X != NULL) gt_ggc_mx_var_loc_list_def (X);\
+ } while (0)
+extern void gt_ggc_mx_var_loc_list_def (void *);
+#define gt_ggc_m_12var_loc_node(X) do { \
+ if (X != NULL) gt_ggc_mx_var_loc_node (X);\
+ } while (0)
+extern void gt_ggc_mx_var_loc_node (void *);
+#define gt_ggc_m_16limbo_die_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_limbo_die_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_limbo_die_struct (void *);
+#define gt_ggc_m_20VEC_pubname_entry_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_pubname_entry_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_pubname_entry_gc (void *);
+#define gt_ggc_m_19VEC_dw_attr_node_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_dw_attr_node_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_dw_attr_node_gc (void *);
+#define gt_ggc_m_18comdat_type_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_comdat_type_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_comdat_type_struct (void *);
+#define gt_ggc_m_25dw_ranges_by_label_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_ranges_by_label_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_ranges_by_label_struct (void *);
+#define gt_ggc_m_16dw_ranges_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_ranges_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_ranges_struct (void *);
+#define gt_ggc_m_28dw_separate_line_info_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_separate_line_info_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_separate_line_info_struct (void *);
+#define gt_ggc_m_19dw_line_info_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_line_info_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_line_info_struct (void *);
+#define gt_ggc_m_25VEC_deferred_locations_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_deferred_locations_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_deferred_locations_gc (void *);
+#define gt_ggc_m_18dw_loc_list_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_loc_list_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_loc_list_struct (void *);
+#define gt_ggc_m_15dwarf_file_data(X) do { \
+ if (X != NULL) gt_ggc_mx_dwarf_file_data (X);\
+ } while (0)
+extern void gt_ggc_mx_dwarf_file_data (void *);
+#define gt_ggc_m_15queued_reg_save(X) do { \
+ if (X != NULL) gt_ggc_mx_queued_reg_save (X);\
+ } while (0)
+extern void gt_ggc_mx_queued_reg_save (void *);
+#define gt_ggc_m_20indirect_string_node(X) do { \
+ if (X != NULL) gt_ggc_mx_indirect_string_node (X);\
+ } while (0)
+extern void gt_ggc_mx_indirect_string_node (void *);
+#define gt_ggc_m_19dw_loc_descr_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_loc_descr_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_loc_descr_struct (void *);
+#define gt_ggc_m_13dw_fde_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_fde_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_fde_struct (void *);
+#define gt_ggc_m_13dw_cfi_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_dw_cfi_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_dw_cfi_struct (void *);
+#define gt_ggc_m_8typeinfo(X) do { \
+ if (X != NULL) gt_ggc_mx_typeinfo (X);\
+ } while (0)
+extern void gt_ggc_mx_typeinfo (void *);
+#define gt_ggc_m_22VEC_alias_set_entry_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_alias_set_entry_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_alias_set_entry_gc (void *);
+#define gt_ggc_m_15alias_set_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_alias_set_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_alias_set_entry (void *);
+#define gt_ggc_m_10cgraph_sym(X) do { \
+ if (X != NULL) gt_ggc_mx_cgraph_sym (X);\
+ } while (0)
+extern void gt_ggc_mx_cgraph_sym (void *);
+#define gt_ggc_m_15cgraph_mod_info(X) do { \
+ if (X != NULL) gt_ggc_mx_cgraph_mod_info (X);\
+ } while (0)
+extern void gt_ggc_mx_cgraph_mod_info (void *);
+#define gt_ggc_m_15cgraph_asm_node(X) do { \
+ if (X != NULL) gt_ggc_mx_cgraph_asm_node (X);\
+ } while (0)
+extern void gt_ggc_mx_cgraph_asm_node (void *);
+#define gt_ggc_m_12varpool_node(X) do { \
+ if (X != NULL) gt_ggc_mx_varpool_node (X);\
+ } while (0)
+extern void gt_ggc_mx_varpool_node (void *);
+#define gt_ggc_m_11cgraph_edge(X) do { \
+ if (X != NULL) gt_ggc_mx_cgraph_edge (X);\
+ } while (0)
+extern void gt_ggc_mx_cgraph_edge (void *);
+#define gt_ggc_m_18VEC_basic_block_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_basic_block_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_basic_block_gc (void *);
+#define gt_ggc_m_14gimple_bb_info(X) do { \
+ if (X != NULL) gt_ggc_mx_gimple_bb_info (X);\
+ } while (0)
+extern void gt_ggc_mx_gimple_bb_info (void *);
+#define gt_ggc_m_11rtl_bb_info(X) do { \
+ if (X != NULL) gt_ggc_mx_rtl_bb_info (X);\
+ } while (0)
+extern void gt_ggc_mx_rtl_bb_info (void *);
+#define gt_ggc_m_11VEC_edge_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_edge_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_edge_gc (void *);
+#define gt_ggc_m_17cselib_val_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_cselib_val_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_cselib_val_struct (void *);
+#define gt_ggc_m_12elt_loc_list(X) do { \
+ if (X != NULL) gt_ggc_mx_elt_loc_list (X);\
+ } while (0)
+extern void gt_ggc_mx_elt_loc_list (void *);
+#define gt_ggc_m_13VEC_loop_p_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_loop_p_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_loop_p_gc (void *);
+#define gt_ggc_m_4loop(X) do { \
+ if (X != NULL) gt_ggc_mx_loop (X);\
+ } while (0)
+extern void gt_ggc_mx_loop (void *);
+#define gt_ggc_m_9loop_exit(X) do { \
+ if (X != NULL) gt_ggc_mx_loop_exit (X);\
+ } while (0)
+extern void gt_ggc_mx_loop_exit (void *);
+#define gt_ggc_m_13nb_iter_bound(X) do { \
+ if (X != NULL) gt_ggc_mx_nb_iter_bound (X);\
+ } while (0)
+extern void gt_ggc_mx_nb_iter_bound (void *);
+#define gt_ggc_m_24types_used_by_vars_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_types_used_by_vars_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_types_used_by_vars_entry (void *);
+#define gt_ggc_m_20overlay_decl_mapping(X) do { \
+ if (X != NULL) gt_ggc_mx_overlay_decl_mapping (X);\
+ } while (0)
+extern void gt_ggc_mx_overlay_decl_mapping (void *);
+#define gt_ggc_m_17language_function(X) do { \
+ if (X != NULL) gt_ggc_mx_language_function (X);\
+ } while (0)
+extern void gt_ggc_mx_language_function (void *);
+#define gt_ggc_m_5loops(X) do { \
+ if (X != NULL) gt_ggc_mx_loops (X);\
+ } while (0)
+extern void gt_ggc_mx_loops (void *);
+#define gt_ggc_m_18control_flow_graph(X) do { \
+ if (X != NULL) gt_ggc_mx_control_flow_graph (X);\
+ } while (0)
+extern void gt_ggc_mx_control_flow_graph (void *);
+#define gt_ggc_m_9eh_status(X) do { \
+ if (X != NULL) gt_ggc_mx_eh_status (X);\
+ } while (0)
+extern void gt_ggc_mx_eh_status (void *);
+#define gt_ggc_m_20initial_value_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_initial_value_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_initial_value_struct (void *);
+#define gt_ggc_m_17rtx_constant_pool(X) do { \
+ if (X != NULL) gt_ggc_mx_rtx_constant_pool (X);\
+ } while (0)
+extern void gt_ggc_mx_rtx_constant_pool (void *);
+#define gt_ggc_m_18VEC_temp_slot_p_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_temp_slot_p_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_temp_slot_p_gc (void *);
+#define gt_ggc_m_9temp_slot(X) do { \
+ if (X != NULL) gt_ggc_mx_temp_slot (X);\
+ } while (0)
+extern void gt_ggc_mx_temp_slot (void *);
+#define gt_ggc_m_9gimple_df(X) do { \
+ if (X != NULL) gt_ggc_mx_gimple_df (X);\
+ } while (0)
+extern void gt_ggc_mx_gimple_df (void *);
+#define gt_ggc_m_13ehl_map_entry(X) do { \
+ if (X != NULL) gt_ggc_mx_ehl_map_entry (X);\
+ } while (0)
+extern void gt_ggc_mx_ehl_map_entry (void *);
+#define gt_ggc_m_23VEC_call_site_record_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_call_site_record_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_call_site_record_gc (void *);
+#define gt_ggc_m_16call_site_record(X) do { \
+ if (X != NULL) gt_ggc_mx_call_site_record (X);\
+ } while (0)
+extern void gt_ggc_mx_call_site_record (void *);
+#define gt_ggc_m_14sequence_stack(X) do { \
+ if (X != NULL) gt_ggc_mx_sequence_stack (X);\
+ } while (0)
+extern void gt_ggc_mx_sequence_stack (void *);
+#define gt_ggc_m_8edge_def(X) do { \
+ if (X != NULL) gt_ggc_mx_edge_def (X);\
+ } while (0)
+extern void gt_ggc_mx_edge_def (void *);
+#define gt_ggc_m_8elt_list(X) do { \
+ if (X != NULL) gt_ggc_mx_elt_list (X);\
+ } while (0)
+extern void gt_ggc_mx_elt_list (void *);
+#define gt_ggc_m_17tree_priority_map(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_priority_map (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_priority_map (void *);
+#define gt_ggc_m_12tree_int_map(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_int_map (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_int_map (void *);
+#define gt_ggc_m_8tree_map(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_map (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_map (void *);
+#define gt_ggc_m_14lang_tree_node(X) do { \
+ if (X != NULL) gt_ggc_mx_lang_tree_node (X);\
+ } while (0)
+extern void gt_ggc_mx_lang_tree_node (void *);
+#define gt_ggc_m_24tree_statement_list_node(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_statement_list_node (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_statement_list_node (void *);
+#define gt_ggc_m_9lang_decl(X) do { \
+ if (X != NULL) gt_ggc_mx_lang_decl (X);\
+ } while (0)
+extern void gt_ggc_mx_lang_decl (void *);
+#define gt_ggc_m_9lang_type(X) do { \
+ if (X != NULL) gt_ggc_mx_lang_type (X);\
+ } while (0)
+extern void gt_ggc_mx_lang_type (void *);
+#define gt_ggc_m_10die_struct(X) do { \
+ if (X != NULL) gt_ggc_mx_die_struct (X);\
+ } while (0)
+extern void gt_ggc_mx_die_struct (void *);
+#define gt_ggc_m_15varray_head_tag(X) do { \
+ if (X != NULL) gt_ggc_mx_varray_head_tag (X);\
+ } while (0)
+extern void gt_ggc_mx_varray_head_tag (void *);
+#define gt_ggc_m_12ptr_info_def(X) do { \
+ if (X != NULL) gt_ggc_mx_ptr_info_def (X);\
+ } while (0)
+extern void gt_ggc_mx_ptr_info_def (void *);
+#define gt_ggc_m_22VEC_constructor_elt_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_constructor_elt_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_constructor_elt_gc (void *);
+#define gt_ggc_m_10tree_ann_d(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_ann_d (X);\
+ } while (0)
+extern void gt_ggc_mx_tree_ann_d (void *);
+#define gt_ggc_m_11VEC_tree_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_tree_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_tree_gc (void *);
+#define gt_ggc_m_8function(X) do { \
+ if (X != NULL) gt_ggc_mx_function (X);\
+ } while (0)
+extern void gt_ggc_mx_function (void *);
+#define gt_ggc_m_23constant_descriptor_rtx(X) do { \
+ if (X != NULL) gt_ggc_mx_constant_descriptor_rtx (X);\
+ } while (0)
+extern void gt_ggc_mx_constant_descriptor_rtx (void *);
+#define gt_ggc_m_15basic_block_def(X) do { \
+ if (X != NULL) gt_ggc_mx_basic_block_def (X);\
+ } while (0)
+extern void gt_ggc_mx_basic_block_def (void *);
+#define gt_ggc_m_11fixed_value(X) do { \
+ if (X != NULL) gt_ggc_mx_fixed_value (X);\
+ } while (0)
+extern void gt_ggc_mx_fixed_value (void *);
+#define gt_ggc_m_10real_value(X) do { \
+ if (X != NULL) gt_ggc_mx_real_value (X);\
+ } while (0)
+extern void gt_ggc_mx_real_value (void *);
+#define gt_ggc_m_10VEC_rtx_gc(X) do { \
+ if (X != NULL) gt_ggc_mx_VEC_rtx_gc (X);\
+ } while (0)
+extern void gt_ggc_mx_VEC_rtx_gc (void *);
+#define gt_ggc_m_12object_block(X) do { \
+ if (X != NULL) gt_ggc_mx_object_block (X);\
+ } while (0)
+extern void gt_ggc_mx_object_block (void *);
+#define gt_ggc_m_9reg_attrs(X) do { \
+ if (X != NULL) gt_ggc_mx_reg_attrs (X);\
+ } while (0)
+extern void gt_ggc_mx_reg_attrs (void *);
+#define gt_ggc_m_9mem_attrs(X) do { \
+ if (X != NULL) gt_ggc_mx_mem_attrs (X);\
+ } while (0)
+extern void gt_ggc_mx_mem_attrs (void *);
+#define gt_ggc_m_11cgraph_node(X) do { \
+ if (X != NULL) gt_ggc_mx_cgraph_node (X);\
+ } while (0)
+extern void gt_ggc_mx_cgraph_node (void *);
+#define gt_ggc_m_14bitmap_obstack(X) do { \
+ if (X != NULL) gt_ggc_mx_bitmap_obstack (X);\
+ } while (0)
+extern void gt_ggc_mx_bitmap_obstack (void *);
+#define gt_ggc_m_18bitmap_element_def(X) do { \
+ if (X != NULL) gt_ggc_mx_bitmap_element_def (X);\
+ } while (0)
+extern void gt_ggc_mx_bitmap_element_def (void *);
+#define gt_ggc_m_16machine_function(X) do { \
+ if (X != NULL) gt_ggc_mx_machine_function (X);\
+ } while (0)
+extern void gt_ggc_mx_machine_function (void *);
+#define gt_ggc_m_17gimple_seq_node_d(X) do { \
+ if (X != NULL) gt_ggc_mx_gimple_seq_node_d (X);\
+ } while (0)
+extern void gt_ggc_mx_gimple_seq_node_d (void *);
+#define gt_ggc_m_12gimple_seq_d(X) do { \
+ if (X != NULL) gt_ggc_mx_gimple_seq_d (X);\
+ } while (0)
+extern void gt_ggc_mx_gimple_seq_d (void *);
+#define gt_ggc_m_7section(X) do { \
+ if (X != NULL) gt_ggc_mx_section (X);\
+ } while (0)
+extern void gt_ggc_mx_section (void *);
+#define gt_ggc_m_18gimple_statement_d(X) do { \
+ if (X != NULL) gt_ggc_mx_gimple_statement_d (X);\
+ } while (0)
+extern void gt_ggc_mx_gimple_statement_d (void *);
+#define gt_ggc_m_9rtvec_def(X) do { \
+ if (X != NULL) gt_ggc_mx_rtvec_def (X);\
+ } while (0)
+extern void gt_ggc_mx_rtvec_def (void *);
+#define gt_ggc_m_7rtx_def(X) do { \
+ if (X != NULL) gt_ggc_mx_rtx_def (X);\
+ } while (0)
+extern void gt_ggc_mx_rtx_def (void *);
+#define gt_ggc_m_15bitmap_head_def(X) do { \
+ if (X != NULL) gt_ggc_mx_bitmap_head_def (X);\
+ } while (0)
+extern void gt_ggc_mx_bitmap_head_def (void *);
+#define gt_ggc_m_9tree_node(X) do { \
+ if (X != NULL) gt_ggc_mx_tree_node (X);\
+ } while (0)
+#define gt_ggc_mx_tree_node gt_ggc_mx_lang_tree_node
+#define gt_ggc_m_6answer(X) do { \
+ if (X != NULL) gt_ggc_mx_answer (X);\
+ } while (0)
+extern void gt_ggc_mx_answer (void *);
+#define gt_ggc_m_9cpp_macro(X) do { \
+ if (X != NULL) gt_ggc_mx_cpp_macro (X);\
+ } while (0)
+extern void gt_ggc_mx_cpp_macro (void *);
+#define gt_ggc_m_9cpp_token(X) do { \
+ if (X != NULL) gt_ggc_mx_cpp_token (X);\
+ } while (0)
+extern void gt_ggc_mx_cpp_token (void *);
+#define gt_ggc_m_9line_maps(X) do { \
+ if (X != NULL) gt_ggc_mx_line_maps (X);\
+ } while (0)
+extern void gt_ggc_mx_line_maps (void *);
+extern void gt_ggc_m_II17splay_tree_node_s (void *);
+extern void gt_ggc_m_SP9tree_node17splay_tree_node_s (void *);
+extern void gt_ggc_m_P9tree_nodeP9tree_node17splay_tree_node_s (void *);
+extern void gt_ggc_m_IP9tree_node17splay_tree_node_s (void *);
+extern void gt_ggc_m_P15interface_tuple4htab (void *);
+extern void gt_ggc_m_P16volatilized_type4htab (void *);
+extern void gt_ggc_m_P17string_descriptor4htab (void *);
+extern void gt_ggc_m_P14type_assertion4htab (void *);
+extern void gt_ggc_m_P18treetreehash_entry4htab (void *);
+extern void gt_ggc_m_P17module_htab_entry4htab (void *);
+extern void gt_ggc_m_P21pending_abstract_type4htab (void *);
+extern void gt_ggc_m_P16cxx_int_tree_map4htab (void *);
+extern void gt_ggc_m_P17named_label_entry4htab (void *);
+extern void gt_ggc_m_P12tree_int_map4htab (void *);
+extern void gt_ggc_m_IP9tree_node12splay_tree_s (void *);
+extern void gt_ggc_m_P9tree_nodeP9tree_node12splay_tree_s (void *);
+extern void gt_ggc_m_P13scev_info_str4htab (void *);
+extern void gt_ggc_m_P23constant_descriptor_rtx4htab (void *);
+extern void gt_ggc_m_P24constant_descriptor_tree4htab (void *);
+extern void gt_ggc_m_P12object_block4htab (void *);
+extern void gt_ggc_m_P7section4htab (void *);
+extern void gt_ggc_m_P17tree_priority_map4htab (void *);
+extern void gt_ggc_m_P8tree_map4htab (void *);
+extern void gt_ggc_m_P9type_hash4htab (void *);
+extern void gt_ggc_m_P13libfunc_entry4htab (void *);
+extern void gt_ggc_m_P23temp_slot_address_entry4htab (void *);
+extern void gt_ggc_m_P15throw_stmt_node4htab (void *);
+extern void gt_ggc_m_P9reg_attrs4htab (void *);
+extern void gt_ggc_m_P9mem_attrs4htab (void *);
+extern void gt_ggc_m_P7rtx_def4htab (void *);
+extern void gt_ggc_m_P12varpool_node4htab (void *);
+extern void gt_ggc_m_P10cgraph_sym4htab (void *);
+extern void gt_ggc_m_P18saved_module_scope4htab (void *);
+extern void gt_ggc_m_SP9tree_node12splay_tree_s (void *);
+extern void gt_ggc_m_P10vcall_insn4htab (void *);
+extern void gt_ggc_m_P16var_loc_list_def4htab (void *);
+extern void gt_ggc_m_P10die_struct4htab (void *);
+extern void gt_ggc_m_P15dwarf_file_data4htab (void *);
+extern void gt_ggc_m_P20indirect_string_node4htab (void *);
+extern void gt_ggc_m_P11cgraph_node4htab (void *);
+extern void gt_ggc_m_II12splay_tree_s (void *);
+extern void gt_ggc_m_P15cgraph_mod_info4htab (void *);
+extern void gt_ggc_m_P11cgraph_edge4htab (void *);
+extern void gt_ggc_m_P9loop_exit4htab (void *);
+extern void gt_ggc_m_P24types_used_by_vars_entry4htab (void *);
+extern void gt_ggc_m_P20overlay_decl_mapping4htab (void *);
+extern void gt_ggc_m_P9tree_node4htab (void *);
+extern void gt_ggc_m_P13ehl_map_entry4htab (void *);
+
+/* PCH type-walking procedures. */
+#define gt_pch_n_15interface_tuple(X) do { \
+ if (X != NULL) gt_pch_nx_interface_tuple (X);\
+ } while (0)
+extern void gt_pch_nx_interface_tuple (void *);
+#define gt_pch_n_16volatilized_type(X) do { \
+ if (X != NULL) gt_pch_nx_volatilized_type (X);\
+ } while (0)
+extern void gt_pch_nx_volatilized_type (void *);
+#define gt_pch_n_17string_descriptor(X) do { \
+ if (X != NULL) gt_pch_nx_string_descriptor (X);\
+ } while (0)
+extern void gt_pch_nx_string_descriptor (void *);
+#define gt_pch_n_22VEC_c_saved_builtin_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_c_saved_builtin_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_c_saved_builtin_gc (void *);
+#define gt_pch_n_7c_scope(X) do { \
+ if (X != NULL) gt_pch_nx_c_scope (X);\
+ } while (0)
+extern void gt_pch_nx_c_scope (void *);
+#define gt_pch_n_9c_binding(X) do { \
+ if (X != NULL) gt_pch_nx_c_binding (X);\
+ } while (0)
+extern void gt_pch_nx_c_binding (void *);
+#define gt_pch_n_8c_parser(X) do { \
+ if (X != NULL) gt_pch_nx_c_parser (X);\
+ } while (0)
+extern void gt_pch_nx_c_parser (void *);
+#define gt_pch_n_9imp_entry(X) do { \
+ if (X != NULL) gt_pch_nx_imp_entry (X);\
+ } while (0)
+extern void gt_pch_nx_imp_entry (void *);
+#define gt_pch_n_16hashed_attribute(X) do { \
+ if (X != NULL) gt_pch_nx_hashed_attribute (X);\
+ } while (0)
+extern void gt_pch_nx_hashed_attribute (void *);
+#define gt_pch_n_12hashed_entry(X) do { \
+ if (X != NULL) gt_pch_nx_hashed_entry (X);\
+ } while (0)
+extern void gt_pch_nx_hashed_entry (void *);
+#define gt_pch_n_14type_assertion(X) do { \
+ if (X != NULL) gt_pch_nx_type_assertion (X);\
+ } while (0)
+extern void gt_pch_nx_type_assertion (void *);
+#define gt_pch_n_18treetreehash_entry(X) do { \
+ if (X != NULL) gt_pch_nx_treetreehash_entry (X);\
+ } while (0)
+extern void gt_pch_nx_treetreehash_entry (void *);
+#define gt_pch_n_5CPool(X) do { \
+ if (X != NULL) gt_pch_nx_CPool (X);\
+ } while (0)
+extern void gt_pch_nx_CPool (void *);
+#define gt_pch_n_3JCF(X) do { \
+ if (X != NULL) gt_pch_nx_JCF (X);\
+ } while (0)
+extern void gt_pch_nx_JCF (void *);
+#define gt_pch_n_17module_htab_entry(X) do { \
+ if (X != NULL) gt_pch_nx_module_htab_entry (X);\
+ } while (0)
+extern void gt_pch_nx_module_htab_entry (void *);
+#define gt_pch_n_13binding_level(X) do { \
+ if (X != NULL) gt_pch_nx_binding_level (X);\
+ } while (0)
+extern void gt_pch_nx_binding_level (void *);
+#define gt_pch_n_20VEC_saved_builtin_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_saved_builtin_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_saved_builtin_gc (void *);
+#define gt_pch_n_9opt_stack(X) do { \
+ if (X != NULL) gt_pch_nx_opt_stack (X);\
+ } while (0)
+extern void gt_pch_nx_opt_stack (void *);
+#define gt_pch_n_11align_stack(X) do { \
+ if (X != NULL) gt_pch_nx_align_stack (X);\
+ } while (0)
+extern void gt_pch_nx_align_stack (void *);
+#define gt_pch_n_19VEC_const_char_p_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_const_char_p_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_const_char_p_gc (void *);
+#define gt_pch_n_21pending_abstract_type(X) do { \
+ if (X != NULL) gt_pch_nx_pending_abstract_type (X);\
+ } while (0)
+extern void gt_pch_nx_pending_abstract_type (void *);
+#define gt_pch_n_9cp_parser(X) do { \
+ if (X != NULL) gt_pch_nx_cp_parser (X);\
+ } while (0)
+extern void gt_pch_nx_cp_parser (void *);
+#define gt_pch_n_17cp_parser_context(X) do { \
+ if (X != NULL) gt_pch_nx_cp_parser_context (X);\
+ } while (0)
+extern void gt_pch_nx_cp_parser_context (void *);
+#define gt_pch_n_8cp_lexer(X) do { \
+ if (X != NULL) gt_pch_nx_cp_lexer (X);\
+ } while (0)
+extern void gt_pch_nx_cp_lexer (void *);
+#define gt_pch_n_10tree_check(X) do { \
+ if (X != NULL) gt_pch_nx_tree_check (X);\
+ } while (0)
+extern void gt_pch_nx_tree_check (void *);
+#define gt_pch_n_22VEC_deferred_access_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_deferred_access_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_deferred_access_gc (void *);
+#define gt_pch_n_26VEC_pending_attribute_p_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_pending_attribute_p_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_pending_attribute_p_gc (void *);
+#define gt_pch_n_17pending_attribute(X) do { \
+ if (X != NULL) gt_pch_nx_pending_attribute (X);\
+ } while (0)
+extern void gt_pch_nx_pending_attribute (void *);
+#define gt_pch_n_16pending_template(X) do { \
+ if (X != NULL) gt_pch_nx_pending_template (X);\
+ } while (0)
+extern void gt_pch_nx_pending_template (void *);
+#define gt_pch_n_21named_label_use_entry(X) do { \
+ if (X != NULL) gt_pch_nx_named_label_use_entry (X);\
+ } while (0)
+extern void gt_pch_nx_named_label_use_entry (void *);
+#define gt_pch_n_28VEC_deferred_access_check_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_deferred_access_check_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_deferred_access_check_gc (void *);
+#define gt_pch_n_11tinst_level(X) do { \
+ if (X != NULL) gt_pch_nx_tinst_level (X);\
+ } while (0)
+extern void gt_pch_nx_tinst_level (void *);
+#define gt_pch_n_18sorted_fields_type(X) do { \
+ if (X != NULL) gt_pch_nx_sorted_fields_type (X);\
+ } while (0)
+extern void gt_pch_nx_sorted_fields_type (void *);
+#define gt_pch_n_18VEC_tree_pair_s_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_tree_pair_s_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_tree_pair_s_gc (void *);
+#define gt_pch_n_17named_label_entry(X) do { \
+ if (X != NULL) gt_pch_nx_named_label_entry (X);\
+ } while (0)
+extern void gt_pch_nx_named_label_entry (void *);
+#define gt_pch_n_14cp_token_cache(X) do { \
+ if (X != NULL) gt_pch_nx_cp_token_cache (X);\
+ } while (0)
+extern void gt_pch_nx_cp_token_cache (void *);
+#define gt_pch_n_11saved_scope(X) do { \
+ if (X != NULL) gt_pch_nx_saved_scope (X);\
+ } while (0)
+extern void gt_pch_nx_saved_scope (void *);
+#define gt_pch_n_16cxx_int_tree_map(X) do { \
+ if (X != NULL) gt_pch_nx_cxx_int_tree_map (X);\
+ } while (0)
+extern void gt_pch_nx_cxx_int_tree_map (void *);
+#define gt_pch_n_23VEC_cp_class_binding_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_cp_class_binding_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_cp_class_binding_gc (void *);
+#define gt_pch_n_24VEC_cxx_saved_binding_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_cxx_saved_binding_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_cxx_saved_binding_gc (void *);
+#define gt_pch_n_16cp_binding_level(X) do { \
+ if (X != NULL) gt_pch_nx_cp_binding_level (X);\
+ } while (0)
+extern void gt_pch_nx_cp_binding_level (void *);
+#define gt_pch_n_11cxx_binding(X) do { \
+ if (X != NULL) gt_pch_nx_cxx_binding (X);\
+ } while (0)
+extern void gt_pch_nx_cxx_binding (void *);
+#define gt_pch_n_15binding_entry_s(X) do { \
+ if (X != NULL) gt_pch_nx_binding_entry_s (X);\
+ } while (0)
+extern void gt_pch_nx_binding_entry_s (void *);
+#define gt_pch_n_15binding_table_s(X) do { \
+ if (X != NULL) gt_pch_nx_binding_table_s (X);\
+ } while (0)
+extern void gt_pch_nx_binding_table_s (void *);
+#define gt_pch_n_14VEC_tinfo_s_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_tinfo_s_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_tinfo_s_gc (void *);
+#define gt_pch_n_18gnat_binding_level(X) do { \
+ if (X != NULL) gt_pch_nx_gnat_binding_level (X);\
+ } while (0)
+extern void gt_pch_nx_gnat_binding_level (void *);
+#define gt_pch_n_9elab_info(X) do { \
+ if (X != NULL) gt_pch_nx_elab_info (X);\
+ } while (0)
+extern void gt_pch_nx_elab_info (void *);
+#define gt_pch_n_10stmt_group(X) do { \
+ if (X != NULL) gt_pch_nx_stmt_group (X);\
+ } while (0)
+extern void gt_pch_nx_stmt_group (void *);
+#define gt_pch_n_16VEC_parm_attr_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_parm_attr_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_parm_attr_gc (void *);
+#define gt_pch_n_9parm_attr(X) do { \
+ if (X != NULL) gt_pch_nx_parm_attr (X);\
+ } while (0)
+extern void gt_pch_nx_parm_attr (void *);
+#define gt_pch_n_20ssa_operand_memory_d(X) do { \
+ if (X != NULL) gt_pch_nx_ssa_operand_memory_d (X);\
+ } while (0)
+extern void gt_pch_nx_ssa_operand_memory_d (void *);
+#define gt_pch_n_13scev_info_str(X) do { \
+ if (X != NULL) gt_pch_nx_scev_info_str (X);\
+ } while (0)
+extern void gt_pch_nx_scev_info_str (void *);
+#define gt_pch_n_13VEC_gimple_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_gimple_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_gimple_gc (void *);
+#define gt_pch_n_17VEC_alias_pair_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_alias_pair_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_alias_pair_gc (void *);
+#define gt_pch_n_24constant_descriptor_tree(X) do { \
+ if (X != NULL) gt_pch_nx_constant_descriptor_tree (X);\
+ } while (0)
+extern void gt_pch_nx_constant_descriptor_tree (void *);
+#define gt_pch_n_9type_hash(X) do { \
+ if (X != NULL) gt_pch_nx_type_hash (X);\
+ } while (0)
+extern void gt_pch_nx_type_hash (void *);
+#define gt_pch_n_16string_pool_data(X) do { \
+ if (X != NULL) gt_pch_nx_string_pool_data (X);\
+ } while (0)
+extern void gt_pch_nx_string_pool_data (void *);
+#define gt_pch_n_13libfunc_entry(X) do { \
+ if (X != NULL) gt_pch_nx_libfunc_entry (X);\
+ } while (0)
+extern void gt_pch_nx_libfunc_entry (void *);
+#define gt_pch_n_23temp_slot_address_entry(X) do { \
+ if (X != NULL) gt_pch_nx_temp_slot_address_entry (X);\
+ } while (0)
+extern void gt_pch_nx_temp_slot_address_entry (void *);
+#define gt_pch_n_15throw_stmt_node(X) do { \
+ if (X != NULL) gt_pch_nx_throw_stmt_node (X);\
+ } while (0)
+extern void gt_pch_nx_throw_stmt_node (void *);
+#define gt_pch_n_16VEC_eh_region_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_eh_region_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_eh_region_gc (void *);
+#define gt_pch_n_9eh_region(X) do { \
+ if (X != NULL) gt_pch_nx_eh_region (X);\
+ } while (0)
+extern void gt_pch_nx_eh_region (void *);
+#define gt_pch_n_18saved_module_scope(X) do { \
+ if (X != NULL) gt_pch_nx_saved_module_scope (X);\
+ } while (0)
+extern void gt_pch_nx_saved_module_scope (void *);
+#define gt_pch_n_10vcall_insn(X) do { \
+ if (X != NULL) gt_pch_nx_vcall_insn (X);\
+ } while (0)
+extern void gt_pch_nx_vcall_insn (void *);
+#define gt_pch_n_18VEC_vcall_entry_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_vcall_entry_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_vcall_entry_gc (void *);
+#define gt_pch_n_18VEC_dcall_entry_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_dcall_entry_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_dcall_entry_gc (void *);
+#define gt_pch_n_16var_loc_list_def(X) do { \
+ if (X != NULL) gt_pch_nx_var_loc_list_def (X);\
+ } while (0)
+extern void gt_pch_nx_var_loc_list_def (void *);
+#define gt_pch_n_12var_loc_node(X) do { \
+ if (X != NULL) gt_pch_nx_var_loc_node (X);\
+ } while (0)
+extern void gt_pch_nx_var_loc_node (void *);
+#define gt_pch_n_16limbo_die_struct(X) do { \
+ if (X != NULL) gt_pch_nx_limbo_die_struct (X);\
+ } while (0)
+extern void gt_pch_nx_limbo_die_struct (void *);
+#define gt_pch_n_20VEC_pubname_entry_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_pubname_entry_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_pubname_entry_gc (void *);
+#define gt_pch_n_19VEC_dw_attr_node_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_dw_attr_node_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_dw_attr_node_gc (void *);
+#define gt_pch_n_18comdat_type_struct(X) do { \
+ if (X != NULL) gt_pch_nx_comdat_type_struct (X);\
+ } while (0)
+extern void gt_pch_nx_comdat_type_struct (void *);
+#define gt_pch_n_25dw_ranges_by_label_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_ranges_by_label_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_ranges_by_label_struct (void *);
+#define gt_pch_n_16dw_ranges_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_ranges_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_ranges_struct (void *);
+#define gt_pch_n_28dw_separate_line_info_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_separate_line_info_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_separate_line_info_struct (void *);
+#define gt_pch_n_19dw_line_info_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_line_info_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_line_info_struct (void *);
+#define gt_pch_n_25VEC_deferred_locations_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_deferred_locations_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_deferred_locations_gc (void *);
+#define gt_pch_n_18dw_loc_list_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_loc_list_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_loc_list_struct (void *);
+#define gt_pch_n_15dwarf_file_data(X) do { \
+ if (X != NULL) gt_pch_nx_dwarf_file_data (X);\
+ } while (0)
+extern void gt_pch_nx_dwarf_file_data (void *);
+#define gt_pch_n_15queued_reg_save(X) do { \
+ if (X != NULL) gt_pch_nx_queued_reg_save (X);\
+ } while (0)
+extern void gt_pch_nx_queued_reg_save (void *);
+#define gt_pch_n_20indirect_string_node(X) do { \
+ if (X != NULL) gt_pch_nx_indirect_string_node (X);\
+ } while (0)
+extern void gt_pch_nx_indirect_string_node (void *);
+#define gt_pch_n_19dw_loc_descr_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_loc_descr_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_loc_descr_struct (void *);
+#define gt_pch_n_13dw_fde_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_fde_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_fde_struct (void *);
+#define gt_pch_n_13dw_cfi_struct(X) do { \
+ if (X != NULL) gt_pch_nx_dw_cfi_struct (X);\
+ } while (0)
+extern void gt_pch_nx_dw_cfi_struct (void *);
+#define gt_pch_n_8typeinfo(X) do { \
+ if (X != NULL) gt_pch_nx_typeinfo (X);\
+ } while (0)
+extern void gt_pch_nx_typeinfo (void *);
+#define gt_pch_n_22VEC_alias_set_entry_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_alias_set_entry_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_alias_set_entry_gc (void *);
+#define gt_pch_n_15alias_set_entry(X) do { \
+ if (X != NULL) gt_pch_nx_alias_set_entry (X);\
+ } while (0)
+extern void gt_pch_nx_alias_set_entry (void *);
+#define gt_pch_n_10cgraph_sym(X) do { \
+ if (X != NULL) gt_pch_nx_cgraph_sym (X);\
+ } while (0)
+extern void gt_pch_nx_cgraph_sym (void *);
+#define gt_pch_n_15cgraph_mod_info(X) do { \
+ if (X != NULL) gt_pch_nx_cgraph_mod_info (X);\
+ } while (0)
+extern void gt_pch_nx_cgraph_mod_info (void *);
+#define gt_pch_n_15cgraph_asm_node(X) do { \
+ if (X != NULL) gt_pch_nx_cgraph_asm_node (X);\
+ } while (0)
+extern void gt_pch_nx_cgraph_asm_node (void *);
+#define gt_pch_n_12varpool_node(X) do { \
+ if (X != NULL) gt_pch_nx_varpool_node (X);\
+ } while (0)
+extern void gt_pch_nx_varpool_node (void *);
+#define gt_pch_n_11cgraph_edge(X) do { \
+ if (X != NULL) gt_pch_nx_cgraph_edge (X);\
+ } while (0)
+extern void gt_pch_nx_cgraph_edge (void *);
+#define gt_pch_n_18VEC_basic_block_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_basic_block_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_basic_block_gc (void *);
+#define gt_pch_n_14gimple_bb_info(X) do { \
+ if (X != NULL) gt_pch_nx_gimple_bb_info (X);\
+ } while (0)
+extern void gt_pch_nx_gimple_bb_info (void *);
+#define gt_pch_n_11rtl_bb_info(X) do { \
+ if (X != NULL) gt_pch_nx_rtl_bb_info (X);\
+ } while (0)
+extern void gt_pch_nx_rtl_bb_info (void *);
+#define gt_pch_n_11VEC_edge_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_edge_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_edge_gc (void *);
+#define gt_pch_n_17cselib_val_struct(X) do { \
+ if (X != NULL) gt_pch_nx_cselib_val_struct (X);\
+ } while (0)
+extern void gt_pch_nx_cselib_val_struct (void *);
+#define gt_pch_n_12elt_loc_list(X) do { \
+ if (X != NULL) gt_pch_nx_elt_loc_list (X);\
+ } while (0)
+extern void gt_pch_nx_elt_loc_list (void *);
+#define gt_pch_n_13VEC_loop_p_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_loop_p_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_loop_p_gc (void *);
+#define gt_pch_n_4loop(X) do { \
+ if (X != NULL) gt_pch_nx_loop (X);\
+ } while (0)
+extern void gt_pch_nx_loop (void *);
+#define gt_pch_n_9loop_exit(X) do { \
+ if (X != NULL) gt_pch_nx_loop_exit (X);\
+ } while (0)
+extern void gt_pch_nx_loop_exit (void *);
+#define gt_pch_n_13nb_iter_bound(X) do { \
+ if (X != NULL) gt_pch_nx_nb_iter_bound (X);\
+ } while (0)
+extern void gt_pch_nx_nb_iter_bound (void *);
+#define gt_pch_n_24types_used_by_vars_entry(X) do { \
+ if (X != NULL) gt_pch_nx_types_used_by_vars_entry (X);\
+ } while (0)
+extern void gt_pch_nx_types_used_by_vars_entry (void *);
+#define gt_pch_n_20overlay_decl_mapping(X) do { \
+ if (X != NULL) gt_pch_nx_overlay_decl_mapping (X);\
+ } while (0)
+extern void gt_pch_nx_overlay_decl_mapping (void *);
+#define gt_pch_n_17language_function(X) do { \
+ if (X != NULL) gt_pch_nx_language_function (X);\
+ } while (0)
+extern void gt_pch_nx_language_function (void *);
+#define gt_pch_n_5loops(X) do { \
+ if (X != NULL) gt_pch_nx_loops (X);\
+ } while (0)
+extern void gt_pch_nx_loops (void *);
+#define gt_pch_n_18control_flow_graph(X) do { \
+ if (X != NULL) gt_pch_nx_control_flow_graph (X);\
+ } while (0)
+extern void gt_pch_nx_control_flow_graph (void *);
+#define gt_pch_n_9eh_status(X) do { \
+ if (X != NULL) gt_pch_nx_eh_status (X);\
+ } while (0)
+extern void gt_pch_nx_eh_status (void *);
+#define gt_pch_n_20initial_value_struct(X) do { \
+ if (X != NULL) gt_pch_nx_initial_value_struct (X);\
+ } while (0)
+extern void gt_pch_nx_initial_value_struct (void *);
+#define gt_pch_n_17rtx_constant_pool(X) do { \
+ if (X != NULL) gt_pch_nx_rtx_constant_pool (X);\
+ } while (0)
+extern void gt_pch_nx_rtx_constant_pool (void *);
+#define gt_pch_n_18VEC_temp_slot_p_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_temp_slot_p_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_temp_slot_p_gc (void *);
+#define gt_pch_n_9temp_slot(X) do { \
+ if (X != NULL) gt_pch_nx_temp_slot (X);\
+ } while (0)
+extern void gt_pch_nx_temp_slot (void *);
+#define gt_pch_n_9gimple_df(X) do { \
+ if (X != NULL) gt_pch_nx_gimple_df (X);\
+ } while (0)
+extern void gt_pch_nx_gimple_df (void *);
+#define gt_pch_n_13ehl_map_entry(X) do { \
+ if (X != NULL) gt_pch_nx_ehl_map_entry (X);\
+ } while (0)
+extern void gt_pch_nx_ehl_map_entry (void *);
+#define gt_pch_n_23VEC_call_site_record_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_call_site_record_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_call_site_record_gc (void *);
+#define gt_pch_n_16call_site_record(X) do { \
+ if (X != NULL) gt_pch_nx_call_site_record (X);\
+ } while (0)
+extern void gt_pch_nx_call_site_record (void *);
+#define gt_pch_n_14sequence_stack(X) do { \
+ if (X != NULL) gt_pch_nx_sequence_stack (X);\
+ } while (0)
+extern void gt_pch_nx_sequence_stack (void *);
+#define gt_pch_n_8edge_def(X) do { \
+ if (X != NULL) gt_pch_nx_edge_def (X);\
+ } while (0)
+extern void gt_pch_nx_edge_def (void *);
+#define gt_pch_n_8elt_list(X) do { \
+ if (X != NULL) gt_pch_nx_elt_list (X);\
+ } while (0)
+extern void gt_pch_nx_elt_list (void *);
+#define gt_pch_n_17tree_priority_map(X) do { \
+ if (X != NULL) gt_pch_nx_tree_priority_map (X);\
+ } while (0)
+extern void gt_pch_nx_tree_priority_map (void *);
+#define gt_pch_n_12tree_int_map(X) do { \
+ if (X != NULL) gt_pch_nx_tree_int_map (X);\
+ } while (0)
+extern void gt_pch_nx_tree_int_map (void *);
+#define gt_pch_n_8tree_map(X) do { \
+ if (X != NULL) gt_pch_nx_tree_map (X);\
+ } while (0)
+extern void gt_pch_nx_tree_map (void *);
+#define gt_pch_n_14lang_tree_node(X) do { \
+ if (X != NULL) gt_pch_nx_lang_tree_node (X);\
+ } while (0)
+extern void gt_pch_nx_lang_tree_node (void *);
+#define gt_pch_n_24tree_statement_list_node(X) do { \
+ if (X != NULL) gt_pch_nx_tree_statement_list_node (X);\
+ } while (0)
+extern void gt_pch_nx_tree_statement_list_node (void *);
+#define gt_pch_n_9lang_decl(X) do { \
+ if (X != NULL) gt_pch_nx_lang_decl (X);\
+ } while (0)
+extern void gt_pch_nx_lang_decl (void *);
+#define gt_pch_n_9lang_type(X) do { \
+ if (X != NULL) gt_pch_nx_lang_type (X);\
+ } while (0)
+extern void gt_pch_nx_lang_type (void *);
+#define gt_pch_n_10die_struct(X) do { \
+ if (X != NULL) gt_pch_nx_die_struct (X);\
+ } while (0)
+extern void gt_pch_nx_die_struct (void *);
+#define gt_pch_n_15varray_head_tag(X) do { \
+ if (X != NULL) gt_pch_nx_varray_head_tag (X);\
+ } while (0)
+extern void gt_pch_nx_varray_head_tag (void *);
+#define gt_pch_n_12ptr_info_def(X) do { \
+ if (X != NULL) gt_pch_nx_ptr_info_def (X);\
+ } while (0)
+extern void gt_pch_nx_ptr_info_def (void *);
+#define gt_pch_n_22VEC_constructor_elt_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_constructor_elt_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_constructor_elt_gc (void *);
+#define gt_pch_n_10tree_ann_d(X) do { \
+ if (X != NULL) gt_pch_nx_tree_ann_d (X);\
+ } while (0)
+extern void gt_pch_nx_tree_ann_d (void *);
+#define gt_pch_n_11VEC_tree_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_tree_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_tree_gc (void *);
+#define gt_pch_n_8function(X) do { \
+ if (X != NULL) gt_pch_nx_function (X);\
+ } while (0)
+extern void gt_pch_nx_function (void *);
+#define gt_pch_n_23constant_descriptor_rtx(X) do { \
+ if (X != NULL) gt_pch_nx_constant_descriptor_rtx (X);\
+ } while (0)
+extern void gt_pch_nx_constant_descriptor_rtx (void *);
+#define gt_pch_n_15basic_block_def(X) do { \
+ if (X != NULL) gt_pch_nx_basic_block_def (X);\
+ } while (0)
+extern void gt_pch_nx_basic_block_def (void *);
+#define gt_pch_n_11fixed_value(X) do { \
+ if (X != NULL) gt_pch_nx_fixed_value (X);\
+ } while (0)
+extern void gt_pch_nx_fixed_value (void *);
+#define gt_pch_n_10real_value(X) do { \
+ if (X != NULL) gt_pch_nx_real_value (X);\
+ } while (0)
+extern void gt_pch_nx_real_value (void *);
+#define gt_pch_n_10VEC_rtx_gc(X) do { \
+ if (X != NULL) gt_pch_nx_VEC_rtx_gc (X);\
+ } while (0)
+extern void gt_pch_nx_VEC_rtx_gc (void *);
+#define gt_pch_n_12object_block(X) do { \
+ if (X != NULL) gt_pch_nx_object_block (X);\
+ } while (0)
+extern void gt_pch_nx_object_block (void *);
+#define gt_pch_n_9reg_attrs(X) do { \
+ if (X != NULL) gt_pch_nx_reg_attrs (X);\
+ } while (0)
+extern void gt_pch_nx_reg_attrs (void *);
+#define gt_pch_n_9mem_attrs(X) do { \
+ if (X != NULL) gt_pch_nx_mem_attrs (X);\
+ } while (0)
+extern void gt_pch_nx_mem_attrs (void *);
+#define gt_pch_n_11cgraph_node(X) do { \
+ if (X != NULL) gt_pch_nx_cgraph_node (X);\
+ } while (0)
+extern void gt_pch_nx_cgraph_node (void *);
+#define gt_pch_n_14bitmap_obstack(X) do { \
+ if (X != NULL) gt_pch_nx_bitmap_obstack (X);\
+ } while (0)
+extern void gt_pch_nx_bitmap_obstack (void *);
+#define gt_pch_n_18bitmap_element_def(X) do { \
+ if (X != NULL) gt_pch_nx_bitmap_element_def (X);\
+ } while (0)
+extern void gt_pch_nx_bitmap_element_def (void *);
+#define gt_pch_n_16machine_function(X) do { \
+ if (X != NULL) gt_pch_nx_machine_function (X);\
+ } while (0)
+extern void gt_pch_nx_machine_function (void *);
+#define gt_pch_n_17gimple_seq_node_d(X) do { \
+ if (X != NULL) gt_pch_nx_gimple_seq_node_d (X);\
+ } while (0)
+extern void gt_pch_nx_gimple_seq_node_d (void *);
+#define gt_pch_n_12gimple_seq_d(X) do { \
+ if (X != NULL) gt_pch_nx_gimple_seq_d (X);\
+ } while (0)
+extern void gt_pch_nx_gimple_seq_d (void *);
+#define gt_pch_n_7section(X) do { \
+ if (X != NULL) gt_pch_nx_section (X);\
+ } while (0)
+extern void gt_pch_nx_section (void *);
+#define gt_pch_n_18gimple_statement_d(X) do { \
+ if (X != NULL) gt_pch_nx_gimple_statement_d (X);\
+ } while (0)
+extern void gt_pch_nx_gimple_statement_d (void *);
+#define gt_pch_n_9rtvec_def(X) do { \
+ if (X != NULL) gt_pch_nx_rtvec_def (X);\
+ } while (0)
+extern void gt_pch_nx_rtvec_def (void *);
+#define gt_pch_n_7rtx_def(X) do { \
+ if (X != NULL) gt_pch_nx_rtx_def (X);\
+ } while (0)
+extern void gt_pch_nx_rtx_def (void *);
+#define gt_pch_n_15bitmap_head_def(X) do { \
+ if (X != NULL) gt_pch_nx_bitmap_head_def (X);\
+ } while (0)
+extern void gt_pch_nx_bitmap_head_def (void *);
+#define gt_pch_n_9tree_node(X) do { \
+ if (X != NULL) gt_pch_nx_tree_node (X);\
+ } while (0)
+#define gt_pch_nx_tree_node gt_pch_nx_lang_tree_node
+#define gt_pch_n_6answer(X) do { \
+ if (X != NULL) gt_pch_nx_answer (X);\
+ } while (0)
+extern void gt_pch_nx_answer (void *);
+#define gt_pch_n_9cpp_macro(X) do { \
+ if (X != NULL) gt_pch_nx_cpp_macro (X);\
+ } while (0)
+extern void gt_pch_nx_cpp_macro (void *);
+#define gt_pch_n_9cpp_token(X) do { \
+ if (X != NULL) gt_pch_nx_cpp_token (X);\
+ } while (0)
+extern void gt_pch_nx_cpp_token (void *);
+#define gt_pch_n_9line_maps(X) do { \
+ if (X != NULL) gt_pch_nx_line_maps (X);\
+ } while (0)
+extern void gt_pch_nx_line_maps (void *);
+extern void gt_pch_n_II17splay_tree_node_s (void *);
+extern void gt_pch_n_SP9tree_node17splay_tree_node_s (void *);
+extern void gt_pch_n_P9tree_nodeP9tree_node17splay_tree_node_s (void *);
+extern void gt_pch_n_IP9tree_node17splay_tree_node_s (void *);
+extern void gt_pch_n_P15interface_tuple4htab (void *);
+extern void gt_pch_n_P16volatilized_type4htab (void *);
+extern void gt_pch_n_P17string_descriptor4htab (void *);
+extern void gt_pch_n_P14type_assertion4htab (void *);
+extern void gt_pch_n_P18treetreehash_entry4htab (void *);
+extern void gt_pch_n_P17module_htab_entry4htab (void *);
+extern void gt_pch_n_P21pending_abstract_type4htab (void *);
+extern void gt_pch_n_P16cxx_int_tree_map4htab (void *);
+extern void gt_pch_n_P17named_label_entry4htab (void *);
+extern void gt_pch_n_P12tree_int_map4htab (void *);
+extern void gt_pch_n_IP9tree_node12splay_tree_s (void *);
+extern void gt_pch_n_P9tree_nodeP9tree_node12splay_tree_s (void *);
+extern void gt_pch_n_P13scev_info_str4htab (void *);
+extern void gt_pch_n_P23constant_descriptor_rtx4htab (void *);
+extern void gt_pch_n_P24constant_descriptor_tree4htab (void *);
+extern void gt_pch_n_P12object_block4htab (void *);
+extern void gt_pch_n_P7section4htab (void *);
+extern void gt_pch_n_P17tree_priority_map4htab (void *);
+extern void gt_pch_n_P8tree_map4htab (void *);
+extern void gt_pch_n_P9type_hash4htab (void *);
+extern void gt_pch_n_P13libfunc_entry4htab (void *);
+extern void gt_pch_n_P23temp_slot_address_entry4htab (void *);
+extern void gt_pch_n_P15throw_stmt_node4htab (void *);
+extern void gt_pch_n_P9reg_attrs4htab (void *);
+extern void gt_pch_n_P9mem_attrs4htab (void *);
+extern void gt_pch_n_P7rtx_def4htab (void *);
+extern void gt_pch_n_P12varpool_node4htab (void *);
+extern void gt_pch_n_P10cgraph_sym4htab (void *);
+extern void gt_pch_n_P18saved_module_scope4htab (void *);
+extern void gt_pch_n_SP9tree_node12splay_tree_s (void *);
+extern void gt_pch_n_P10vcall_insn4htab (void *);
+extern void gt_pch_n_P16var_loc_list_def4htab (void *);
+extern void gt_pch_n_P10die_struct4htab (void *);
+extern void gt_pch_n_P15dwarf_file_data4htab (void *);
+extern void gt_pch_n_P20indirect_string_node4htab (void *);
+extern void gt_pch_n_P11cgraph_node4htab (void *);
+extern void gt_pch_n_II12splay_tree_s (void *);
+extern void gt_pch_n_P15cgraph_mod_info4htab (void *);
+extern void gt_pch_n_P11cgraph_edge4htab (void *);
+extern void gt_pch_n_P9loop_exit4htab (void *);
+extern void gt_pch_n_P24types_used_by_vars_entry4htab (void *);
+extern void gt_pch_n_P20overlay_decl_mapping4htab (void *);
+extern void gt_pch_n_P9tree_node4htab (void *);
+extern void gt_pch_n_P13ehl_map_entry4htab (void *);
+
+/* Local pointer-walking routines. */
+extern void gt_pch_p_15interface_tuple
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16volatilized_type
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17string_descriptor
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_22VEC_c_saved_builtin_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_7c_scope
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9c_binding
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8c_parser
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9imp_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16hashed_attribute
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12hashed_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14type_assertion
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18treetreehash_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_5CPool
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_3JCF
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17module_htab_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13binding_level
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20VEC_saved_builtin_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9opt_stack
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11align_stack
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_19VEC_const_char_p_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_21pending_abstract_type
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9cp_parser
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17cp_parser_context
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8cp_lexer
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10tree_check
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_22VEC_deferred_access_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_26VEC_pending_attribute_p_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17pending_attribute
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16pending_template
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_21named_label_use_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_28VEC_deferred_access_check_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11tinst_level
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18sorted_fields_type
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18VEC_tree_pair_s_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17named_label_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14cp_token_cache
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11saved_scope
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16cxx_int_tree_map
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_23VEC_cp_class_binding_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_24VEC_cxx_saved_binding_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16cp_binding_level
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11cxx_binding
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15binding_entry_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15binding_table_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14VEC_tinfo_s_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18gnat_binding_level
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9elab_info
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10stmt_group
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16VEC_parm_attr_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9parm_attr
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20ssa_operand_memory_d
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13scev_info_str
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13VEC_gimple_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17VEC_alias_pair_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_24constant_descriptor_tree
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9type_hash
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16string_pool_data
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13libfunc_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_23temp_slot_address_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15throw_stmt_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16VEC_eh_region_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9eh_region
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18saved_module_scope
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10vcall_insn
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18VEC_vcall_entry_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18VEC_dcall_entry_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16var_loc_list_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12var_loc_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16limbo_die_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20VEC_pubname_entry_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_19VEC_dw_attr_node_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18comdat_type_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_25dw_ranges_by_label_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16dw_ranges_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_28dw_separate_line_info_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_19dw_line_info_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_25VEC_deferred_locations_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18dw_loc_list_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15dwarf_file_data
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15queued_reg_save
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20indirect_string_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_19dw_loc_descr_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13dw_fde_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13dw_cfi_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8typeinfo
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_22VEC_alias_set_entry_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15alias_set_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10cgraph_sym
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15cgraph_mod_info
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15cgraph_asm_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12varpool_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11cgraph_edge
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18VEC_basic_block_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14gimple_bb_info
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11rtl_bb_info
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11VEC_edge_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17cselib_val_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12elt_loc_list
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13VEC_loop_p_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_4loop
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9loop_exit
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13nb_iter_bound
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_24types_used_by_vars_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20overlay_decl_mapping
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17language_function
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_5loops
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18control_flow_graph
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9eh_status
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_20initial_value_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17rtx_constant_pool
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18VEC_temp_slot_p_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9temp_slot
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9gimple_df
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_13ehl_map_entry
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_23VEC_call_site_record_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16call_site_record
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14sequence_stack
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8edge_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8elt_list
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17tree_priority_map
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12tree_int_map
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8tree_map
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14lang_tree_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_24tree_statement_list_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9lang_decl
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9lang_type
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10die_struct
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15varray_head_tag
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12ptr_info_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_22VEC_constructor_elt_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10tree_ann_d
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11VEC_tree_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_8function
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_23constant_descriptor_rtx
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15basic_block_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11fixed_value
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10real_value
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_10VEC_rtx_gc
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12object_block
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9reg_attrs
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9mem_attrs
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_11cgraph_node
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_14bitmap_obstack
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18bitmap_element_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_16machine_function
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_17gimple_seq_node_d
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_12gimple_seq_d
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_7section
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_18gimple_statement_d
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9rtvec_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_7rtx_def
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_15bitmap_head_def
+ (void *, void *, gt_pointer_operator, void *);
+#define gt_pch_p_9tree_node gt_pch_p_14lang_tree_node
+extern void gt_pch_p_6answer
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9cpp_macro
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9cpp_token
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_9line_maps
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_II17splay_tree_node_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_SP9tree_node17splay_tree_node_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9tree_nodeP9tree_node17splay_tree_node_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_IP9tree_node17splay_tree_node_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P15interface_tuple4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P16volatilized_type4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P17string_descriptor4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P14type_assertion4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P18treetreehash_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P17module_htab_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P21pending_abstract_type4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P16cxx_int_tree_map4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P17named_label_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P12tree_int_map4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_IP9tree_node12splay_tree_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9tree_nodeP9tree_node12splay_tree_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P13scev_info_str4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P23constant_descriptor_rtx4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P24constant_descriptor_tree4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P12object_block4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P7section4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P17tree_priority_map4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P8tree_map4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9type_hash4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P13libfunc_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P23temp_slot_address_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P15throw_stmt_node4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9reg_attrs4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9mem_attrs4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P7rtx_def4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P12varpool_node4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P10cgraph_sym4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P18saved_module_scope4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_SP9tree_node12splay_tree_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P10vcall_insn4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P16var_loc_list_def4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P10die_struct4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P15dwarf_file_data4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P20indirect_string_node4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P11cgraph_node4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_II12splay_tree_s
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P15cgraph_mod_info4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P11cgraph_edge4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9loop_exit4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P24types_used_by_vars_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P20overlay_decl_mapping4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P9tree_node4htab
+ (void *, void *, gt_pointer_operator, void *);
+extern void gt_pch_p_P13ehl_map_entry4htab
+ (void *, void *, gt_pointer_operator, void *);
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hard-reg-set.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hard-reg-set.h
new file mode 100644
index 0000000..2ee713d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hard-reg-set.h
@@ -0,0 +1,682 @@
+/* Sets (bit vectors) of hard registers, and operations on them.
+ Copyright (C) 1987, 1992, 1994, 2000, 2003, 2004, 2005, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_HARD_REG_SET_H
+#define GCC_HARD_REG_SET_H
+
+/* Define the type of a set of hard registers. */
+
+/* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which
+ will be used for hard reg sets, either alone or in an array.
+
+ If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE,
+ and it has enough bits to represent all the target machine's hard
+ registers. Otherwise, it is a typedef for a suitably sized array
+ of HARD_REG_ELT_TYPEs. HARD_REG_SET_LONGS is defined as how many.
+
+ Note that lots of code assumes that the first part of a regset is
+ the same format as a HARD_REG_SET. To help make sure this is true,
+ we only try the widest fast integer mode (HOST_WIDEST_FAST_INT)
+ instead of all the smaller types. This approach loses only if
+ there are very few registers and then only in the few cases where
+ we have an array of HARD_REG_SETs, so it needn't be as complex as
+ it used to be. */
+
+typedef unsigned HOST_WIDEST_FAST_INT HARD_REG_ELT_TYPE;
+
+#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
+
+#define HARD_REG_SET HARD_REG_ELT_TYPE
+
+#else
+
+#define HARD_REG_SET_LONGS \
+ ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \
+ / HOST_BITS_PER_WIDEST_FAST_INT)
+typedef HARD_REG_ELT_TYPE HARD_REG_SET[HARD_REG_SET_LONGS];
+
+#endif
+
+/* HARD_CONST is used to cast a constant to the appropriate type
+ for use with a HARD_REG_SET. */
+
+#define HARD_CONST(X) ((HARD_REG_ELT_TYPE) (X))
+
+/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
+ to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
+ All three take two arguments: the set and the register number.
+
+ In the case where sets are arrays of longs, the first argument
+ is actually a pointer to a long.
+
+ Define two macros for initializing a set:
+ CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
+ These take just one argument.
+
+ Also define macros for copying hard reg sets:
+ COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
+ These take two arguments TO and FROM; they read from FROM
+ and store into TO. COMPL_HARD_REG_SET complements each bit.
+
+ Also define macros for combining hard reg sets:
+ IOR_HARD_REG_SET and AND_HARD_REG_SET.
+ These take two arguments TO and FROM; they read from FROM
+ and combine bitwise into TO. Define also two variants
+ IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
+ which use the complement of the set FROM.
+
+ Also define:
+
+ hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
+ hard_reg_set_equal_p (X, Y), which returns true if X and Y are equal.
+ hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect.
+ hard_reg_set_empty_p (X), which returns true if X is empty. */
+
+#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
+
+#ifdef HARD_REG_SET
+
+#define SET_HARD_REG_BIT(SET, BIT) \
+ ((SET) |= HARD_CONST (1) << (BIT))
+#define CLEAR_HARD_REG_BIT(SET, BIT) \
+ ((SET) &= ~(HARD_CONST (1) << (BIT)))
+#define TEST_HARD_REG_BIT(SET, BIT) \
+ (!!((SET) & (HARD_CONST (1) << (BIT))))
+
+#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
+#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
+
+#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
+#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
+
+#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
+#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
+#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
+
+static inline bool
+hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return (x & ~y) == HARD_CONST (0);
+}
+
+static inline bool
+hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return x == y;
+}
+
+static inline bool
+hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return (x & y) != HARD_CONST (0);
+}
+
+static inline bool
+hard_reg_set_empty_p (const HARD_REG_SET x)
+{
+ return x == HARD_CONST (0);
+}
+
+#else
+
+#define SET_HARD_REG_BIT(SET, BIT) \
+ ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ |= HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))
+
+#define CLEAR_HARD_REG_BIT(SET, BIT) \
+ ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ &= ~(HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
+
+#define TEST_HARD_REG_BIT(SET, BIT) \
+ (!!((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ & (HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))))
+
+#if FIRST_PSEUDO_REGISTER <= 2*HOST_BITS_PER_WIDEST_FAST_INT
+#define CLEAR_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = 0; \
+ scan_tp_[1] = 0; } while (0)
+
+#define SET_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = -1; \
+ scan_tp_[1] = -1; } while (0)
+
+#define COPY_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = scan_fp_[0]; \
+ scan_tp_[1] = scan_fp_[1]; } while (0)
+
+#define COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = ~ scan_fp_[0]; \
+ scan_tp_[1] = ~ scan_fp_[1]; } while (0)
+
+#define AND_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= scan_fp_[0]; \
+ scan_tp_[1] &= scan_fp_[1]; } while (0)
+
+#define AND_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= ~ scan_fp_[0]; \
+ scan_tp_[1] &= ~ scan_fp_[1]; } while (0)
+
+#define IOR_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= scan_fp_[0]; \
+ scan_tp_[1] |= scan_fp_[1]; } while (0)
+
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= ~ scan_fp_[0]; \
+ scan_tp_[1] |= ~ scan_fp_[1]; } while (0)
+
+static inline bool
+hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return (x[0] & ~y[0]) == 0 && (x[1] & ~y[1]) == 0;
+}
+
+static inline bool
+hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return x[0] == y[0] && x[1] == y[1];
+}
+
+static inline bool
+hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return (x[0] & y[0]) != 0 || (x[1] & y[1]) != 0;
+}
+
+static inline bool
+hard_reg_set_empty_p (const HARD_REG_SET x)
+{
+ return x[0] == 0 && x[1] == 0;
+}
+
+#else
+#if FIRST_PSEUDO_REGISTER <= 3*HOST_BITS_PER_WIDEST_FAST_INT
+#define CLEAR_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = 0; \
+ scan_tp_[1] = 0; \
+ scan_tp_[2] = 0; } while (0)
+
+#define SET_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = -1; \
+ scan_tp_[1] = -1; \
+ scan_tp_[2] = -1; } while (0)
+
+#define COPY_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = scan_fp_[0]; \
+ scan_tp_[1] = scan_fp_[1]; \
+ scan_tp_[2] = scan_fp_[2]; } while (0)
+
+#define COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = ~ scan_fp_[0]; \
+ scan_tp_[1] = ~ scan_fp_[1]; \
+ scan_tp_[2] = ~ scan_fp_[2]; } while (0)
+
+#define AND_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= scan_fp_[0]; \
+ scan_tp_[1] &= scan_fp_[1]; \
+ scan_tp_[2] &= scan_fp_[2]; } while (0)
+
+#define AND_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= ~ scan_fp_[0]; \
+ scan_tp_[1] &= ~ scan_fp_[1]; \
+ scan_tp_[2] &= ~ scan_fp_[2]; } while (0)
+
+#define IOR_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= scan_fp_[0]; \
+ scan_tp_[1] |= scan_fp_[1]; \
+ scan_tp_[2] |= scan_fp_[2]; } while (0)
+
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= ~ scan_fp_[0]; \
+ scan_tp_[1] |= ~ scan_fp_[1]; \
+ scan_tp_[2] |= ~ scan_fp_[2]; } while (0)
+
+static inline bool
+hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return ((x[0] & ~y[0]) == 0
+ && (x[1] & ~y[1]) == 0
+ && (x[2] & ~y[2]) == 0);
+}
+
+static inline bool
+hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return x[0] == y[0] && x[1] == y[1] && x[2] == y[2];
+}
+
+static inline bool
+hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return ((x[0] & y[0]) != 0
+ || (x[1] & y[1]) != 0
+ || (x[2] & y[2]) != 0);
+}
+
+static inline bool
+hard_reg_set_empty_p (const HARD_REG_SET x)
+{
+ return x[0] == 0 && x[1] == 0 && x[2] == 0;
+}
+
+#else
+#if FIRST_PSEUDO_REGISTER <= 4*HOST_BITS_PER_WIDEST_FAST_INT
+#define CLEAR_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = 0; \
+ scan_tp_[1] = 0; \
+ scan_tp_[2] = 0; \
+ scan_tp_[3] = 0; } while (0)
+
+#define SET_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ scan_tp_[0] = -1; \
+ scan_tp_[1] = -1; \
+ scan_tp_[2] = -1; \
+ scan_tp_[3] = -1; } while (0)
+
+#define COPY_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = scan_fp_[0]; \
+ scan_tp_[1] = scan_fp_[1]; \
+ scan_tp_[2] = scan_fp_[2]; \
+ scan_tp_[3] = scan_fp_[3]; } while (0)
+
+#define COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] = ~ scan_fp_[0]; \
+ scan_tp_[1] = ~ scan_fp_[1]; \
+ scan_tp_[2] = ~ scan_fp_[2]; \
+ scan_tp_[3] = ~ scan_fp_[3]; } while (0)
+
+#define AND_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= scan_fp_[0]; \
+ scan_tp_[1] &= scan_fp_[1]; \
+ scan_tp_[2] &= scan_fp_[2]; \
+ scan_tp_[3] &= scan_fp_[3]; } while (0)
+
+#define AND_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] &= ~ scan_fp_[0]; \
+ scan_tp_[1] &= ~ scan_fp_[1]; \
+ scan_tp_[2] &= ~ scan_fp_[2]; \
+ scan_tp_[3] &= ~ scan_fp_[3]; } while (0)
+
+#define IOR_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= scan_fp_[0]; \
+ scan_tp_[1] |= scan_fp_[1]; \
+ scan_tp_[2] |= scan_fp_[2]; \
+ scan_tp_[3] |= scan_fp_[3]; } while (0)
+
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ scan_tp_[0] |= ~ scan_fp_[0]; \
+ scan_tp_[1] |= ~ scan_fp_[1]; \
+ scan_tp_[2] |= ~ scan_fp_[2]; \
+ scan_tp_[3] |= ~ scan_fp_[3]; } while (0)
+
+static inline bool
+hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return ((x[0] & ~y[0]) == 0
+ && (x[1] & ~y[1]) == 0
+ && (x[2] & ~y[2]) == 0
+ && (x[3] & ~y[3]) == 0);
+}
+
+static inline bool
+hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return x[0] == y[0] && x[1] == y[1] && x[2] == y[2] && x[3] == y[3];
+}
+
+static inline bool
+hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ return ((x[0] & y[0]) != 0
+ || (x[1] & y[1]) != 0
+ || (x[2] & y[2]) != 0
+ || (x[3] & y[3]) != 0);
+}
+
+static inline bool
+hard_reg_set_empty_p (const HARD_REG_SET x)
+{
+ return x[0] == 0 && x[1] == 0 && x[2] == 0 && x[3] == 0;
+}
+
+#else /* FIRST_PSEUDO_REGISTER > 4*HOST_BITS_PER_WIDEST_FAST_INT */
+
+#define CLEAR_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = 0; } while (0)
+
+#define SET_HARD_REG_SET(TO) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = -1; } while (0)
+
+#define COPY_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = *scan_fp_++; } while (0)
+
+#define COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = ~ *scan_fp_++; } while (0)
+
+#define AND_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ &= *scan_fp_++; } while (0)
+
+#define AND_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ &= ~ *scan_fp_++; } while (0)
+
+#define IOR_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ |= *scan_fp_++; } while (0)
+
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
+do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ |= ~ *scan_fp_++; } while (0)
+
+static inline bool
+hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ int i;
+
+ for (i = 0; i < HARD_REG_SET_LONGS; i++)
+ if ((x[i] & ~y[i]) != 0)
+ return false;
+ return true;
+}
+
+static inline bool
+hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ int i;
+
+ for (i = 0; i < HARD_REG_SET_LONGS; i++)
+ if (x[i] != y[i])
+ return false;
+ return true;
+}
+
+static inline bool
+hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+{
+ int i;
+
+ for (i = 0; i < HARD_REG_SET_LONGS; i++)
+ if ((x[i] & y[i]) != 0)
+ return true;
+ return false;
+}
+
+static inline bool
+hard_reg_set_empty_p (const HARD_REG_SET x)
+{
+ int i;
+
+ for (i = 0; i < HARD_REG_SET_LONGS; i++)
+ if (x[i] != 0)
+ return false;
+ return true;
+}
+
+#endif
+#endif
+#endif
+#endif
+
+/* Iterator for hard register sets. */
+
+typedef struct
+{
+ /* Pointer to the current element. */
+ HARD_REG_ELT_TYPE *pelt;
+
+ /* The length of the set. */
+ unsigned short length;
+
+ /* Word within the current element. */
+ unsigned short word_no;
+
+ /* Contents of the actually processed word. When finding next bit
+ it is shifted right, so that the actual bit is always the least
+ significant bit of ACTUAL. */
+ HARD_REG_ELT_TYPE bits;
+} hard_reg_set_iterator;
+
+#define HARD_REG_ELT_BITS UHOST_BITS_PER_WIDE_INT
+
+/* The implementation of the iterator functions is fully analogous to
+ the bitmap iterators. */
+static inline void
+hard_reg_set_iter_init (hard_reg_set_iterator *iter, HARD_REG_SET set,
+ unsigned min, unsigned *regno)
+{
+#ifdef HARD_REG_SET_LONGS
+ iter->pelt = set;
+ iter->length = HARD_REG_SET_LONGS;
+#else
+ iter->pelt = &set;
+ iter->length = 1;
+#endif
+ iter->word_no = min / HARD_REG_ELT_BITS;
+ if (iter->word_no < iter->length)
+ {
+ iter->bits = iter->pelt[iter->word_no];
+ iter->bits >>= min % HARD_REG_ELT_BITS;
+
+ /* This is required for correct search of the next bit. */
+ min += !iter->bits;
+ }
+ *regno = min;
+}
+
+static inline bool
+hard_reg_set_iter_set (hard_reg_set_iterator *iter, unsigned *regno)
+{
+ while (1)
+ {
+ /* Return false when we're advanced past the end of the set. */
+ if (iter->word_no >= iter->length)
+ return false;
+
+ if (iter->bits)
+ {
+ /* Find the correct bit and return it. */
+ while (!(iter->bits & 1))
+ {
+ iter->bits >>= 1;
+ *regno += 1;
+ }
+ return (*regno < FIRST_PSEUDO_REGISTER);
+ }
+
+ /* Round to the beginning of the next word. */
+ *regno = (*regno + HARD_REG_ELT_BITS - 1);
+ *regno -= *regno % HARD_REG_ELT_BITS;
+
+ /* Find the next non-zero word. */
+ while (++iter->word_no < iter->length)
+ {
+ iter->bits = iter->pelt[iter->word_no];
+ if (iter->bits)
+ break;
+ *regno += HARD_REG_ELT_BITS;
+ }
+ }
+}
+
+static inline void
+hard_reg_set_iter_next (hard_reg_set_iterator *iter, unsigned *regno)
+{
+ iter->bits >>= 1;
+ *regno += 1;
+}
+
+#define EXECUTE_IF_SET_IN_HARD_REG_SET(SET, MIN, REGNUM, ITER) \
+ for (hard_reg_set_iter_init (&(ITER), (SET), (MIN), &(REGNUM)); \
+ hard_reg_set_iter_set (&(ITER), &(REGNUM)); \
+ hard_reg_set_iter_next (&(ITER), &(REGNUM)))
+
+
+/* Define some standard sets of registers. */
+
+/* Indexed by hard register number, contains 1 for registers
+ that are fixed use (stack pointer, pc, frame pointer, etc.).
+ These are the registers that cannot be used to allocate
+ a pseudo reg whose life does not cross calls. */
+
+extern char fixed_regs[FIRST_PSEUDO_REGISTER];
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET fixed_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers
+ that are fixed use or are clobbered by function calls.
+ These are the registers that cannot be used to allocate
+ a pseudo reg whose life crosses calls. */
+
+extern char call_used_regs[FIRST_PSEUDO_REGISTER];
+
+#ifdef CALL_REALLY_USED_REGISTERS
+extern char call_really_used_regs[];
+#endif
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET call_used_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers that are
+ fixed use -- i.e. in fixed_regs -- or a function value return register
+ or TARGET_STRUCT_VALUE_RTX or STATIC_CHAIN_REGNUM. These are the
+ registers that cannot hold quantities across calls even if we are
+ willing to save and restore them. */
+
+extern char call_fixed_regs[FIRST_PSEUDO_REGISTER];
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET call_fixed_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers
+ that are being used for global register decls.
+ These must be exempt from ordinary flow analysis
+ and are also considered fixed. */
+
+extern char global_regs[FIRST_PSEUDO_REGISTER];
+
+/* Contains 1 for registers that are set or clobbered by calls. */
+/* ??? Ideally, this would be just call_used_regs plus global_regs, but
+ for someone's bright idea to have call_used_regs strictly include
+ fixed_regs. Which leaves us guessing as to the set of fixed_regs
+ that are actually preserved. We know for sure that those associated
+ with the local stack frame are safe, but scant others. */
+
+extern HARD_REG_SET regs_invalidated_by_call;
+
+/* Call used hard registers which can not be saved because there is no
+ insn for this. */
+
+extern HARD_REG_SET no_caller_save_reg_set;
+
+#ifdef REG_ALLOC_ORDER
+/* Table of register numbers in the order in which to try to use them. */
+
+extern int reg_alloc_order[FIRST_PSEUDO_REGISTER];
+
+/* The inverse of reg_alloc_order. */
+
+extern int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
+#endif
+
+/* For each reg class, a HARD_REG_SET saying which registers are in it. */
+
+extern HARD_REG_SET reg_class_contents[N_REG_CLASSES];
+
+/* For each reg class, number of regs it contains. */
+
+extern unsigned int reg_class_size[N_REG_CLASSES];
+
+/* For each reg class, table listing all the classes contained in it. */
+
+extern enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+
+/* For each pair of reg classes,
+ a largest reg class contained in their union. */
+
+extern enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
+
+/* For each pair of reg classes,
+ the smallest reg class that contains their union. */
+
+extern enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
+
+/* Vector indexed by hardware reg giving its name. */
+
+extern const char * reg_names[FIRST_PSEUDO_REGISTER];
+
+/* Vector indexed by reg class giving its name. */
+
+extern const char * reg_class_names[];
+
+/* Given a hard REGN a FROM mode and a TO mode, return nonzero if
+ REGN cannot change modes between the specified modes. */
+#define REG_CANNOT_CHANGE_MODE_P(REGN, FROM, TO) \
+ CANNOT_CHANGE_MODE_CLASS (FROM, TO, REGNO_REG_CLASS (REGN))
+
+#endif /* ! GCC_HARD_REG_SET_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hashtab.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hashtab.h
new file mode 100644
index 0000000..77eee14
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hashtab.h
@@ -0,0 +1,206 @@
+/* An expandable hash tables datatype.
+ Copyright (C) 1999, 2000, 2002, 2003, 2004 Free Software Foundation, Inc.
+ Contributed by Vladimir Makarov (vmakarov@cygnus.com).
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* This package implements basic hash table functionality. It is possible
+ to search for an entry, create an entry and destroy an entry.
+
+ Elements in the table are generic pointers.
+
+ The size of the table is not fixed; if the occupancy of the table
+ grows too high the hash table will be expanded.
+
+ The abstract data implementation is based on generalized Algorithm D
+ from Knuth's book "The art of computer programming". Hash table is
+ expanded by creation of new hash table and transferring elements from
+ the old table to the new table. */
+
+#ifndef __HASHTAB_H__
+#define __HASHTAB_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ansidecl.h"
+
+#ifndef GTY
+#define GTY(X)
+#endif
+
+/* The type for a hash code. */
+typedef unsigned int hashval_t;
+
+/* Callback function pointer types. */
+
+/* Calculate hash of a table entry. */
+typedef hashval_t (*htab_hash) (const void *);
+
+/* Compare a table entry with a possible entry. The entry already in
+ the table always comes first, so the second element can be of a
+ different type (but in this case htab_find and htab_find_slot
+ cannot be used; instead the variants that accept a hash value
+ must be used). */
+typedef int (*htab_eq) (const void *, const void *);
+
+/* Cleanup function called whenever a live element is removed from
+ the hash table. */
+typedef void (*htab_del) (void *);
+
+/* Function called by htab_traverse for each live element. The first
+ arg is the slot of the element (which can be passed to htab_clear_slot
+ if desired), the second arg is the auxiliary pointer handed to
+ htab_traverse. Return 1 to continue scan, 0 to stop. */
+typedef int (*htab_trav) (void **, void *);
+
+/* Memory-allocation function, with the same functionality as calloc().
+ Iff it returns NULL, the hash table implementation will pass an error
+ code back to the user, so if your code doesn't handle errors,
+ best if you use xcalloc instead. */
+typedef void *(*htab_alloc) (size_t, size_t);
+
+/* We also need a free() routine. */
+typedef void (*htab_free) (void *);
+
+/* Memory allocation and deallocation; variants which take an extra
+ argument. */
+typedef void *(*htab_alloc_with_arg) (void *, size_t, size_t);
+typedef void (*htab_free_with_arg) (void *, void *);
+
+/* This macro defines reserved value for empty table entry. */
+
+#define HTAB_EMPTY_ENTRY ((PTR) 0)
+
+/* This macro defines reserved value for table entry which contained
+ a deleted element. */
+
+#define HTAB_DELETED_ENTRY ((PTR) 1)
+
+/* Hash tables are of the following type. The structure
+ (implementation) of this type is not needed for using the hash
+ tables. All work with hash table should be executed only through
+ functions mentioned below. The size of this structure is subject to
+ change. */
+
+struct htab GTY(())
+{
+ /* Pointer to hash function. */
+ htab_hash hash_f;
+
+ /* Pointer to comparison function. */
+ htab_eq eq_f;
+
+ /* Pointer to cleanup function. */
+ htab_del del_f;
+
+ /* Table itself. */
+ void ** GTY ((use_param, length ("%h.size"))) entries;
+
+ /* Current size (in entries) of the hash table. */
+ size_t size;
+
+ /* Current number of elements including also deleted elements. */
+ size_t n_elements;
+
+ /* Current number of deleted elements in the table. */
+ size_t n_deleted;
+
+ /* The following member is used for debugging. Its value is number
+ of all calls of `htab_find_slot' for the hash table. */
+ unsigned int searches;
+
+ /* The following member is used for debugging. Its value is number
+ of collisions fixed for time of work with the hash table. */
+ unsigned int collisions;
+
+ /* Pointers to allocate/free functions. */
+ htab_alloc alloc_f;
+ htab_free free_f;
+
+ /* Alternate allocate/free functions, which take an extra argument. */
+ void * GTY((skip)) alloc_arg;
+ htab_alloc_with_arg alloc_with_arg_f;
+ htab_free_with_arg free_with_arg_f;
+
+ /* Current size (in entries) of the hash table, as an index into the
+ table of primes. */
+ unsigned int size_prime_index;
+};
+
+typedef struct htab *htab_t;
+
+/* An enum saying whether we insert into the hash table or not. */
+enum insert_option {NO_INSERT, INSERT};
+
+/* The prototypes of the package functions. */
+
+extern htab_t htab_create_alloc (size_t, htab_hash,
+ htab_eq, htab_del,
+ htab_alloc, htab_free);
+
+extern htab_t htab_create_alloc_ex (size_t, htab_hash,
+ htab_eq, htab_del,
+ void *, htab_alloc_with_arg,
+ htab_free_with_arg);
+
+/* Backward-compatibility functions. */
+extern htab_t htab_create (size_t, htab_hash, htab_eq, htab_del);
+extern htab_t htab_try_create (size_t, htab_hash, htab_eq, htab_del);
+
+extern void htab_set_functions_ex (htab_t, htab_hash,
+ htab_eq, htab_del,
+ void *, htab_alloc_with_arg,
+ htab_free_with_arg);
+
+extern void htab_delete (htab_t);
+extern void htab_empty (htab_t);
+
+extern void * htab_find (htab_t, const void *);
+extern void ** htab_find_slot (htab_t, const void *, enum insert_option);
+extern void * htab_find_with_hash (htab_t, const void *, hashval_t);
+extern void ** htab_find_slot_with_hash (htab_t, const void *,
+ hashval_t, enum insert_option);
+extern void htab_clear_slot (htab_t, void **);
+extern void htab_remove_elt (htab_t, void *);
+extern void htab_remove_elt_with_hash (htab_t, void *, hashval_t);
+
+extern void htab_traverse (htab_t, htab_trav, void *);
+extern void htab_traverse_noresize (htab_t, htab_trav, void *);
+
+extern size_t htab_size (htab_t);
+extern size_t htab_elements (htab_t);
+extern double htab_collisions (htab_t);
+
+/* A hash function for pointers. */
+extern htab_hash htab_hash_pointer;
+
+/* An equality function for pointers. */
+extern htab_eq htab_eq_pointer;
+
+/* A hash function for null-terminated strings. */
+extern hashval_t htab_hash_string (const void *);
+
+/* An iterative hash function for arbitrary data. */
+extern hashval_t iterative_hash (const void *, size_t, hashval_t);
+/* Shorthand for hashing something with an intrinsic size. */
+#define iterative_hash_object(OB,INIT) iterative_hash (&OB, sizeof (OB), INIT)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __HASHTAB_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hwint.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hwint.h
new file mode 100644
index 0000000..4e0679c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/hwint.h
@@ -0,0 +1,150 @@
+/* HOST_WIDE_INT definitions for the GNU compiler.
+ Copyright (C) 1998, 2002, 2004, 2008 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ Provide definitions for macros which depend on HOST_BITS_PER_INT
+ and HOST_BITS_PER_LONG. */
+
+#ifndef GCC_HWINT_H
+#define GCC_HWINT_H
+
+/* This describes the machine the compiler is hosted on. */
+#define HOST_BITS_PER_CHAR CHAR_BIT
+#define HOST_BITS_PER_SHORT (CHAR_BIT * SIZEOF_SHORT)
+#define HOST_BITS_PER_INT (CHAR_BIT * SIZEOF_INT)
+#define HOST_BITS_PER_LONG (CHAR_BIT * SIZEOF_LONG)
+
+/* The string that should be inserted into a printf style format to
+ indicate a "long long" operand. */
+#ifndef HOST_LONG_LONG_FORMAT
+#define HOST_LONG_LONG_FORMAT "ll"
+#endif
+
+/* If HAVE_LONG_LONG and SIZEOF_LONG_LONG aren't defined, but
+ GCC_VERSION >= 3000, assume this is the second or later stage of a
+ bootstrap, we do have long long, and it's 64 bits. (This is
+ required by C99; we do have some ports that violate that assumption
+ but they're all cross-compile-only.) Just in case, force a
+ constraint violation if that assumption is incorrect. */
+#if !defined HAVE_LONG_LONG
+# if GCC_VERSION >= 3000
+# define HAVE_LONG_LONG 1
+# define SIZEOF_LONG_LONG 8
+extern char sizeof_long_long_must_be_8[sizeof(long long) == 8 ? 1 : -1];
+# endif
+#endif
+
+#ifdef HAVE_LONG_LONG
+# define HOST_BITS_PER_LONGLONG (CHAR_BIT * SIZEOF_LONG_LONG)
+#endif
+#ifdef HAVE___INT64
+# define HOST_BITS_PER___INT64 (CHAR_BIT * SIZEOF___INT64)
+#endif
+
+/* Set HOST_WIDE_INT. This should be the widest efficient host
+ integer type. It can be 32 or 64 bits, except that if we are
+ targeting a machine with 64-bit size_t then it has to be 64 bits.
+
+ With a sane ABI, 'long' is the largest efficient host integer type.
+ Thus, we use that unless we have to use 'long long' or '__int64'
+ because we're targeting a 64-bit machine from a 32-bit host. */
+
+#if HOST_BITS_PER_LONG >= 64 || !defined NEED_64BIT_HOST_WIDE_INT
+# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER_LONG
+# define HOST_WIDE_INT long
+#else
+# if HOST_BITS_PER_LONGLONG >= 64
+# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER_LONGLONG
+# define HOST_WIDE_INT long long
+# else
+# if HOST_BITS_PER___INT64 >= 64
+# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER___INT64
+# define HOST_WIDE_INT __int64
+# else
+ #error "Unable to find a suitable type for HOST_WIDE_INT"
+# endif
+# endif
+#endif
+
+/* Various printf format strings for HOST_WIDE_INT. */
+
+#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
+# define HOST_WIDE_INT_PRINT "l"
+# define HOST_WIDE_INT_PRINT_C "L"
+ /* 'long' might be 32 or 64 bits, and the number of leading zeroes
+ must be tweaked accordingly. */
+# if HOST_BITS_PER_WIDE_INT == 64
+# define HOST_WIDE_INT_PRINT_DOUBLE_HEX "0x%lx%016lx"
+# else
+# define HOST_WIDE_INT_PRINT_DOUBLE_HEX "0x%lx%08lx"
+# endif
+#else
+# define HOST_WIDE_INT_PRINT HOST_LONG_LONG_FORMAT
+# define HOST_WIDE_INT_PRINT_C "LL"
+ /* We can assume that 'long long' is at least 64 bits. */
+# define HOST_WIDE_INT_PRINT_DOUBLE_HEX \
+ "0x%" HOST_LONG_LONG_FORMAT "x%016" HOST_LONG_LONG_FORMAT "x"
+#endif /* HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG */
+
+#define HOST_WIDE_INT_PRINT_DEC "%" HOST_WIDE_INT_PRINT "d"
+#define HOST_WIDE_INT_PRINT_DEC_C HOST_WIDE_INT_PRINT_DEC HOST_WIDE_INT_PRINT_C
+#define HOST_WIDE_INT_PRINT_UNSIGNED "%" HOST_WIDE_INT_PRINT "u"
+#define HOST_WIDE_INT_PRINT_HEX "0x%" HOST_WIDE_INT_PRINT "x"
+
+/* Set HOST_WIDEST_INT. This is a 64-bit type unless the compiler
+ in use has no 64-bit type at all; in that case it's 32 bits. */
+
+#if HOST_BITS_PER_WIDE_INT >= 64 \
+ || (HOST_BITS_PER_LONGLONG < 64 && HOST_BITS_PER___INT64 < 64)
+# define HOST_WIDEST_INT HOST_WIDE_INT
+# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_WIDE_INT
+# define HOST_WIDEST_INT_PRINT_DEC HOST_WIDE_INT_PRINT_DEC
+# define HOST_WIDEST_INT_PRINT_DEC_C HOST_WIDE_INT_PRINT_DEC_C
+# define HOST_WIDEST_INT_PRINT_UNSIGNED HOST_WIDE_INT_PRINT_UNSIGNED
+# define HOST_WIDEST_INT_PRINT_HEX HOST_WIDE_INT_PRINT_HEX
+# define HOST_WIDEST_INT_PRINT_DOUBLE_HEX HOST_WIDE_INT_PRINT_DOUBLE_HEX
+#else
+# if HOST_BITS_PER_LONGLONG >= 64
+# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_LONGLONG
+# define HOST_WIDEST_INT long long
+# else
+# if HOST_BITS_PER___INT64 >= 64
+# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER___INT64
+# define HOST_WIDEST_INT __int64
+# else
+ #error "This line should be impossible to reach"
+# endif
+# endif
+# define HOST_WIDEST_INT_PRINT_DEC "%" HOST_LONG_LONG_FORMAT "d"
+# define HOST_WIDEST_INT_PRINT_DEC_C "%" HOST_LONG_LONG_FORMAT "dLL"
+# define HOST_WIDEST_INT_PRINT_UNSIGNED "%" HOST_LONG_LONG_FORMAT "u"
+# define HOST_WIDEST_INT_PRINT_HEX "0x%" HOST_LONG_LONG_FORMAT "x"
+# define HOST_WIDEST_INT_PRINT_DOUBLE_HEX \
+ "0x%" HOST_LONG_LONG_FORMAT "x%016" HOST_LONG_LONG_FORMAT "x"
+#endif
+
+/* Define HOST_WIDEST_FAST_INT to the widest integer type supported
+ efficiently in hardware. (That is, the widest integer type that fits
+ in a hardware register.) Normally this is "long" but on some hosts it
+ should be "long long" or "__int64". This is no convenient way to
+ autodetect this, so such systems must set a flag in config.host; see there
+ for details. */
+
+#ifdef USE_LONG_LONG_FOR_WIDEST_FAST_INT
+# ifdef HAVE_LONG_LONG
+# define HOST_WIDEST_FAST_INT long long
+# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER_LONGLONG
+# elif defined (HAVE___INT64)
+# define HOST_WIDEST_FAST_INT __int64
+# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER___INT64
+# else
+# error "Your host said it wanted to use long long or __int64 but neither"
+# error "exist"
+# endif
+#else
+# define HOST_WIDEST_FAST_INT long
+# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER_LONG
+#endif
+
+#endif /* ! GCC_HWINT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/incpath.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/incpath.h
new file mode 100644
index 0000000..065f552
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/incpath.h
@@ -0,0 +1,36 @@
+/* Set up combined include path for the preprocessor.
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+extern void split_quote_chain (void);
+extern void add_path (char *, int, int, bool);
+extern void register_include_chains (cpp_reader *, const char *,
+ const char *, const char *,
+ int, int, int);
+extern void add_cpp_dir_path (struct cpp_dir *, int);
+extern void get_include_chains (cpp_dir **quotes, cpp_dir **brackets);
+extern void clear_include_chains (void);
+
+struct target_c_incpath_s {
+ /* Do extra includes processing. STDINC is false iff -nostdinc was given. */
+ void (*extra_pre_includes) (const char *, const char *, int);
+ void (*extra_includes) (const char *, const char *, int);
+};
+
+extern struct target_c_incpath_s target_c_incpath;
+
+enum { QUOTE = 0, BRACKET, SYSTEM, AFTER };
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/input.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/input.h
new file mode 100644
index 0000000..299f56c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/input.h
@@ -0,0 +1,68 @@
+/* Declarations for variables relating to reading the source file.
+ Used by parsers, lexical analyzers, and error message routines.
+ Copyright (C) 1993, 1997, 1998, 2000, 2003, 2004, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_INPUT_H
+#define GCC_INPUT_H
+
+#include "line-map.h"
+
+extern GTY(()) struct line_maps *line_table;
+
+/* A value which will never be used to represent a real location. */
+#define UNKNOWN_LOCATION ((source_location) 0)
+
+/* The location for declarations in "<built-in>" */
+#define BUILTINS_LOCATION ((source_location) 2)
+
+typedef struct GTY (())
+{
+ /* The name of the source file involved. */
+ const char *file;
+
+ /* The line-location in the source file. */
+ int line;
+
+ int column;
+
+ /* In a system header?. */
+ bool sysp;
+} expanded_location;
+
+extern expanded_location expand_location (source_location);
+
+/* Historically GCC used location_t, while cpp used source_location.
+ This could be removed but it hardly seems worth the effort. */
+typedef source_location location_t;
+
+/* Top-level source file. */
+extern const char *main_input_filename;
+
+extern location_t input_location;
+
+#define LOCATION_FILE(LOC) ((expand_location (LOC)).file)
+#define LOCATION_LINE(LOC) ((expand_location (LOC)).line)
+
+#define input_line LOCATION_LINE (input_location)
+#define input_filename LOCATION_FILE (input_location)
+#define in_system_header_at(LOC) ((expand_location (LOC)).sysp != 0)
+#define in_system_header (in_system_header_at (input_location))
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-constants.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-constants.h
new file mode 100644
index 0000000..2f8a025
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-constants.h
@@ -0,0 +1,204 @@
+/* Generated automatically by the program `genconstants'
+ from the machine description file `md'. */
+
+#ifndef GCC_INSN_CONSTANTS_H
+#define GCC_INSN_CONSTANTS_H
+
+#define UNSPEC_VCAGT 80
+#define UNSPEC_VST2_LANE 182
+#define VUNSPEC_POOL_END 3
+#define UNSPEC_VMLS 121
+#define UNSPEC_CHECK_ARCH 7
+#define VUNSPEC_WCMP_EQ 12
+#define VUNSPEC_POOL_4 6
+#define UNSPEC_VCLZ 85
+#define UNSPEC_WMACSZ 15
+#define UNSPEC_VEXT 93
+#define VUNSPEC_ALIGN8 11
+#define UNSPEC_VRECPS 164
+#define UNSPEC_VLD1_DUP 100
+#define UNSPEC_VLD3A 106
+#define UNSPEC_VLD2_DUP 103
+#define UNSPEC_VLD4A 111
+#define UNSPEC_WMACUZ 16
+#define UNSPEC_VLD3B 107
+#define UNSPEC_VLD4_DUP 113
+#define UNSPEC_VLD4B 112
+#define UNSPEC_VTRN1 198
+#define UNSPEC_VMLAL 118
+#define UNSPEC_VSUBW 195
+#define UNSPEC_VTRN2 199
+#define UNSPEC_GOTSYM_OFF 24
+#define VUNSPEC_TMCR 10
+#define UNSPEC_VLD1_LANE 101
+#define UNSPEC_VBIC 77
+#define UNSPEC_VLD2_LANE 104
+#define UNSPEC_VLD3_LANE 109
+#define UNSPEC_VMVN 132
+#define UNSPEC_VLD4_LANE 114
+#define LAST_ARM_REGNUM 15
+#define UNSPEC_TLS 20
+#define UNSPEC_VQSHRUN_N 161
+#define UNSPEC_VHADD 97
+#define UNSPEC_VPADD 136
+#define UNSPEC_VQDMULL 152
+#define VUNSPEC_POOL_8 7
+#define PC_REGNUM 15
+#define UNSPEC_VSUBHN 193
+#define UNSPEC_VQDMLSL 148
+#define UNSPEC_WSADZ 12
+#define UNSPEC_VQDMLAL_LANE 147
+#define UNSPEC_VHSUB 98
+#define UNSPEC_VQDMULH 150
+#define UNSPEC_SIN 0
+#define UNSPEC_VDUP_LANE 90
+#define UNSPEC_WSHUFH 8
+#define IP_REGNUM 12
+#define UNSPEC_VPMIN 139
+#define VUNSPEC_EH_RETURN 20
+#define VUNSPEC_ALIGN 2
+#define UNSPEC_VLD3_DUP 108
+#define UNSPEC_VGET_LOW 96
+#define UNSPEC_VPMAX 138
+#define UNSPEC_VPADAL 135
+#define UNSPEC_STACK_ALIGN 22
+#define UNSPEC_VST1 179
+#define UNSPEC_VST2 181
+#define UNSPEC_VRSQRTE 168
+#define UNSPEC_VST3 183
+#define UNSPEC_VST4 187
+#define VUNSPEC_POOL_16 8
+#define VUNSPEC_WCMP_GTU 13
+#define UNSPEC_VSRA_N 177
+#define UNSPEC_VREV32 166
+#define UNSPEC_VSHL_N 173
+#define UNSPEC_VQMOVUN 155
+#define UNSPEC_VSUB 192
+#define UNSPEC_VCEQ 81
+#define UNSPEC_VSHR_N 174
+#define UNSPEC_VSHL 171
+#define UNSPEC_VCGT 83
+#define UNSPEC_VCVT_N 89
+#define UNSPEC_VCLS 84
+#define UNSPEC_VABAL 68
+#define UNSPEC_VGET_HIGH 94
+#define UNSPEC_VMLA_LANE 119
+#define UNSPEC_VORN 133
+#define UNSPEC_VREV64 167
+#define UNSPEC_VABDL 70
+#define UNSPEC_VADDL 74
+#define UNSPEC_VCVT 88
+#define UNSPEC_VORR 134
+#define UNSPEC_VQNEG 156
+#define UNSPEC_VBSL 78
+#define UNSPEC_VQDMULL_LANE 153
+#define UNSPEC_VQSHL_N 158
+#define SP_REGNUM 13
+#define LR_REGNUM 14
+#define R0_REGNUM 0
+#define UNSPEC_VPSMIN 141
+#define UNSPEC_VQSUB 162
+#define UNSPEC_VPUMIN 143
+#define UNSPEC_WSAD 11
+#define UNSPEC_VQDMLSL_LANE 149
+#define UNSPEC_PUSH_MULT 2
+#define UNSPEC_VMLS_LANE 123
+#define UNSPEC_VQABS 144
+#define UNSPEC_VQSHL 157
+#define UNSPEC_VMULL 128
+#define UNSPEC_VADDW 75
+#define UNSPEC_VMULL_LANE 130
+#define UNSPEC_VMLSL 122
+#define UNSPEC_VLD1 99
+#define UNSPEC_VLD2 102
+#define UNSPEC_VLD3 105
+#define UNSPEC_VLD4 110
+#define UNSPEC_VMOVL 125
+#define DOM_CC_X_AND_Y 0
+#define UNSPEC_VMOVN 126
+#define UNSPEC_VZIP1 203
+#define UNSPEC_VPSMAX 140
+#define UNSPEC_VPUMAX 142
+#define UNSPEC_VZIP2 204
+#define UNSPEC_PIC_OFFSET 23
+#define UNSPEC_VMLAL_LANE 120
+#define UNSPEC_VREV16 165
+#define UNSPEC_VSTRUCTDUMMY 191
+#define VUNSPEC_EPILOGUE 1
+#define UNSPEC_WMACS 13
+#define UNSPEC_VADDHN 73
+#define UNSPEC_WMACU 14
+#define UNSPEC_VTBL 196
+#define UNSPEC_VDUP_N 91
+#define UNSPEC_VMLSL_LANE 124
+#define VUNSPEC_BLOCKAGE 0
+#define VUNSPEC_WCMP_GT 14
+#define UNSPEC_VQSHRN_N 160
+#define UNSPEC_PIC_SYM 3
+#define UNSPEC_PIC_BASE 4
+#define UNSPEC_VTBX 197
+#define UNSPEC_VTST 200
+#define DOM_CC_NX_OR_Y 1
+#define UNSPEC_VQSHLU_N 159
+#define FPA_F0_REGNUM 16
+#define UNPSEC_COS 1
+#define UNSPEC_VRSQRTS 169
+#define UNSPEC_GOT_PREL_SYM 28
+#define UNSPEC_SYMBOL_OFFSET 27
+#define UNSPEC_PIC_LABEL 21
+#define UNSPEC_PRLG_STK 5
+#define VFPCC_REGNUM 127
+#define UNSPEC_VQMOVN 154
+#define UNSPEC_WMADDS 18
+#define UNSPEC_CLRDI 17
+#define UNSPEC_ASHIFT_SIGNED 65
+#define UNSPEC_VABA 67
+#define UNSPEC_VRECPE 163
+#define UNSPEC_VPADDL 137
+#define UNSPEC_VABD 69
+#define UNSPEC_VADD 72
+#define UNSPEC_VST3A 184
+#define VUNSPEC_TMRC 9
+#define UNSPEC_VCGE 82
+#define UNSPEC_VST3B 185
+#define UNSPEC_VUZP1 201
+#define UNSPEC_VST4A 188
+#define UNSPEC_VCOMBINE 87
+#define UNSPEC_WMADDU 19
+#define UNSPEC_VAND 76
+#define UNSPEC_VMLA 117
+#define UNSPEC_VUZP2 202
+#define UNSPEC_VST4B 189
+#define UNSPEC_VST1_LANE 180
+#define UNSPEC_ASHIFT_UNSIGNED 66
+#define UNSPEC_VST3_LANE 186
+#define UNSPEC_VST4_LANE 190
+#define UNSPEC_VMUL_LANE 129
+#define UNSPEC_VQDMLAL 146
+#define UNSPEC_PROLOGUE_USE 6
+#define DOM_CC_X_OR_Y 2
+#define UNSPEC_VCAGE 79
+#define UNSPEC_VMAX 115
+#define VUNSPEC_POOL_1 4
+#define UNSPEC_VQADD 145
+#define UNSPEC_VQDMULH_LANE 151
+#define UNSPEC_VSHLL_N 172
+#define UNSPEC_VMUL_N 131
+#define FPA_F7_REGNUM 23
+#define UNSPEC_WACC 9
+#define UNSPEC_VSLI 176
+#define VUNSPEC_POOL_2 5
+#define UNSPEC_TMOVMSK 10
+#define UNSPEC_VMIN 116
+#define UNSPEC_VABS 71
+#define UNSPEC_VGET_LANE 95
+#define UNSPEC_VSRI 178
+#define UNSPEC_VSHRN_N 175
+#define UNSPEC_VSUBL 194
+#define UNSPEC_VEOR 92
+#define UNSPEC_VCNT 86
+#define UNSPEC_VSET_LANE 170
+#define UNSPEC_VMUL 127
+#define CC_REGNUM 24
+
+#endif /* GCC_INSN_CONSTANTS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-flags.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-flags.h
new file mode 100644
index 0000000..e25dfc8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-flags.h
@@ -0,0 +1,3215 @@
+/* Generated automatically by the program `genflags'
+ from the machine description file `md'. */
+
+#ifndef GCC_INSN_FLAGS_H
+#define GCC_INSN_FLAGS_H
+
+#define HAVE_mulhisi3 (TARGET_DSP_MULTIPLY)
+#define HAVE_anddi3 (TARGET_32BIT && ! TARGET_IWMMXT)
+#define HAVE_insv_zero (arm_arch_thumb2)
+#define HAVE_insv_t2 (arm_arch_thumb2)
+#define HAVE_andsi_notsi_si (TARGET_32BIT)
+#define HAVE_bicsi3 (TARGET_THUMB1)
+#define HAVE_andsi_not_shiftsi_si (TARGET_ARM)
+#define HAVE_iordi3 (TARGET_32BIT && ! TARGET_IWMMXT)
+#define HAVE_xordi3 (TARGET_32BIT && !TARGET_IWMMXT)
+#define HAVE_arm_ashldi3_1bit (TARGET_32BIT)
+#define HAVE_arm_ashrdi3_1bit (TARGET_32BIT)
+#define HAVE_arm_lshrdi3_1bit (TARGET_32BIT)
+#define HAVE_extv (arm_arch_thumb2)
+#define HAVE_extzv_t2 (arm_arch_thumb2)
+#define HAVE_one_cmpldi2 (TARGET_32BIT)
+#define HAVE_thumb1_extendhisi2 (TARGET_THUMB1 && !arm_arch6)
+#define HAVE_pic_load_addr_32bit (TARGET_32BIT && flag_pic)
+#define HAVE_pic_load_addr_thumb1 (TARGET_THUMB1 && flag_pic)
+#define HAVE_pic_add_dot_plus_four (TARGET_THUMB)
+#define HAVE_pic_add_dot_plus_eight (TARGET_ARM)
+#define HAVE_tls_load_dot_plus_eight (TARGET_ARM)
+#define HAVE_movmem12b (TARGET_THUMB1)
+#define HAVE_movmem8b (TARGET_THUMB1)
+#define HAVE_cbranchsi4_scratch (TARGET_THUMB1)
+#define HAVE_cstoresi_nltu_thumb1 (TARGET_THUMB1)
+#define HAVE_thumb1_addsi3_addgeu (TARGET_THUMB1)
+#define HAVE_return (TARGET_ARM && USE_RETURN_INSN (FALSE))
+#define HAVE_blockage 1
+#define HAVE_arm_casesi_internal (TARGET_ARM)
+#define HAVE_nop 1
+#define HAVE_movcond (TARGET_ARM)
+#define HAVE_sibcall_epilogue (TARGET_32BIT)
+#define HAVE_stack_tie 1
+#define HAVE_align_4 1
+#define HAVE_align_8 1
+#define HAVE_consttable_end 1
+#define HAVE_consttable_1 (TARGET_THUMB1)
+#define HAVE_consttable_2 (TARGET_THUMB1)
+#define HAVE_consttable_4 1
+#define HAVE_consttable_8 1
+#define HAVE_consttable_16 1
+#define HAVE_clzsi2 (TARGET_32BIT && arm_arch5)
+#define HAVE_prefetch (TARGET_32BIT && arm_arch5e)
+#define HAVE_prologue_use 1
+#define HAVE_arm_eh_return (TARGET_ARM)
+#define HAVE_thumb_eh_return (TARGET_THUMB1)
+#define HAVE_load_tp_hard (TARGET_HARD_TP)
+#define HAVE_load_tp_soft (TARGET_SOFT_TP)
+#define HAVE_cirrus_adddi3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_subdi3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_muldi3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_ashldi3_cirrus (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_ashldi_const (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_ashiftrtdi_const (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_floatsisf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_floatsidf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_floatdisf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_floatdidf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_truncsfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_cirrus_truncdfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_iwmmxt_iordi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_xordi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_anddi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_nanddi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_movv2si_internal (TARGET_REALLY_IWMMXT)
+#define HAVE_movv4hi_internal (TARGET_REALLY_IWMMXT)
+#define HAVE_movv8qi_internal (TARGET_REALLY_IWMMXT)
+#define HAVE_ssaddv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ssaddv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ssaddv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_usaddv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_usaddv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_usaddv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_sssubv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_sssubv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_sssubv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ussubv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ussubv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ussubv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_smulv4hi3_highpart (TARGET_REALLY_IWMMXT)
+#define HAVE_umulv4hi3_highpart (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmacs (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmacsz (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmacu (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmacuz (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_clrdi (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_uavgrndv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_uavgrndv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_uavgv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_uavgv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_psadbw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tinsrb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tinsrh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tinsrw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_textrmub (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_textrmsb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_textrmuh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_textrmsh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_textrmw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wshufh (TARGET_REALLY_IWMMXT)
+#define HAVE_eqv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_eqv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_eqv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtuv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtuv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtuv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtv8qi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_gtv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackhss (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackwss (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackdss (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackhus (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackwus (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wpackdus (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckihb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckihh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckihw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckilb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckilh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckilw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehub (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehuh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehuw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehsb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehsh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckehsw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckelub (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckeluh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckeluw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckelsb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckelsh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wunpckelsw (TARGET_REALLY_IWMMXT)
+#define HAVE_rorv4hi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_rorv2si3 (TARGET_REALLY_IWMMXT)
+#define HAVE_rordi3 (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrv4hi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrv2si3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrdi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrv4hi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrv2si3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrdi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_ashlv4hi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_ashlv2si3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_ashldi3_iwmmxt (TARGET_REALLY_IWMMXT)
+#define HAVE_rorv4hi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_rorv2si3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_rordi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrv4hi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrv2si3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashrdi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrv4hi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrv2si3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_lshrdi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashlv4hi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashlv2si3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_ashldi3_di (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmadds (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wmaddu (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmia (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmiaph (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmiabb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmiatb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmiabt (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmiatt (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tbcstqi (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tbcsthi (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tbcstsi (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmovmskb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmovmskh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmovmskw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_waccb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wacch (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_waccw (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_walign (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmrc (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_tmcr (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wsadb (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wsadh (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wsadbz (TARGET_REALLY_IWMMXT)
+#define HAVE_iwmmxt_wsadhz (TARGET_REALLY_IWMMXT)
+#define HAVE_fixuns_truncsfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP)
+#define HAVE_fixuns_truncdfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP)
+#define HAVE_floatunssisf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP)
+#define HAVE_floatunssidf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP)
+#define HAVE_tls_load_dot_plus_four (TARGET_THUMB2)
+#define HAVE_thumb2_zero_extendqisi2_v6 (TARGET_THUMB2 && arm_arch6)
+#define HAVE_thumb2_casesi_internal (TARGET_THUMB2 && !flag_pic)
+#define HAVE_thumb2_casesi_internal_pic (TARGET_THUMB2 && flag_pic)
+#define HAVE_thumb2_eh_return (TARGET_THUMB2)
+#define HAVE_divsi3 (TARGET_THUMB2 && arm_arch_hwdiv)
+#define HAVE_udivsi3 (TARGET_THUMB2 && arm_arch_hwdiv)
+#define HAVE_vec_setv8qi_internal (TARGET_NEON)
+#define HAVE_vec_setv4hi_internal (TARGET_NEON)
+#define HAVE_vec_setv2si_internal (TARGET_NEON)
+#define HAVE_vec_setv2sf_internal (TARGET_NEON)
+#define HAVE_vec_setv16qi_internal (TARGET_NEON)
+#define HAVE_vec_setv8hi_internal (TARGET_NEON)
+#define HAVE_vec_setv4si_internal (TARGET_NEON)
+#define HAVE_vec_setv4sf_internal (TARGET_NEON)
+#define HAVE_vec_setv2di_internal (TARGET_NEON)
+#define HAVE_vec_extractv8qi (TARGET_NEON)
+#define HAVE_vec_extractv4hi (TARGET_NEON)
+#define HAVE_vec_extractv2si (TARGET_NEON)
+#define HAVE_vec_extractv2sf (TARGET_NEON)
+#define HAVE_vec_extractv16qi (TARGET_NEON)
+#define HAVE_vec_extractv8hi (TARGET_NEON)
+#define HAVE_vec_extractv4si (TARGET_NEON)
+#define HAVE_vec_extractv4sf (TARGET_NEON)
+#define HAVE_vec_extractv2di (TARGET_NEON)
+#define HAVE_iorv8qi3 (TARGET_NEON)
+#define HAVE_iorv16qi3 (TARGET_NEON)
+#define HAVE_iorv4hi3 (TARGET_NEON)
+#define HAVE_iorv8hi3 (TARGET_NEON)
+#define HAVE_iorv2si3 (TARGET_NEON)
+#define HAVE_iorv4si3 (TARGET_NEON)
+#define HAVE_iorv2sf3 (TARGET_NEON)
+#define HAVE_iorv4sf3 (TARGET_NEON)
+#define HAVE_iorv2di3 (TARGET_NEON)
+#define HAVE_iordi3_neon (TARGET_NEON)
+#define HAVE_andv8qi3 (TARGET_NEON)
+#define HAVE_andv16qi3 (TARGET_NEON)
+#define HAVE_andv4hi3 (TARGET_NEON)
+#define HAVE_andv8hi3 (TARGET_NEON)
+#define HAVE_andv2si3 (TARGET_NEON)
+#define HAVE_andv4si3 (TARGET_NEON)
+#define HAVE_andv2sf3 (TARGET_NEON)
+#define HAVE_andv4sf3 (TARGET_NEON)
+#define HAVE_andv2di3 (TARGET_NEON)
+#define HAVE_anddi3_neon (TARGET_NEON)
+#define HAVE_ornv8qi3_neon (TARGET_NEON)
+#define HAVE_ornv16qi3_neon (TARGET_NEON)
+#define HAVE_ornv4hi3_neon (TARGET_NEON)
+#define HAVE_ornv8hi3_neon (TARGET_NEON)
+#define HAVE_ornv2si3_neon (TARGET_NEON)
+#define HAVE_ornv4si3_neon (TARGET_NEON)
+#define HAVE_ornv2sf3_neon (TARGET_NEON)
+#define HAVE_ornv4sf3_neon (TARGET_NEON)
+#define HAVE_ornv2di3_neon (TARGET_NEON)
+#define HAVE_orndi3_neon (TARGET_NEON)
+#define HAVE_bicv8qi3_neon (TARGET_NEON)
+#define HAVE_bicv16qi3_neon (TARGET_NEON)
+#define HAVE_bicv4hi3_neon (TARGET_NEON)
+#define HAVE_bicv8hi3_neon (TARGET_NEON)
+#define HAVE_bicv2si3_neon (TARGET_NEON)
+#define HAVE_bicv4si3_neon (TARGET_NEON)
+#define HAVE_bicv2sf3_neon (TARGET_NEON)
+#define HAVE_bicv4sf3_neon (TARGET_NEON)
+#define HAVE_bicv2di3_neon (TARGET_NEON)
+#define HAVE_bicdi3_neon (TARGET_NEON)
+#define HAVE_xorv8qi3 (TARGET_NEON)
+#define HAVE_xorv16qi3 (TARGET_NEON)
+#define HAVE_xorv4hi3 (TARGET_NEON)
+#define HAVE_xorv8hi3 (TARGET_NEON)
+#define HAVE_xorv2si3 (TARGET_NEON)
+#define HAVE_xorv4si3 (TARGET_NEON)
+#define HAVE_xorv2sf3 (TARGET_NEON)
+#define HAVE_xorv4sf3 (TARGET_NEON)
+#define HAVE_xorv2di3 (TARGET_NEON)
+#define HAVE_xordi3_neon (TARGET_NEON)
+#define HAVE_one_cmplv8qi2 (TARGET_NEON)
+#define HAVE_one_cmplv16qi2 (TARGET_NEON)
+#define HAVE_one_cmplv4hi2 (TARGET_NEON)
+#define HAVE_one_cmplv8hi2 (TARGET_NEON)
+#define HAVE_one_cmplv2si2 (TARGET_NEON)
+#define HAVE_one_cmplv4si2 (TARGET_NEON)
+#define HAVE_one_cmplv2sf2 (TARGET_NEON)
+#define HAVE_one_cmplv4sf2 (TARGET_NEON)
+#define HAVE_one_cmplv2di2 (TARGET_NEON)
+#define HAVE_absv8qi2 (TARGET_NEON)
+#define HAVE_absv16qi2 (TARGET_NEON)
+#define HAVE_absv4hi2 (TARGET_NEON)
+#define HAVE_absv8hi2 (TARGET_NEON)
+#define HAVE_absv2si2 (TARGET_NEON)
+#define HAVE_absv4si2 (TARGET_NEON)
+#define HAVE_absv2sf2 (TARGET_NEON)
+#define HAVE_absv4sf2 (TARGET_NEON)
+#define HAVE_negv8qi2 (TARGET_NEON)
+#define HAVE_negv16qi2 (TARGET_NEON)
+#define HAVE_negv4hi2 (TARGET_NEON)
+#define HAVE_negv8hi2 (TARGET_NEON)
+#define HAVE_negv2si2 (TARGET_NEON)
+#define HAVE_negv4si2 (TARGET_NEON)
+#define HAVE_negv2sf2 (TARGET_NEON)
+#define HAVE_negv4sf2 (TARGET_NEON)
+#define HAVE_ashlv8qi3 (TARGET_NEON)
+#define HAVE_ashlv16qi3 (TARGET_NEON)
+#define HAVE_ashlv4hi3 (TARGET_NEON)
+#define HAVE_ashlv8hi3 (TARGET_NEON)
+#define HAVE_ashlv2si3 (TARGET_NEON)
+#define HAVE_ashlv4si3 (TARGET_NEON)
+#define HAVE_ashlv8qi3_signed (TARGET_NEON)
+#define HAVE_ashlv16qi3_signed (TARGET_NEON)
+#define HAVE_ashlv4hi3_signed (TARGET_NEON)
+#define HAVE_ashlv8hi3_signed (TARGET_NEON)
+#define HAVE_ashlv2si3_signed (TARGET_NEON)
+#define HAVE_ashlv4si3_signed (TARGET_NEON)
+#define HAVE_ashlv2di3_signed (TARGET_NEON)
+#define HAVE_ashlv8qi3_unsigned (TARGET_NEON)
+#define HAVE_ashlv16qi3_unsigned (TARGET_NEON)
+#define HAVE_ashlv4hi3_unsigned (TARGET_NEON)
+#define HAVE_ashlv8hi3_unsigned (TARGET_NEON)
+#define HAVE_ashlv2si3_unsigned (TARGET_NEON)
+#define HAVE_ashlv4si3_unsigned (TARGET_NEON)
+#define HAVE_ashlv2di3_unsigned (TARGET_NEON)
+#define HAVE_widen_ssumv8qi3 (TARGET_NEON)
+#define HAVE_widen_ssumv4hi3 (TARGET_NEON)
+#define HAVE_widen_ssumv2si3 (TARGET_NEON)
+#define HAVE_widen_usumv8qi3 (TARGET_NEON)
+#define HAVE_widen_usumv4hi3 (TARGET_NEON)
+#define HAVE_widen_usumv2si3 (TARGET_NEON)
+#define HAVE_quad_halves_plusv4si (TARGET_NEON)
+#define HAVE_quad_halves_sminv4si (TARGET_NEON)
+#define HAVE_quad_halves_smaxv4si (TARGET_NEON)
+#define HAVE_quad_halves_uminv4si (TARGET_NEON)
+#define HAVE_quad_halves_umaxv4si (TARGET_NEON)
+#define HAVE_quad_halves_plusv4sf (TARGET_NEON)
+#define HAVE_quad_halves_sminv4sf (TARGET_NEON)
+#define HAVE_quad_halves_smaxv4sf (TARGET_NEON)
+#define HAVE_quad_halves_plusv8hi (TARGET_NEON)
+#define HAVE_quad_halves_sminv8hi (TARGET_NEON)
+#define HAVE_quad_halves_smaxv8hi (TARGET_NEON)
+#define HAVE_quad_halves_uminv8hi (TARGET_NEON)
+#define HAVE_quad_halves_umaxv8hi (TARGET_NEON)
+#define HAVE_quad_halves_plusv16qi (TARGET_NEON)
+#define HAVE_quad_halves_sminv16qi (TARGET_NEON)
+#define HAVE_quad_halves_smaxv16qi (TARGET_NEON)
+#define HAVE_quad_halves_uminv16qi (TARGET_NEON)
+#define HAVE_quad_halves_umaxv16qi (TARGET_NEON)
+#define HAVE_move_lo_quad_v4si (TARGET_NEON)
+#define HAVE_move_lo_quad_v4sf (TARGET_NEON)
+#define HAVE_move_lo_quad_v8hi (TARGET_NEON)
+#define HAVE_move_lo_quad_v16qi (TARGET_NEON)
+#define HAVE_reduc_splus_v2di (TARGET_NEON)
+#define HAVE_neon_vpadd_internalv8qi (TARGET_NEON)
+#define HAVE_neon_vpadd_internalv4hi (TARGET_NEON)
+#define HAVE_neon_vpadd_internalv2si (TARGET_NEON)
+#define HAVE_neon_vpadd_internalv2sf (TARGET_NEON)
+#define HAVE_neon_vpsminv8qi (TARGET_NEON)
+#define HAVE_neon_vpsminv4hi (TARGET_NEON)
+#define HAVE_neon_vpsminv2si (TARGET_NEON)
+#define HAVE_neon_vpsminv2sf (TARGET_NEON)
+#define HAVE_neon_vpsmaxv8qi (TARGET_NEON)
+#define HAVE_neon_vpsmaxv4hi (TARGET_NEON)
+#define HAVE_neon_vpsmaxv2si (TARGET_NEON)
+#define HAVE_neon_vpsmaxv2sf (TARGET_NEON)
+#define HAVE_neon_vpuminv8qi (TARGET_NEON)
+#define HAVE_neon_vpuminv4hi (TARGET_NEON)
+#define HAVE_neon_vpuminv2si (TARGET_NEON)
+#define HAVE_neon_vpumaxv8qi (TARGET_NEON)
+#define HAVE_neon_vpumaxv4hi (TARGET_NEON)
+#define HAVE_neon_vpumaxv2si (TARGET_NEON)
+#define HAVE_neon_vaddv8qi (TARGET_NEON)
+#define HAVE_neon_vaddv16qi (TARGET_NEON)
+#define HAVE_neon_vaddv4hi (TARGET_NEON)
+#define HAVE_neon_vaddv8hi (TARGET_NEON)
+#define HAVE_neon_vaddv2si (TARGET_NEON)
+#define HAVE_neon_vaddv4si (TARGET_NEON)
+#define HAVE_neon_vaddv2sf (TARGET_NEON)
+#define HAVE_neon_vaddv4sf (TARGET_NEON)
+#define HAVE_neon_vadddi (TARGET_NEON)
+#define HAVE_neon_vaddv2di (TARGET_NEON)
+#define HAVE_neon_vaddlv8qi (TARGET_NEON)
+#define HAVE_neon_vaddlv4hi (TARGET_NEON)
+#define HAVE_neon_vaddlv2si (TARGET_NEON)
+#define HAVE_neon_vaddwv8qi (TARGET_NEON)
+#define HAVE_neon_vaddwv4hi (TARGET_NEON)
+#define HAVE_neon_vaddwv2si (TARGET_NEON)
+#define HAVE_neon_vhaddv8qi (TARGET_NEON)
+#define HAVE_neon_vhaddv16qi (TARGET_NEON)
+#define HAVE_neon_vhaddv4hi (TARGET_NEON)
+#define HAVE_neon_vhaddv8hi (TARGET_NEON)
+#define HAVE_neon_vhaddv2si (TARGET_NEON)
+#define HAVE_neon_vhaddv4si (TARGET_NEON)
+#define HAVE_neon_vqaddv8qi (TARGET_NEON)
+#define HAVE_neon_vqaddv16qi (TARGET_NEON)
+#define HAVE_neon_vqaddv4hi (TARGET_NEON)
+#define HAVE_neon_vqaddv8hi (TARGET_NEON)
+#define HAVE_neon_vqaddv2si (TARGET_NEON)
+#define HAVE_neon_vqaddv4si (TARGET_NEON)
+#define HAVE_neon_vqadddi (TARGET_NEON)
+#define HAVE_neon_vqaddv2di (TARGET_NEON)
+#define HAVE_neon_vaddhnv8hi (TARGET_NEON)
+#define HAVE_neon_vaddhnv4si (TARGET_NEON)
+#define HAVE_neon_vaddhnv2di (TARGET_NEON)
+#define HAVE_neon_vmulv8qi (TARGET_NEON)
+#define HAVE_neon_vmulv16qi (TARGET_NEON)
+#define HAVE_neon_vmulv4hi (TARGET_NEON)
+#define HAVE_neon_vmulv8hi (TARGET_NEON)
+#define HAVE_neon_vmulv2si (TARGET_NEON)
+#define HAVE_neon_vmulv4si (TARGET_NEON)
+#define HAVE_neon_vmulv2sf (TARGET_NEON)
+#define HAVE_neon_vmulv4sf (TARGET_NEON)
+#define HAVE_neon_vmlav8qi (TARGET_NEON)
+#define HAVE_neon_vmlav16qi (TARGET_NEON)
+#define HAVE_neon_vmlav4hi (TARGET_NEON)
+#define HAVE_neon_vmlav8hi (TARGET_NEON)
+#define HAVE_neon_vmlav2si (TARGET_NEON)
+#define HAVE_neon_vmlav4si (TARGET_NEON)
+#define HAVE_neon_vmlav2sf (TARGET_NEON)
+#define HAVE_neon_vmlav4sf (TARGET_NEON)
+#define HAVE_neon_vmlalv8qi (TARGET_NEON)
+#define HAVE_neon_vmlalv4hi (TARGET_NEON)
+#define HAVE_neon_vmlalv2si (TARGET_NEON)
+#define HAVE_neon_vmlsv8qi (TARGET_NEON)
+#define HAVE_neon_vmlsv16qi (TARGET_NEON)
+#define HAVE_neon_vmlsv4hi (TARGET_NEON)
+#define HAVE_neon_vmlsv8hi (TARGET_NEON)
+#define HAVE_neon_vmlsv2si (TARGET_NEON)
+#define HAVE_neon_vmlsv4si (TARGET_NEON)
+#define HAVE_neon_vmlsv2sf (TARGET_NEON)
+#define HAVE_neon_vmlsv4sf (TARGET_NEON)
+#define HAVE_neon_vmlslv8qi (TARGET_NEON)
+#define HAVE_neon_vmlslv4hi (TARGET_NEON)
+#define HAVE_neon_vmlslv2si (TARGET_NEON)
+#define HAVE_neon_vqdmulhv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmulhv2si (TARGET_NEON)
+#define HAVE_neon_vqdmulhv8hi (TARGET_NEON)
+#define HAVE_neon_vqdmulhv4si (TARGET_NEON)
+#define HAVE_neon_vqdmlalv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlalv2si (TARGET_NEON)
+#define HAVE_neon_vqdmlslv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlslv2si (TARGET_NEON)
+#define HAVE_neon_vmullv8qi (TARGET_NEON)
+#define HAVE_neon_vmullv4hi (TARGET_NEON)
+#define HAVE_neon_vmullv2si (TARGET_NEON)
+#define HAVE_neon_vqdmullv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmullv2si (TARGET_NEON)
+#define HAVE_neon_vsubv8qi (TARGET_NEON)
+#define HAVE_neon_vsubv16qi (TARGET_NEON)
+#define HAVE_neon_vsubv4hi (TARGET_NEON)
+#define HAVE_neon_vsubv8hi (TARGET_NEON)
+#define HAVE_neon_vsubv2si (TARGET_NEON)
+#define HAVE_neon_vsubv4si (TARGET_NEON)
+#define HAVE_neon_vsubv2sf (TARGET_NEON)
+#define HAVE_neon_vsubv4sf (TARGET_NEON)
+#define HAVE_neon_vsubdi (TARGET_NEON)
+#define HAVE_neon_vsubv2di (TARGET_NEON)
+#define HAVE_neon_vsublv8qi (TARGET_NEON)
+#define HAVE_neon_vsublv4hi (TARGET_NEON)
+#define HAVE_neon_vsublv2si (TARGET_NEON)
+#define HAVE_neon_vsubwv8qi (TARGET_NEON)
+#define HAVE_neon_vsubwv4hi (TARGET_NEON)
+#define HAVE_neon_vsubwv2si (TARGET_NEON)
+#define HAVE_neon_vqsubv8qi (TARGET_NEON)
+#define HAVE_neon_vqsubv16qi (TARGET_NEON)
+#define HAVE_neon_vqsubv4hi (TARGET_NEON)
+#define HAVE_neon_vqsubv8hi (TARGET_NEON)
+#define HAVE_neon_vqsubv2si (TARGET_NEON)
+#define HAVE_neon_vqsubv4si (TARGET_NEON)
+#define HAVE_neon_vqsubdi (TARGET_NEON)
+#define HAVE_neon_vqsubv2di (TARGET_NEON)
+#define HAVE_neon_vhsubv8qi (TARGET_NEON)
+#define HAVE_neon_vhsubv16qi (TARGET_NEON)
+#define HAVE_neon_vhsubv4hi (TARGET_NEON)
+#define HAVE_neon_vhsubv8hi (TARGET_NEON)
+#define HAVE_neon_vhsubv2si (TARGET_NEON)
+#define HAVE_neon_vhsubv4si (TARGET_NEON)
+#define HAVE_neon_vsubhnv8hi (TARGET_NEON)
+#define HAVE_neon_vsubhnv4si (TARGET_NEON)
+#define HAVE_neon_vsubhnv2di (TARGET_NEON)
+#define HAVE_neon_vceqv8qi (TARGET_NEON)
+#define HAVE_neon_vceqv16qi (TARGET_NEON)
+#define HAVE_neon_vceqv4hi (TARGET_NEON)
+#define HAVE_neon_vceqv8hi (TARGET_NEON)
+#define HAVE_neon_vceqv2si (TARGET_NEON)
+#define HAVE_neon_vceqv4si (TARGET_NEON)
+#define HAVE_neon_vceqv2sf (TARGET_NEON)
+#define HAVE_neon_vceqv4sf (TARGET_NEON)
+#define HAVE_neon_vcgev8qi (TARGET_NEON)
+#define HAVE_neon_vcgev16qi (TARGET_NEON)
+#define HAVE_neon_vcgev4hi (TARGET_NEON)
+#define HAVE_neon_vcgev8hi (TARGET_NEON)
+#define HAVE_neon_vcgev2si (TARGET_NEON)
+#define HAVE_neon_vcgev4si (TARGET_NEON)
+#define HAVE_neon_vcgev2sf (TARGET_NEON)
+#define HAVE_neon_vcgev4sf (TARGET_NEON)
+#define HAVE_neon_vcgtv8qi (TARGET_NEON)
+#define HAVE_neon_vcgtv16qi (TARGET_NEON)
+#define HAVE_neon_vcgtv4hi (TARGET_NEON)
+#define HAVE_neon_vcgtv8hi (TARGET_NEON)
+#define HAVE_neon_vcgtv2si (TARGET_NEON)
+#define HAVE_neon_vcgtv4si (TARGET_NEON)
+#define HAVE_neon_vcgtv2sf (TARGET_NEON)
+#define HAVE_neon_vcgtv4sf (TARGET_NEON)
+#define HAVE_neon_vcagev2sf (TARGET_NEON)
+#define HAVE_neon_vcagev4sf (TARGET_NEON)
+#define HAVE_neon_vcagtv2sf (TARGET_NEON)
+#define HAVE_neon_vcagtv4sf (TARGET_NEON)
+#define HAVE_neon_vtstv8qi (TARGET_NEON)
+#define HAVE_neon_vtstv16qi (TARGET_NEON)
+#define HAVE_neon_vtstv4hi (TARGET_NEON)
+#define HAVE_neon_vtstv8hi (TARGET_NEON)
+#define HAVE_neon_vtstv2si (TARGET_NEON)
+#define HAVE_neon_vtstv4si (TARGET_NEON)
+#define HAVE_neon_vabdv8qi (TARGET_NEON)
+#define HAVE_neon_vabdv16qi (TARGET_NEON)
+#define HAVE_neon_vabdv4hi (TARGET_NEON)
+#define HAVE_neon_vabdv8hi (TARGET_NEON)
+#define HAVE_neon_vabdv2si (TARGET_NEON)
+#define HAVE_neon_vabdv4si (TARGET_NEON)
+#define HAVE_neon_vabdv2sf (TARGET_NEON)
+#define HAVE_neon_vabdv4sf (TARGET_NEON)
+#define HAVE_neon_vabdlv8qi (TARGET_NEON)
+#define HAVE_neon_vabdlv4hi (TARGET_NEON)
+#define HAVE_neon_vabdlv2si (TARGET_NEON)
+#define HAVE_neon_vabav8qi (TARGET_NEON)
+#define HAVE_neon_vabav16qi (TARGET_NEON)
+#define HAVE_neon_vabav4hi (TARGET_NEON)
+#define HAVE_neon_vabav8hi (TARGET_NEON)
+#define HAVE_neon_vabav2si (TARGET_NEON)
+#define HAVE_neon_vabav4si (TARGET_NEON)
+#define HAVE_neon_vabalv8qi (TARGET_NEON)
+#define HAVE_neon_vabalv4hi (TARGET_NEON)
+#define HAVE_neon_vabalv2si (TARGET_NEON)
+#define HAVE_neon_vmaxv8qi (TARGET_NEON)
+#define HAVE_neon_vmaxv16qi (TARGET_NEON)
+#define HAVE_neon_vmaxv4hi (TARGET_NEON)
+#define HAVE_neon_vmaxv8hi (TARGET_NEON)
+#define HAVE_neon_vmaxv2si (TARGET_NEON)
+#define HAVE_neon_vmaxv4si (TARGET_NEON)
+#define HAVE_neon_vmaxv2sf (TARGET_NEON)
+#define HAVE_neon_vmaxv4sf (TARGET_NEON)
+#define HAVE_neon_vminv8qi (TARGET_NEON)
+#define HAVE_neon_vminv16qi (TARGET_NEON)
+#define HAVE_neon_vminv4hi (TARGET_NEON)
+#define HAVE_neon_vminv8hi (TARGET_NEON)
+#define HAVE_neon_vminv2si (TARGET_NEON)
+#define HAVE_neon_vminv4si (TARGET_NEON)
+#define HAVE_neon_vminv2sf (TARGET_NEON)
+#define HAVE_neon_vminv4sf (TARGET_NEON)
+#define HAVE_neon_vpaddlv8qi (TARGET_NEON)
+#define HAVE_neon_vpaddlv16qi (TARGET_NEON)
+#define HAVE_neon_vpaddlv4hi (TARGET_NEON)
+#define HAVE_neon_vpaddlv8hi (TARGET_NEON)
+#define HAVE_neon_vpaddlv2si (TARGET_NEON)
+#define HAVE_neon_vpaddlv4si (TARGET_NEON)
+#define HAVE_neon_vpadalv8qi (TARGET_NEON)
+#define HAVE_neon_vpadalv16qi (TARGET_NEON)
+#define HAVE_neon_vpadalv4hi (TARGET_NEON)
+#define HAVE_neon_vpadalv8hi (TARGET_NEON)
+#define HAVE_neon_vpadalv2si (TARGET_NEON)
+#define HAVE_neon_vpadalv4si (TARGET_NEON)
+#define HAVE_neon_vpmaxv8qi (TARGET_NEON)
+#define HAVE_neon_vpmaxv4hi (TARGET_NEON)
+#define HAVE_neon_vpmaxv2si (TARGET_NEON)
+#define HAVE_neon_vpmaxv2sf (TARGET_NEON)
+#define HAVE_neon_vpminv8qi (TARGET_NEON)
+#define HAVE_neon_vpminv4hi (TARGET_NEON)
+#define HAVE_neon_vpminv2si (TARGET_NEON)
+#define HAVE_neon_vpminv2sf (TARGET_NEON)
+#define HAVE_neon_vrecpsv2sf (TARGET_NEON)
+#define HAVE_neon_vrecpsv4sf (TARGET_NEON)
+#define HAVE_neon_vrsqrtsv2sf (TARGET_NEON)
+#define HAVE_neon_vrsqrtsv4sf (TARGET_NEON)
+#define HAVE_neon_vabsv8qi (TARGET_NEON)
+#define HAVE_neon_vabsv16qi (TARGET_NEON)
+#define HAVE_neon_vabsv4hi (TARGET_NEON)
+#define HAVE_neon_vabsv8hi (TARGET_NEON)
+#define HAVE_neon_vabsv2si (TARGET_NEON)
+#define HAVE_neon_vabsv4si (TARGET_NEON)
+#define HAVE_neon_vabsv2sf (TARGET_NEON)
+#define HAVE_neon_vabsv4sf (TARGET_NEON)
+#define HAVE_neon_vqabsv8qi (TARGET_NEON)
+#define HAVE_neon_vqabsv16qi (TARGET_NEON)
+#define HAVE_neon_vqabsv4hi (TARGET_NEON)
+#define HAVE_neon_vqabsv8hi (TARGET_NEON)
+#define HAVE_neon_vqabsv2si (TARGET_NEON)
+#define HAVE_neon_vqabsv4si (TARGET_NEON)
+#define HAVE_neon_vqnegv8qi (TARGET_NEON)
+#define HAVE_neon_vqnegv16qi (TARGET_NEON)
+#define HAVE_neon_vqnegv4hi (TARGET_NEON)
+#define HAVE_neon_vqnegv8hi (TARGET_NEON)
+#define HAVE_neon_vqnegv2si (TARGET_NEON)
+#define HAVE_neon_vqnegv4si (TARGET_NEON)
+#define HAVE_neon_vclsv8qi (TARGET_NEON)
+#define HAVE_neon_vclsv16qi (TARGET_NEON)
+#define HAVE_neon_vclsv4hi (TARGET_NEON)
+#define HAVE_neon_vclsv8hi (TARGET_NEON)
+#define HAVE_neon_vclsv2si (TARGET_NEON)
+#define HAVE_neon_vclsv4si (TARGET_NEON)
+#define HAVE_neon_vclzv8qi (TARGET_NEON)
+#define HAVE_neon_vclzv16qi (TARGET_NEON)
+#define HAVE_neon_vclzv4hi (TARGET_NEON)
+#define HAVE_neon_vclzv8hi (TARGET_NEON)
+#define HAVE_neon_vclzv2si (TARGET_NEON)
+#define HAVE_neon_vclzv4si (TARGET_NEON)
+#define HAVE_neon_vcntv8qi (TARGET_NEON)
+#define HAVE_neon_vcntv16qi (TARGET_NEON)
+#define HAVE_neon_vrecpev2si (TARGET_NEON)
+#define HAVE_neon_vrecpev2sf (TARGET_NEON)
+#define HAVE_neon_vrecpev4si (TARGET_NEON)
+#define HAVE_neon_vrecpev4sf (TARGET_NEON)
+#define HAVE_neon_vrsqrtev2si (TARGET_NEON)
+#define HAVE_neon_vrsqrtev2sf (TARGET_NEON)
+#define HAVE_neon_vrsqrtev4si (TARGET_NEON)
+#define HAVE_neon_vrsqrtev4sf (TARGET_NEON)
+#define HAVE_neon_vget_lanev8qi_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4hi_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev2si_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev2sf_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev8qi_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4hi_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev2si_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev2sf_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev16qi_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev8hi_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4si_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4sf_sext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev16qi_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev8hi_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4si_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanev4sf_zext_internal (TARGET_NEON)
+#define HAVE_neon_vget_lanedi (TARGET_NEON)
+#define HAVE_neon_vget_lanev2di (TARGET_NEON)
+#define HAVE_neon_vset_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vset_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vset_lanev2si (TARGET_NEON)
+#define HAVE_neon_vset_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vset_lanedi (TARGET_NEON)
+#define HAVE_neon_vset_lanev16qi (TARGET_NEON)
+#define HAVE_neon_vset_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vset_lanev4si (TARGET_NEON)
+#define HAVE_neon_vset_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vset_lanev2di (TARGET_NEON)
+#define HAVE_neon_vdup_nv8qi (TARGET_NEON)
+#define HAVE_neon_vdup_nv16qi (TARGET_NEON)
+#define HAVE_neon_vdup_nv4hi (TARGET_NEON)
+#define HAVE_neon_vdup_nv8hi (TARGET_NEON)
+#define HAVE_neon_vdup_nv2si (TARGET_NEON)
+#define HAVE_neon_vdup_nv4si (TARGET_NEON)
+#define HAVE_neon_vdup_nv2sf (TARGET_NEON)
+#define HAVE_neon_vdup_nv4sf (TARGET_NEON)
+#define HAVE_neon_vdup_ndi (TARGET_NEON)
+#define HAVE_neon_vdup_nv2di (TARGET_NEON)
+#define HAVE_neon_vdup_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vdup_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vdup_lanev2si (TARGET_NEON)
+#define HAVE_neon_vdup_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vdup_lanev16qi (TARGET_NEON)
+#define HAVE_neon_vdup_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vdup_lanev4si (TARGET_NEON)
+#define HAVE_neon_vdup_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vdup_lanev2di (TARGET_NEON)
+#define HAVE_neon_vcombinev8qi (TARGET_NEON)
+#define HAVE_neon_vcombinev4hi (TARGET_NEON)
+#define HAVE_neon_vcombinev2si (TARGET_NEON)
+#define HAVE_neon_vcombinev2sf (TARGET_NEON)
+#define HAVE_neon_vcombinedi (TARGET_NEON)
+#define HAVE_neon_vget_highv16qi (TARGET_NEON)
+#define HAVE_neon_vget_highv8hi (TARGET_NEON)
+#define HAVE_neon_vget_highv4si (TARGET_NEON)
+#define HAVE_neon_vget_highv4sf (TARGET_NEON)
+#define HAVE_neon_vget_highv2di (TARGET_NEON)
+#define HAVE_neon_vget_lowv16qi (TARGET_NEON)
+#define HAVE_neon_vget_lowv8hi (TARGET_NEON)
+#define HAVE_neon_vget_lowv4si (TARGET_NEON)
+#define HAVE_neon_vget_lowv4sf (TARGET_NEON)
+#define HAVE_neon_vget_lowv2di (TARGET_NEON)
+#define HAVE_neon_vcvtv2sf (TARGET_NEON)
+#define HAVE_neon_vcvtv4sf (TARGET_NEON)
+#define HAVE_neon_vcvtv2si (TARGET_NEON)
+#define HAVE_neon_vcvtv4si (TARGET_NEON)
+#define HAVE_neon_vcvt_nv2sf (TARGET_NEON)
+#define HAVE_neon_vcvt_nv4sf (TARGET_NEON)
+#define HAVE_neon_vcvt_nv2si (TARGET_NEON)
+#define HAVE_neon_vcvt_nv4si (TARGET_NEON)
+#define HAVE_neon_vmovnv8hi (TARGET_NEON)
+#define HAVE_neon_vmovnv4si (TARGET_NEON)
+#define HAVE_neon_vmovnv2di (TARGET_NEON)
+#define HAVE_neon_vqmovnv8hi (TARGET_NEON)
+#define HAVE_neon_vqmovnv4si (TARGET_NEON)
+#define HAVE_neon_vqmovnv2di (TARGET_NEON)
+#define HAVE_neon_vqmovunv8hi (TARGET_NEON)
+#define HAVE_neon_vqmovunv4si (TARGET_NEON)
+#define HAVE_neon_vqmovunv2di (TARGET_NEON)
+#define HAVE_neon_vmovlv8qi (TARGET_NEON)
+#define HAVE_neon_vmovlv4hi (TARGET_NEON)
+#define HAVE_neon_vmovlv2si (TARGET_NEON)
+#define HAVE_neon_vmul_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmul_lanev2si (TARGET_NEON)
+#define HAVE_neon_vmul_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vmul_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vmul_lanev4si (TARGET_NEON)
+#define HAVE_neon_vmul_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vmull_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmull_lanev2si (TARGET_NEON)
+#define HAVE_neon_vqdmull_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vqdmull_lanev2si (TARGET_NEON)
+#define HAVE_neon_vqdmulh_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vqdmulh_lanev4si (TARGET_NEON)
+#define HAVE_neon_vqdmulh_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vqdmulh_lanev2si (TARGET_NEON)
+#define HAVE_neon_vmla_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmla_lanev2si (TARGET_NEON)
+#define HAVE_neon_vmla_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vmla_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vmla_lanev4si (TARGET_NEON)
+#define HAVE_neon_vmla_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vmlal_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmlal_lanev2si (TARGET_NEON)
+#define HAVE_neon_vqdmlal_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlal_lanev2si (TARGET_NEON)
+#define HAVE_neon_vmls_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmls_lanev2si (TARGET_NEON)
+#define HAVE_neon_vmls_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vmls_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vmls_lanev4si (TARGET_NEON)
+#define HAVE_neon_vmls_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vmlsl_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vmlsl_lanev2si (TARGET_NEON)
+#define HAVE_neon_vqdmlsl_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlsl_lanev2si (TARGET_NEON)
+#define HAVE_neon_vextv8qi (TARGET_NEON)
+#define HAVE_neon_vextv16qi (TARGET_NEON)
+#define HAVE_neon_vextv4hi (TARGET_NEON)
+#define HAVE_neon_vextv8hi (TARGET_NEON)
+#define HAVE_neon_vextv2si (TARGET_NEON)
+#define HAVE_neon_vextv4si (TARGET_NEON)
+#define HAVE_neon_vextv2sf (TARGET_NEON)
+#define HAVE_neon_vextv4sf (TARGET_NEON)
+#define HAVE_neon_vextdi (TARGET_NEON)
+#define HAVE_neon_vextv2di (TARGET_NEON)
+#define HAVE_neon_vrev64v8qi (TARGET_NEON)
+#define HAVE_neon_vrev64v16qi (TARGET_NEON)
+#define HAVE_neon_vrev64v4hi (TARGET_NEON)
+#define HAVE_neon_vrev64v8hi (TARGET_NEON)
+#define HAVE_neon_vrev64v2si (TARGET_NEON)
+#define HAVE_neon_vrev64v4si (TARGET_NEON)
+#define HAVE_neon_vrev64v2sf (TARGET_NEON)
+#define HAVE_neon_vrev64v4sf (TARGET_NEON)
+#define HAVE_neon_vrev64v2di (TARGET_NEON)
+#define HAVE_neon_vrev32v8qi (TARGET_NEON)
+#define HAVE_neon_vrev32v4hi (TARGET_NEON)
+#define HAVE_neon_vrev32v16qi (TARGET_NEON)
+#define HAVE_neon_vrev32v8hi (TARGET_NEON)
+#define HAVE_neon_vrev16v8qi (TARGET_NEON)
+#define HAVE_neon_vrev16v16qi (TARGET_NEON)
+#define HAVE_neon_vbslv8qi_internal (TARGET_NEON)
+#define HAVE_neon_vbslv16qi_internal (TARGET_NEON)
+#define HAVE_neon_vbslv4hi_internal (TARGET_NEON)
+#define HAVE_neon_vbslv8hi_internal (TARGET_NEON)
+#define HAVE_neon_vbslv2si_internal (TARGET_NEON)
+#define HAVE_neon_vbslv4si_internal (TARGET_NEON)
+#define HAVE_neon_vbslv2sf_internal (TARGET_NEON)
+#define HAVE_neon_vbslv4sf_internal (TARGET_NEON)
+#define HAVE_neon_vbsldi_internal (TARGET_NEON)
+#define HAVE_neon_vbslv2di_internal (TARGET_NEON)
+#define HAVE_neon_vshlv8qi (TARGET_NEON)
+#define HAVE_neon_vshlv16qi (TARGET_NEON)
+#define HAVE_neon_vshlv4hi (TARGET_NEON)
+#define HAVE_neon_vshlv8hi (TARGET_NEON)
+#define HAVE_neon_vshlv2si (TARGET_NEON)
+#define HAVE_neon_vshlv4si (TARGET_NEON)
+#define HAVE_neon_vshldi (TARGET_NEON)
+#define HAVE_neon_vshlv2di (TARGET_NEON)
+#define HAVE_neon_vqshlv8qi (TARGET_NEON)
+#define HAVE_neon_vqshlv16qi (TARGET_NEON)
+#define HAVE_neon_vqshlv4hi (TARGET_NEON)
+#define HAVE_neon_vqshlv8hi (TARGET_NEON)
+#define HAVE_neon_vqshlv2si (TARGET_NEON)
+#define HAVE_neon_vqshlv4si (TARGET_NEON)
+#define HAVE_neon_vqshldi (TARGET_NEON)
+#define HAVE_neon_vqshlv2di (TARGET_NEON)
+#define HAVE_neon_vshr_nv8qi (TARGET_NEON)
+#define HAVE_neon_vshr_nv16qi (TARGET_NEON)
+#define HAVE_neon_vshr_nv4hi (TARGET_NEON)
+#define HAVE_neon_vshr_nv8hi (TARGET_NEON)
+#define HAVE_neon_vshr_nv2si (TARGET_NEON)
+#define HAVE_neon_vshr_nv4si (TARGET_NEON)
+#define HAVE_neon_vshr_ndi (TARGET_NEON)
+#define HAVE_neon_vshr_nv2di (TARGET_NEON)
+#define HAVE_neon_vshrn_nv8hi (TARGET_NEON)
+#define HAVE_neon_vshrn_nv4si (TARGET_NEON)
+#define HAVE_neon_vshrn_nv2di (TARGET_NEON)
+#define HAVE_neon_vqshrn_nv8hi (TARGET_NEON)
+#define HAVE_neon_vqshrn_nv4si (TARGET_NEON)
+#define HAVE_neon_vqshrn_nv2di (TARGET_NEON)
+#define HAVE_neon_vqshrun_nv8hi (TARGET_NEON)
+#define HAVE_neon_vqshrun_nv4si (TARGET_NEON)
+#define HAVE_neon_vqshrun_nv2di (TARGET_NEON)
+#define HAVE_neon_vshl_nv8qi (TARGET_NEON)
+#define HAVE_neon_vshl_nv16qi (TARGET_NEON)
+#define HAVE_neon_vshl_nv4hi (TARGET_NEON)
+#define HAVE_neon_vshl_nv8hi (TARGET_NEON)
+#define HAVE_neon_vshl_nv2si (TARGET_NEON)
+#define HAVE_neon_vshl_nv4si (TARGET_NEON)
+#define HAVE_neon_vshl_ndi (TARGET_NEON)
+#define HAVE_neon_vshl_nv2di (TARGET_NEON)
+#define HAVE_neon_vqshl_nv8qi (TARGET_NEON)
+#define HAVE_neon_vqshl_nv16qi (TARGET_NEON)
+#define HAVE_neon_vqshl_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqshl_nv8hi (TARGET_NEON)
+#define HAVE_neon_vqshl_nv2si (TARGET_NEON)
+#define HAVE_neon_vqshl_nv4si (TARGET_NEON)
+#define HAVE_neon_vqshl_ndi (TARGET_NEON)
+#define HAVE_neon_vqshl_nv2di (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv8qi (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv16qi (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv8hi (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv2si (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv4si (TARGET_NEON)
+#define HAVE_neon_vqshlu_ndi (TARGET_NEON)
+#define HAVE_neon_vqshlu_nv2di (TARGET_NEON)
+#define HAVE_neon_vshll_nv8qi (TARGET_NEON)
+#define HAVE_neon_vshll_nv4hi (TARGET_NEON)
+#define HAVE_neon_vshll_nv2si (TARGET_NEON)
+#define HAVE_neon_vsra_nv8qi (TARGET_NEON)
+#define HAVE_neon_vsra_nv16qi (TARGET_NEON)
+#define HAVE_neon_vsra_nv4hi (TARGET_NEON)
+#define HAVE_neon_vsra_nv8hi (TARGET_NEON)
+#define HAVE_neon_vsra_nv2si (TARGET_NEON)
+#define HAVE_neon_vsra_nv4si (TARGET_NEON)
+#define HAVE_neon_vsra_ndi (TARGET_NEON)
+#define HAVE_neon_vsra_nv2di (TARGET_NEON)
+#define HAVE_neon_vsri_nv8qi (TARGET_NEON)
+#define HAVE_neon_vsri_nv16qi (TARGET_NEON)
+#define HAVE_neon_vsri_nv4hi (TARGET_NEON)
+#define HAVE_neon_vsri_nv8hi (TARGET_NEON)
+#define HAVE_neon_vsri_nv2si (TARGET_NEON)
+#define HAVE_neon_vsri_nv4si (TARGET_NEON)
+#define HAVE_neon_vsri_ndi (TARGET_NEON)
+#define HAVE_neon_vsri_nv2di (TARGET_NEON)
+#define HAVE_neon_vsli_nv8qi (TARGET_NEON)
+#define HAVE_neon_vsli_nv16qi (TARGET_NEON)
+#define HAVE_neon_vsli_nv4hi (TARGET_NEON)
+#define HAVE_neon_vsli_nv8hi (TARGET_NEON)
+#define HAVE_neon_vsli_nv2si (TARGET_NEON)
+#define HAVE_neon_vsli_nv4si (TARGET_NEON)
+#define HAVE_neon_vsli_ndi (TARGET_NEON)
+#define HAVE_neon_vsli_nv2di (TARGET_NEON)
+#define HAVE_neon_vtbl1v8qi (TARGET_NEON)
+#define HAVE_neon_vtbl2v8qi (TARGET_NEON)
+#define HAVE_neon_vtbl3v8qi (TARGET_NEON)
+#define HAVE_neon_vtbl4v8qi (TARGET_NEON)
+#define HAVE_neon_vtbx1v8qi (TARGET_NEON)
+#define HAVE_neon_vtbx2v8qi (TARGET_NEON)
+#define HAVE_neon_vtbx3v8qi (TARGET_NEON)
+#define HAVE_neon_vtbx4v8qi (TARGET_NEON)
+#define HAVE_neon_vtrnv8qi_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv16qi_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv4hi_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv8hi_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv2si_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv4si_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv2sf_internal (TARGET_NEON)
+#define HAVE_neon_vtrnv4sf_internal (TARGET_NEON)
+#define HAVE_neon_vzipv8qi_internal (TARGET_NEON)
+#define HAVE_neon_vzipv16qi_internal (TARGET_NEON)
+#define HAVE_neon_vzipv4hi_internal (TARGET_NEON)
+#define HAVE_neon_vzipv8hi_internal (TARGET_NEON)
+#define HAVE_neon_vzipv2si_internal (TARGET_NEON)
+#define HAVE_neon_vzipv4si_internal (TARGET_NEON)
+#define HAVE_neon_vzipv2sf_internal (TARGET_NEON)
+#define HAVE_neon_vzipv4sf_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv8qi_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv16qi_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv4hi_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv8hi_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv2si_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv4si_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv2sf_internal (TARGET_NEON)
+#define HAVE_neon_vuzpv4sf_internal (TARGET_NEON)
+#define HAVE_neon_vld1v8qi (TARGET_NEON)
+#define HAVE_neon_vld1v16qi (TARGET_NEON)
+#define HAVE_neon_vld1v4hi (TARGET_NEON)
+#define HAVE_neon_vld1v8hi (TARGET_NEON)
+#define HAVE_neon_vld1v2si (TARGET_NEON)
+#define HAVE_neon_vld1v4si (TARGET_NEON)
+#define HAVE_neon_vld1v2sf (TARGET_NEON)
+#define HAVE_neon_vld1v4sf (TARGET_NEON)
+#define HAVE_neon_vld1di (TARGET_NEON)
+#define HAVE_neon_vld1v2di (TARGET_NEON)
+#define HAVE_neon_vld1_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vld1_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vld1_lanev2si (TARGET_NEON)
+#define HAVE_neon_vld1_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vld1_lanedi (TARGET_NEON)
+#define HAVE_neon_vld1_lanev16qi (TARGET_NEON)
+#define HAVE_neon_vld1_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vld1_lanev4si (TARGET_NEON)
+#define HAVE_neon_vld1_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld1_lanev2di (TARGET_NEON)
+#define HAVE_neon_vld1_dupv8qi (TARGET_NEON)
+#define HAVE_neon_vld1_dupv4hi (TARGET_NEON)
+#define HAVE_neon_vld1_dupv2si (TARGET_NEON)
+#define HAVE_neon_vld1_dupv2sf (TARGET_NEON)
+#define HAVE_neon_vld1_dupdi (TARGET_NEON)
+#define HAVE_neon_vld1_dupv16qi (TARGET_NEON)
+#define HAVE_neon_vld1_dupv8hi (TARGET_NEON)
+#define HAVE_neon_vld1_dupv4si (TARGET_NEON)
+#define HAVE_neon_vld1_dupv4sf (TARGET_NEON)
+#define HAVE_neon_vld1_dupv2di (TARGET_NEON)
+#define HAVE_neon_vst1v8qi (TARGET_NEON)
+#define HAVE_neon_vst1v16qi (TARGET_NEON)
+#define HAVE_neon_vst1v4hi (TARGET_NEON)
+#define HAVE_neon_vst1v8hi (TARGET_NEON)
+#define HAVE_neon_vst1v2si (TARGET_NEON)
+#define HAVE_neon_vst1v4si (TARGET_NEON)
+#define HAVE_neon_vst1v2sf (TARGET_NEON)
+#define HAVE_neon_vst1v4sf (TARGET_NEON)
+#define HAVE_neon_vst1di (TARGET_NEON)
+#define HAVE_neon_vst1v2di (TARGET_NEON)
+#define HAVE_neon_vst1_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vst1_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vst1_lanev2si (TARGET_NEON)
+#define HAVE_neon_vst1_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vst1_lanedi (TARGET_NEON)
+#define HAVE_neon_vst1_lanev16qi (TARGET_NEON)
+#define HAVE_neon_vst1_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vst1_lanev4si (TARGET_NEON)
+#define HAVE_neon_vst1_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vst1_lanev2di (TARGET_NEON)
+#define HAVE_neon_vld2v8qi (TARGET_NEON)
+#define HAVE_neon_vld2v4hi (TARGET_NEON)
+#define HAVE_neon_vld2v2si (TARGET_NEON)
+#define HAVE_neon_vld2v2sf (TARGET_NEON)
+#define HAVE_neon_vld2di (TARGET_NEON)
+#define HAVE_neon_vld2v16qi (TARGET_NEON)
+#define HAVE_neon_vld2v8hi (TARGET_NEON)
+#define HAVE_neon_vld2v4si (TARGET_NEON)
+#define HAVE_neon_vld2v4sf (TARGET_NEON)
+#define HAVE_neon_vld2_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vld2_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vld2_lanev2si (TARGET_NEON)
+#define HAVE_neon_vld2_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vld2_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vld2_lanev4si (TARGET_NEON)
+#define HAVE_neon_vld2_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld2_dupv8qi (TARGET_NEON)
+#define HAVE_neon_vld2_dupv4hi (TARGET_NEON)
+#define HAVE_neon_vld2_dupv2si (TARGET_NEON)
+#define HAVE_neon_vld2_dupv2sf (TARGET_NEON)
+#define HAVE_neon_vld2_dupdi (TARGET_NEON)
+#define HAVE_neon_vst2v8qi (TARGET_NEON)
+#define HAVE_neon_vst2v4hi (TARGET_NEON)
+#define HAVE_neon_vst2v2si (TARGET_NEON)
+#define HAVE_neon_vst2v2sf (TARGET_NEON)
+#define HAVE_neon_vst2di (TARGET_NEON)
+#define HAVE_neon_vst2v16qi (TARGET_NEON)
+#define HAVE_neon_vst2v8hi (TARGET_NEON)
+#define HAVE_neon_vst2v4si (TARGET_NEON)
+#define HAVE_neon_vst2v4sf (TARGET_NEON)
+#define HAVE_neon_vst2_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vst2_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vst2_lanev2si (TARGET_NEON)
+#define HAVE_neon_vst2_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vst2_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vst2_lanev4si (TARGET_NEON)
+#define HAVE_neon_vst2_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld3v8qi (TARGET_NEON)
+#define HAVE_neon_vld3v4hi (TARGET_NEON)
+#define HAVE_neon_vld3v2si (TARGET_NEON)
+#define HAVE_neon_vld3v2sf (TARGET_NEON)
+#define HAVE_neon_vld3di (TARGET_NEON)
+#define HAVE_neon_vld3qav16qi (TARGET_NEON)
+#define HAVE_neon_vld3qav8hi (TARGET_NEON)
+#define HAVE_neon_vld3qav4si (TARGET_NEON)
+#define HAVE_neon_vld3qav4sf (TARGET_NEON)
+#define HAVE_neon_vld3qbv16qi (TARGET_NEON)
+#define HAVE_neon_vld3qbv8hi (TARGET_NEON)
+#define HAVE_neon_vld3qbv4si (TARGET_NEON)
+#define HAVE_neon_vld3qbv4sf (TARGET_NEON)
+#define HAVE_neon_vld3_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vld3_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vld3_lanev2si (TARGET_NEON)
+#define HAVE_neon_vld3_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vld3_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vld3_lanev4si (TARGET_NEON)
+#define HAVE_neon_vld3_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld3_dupv8qi (TARGET_NEON)
+#define HAVE_neon_vld3_dupv4hi (TARGET_NEON)
+#define HAVE_neon_vld3_dupv2si (TARGET_NEON)
+#define HAVE_neon_vld3_dupv2sf (TARGET_NEON)
+#define HAVE_neon_vld3_dupdi (TARGET_NEON)
+#define HAVE_neon_vst3v8qi (TARGET_NEON)
+#define HAVE_neon_vst3v4hi (TARGET_NEON)
+#define HAVE_neon_vst3v2si (TARGET_NEON)
+#define HAVE_neon_vst3v2sf (TARGET_NEON)
+#define HAVE_neon_vst3di (TARGET_NEON)
+#define HAVE_neon_vst3qav16qi (TARGET_NEON)
+#define HAVE_neon_vst3qav8hi (TARGET_NEON)
+#define HAVE_neon_vst3qav4si (TARGET_NEON)
+#define HAVE_neon_vst3qav4sf (TARGET_NEON)
+#define HAVE_neon_vst3qbv16qi (TARGET_NEON)
+#define HAVE_neon_vst3qbv8hi (TARGET_NEON)
+#define HAVE_neon_vst3qbv4si (TARGET_NEON)
+#define HAVE_neon_vst3qbv4sf (TARGET_NEON)
+#define HAVE_neon_vst3_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vst3_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vst3_lanev2si (TARGET_NEON)
+#define HAVE_neon_vst3_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vst3_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vst3_lanev4si (TARGET_NEON)
+#define HAVE_neon_vst3_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld4v8qi (TARGET_NEON)
+#define HAVE_neon_vld4v4hi (TARGET_NEON)
+#define HAVE_neon_vld4v2si (TARGET_NEON)
+#define HAVE_neon_vld4v2sf (TARGET_NEON)
+#define HAVE_neon_vld4di (TARGET_NEON)
+#define HAVE_neon_vld4qav16qi (TARGET_NEON)
+#define HAVE_neon_vld4qav8hi (TARGET_NEON)
+#define HAVE_neon_vld4qav4si (TARGET_NEON)
+#define HAVE_neon_vld4qav4sf (TARGET_NEON)
+#define HAVE_neon_vld4qbv16qi (TARGET_NEON)
+#define HAVE_neon_vld4qbv8hi (TARGET_NEON)
+#define HAVE_neon_vld4qbv4si (TARGET_NEON)
+#define HAVE_neon_vld4qbv4sf (TARGET_NEON)
+#define HAVE_neon_vld4_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vld4_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vld4_lanev2si (TARGET_NEON)
+#define HAVE_neon_vld4_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vld4_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vld4_lanev4si (TARGET_NEON)
+#define HAVE_neon_vld4_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vld4_dupv8qi (TARGET_NEON)
+#define HAVE_neon_vld4_dupv4hi (TARGET_NEON)
+#define HAVE_neon_vld4_dupv2si (TARGET_NEON)
+#define HAVE_neon_vld4_dupv2sf (TARGET_NEON)
+#define HAVE_neon_vld4_dupdi (TARGET_NEON)
+#define HAVE_neon_vst4v8qi (TARGET_NEON)
+#define HAVE_neon_vst4v4hi (TARGET_NEON)
+#define HAVE_neon_vst4v2si (TARGET_NEON)
+#define HAVE_neon_vst4v2sf (TARGET_NEON)
+#define HAVE_neon_vst4di (TARGET_NEON)
+#define HAVE_neon_vst4qav16qi (TARGET_NEON)
+#define HAVE_neon_vst4qav8hi (TARGET_NEON)
+#define HAVE_neon_vst4qav4si (TARGET_NEON)
+#define HAVE_neon_vst4qav4sf (TARGET_NEON)
+#define HAVE_neon_vst4qbv16qi (TARGET_NEON)
+#define HAVE_neon_vst4qbv8hi (TARGET_NEON)
+#define HAVE_neon_vst4qbv4si (TARGET_NEON)
+#define HAVE_neon_vst4qbv4sf (TARGET_NEON)
+#define HAVE_neon_vst4_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vst4_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vst4_lanev2si (TARGET_NEON)
+#define HAVE_neon_vst4_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vst4_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vst4_lanev4si (TARGET_NEON)
+#define HAVE_neon_vst4_lanev4sf (TARGET_NEON)
+#define HAVE_adddi3 1
+#define HAVE_addsi3 1
+#define HAVE_incscc (TARGET_32BIT)
+#define HAVE_addsf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_adddf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_subdi3 1
+#define HAVE_subsi3 1
+#define HAVE_decscc (TARGET_32BIT)
+#define HAVE_subsf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_subdf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_mulsi3 1
+#define HAVE_mulsidi3 (TARGET_32BIT && arm_arch3m)
+#define HAVE_umulsidi3 (TARGET_32BIT && arm_arch3m)
+#define HAVE_smulsi3_highpart (TARGET_32BIT && arm_arch3m)
+#define HAVE_umulsi3_highpart (TARGET_32BIT && arm_arch3m)
+#define HAVE_mulsf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_muldf3 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_divsf3 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_divdf3 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_modsf3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FPA)
+#define HAVE_moddf3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FPA)
+#define HAVE_andsi3 1
+#define HAVE_insv (TARGET_ARM || arm_arch_thumb2)
+#define HAVE_iorsi3 1
+#define HAVE_xorsi3 1
+#define HAVE_smaxsi3 (TARGET_32BIT)
+#define HAVE_sminsi3 (TARGET_32BIT)
+#define HAVE_umaxsi3 (TARGET_32BIT)
+#define HAVE_uminsi3 (TARGET_32BIT)
+#define HAVE_ashldi3 (TARGET_32BIT)
+#define HAVE_ashlsi3 1
+#define HAVE_ashrdi3 (TARGET_32BIT)
+#define HAVE_ashrsi3 1
+#define HAVE_lshrdi3 (TARGET_32BIT)
+#define HAVE_lshrsi3 1
+#define HAVE_rotlsi3 (TARGET_32BIT)
+#define HAVE_rotrsi3 1
+#define HAVE_extzv (TARGET_THUMB1 || arm_arch_thumb2)
+#define HAVE_negdi2 1
+#define HAVE_negsi2 1
+#define HAVE_negsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_negdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_abssi2 1
+#define HAVE_abssf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_absdf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_sqrtsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sqrtdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_one_cmplsi2 1
+#define HAVE_floatsisf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_floatsidf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_fix_truncsfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_fix_truncdfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_truncdfsf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_zero_extendsidi2 (TARGET_32BIT)
+#define HAVE_zero_extendqidi2 (TARGET_32BIT)
+#define HAVE_extendsidi2 (TARGET_32BIT)
+#define HAVE_zero_extendhisi2 1
+#define HAVE_zero_extendqisi2 1
+#define HAVE_extendhisi2 1
+#define HAVE_extendhisi2_mem (TARGET_ARM)
+#define HAVE_extendqihi2 (TARGET_ARM)
+#define HAVE_extendqisi2 1
+#define HAVE_extendsfdf2 (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_movdi 1
+#define HAVE_movsi 1
+#define HAVE_builtin_setjmp_receiver (flag_pic)
+#define HAVE_storehi (TARGET_ARM)
+#define HAVE_storehi_bigend (TARGET_ARM)
+#define HAVE_storeinthi (TARGET_ARM)
+#define HAVE_storehi_single_op (TARGET_32BIT && arm_arch4)
+#define HAVE_movhi 1
+#define HAVE_movhi_bytes (TARGET_ARM)
+#define HAVE_movhi_bigend (TARGET_ARM)
+#define HAVE_thumb_movhi_clobber (TARGET_THUMB1)
+#define HAVE_reload_outhi 1
+#define HAVE_reload_inhi 1
+#define HAVE_movqi 1
+#define HAVE_movsf 1
+#define HAVE_movdf 1
+#define HAVE_reload_outdf (TARGET_32BIT)
+#define HAVE_movxf (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FPA)
+#define HAVE_load_multiple (TARGET_32BIT)
+#define HAVE_store_multiple (TARGET_32BIT)
+#define HAVE_movmemqi 1
+#define HAVE_cbranchsi4 (TARGET_THUMB1)
+#define HAVE_cmpsi (TARGET_32BIT)
+#define HAVE_cmpsf (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_cmpdf (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_cmpdi (TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK)
+#define HAVE_beq (TARGET_32BIT)
+#define HAVE_bne (TARGET_32BIT)
+#define HAVE_bgt (TARGET_32BIT)
+#define HAVE_ble (TARGET_32BIT)
+#define HAVE_bge (TARGET_32BIT)
+#define HAVE_blt (TARGET_32BIT)
+#define HAVE_bgtu (TARGET_32BIT)
+#define HAVE_bleu (TARGET_32BIT)
+#define HAVE_bgeu (TARGET_32BIT)
+#define HAVE_bltu (TARGET_32BIT)
+#define HAVE_bunordered (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bordered (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bungt (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bunlt (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bunge (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bunle (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_buneq (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_bltgt (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_seq (TARGET_32BIT)
+#define HAVE_sne (TARGET_32BIT)
+#define HAVE_sgt (TARGET_32BIT)
+#define HAVE_sle (TARGET_32BIT)
+#define HAVE_sge (TARGET_32BIT)
+#define HAVE_slt (TARGET_32BIT)
+#define HAVE_sgtu (TARGET_32BIT)
+#define HAVE_sleu (TARGET_32BIT)
+#define HAVE_sgeu (TARGET_32BIT)
+#define HAVE_sltu (TARGET_32BIT)
+#define HAVE_sunordered (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sordered (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sungt (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sunge (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sunlt (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_sunle (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_cstoresi4 (TARGET_THUMB1)
+#define HAVE_cstoresi_eq0_thumb1 (TARGET_THUMB1)
+#define HAVE_cstoresi_ne0_thumb1 (TARGET_THUMB1)
+#define HAVE_movsicc (TARGET_32BIT)
+#define HAVE_movsfcc (TARGET_32BIT && TARGET_HARD_FLOAT)
+#define HAVE_movdfcc (TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP))
+#define HAVE_jump 1
+#define HAVE_call 1
+#define HAVE_call_internal 1
+#define HAVE_call_value 1
+#define HAVE_call_value_internal 1
+#define HAVE_sibcall (TARGET_ARM)
+#define HAVE_sibcall_value (TARGET_ARM)
+#define HAVE_return_addr_mask (TARGET_ARM)
+#define HAVE_untyped_call 1
+#define HAVE_untyped_return 1
+#define HAVE_casesi (TARGET_32BIT)
+#define HAVE_indirect_jump 1
+#define HAVE_prologue 1
+#define HAVE_epilogue 1
+#define HAVE_eh_epilogue 1
+#define HAVE_tablejump (TARGET_THUMB1)
+#define HAVE_eh_return 1
+#define HAVE_movv2di (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode)))
+#define HAVE_movv2si (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_movv4hi (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_movv8qi (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_movv2sf (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode)))
+#define HAVE_movv4si (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_movv8hi (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_movv16qi (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_movv4sf (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode)))
+#define HAVE_addv2di3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode)))
+#define HAVE_addv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_addv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_addv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_addv2sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode)))
+#define HAVE_addv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_addv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_addv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_addv4sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode)))
+#define HAVE_subv2di3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode)))
+#define HAVE_subv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_subv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_subv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_subv2sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode)))
+#define HAVE_subv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_subv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_subv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_subv4sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode)))
+#define HAVE_mulv2si3 (TARGET_NEON || (V2SImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv4hi3 (TARGET_NEON || (V4HImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv8qi3 (TARGET_NEON || (V8QImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv2sf3 (TARGET_NEON || (V2SFmode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv4si3 (TARGET_NEON || (V4SImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv8hi3 (TARGET_NEON || (V8HImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv16qi3 (TARGET_NEON || (V16QImode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_mulv4sf3 (TARGET_NEON || (V4SFmode == V4HImode && TARGET_REALLY_IWMMXT))
+#define HAVE_sminv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_sminv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_sminv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_sminv2sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode)))
+#define HAVE_sminv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_sminv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_sminv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_sminv4sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode)))
+#define HAVE_uminv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_uminv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_uminv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_uminv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_uminv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_uminv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_smaxv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_smaxv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_smaxv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_smaxv2sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode)))
+#define HAVE_smaxv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_smaxv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_smaxv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_smaxv4sf3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode)))
+#define HAVE_umaxv2si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode)))
+#define HAVE_umaxv4hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode)))
+#define HAVE_umaxv8qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode)))
+#define HAVE_umaxv4si3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode)))
+#define HAVE_umaxv8hi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode)))
+#define HAVE_umaxv16qi3 (TARGET_NEON \
+ || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode)))
+#define HAVE_movti (TARGET_NEON)
+#define HAVE_movei (TARGET_NEON)
+#define HAVE_movoi (TARGET_NEON)
+#define HAVE_movci (TARGET_NEON)
+#define HAVE_movxi (TARGET_NEON)
+#define HAVE_vec_setv8qi (TARGET_NEON)
+#define HAVE_vec_setv16qi (TARGET_NEON)
+#define HAVE_vec_setv4hi (TARGET_NEON)
+#define HAVE_vec_setv8hi (TARGET_NEON)
+#define HAVE_vec_setv2si (TARGET_NEON)
+#define HAVE_vec_setv4si (TARGET_NEON)
+#define HAVE_vec_setv2sf (TARGET_NEON)
+#define HAVE_vec_setv4sf (TARGET_NEON)
+#define HAVE_vec_setv2di (TARGET_NEON)
+#define HAVE_vec_initv8qi (TARGET_NEON)
+#define HAVE_vec_initv16qi (TARGET_NEON)
+#define HAVE_vec_initv4hi (TARGET_NEON)
+#define HAVE_vec_initv8hi (TARGET_NEON)
+#define HAVE_vec_initv2si (TARGET_NEON)
+#define HAVE_vec_initv4si (TARGET_NEON)
+#define HAVE_vec_initv2sf (TARGET_NEON)
+#define HAVE_vec_initv4sf (TARGET_NEON)
+#define HAVE_vec_initv2di (TARGET_NEON)
+#define HAVE_ashrv8qi3 (TARGET_NEON)
+#define HAVE_ashrv16qi3 (TARGET_NEON)
+#define HAVE_ashrv4hi3 (TARGET_NEON)
+#define HAVE_ashrv8hi3 (TARGET_NEON)
+#define HAVE_ashrv2si3 (TARGET_NEON)
+#define HAVE_ashrv4si3 (TARGET_NEON)
+#define HAVE_lshrv8qi3 (TARGET_NEON)
+#define HAVE_lshrv16qi3 (TARGET_NEON)
+#define HAVE_lshrv4hi3 (TARGET_NEON)
+#define HAVE_lshrv8hi3 (TARGET_NEON)
+#define HAVE_lshrv2si3 (TARGET_NEON)
+#define HAVE_lshrv4si3 (TARGET_NEON)
+#define HAVE_vec_shr_v8qi (TARGET_NEON)
+#define HAVE_vec_shr_v16qi (TARGET_NEON)
+#define HAVE_vec_shr_v4hi (TARGET_NEON)
+#define HAVE_vec_shr_v8hi (TARGET_NEON)
+#define HAVE_vec_shr_v2si (TARGET_NEON)
+#define HAVE_vec_shr_v4si (TARGET_NEON)
+#define HAVE_vec_shr_v2sf (TARGET_NEON)
+#define HAVE_vec_shr_v4sf (TARGET_NEON)
+#define HAVE_vec_shr_v2di (TARGET_NEON)
+#define HAVE_vec_shl_v8qi (TARGET_NEON)
+#define HAVE_vec_shl_v16qi (TARGET_NEON)
+#define HAVE_vec_shl_v4hi (TARGET_NEON)
+#define HAVE_vec_shl_v8hi (TARGET_NEON)
+#define HAVE_vec_shl_v2si (TARGET_NEON)
+#define HAVE_vec_shl_v4si (TARGET_NEON)
+#define HAVE_vec_shl_v2sf (TARGET_NEON)
+#define HAVE_vec_shl_v4sf (TARGET_NEON)
+#define HAVE_vec_shl_v2di (TARGET_NEON)
+#define HAVE_reduc_splus_v8qi (TARGET_NEON)
+#define HAVE_reduc_splus_v4hi (TARGET_NEON)
+#define HAVE_reduc_splus_v2si (TARGET_NEON)
+#define HAVE_reduc_splus_v2sf (TARGET_NEON)
+#define HAVE_reduc_splus_v16qi (TARGET_NEON)
+#define HAVE_reduc_splus_v8hi (TARGET_NEON)
+#define HAVE_reduc_splus_v4si (TARGET_NEON)
+#define HAVE_reduc_splus_v4sf (TARGET_NEON)
+#define HAVE_reduc_uplus_v8qi (TARGET_NEON)
+#define HAVE_reduc_uplus_v16qi (TARGET_NEON)
+#define HAVE_reduc_uplus_v4hi (TARGET_NEON)
+#define HAVE_reduc_uplus_v8hi (TARGET_NEON)
+#define HAVE_reduc_uplus_v2si (TARGET_NEON)
+#define HAVE_reduc_uplus_v4si (TARGET_NEON)
+#define HAVE_reduc_uplus_v2di (TARGET_NEON)
+#define HAVE_reduc_smin_v8qi (TARGET_NEON)
+#define HAVE_reduc_smin_v4hi (TARGET_NEON)
+#define HAVE_reduc_smin_v2si (TARGET_NEON)
+#define HAVE_reduc_smin_v2sf (TARGET_NEON)
+#define HAVE_reduc_smin_v16qi (TARGET_NEON)
+#define HAVE_reduc_smin_v8hi (TARGET_NEON)
+#define HAVE_reduc_smin_v4si (TARGET_NEON)
+#define HAVE_reduc_smin_v4sf (TARGET_NEON)
+#define HAVE_reduc_smax_v8qi (TARGET_NEON)
+#define HAVE_reduc_smax_v4hi (TARGET_NEON)
+#define HAVE_reduc_smax_v2si (TARGET_NEON)
+#define HAVE_reduc_smax_v2sf (TARGET_NEON)
+#define HAVE_reduc_smax_v16qi (TARGET_NEON)
+#define HAVE_reduc_smax_v8hi (TARGET_NEON)
+#define HAVE_reduc_smax_v4si (TARGET_NEON)
+#define HAVE_reduc_smax_v4sf (TARGET_NEON)
+#define HAVE_reduc_umin_v8qi (TARGET_NEON)
+#define HAVE_reduc_umin_v4hi (TARGET_NEON)
+#define HAVE_reduc_umin_v2si (TARGET_NEON)
+#define HAVE_reduc_umin_v16qi (TARGET_NEON)
+#define HAVE_reduc_umin_v8hi (TARGET_NEON)
+#define HAVE_reduc_umin_v4si (TARGET_NEON)
+#define HAVE_reduc_umax_v8qi (TARGET_NEON)
+#define HAVE_reduc_umax_v4hi (TARGET_NEON)
+#define HAVE_reduc_umax_v2si (TARGET_NEON)
+#define HAVE_reduc_umax_v16qi (TARGET_NEON)
+#define HAVE_reduc_umax_v8hi (TARGET_NEON)
+#define HAVE_reduc_umax_v4si (TARGET_NEON)
+#define HAVE_neon_vpaddv8qi (TARGET_NEON)
+#define HAVE_neon_vpaddv4hi (TARGET_NEON)
+#define HAVE_neon_vpaddv2si (TARGET_NEON)
+#define HAVE_neon_vpaddv2sf (TARGET_NEON)
+#define HAVE_neon_vnegv8qi (TARGET_NEON)
+#define HAVE_neon_vnegv16qi (TARGET_NEON)
+#define HAVE_neon_vnegv4hi (TARGET_NEON)
+#define HAVE_neon_vnegv8hi (TARGET_NEON)
+#define HAVE_neon_vnegv2si (TARGET_NEON)
+#define HAVE_neon_vnegv4si (TARGET_NEON)
+#define HAVE_neon_vnegv2sf (TARGET_NEON)
+#define HAVE_neon_vnegv4sf (TARGET_NEON)
+#define HAVE_neon_vmvnv8qi (TARGET_NEON)
+#define HAVE_neon_vmvnv16qi (TARGET_NEON)
+#define HAVE_neon_vmvnv4hi (TARGET_NEON)
+#define HAVE_neon_vmvnv8hi (TARGET_NEON)
+#define HAVE_neon_vmvnv2si (TARGET_NEON)
+#define HAVE_neon_vmvnv4si (TARGET_NEON)
+#define HAVE_neon_vget_lanev8qi (TARGET_NEON)
+#define HAVE_neon_vget_lanev16qi (TARGET_NEON)
+#define HAVE_neon_vget_lanev4hi (TARGET_NEON)
+#define HAVE_neon_vget_lanev8hi (TARGET_NEON)
+#define HAVE_neon_vget_lanev2si (TARGET_NEON)
+#define HAVE_neon_vget_lanev4si (TARGET_NEON)
+#define HAVE_neon_vget_lanev2sf (TARGET_NEON)
+#define HAVE_neon_vget_lanev4sf (TARGET_NEON)
+#define HAVE_neon_vcreatev8qi (TARGET_NEON)
+#define HAVE_neon_vcreatev4hi (TARGET_NEON)
+#define HAVE_neon_vcreatev2si (TARGET_NEON)
+#define HAVE_neon_vcreatev2sf (TARGET_NEON)
+#define HAVE_neon_vcreatedi (TARGET_NEON)
+#define HAVE_neon_vdup_lanedi (TARGET_NEON)
+#define HAVE_neon_vmul_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmul_nv2si (TARGET_NEON)
+#define HAVE_neon_vmul_nv2sf (TARGET_NEON)
+#define HAVE_neon_vmul_nv8hi (TARGET_NEON)
+#define HAVE_neon_vmul_nv4si (TARGET_NEON)
+#define HAVE_neon_vmul_nv4sf (TARGET_NEON)
+#define HAVE_neon_vmull_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmull_nv2si (TARGET_NEON)
+#define HAVE_neon_vqdmull_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmull_nv2si (TARGET_NEON)
+#define HAVE_neon_vqdmulh_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmulh_nv2si (TARGET_NEON)
+#define HAVE_neon_vqdmulh_nv8hi (TARGET_NEON)
+#define HAVE_neon_vqdmulh_nv4si (TARGET_NEON)
+#define HAVE_neon_vmla_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmla_nv2si (TARGET_NEON)
+#define HAVE_neon_vmla_nv2sf (TARGET_NEON)
+#define HAVE_neon_vmla_nv8hi (TARGET_NEON)
+#define HAVE_neon_vmla_nv4si (TARGET_NEON)
+#define HAVE_neon_vmla_nv4sf (TARGET_NEON)
+#define HAVE_neon_vmlal_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmlal_nv2si (TARGET_NEON)
+#define HAVE_neon_vqdmlal_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlal_nv2si (TARGET_NEON)
+#define HAVE_neon_vmls_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmls_nv2si (TARGET_NEON)
+#define HAVE_neon_vmls_nv2sf (TARGET_NEON)
+#define HAVE_neon_vmls_nv8hi (TARGET_NEON)
+#define HAVE_neon_vmls_nv4si (TARGET_NEON)
+#define HAVE_neon_vmls_nv4sf (TARGET_NEON)
+#define HAVE_neon_vmlsl_nv4hi (TARGET_NEON)
+#define HAVE_neon_vmlsl_nv2si (TARGET_NEON)
+#define HAVE_neon_vqdmlsl_nv4hi (TARGET_NEON)
+#define HAVE_neon_vqdmlsl_nv2si (TARGET_NEON)
+#define HAVE_neon_vbslv8qi (TARGET_NEON)
+#define HAVE_neon_vbslv16qi (TARGET_NEON)
+#define HAVE_neon_vbslv4hi (TARGET_NEON)
+#define HAVE_neon_vbslv8hi (TARGET_NEON)
+#define HAVE_neon_vbslv2si (TARGET_NEON)
+#define HAVE_neon_vbslv4si (TARGET_NEON)
+#define HAVE_neon_vbslv2sf (TARGET_NEON)
+#define HAVE_neon_vbslv4sf (TARGET_NEON)
+#define HAVE_neon_vbsldi (TARGET_NEON)
+#define HAVE_neon_vbslv2di (TARGET_NEON)
+#define HAVE_neon_vtrnv8qi (TARGET_NEON)
+#define HAVE_neon_vtrnv16qi (TARGET_NEON)
+#define HAVE_neon_vtrnv4hi (TARGET_NEON)
+#define HAVE_neon_vtrnv8hi (TARGET_NEON)
+#define HAVE_neon_vtrnv2si (TARGET_NEON)
+#define HAVE_neon_vtrnv4si (TARGET_NEON)
+#define HAVE_neon_vtrnv2sf (TARGET_NEON)
+#define HAVE_neon_vtrnv4sf (TARGET_NEON)
+#define HAVE_neon_vzipv8qi (TARGET_NEON)
+#define HAVE_neon_vzipv16qi (TARGET_NEON)
+#define HAVE_neon_vzipv4hi (TARGET_NEON)
+#define HAVE_neon_vzipv8hi (TARGET_NEON)
+#define HAVE_neon_vzipv2si (TARGET_NEON)
+#define HAVE_neon_vzipv4si (TARGET_NEON)
+#define HAVE_neon_vzipv2sf (TARGET_NEON)
+#define HAVE_neon_vzipv4sf (TARGET_NEON)
+#define HAVE_neon_vuzpv8qi (TARGET_NEON)
+#define HAVE_neon_vuzpv16qi (TARGET_NEON)
+#define HAVE_neon_vuzpv4hi (TARGET_NEON)
+#define HAVE_neon_vuzpv8hi (TARGET_NEON)
+#define HAVE_neon_vuzpv2si (TARGET_NEON)
+#define HAVE_neon_vuzpv4si (TARGET_NEON)
+#define HAVE_neon_vuzpv2sf (TARGET_NEON)
+#define HAVE_neon_vuzpv4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8qiv8qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8qiv4hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8qiv2si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8qiv2sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8qidi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4hiv8qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4hiv4hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4hiv2si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4hiv2sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4hidi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2siv8qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2siv4hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2siv2si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2siv2sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sidi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sfv8qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sfv4hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sfv2si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sfv2sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2sfdi (TARGET_NEON)
+#define HAVE_neon_vreinterpretdiv8qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretdiv4hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretdiv2si (TARGET_NEON)
+#define HAVE_neon_vreinterpretdiv2sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretdidi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv16qiv16qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv16qiv8hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv16qiv4si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv16qiv4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv16qiv2di (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8hiv16qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8hiv8hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8hiv4si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8hiv4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv8hiv2di (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4siv16qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4siv8hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4siv4si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4siv4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4siv2di (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4sfv16qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4sfv8hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4sfv4si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4sfv4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv4sfv2di (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2div16qi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2div8hi (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2div4si (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2div4sf (TARGET_NEON)
+#define HAVE_neon_vreinterpretv2div2di (TARGET_NEON)
+#define HAVE_neon_vld3v16qi (TARGET_NEON)
+#define HAVE_neon_vld3v8hi (TARGET_NEON)
+#define HAVE_neon_vld3v4si (TARGET_NEON)
+#define HAVE_neon_vld3v4sf (TARGET_NEON)
+#define HAVE_neon_vst3v16qi (TARGET_NEON)
+#define HAVE_neon_vst3v8hi (TARGET_NEON)
+#define HAVE_neon_vst3v4si (TARGET_NEON)
+#define HAVE_neon_vst3v4sf (TARGET_NEON)
+#define HAVE_neon_vld4v16qi (TARGET_NEON)
+#define HAVE_neon_vld4v8hi (TARGET_NEON)
+#define HAVE_neon_vld4v4si (TARGET_NEON)
+#define HAVE_neon_vld4v4sf (TARGET_NEON)
+#define HAVE_neon_vst4v16qi (TARGET_NEON)
+#define HAVE_neon_vst4v8hi (TARGET_NEON)
+#define HAVE_neon_vst4v4si (TARGET_NEON)
+#define HAVE_neon_vst4v4sf (TARGET_NEON)
+#define HAVE_neon_vandv8qi (TARGET_NEON)
+#define HAVE_neon_vandv16qi (TARGET_NEON)
+#define HAVE_neon_vandv4hi (TARGET_NEON)
+#define HAVE_neon_vandv8hi (TARGET_NEON)
+#define HAVE_neon_vandv2si (TARGET_NEON)
+#define HAVE_neon_vandv4si (TARGET_NEON)
+#define HAVE_neon_vandv2sf (TARGET_NEON)
+#define HAVE_neon_vandv4sf (TARGET_NEON)
+#define HAVE_neon_vanddi (TARGET_NEON)
+#define HAVE_neon_vandv2di (TARGET_NEON)
+#define HAVE_neon_vorrv8qi (TARGET_NEON)
+#define HAVE_neon_vorrv16qi (TARGET_NEON)
+#define HAVE_neon_vorrv4hi (TARGET_NEON)
+#define HAVE_neon_vorrv8hi (TARGET_NEON)
+#define HAVE_neon_vorrv2si (TARGET_NEON)
+#define HAVE_neon_vorrv4si (TARGET_NEON)
+#define HAVE_neon_vorrv2sf (TARGET_NEON)
+#define HAVE_neon_vorrv4sf (TARGET_NEON)
+#define HAVE_neon_vorrdi (TARGET_NEON)
+#define HAVE_neon_vorrv2di (TARGET_NEON)
+#define HAVE_neon_veorv8qi (TARGET_NEON)
+#define HAVE_neon_veorv16qi (TARGET_NEON)
+#define HAVE_neon_veorv4hi (TARGET_NEON)
+#define HAVE_neon_veorv8hi (TARGET_NEON)
+#define HAVE_neon_veorv2si (TARGET_NEON)
+#define HAVE_neon_veorv4si (TARGET_NEON)
+#define HAVE_neon_veorv2sf (TARGET_NEON)
+#define HAVE_neon_veorv4sf (TARGET_NEON)
+#define HAVE_neon_veordi (TARGET_NEON)
+#define HAVE_neon_veorv2di (TARGET_NEON)
+#define HAVE_neon_vbicv8qi (TARGET_NEON)
+#define HAVE_neon_vbicv16qi (TARGET_NEON)
+#define HAVE_neon_vbicv4hi (TARGET_NEON)
+#define HAVE_neon_vbicv8hi (TARGET_NEON)
+#define HAVE_neon_vbicv2si (TARGET_NEON)
+#define HAVE_neon_vbicv4si (TARGET_NEON)
+#define HAVE_neon_vbicv2sf (TARGET_NEON)
+#define HAVE_neon_vbicv4sf (TARGET_NEON)
+#define HAVE_neon_vbicdi (TARGET_NEON)
+#define HAVE_neon_vbicv2di (TARGET_NEON)
+#define HAVE_neon_vornv8qi (TARGET_NEON)
+#define HAVE_neon_vornv16qi (TARGET_NEON)
+#define HAVE_neon_vornv4hi (TARGET_NEON)
+#define HAVE_neon_vornv8hi (TARGET_NEON)
+#define HAVE_neon_vornv2si (TARGET_NEON)
+#define HAVE_neon_vornv4si (TARGET_NEON)
+#define HAVE_neon_vornv2sf (TARGET_NEON)
+#define HAVE_neon_vornv4sf (TARGET_NEON)
+#define HAVE_neon_vorndi (TARGET_NEON)
+#define HAVE_neon_vornv2di (TARGET_NEON)
+extern rtx gen_mulhisi3 (rtx, rtx, rtx);
+extern rtx gen_anddi3 (rtx, rtx, rtx);
+extern rtx gen_insv_zero (rtx, rtx, rtx);
+extern rtx gen_insv_t2 (rtx, rtx, rtx, rtx);
+extern rtx gen_andsi_notsi_si (rtx, rtx, rtx);
+extern rtx gen_bicsi3 (rtx, rtx, rtx);
+extern rtx gen_andsi_not_shiftsi_si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_iordi3 (rtx, rtx, rtx);
+extern rtx gen_xordi3 (rtx, rtx, rtx);
+extern rtx gen_arm_ashldi3_1bit (rtx, rtx);
+extern rtx gen_arm_ashrdi3_1bit (rtx, rtx);
+extern rtx gen_arm_lshrdi3_1bit (rtx, rtx);
+extern rtx gen_extv (rtx, rtx, rtx, rtx);
+extern rtx gen_extzv_t2 (rtx, rtx, rtx, rtx);
+extern rtx gen_one_cmpldi2 (rtx, rtx);
+extern rtx gen_thumb1_extendhisi2 (rtx, rtx);
+extern rtx gen_pic_load_addr_32bit (rtx, rtx);
+extern rtx gen_pic_load_addr_thumb1 (rtx, rtx);
+extern rtx gen_pic_add_dot_plus_four (rtx, rtx, rtx);
+extern rtx gen_pic_add_dot_plus_eight (rtx, rtx, rtx);
+extern rtx gen_tls_load_dot_plus_eight (rtx, rtx, rtx);
+static inline rtx gen_pic_offset_arm (rtx, rtx, rtx);
+static inline rtx
+gen_pic_offset_arm(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
+{
+ return 0;
+}
+extern rtx gen_movmem12b (rtx, rtx, rtx, rtx);
+extern rtx gen_movmem8b (rtx, rtx, rtx, rtx);
+extern rtx gen_cbranchsi4_scratch (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_cstoresi_nltu_thumb1 (rtx, rtx, rtx);
+extern rtx gen_thumb1_addsi3_addgeu (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_return (void);
+extern rtx gen_blockage (void);
+extern rtx gen_arm_casesi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_nop (void);
+extern rtx gen_movcond (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_sibcall_epilogue (void);
+extern rtx gen_stack_tie (rtx, rtx);
+extern rtx gen_align_4 (void);
+extern rtx gen_align_8 (void);
+extern rtx gen_consttable_end (void);
+extern rtx gen_consttable_1 (rtx);
+extern rtx gen_consttable_2 (rtx);
+extern rtx gen_consttable_4 (rtx);
+extern rtx gen_consttable_8 (rtx);
+extern rtx gen_consttable_16 (rtx);
+extern rtx gen_clzsi2 (rtx, rtx);
+extern rtx gen_prefetch (rtx, rtx, rtx);
+extern rtx gen_prologue_use (rtx);
+extern rtx gen_arm_eh_return (rtx);
+extern rtx gen_thumb_eh_return (rtx);
+extern rtx gen_load_tp_hard (rtx);
+extern rtx gen_load_tp_soft (void);
+extern rtx gen_cirrus_adddi3 (rtx, rtx, rtx);
+extern rtx gen_cirrus_subdi3 (rtx, rtx, rtx);
+extern rtx gen_muldi3 (rtx, rtx, rtx);
+static inline rtx gen_cirrus_ashl_const (rtx, rtx, rtx);
+static inline rtx
+gen_cirrus_ashl_const(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
+{
+ return 0;
+}
+static inline rtx gen_cirrus_ashiftrt_const (rtx, rtx, rtx);
+static inline rtx
+gen_cirrus_ashiftrt_const(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
+{
+ return 0;
+}
+static inline rtx gen_cirrus_ashlsi3 (rtx, rtx, rtx);
+static inline rtx
+gen_cirrus_ashlsi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
+{
+ return 0;
+}
+extern rtx gen_ashldi3_cirrus (rtx, rtx, rtx);
+extern rtx gen_cirrus_ashldi_const (rtx, rtx, rtx);
+extern rtx gen_cirrus_ashiftrtdi_const (rtx, rtx, rtx);
+extern rtx gen_cirrus_floatsisf2 (rtx, rtx);
+extern rtx gen_cirrus_floatsidf2 (rtx, rtx);
+extern rtx gen_floatdisf2 (rtx, rtx);
+extern rtx gen_floatdidf2 (rtx, rtx);
+extern rtx gen_cirrus_truncsfsi2 (rtx, rtx);
+extern rtx gen_cirrus_truncdfsi2 (rtx, rtx);
+extern rtx gen_iwmmxt_iordi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_xordi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_anddi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_nanddi3 (rtx, rtx, rtx);
+extern rtx gen_movv2si_internal (rtx, rtx);
+extern rtx gen_movv4hi_internal (rtx, rtx);
+extern rtx gen_movv8qi_internal (rtx, rtx);
+extern rtx gen_ssaddv8qi3 (rtx, rtx, rtx);
+extern rtx gen_ssaddv4hi3 (rtx, rtx, rtx);
+extern rtx gen_ssaddv2si3 (rtx, rtx, rtx);
+extern rtx gen_usaddv8qi3 (rtx, rtx, rtx);
+extern rtx gen_usaddv4hi3 (rtx, rtx, rtx);
+extern rtx gen_usaddv2si3 (rtx, rtx, rtx);
+extern rtx gen_sssubv8qi3 (rtx, rtx, rtx);
+extern rtx gen_sssubv4hi3 (rtx, rtx, rtx);
+extern rtx gen_sssubv2si3 (rtx, rtx, rtx);
+extern rtx gen_ussubv8qi3 (rtx, rtx, rtx);
+extern rtx gen_ussubv4hi3 (rtx, rtx, rtx);
+extern rtx gen_ussubv2si3 (rtx, rtx, rtx);
+extern rtx gen_smulv4hi3_highpart (rtx, rtx, rtx);
+extern rtx gen_umulv4hi3_highpart (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmacs (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmacsz (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmacu (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmacuz (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_clrdi (rtx);
+extern rtx gen_iwmmxt_uavgrndv8qi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_uavgrndv4hi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_uavgv8qi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_uavgv4hi3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_psadbw (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tinsrb (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tinsrh (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tinsrw (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_textrmub (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_textrmsb (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_textrmuh (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_textrmsh (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_textrmw (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wshufh (rtx, rtx, rtx);
+extern rtx gen_eqv8qi3 (rtx, rtx, rtx);
+extern rtx gen_eqv4hi3 (rtx, rtx, rtx);
+extern rtx gen_eqv2si3 (rtx, rtx, rtx);
+extern rtx gen_gtuv8qi3 (rtx, rtx, rtx);
+extern rtx gen_gtuv4hi3 (rtx, rtx, rtx);
+extern rtx gen_gtuv2si3 (rtx, rtx, rtx);
+extern rtx gen_gtv8qi3 (rtx, rtx, rtx);
+extern rtx gen_gtv4hi3 (rtx, rtx, rtx);
+extern rtx gen_gtv2si3 (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackhss (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackwss (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackdss (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackhus (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackwus (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wpackdus (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckihb (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckihh (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckihw (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckilb (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckilh (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckilw (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehub (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehuh (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehuw (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehsb (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehsh (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckehsw (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckelub (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckeluh (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckeluw (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckelsb (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckelsh (rtx, rtx);
+extern rtx gen_iwmmxt_wunpckelsw (rtx, rtx);
+extern rtx gen_rorv4hi3 (rtx, rtx, rtx);
+extern rtx gen_rorv2si3 (rtx, rtx, rtx);
+extern rtx gen_rordi3 (rtx, rtx, rtx);
+extern rtx gen_ashrv4hi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_ashrv2si3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_ashrdi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_lshrv4hi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_lshrv2si3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_lshrdi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_ashlv4hi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_ashlv2si3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_ashldi3_iwmmxt (rtx, rtx, rtx);
+extern rtx gen_rorv4hi3_di (rtx, rtx, rtx);
+extern rtx gen_rorv2si3_di (rtx, rtx, rtx);
+extern rtx gen_rordi3_di (rtx, rtx, rtx);
+extern rtx gen_ashrv4hi3_di (rtx, rtx, rtx);
+extern rtx gen_ashrv2si3_di (rtx, rtx, rtx);
+extern rtx gen_ashrdi3_di (rtx, rtx, rtx);
+extern rtx gen_lshrv4hi3_di (rtx, rtx, rtx);
+extern rtx gen_lshrv2si3_di (rtx, rtx, rtx);
+extern rtx gen_lshrdi3_di (rtx, rtx, rtx);
+extern rtx gen_ashlv4hi3_di (rtx, rtx, rtx);
+extern rtx gen_ashlv2si3_di (rtx, rtx, rtx);
+extern rtx gen_ashldi3_di (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmadds (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wmaddu (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmia (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmiaph (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmiabb (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmiatb (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmiabt (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmiatt (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tbcstqi (rtx, rtx);
+extern rtx gen_iwmmxt_tbcsthi (rtx, rtx);
+extern rtx gen_iwmmxt_tbcstsi (rtx, rtx);
+extern rtx gen_iwmmxt_tmovmskb (rtx, rtx);
+extern rtx gen_iwmmxt_tmovmskh (rtx, rtx);
+extern rtx gen_iwmmxt_tmovmskw (rtx, rtx);
+extern rtx gen_iwmmxt_waccb (rtx, rtx);
+extern rtx gen_iwmmxt_wacch (rtx, rtx);
+extern rtx gen_iwmmxt_waccw (rtx, rtx);
+extern rtx gen_iwmmxt_walign (rtx, rtx, rtx, rtx);
+extern rtx gen_iwmmxt_tmrc (rtx, rtx);
+extern rtx gen_iwmmxt_tmcr (rtx, rtx);
+extern rtx gen_iwmmxt_wsadb (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wsadh (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wsadbz (rtx, rtx, rtx);
+extern rtx gen_iwmmxt_wsadhz (rtx, rtx, rtx);
+extern rtx gen_fixuns_truncsfsi2 (rtx, rtx);
+extern rtx gen_fixuns_truncdfsi2 (rtx, rtx);
+extern rtx gen_floatunssisf2 (rtx, rtx);
+extern rtx gen_floatunssidf2 (rtx, rtx);
+extern rtx gen_tls_load_dot_plus_four (rtx, rtx, rtx, rtx);
+extern rtx gen_thumb2_zero_extendqisi2_v6 (rtx, rtx);
+extern rtx gen_thumb2_casesi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_thumb2_casesi_internal_pic (rtx, rtx, rtx, rtx);
+extern rtx gen_thumb2_eh_return (rtx);
+extern rtx gen_divsi3 (rtx, rtx, rtx);
+extern rtx gen_udivsi3 (rtx, rtx, rtx);
+extern rtx gen_vec_setv8qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv4hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv2si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv2sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv16qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv8hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv4si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv4sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_setv2di_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_vec_extractv8qi (rtx, rtx, rtx);
+extern rtx gen_vec_extractv4hi (rtx, rtx, rtx);
+extern rtx gen_vec_extractv2si (rtx, rtx, rtx);
+extern rtx gen_vec_extractv2sf (rtx, rtx, rtx);
+extern rtx gen_vec_extractv16qi (rtx, rtx, rtx);
+extern rtx gen_vec_extractv8hi (rtx, rtx, rtx);
+extern rtx gen_vec_extractv4si (rtx, rtx, rtx);
+extern rtx gen_vec_extractv4sf (rtx, rtx, rtx);
+extern rtx gen_vec_extractv2di (rtx, rtx, rtx);
+extern rtx gen_iorv8qi3 (rtx, rtx, rtx);
+extern rtx gen_iorv16qi3 (rtx, rtx, rtx);
+extern rtx gen_iorv4hi3 (rtx, rtx, rtx);
+extern rtx gen_iorv8hi3 (rtx, rtx, rtx);
+extern rtx gen_iorv2si3 (rtx, rtx, rtx);
+extern rtx gen_iorv4si3 (rtx, rtx, rtx);
+extern rtx gen_iorv2sf3 (rtx, rtx, rtx);
+extern rtx gen_iorv4sf3 (rtx, rtx, rtx);
+extern rtx gen_iorv2di3 (rtx, rtx, rtx);
+extern rtx gen_iordi3_neon (rtx, rtx, rtx);
+extern rtx gen_andv8qi3 (rtx, rtx, rtx);
+extern rtx gen_andv16qi3 (rtx, rtx, rtx);
+extern rtx gen_andv4hi3 (rtx, rtx, rtx);
+extern rtx gen_andv8hi3 (rtx, rtx, rtx);
+extern rtx gen_andv2si3 (rtx, rtx, rtx);
+extern rtx gen_andv4si3 (rtx, rtx, rtx);
+extern rtx gen_andv2sf3 (rtx, rtx, rtx);
+extern rtx gen_andv4sf3 (rtx, rtx, rtx);
+extern rtx gen_andv2di3 (rtx, rtx, rtx);
+extern rtx gen_anddi3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv8qi3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv16qi3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv4hi3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv8hi3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv2si3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv4si3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv2sf3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv4sf3_neon (rtx, rtx, rtx);
+extern rtx gen_ornv2di3_neon (rtx, rtx, rtx);
+extern rtx gen_orndi3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv8qi3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv16qi3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv4hi3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv8hi3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv2si3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv4si3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv2sf3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv4sf3_neon (rtx, rtx, rtx);
+extern rtx gen_bicv2di3_neon (rtx, rtx, rtx);
+extern rtx gen_bicdi3_neon (rtx, rtx, rtx);
+extern rtx gen_xorv8qi3 (rtx, rtx, rtx);
+extern rtx gen_xorv16qi3 (rtx, rtx, rtx);
+extern rtx gen_xorv4hi3 (rtx, rtx, rtx);
+extern rtx gen_xorv8hi3 (rtx, rtx, rtx);
+extern rtx gen_xorv2si3 (rtx, rtx, rtx);
+extern rtx gen_xorv4si3 (rtx, rtx, rtx);
+extern rtx gen_xorv2sf3 (rtx, rtx, rtx);
+extern rtx gen_xorv4sf3 (rtx, rtx, rtx);
+extern rtx gen_xorv2di3 (rtx, rtx, rtx);
+extern rtx gen_xordi3_neon (rtx, rtx, rtx);
+extern rtx gen_one_cmplv8qi2 (rtx, rtx);
+extern rtx gen_one_cmplv16qi2 (rtx, rtx);
+extern rtx gen_one_cmplv4hi2 (rtx, rtx);
+extern rtx gen_one_cmplv8hi2 (rtx, rtx);
+extern rtx gen_one_cmplv2si2 (rtx, rtx);
+extern rtx gen_one_cmplv4si2 (rtx, rtx);
+extern rtx gen_one_cmplv2sf2 (rtx, rtx);
+extern rtx gen_one_cmplv4sf2 (rtx, rtx);
+extern rtx gen_one_cmplv2di2 (rtx, rtx);
+extern rtx gen_absv8qi2 (rtx, rtx);
+extern rtx gen_absv16qi2 (rtx, rtx);
+extern rtx gen_absv4hi2 (rtx, rtx);
+extern rtx gen_absv8hi2 (rtx, rtx);
+extern rtx gen_absv2si2 (rtx, rtx);
+extern rtx gen_absv4si2 (rtx, rtx);
+extern rtx gen_absv2sf2 (rtx, rtx);
+extern rtx gen_absv4sf2 (rtx, rtx);
+extern rtx gen_negv8qi2 (rtx, rtx);
+extern rtx gen_negv16qi2 (rtx, rtx);
+extern rtx gen_negv4hi2 (rtx, rtx);
+extern rtx gen_negv8hi2 (rtx, rtx);
+extern rtx gen_negv2si2 (rtx, rtx);
+extern rtx gen_negv4si2 (rtx, rtx);
+extern rtx gen_negv2sf2 (rtx, rtx);
+extern rtx gen_negv4sf2 (rtx, rtx);
+extern rtx gen_ashlv8qi3 (rtx, rtx, rtx);
+extern rtx gen_ashlv16qi3 (rtx, rtx, rtx);
+extern rtx gen_ashlv4hi3 (rtx, rtx, rtx);
+extern rtx gen_ashlv8hi3 (rtx, rtx, rtx);
+extern rtx gen_ashlv2si3 (rtx, rtx, rtx);
+extern rtx gen_ashlv4si3 (rtx, rtx, rtx);
+extern rtx gen_ashlv8qi3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv16qi3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv4hi3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv8hi3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv2si3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv4si3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv2di3_signed (rtx, rtx, rtx);
+extern rtx gen_ashlv8qi3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv16qi3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv4hi3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv8hi3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv2si3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv4si3_unsigned (rtx, rtx, rtx);
+extern rtx gen_ashlv2di3_unsigned (rtx, rtx, rtx);
+extern rtx gen_widen_ssumv8qi3 (rtx, rtx, rtx);
+extern rtx gen_widen_ssumv4hi3 (rtx, rtx, rtx);
+extern rtx gen_widen_ssumv2si3 (rtx, rtx, rtx);
+extern rtx gen_widen_usumv8qi3 (rtx, rtx, rtx);
+extern rtx gen_widen_usumv4hi3 (rtx, rtx, rtx);
+extern rtx gen_widen_usumv2si3 (rtx, rtx, rtx);
+extern rtx gen_quad_halves_plusv4si (rtx, rtx);
+extern rtx gen_quad_halves_sminv4si (rtx, rtx);
+extern rtx gen_quad_halves_smaxv4si (rtx, rtx);
+extern rtx gen_quad_halves_uminv4si (rtx, rtx);
+extern rtx gen_quad_halves_umaxv4si (rtx, rtx);
+extern rtx gen_quad_halves_plusv4sf (rtx, rtx);
+extern rtx gen_quad_halves_sminv4sf (rtx, rtx);
+extern rtx gen_quad_halves_smaxv4sf (rtx, rtx);
+extern rtx gen_quad_halves_plusv8hi (rtx, rtx);
+extern rtx gen_quad_halves_sminv8hi (rtx, rtx);
+extern rtx gen_quad_halves_smaxv8hi (rtx, rtx);
+extern rtx gen_quad_halves_uminv8hi (rtx, rtx);
+extern rtx gen_quad_halves_umaxv8hi (rtx, rtx);
+extern rtx gen_quad_halves_plusv16qi (rtx, rtx);
+extern rtx gen_quad_halves_sminv16qi (rtx, rtx);
+extern rtx gen_quad_halves_smaxv16qi (rtx, rtx);
+extern rtx gen_quad_halves_uminv16qi (rtx, rtx);
+extern rtx gen_quad_halves_umaxv16qi (rtx, rtx);
+extern rtx gen_move_lo_quad_v4si (rtx, rtx);
+extern rtx gen_move_lo_quad_v4sf (rtx, rtx);
+extern rtx gen_move_lo_quad_v8hi (rtx, rtx);
+extern rtx gen_move_lo_quad_v16qi (rtx, rtx);
+extern rtx gen_reduc_splus_v2di (rtx, rtx);
+extern rtx gen_neon_vpadd_internalv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpadd_internalv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpadd_internalv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vpadd_internalv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vpsminv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpsminv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpsminv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vpsminv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vpsmaxv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpsmaxv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpsmaxv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vpsmaxv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vpuminv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpuminv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpuminv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vpumaxv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpumaxv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpumaxv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vaddv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vadddi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddlv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddlv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddlv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddwv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddwv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddwv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhaddv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqadddi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqaddv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddhnv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddhnv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vaddhnv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmulv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav16qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav2sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlav4sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlalv8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlalv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlalv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv16qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv2sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsv4sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlslv8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlslv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlslv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulhv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulhv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulhv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulhv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlalv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlalv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlslv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlslv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmullv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmullv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmullv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmullv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmullv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubdi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsublv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsublv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsublv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubwv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubwv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubwv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubdi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqsubv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vhsubv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubhnv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubhnv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsubhnv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vceqv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcgtv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcagev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcagev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcagtv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcagtv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtstv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdlv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdlv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabdlv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav16qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabav4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabalv8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabalv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabalv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmaxv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vminv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vpaddlv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpadalv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpmaxv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpmaxv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpmaxv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpmaxv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpminv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpminv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpminv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpminv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vrecpsv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vrecpsv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtsv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtsv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vabsv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vabsv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vqabsv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vqnegv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vclsv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vclzv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vcntv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vcntv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrecpev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vrecpev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vrecpev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vrecpev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vrsqrtev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8qi_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4hi_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2si_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2sf_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8qi_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4hi_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2si_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2sf_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev16qi_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8hi_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4si_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4sf_sext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev16qi_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8hi_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4si_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4sf_zext_internal (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanedi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanedi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vset_lanev2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vdup_nv8qi (rtx, rtx);
+extern rtx gen_neon_vdup_nv16qi (rtx, rtx);
+extern rtx gen_neon_vdup_nv4hi (rtx, rtx);
+extern rtx gen_neon_vdup_nv8hi (rtx, rtx);
+extern rtx gen_neon_vdup_nv2si (rtx, rtx);
+extern rtx gen_neon_vdup_nv4si (rtx, rtx);
+extern rtx gen_neon_vdup_nv2sf (rtx, rtx);
+extern rtx gen_neon_vdup_nv4sf (rtx, rtx);
+extern rtx gen_neon_vdup_ndi (rtx, rtx);
+extern rtx gen_neon_vdup_nv2di (rtx, rtx);
+extern rtx gen_neon_vdup_lanev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vdup_lanev2di (rtx, rtx, rtx);
+extern rtx gen_neon_vcombinev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vcombinev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vcombinev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vcombinev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vcombinedi (rtx, rtx, rtx);
+extern rtx gen_neon_vget_highv16qi (rtx, rtx);
+extern rtx gen_neon_vget_highv8hi (rtx, rtx);
+extern rtx gen_neon_vget_highv4si (rtx, rtx);
+extern rtx gen_neon_vget_highv4sf (rtx, rtx);
+extern rtx gen_neon_vget_highv2di (rtx, rtx);
+extern rtx gen_neon_vget_lowv16qi (rtx, rtx);
+extern rtx gen_neon_vget_lowv8hi (rtx, rtx);
+extern rtx gen_neon_vget_lowv4si (rtx, rtx);
+extern rtx gen_neon_vget_lowv4sf (rtx, rtx);
+extern rtx gen_neon_vget_lowv2di (rtx, rtx);
+extern rtx gen_neon_vcvtv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vcvtv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vcvtv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vcvtv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vcvt_nv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcvt_nv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcvt_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcvt_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmovnv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vmovnv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vmovnv2di (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovnv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovnv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovnv2di (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovunv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovunv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vqmovunv2di (rtx, rtx, rtx);
+extern rtx gen_neon_vmovlv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vmovlv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vmovlv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev2sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_lanev4sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmull_lanev4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmull_lanev2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmull_lanev4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmull_lanev2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_lanev8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_lanev4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_lanev4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_lanev2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev2sf (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev8hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev4si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_lanev4sf (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlal_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlal_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlal_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlal_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev2sf (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev8hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev4si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_lanev4sf (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsl_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsl_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlsl_lanev4hi (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlsl_lanev2si (rtx, rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextdi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vextv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v2si (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v4si (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vrev64v2di (rtx, rtx, rtx);
+extern rtx gen_neon_vrev32v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev32v4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev32v16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev32v8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev16v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vrev16v16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vbslv8qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv16qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv8hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbsldi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2di_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshldi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshlv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshldi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshr_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshrn_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshrn_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshrn_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrn_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrn_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrn_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrun_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrun_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshrun_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshl_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshl_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqshlu_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshll_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshll_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vshll_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv8qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv16qi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_ndi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsra_nv2di (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsri_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_ndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vsli_nv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtbl1v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtbl2v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtbl3v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtbl4v8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtbx1v8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtbx2v8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtbx3v8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtbx4v8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv8qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv16qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv8hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv2si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv2sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv8qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv16qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv8hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv2si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv2sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv8qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv16qi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv8hi_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv2si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4si_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv2sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4sf_internal (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1v8qi (rtx, rtx);
+extern rtx gen_neon_vld1v16qi (rtx, rtx);
+extern rtx gen_neon_vld1v4hi (rtx, rtx);
+extern rtx gen_neon_vld1v8hi (rtx, rtx);
+extern rtx gen_neon_vld1v2si (rtx, rtx);
+extern rtx gen_neon_vld1v4si (rtx, rtx);
+extern rtx gen_neon_vld1v2sf (rtx, rtx);
+extern rtx gen_neon_vld1v4sf (rtx, rtx);
+extern rtx gen_neon_vld1di (rtx, rtx);
+extern rtx gen_neon_vld1v2di (rtx, rtx);
+extern rtx gen_neon_vld1_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanedi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_lanev2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld1_dupv8qi (rtx, rtx);
+extern rtx gen_neon_vld1_dupv4hi (rtx, rtx);
+extern rtx gen_neon_vld1_dupv2si (rtx, rtx);
+extern rtx gen_neon_vld1_dupv2sf (rtx, rtx);
+extern rtx gen_neon_vld1_dupdi (rtx, rtx);
+extern rtx gen_neon_vld1_dupv16qi (rtx, rtx);
+extern rtx gen_neon_vld1_dupv8hi (rtx, rtx);
+extern rtx gen_neon_vld1_dupv4si (rtx, rtx);
+extern rtx gen_neon_vld1_dupv4sf (rtx, rtx);
+extern rtx gen_neon_vld1_dupv2di (rtx, rtx);
+extern rtx gen_neon_vst1v8qi (rtx, rtx);
+extern rtx gen_neon_vst1v16qi (rtx, rtx);
+extern rtx gen_neon_vst1v4hi (rtx, rtx);
+extern rtx gen_neon_vst1v8hi (rtx, rtx);
+extern rtx gen_neon_vst1v2si (rtx, rtx);
+extern rtx gen_neon_vst1v4si (rtx, rtx);
+extern rtx gen_neon_vst1v2sf (rtx, rtx);
+extern rtx gen_neon_vst1v4sf (rtx, rtx);
+extern rtx gen_neon_vst1di (rtx, rtx);
+extern rtx gen_neon_vst1v2di (rtx, rtx);
+extern rtx gen_neon_vst1_lanev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanedi (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst1_lanev2di (rtx, rtx, rtx);
+extern rtx gen_neon_vld2v8qi (rtx, rtx);
+extern rtx gen_neon_vld2v4hi (rtx, rtx);
+extern rtx gen_neon_vld2v2si (rtx, rtx);
+extern rtx gen_neon_vld2v2sf (rtx, rtx);
+extern rtx gen_neon_vld2di (rtx, rtx);
+extern rtx gen_neon_vld2v16qi (rtx, rtx);
+extern rtx gen_neon_vld2v8hi (rtx, rtx);
+extern rtx gen_neon_vld2v4si (rtx, rtx);
+extern rtx gen_neon_vld2v4sf (rtx, rtx);
+extern rtx gen_neon_vld2_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld2_dupv8qi (rtx, rtx);
+extern rtx gen_neon_vld2_dupv4hi (rtx, rtx);
+extern rtx gen_neon_vld2_dupv2si (rtx, rtx);
+extern rtx gen_neon_vld2_dupv2sf (rtx, rtx);
+extern rtx gen_neon_vld2_dupdi (rtx, rtx);
+extern rtx gen_neon_vst2v8qi (rtx, rtx);
+extern rtx gen_neon_vst2v4hi (rtx, rtx);
+extern rtx gen_neon_vst2v2si (rtx, rtx);
+extern rtx gen_neon_vst2v2sf (rtx, rtx);
+extern rtx gen_neon_vst2di (rtx, rtx);
+extern rtx gen_neon_vst2v16qi (rtx, rtx);
+extern rtx gen_neon_vst2v8hi (rtx, rtx);
+extern rtx gen_neon_vst2v4si (rtx, rtx);
+extern rtx gen_neon_vst2v4sf (rtx, rtx);
+extern rtx gen_neon_vst2_lanev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst2_lanev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vld3v8qi (rtx, rtx);
+extern rtx gen_neon_vld3v4hi (rtx, rtx);
+extern rtx gen_neon_vld3v2si (rtx, rtx);
+extern rtx gen_neon_vld3v2sf (rtx, rtx);
+extern rtx gen_neon_vld3di (rtx, rtx);
+extern rtx gen_neon_vld3qav16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qav8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qav4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qav4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qbv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qbv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qbv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3qbv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld3_dupv8qi (rtx, rtx);
+extern rtx gen_neon_vld3_dupv4hi (rtx, rtx);
+extern rtx gen_neon_vld3_dupv2si (rtx, rtx);
+extern rtx gen_neon_vld3_dupv2sf (rtx, rtx);
+extern rtx gen_neon_vld3_dupdi (rtx, rtx);
+extern rtx gen_neon_vst3v8qi (rtx, rtx);
+extern rtx gen_neon_vst3v4hi (rtx, rtx);
+extern rtx gen_neon_vst3v2si (rtx, rtx);
+extern rtx gen_neon_vst3v2sf (rtx, rtx);
+extern rtx gen_neon_vst3di (rtx, rtx);
+extern rtx gen_neon_vst3qav16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qav8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qav4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qav4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qbv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qbv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qbv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst3qbv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst3_lanev4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vld4v8qi (rtx, rtx);
+extern rtx gen_neon_vld4v4hi (rtx, rtx);
+extern rtx gen_neon_vld4v2si (rtx, rtx);
+extern rtx gen_neon_vld4v2sf (rtx, rtx);
+extern rtx gen_neon_vld4di (rtx, rtx);
+extern rtx gen_neon_vld4qav16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qav8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qav4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qav4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qbv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qbv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qbv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4qbv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vld4_dupv8qi (rtx, rtx);
+extern rtx gen_neon_vld4_dupv4hi (rtx, rtx);
+extern rtx gen_neon_vld4_dupv2si (rtx, rtx);
+extern rtx gen_neon_vld4_dupv2sf (rtx, rtx);
+extern rtx gen_neon_vld4_dupdi (rtx, rtx);
+extern rtx gen_neon_vst4v8qi (rtx, rtx);
+extern rtx gen_neon_vst4v4hi (rtx, rtx);
+extern rtx gen_neon_vst4v2si (rtx, rtx);
+extern rtx gen_neon_vst4v2sf (rtx, rtx);
+extern rtx gen_neon_vst4di (rtx, rtx);
+extern rtx gen_neon_vst4qav16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qav8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qav4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qav4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qbv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qbv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qbv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst4qbv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev2si (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev4si (rtx, rtx, rtx);
+extern rtx gen_neon_vst4_lanev4sf (rtx, rtx, rtx);
+extern rtx gen_adddi3 (rtx, rtx, rtx);
+extern rtx gen_addsi3 (rtx, rtx, rtx);
+extern rtx gen_incscc (rtx, rtx, rtx, rtx);
+extern rtx gen_addsf3 (rtx, rtx, rtx);
+extern rtx gen_adddf3 (rtx, rtx, rtx);
+extern rtx gen_subdi3 (rtx, rtx, rtx);
+extern rtx gen_subsi3 (rtx, rtx, rtx);
+extern rtx gen_decscc (rtx, rtx, rtx, rtx);
+extern rtx gen_subsf3 (rtx, rtx, rtx);
+extern rtx gen_subdf3 (rtx, rtx, rtx);
+extern rtx gen_mulsi3 (rtx, rtx, rtx);
+extern rtx gen_mulsidi3 (rtx, rtx, rtx);
+extern rtx gen_umulsidi3 (rtx, rtx, rtx);
+extern rtx gen_smulsi3_highpart (rtx, rtx, rtx);
+extern rtx gen_umulsi3_highpart (rtx, rtx, rtx);
+extern rtx gen_mulsf3 (rtx, rtx, rtx);
+extern rtx gen_muldf3 (rtx, rtx, rtx);
+extern rtx gen_divsf3 (rtx, rtx, rtx);
+extern rtx gen_divdf3 (rtx, rtx, rtx);
+extern rtx gen_modsf3 (rtx, rtx, rtx);
+extern rtx gen_moddf3 (rtx, rtx, rtx);
+extern rtx gen_andsi3 (rtx, rtx, rtx);
+extern rtx gen_insv (rtx, rtx, rtx, rtx);
+extern rtx gen_iorsi3 (rtx, rtx, rtx);
+extern rtx gen_xorsi3 (rtx, rtx, rtx);
+extern rtx gen_smaxsi3 (rtx, rtx, rtx);
+extern rtx gen_sminsi3 (rtx, rtx, rtx);
+extern rtx gen_umaxsi3 (rtx, rtx, rtx);
+extern rtx gen_uminsi3 (rtx, rtx, rtx);
+extern rtx gen_ashldi3 (rtx, rtx, rtx);
+extern rtx gen_ashlsi3 (rtx, rtx, rtx);
+extern rtx gen_ashrdi3 (rtx, rtx, rtx);
+extern rtx gen_ashrsi3 (rtx, rtx, rtx);
+extern rtx gen_lshrdi3 (rtx, rtx, rtx);
+extern rtx gen_lshrsi3 (rtx, rtx, rtx);
+extern rtx gen_rotlsi3 (rtx, rtx, rtx);
+extern rtx gen_rotrsi3 (rtx, rtx, rtx);
+extern rtx gen_extzv (rtx, rtx, rtx, rtx);
+extern rtx gen_negdi2 (rtx, rtx);
+extern rtx gen_negsi2 (rtx, rtx);
+extern rtx gen_negsf2 (rtx, rtx);
+extern rtx gen_negdf2 (rtx, rtx);
+extern rtx gen_abssi2 (rtx, rtx);
+extern rtx gen_abssf2 (rtx, rtx);
+extern rtx gen_absdf2 (rtx, rtx);
+extern rtx gen_sqrtsf2 (rtx, rtx);
+extern rtx gen_sqrtdf2 (rtx, rtx);
+extern rtx gen_one_cmplsi2 (rtx, rtx);
+extern rtx gen_floatsisf2 (rtx, rtx);
+extern rtx gen_floatsidf2 (rtx, rtx);
+extern rtx gen_fix_truncsfsi2 (rtx, rtx);
+extern rtx gen_fix_truncdfsi2 (rtx, rtx);
+extern rtx gen_truncdfsf2 (rtx, rtx);
+extern rtx gen_zero_extendsidi2 (rtx, rtx);
+extern rtx gen_zero_extendqidi2 (rtx, rtx);
+extern rtx gen_extendsidi2 (rtx, rtx);
+extern rtx gen_zero_extendhisi2 (rtx, rtx);
+extern rtx gen_zero_extendqisi2 (rtx, rtx);
+extern rtx gen_extendhisi2 (rtx, rtx);
+extern rtx gen_extendhisi2_mem (rtx, rtx);
+extern rtx gen_extendqihi2 (rtx, rtx);
+extern rtx gen_extendqisi2 (rtx, rtx);
+extern rtx gen_extendsfdf2 (rtx, rtx);
+extern rtx gen_movdi (rtx, rtx);
+extern rtx gen_movsi (rtx, rtx);
+extern rtx gen_builtin_setjmp_receiver (rtx);
+extern rtx gen_storehi (rtx, rtx);
+extern rtx gen_storehi_bigend (rtx, rtx);
+extern rtx gen_storeinthi (rtx, rtx);
+extern rtx gen_storehi_single_op (rtx, rtx);
+extern rtx gen_movhi (rtx, rtx);
+extern rtx gen_movhi_bytes (rtx, rtx);
+extern rtx gen_movhi_bigend (rtx, rtx);
+extern rtx gen_thumb_movhi_clobber (rtx, rtx, rtx);
+extern rtx gen_reload_outhi (rtx, rtx, rtx);
+extern rtx gen_reload_inhi (rtx, rtx, rtx);
+extern rtx gen_movqi (rtx, rtx);
+extern rtx gen_movsf (rtx, rtx);
+extern rtx gen_movdf (rtx, rtx);
+extern rtx gen_reload_outdf (rtx, rtx, rtx);
+extern rtx gen_movxf (rtx, rtx);
+extern rtx gen_load_multiple (rtx, rtx, rtx);
+extern rtx gen_store_multiple (rtx, rtx, rtx);
+extern rtx gen_movmemqi (rtx, rtx, rtx, rtx);
+extern rtx gen_cbranchsi4 (rtx, rtx, rtx, rtx);
+extern rtx gen_cmpsi (rtx, rtx);
+extern rtx gen_cmpsf (rtx, rtx);
+extern rtx gen_cmpdf (rtx, rtx);
+extern rtx gen_cmpdi (rtx, rtx);
+extern rtx gen_beq (rtx);
+extern rtx gen_bne (rtx);
+extern rtx gen_bgt (rtx);
+extern rtx gen_ble (rtx);
+extern rtx gen_bge (rtx);
+extern rtx gen_blt (rtx);
+extern rtx gen_bgtu (rtx);
+extern rtx gen_bleu (rtx);
+extern rtx gen_bgeu (rtx);
+extern rtx gen_bltu (rtx);
+extern rtx gen_bunordered (rtx);
+extern rtx gen_bordered (rtx);
+extern rtx gen_bungt (rtx);
+extern rtx gen_bunlt (rtx);
+extern rtx gen_bunge (rtx);
+extern rtx gen_bunle (rtx);
+extern rtx gen_buneq (rtx);
+extern rtx gen_bltgt (rtx);
+extern rtx gen_seq (rtx);
+extern rtx gen_sne (rtx);
+extern rtx gen_sgt (rtx);
+extern rtx gen_sle (rtx);
+extern rtx gen_sge (rtx);
+extern rtx gen_slt (rtx);
+extern rtx gen_sgtu (rtx);
+extern rtx gen_sleu (rtx);
+extern rtx gen_sgeu (rtx);
+extern rtx gen_sltu (rtx);
+extern rtx gen_sunordered (rtx);
+extern rtx gen_sordered (rtx);
+extern rtx gen_sungt (rtx);
+extern rtx gen_sunge (rtx);
+extern rtx gen_sunlt (rtx);
+extern rtx gen_sunle (rtx);
+extern rtx gen_cstoresi4 (rtx, rtx, rtx, rtx);
+extern rtx gen_cstoresi_eq0_thumb1 (rtx, rtx);
+extern rtx gen_cstoresi_ne0_thumb1 (rtx, rtx);
+extern rtx gen_movsicc (rtx, rtx, rtx, rtx);
+extern rtx gen_movsfcc (rtx, rtx, rtx, rtx);
+extern rtx gen_movdfcc (rtx, rtx, rtx, rtx);
+extern rtx gen_jump (rtx);
+#define GEN_CALL(A, B, C, D) gen_call ((A), (B), (C))
+extern rtx gen_call (rtx, rtx, rtx);
+extern rtx gen_call_internal (rtx, rtx, rtx);
+#define GEN_CALL_VALUE(A, B, C, D, E) gen_call_value ((A), (B), (C), (D))
+extern rtx gen_call_value (rtx, rtx, rtx, rtx);
+extern rtx gen_call_value_internal (rtx, rtx, rtx, rtx);
+#define GEN_SIBCALL(A, B, C, D) gen_sibcall ((A), (B), (C))
+extern rtx gen_sibcall (rtx, rtx, rtx);
+#define GEN_SIBCALL_VALUE(A, B, C, D, E) gen_sibcall_value ((A), (B), (C), (D))
+extern rtx gen_sibcall_value (rtx, rtx, rtx, rtx);
+extern rtx gen_return_addr_mask (rtx);
+extern rtx gen_untyped_call (rtx, rtx, rtx);
+extern rtx gen_untyped_return (rtx, rtx);
+extern rtx gen_casesi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_indirect_jump (rtx);
+extern rtx gen_prologue (void);
+extern rtx gen_epilogue (void);
+extern rtx gen_eh_epilogue (rtx, rtx, rtx);
+extern rtx gen_tablejump (rtx, rtx);
+extern rtx gen_eh_return (rtx);
+extern rtx gen_movv2di (rtx, rtx);
+extern rtx gen_movv2si (rtx, rtx);
+extern rtx gen_movv4hi (rtx, rtx);
+extern rtx gen_movv8qi (rtx, rtx);
+extern rtx gen_movv2sf (rtx, rtx);
+extern rtx gen_movv4si (rtx, rtx);
+extern rtx gen_movv8hi (rtx, rtx);
+extern rtx gen_movv16qi (rtx, rtx);
+extern rtx gen_movv4sf (rtx, rtx);
+extern rtx gen_addv2di3 (rtx, rtx, rtx);
+extern rtx gen_addv2si3 (rtx, rtx, rtx);
+extern rtx gen_addv4hi3 (rtx, rtx, rtx);
+extern rtx gen_addv8qi3 (rtx, rtx, rtx);
+extern rtx gen_addv2sf3 (rtx, rtx, rtx);
+extern rtx gen_addv4si3 (rtx, rtx, rtx);
+extern rtx gen_addv8hi3 (rtx, rtx, rtx);
+extern rtx gen_addv16qi3 (rtx, rtx, rtx);
+extern rtx gen_addv4sf3 (rtx, rtx, rtx);
+extern rtx gen_subv2di3 (rtx, rtx, rtx);
+extern rtx gen_subv2si3 (rtx, rtx, rtx);
+extern rtx gen_subv4hi3 (rtx, rtx, rtx);
+extern rtx gen_subv8qi3 (rtx, rtx, rtx);
+extern rtx gen_subv2sf3 (rtx, rtx, rtx);
+extern rtx gen_subv4si3 (rtx, rtx, rtx);
+extern rtx gen_subv8hi3 (rtx, rtx, rtx);
+extern rtx gen_subv16qi3 (rtx, rtx, rtx);
+extern rtx gen_subv4sf3 (rtx, rtx, rtx);
+extern rtx gen_mulv2si3 (rtx, rtx, rtx);
+extern rtx gen_mulv4hi3 (rtx, rtx, rtx);
+extern rtx gen_mulv8qi3 (rtx, rtx, rtx);
+extern rtx gen_mulv2sf3 (rtx, rtx, rtx);
+extern rtx gen_mulv4si3 (rtx, rtx, rtx);
+extern rtx gen_mulv8hi3 (rtx, rtx, rtx);
+extern rtx gen_mulv16qi3 (rtx, rtx, rtx);
+extern rtx gen_mulv4sf3 (rtx, rtx, rtx);
+extern rtx gen_sminv2si3 (rtx, rtx, rtx);
+extern rtx gen_sminv4hi3 (rtx, rtx, rtx);
+extern rtx gen_sminv8qi3 (rtx, rtx, rtx);
+extern rtx gen_sminv2sf3 (rtx, rtx, rtx);
+extern rtx gen_sminv4si3 (rtx, rtx, rtx);
+extern rtx gen_sminv8hi3 (rtx, rtx, rtx);
+extern rtx gen_sminv16qi3 (rtx, rtx, rtx);
+extern rtx gen_sminv4sf3 (rtx, rtx, rtx);
+extern rtx gen_uminv2si3 (rtx, rtx, rtx);
+extern rtx gen_uminv4hi3 (rtx, rtx, rtx);
+extern rtx gen_uminv8qi3 (rtx, rtx, rtx);
+extern rtx gen_uminv4si3 (rtx, rtx, rtx);
+extern rtx gen_uminv8hi3 (rtx, rtx, rtx);
+extern rtx gen_uminv16qi3 (rtx, rtx, rtx);
+extern rtx gen_smaxv2si3 (rtx, rtx, rtx);
+extern rtx gen_smaxv4hi3 (rtx, rtx, rtx);
+extern rtx gen_smaxv8qi3 (rtx, rtx, rtx);
+extern rtx gen_smaxv2sf3 (rtx, rtx, rtx);
+extern rtx gen_smaxv4si3 (rtx, rtx, rtx);
+extern rtx gen_smaxv8hi3 (rtx, rtx, rtx);
+extern rtx gen_smaxv16qi3 (rtx, rtx, rtx);
+extern rtx gen_smaxv4sf3 (rtx, rtx, rtx);
+extern rtx gen_umaxv2si3 (rtx, rtx, rtx);
+extern rtx gen_umaxv4hi3 (rtx, rtx, rtx);
+extern rtx gen_umaxv8qi3 (rtx, rtx, rtx);
+extern rtx gen_umaxv4si3 (rtx, rtx, rtx);
+extern rtx gen_umaxv8hi3 (rtx, rtx, rtx);
+extern rtx gen_umaxv16qi3 (rtx, rtx, rtx);
+extern rtx gen_movti (rtx, rtx);
+extern rtx gen_movei (rtx, rtx);
+extern rtx gen_movoi (rtx, rtx);
+extern rtx gen_movci (rtx, rtx);
+extern rtx gen_movxi (rtx, rtx);
+extern rtx gen_vec_setv8qi (rtx, rtx, rtx);
+extern rtx gen_vec_setv16qi (rtx, rtx, rtx);
+extern rtx gen_vec_setv4hi (rtx, rtx, rtx);
+extern rtx gen_vec_setv8hi (rtx, rtx, rtx);
+extern rtx gen_vec_setv2si (rtx, rtx, rtx);
+extern rtx gen_vec_setv4si (rtx, rtx, rtx);
+extern rtx gen_vec_setv2sf (rtx, rtx, rtx);
+extern rtx gen_vec_setv4sf (rtx, rtx, rtx);
+extern rtx gen_vec_setv2di (rtx, rtx, rtx);
+extern rtx gen_vec_initv8qi (rtx, rtx);
+extern rtx gen_vec_initv16qi (rtx, rtx);
+extern rtx gen_vec_initv4hi (rtx, rtx);
+extern rtx gen_vec_initv8hi (rtx, rtx);
+extern rtx gen_vec_initv2si (rtx, rtx);
+extern rtx gen_vec_initv4si (rtx, rtx);
+extern rtx gen_vec_initv2sf (rtx, rtx);
+extern rtx gen_vec_initv4sf (rtx, rtx);
+extern rtx gen_vec_initv2di (rtx, rtx);
+extern rtx gen_ashrv8qi3 (rtx, rtx, rtx);
+extern rtx gen_ashrv16qi3 (rtx, rtx, rtx);
+extern rtx gen_ashrv4hi3 (rtx, rtx, rtx);
+extern rtx gen_ashrv8hi3 (rtx, rtx, rtx);
+extern rtx gen_ashrv2si3 (rtx, rtx, rtx);
+extern rtx gen_ashrv4si3 (rtx, rtx, rtx);
+extern rtx gen_lshrv8qi3 (rtx, rtx, rtx);
+extern rtx gen_lshrv16qi3 (rtx, rtx, rtx);
+extern rtx gen_lshrv4hi3 (rtx, rtx, rtx);
+extern rtx gen_lshrv8hi3 (rtx, rtx, rtx);
+extern rtx gen_lshrv2si3 (rtx, rtx, rtx);
+extern rtx gen_lshrv4si3 (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v8qi (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v16qi (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v4hi (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v8hi (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v2si (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v4si (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v2sf (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v4sf (rtx, rtx, rtx);
+extern rtx gen_vec_shr_v2di (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v8qi (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v16qi (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v4hi (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v8hi (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v2si (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v4si (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v2sf (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v4sf (rtx, rtx, rtx);
+extern rtx gen_vec_shl_v2di (rtx, rtx, rtx);
+extern rtx gen_reduc_splus_v8qi (rtx, rtx);
+extern rtx gen_reduc_splus_v4hi (rtx, rtx);
+extern rtx gen_reduc_splus_v2si (rtx, rtx);
+extern rtx gen_reduc_splus_v2sf (rtx, rtx);
+extern rtx gen_reduc_splus_v16qi (rtx, rtx);
+extern rtx gen_reduc_splus_v8hi (rtx, rtx);
+extern rtx gen_reduc_splus_v4si (rtx, rtx);
+extern rtx gen_reduc_splus_v4sf (rtx, rtx);
+extern rtx gen_reduc_uplus_v8qi (rtx, rtx);
+extern rtx gen_reduc_uplus_v16qi (rtx, rtx);
+extern rtx gen_reduc_uplus_v4hi (rtx, rtx);
+extern rtx gen_reduc_uplus_v8hi (rtx, rtx);
+extern rtx gen_reduc_uplus_v2si (rtx, rtx);
+extern rtx gen_reduc_uplus_v4si (rtx, rtx);
+extern rtx gen_reduc_uplus_v2di (rtx, rtx);
+extern rtx gen_reduc_smin_v8qi (rtx, rtx);
+extern rtx gen_reduc_smin_v4hi (rtx, rtx);
+extern rtx gen_reduc_smin_v2si (rtx, rtx);
+extern rtx gen_reduc_smin_v2sf (rtx, rtx);
+extern rtx gen_reduc_smin_v16qi (rtx, rtx);
+extern rtx gen_reduc_smin_v8hi (rtx, rtx);
+extern rtx gen_reduc_smin_v4si (rtx, rtx);
+extern rtx gen_reduc_smin_v4sf (rtx, rtx);
+extern rtx gen_reduc_smax_v8qi (rtx, rtx);
+extern rtx gen_reduc_smax_v4hi (rtx, rtx);
+extern rtx gen_reduc_smax_v2si (rtx, rtx);
+extern rtx gen_reduc_smax_v2sf (rtx, rtx);
+extern rtx gen_reduc_smax_v16qi (rtx, rtx);
+extern rtx gen_reduc_smax_v8hi (rtx, rtx);
+extern rtx gen_reduc_smax_v4si (rtx, rtx);
+extern rtx gen_reduc_smax_v4sf (rtx, rtx);
+extern rtx gen_reduc_umin_v8qi (rtx, rtx);
+extern rtx gen_reduc_umin_v4hi (rtx, rtx);
+extern rtx gen_reduc_umin_v2si (rtx, rtx);
+extern rtx gen_reduc_umin_v16qi (rtx, rtx);
+extern rtx gen_reduc_umin_v8hi (rtx, rtx);
+extern rtx gen_reduc_umin_v4si (rtx, rtx);
+extern rtx gen_reduc_umax_v8qi (rtx, rtx);
+extern rtx gen_reduc_umax_v4hi (rtx, rtx);
+extern rtx gen_reduc_umax_v2si (rtx, rtx);
+extern rtx gen_reduc_umax_v16qi (rtx, rtx);
+extern rtx gen_reduc_umax_v8hi (rtx, rtx);
+extern rtx gen_reduc_umax_v4si (rtx, rtx);
+extern rtx gen_neon_vpaddv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpaddv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpaddv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vpaddv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vnegv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vnegv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vmvnv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vget_lanev4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vcreatev8qi (rtx, rtx);
+extern rtx gen_neon_vcreatev4hi (rtx, rtx);
+extern rtx gen_neon_vcreatev2si (rtx, rtx);
+extern rtx gen_neon_vcreatev2sf (rtx, rtx);
+extern rtx gen_neon_vcreatedi (rtx, rtx);
+extern rtx gen_neon_vdup_lanedi (rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmul_nv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmull_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmull_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmull_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmull_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_nv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_nv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_nv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmulh_nv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv2sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmla_nv4sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlal_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlal_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlal_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlal_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv2sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv8hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv4si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmls_nv4sf (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsl_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vmlsl_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlsl_nv4hi (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vqdmlsl_nv2si (rtx, rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbsldi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbslv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vtrnv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vzipv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv8qi (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv16qi (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4hi (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv8hi (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv2si (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4si (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv2sf (rtx, rtx, rtx);
+extern rtx gen_neon_vuzpv4sf (rtx, rtx, rtx);
+extern rtx gen_neon_vreinterpretv8qiv8qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8qiv4hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8qiv2si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8qiv2sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8qidi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4hiv8qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4hiv4hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4hiv2si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4hiv2sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4hidi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2siv8qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2siv4hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2siv2si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2siv2sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sidi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sfv8qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sfv4hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sfv2si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sfv2sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2sfdi (rtx, rtx);
+extern rtx gen_neon_vreinterpretdiv8qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretdiv4hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretdiv2si (rtx, rtx);
+extern rtx gen_neon_vreinterpretdiv2sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretdidi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv16qiv16qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv16qiv8hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv16qiv4si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv16qiv4sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv16qiv2di (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8hiv16qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8hiv8hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8hiv4si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8hiv4sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv8hiv2di (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4siv16qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4siv8hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4siv4si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4siv4sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4siv2di (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4sfv16qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4sfv8hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4sfv4si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4sfv4sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv4sfv2di (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2div16qi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2div8hi (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2div4si (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2div4sf (rtx, rtx);
+extern rtx gen_neon_vreinterpretv2div2di (rtx, rtx);
+extern rtx gen_neon_vld3v16qi (rtx, rtx);
+extern rtx gen_neon_vld3v8hi (rtx, rtx);
+extern rtx gen_neon_vld3v4si (rtx, rtx);
+extern rtx gen_neon_vld3v4sf (rtx, rtx);
+extern rtx gen_neon_vst3v16qi (rtx, rtx);
+extern rtx gen_neon_vst3v8hi (rtx, rtx);
+extern rtx gen_neon_vst3v4si (rtx, rtx);
+extern rtx gen_neon_vst3v4sf (rtx, rtx);
+extern rtx gen_neon_vld4v16qi (rtx, rtx);
+extern rtx gen_neon_vld4v8hi (rtx, rtx);
+extern rtx gen_neon_vld4v4si (rtx, rtx);
+extern rtx gen_neon_vld4v4sf (rtx, rtx);
+extern rtx gen_neon_vst4v16qi (rtx, rtx);
+extern rtx gen_neon_vst4v8hi (rtx, rtx);
+extern rtx gen_neon_vst4v4si (rtx, rtx);
+extern rtx gen_neon_vst4v4sf (rtx, rtx);
+extern rtx gen_neon_vandv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vanddi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vandv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrdi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorrv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veordi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_veorv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicdi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vbicv2di (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv8qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv16qi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv4hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv8hi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv2si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv4si (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv2sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv4sf (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vorndi (rtx, rtx, rtx, rtx);
+extern rtx gen_neon_vornv2di (rtx, rtx, rtx, rtx);
+
+#endif /* GCC_INSN_FLAGS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-modes.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-modes.h
new file mode 100644
index 0000000..190bc01
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-modes.h
@@ -0,0 +1,151 @@
+/* Generated automatically from machmode.def and config/arm/arm-modes.def
+ by genmodes. */
+
+#ifndef GCC_INSN_MODES_H
+#define GCC_INSN_MODES_H
+
+enum machine_mode
+{
+ VOIDmode, /* machmode.def:169 */
+ BLKmode, /* machmode.def:173 */
+ CCmode, /* machmode.def:201 */
+ CC_NOOVmode, /* config/arm/arm-modes.def:35 */
+ CC_Zmode, /* config/arm/arm-modes.def:36 */
+ CC_SWPmode, /* config/arm/arm-modes.def:37 */
+ CCFPmode, /* config/arm/arm-modes.def:38 */
+ CCFPEmode, /* config/arm/arm-modes.def:39 */
+ CC_DNEmode, /* config/arm/arm-modes.def:40 */
+ CC_DEQmode, /* config/arm/arm-modes.def:41 */
+ CC_DLEmode, /* config/arm/arm-modes.def:42 */
+ CC_DLTmode, /* config/arm/arm-modes.def:43 */
+ CC_DGEmode, /* config/arm/arm-modes.def:44 */
+ CC_DGTmode, /* config/arm/arm-modes.def:45 */
+ CC_DLEUmode, /* config/arm/arm-modes.def:46 */
+ CC_DLTUmode, /* config/arm/arm-modes.def:47 */
+ CC_DGEUmode, /* config/arm/arm-modes.def:48 */
+ CC_DGTUmode, /* config/arm/arm-modes.def:49 */
+ CC_Cmode, /* config/arm/arm-modes.def:50 */
+ CC_Nmode, /* config/arm/arm-modes.def:51 */
+ BImode, /* machmode.def:176 */
+ QImode, /* machmode.def:181 */
+ HImode, /* machmode.def:182 */
+ SImode, /* machmode.def:183 */
+ DImode, /* machmode.def:184 */
+ TImode, /* machmode.def:185 */
+ EImode, /* config/arm/arm-modes.def:62 */
+ OImode, /* config/arm/arm-modes.def:63 */
+ CImode, /* config/arm/arm-modes.def:64 */
+ XImode, /* config/arm/arm-modes.def:67 */
+ QQmode, /* machmode.def:204 */
+ HQmode, /* machmode.def:205 */
+ SQmode, /* machmode.def:206 */
+ DQmode, /* machmode.def:207 */
+ TQmode, /* machmode.def:208 */
+ UQQmode, /* machmode.def:210 */
+ UHQmode, /* machmode.def:211 */
+ USQmode, /* machmode.def:212 */
+ UDQmode, /* machmode.def:213 */
+ UTQmode, /* machmode.def:214 */
+ HAmode, /* machmode.def:216 */
+ SAmode, /* machmode.def:217 */
+ DAmode, /* machmode.def:218 */
+ TAmode, /* machmode.def:219 */
+ UHAmode, /* machmode.def:221 */
+ USAmode, /* machmode.def:222 */
+ UDAmode, /* machmode.def:223 */
+ UTAmode, /* machmode.def:224 */
+ SFmode, /* machmode.def:196 */
+ DFmode, /* machmode.def:197 */
+ XFmode, /* config/arm/arm-modes.def:26 */
+ SDmode, /* machmode.def:236 */
+ DDmode, /* machmode.def:237 */
+ TDmode, /* machmode.def:238 */
+ CQImode, /* machmode.def:232 */
+ CHImode, /* machmode.def:232 */
+ CSImode, /* machmode.def:232 */
+ CDImode, /* machmode.def:232 */
+ CTImode, /* machmode.def:232 */
+ CEImode, /* machmode.def:232 */
+ COImode, /* machmode.def:232 */
+ CCImode, /* machmode.def:232 */
+ CXImode, /* machmode.def:232 */
+ SCmode, /* machmode.def:233 */
+ DCmode, /* machmode.def:233 */
+ XCmode, /* machmode.def:233 */
+ V4QImode, /* config/arm/arm-modes.def:54 */
+ V2HImode, /* config/arm/arm-modes.def:54 */
+ V8QImode, /* config/arm/arm-modes.def:55 */
+ V4HImode, /* config/arm/arm-modes.def:55 */
+ V2SImode, /* config/arm/arm-modes.def:55 */
+ V16QImode, /* config/arm/arm-modes.def:56 */
+ V8HImode, /* config/arm/arm-modes.def:56 */
+ V4SImode, /* config/arm/arm-modes.def:56 */
+ V2DImode, /* config/arm/arm-modes.def:56 */
+ V2SFmode, /* config/arm/arm-modes.def:57 */
+ V4SFmode, /* config/arm/arm-modes.def:58 */
+ V2DFmode, /* config/arm/arm-modes.def:58 */
+ MAX_MACHINE_MODE,
+
+ MIN_MODE_RANDOM = VOIDmode,
+ MAX_MODE_RANDOM = BLKmode,
+
+ MIN_MODE_CC = CCmode,
+ MAX_MODE_CC = CC_Nmode,
+
+ MIN_MODE_INT = QImode,
+ MAX_MODE_INT = XImode,
+
+ MIN_MODE_PARTIAL_INT = VOIDmode,
+ MAX_MODE_PARTIAL_INT = VOIDmode,
+
+ MIN_MODE_FRACT = QQmode,
+ MAX_MODE_FRACT = TQmode,
+
+ MIN_MODE_UFRACT = UQQmode,
+ MAX_MODE_UFRACT = UTQmode,
+
+ MIN_MODE_ACCUM = HAmode,
+ MAX_MODE_ACCUM = TAmode,
+
+ MIN_MODE_UACCUM = UHAmode,
+ MAX_MODE_UACCUM = UTAmode,
+
+ MIN_MODE_FLOAT = SFmode,
+ MAX_MODE_FLOAT = XFmode,
+
+ MIN_MODE_DECIMAL_FLOAT = SDmode,
+ MAX_MODE_DECIMAL_FLOAT = TDmode,
+
+ MIN_MODE_COMPLEX_INT = CQImode,
+ MAX_MODE_COMPLEX_INT = CXImode,
+
+ MIN_MODE_COMPLEX_FLOAT = SCmode,
+ MAX_MODE_COMPLEX_FLOAT = XCmode,
+
+ MIN_MODE_VECTOR_INT = V4QImode,
+ MAX_MODE_VECTOR_INT = V2DImode,
+
+ MIN_MODE_VECTOR_FRACT = VOIDmode,
+ MAX_MODE_VECTOR_FRACT = VOIDmode,
+
+ MIN_MODE_VECTOR_UFRACT = VOIDmode,
+ MAX_MODE_VECTOR_UFRACT = VOIDmode,
+
+ MIN_MODE_VECTOR_ACCUM = VOIDmode,
+ MAX_MODE_VECTOR_ACCUM = VOIDmode,
+
+ MIN_MODE_VECTOR_UACCUM = VOIDmode,
+ MAX_MODE_VECTOR_UACCUM = VOIDmode,
+
+ MIN_MODE_VECTOR_FLOAT = V2SFmode,
+ MAX_MODE_VECTOR_FLOAT = V2DFmode,
+
+ NUM_MACHINE_MODES = MAX_MACHINE_MODE
+};
+
+#define CONST_MODE_SIZE const
+#define CONST_MODE_BASE_ALIGN const
+#define CONST_MODE_IBIT const
+#define CONST_MODE_FBIT const
+
+#endif /* insn-modes.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-notes.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-notes.def
new file mode 100644
index 0000000..83161ec
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/insn-notes.def
@@ -0,0 +1,77 @@
+/* Insn note definitions.
+ Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* This file defines all the codes that may appear in the
+ NOTE_LINE_NUMBER field of a NOTE insn for kinds of notes that are
+ not line numbers. Source files define DEF_INSN_NOTE appropriately
+ before including this file.
+
+ We are slowly removing the concept of insn-chain notes from the
+ compiler. Adding new codes to this file is STRONGLY DISCOURAGED.
+ If you think you need one, look for other ways to express what you
+ mean, such as register notes or bits in the basic-block structure. */
+
+/* Shorthand. */
+#define INSN_NOTE(NAME) DEF_INSN_NOTE (NOTE_INSN_##NAME)
+
+/* This note is used to get rid of an insn when it isn't safe to patch
+ the insn out of the chain. */
+INSN_NOTE (DELETED)
+
+/* Generated in place of user-declared labels when they are deleted. */
+INSN_NOTE (DELETED_LABEL)
+
+/* These are used to mark the beginning and end of a lexical block.
+ See NOTE_BLOCK and reorder_blocks. */
+INSN_NOTE (BLOCK_BEG)
+INSN_NOTE (BLOCK_END)
+
+/* This note indicates the start of the real body of the function,
+ i.e. the point just after all of the parms have been moved into
+ their homes, etc. */
+INSN_NOTE (FUNCTION_BEG)
+
+/* This marks the point immediately after the last prologue insn. */
+INSN_NOTE (PROLOGUE_END)
+
+/* This marks the point immediately prior to the first epilogue insn. */
+INSN_NOTE (EPILOGUE_BEG)
+
+/* These note where exception handling regions begin and end.
+ Uses NOTE_EH_HANDLER to identify the region in question. */
+INSN_NOTE (EH_REGION_BEG)
+INSN_NOTE (EH_REGION_END)
+
+/* The location of a variable. */
+INSN_NOTE (VAR_LOCATION)
+
+/* Record the struct for the following basic block. Uses
+ NOTE_BASIC_BLOCK. FIXME: Redundant with the basic block pointer
+ now included in every insn. */
+INSN_NOTE (BASIC_BLOCK)
+
+/* Mark the inflection point in the instruction stream where we switch
+ between hot and cold text sections. */
+INSN_NOTE (SWITCH_TEXT_SECTIONS)
+
+/* Mark the restore point after an epilogue changed CFI data. Used only
+ when an epilogue appears in the middle of a function. */
+INSN_NOTE (CFA_RESTORE_STATE)
+
+#undef INSN_NOTE
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/intl.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/intl.h
new file mode 100644
index 0000000..3b6395f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/intl.h
@@ -0,0 +1,60 @@
+/* intl.h - internationalization
+ Copyright 1998, 2001, 2003, 2004, 2007 Free Software Foundation, Inc.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_INTL_H
+#define GCC_INTL_H
+
+#ifdef HAVE_LOCALE_H
+# include <locale.h>
+#endif
+
+#ifndef HAVE_SETLOCALE
+# define setlocale(category, locale) (locale)
+#endif
+
+#ifdef ENABLE_NLS
+#include <libintl.h>
+extern void gcc_init_libintl (void);
+extern size_t gcc_gettext_width (const char *);
+#else
+/* Stubs. */
+# undef textdomain
+# define textdomain(domain) (domain)
+# undef bindtextdomain
+# define bindtextdomain(domain, directory) (domain)
+# undef gettext
+# define gettext(msgid) (msgid)
+# define gcc_init_libintl() /* nothing */
+# define gcc_gettext_width(s) strlen(s)
+#endif
+
+#ifndef _
+# define _(msgid) gettext (msgid)
+#endif
+
+#ifndef N_
+# define N_(msgid) msgid
+#endif
+
+#ifndef G_
+# define G_(gmsgid) gmsgid
+#endif
+
+extern const char *open_quote;
+extern const char *close_quote;
+
+#endif /* intl.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-reference.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-reference.h
new file mode 100644
index 0000000..ba26ebb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-reference.h
@@ -0,0 +1,33 @@
+/* IPA handling of references.
+ Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Kenneth Zadeck <zadeck@naturalbridge.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_IPA_REFERENCE_H
+#define GCC_IPA_REFERENCE_H
+#include "bitmap.h"
+#include "tree.h"
+
+/* In ipa-reference.c */
+bitmap ipa_reference_get_read_global (struct cgraph_node *fn);
+bitmap ipa_reference_get_written_global (struct cgraph_node *fn);
+bitmap ipa_reference_get_not_read_global (struct cgraph_node *fn);
+bitmap ipa_reference_get_not_written_global (struct cgraph_node *fn);
+
+#endif /* GCC_IPA_REFERENCE_H */
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-utils.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-utils.h
new file mode 100644
index 0000000..ee6417d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ipa-utils.h
@@ -0,0 +1,45 @@
+/* Utilities for ipa analysis.
+ Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
+ Contributed by Kenneth Zadeck <zadeck@naturalbridge.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_IPA_UTILS_H
+#define GCC_IPA_UTILS_H
+#include "tree.h"
+#include "cgraph.h"
+
+struct ipa_dfs_info {
+ int dfn_number;
+ int low_link;
+ bool new_node;
+ bool on_stack;
+ struct cgraph_node* next_cycle;
+ PTR aux;
+};
+
+
+
+/* In ipa-utils.c */
+void ipa_utils_print_order (FILE*, const char *, struct cgraph_node**, int);
+int ipa_utils_reduced_inorder (struct cgraph_node **, bool, bool);
+tree get_base_var (tree);
+
+
+#endif /* GCC_IPA_UTILS_H */
+
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/java/java-tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/java/java-tree.def
new file mode 100644
index 0000000..e565499
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/java/java-tree.def
@@ -0,0 +1,38 @@
+/* This file contains the definitions and documentation for the
+ extra tree codes used by gcj.
+ Copyright (C) 1996, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* Shift right, logical. */
+DEFTREECODE (URSHIFT_EXPR, "urshift_expr", tcc_binary, 2)
+
+/* Return -1, 0, 1 depending on whether the first argument is
+ less, equal, or greater to the second argument. */
+DEFTREECODE (COMPARE_EXPR, "compare_expr", tcc_binary, 2)
+
+/* Same as COMPARE_EXPR, but if either value is NaN, the result is -1. */
+DEFTREECODE (COMPARE_L_EXPR, "compare_l_expr", tcc_binary, 2)
+/* Same as COMPARE_EXPR, but if either value is NaN, the result is 1. */
+DEFTREECODE (COMPARE_G_EXPR, "compare_g_expr", tcc_binary, 2)
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/l-ipo.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/l-ipo.h
new file mode 100644
index 0000000..7cbda26
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/l-ipo.h
@@ -0,0 +1,59 @@
+/* Copyright (C) 2009. Free Software Foundation, Inc.
+ Contributed by Xinliang David Li (davidxl@google.com) and
+ Raksit Ashok (raksit@google.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_L_IPO_H
+#define GCC_L_IPO_H
+
+/* Primary module's id (non-zero). If no module-info was read in, this will
+ be zero. */
+extern unsigned primary_module_id;
+
+/* The macro to test if the compilation is in light weight IPO mode.
+ In this mode, the source module being compiled will be compiled
+ together with 0 or more auxiliary modules. */
+#define L_IPO_COMP_MODE (primary_module_id != 0)
+
+/* The macro to test if the current module being parsed is the
+ primary source module. */
+#define L_IPO_IS_PRIMARY_MODULE (current_module_id == primary_module_id)
+
+/* The macro to test if the current module being parsed is an
+ auxiliary source module. */
+#define L_IPO_IS_AUXILIARY_MODULE (L_IPO_COMP_MODE && current_module_id \
+ && current_module_id != primary_module_id)
+
+/* Current module id. */
+extern unsigned current_module_id;
+extern struct gcov_module_info **module_infos;
+extern bool is_last_module (unsigned mod_id);
+
+extern unsigned num_in_fnames;
+extern int at_eof;
+extern bool parser_parsing_start;
+
+void push_module_scope (void);
+void pop_module_scope (void);
+tree lipo_save_decl (tree src);
+void lipo_restore_decl (tree, tree);
+void add_decl_to_current_module_scope (tree decl, void *b);
+int lipo_cmp_type (tree t1, tree t2);
+tree get_type_or_decl_name (tree);
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/langhooks.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/langhooks.h
new file mode 100644
index 0000000..c560cc1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/langhooks.h
@@ -0,0 +1,526 @@
+/* The lang_hooks data structure.
+ Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_LANG_HOOKS_H
+#define GCC_LANG_HOOKS_H
+
+/* This file should be #include-d after tree.h. */
+
+struct diagnostic_context;
+struct diagnostic_info;
+
+struct gimplify_omp_ctx;
+
+struct array_descr_info;
+
+/* A print hook for print_tree (). */
+typedef void (*lang_print_tree_hook) (FILE *, tree, int indent);
+
+enum classify_record
+ { RECORD_IS_STRUCT, RECORD_IS_CLASS, RECORD_IS_INTERFACE };
+
+/* The following hooks are documented in langhooks.c. Must not be
+ NULL. */
+
+struct lang_hooks_for_tree_inlining
+{
+ bool (*var_mod_type_p) (tree, tree);
+};
+
+struct lang_hooks_for_callgraph
+{
+ /* The node passed is a language-specific tree node. If its contents
+ are relevant to use of other declarations, mark them. */
+ tree (*analyze_expr) (tree *, int *);
+
+ /* Emit thunks associated to function. */
+ void (*emit_associated_thunks) (tree);
+};
+
+/* The following hooks are used by tree-dump.c. */
+
+struct lang_hooks_for_tree_dump
+{
+ /* Dump language-specific parts of tree nodes. Returns nonzero if it
+ does not want the usual dumping of the second argument. */
+ bool (*dump_tree) (void *, tree);
+
+ /* Determine type qualifiers in a language-specific way. */
+ int (*type_quals) (const_tree);
+};
+
+/* Hooks related to types. */
+
+struct lang_hooks_for_types
+{
+ /* Return a new type (with the indicated CODE), doing whatever
+ language-specific processing is required. */
+ tree (*make_type) (enum tree_code);
+
+ /* Return what kind of RECORD_TYPE this is, mainly for purposes of
+ debug information. If not defined, record types are assumed to
+ be structures. */
+ enum classify_record (*classify_record) (tree);
+
+ /* Given MODE and UNSIGNEDP, return a suitable type-tree with that
+ mode. */
+ tree (*type_for_mode) (enum machine_mode, int);
+
+ /* Given PRECISION and UNSIGNEDP, return a suitable type-tree for an
+ integer type with at least that precision. */
+ tree (*type_for_size) (unsigned, int);
+
+ /* True if the type is an instantiation of a generic type,
+ e.g. C++ template implicit specializations. */
+ bool (*generic_p) (const_tree);
+
+ /* Given a type, apply default promotions to unnamed function
+ arguments and return the new type. Return the same type if no
+ change. Required by any language that supports variadic
+ arguments. The default hook dies. */
+ tree (*type_promotes_to) (tree);
+
+ /* Register TYPE as a builtin type with the indicated NAME. The
+ TYPE is placed in the outermost lexical scope. The semantics
+ should be analogous to:
+
+ typedef TYPE NAME;
+
+ in C. The default hook ignores the declaration. */
+ void (*register_builtin_type) (tree, const char *);
+
+ /* This routine is called in tree.c to print an error message for
+ invalid use of an incomplete type. VALUE is the expression that
+ was used (or 0 if that isn't known) and TYPE is the type that was
+ invalid. */
+ void (*incomplete_type_error) (const_tree value, const_tree type);
+
+ /* Called from assign_temp to return the maximum size, if there is one,
+ for a type. */
+ tree (*max_size) (const_tree);
+
+ /* Register language specific type size variables as potentially OpenMP
+ firstprivate variables. */
+ void (*omp_firstprivatize_type_sizes) (struct gimplify_omp_ctx *, tree);
+
+ /* Return TRUE if TYPE1 and TYPE2 are identical for type hashing purposes.
+ Called only after doing all language independent checks.
+ At present, this function is only called when both TYPE1 and TYPE2 are
+ FUNCTION_TYPEs. */
+ bool (*type_hash_eq) (const_tree, const_tree);
+
+ /* Return TRUE if TYPE uses a hidden descriptor and fills in information
+ for the debugger about the array bounds, strides, etc. */
+ bool (*get_array_descr_info) (const_tree, struct array_descr_info *);
+
+ /* If we requested a pointer to a vector, build up the pointers that
+ we stripped off while looking for the inner type. Similarly for
+ return values from functions. The argument TYPE is the top of the
+ chain, and BOTTOM is the new type which we will point to. */
+ tree (*reconstruct_complex_type) (tree, tree);
+
+ /* Nonzero if types that are identical are to be hashed so that only
+ one copy is kept. If a language requires unique types for each
+ user-specified type, such as Ada, this should be set to TRUE. */
+ bool hash_types;
+};
+
+/* Language hooks related to decls and the symbol table. */
+
+struct lang_hooks_for_decls
+{
+ /* Returns nonzero if we are in the global binding level. Ada
+ returns -1 for an undocumented reason used in stor-layout.c. */
+ int (*global_bindings_p) (void);
+
+ /* Function to add a decl to the current scope level. Takes one
+ argument, a decl to add. Returns that decl, or, if the same
+ symbol is already declared, may return a different decl for that
+ name. */
+ tree (*pushdecl) (tree);
+
+ /* Returns the chain of decls so far in the current scope level. */
+ tree (*getdecls) (void);
+
+ /* Returns true when we should warn for an unused global DECL.
+ We will already have checked that it has static binding. */
+ bool (*warn_unused_global) (const_tree);
+
+ /* Obtain a list of globals and do final output on them at end
+ of compilation */
+ void (*final_write_globals) (void);
+
+ /* True if this decl may be called via a sibcall. */
+ bool (*ok_for_sibcall) (const_tree);
+
+ /* Return the COMDAT group into which this DECL should be placed.
+ It is known that the DECL belongs in *some* COMDAT group when
+ this hook is called. The return value will be used immediately,
+ but not explicitly deallocated, so implementations should not use
+ xmalloc to allocate the string returned. (Typically, the return
+ value will be the string already stored in an
+ IDENTIFIER_NODE.) */
+ const char * (*comdat_group) (tree);
+
+ /* True if OpenMP should privatize what this DECL points to rather
+ than the DECL itself. */
+ bool (*omp_privatize_by_reference) (const_tree);
+
+ /* Return sharing kind if OpenMP sharing attribute of DECL is
+ predetermined, OMP_CLAUSE_DEFAULT_UNSPECIFIED otherwise. */
+ enum omp_clause_default_kind (*omp_predetermined_sharing) (tree);
+
+ /* Return true if DECL's DECL_VALUE_EXPR (if any) should be
+ disregarded in OpenMP construct, because it is going to be
+ remapped during OpenMP lowering. SHARED is true if DECL
+ is going to be shared, false if it is going to be privatized. */
+ bool (*omp_disregard_value_expr) (tree, bool);
+
+ /* Return true if DECL that is shared iff SHARED is true should
+ be put into OMP_CLAUSE_PRIVATE_DEBUG. */
+ bool (*omp_private_debug_clause) (tree, bool);
+
+ /* Return true if DECL in private clause needs
+ OMP_CLAUSE_PRIVATE_OUTER_REF on the private clause. */
+ bool (*omp_private_outer_ref) (tree);
+
+ /* Build and return code for a default constructor for DECL in
+ response to CLAUSE. OUTER is corresponding outer region's
+ variable if needed. Return NULL if nothing to be done. */
+ tree (*omp_clause_default_ctor) (tree clause, tree decl, tree outer);
+
+ /* Build and return code for a copy constructor from SRC to DST. */
+ tree (*omp_clause_copy_ctor) (tree clause, tree dst, tree src);
+
+ /* Similarly, except use an assignment operator instead. */
+ tree (*omp_clause_assign_op) (tree clause, tree dst, tree src);
+
+ /* Build and return code destructing DECL. Return NULL if nothing
+ to be done. */
+ tree (*omp_clause_dtor) (tree clause, tree decl);
+
+ /* Do language specific checking on an implicitly determined clause. */
+ void (*omp_finish_clause) (tree clause);
+
+ /* Return true if DECL is a global destructor. */
+ bool (*is_decl_dtor) (tree decl);
+
+ /* Return true if DECL is a vptr field. */
+ bool (*is_vptr_field) (tree decl);
+
+ /* Return true if TYPE is a polymorphic type. */
+ bool (*is_type_polymorphic) (tree type);
+
+ /* Return true if DECL is global delete. */
+ bool (*is_global_delete_fndecl) (tree decl);
+};
+
+/* Lang hooks for LIPO. */
+
+struct lang_hooks_for_lipo
+{
+ /* Add DECL to the list of predefined builtins. */
+ void (*add_built_in_decl) (tree decl);
+
+ /* Save the tree (by making a copy) and binding values
+ for builtins before parsing start. */
+ void (*save_built_in_decl_pre_parsing) (void);
+
+ /* Restore builtins and their bindings to their values
+ before parsing. */
+ void (*restore_built_in_decl_pre_parsing) (void);
+
+ /* Save the tree (by making a copy) and binding values for
+ builtins after parsing of a file. */
+ void (*save_built_in_decl_post_module_parsing) (void);
+
+ /* Restore builtins and their bindings to their post
+ parsing values. */
+ void (*restore_built_in_decl_post_module_parsing) (void);
+
+ /* Clear symbol binding for name ID. */
+ void (*clear_global_name_bindings) (tree id);
+
+ /* Return true if DECL in SCOPE is scoped in global/namespace scope,
+ otherwise return false. */
+ bool (*has_global_name) (tree decl, void *scope);
+
+ /* Return the actual size of the lang_decl struct for
+ decl T. */
+ int (*get_lang_decl_size) (tree t);
+
+ /* Duplicate language specific type information from SRC
+ to DEST. */
+ void (*dup_lang_type) (tree src, tree dest);
+
+ /* Copy DEST into SRC. */
+ void (*copy_lang_type) (tree src, tree dest);
+
+ /* Process decls after parsing of a source module. */
+ void (*process_pending_decls) (unsigned);
+
+ /* Clear the list of deferred functions. */
+ void (*clear_deferred_fns) (void);
+
+ /* Return true if T is compiler generated. */
+ bool (*is_compiler_generated_type) (tree t);
+
+ /* Compare language specific types T1 and T2.
+ Return 1 if they are compatible. */
+ int (*cmp_lang_type) (tree t1, tree t2);
+};
+
+/* Language-specific hooks. See langhooks-def.h for defaults. */
+
+struct lang_hooks
+{
+ /* String identifying the front end. e.g. "GNU C++". */
+ const char *name;
+
+ /* sizeof (struct lang_identifier), so make_node () creates
+ identifier nodes long enough for the language-specific slots. */
+ size_t identifier_size;
+
+ /* Determines the size of any language-specific tcc_constant or
+ tcc_exceptional nodes. Since it is called from make_node, the
+ only information available is the tree code. Expected to die
+ on unrecognized codes. */
+ size_t (*tree_size) (enum tree_code);
+
+ /* The first callback made to the front end, for simple
+ initialization needed before any calls to handle_option. Return
+ the language mask to filter the switch array with. */
+ unsigned int (*init_options) (unsigned int argc, const char **argv);
+
+ /* Callback used to perform language-specific initialization for the
+ global diagnostic context structure. */
+ void (*initialize_diagnostics) (struct diagnostic_context *);
+
+ /* Handle the switch CODE, which has real type enum opt_code from
+ options.h. If the switch takes an argument, it is passed in ARG
+ which points to permanent storage. The handler is responsible for
+ checking whether ARG is NULL, which indicates that no argument
+ was in fact supplied. For -f and -W switches, VALUE is 1 or 0
+ for the positive and negative forms respectively.
+
+ Return 1 if the switch is valid, 0 if invalid, and -1 if it's
+ valid and should not be treated as language-independent too. */
+ int (*handle_option) (size_t code, const char *arg, int value);
+
+ /* Return false to use the default complaint about a missing
+ argument, otherwise output a complaint and return true. */
+ bool (*missing_argument) (const char *opt, size_t code);
+
+ /* Called when all command line options have been parsed to allow
+ further processing and initialization
+
+ Should return true to indicate that a compiler back-end is
+ not required, such as with the -E option.
+
+ If errorcount is nonzero after this call the compiler exits
+ immediately and the finish hook is not called. */
+ bool (*post_options) (const char **);
+
+ /* Called after post_options to initialize the front end. Return
+ false to indicate that no further compilation be performed, in
+ which case the finish hook is called immediately. */
+ bool (*init) (void);
+
+ /* Called at the end of compilation, as a finalizer. */
+ void (*finish) (void);
+
+ /* Parses the entire file. The argument is nonzero to cause bison
+ parsers to dump debugging information during parsing. */
+ void (*parse_file) (int);
+
+ /* Determines if it's ok for a function to have no noreturn attribute. */
+ bool (*missing_noreturn_ok_p) (tree);
+
+ /* Called to obtain the alias set to be used for an expression or type.
+ Returns -1 if the language does nothing special for it. */
+ alias_set_type (*get_alias_set) (tree);
+
+ /* Called by expand_expr for language-specific tree codes.
+ Fourth argument is actually an enum expand_modifier. */
+ rtx (*expand_expr) (tree, rtx, enum machine_mode, int, rtx *);
+
+ /* Function to finish handling an incomplete decl at the end of
+ compilation. Default hook is does nothing. */
+ void (*finish_incomplete_decl) (tree);
+
+ /* Mark EXP saying that we need to be able to take the address of
+ it; it should not be allocated in a register. Return true if
+ successful. */
+ bool (*mark_addressable) (tree);
+
+ /* Hook called by staticp for language-specific tree codes. */
+ tree (*staticp) (tree);
+
+ /* Replace the DECL_LANG_SPECIFIC data, which may be NULL, of the
+ DECL_NODE with a newly GC-allocated copy. */
+ void (*dup_lang_specific_decl) (tree);
+
+ /* Set the DECL_ASSEMBLER_NAME for a node. If it is the sort of
+ thing that the assembler should talk about, set
+ DECL_ASSEMBLER_NAME to an appropriate IDENTIFIER_NODE.
+ Otherwise, set it to the ERROR_MARK_NODE to ensure that the
+ assembler does not talk about it. */
+ void (*set_decl_assembler_name) (tree);
+
+ /* The front end can add its own statistics to -fmem-report with
+ this hook. It should output to stderr. */
+ void (*print_statistics) (void);
+
+ /* Called by print_tree when there is a tree of class tcc_exceptional
+ that it doesn't know how to display. */
+ lang_print_tree_hook print_xnode;
+
+ /* Called to print language-dependent parts of tcc_decl, tcc_type,
+ and IDENTIFIER_NODE nodes. */
+ lang_print_tree_hook print_decl;
+ lang_print_tree_hook print_type;
+ lang_print_tree_hook print_identifier;
+
+ /* Computes the name to use to print a declaration. DECL is the
+ non-NULL declaration in question. VERBOSITY determines what
+ information will be printed: 0: DECL_NAME, demangled as
+ necessary. 1: and scope information. 2: and any other
+ information that might be interesting, such as function parameter
+ types in C++. */
+ const char *(*decl_printable_name) (tree decl, int verbosity);
+
+ /* Computes the dwarf-2/3 name for a tree. VERBOSITY determines what
+ information will be printed: 0: DECL_NAME, demangled as
+ necessary. 1: and scope information. */
+ const char *(*dwarf_name) (tree, int verbosity);
+
+ /* This compares two types for equivalence ("compatible" in C-based languages).
+ This routine should only return 1 if it is sure. It should not be used
+ in contexts where erroneously returning 0 causes problems. */
+ int (*types_compatible_p) (tree x, tree y);
+
+ /* Called by report_error_function to print out function name. */
+ void (*print_error_function) (struct diagnostic_context *, const char *,
+ struct diagnostic_info *);
+
+ /* Called from expr_size to calculate the size of the value of an
+ expression in a language-dependent way. Returns a tree for the size
+ in bytes. A frontend can call lhd_expr_size to get the default
+ semantics in cases that it doesn't want to handle specially. */
+ tree (*expr_size) (const_tree);
+
+ /* Convert a character from the host's to the target's character
+ set. The character should be in what C calls the "basic source
+ character set" (roughly, the set of characters defined by plain
+ old ASCII). The default is to return the character unchanged,
+ which is correct in most circumstances. Note that both argument
+ and result should be sign-extended under -fsigned-char,
+ zero-extended under -fno-signed-char. */
+ HOST_WIDE_INT (*to_target_charset) (HOST_WIDE_INT);
+
+ /* Pointers to machine-independent attribute tables, for front ends
+ using attribs.c. If one is NULL, it is ignored. Respectively, a
+ table of attributes specific to the language, a table of
+ attributes common to two or more languages (to allow easy
+ sharing), and a table of attributes for checking formats. */
+ const struct attribute_spec *attribute_table;
+ const struct attribute_spec *common_attribute_table;
+ const struct attribute_spec *format_attribute_table;
+
+ struct lang_hooks_for_tree_inlining tree_inlining;
+
+ struct lang_hooks_for_callgraph callgraph;
+
+ struct lang_hooks_for_tree_dump tree_dump;
+
+ struct lang_hooks_for_decls decls;
+
+ struct lang_hooks_for_types types;
+
+ struct lang_hooks_for_lipo l_ipo;
+
+ /* Perform language-specific gimplification on the argument. Returns an
+ enum gimplify_status, though we can't see that type here. */
+ int (*gimplify_expr) (tree *, gimple_seq *, gimple_seq *);
+
+ /* Return the virtual function decl for the given OBJ_TYPE_REF expression. */
+ tree (*get_virtual_function_decl) (tree, tree);
+
+ /* Fold an OBJ_TYPE_REF expression to the address of a function.
+ KNOWN_TYPE carries the true type of the OBJ_TYPE_REF_OBJECT. */
+ tree (*fold_obj_type_ref) (tree, tree);
+
+ /* Determine whether the given DECL is a compiler-generated base field
+ in a derived class. */
+ bool (*decl_is_base_field) (tree);
+
+ /* Return true if DECL is a constructor. */
+ bool (*decl_is_constructor) (tree);
+
+ /* Return true if DECL is a destructor. */
+ bool (*decl_is_destructor) (tree);
+
+ /* Return
+ 1 if decl is a const member function,
+ 2 if decl is not a const member function but has a const overload that
+ has identical parameter list,
+ 0 otherwise. */
+ int (*decl_is_const_member_func) (tree);
+
+ /* Do language specific processing in the builtin function DECL */
+ tree (*builtin_function) (tree decl);
+
+ /* Like builtin_function, but make sure the scope is the external scope.
+ This is used to delay putting in back end builtin functions until the ISA
+ that defines the builtin is declared via function specific target options,
+ which can save memory for machines like the x86_64 that have multiple
+ ISAs. If this points to the same function as builtin_function, the
+ backend must add all of the builtins at program initialization time. */
+ tree (*builtin_function_ext_scope) (tree decl);
+
+ /* Returns true if DECL is a user defined conversion operator (C++). */
+ bool (*user_conv_function_p) (tree decl);
+
+ /* Used to set up the tree_contains_structure array for a frontend. */
+ void (*init_ts) (void);
+
+ /* Called by recompute_tree_invariant_for_addr_expr to go from EXPR
+ to a contained expression or DECL, possibly updating *TC or *SE
+ if in the process TREE_CONSTANT or TREE_SIDE_EFFECTS need updating. */
+ tree (*expr_to_decl) (tree expr, bool *tc, bool *se);
+
+ /* Whenever you add entries here, make sure you adjust langhooks-def.h
+ and langhooks.c accordingly. */
+};
+
+/* Each front end provides its own. */
+extern const struct lang_hooks lang_hooks;
+extern tree add_builtin_function (const char *name, tree type,
+ int function_code, enum built_in_class cl,
+ const char *library_name,
+ tree attrs);
+
+extern tree add_builtin_function_ext_scope (const char *name, tree type,
+ int function_code,
+ enum built_in_class cl,
+ const char *library_name,
+ tree attrs);
+
+#endif /* GCC_LANG_HOOKS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/libiberty.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/libiberty.h
new file mode 100644
index 0000000..e3eca9d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/libiberty.h
@@ -0,0 +1,662 @@
+/* Function declarations for libiberty.
+
+ Copyright 2001, 2002, 2005, 2007 Free Software Foundation, Inc.
+
+ Note - certain prototypes declared in this header file are for
+ functions whoes implementation copyright does not belong to the
+ FSF. Those prototypes are present in this file for reference
+ purposes only and their presence in this file should not construed
+ as an indication of ownership by the FSF of the implementation of
+ those functions in any way or form whatsoever.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA.
+
+ Written by Cygnus Support, 1994.
+
+ The libiberty library provides a number of functions which are
+ missing on some operating systems. We do not declare those here,
+ to avoid conflicts with the system header files on operating
+ systems that do support those functions. In this file we only
+ declare those functions which are specific to libiberty. */
+
+#ifndef LIBIBERTY_H
+#define LIBIBERTY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+
+/* Get a definition for size_t. */
+#include <stddef.h>
+/* Get a definition for va_list. */
+#include <stdarg.h>
+
+#include <stdio.h>
+
+/* If the OS supports it, ensure that the supplied stream is setup to
+ avoid any multi-threaded locking. Otherwise leave the FILE pointer
+ unchanged. If the stream is NULL do nothing. */
+
+extern void unlock_stream (FILE *);
+
+/* If the OS supports it, ensure that the standard I/O streams, stdin,
+ stdout and stderr are setup to avoid any multi-threaded locking.
+ Otherwise do nothing. */
+
+extern void unlock_std_streams (void);
+
+/* Open and return a FILE pointer. If the OS supports it, ensure that
+ the stream is setup to avoid any multi-threaded locking. Otherwise
+ return the FILE pointer unchanged. */
+
+extern FILE *fopen_unlocked (const char *, const char *);
+extern FILE *fdopen_unlocked (int, const char *);
+extern FILE *freopen_unlocked (const char *, const char *, FILE *);
+
+/* Build an argument vector from a string. Allocates memory using
+ malloc. Use freeargv to free the vector. */
+
+extern char **buildargv (const char *) ATTRIBUTE_MALLOC;
+
+/* Free a vector returned by buildargv. */
+
+extern void freeargv (char **);
+
+/* Duplicate an argument vector. Allocates memory using malloc. Use
+ freeargv to free the vector. */
+
+extern char **dupargv (char **) ATTRIBUTE_MALLOC;
+
+/* Expand "@file" arguments in argv. */
+
+extern void expandargv PARAMS ((int *, char ***));
+
+/* Write argv to an @-file, inserting necessary quoting. */
+
+extern int writeargv PARAMS ((char **, FILE *));
+
+/* Return the last component of a path name. Note that we can't use a
+ prototype here because the parameter is declared inconsistently
+ across different systems, sometimes as "char *" and sometimes as
+ "const char *" */
+
+/* HAVE_DECL_* is a three-state macro: undefined, 0 or 1. If it is
+ undefined, we haven't run the autoconf check so provide the
+ declaration without arguments. If it is 0, we checked and failed
+ to find the declaration so provide a fully prototyped one. If it
+ is 1, we found it so don't provide any declaration at all. */
+#if !HAVE_DECL_BASENAME
+#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__OpenBSD__) || defined(__NetBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) || defined (HAVE_DECL_BASENAME)
+extern char *basename (const char *);
+#else
+/* Do not allow basename to be used if there is no prototype seen. We
+ either need to use the above prototype or have one from
+ autoconf which would result in HAVE_DECL_BASENAME being set. */
+#define basename basename_cannot_be_used_without_a_prototype
+#endif
+#endif
+
+/* A well-defined basename () that is always compiled in. */
+
+extern const char *lbasename (const char *);
+
+/* A well-defined realpath () that is always compiled in. */
+
+extern char *lrealpath (const char *);
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. */
+
+extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. The first argument is
+ not one of the strings to be concatenated, but if not NULL is a
+ pointer to be freed after the new string is created, similar to the
+ way xrealloc works. */
+
+extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Determine the length of concatenating an arbitrary number of
+ strings. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. */
+
+extern unsigned long concat_length (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a SUPPLIED area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a GLOBAL area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy2 (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* This is the global area used by concat_copy2. */
+
+extern char *libiberty_concat_ptr;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using alloca. The arguments are
+ evaluated twice! */
+#define ACONCAT(ACONCAT_PARAMS) \
+ (libiberty_concat_ptr = (char *) alloca (concat_length ACONCAT_PARAMS + 1), \
+ concat_copy2 ACONCAT_PARAMS)
+
+/* Check whether two file descriptors refer to the same file. */
+
+extern int fdmatch (int fd1, int fd2);
+
+/* Return the position of the first bit set in the argument. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#if defined (HAVE_DECL_FFS) && !HAVE_DECL_FFS
+extern int ffs(int);
+#endif
+
+/* Get the working directory. The result is cached, so don't call
+ chdir() between calls to getpwd(). */
+
+extern char * getpwd (void);
+
+/* Get the current time. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#ifdef __MINGW32__
+/* Forward declaration to avoid #include <sys/time.h>. */
+struct timeval;
+extern int gettimeofday (struct timeval *, void *);
+#endif
+
+/* Get the amount of time the process has run, in microseconds. */
+
+extern long get_run_time (void);
+
+/* Generate a relocated path to some installation directory. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Generate a relocated path to some installation directory without
+ attempting to follow any soft links. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix_ignore_links (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Choose a temporary directory to use for scratch files. */
+
+extern char *choose_temp_base (void) ATTRIBUTE_MALLOC;
+
+/* Return a temporary file name or NULL if unable to create one. */
+
+extern char *make_temp_file (const char *) ATTRIBUTE_MALLOC;
+
+/* Remove a link to a file unless it is special. */
+
+extern int unlink_if_ordinary (const char *);
+
+/* Allocate memory filled with spaces. Allocates using malloc. */
+
+extern const char *spaces (int count);
+
+/* Return the maximum error number for which strerror will return a
+ string. */
+
+extern int errno_max (void);
+
+/* Return the name of an errno value (e.g., strerrno (EINVAL) returns
+ "EINVAL"). */
+
+extern const char *strerrno (int);
+
+/* Given the name of an errno value, return the value. */
+
+extern int strtoerrno (const char *);
+
+/* ANSI's strerror(), but more robust. */
+
+extern char *xstrerror (int);
+
+/* Return the maximum signal number for which strsignal will return a
+ string. */
+
+extern int signo_max (void);
+
+/* Return a signal message string for a signal number
+ (e.g., strsignal (SIGHUP) returns something like "Hangup"). */
+/* This is commented out as it can conflict with one in system headers.
+ We still document its existence though. */
+
+/*extern const char *strsignal (int);*/
+
+/* Return the name of a signal number (e.g., strsigno (SIGHUP) returns
+ "SIGHUP"). */
+
+extern const char *strsigno (int);
+
+/* Given the name of a signal, return its number. */
+
+extern int strtosigno (const char *);
+
+/* Register a function to be run by xexit. Returns 0 on success. */
+
+extern int xatexit (void (*fn) (void));
+
+/* Exit, calling all the functions registered with xatexit. */
+
+extern void xexit (int status) ATTRIBUTE_NORETURN;
+
+/* Set the program name used by xmalloc. */
+
+extern void xmalloc_set_program_name (const char *);
+
+/* Report an allocation failure. */
+extern void xmalloc_failed (size_t) ATTRIBUTE_NORETURN;
+
+/* Allocate memory without fail. If malloc fails, this will print a
+ message to stderr (using the name set by xmalloc_set_program_name,
+ if any) and then call xexit. */
+
+extern void *xmalloc (size_t) ATTRIBUTE_MALLOC;
+
+/* Reallocate memory without fail. This works like xmalloc. Note,
+ realloc type functions are not suitable for attribute malloc since
+ they may return the same address across multiple calls. */
+
+extern void *xrealloc (void *, size_t);
+
+/* Allocate memory without fail and set it to zero. This works like
+ xmalloc. */
+
+extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy a string into a memory buffer without fail. */
+
+extern char *xstrdup (const char *) ATTRIBUTE_MALLOC;
+
+/* Copy at most N characters from string into a buffer without fail. */
+
+extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy an existing memory buffer to a new memory buffer without fail. */
+
+extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Physical memory routines. Return values are in BYTES. */
+extern double physmem_total (void);
+extern double physmem_available (void);
+
+
+/* These macros provide a K&R/C89/C++-friendly way of allocating structures
+ with nice encapsulation. The XDELETE*() macros are technically
+ superfluous, but provided here for symmetry. Using them consistently
+ makes it easier to update client code to use different allocators such
+ as new/delete and new[]/delete[]. */
+
+/* Scalar allocators. */
+
+#define XALLOCA(T) ((T *) alloca (sizeof (T)))
+#define XNEW(T) ((T *) xmalloc (sizeof (T)))
+#define XCNEW(T) ((T *) xcalloc (1, sizeof (T)))
+#define XDUP(T, P) ((T *) xmemdup ((P), sizeof (T), sizeof (T)))
+#define XDELETE(P) free ((void*) (P))
+
+/* Array allocators. */
+
+#define XALLOCAVEC(T, N) ((T *) alloca (sizeof (T) * (N)))
+#define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N)))
+#define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T)))
+#define XDUPVEC(T, P, N) ((T *) xmemdup ((P), sizeof (T) * (N), sizeof (T) * (N)))
+#define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N)))
+#define XDELETEVEC(P) free ((void*) (P))
+
+/* Allocators for variable-sized structures and raw buffers. */
+
+#define XALLOCAVAR(T, S) ((T *) alloca ((S)))
+#define XNEWVAR(T, S) ((T *) xmalloc ((S)))
+#define XCNEWVAR(T, S) ((T *) xcalloc (1, (S)))
+#define XDUPVAR(T, P, S1, S2) ((T *) xmemdup ((P), (S1), (S2)))
+#define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S)))
+
+/* Type-safe obstack allocator. */
+
+#define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T)))
+#define XOBNEWVEC(O, T, N) ((T *) obstack_alloc ((O), sizeof (T) * (N)))
+#define XOBNEWVAR(O, T, S) ((T *) obstack_alloc ((O), (S)))
+#define XOBFINISH(O, T) ((T) obstack_finish ((O)))
+
+/* hex character manipulation routines */
+
+#define _hex_array_size 256
+#define _hex_bad 99
+extern const unsigned char _hex_value[_hex_array_size];
+extern void hex_init (void);
+#define hex_p(c) (hex_value (c) != _hex_bad)
+/* If you change this, note well: Some code relies on side effects in
+ the argument being performed exactly once. */
+#define hex_value(c) ((unsigned int) _hex_value[(unsigned char) (c)])
+
+/* Flags for pex_init. These are bits to be or'ed together. */
+
+/* Record subprocess times, if possible. */
+#define PEX_RECORD_TIMES 0x1
+
+/* Use pipes for communication between processes, if possible. */
+#define PEX_USE_PIPES 0x2
+
+/* Save files used for communication between processes. */
+#define PEX_SAVE_TEMPS 0x4
+
+/* Prepare to execute one or more programs, with standard output of
+ each program fed to standard input of the next.
+ FLAGS As above.
+ PNAME The name of the program to report in error messages.
+ TEMPBASE A base name to use for temporary files; may be NULL to
+ use a random name.
+ Returns NULL on error. */
+
+extern struct pex_obj *pex_init (int flags, const char *pname,
+ const char *tempbase);
+
+/* Flags for pex_run. These are bits to be or'ed together. */
+
+/* Last program in pipeline. Standard output of program goes to
+ OUTNAME, or, if OUTNAME is NULL, to standard output of caller. Do
+ not set this if you want to call pex_read_output. After this is
+ set, pex_run may no longer be called with the same struct
+ pex_obj. */
+#define PEX_LAST 0x1
+
+/* Search for program in executable search path. */
+#define PEX_SEARCH 0x2
+
+/* OUTNAME is a suffix. */
+#define PEX_SUFFIX 0x4
+
+/* Send program's standard error to standard output. */
+#define PEX_STDERR_TO_STDOUT 0x8
+
+/* Input file should be opened in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_INPUT 0x10
+
+/* Output file should be opened in binary mode. This flag is ignored
+ on Unix. For proper behaviour PEX_BINARY_INPUT and
+ PEX_BINARY_OUTPUT have to match appropriately--i.e., a call using
+ PEX_BINARY_OUTPUT should be followed by a call using
+ PEX_BINARY_INPUT. */
+#define PEX_BINARY_OUTPUT 0x20
+
+/* Capture stderr to a pipe. The output can be read by
+ calling pex_read_err and reading from the returned
+ FILE object. This flag may be specified only for
+ the last program in a pipeline.
+
+ This flag is supported only on Unix and Windows. */
+#define PEX_STDERR_TO_PIPE 0x40
+
+/* Capture stderr in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_ERROR 0x80
+
+
+/* Execute one program. Returns NULL on success. On error returns an
+ error string (typically just the name of a system call); the error
+ string is statically allocated.
+
+ OBJ Returned by pex_init.
+
+ FLAGS As above.
+
+ EXECUTABLE The program to execute.
+
+ ARGV NULL terminated array of arguments to pass to the program.
+
+ OUTNAME Sets the output file name as follows:
+
+ PEX_SUFFIX set (OUTNAME may not be NULL):
+ TEMPBASE parameter to pex_init not NULL:
+ Output file name is the concatenation of TEMPBASE
+ and OUTNAME.
+ TEMPBASE is NULL:
+ Output file name is a random file name ending in
+ OUTNAME.
+ PEX_SUFFIX not set:
+ OUTNAME not NULL:
+ Output file name is OUTNAME.
+ OUTNAME NULL, TEMPBASE not NULL:
+ Output file name is randomly chosen using
+ TEMPBASE.
+ OUTNAME NULL, TEMPBASE NULL:
+ Output file name is randomly chosen.
+
+ If PEX_LAST is not set, the output file name is the
+ name to use for a temporary file holding stdout, if
+ any (there will not be a file if PEX_USE_PIPES is set
+ and the system supports pipes). If a file is used, it
+ will be removed when no longer needed unless
+ PEX_SAVE_TEMPS is set.
+
+ If PEX_LAST is set, and OUTNAME is not NULL, standard
+ output is written to the output file name. The file
+ will not be removed. If PEX_LAST and PEX_SUFFIX are
+ both set, TEMPBASE may not be NULL.
+
+ ERRNAME If not NULL, this is the name of a file to which
+ standard error is written. If NULL, standard error of
+ the program is standard error of the caller.
+
+ ERR On an error return, *ERR is set to an errno value, or
+ to 0 if there is no relevant errno.
+*/
+
+extern const char *pex_run (struct pex_obj *obj, int flags,
+ const char *executable, char * const *argv,
+ const char *outname, const char *errname,
+ int *err);
+
+/* As for pex_run (), but takes an extra parameter to enable the
+ environment for the child process to be specified.
+
+ ENV The environment for the child process, specified as
+ an array of character pointers. Each element of the
+ array should point to a string of the form VAR=VALUE,
+ with the exception of the last element which must be
+ a null pointer.
+*/
+
+extern const char *pex_run_in_environment (struct pex_obj *obj, int flags,
+ const char *executable,
+ char * const *argv,
+ char * const *env,
+ const char *outname,
+ const char *errname, int *err);
+
+/* Return a stream for a temporary file to pass to the first program
+ in the pipeline as input. The file name is chosen as for pex_run.
+ pex_run closes the file automatically; don't close it yourself. */
+
+extern FILE *pex_input_file (struct pex_obj *obj, int flags,
+ const char *in_name);
+
+/* Return a stream for a pipe connected to the standard input of the
+ first program in the pipeline. You must have passed
+ `PEX_USE_PIPES' to `pex_init'. Close the returned stream
+ yourself. */
+
+extern FILE *pex_input_pipe (struct pex_obj *obj, int binary);
+
+/* Read the standard output of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_output (struct pex_obj *, int binary);
+
+/* Read the standard error of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_err (struct pex_obj *, int binary);
+
+/* Return exit status of all programs in VECTOR. COUNT indicates the
+ size of VECTOR. The status codes in the vector are in the order of
+ the calls to pex_run. Returns 0 on error, 1 on success. */
+
+extern int pex_get_status (struct pex_obj *, int count, int *vector);
+
+/* Return times of all programs in VECTOR. COUNT indicates the size
+ of VECTOR. struct pex_time is really just struct timeval, but that
+ is not portable to all systems. Returns 0 on error, 1 on
+ success. */
+
+struct pex_time
+{
+ unsigned long user_seconds;
+ unsigned long user_microseconds;
+ unsigned long system_seconds;
+ unsigned long system_microseconds;
+};
+
+extern int pex_get_times (struct pex_obj *, int count,
+ struct pex_time *vector);
+
+/* Clean up a pex_obj. If you have not called pex_get_times or
+ pex_get_status, this will try to kill the subprocesses. */
+
+extern void pex_free (struct pex_obj *);
+
+/* Just execute one program. Return value is as for pex_run.
+ FLAGS Combination of PEX_SEARCH and PEX_STDERR_TO_STDOUT.
+ EXECUTABLE As for pex_run.
+ ARGV As for pex_run.
+ PNAME As for pex_init.
+ OUTNAME As for pex_run when PEX_LAST is set.
+ ERRNAME As for pex_run.
+ STATUS Set to exit status on success.
+ ERR As for pex_run.
+*/
+
+extern const char *pex_one (int flags, const char *executable,
+ char * const *argv, const char *pname,
+ const char *outname, const char *errname,
+ int *status, int *err);
+
+/* pexecute and pwait are the old pexecute interface, still here for
+ backward compatibility. Don't use these for new code. Instead,
+ use pex_init/pex_run/pex_get_status/pex_free, or pex_one. */
+
+/* Definitions used by the pexecute routine. */
+
+#define PEXECUTE_FIRST 1
+#define PEXECUTE_LAST 2
+#define PEXECUTE_ONE (PEXECUTE_FIRST + PEXECUTE_LAST)
+#define PEXECUTE_SEARCH 4
+#define PEXECUTE_VERBOSE 8
+
+/* Execute a program. */
+
+extern int pexecute (const char *, char * const *, const char *,
+ const char *, char **, char **, int);
+
+/* Wait for pexecute to finish. */
+
+extern int pwait (int, int *, int);
+
+#if !HAVE_DECL_ASPRINTF
+/* Like sprintf but provides a pointer to malloc'd storage, which must
+ be freed by the caller. */
+
+extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2;
+#endif
+
+#if !HAVE_DECL_VASPRINTF
+/* Like vsprintf but provides a pointer to malloc'd storage, which
+ must be freed by the caller. */
+
+extern int vasprintf (char **, const char *, va_list) ATTRIBUTE_PRINTF(2,0);
+#endif
+
+#if defined(HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF
+/* Like sprintf but prints at most N characters. */
+extern int snprintf (char *, size_t, const char *, ...) ATTRIBUTE_PRINTF_3;
+#endif
+
+#if defined(HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF
+/* Like vsprintf but prints at most N characters. */
+extern int vsnprintf (char *, size_t, const char *, va_list) ATTRIBUTE_PRINTF(3,0);
+#endif
+
+#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP
+/* Compare version strings. */
+extern int strverscmp (const char *, const char *);
+#endif
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+/* Drastically simplified alloca configurator. If we're using GCC,
+ we use __builtin_alloca; otherwise we use the C alloca. The C
+ alloca is always available. You can override GCC by defining
+ USE_C_ALLOCA yourself. The canonical autoconf macro C_ALLOCA is
+ also set/unset as it is often used to indicate whether code needs
+ to call alloca(0). */
+extern void *C_alloca (size_t) ATTRIBUTE_MALLOC;
+#undef alloca
+#if GCC_VERSION >= 2000 && !defined USE_C_ALLOCA
+# define alloca(x) __builtin_alloca(x)
+# undef C_ALLOCA
+# define ASTRDUP(X) \
+ (__extension__ ({ const char *const libiberty_optr = (X); \
+ const unsigned long libiberty_len = strlen (libiberty_optr) + 1; \
+ char *const libiberty_nptr = (char *const) alloca (libiberty_len); \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len); }))
+#else
+# define alloca(x) C_alloca(x)
+# undef USE_C_ALLOCA
+# define USE_C_ALLOCA 1
+# undef C_ALLOCA
+# define C_ALLOCA 1
+extern const char *libiberty_optr;
+extern char *libiberty_nptr;
+extern unsigned long libiberty_len;
+# define ASTRDUP(X) \
+ (libiberty_optr = (X), \
+ libiberty_len = strlen (libiberty_optr) + 1, \
+ libiberty_nptr = (char *) alloca (libiberty_len), \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ! defined (LIBIBERTY_H) */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/line-map.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/line-map.h
new file mode 100644
index 0000000..5392145
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/line-map.h
@@ -0,0 +1,194 @@
+/* Map logical line numbers to (source file, line number) pairs.
+ Copyright (C) 2001, 2003, 2004, 2007, 2009
+ Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>.
+
+ In other words, you are welcome to use, share and improve this program.
+ You are forbidden to forbid anyone else to use, share and improve
+ what you give them. Help stamp out software-hoarding! */
+
+#ifndef LIBCPP_LINE_MAP_H
+#define LIBCPP_LINE_MAP_H
+
+#ifndef GTY
+#define GTY(x) /* nothing */
+#endif
+
+/* Reason for adding a line change with add_line_map (). LC_ENTER is
+ when including a new file, e.g. a #include directive in C.
+ LC_LEAVE is when reaching a file's end. LC_RENAME is when a file
+ name or line number changes for neither of the above reasons
+ (e.g. a #line directive in C). */
+enum lc_reason {LC_ENTER = 0, LC_LEAVE, LC_RENAME};
+
+/* The type of line numbers. */
+typedef unsigned int linenum_type;
+
+/* A logical line/column number, i.e. an "index" into a line_map. */
+/* Long-term, we want to use this to replace struct location_s (in input.h),
+ and effectively typedef source_location location_t. */
+typedef unsigned int source_location;
+
+/* Memory allocation function typedef. Works like xrealloc. */
+typedef void *(*line_map_realloc) (void *, size_t);
+
+/* Physical source file TO_FILE at line TO_LINE at column 0 is represented
+ by the logical START_LOCATION. TO_LINE+L at column C is represented by
+ START_LOCATION+(L*(1<<column_bits))+C, as long as C<(1<<column_bits),
+ and the result_location is less than the next line_map's start_location.
+ (The top line is line 1 and the leftmost column is column 1; line/column 0
+ means "entire file/line" or "unknown line/column" or "not applicable".)
+ INCLUDED_FROM is an index into the set that gives the line mapping
+ at whose end the current one was included. File(s) at the bottom
+ of the include stack have this set to -1. REASON is the reason for
+ creation of this line map, SYSP is one for a system header, two for
+ a C system header file that therefore needs to be extern "C"
+ protected in C++, and zero otherwise. */
+struct line_map GTY(())
+{
+ const char *to_file;
+ linenum_type to_line;
+ source_location start_location;
+ int included_from;
+ ENUM_BITFIELD (lc_reason) reason : CHAR_BIT;
+ /* The sysp field isn't really needed now that it's in cpp_buffer. */
+ unsigned char sysp;
+ /* Number of the low-order source_location bits used for a column number. */
+ unsigned int column_bits : 8;
+};
+
+/* A set of chronological line_map structures. */
+struct line_maps GTY(())
+{
+ struct line_map * GTY ((length ("%h.used"))) maps;
+ unsigned int allocated;
+ unsigned int used;
+
+ unsigned int cache;
+
+ /* The most recently listed include stack, if any, starts with
+ LAST_LISTED as the topmost including file. -1 indicates nothing
+ has been listed yet. */
+ int last_listed;
+
+ /* Depth of the include stack, including the current file. */
+ unsigned int depth;
+
+ /* If true, prints an include trace a la -H. */
+ bool trace_includes;
+
+ /* Highest source_location "given out". */
+ source_location highest_location;
+
+ /* Start of line of highest source_location "given out". */
+ source_location highest_line;
+
+ /* The maximum column number we can quickly allocate. Higher numbers
+ may require allocating a new line_map. */
+ unsigned int max_column_hint;
+
+ /* If non-null, the allocator to use when resizing 'maps'. If null,
+ xrealloc is used. */
+ line_map_realloc reallocator;
+};
+
+/* Initialize a line map set. */
+extern void linemap_init (struct line_maps *);
+
+/* Free a line map set. */
+extern void linemap_free (struct line_maps *);
+
+/* Check for and warn about line_maps entered but not exited. */
+
+extern void linemap_check_files_exited (struct line_maps *);
+
+/* Return a source_location for the start (i.e. column==0) of
+ (physical) line TO_LINE in the current source file (as in the
+ most recent linemap_add). MAX_COLUMN_HINT is the highest column
+ number we expect to use in this line (but it does not change
+ the highest_location). */
+
+extern source_location linemap_line_start
+(struct line_maps *set, linenum_type to_line, unsigned int max_column_hint);
+
+/* Add a mapping of logical source line to physical source file and
+ line number.
+
+ The text pointed to by TO_FILE must have a lifetime
+ at least as long as the final call to lookup_line (). An empty
+ TO_FILE means standard input. If reason is LC_LEAVE, and
+ TO_FILE is NULL, then TO_FILE, TO_LINE and SYSP are given their
+ natural values considering the file we are returning to.
+
+ A call to this function can relocate the previous set of
+ maps, so any stored line_map pointers should not be used. */
+extern const struct line_map *linemap_add
+ (struct line_maps *, enum lc_reason, unsigned int sysp,
+ const char *to_file, linenum_type to_line);
+
+/* Given a logical line, returns the map from which the corresponding
+ (source file, line) pair can be deduced. */
+extern const struct line_map *linemap_lookup
+ (struct line_maps *, source_location);
+
+/* Print the file names and line numbers of the #include commands
+ which led to the map MAP, if any, to stderr. Nothing is output if
+ the most recently listed stack is the same as the current one. */
+extern void linemap_print_containing_files (struct line_maps *,
+ const struct line_map *);
+
+/* Converts a map and a source_location to source line. */
+#define SOURCE_LINE(MAP, LOC) \
+ ((((LOC) - (MAP)->start_location) >> (MAP)->column_bits) + (MAP)->to_line)
+
+#define SOURCE_COLUMN(MAP, LOC) \
+ (((LOC) - (MAP)->start_location) & ((1 << (MAP)->column_bits) - 1))
+
+/* Returns the last source line within a map. This is the (last) line
+ of the #include, or other directive, that caused a map change. */
+#define LAST_SOURCE_LINE(MAP) \
+ SOURCE_LINE (MAP, LAST_SOURCE_LINE_LOCATION (MAP))
+#define LAST_SOURCE_LINE_LOCATION(MAP) \
+ ((((MAP)[1].start_location - 1 - (MAP)->start_location) \
+ & ~((1 << (MAP)->column_bits) - 1)) \
+ + (MAP)->start_location)
+
+/* Returns the map a given map was included from. */
+#define INCLUDED_FROM(SET, MAP) (&(SET)->maps[(MAP)->included_from])
+
+/* Nonzero if the map is at the bottom of the include stack. */
+#define MAIN_FILE_P(MAP) ((MAP)->included_from < 0)
+
+/* Set LOC to a source position that is the same line as the most recent
+ linemap_line_start, but with the specified TO_COLUMN column number. */
+
+#define LINEMAP_POSITION_FOR_COLUMN(LOC, SET, TO_COLUMN) do { \
+ unsigned int to_column = (TO_COLUMN); \
+ struct line_maps *set = (SET); \
+ if (__builtin_expect (to_column >= set->max_column_hint, 0)) \
+ (LOC) = linemap_position_for_column (set, to_column); \
+ else { \
+ source_location r = set->highest_line; \
+ r = r + to_column; \
+ if (r >= set->highest_location) \
+ set->highest_location = r; \
+ (LOC) = r; \
+ }} while (0)
+
+
+extern source_location
+linemap_position_for_column (struct line_maps *set, unsigned int to_column);
+#endif /* !LIBCPP_LINE_MAP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/machmode.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/machmode.h
new file mode 100644
index 0000000..7d50b46
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/machmode.h
@@ -0,0 +1,272 @@
+/* Machine mode definitions for GCC; included by rtl.h and tree.h.
+ Copyright (C) 1991, 1993, 1994, 1996, 1998, 1999, 2000, 2001, 2003,
+ 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef HAVE_MACHINE_MODES
+#define HAVE_MACHINE_MODES
+
+/* Make an enum class that gives all the machine modes. */
+#include "insn-modes.h"
+
+/* Get the name of mode MODE as a string. */
+
+extern const char * const mode_name[NUM_MACHINE_MODES];
+#define GET_MODE_NAME(MODE) mode_name[MODE]
+
+/* Mode classes. */
+
+#include "mode-classes.def"
+#define DEF_MODE_CLASS(M) M
+enum mode_class { MODE_CLASSES, MAX_MODE_CLASS };
+#undef DEF_MODE_CLASS
+#undef MODE_CLASSES
+
+/* Get the general kind of object that mode MODE represents
+ (integer, floating, complex, etc.) */
+
+extern const unsigned char mode_class[NUM_MACHINE_MODES];
+#define GET_MODE_CLASS(MODE) mode_class[MODE]
+
+/* Nonzero if MODE is an integral mode. */
+#define INTEGRAL_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_INT \
+ || GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT \
+ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_INT)
+
+/* Nonzero if MODE is a floating-point mode. */
+#define FLOAT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ || GET_MODE_CLASS (MODE) == MODE_DECIMAL_FLOAT \
+ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT)
+
+/* Nonzero if MODE is a complex mode. */
+#define COMPLEX_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \
+ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
+
+/* Nonzero if MODE is a vector mode. */
+#define VECTOR_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_VECTOR_INT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_FRACT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_UFRACT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_ACCUM \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_UACCUM)
+
+/* Nonzero if MODE is a scalar integral mode. */
+#define SCALAR_INT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_INT \
+ || GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT)
+
+/* Nonzero if MODE is a scalar floating point mode. */
+#define SCALAR_FLOAT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ || GET_MODE_CLASS (MODE) == MODE_DECIMAL_FLOAT)
+
+/* Nonzero if MODE is a decimal floating point mode. */
+#define DECIMAL_FLOAT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_DECIMAL_FLOAT)
+
+/* Nonzero if MODE is a scalar fract mode. */
+#define SCALAR_FRACT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_FRACT)
+
+/* Nonzero if MODE is a scalar ufract mode. */
+#define SCALAR_UFRACT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_UFRACT)
+
+/* Nonzero if MODE is a scalar fract or ufract mode. */
+#define ALL_SCALAR_FRACT_MODE_P(MODE) \
+ (SCALAR_FRACT_MODE_P (MODE) || SCALAR_UFRACT_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar accum mode. */
+#define SCALAR_ACCUM_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_ACCUM)
+
+/* Nonzero if MODE is a scalar uaccum mode. */
+#define SCALAR_UACCUM_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_UACCUM)
+
+/* Nonzero if MODE is a scalar accum or uaccum mode. */
+#define ALL_SCALAR_ACCUM_MODE_P(MODE) \
+ (SCALAR_ACCUM_MODE_P (MODE) || SCALAR_UACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar fract or accum mode. */
+#define SIGNED_SCALAR_FIXED_POINT_MODE_P(MODE) \
+ (SCALAR_FRACT_MODE_P (MODE) || SCALAR_ACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar ufract or uaccum mode. */
+#define UNSIGNED_SCALAR_FIXED_POINT_MODE_P(MODE) \
+ (SCALAR_UFRACT_MODE_P (MODE) || SCALAR_UACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar fract, ufract, accum or uaccum mode. */
+#define ALL_SCALAR_FIXED_POINT_MODE_P(MODE) \
+ (SIGNED_SCALAR_FIXED_POINT_MODE_P (MODE) \
+ || UNSIGNED_SCALAR_FIXED_POINT_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar/vector fract mode. */
+#define FRACT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_FRACT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_FRACT)
+
+/* Nonzero if MODE is a scalar/vector ufract mode. */
+#define UFRACT_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_UFRACT \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_UFRACT)
+
+/* Nonzero if MODE is a scalar/vector fract or ufract mode. */
+#define ALL_FRACT_MODE_P(MODE) \
+ (FRACT_MODE_P (MODE) || UFRACT_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar/vector accum mode. */
+#define ACCUM_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_ACCUM \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_ACCUM)
+
+/* Nonzero if MODE is a scalar/vector uaccum mode. */
+#define UACCUM_MODE_P(MODE) \
+ (GET_MODE_CLASS (MODE) == MODE_UACCUM \
+ || GET_MODE_CLASS (MODE) == MODE_VECTOR_UACCUM)
+
+/* Nonzero if MODE is a scalar/vector accum or uaccum mode. */
+#define ALL_ACCUM_MODE_P(MODE) \
+ (ACCUM_MODE_P (MODE) || UACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar/vector fract or accum mode. */
+#define SIGNED_FIXED_POINT_MODE_P(MODE) \
+ (FRACT_MODE_P (MODE) || ACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar/vector ufract or uaccum mode. */
+#define UNSIGNED_FIXED_POINT_MODE_P(MODE) \
+ (UFRACT_MODE_P (MODE) || UACCUM_MODE_P (MODE))
+
+/* Nonzero if MODE is a scalar/vector fract, ufract, accum or uaccum mode. */
+#define ALL_FIXED_POINT_MODE_P(MODE) \
+ (SIGNED_FIXED_POINT_MODE_P (MODE) \
+ || UNSIGNED_FIXED_POINT_MODE_P (MODE))
+
+/* Nonzero if CLASS modes can be widened. */
+#define CLASS_HAS_WIDER_MODES_P(CLASS) \
+ (CLASS == MODE_INT \
+ || CLASS == MODE_FLOAT \
+ || CLASS == MODE_DECIMAL_FLOAT \
+ || CLASS == MODE_COMPLEX_FLOAT \
+ || CLASS == MODE_FRACT \
+ || CLASS == MODE_UFRACT \
+ || CLASS == MODE_ACCUM \
+ || CLASS == MODE_UACCUM)
+
+/* Get the size in bytes and bits of an object of mode MODE. */
+
+extern CONST_MODE_SIZE unsigned char mode_size[NUM_MACHINE_MODES];
+#define GET_MODE_SIZE(MODE) ((unsigned short) mode_size[MODE])
+#define GET_MODE_BITSIZE(MODE) ((unsigned short) (GET_MODE_SIZE (MODE) * BITS_PER_UNIT))
+
+/* Get the number of value bits of an object of mode MODE. */
+extern const unsigned short mode_precision[NUM_MACHINE_MODES];
+#define GET_MODE_PRECISION(MODE) mode_precision[MODE]
+
+/* Get the number of integral bits of an object of mode MODE. */
+extern CONST_MODE_IBIT unsigned char mode_ibit[NUM_MACHINE_MODES];
+#define GET_MODE_IBIT(MODE) mode_ibit[MODE]
+
+/* Get the number of fractional bits of an object of mode MODE. */
+extern CONST_MODE_FBIT unsigned char mode_fbit[NUM_MACHINE_MODES];
+#define GET_MODE_FBIT(MODE) mode_fbit[MODE]
+
+/* Get a bitmask containing 1 for all bits in a word
+ that fit within mode MODE. */
+
+extern const unsigned HOST_WIDE_INT mode_mask_array[NUM_MACHINE_MODES];
+
+#define GET_MODE_MASK(MODE) mode_mask_array[MODE]
+
+/* Return the mode of the inner elements in a vector. */
+
+extern const unsigned char mode_inner[NUM_MACHINE_MODES];
+#define GET_MODE_INNER(MODE) ((enum machine_mode) mode_inner[MODE])
+
+/* Get the size in bytes of the basic parts of an object of mode MODE. */
+
+#define GET_MODE_UNIT_SIZE(MODE) \
+ (GET_MODE_INNER (MODE) == VOIDmode \
+ ? GET_MODE_SIZE (MODE) \
+ : GET_MODE_SIZE (GET_MODE_INNER (MODE)))
+
+/* Get the number of units in the object. */
+
+extern const unsigned char mode_nunits[NUM_MACHINE_MODES];
+#define GET_MODE_NUNITS(MODE) mode_nunits[MODE]
+
+/* Get the next wider natural mode (eg, QI -> HI -> SI -> DI -> TI). */
+
+extern const unsigned char mode_wider[NUM_MACHINE_MODES];
+#define GET_MODE_WIDER_MODE(MODE) mode_wider[MODE]
+
+extern const unsigned char mode_2xwider[NUM_MACHINE_MODES];
+#define GET_MODE_2XWIDER_MODE(MODE) mode_2xwider[MODE]
+
+/* Return the mode for data of a given size SIZE and mode class CLASS.
+ If LIMIT is nonzero, then don't use modes bigger than MAX_FIXED_MODE_SIZE.
+ The value is BLKmode if no other mode is found. */
+
+extern enum machine_mode mode_for_size (unsigned int, enum mode_class, int);
+
+/* Similar, but find the smallest mode for a given width. */
+
+extern enum machine_mode smallest_mode_for_size (unsigned int,
+ enum mode_class);
+
+
+/* Return an integer mode of the exact same size as the input mode,
+ or BLKmode on failure. */
+
+extern enum machine_mode int_mode_for_mode (enum machine_mode);
+
+/* Find the best mode to use to access a bit field. */
+
+extern enum machine_mode get_best_mode (int, int, unsigned int,
+ enum machine_mode, int);
+
+/* Determine alignment, 1<=result<=BIGGEST_ALIGNMENT. */
+
+extern CONST_MODE_BASE_ALIGN unsigned char mode_base_align[NUM_MACHINE_MODES];
+
+extern unsigned get_mode_alignment (enum machine_mode);
+
+#define GET_MODE_ALIGNMENT(MODE) get_mode_alignment (MODE)
+
+/* For each class, get the narrowest mode in that class. */
+
+extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS];
+#define GET_CLASS_NARROWEST_MODE(CLASS) class_narrowest_mode[CLASS]
+
+/* Define the integer modes whose sizes are BITS_PER_UNIT and BITS_PER_WORD
+ and the mode whose class is Pmode and whose size is POINTER_SIZE. */
+
+extern enum machine_mode byte_mode;
+extern enum machine_mode word_mode;
+extern enum machine_mode ptr_mode;
+
+/* Target-dependent machine mode initialization - in insn-modes.c. */
+extern void init_adjust_machine_modes (void);
+
+#endif /* not HAVE_MACHINE_MODES */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/mode-classes.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/mode-classes.def
new file mode 100644
index 0000000..83017ec
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/mode-classes.def
@@ -0,0 +1,39 @@
+/* Machine mode class definitions for GCC.
+ Copyright (C) 2003, 2007
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#define MODE_CLASSES \
+ DEF_MODE_CLASS (MODE_RANDOM), /* other */ \
+ DEF_MODE_CLASS (MODE_CC), /* condition code in a register */ \
+ DEF_MODE_CLASS (MODE_INT), /* integer */ \
+ DEF_MODE_CLASS (MODE_PARTIAL_INT), /* integer with padding bits */ \
+ DEF_MODE_CLASS (MODE_FRACT), /* signed fractional number */ \
+ DEF_MODE_CLASS (MODE_UFRACT), /* unsigned fractional number */ \
+ DEF_MODE_CLASS (MODE_ACCUM), /* signed accumulator */ \
+ DEF_MODE_CLASS (MODE_UACCUM), /* unsigned accumulator */ \
+ DEF_MODE_CLASS (MODE_FLOAT), /* floating point */ \
+ DEF_MODE_CLASS (MODE_DECIMAL_FLOAT), /* decimal floating point */ \
+ DEF_MODE_CLASS (MODE_COMPLEX_INT), /* complex numbers */ \
+ DEF_MODE_CLASS (MODE_COMPLEX_FLOAT), \
+ DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \
+ DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \
+ DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \
+ DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \
+ DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \
+ DEF_MODE_CLASS (MODE_VECTOR_FLOAT)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/objc/objc-tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/objc/objc-tree.def
new file mode 100644
index 0000000..a3e40db
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/objc/objc-tree.def
@@ -0,0 +1,46 @@
+/* This file contains the definitions and documentation for the
+ additional tree codes used in the Objective C front end (see tree.def
+ for the standard codes).
+ Copyright (C) 1990, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2007
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* Objective-C types. */
+DEFTREECODE (CLASS_INTERFACE_TYPE, "class_interface_type", tcc_type, 0)
+DEFTREECODE (CLASS_IMPLEMENTATION_TYPE, "class_implementation_type",
+ tcc_type, 0)
+DEFTREECODE (CATEGORY_INTERFACE_TYPE, "category_interface_type", tcc_type, 0)
+DEFTREECODE (CATEGORY_IMPLEMENTATION_TYPE,"category_implementation_type",
+ tcc_type, 0)
+DEFTREECODE (PROTOCOL_INTERFACE_TYPE, "protocol_interface_type", tcc_type, 0)
+
+/* Objective-C decls. */
+DEFTREECODE (KEYWORD_DECL, "keyword_decl", tcc_declaration, 0)
+DEFTREECODE (INSTANCE_METHOD_DECL, "instance_method_decl", tcc_declaration, 0)
+DEFTREECODE (CLASS_METHOD_DECL, "class_method_decl", tcc_declaration, 0)
+
+/* Objective-C expressions. */
+DEFTREECODE (MESSAGE_SEND_EXPR, "message_send_expr", tcc_expression, 3)
+DEFTREECODE (CLASS_REFERENCE_EXPR, "class_reference_expr", tcc_expression, 1)
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/obstack.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/obstack.h
new file mode 100644
index 0000000..4aec3a4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/obstack.h
@@ -0,0 +1,545 @@
+/* obstack.h - object stack macros
+ Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2008
+ Free Software Foundation, Inc.
+
+
+ NOTE: The canonical source of this file is maintained with the GNU C Library.
+ Bugs can be reported to bug-glibc@gnu.org.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 2, or (at your option) any
+ later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
+ USA. */
+
+/* Summary:
+
+All the apparent functions defined here are macros. The idea
+is that you would use these pre-tested macros to solve a
+very specific set of problems, and they would run fast.
+Caution: no side-effects in arguments please!! They may be
+evaluated MANY times!!
+
+These macros operate a stack of objects. Each object starts life
+small, and may grow to maturity. (Consider building a word syllable
+by syllable.) An object can move while it is growing. Once it has
+been "finished" it never changes address again. So the "top of the
+stack" is typically an immature growing object, while the rest of the
+stack is of mature, fixed size and fixed address objects.
+
+These routines grab large chunks of memory, using a function you
+supply, called `obstack_chunk_alloc'. On occasion, they free chunks,
+by calling `obstack_chunk_free'. You must define them and declare
+them before using any obstack macros.
+
+Each independent stack is represented by a `struct obstack'.
+Each of the obstack macros expects a pointer to such a structure
+as the first argument.
+
+One motivation for this package is the problem of growing char strings
+in symbol tables. Unless you are "fascist pig with a read-only mind"
+--Gosper's immortal quote from HAKMEM item 154, out of context--you
+would not like to put any arbitrary upper limit on the length of your
+symbols.
+
+In practice this often means you will build many short symbols and a
+few long symbols. At the time you are reading a symbol you don't know
+how long it is. One traditional method is to read a symbol into a
+buffer, realloc()ating the buffer every time you try to read a symbol
+that is longer than the buffer. This is beaut, but you still will
+want to copy the symbol from the buffer to a more permanent
+symbol-table entry say about half the time.
+
+With obstacks, you can work differently. Use one obstack for all symbol
+names. As you read a symbol, grow the name in the obstack gradually.
+When the name is complete, finalize it. Then, if the symbol exists already,
+free the newly read name.
+
+The way we do this is to take a large chunk, allocating memory from
+low addresses. When you want to build a symbol in the chunk you just
+add chars above the current "high water mark" in the chunk. When you
+have finished adding chars, because you got to the end of the symbol,
+you know how long the chars are, and you can create a new object.
+Mostly the chars will not burst over the highest address of the chunk,
+because you would typically expect a chunk to be (say) 100 times as
+long as an average object.
+
+In case that isn't clear, when we have enough chars to make up
+the object, THEY ARE ALREADY CONTIGUOUS IN THE CHUNK (guaranteed)
+so we just point to it where it lies. No moving of chars is
+needed and this is the second win: potentially long strings need
+never be explicitly shuffled. Once an object is formed, it does not
+change its address during its lifetime.
+
+When the chars burst over a chunk boundary, we allocate a larger
+chunk, and then copy the partly formed object from the end of the old
+chunk to the beginning of the new larger chunk. We then carry on
+accreting characters to the end of the object as we normally would.
+
+A special macro is provided to add a single char at a time to a
+growing object. This allows the use of register variables, which
+break the ordinary 'growth' macro.
+
+Summary:
+ We allocate large chunks.
+ We carve out one object at a time from the current chunk.
+ Once carved, an object never moves.
+ We are free to append data of any size to the currently
+ growing object.
+ Exactly one object is growing in an obstack at any one time.
+ You can run one obstack per control block.
+ You may have as many control blocks as you dare.
+ Because of the way we do it, you can `unwind' an obstack
+ back to a previous state. (You may remove objects much
+ as you would with a stack.)
+*/
+
+
+/* Don't do the contents of this file more than once. */
+
+#ifndef _OBSTACK_H
+#define _OBSTACK_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* We use subtraction of (char *) 0 instead of casting to int
+ because on word-addressable machines a simple cast to int
+ may ignore the byte-within-word field of the pointer. */
+
+#ifndef __PTR_TO_INT
+# define __PTR_TO_INT(P) ((P) - (char *) 0)
+#endif
+
+#ifndef __INT_TO_PTR
+# define __INT_TO_PTR(P) ((P) + (char *) 0)
+#endif
+
+/* We need the type of the resulting object. If __PTRDIFF_TYPE__ is
+ defined, as with GNU C, use that; that way we don't pollute the
+ namespace with <stddef.h>'s symbols. Otherwise, if <stddef.h> is
+ available, include it and use ptrdiff_t. In traditional C, long is
+ the best that we can do. */
+
+#ifdef __PTRDIFF_TYPE__
+# define PTR_INT_TYPE __PTRDIFF_TYPE__
+#else
+# ifdef HAVE_STDDEF_H
+# include <stddef.h>
+# define PTR_INT_TYPE ptrdiff_t
+# else
+# define PTR_INT_TYPE long
+# endif
+#endif
+
+#if defined _LIBC || defined HAVE_STRING_H
+# include <string.h>
+# define _obstack_memcpy(To, From, N) memcpy ((To), (From), (N))
+#else
+# ifdef memcpy
+# define _obstack_memcpy(To, From, N) memcpy ((To), (char *)(From), (N))
+# else
+# define _obstack_memcpy(To, From, N) bcopy ((char *)(From), (To), (N))
+# endif
+#endif
+
+struct _obstack_chunk /* Lives at front of each chunk. */
+{
+ char *limit; /* 1 past end of this chunk */
+ struct _obstack_chunk *prev; /* address of prior chunk or NULL */
+ char contents[4]; /* objects begin here */
+};
+
+struct obstack /* control current object in current chunk */
+{
+ long chunk_size; /* preferred size to allocate chunks in */
+ struct _obstack_chunk *chunk; /* address of current struct obstack_chunk */
+ char *object_base; /* address of object we are building */
+ char *next_free; /* where to add next char to current object */
+ char *chunk_limit; /* address of char after current chunk */
+ PTR_INT_TYPE temp; /* Temporary for some macros. */
+ int alignment_mask; /* Mask of alignment for each object. */
+ /* These prototypes vary based on `use_extra_arg', and we use
+ casts to the prototypeless function type in all assignments,
+ but having prototypes here quiets -Wstrict-prototypes. */
+ struct _obstack_chunk *(*chunkfun) (void *, long);
+ void (*freefun) (void *, struct _obstack_chunk *);
+ void *extra_arg; /* first arg for chunk alloc/dealloc funcs */
+ unsigned use_extra_arg:1; /* chunk alloc/dealloc funcs take extra arg */
+ unsigned maybe_empty_object:1;/* There is a possibility that the current
+ chunk contains a zero-length object. This
+ prevents freeing the chunk if we allocate
+ a bigger chunk to replace it. */
+ unsigned alloc_failed:1; /* No longer used, as we now call the failed
+ handler on error, but retained for binary
+ compatibility. */
+};
+
+/* Declare the external functions we use; they are in obstack.c. */
+
+extern void _obstack_newchunk (struct obstack *, int);
+extern void _obstack_free (struct obstack *, void *);
+extern int _obstack_begin (struct obstack *, int, int,
+ void *(*) (long), void (*) (void *));
+extern int _obstack_begin_1 (struct obstack *, int, int,
+ void *(*) (void *, long),
+ void (*) (void *, void *), void *);
+extern int _obstack_memory_used (struct obstack *);
+
+/* Do the function-declarations after the structs
+ but before defining the macros. */
+
+void obstack_init (struct obstack *obstack);
+
+void * obstack_alloc (struct obstack *obstack, int size);
+
+void * obstack_copy (struct obstack *obstack, void *address, int size);
+void * obstack_copy0 (struct obstack *obstack, void *address, int size);
+
+void obstack_free (struct obstack *obstack, void *block);
+
+void obstack_blank (struct obstack *obstack, int size);
+
+void obstack_grow (struct obstack *obstack, void *data, int size);
+void obstack_grow0 (struct obstack *obstack, void *data, int size);
+
+void obstack_1grow (struct obstack *obstack, int data_char);
+void obstack_ptr_grow (struct obstack *obstack, void *data);
+void obstack_int_grow (struct obstack *obstack, int data);
+
+void * obstack_finish (struct obstack *obstack);
+
+int obstack_object_size (struct obstack *obstack);
+
+int obstack_room (struct obstack *obstack);
+void obstack_make_room (struct obstack *obstack, int size);
+void obstack_1grow_fast (struct obstack *obstack, int data_char);
+void obstack_ptr_grow_fast (struct obstack *obstack, void *data);
+void obstack_int_grow_fast (struct obstack *obstack, int data);
+void obstack_blank_fast (struct obstack *obstack, int size);
+
+void * obstack_base (struct obstack *obstack);
+void * obstack_next_free (struct obstack *obstack);
+int obstack_alignment_mask (struct obstack *obstack);
+int obstack_chunk_size (struct obstack *obstack);
+int obstack_memory_used (struct obstack *obstack);
+
+/* Error handler called when `obstack_chunk_alloc' failed to allocate
+ more memory. This can be set to a user defined function. The
+ default action is to print a message and abort. */
+extern void (*obstack_alloc_failed_handler) (void);
+
+/* Exit value used when `print_and_abort' is used. */
+extern int obstack_exit_failure;
+
+/* Pointer to beginning of object being allocated or to be allocated next.
+ Note that this might not be the final address of the object
+ because a new chunk might be needed to hold the final size. */
+
+#define obstack_base(h) ((h)->object_base)
+
+/* Size for allocating ordinary chunks. */
+
+#define obstack_chunk_size(h) ((h)->chunk_size)
+
+/* Pointer to next byte not yet allocated in current chunk. */
+
+#define obstack_next_free(h) ((h)->next_free)
+
+/* Mask specifying low bits that should be clear in address of an object. */
+
+#define obstack_alignment_mask(h) ((h)->alignment_mask)
+
+/* To prevent prototype warnings provide complete argument list in
+ standard C version. */
+# define obstack_init(h) \
+ _obstack_begin ((h), 0, 0, \
+ (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free)
+
+# define obstack_begin(h, size) \
+ _obstack_begin ((h), (size), 0, \
+ (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free)
+
+# define obstack_specify_allocation(h, size, alignment, chunkfun, freefun) \
+ _obstack_begin ((h), (size), (alignment), \
+ (void *(*) (long)) (chunkfun), (void (*) (void *)) (freefun))
+
+# define obstack_specify_allocation_with_arg(h, size, alignment, chunkfun, freefun, arg) \
+ _obstack_begin_1 ((h), (size), (alignment), \
+ (void *(*) (void *, long)) (chunkfun), \
+ (void (*) (void *, void *)) (freefun), (arg))
+
+# define obstack_chunkfun(h, newchunkfun) \
+ ((h) -> chunkfun = (struct _obstack_chunk *(*)(void *, long)) (newchunkfun))
+
+# define obstack_freefun(h, newfreefun) \
+ ((h) -> freefun = (void (*)(void *, struct _obstack_chunk *)) (newfreefun))
+
+#define obstack_1grow_fast(h,achar) (*((h)->next_free)++ = (achar))
+
+#define obstack_blank_fast(h,n) ((h)->next_free += (n))
+
+#define obstack_memory_used(h) _obstack_memory_used (h)
+
+#if defined __GNUC__ && defined __STDC__ && __STDC__
+/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and
+ does not implement __extension__. But that compiler doesn't define
+ __GNUC_MINOR__. */
+# if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__)
+# define __extension__
+# endif
+
+/* For GNU C, if not -traditional,
+ we can define these macros to compute all args only once
+ without using a global variable.
+ Also, we can avoid using the `temp' slot, to make faster code. */
+
+# define obstack_object_size(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (unsigned) (__o->next_free - __o->object_base); })
+
+# define obstack_room(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (unsigned) (__o->chunk_limit - __o->next_free); })
+
+# define obstack_make_room(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->chunk_limit - __o->next_free < __len) \
+ _obstack_newchunk (__o, __len); \
+ (void) 0; })
+
+# define obstack_empty_p(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (__o->chunk->prev == 0 && __o->next_free - __o->chunk->contents == 0); })
+
+# define obstack_grow(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->next_free + __len > __o->chunk_limit) \
+ _obstack_newchunk (__o, __len); \
+ _obstack_memcpy (__o->next_free, (where), __len); \
+ __o->next_free += __len; \
+ (void) 0; })
+
+# define obstack_grow0(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->next_free + __len + 1 > __o->chunk_limit) \
+ _obstack_newchunk (__o, __len + 1); \
+ _obstack_memcpy (__o->next_free, (where), __len); \
+ __o->next_free += __len; \
+ *(__o->next_free)++ = 0; \
+ (void) 0; })
+
+# define obstack_1grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + 1 > __o->chunk_limit) \
+ _obstack_newchunk (__o, 1); \
+ obstack_1grow_fast (__o, datum); \
+ (void) 0; })
+
+/* These assume that the obstack alignment is good enough for pointers or ints,
+ and that the data added so far to the current object
+ shares that much alignment. */
+
+# define obstack_ptr_grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + sizeof (void *) > __o->chunk_limit) \
+ _obstack_newchunk (__o, sizeof (void *)); \
+ obstack_ptr_grow_fast (__o, datum); })
+
+# define obstack_int_grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + sizeof (int) > __o->chunk_limit) \
+ _obstack_newchunk (__o, sizeof (int)); \
+ obstack_int_grow_fast (__o, datum); })
+
+# define obstack_ptr_grow_fast(OBSTACK,aptr) \
+__extension__ \
+({ struct obstack *__o1 = (OBSTACK); \
+ *(const void **) __o1->next_free = (aptr); \
+ __o1->next_free += sizeof (const void *); \
+ (void) 0; })
+
+# define obstack_int_grow_fast(OBSTACK,aint) \
+__extension__ \
+({ struct obstack *__o1 = (OBSTACK); \
+ *(int *) __o1->next_free = (aint); \
+ __o1->next_free += sizeof (int); \
+ (void) 0; })
+
+# define obstack_blank(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->chunk_limit - __o->next_free < __len) \
+ _obstack_newchunk (__o, __len); \
+ obstack_blank_fast (__o, __len); \
+ (void) 0; })
+
+# define obstack_alloc(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_blank (__h, (length)); \
+ obstack_finish (__h); })
+
+# define obstack_copy(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_grow (__h, (where), (length)); \
+ obstack_finish (__h); })
+
+# define obstack_copy0(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_grow0 (__h, (where), (length)); \
+ obstack_finish (__h); })
+
+/* The local variable is named __o1 to avoid a name conflict
+ when obstack_blank is called. */
+# define obstack_finish(OBSTACK) \
+__extension__ \
+({ struct obstack *__o1 = (OBSTACK); \
+ void *value; \
+ value = (void *) __o1->object_base; \
+ if (__o1->next_free == value) \
+ __o1->maybe_empty_object = 1; \
+ __o1->next_free \
+ = __INT_TO_PTR ((__PTR_TO_INT (__o1->next_free)+__o1->alignment_mask)\
+ & ~ (__o1->alignment_mask)); \
+ if (__o1->next_free - (char *)__o1->chunk \
+ > __o1->chunk_limit - (char *)__o1->chunk) \
+ __o1->next_free = __o1->chunk_limit; \
+ __o1->object_base = __o1->next_free; \
+ value; })
+
+# define obstack_free(OBSTACK, OBJ) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ void *__obj = (void *) (OBJ); \
+ if (__obj > (void *)__o->chunk && __obj < (void *)__o->chunk_limit) \
+ __o->next_free = __o->object_base = (char *) __obj; \
+ else (obstack_free) (__o, __obj); })
+
+#else /* not __GNUC__ or not __STDC__ */
+
+# define obstack_object_size(h) \
+ (unsigned) ((h)->next_free - (h)->object_base)
+
+# define obstack_room(h) \
+ (unsigned) ((h)->chunk_limit - (h)->next_free)
+
+# define obstack_empty_p(h) \
+ ((h)->chunk->prev == 0 && (h)->next_free - (h)->chunk->contents == 0)
+
+/* Note that the call to _obstack_newchunk is enclosed in (..., 0)
+ so that we can avoid having void expressions
+ in the arms of the conditional expression.
+ Casting the third operand to void was tried before,
+ but some compilers won't accept it. */
+
+# define obstack_make_room(h,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0))
+
+# define obstack_grow(h,where,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \
+ _obstack_memcpy ((h)->next_free, (where), (h)->temp), \
+ (h)->next_free += (h)->temp)
+
+# define obstack_grow0(h,where,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp + 1 > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp + 1), 0) : 0), \
+ _obstack_memcpy ((h)->next_free, (where), (h)->temp), \
+ (h)->next_free += (h)->temp, \
+ *((h)->next_free)++ = 0)
+
+# define obstack_1grow(h,datum) \
+( (((h)->next_free + 1 > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), 1), 0) : 0), \
+ obstack_1grow_fast (h, datum))
+
+# define obstack_ptr_grow(h,datum) \
+( (((h)->next_free + sizeof (char *) > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), sizeof (char *)), 0) : 0), \
+ obstack_ptr_grow_fast (h, datum))
+
+# define obstack_int_grow(h,datum) \
+( (((h)->next_free + sizeof (int) > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), sizeof (int)), 0) : 0), \
+ obstack_int_grow_fast (h, datum))
+
+# define obstack_ptr_grow_fast(h,aptr) \
+ (((const void **) ((h)->next_free += sizeof (void *)))[-1] = (aptr))
+
+# define obstack_int_grow_fast(h,aint) \
+ (((int *) ((h)->next_free += sizeof (int)))[-1] = (aptr))
+
+# define obstack_blank(h,length) \
+( (h)->temp = (length), \
+ (((h)->chunk_limit - (h)->next_free < (h)->temp) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \
+ obstack_blank_fast (h, (h)->temp))
+
+# define obstack_alloc(h,length) \
+ (obstack_blank ((h), (length)), obstack_finish ((h)))
+
+# define obstack_copy(h,where,length) \
+ (obstack_grow ((h), (where), (length)), obstack_finish ((h)))
+
+# define obstack_copy0(h,where,length) \
+ (obstack_grow0 ((h), (where), (length)), obstack_finish ((h)))
+
+# define obstack_finish(h) \
+( ((h)->next_free == (h)->object_base \
+ ? (((h)->maybe_empty_object = 1), 0) \
+ : 0), \
+ (h)->temp = __PTR_TO_INT ((h)->object_base), \
+ (h)->next_free \
+ = __INT_TO_PTR ((__PTR_TO_INT ((h)->next_free)+(h)->alignment_mask) \
+ & ~ ((h)->alignment_mask)), \
+ (((h)->next_free - (char *) (h)->chunk \
+ > (h)->chunk_limit - (char *) (h)->chunk) \
+ ? ((h)->next_free = (h)->chunk_limit) : 0), \
+ (h)->object_base = (h)->next_free, \
+ (void *) __INT_TO_PTR ((h)->temp))
+
+# define obstack_free(h,obj) \
+( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \
+ (((h)->temp > 0 && (h)->temp < (h)->chunk_limit - (char *) (h)->chunk)\
+ ? (int) ((h)->next_free = (h)->object_base \
+ = (h)->temp + (char *) (h)->chunk) \
+ : (((obstack_free) ((h), (h)->temp + (char *) (h)->chunk), 0), 0)))
+
+#endif /* not __GNUC__ or not __STDC__ */
+
+#ifdef __cplusplus
+} /* C++ */
+#endif
+
+#endif /* obstack.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/omp-builtins.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/omp-builtins.def
new file mode 100644
index 0000000..5fd4f9a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/omp-builtins.def
@@ -0,0 +1,208 @@
+/* This file contains the definitions and documentation for the
+ OpenMP builtins used in the GNU compiler.
+ Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* Before including this file, you should define a macro:
+
+ DEF_GOMP_BUILTIN (ENUM, NAME, TYPE, ATTRS)
+
+ See builtins.def for details. */
+
+DEF_GOMP_BUILTIN (BUILT_IN_OMP_GET_THREAD_NUM, "omp_get_thread_num",
+ BT_FN_INT, ATTR_CONST_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_OMP_GET_NUM_THREADS, "omp_get_num_threads",
+ BT_FN_INT, ATTR_CONST_NOTHROW_LIST)
+
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_ATOMIC_START, "GOMP_atomic_start",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_ATOMIC_END, "GOMP_atomic_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_BARRIER, "GOMP_barrier",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_TASKWAIT, "GOMP_taskwait",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_CRITICAL_START, "GOMP_critical_start",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_CRITICAL_END, "GOMP_critical_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_CRITICAL_NAME_START,
+ "GOMP_critical_name_start",
+ BT_FN_VOID_PTRPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_CRITICAL_NAME_END,
+ "GOMP_critical_name_end",
+ BT_FN_VOID_PTRPTR, ATTR_NOTHROW_LIST)
+/* NOTE: Do not change the order of BUILT_IN_GOMP_LOOP_*_START. They
+ are used in index arithmetic with enum omp_clause_schedule_kind
+ in omp-low.c. */
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_STATIC_START,
+ "GOMP_loop_static_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_DYNAMIC_START,
+ "GOMP_loop_dynamic_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_GUIDED_START,
+ "GOMP_loop_guided_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_RUNTIME_START,
+ "GOMP_loop_runtime_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_STATIC_START,
+ "GOMP_loop_ordered_static_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_DYNAMIC_START,
+ "GOMP_loop_ordered_dynamic_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_GUIDED_START,
+ "GOMP_loop_ordered_guided_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_RUNTIME_START,
+ "GOMP_loop_ordered_runtime_start",
+ BT_FN_BOOL_LONG_LONG_LONG_LONGPTR_LONGPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_STATIC_NEXT, "GOMP_loop_static_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_DYNAMIC_NEXT, "GOMP_loop_dynamic_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_GUIDED_NEXT, "GOMP_loop_guided_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_RUNTIME_NEXT, "GOMP_loop_runtime_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_STATIC_NEXT,
+ "GOMP_loop_ordered_static_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_DYNAMIC_NEXT,
+ "GOMP_loop_ordered_dynamic_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_GUIDED_NEXT,
+ "GOMP_loop_ordered_guided_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ORDERED_RUNTIME_NEXT,
+ "GOMP_loop_ordered_runtime_next",
+ BT_FN_BOOL_LONGPTR_LONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_STATIC_START,
+ "GOMP_loop_ull_static_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_DYNAMIC_START,
+ "GOMP_loop_ull_dynamic_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_GUIDED_START,
+ "GOMP_loop_ull_guided_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_RUNTIME_START,
+ "GOMP_loop_ull_runtime_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_STATIC_START,
+ "GOMP_loop_ull_ordered_static_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_DYNAMIC_START,
+ "GOMP_loop_ull_ordered_dynamic_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_GUIDED_START,
+ "GOMP_loop_ull_ordered_guided_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_RUNTIME_START,
+ "GOMP_loop_ull_ordered_runtime_start",
+ BT_FN_BOOL_BOOL_ULL_ULL_ULL_ULLPTR_ULLPTR,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_STATIC_NEXT, "GOMP_loop_ull_static_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_DYNAMIC_NEXT, "GOMP_loop_ull_dynamic_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_GUIDED_NEXT, "GOMP_loop_ull_guided_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_RUNTIME_NEXT, "GOMP_loop_ull_runtime_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_STATIC_NEXT,
+ "GOMP_loop_ull_ordered_static_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_DYNAMIC_NEXT,
+ "GOMP_loop_ull_ordered_dynamic_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_GUIDED_NEXT,
+ "GOMP_loop_ull_ordered_guided_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_ULL_ORDERED_RUNTIME_NEXT,
+ "GOMP_loop_ull_ordered_runtime_next",
+ BT_FN_BOOL_ULONGLONGPTR_ULONGLONGPTR, ATTR_NOTHROW_LIST)
+/* NOTE: Do not change the order of BUILT_IN_GOMP_PARALLEL_LOOP_*_START.
+ They are used in index arithmetic with enum omp_clause_schedule_kind
+ in omp-low.c. */
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_LOOP_STATIC_START,
+ "GOMP_parallel_loop_static_start",
+ BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_LONG,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_LOOP_DYNAMIC_START,
+ "GOMP_parallel_loop_dynamic_start",
+ BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_LONG,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_LOOP_GUIDED_START,
+ "GOMP_parallel_loop_guided_start",
+ BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_LONG,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_LOOP_RUNTIME_START,
+ "GOMP_parallel_loop_runtime_start",
+ BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_END, "GOMP_loop_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_LOOP_END_NOWAIT, "GOMP_loop_end_nowait",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_ORDERED_START, "GOMP_ordered_start",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_ORDERED_END, "GOMP_ordered_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_START, "GOMP_parallel_start",
+ BT_FN_VOID_OMPFN_PTR_UINT, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_END, "GOMP_parallel_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_TASK, "GOMP_task",
+ BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT,
+ ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SECTIONS_START, "GOMP_sections_start",
+ BT_FN_UINT_UINT, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SECTIONS_NEXT, "GOMP_sections_next",
+ BT_FN_UINT, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_PARALLEL_SECTIONS_START,
+ "GOMP_parallel_sections_start",
+ BT_FN_VOID_OMPFN_PTR_UINT_UINT, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SECTIONS_END, "GOMP_sections_end",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SECTIONS_END_NOWAIT,
+ "GOMP_sections_end_nowait",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SINGLE_START, "GOMP_single_start",
+ BT_FN_BOOL, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SINGLE_COPY_START, "GOMP_single_copy_start",
+ BT_FN_PTR, ATTR_NOTHROW_LIST)
+DEF_GOMP_BUILTIN (BUILT_IN_GOMP_SINGLE_COPY_END, "GOMP_single_copy_end",
+ BT_FN_VOID_PTR, ATTR_NOTHROW_LIST)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/options.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/options.h
new file mode 100644
index 0000000..3bf0d8f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/options.h
@@ -0,0 +1,1486 @@
+/* This file is auto-generated by opth-gen.awk. */
+
+#ifndef OPTIONS_H
+#define OPTIONS_H
+
+extern int target_flags;
+extern int target_flags_explicit;
+
+extern int warn_abi;
+extern int warn_address;
+extern int warn_aggregate_return;
+extern int warn_array_bounds;
+extern int warn_assign_intercept;
+extern int warn_attributes;
+extern int warn_bad_function_cast;
+extern int warn_cxx_compat;
+extern int warn_cxx0x_compat;
+extern int warn_cast_align;
+extern int warn_cast_qual;
+extern int warn_char_subscripts;
+extern int warn_clobbered;
+extern int warn_conversion;
+extern int warn_conversion_null;
+extern int warn_coverage_mismatch;
+extern int warn_ctor_dtor_privacy;
+extern int warn_declaration_after_statement;
+extern int warn_deprecated;
+extern int warn_deprecated_decl;
+extern int warn_disabled_optimization;
+extern int warn_div_by_zero;
+extern int warn_ecpp;
+extern int warn_empty_body;
+extern int warn_enum_compare;
+extern int warnings_are_errors;
+extern int flag_extraneous_semicolon;
+extern int flag_fatal_errors;
+extern int warn_float_equal;
+extern int warn_format_contains_nul;
+extern int warn_format_extra_args;
+extern int warn_format_nonliteral;
+extern int warn_format_security;
+extern int warn_format_y2k;
+extern int warn_format_zero_length;
+extern int warn_ignored_qualifiers;
+extern int warn_implicit_function_declaration;
+extern int warn_implicit_int;
+extern int warn_init_self;
+extern int warn_inline;
+extern int warn_int_to_pointer_cast;
+extern int warn_invalid_offsetof;
+extern int warn_logical_op;
+extern int warn_long_long;
+extern int warn_main;
+extern int warn_maybe_uninitialized;
+extern int warn_missing_braces;
+extern int warn_missing_declarations;
+extern int warn_missing_field_initializers;
+extern int warn_missing_format_attribute;
+extern int warn_missing_noreturn;
+extern int warn_missing_parameter_type;
+extern int warn_missing_prototypes;
+extern int warn_mudflap;
+extern int warn_nested_externs;
+extern int warn_nontemplate_friend;
+extern int warn_nonvdtor;
+extern int warn_nonnull;
+extern int warn_old_style_cast;
+extern int warn_old_style_declaration;
+extern int warn_old_style_definition;
+extern int flag_newer;
+extern int warn_overflow;
+extern int warn_overlength_strings;
+extern int warn_overloaded_virtual;
+extern int warn_override_init;
+extern int warn_packed;
+extern int warn_packed_bitfield_compat;
+extern int warn_padded;
+extern int warn_parentheses;
+extern int warn_pmf2ptr;
+extern int warn_pointer_arith;
+extern int warn_pointer_sign;
+extern int warn_pointer_to_int_cast;
+extern int warn_pragmas;
+extern int warn_protocol;
+extern int warn_psabi;
+extern int warn_real_conversion;
+extern int warn_redundant_decls;
+extern int flag_redundant;
+extern int warn_reorder;
+extern int warn_return_type;
+extern int warn_ripa_opt_mismatch;
+extern int warn_selector;
+extern int warn_self_assign;
+extern int warn_self_assign_non_pod;
+extern int warn_sequence_point;
+extern int warn_shadow;
+extern int warn_shadow_compatible_local;
+extern int warn_shadow_local;
+extern int warn_sign_compare;
+extern int warn_sign_conversion;
+extern int warn_sign_promo;
+extern int warn_stack_protect;
+extern int warn_strict_aliasing;
+extern int warn_strict_overflow;
+extern int warn_strict_prototypes;
+extern int warn_strict_selector_match;
+extern int warn_switch;
+extern int warn_switch_default;
+extern int warn_switch_enum;
+extern int warn_sync_nand;
+extern int warn_synth;
+extern int warn_system_headers;
+extern int warn_thread_mismatched_lock_acq_rel;
+extern int warn_thread_mismatched_lock_order;
+extern int warn_thread_reentrant_lock;
+extern int warn_thread_safety;
+extern int warn_thread_unguarded_func;
+extern int warn_thread_unguarded_var;
+extern int warn_unsupported_lock_name;
+extern int warn_traditional;
+extern int warn_traditional_conversion;
+extern int warn_type_limits;
+extern int warn_undeclared_selector;
+extern int warn_uninitialized;
+extern int warn_notreached;
+extern int warn_unsafe_loop_optimizations;
+extern int warn_unused;
+extern int warn_unused_function;
+extern int warn_unused_label;
+extern int warn_unused_parameter;
+extern int warn_unused_value;
+extern int warn_unused_variable;
+extern int warn_vla;
+extern int warn_volatile_register_var;
+extern int warn_write_strings;
+extern int flag_pic;
+extern int flag_pie;
+extern int flag_abi_version;
+extern int align_functions;
+extern int align_jumps;
+extern int align_labels;
+extern int align_loops;
+extern int flag_argument_noalias;
+extern int flag_assert;
+extern int flag_associative_math;
+extern int flag_asynchronous_unwind_tables;
+extern int flag_auto_inc_dec;
+extern int flag_bootstrap_classes;
+extern int flag_bounds_check;
+extern int flag_branch_on_count_reg;
+extern int flag_branch_probabilities;
+extern int flag_branch_target_load_optimize;
+extern int flag_branch_target_load_optimize2;
+extern int flag_btr_bb_exclusive;
+extern int flag_caller_saves;
+extern int flag_cgraph_section;
+extern int flag_check_data_deps;
+extern int flag_check_references;
+extern int flag_clone_hot_version_paths;
+extern int flag_no_common;
+extern int flag_conserve_stack;
+extern int flag_cprop_registers;
+extern int flag_crossjumping;
+extern int flag_cse_follow_jumps;
+extern int flag_cse_skip_blocks;
+extern int flag_cx_fortran_rules;
+extern int flag_cx_limited_range;
+extern int flag_data_sections;
+extern int flag_dce;
+extern int flag_deduce_init_list;
+extern int flag_defer_pop;
+extern int flag_delayed_branch;
+extern int flag_delete_null_pointer_checks;
+extern int flag_enable_dom_check;
+extern int flag_dse;
+extern int flag_dump_noaddr;
+extern int flag_dump_unnumbered;
+extern int flag_dwarf2_cfi_asm;
+extern int flag_early_inlining;
+extern int flag_early_stack_alloc;
+extern int flag_eliminate_dwarf2_dups;
+extern int flag_debug_only_used_symbols;
+extern int flag_eliminate_unused_debug_types;
+extern int flag_emit_class_debug_always;
+extern int flag_emit_class_files;
+extern int flag_enable_icf_debug;
+extern int flag_exceptions;
+extern int flag_expensive_optimizations;
+extern int flag_filelist_file;
+extern int flag_finite_math_only;
+extern int flag_float_store;
+extern int flag_force_classes_archive_check;
+extern int flag_forward_propagate;
+extern int flag_friend_injection;
+extern int flag_no_function_cse;
+extern int flag_function_sections;
+extern int flag_float_value_profile_transformations;
+extern int flag_gcse;
+extern int flag_gcse_after_reload;
+extern int flag_gcse_las;
+extern int flag_gcse_lm;
+extern int flag_gcse_sm;
+extern int flag_gnu89_inline;
+extern int flag_graphite;
+extern int flag_graphite_identity;
+extern int flag_guess_branch_prob;
+extern int flag_hash_synchronization;
+extern int help_flag;
+extern int flag_no_ident;
+extern int flag_if_conversion;
+extern int flag_if_conversion2;
+extern int flag_indirect_classes;
+extern int flag_indirect_dispatch;
+extern int flag_indirect_inlining;
+extern int flag_inhibit_size_directive;
+extern int flag_no_inline;
+extern int flag_inline_functions;
+extern int flag_inline_functions_called_once;
+extern int flag_inline_small_functions;
+extern int flag_instrument_function_entry_exit;
+extern int flag_ipa_cp;
+extern int flag_ipa_cp_clone;
+extern int flag_ipa_matrix_reorg;
+extern int flag_ipa_pta;
+extern int flag_ipa_pure_const;
+extern int flag_ipa_reference;
+extern int flag_ipa_struct_reorg;
+extern int flag_ipa_type_escape;
+extern int flag_ira_coalesce;
+extern int flag_ira_share_save_slots;
+extern int flag_ira_share_spill_slots;
+extern int flag_ivopts;
+extern int flag_jni;
+extern int flag_jump_tables;
+extern int flag_keep_inline_functions;
+extern int flag_keep_static_consts;
+extern int flag_leading_underscore;
+extern int flag_limit_hot_components;
+extern int flag_loop_block;
+extern int flag_loop_interchange;
+extern int flag_loop_strip_mine;
+extern int flag_errno_math;
+extern int mem_report;
+extern int flag_merge_constants;
+extern int flag_merge_debug_strings;
+extern int flag_modulo_sched;
+extern int flag_modulo_sched_allow_regmoves;
+extern int flag_move_loop_invariants;
+extern int flag_mudflap;
+extern int flag_mudflap_ignore_reads;
+extern int flag_non_call_exceptions;
+extern int flag_objc_call_cxx_cdtors;
+extern int flag_objc_direct_dispatch;
+extern int flag_objc_exceptions;
+extern int flag_objc_gc;
+extern int flag_objc_sjlj_exceptions;
+extern int flag_omit_frame_pointer;
+extern int flag_openmp;
+extern int flag_optimize_locality;
+extern int flag_regmove;
+extern int flag_optimize_sibling_calls;
+extern int flag_optimize_sci;
+extern int flag_pack_struct;
+extern int flag_pcc_struct_return;
+extern int flag_peel_loops;
+extern int flag_no_peephole;
+extern int flag_peephole2;
+extern int flag_pessimistic_inline_stack_limit;
+extern const char *flag_pmu_profile_generate;
+extern const char *flag_pmu_profile_use;
+extern int post_ipa_mem_report;
+extern int pre_ipa_mem_report;
+extern int flag_predictive_commoning;
+extern int flag_prefetch_loop_arrays;
+extern int profile_flag;
+extern int profile_arc_flag;
+extern int flag_profile_correction;
+extern int flag_profile_dump;
+extern int flag_profile_generate_sampling;
+extern int flag_profile_reusedist;
+extern int flag_profile_use;
+extern int flag_profile_values;
+extern int flag_reciprocal_math;
+extern int flag_record_gcc_switches;
+extern int flag_record_options_in_elf;
+extern int flag_reduced_reflection;
+extern int flag_rename_registers;
+extern int flag_reorder_blocks;
+extern int flag_reorder_blocks_and_partition;
+extern int flag_reorder_functions;
+extern int flag_rerun_cse_after_loop;
+extern int flag_resched_modulo_sched;
+extern int flag_dyn_ipa;
+extern int flag_ripa_disallow_asm_modules;
+extern int flag_ripa_disallow_opt_mismatch;
+extern int flag_ripa_no_promote_always_inline;
+extern int flag_ripa_verbose;
+extern int flag_rounding_math;
+extern int flag_sample_profile;
+extern int flag_sample_profile_use_entry;
+extern int flag_schedule_interblock;
+extern int flag_schedule_speculative;
+extern int flag_schedule_speculative_load;
+extern int flag_schedule_speculative_load_dangerous;
+extern int flag_sched_stalled_insns;
+extern int flag_sched_stalled_insns_dep;
+extern int flag_sched2_use_superblocks;
+extern int flag_sched2_use_traces;
+extern int flag_schedule_insns;
+extern int flag_schedule_insns_after_reload;
+extern int flag_section_anchors;
+extern int flag_see;
+extern int flag_sel_sched_pipelining;
+extern int flag_sel_sched_pipelining_outer_loops;
+extern int flag_sel_sched_reschedule_pipelined;
+extern int flag_selective_scheduling;
+extern int flag_selective_scheduling2;
+extern int flag_show_column;
+extern int flag_signaling_nans;
+extern int flag_signed_zeros;
+extern int flag_single_precision_constant;
+extern int flag_split_ivs_in_unroller;
+extern int flag_split_wide_types;
+extern int flag_stack_protect;
+extern int flag_store_check;
+extern int flag_strict_aliasing;
+extern int flag_strict_enum_precision;
+extern int flag_strict_overflow;
+extern int flag_syntax_only;
+extern int flag_test_coverage;
+extern int flag_thread_jumps;
+extern int time_report;
+extern int flag_toplevel_reorder;
+extern int flag_tracer;
+extern int flag_trapping_math;
+extern int flag_trapv;
+extern int flag_tree_builtin_call_dce;
+extern int flag_tree_ccp;
+extern int flag_tree_ch;
+extern int flag_tree_copy_prop;
+extern int flag_tree_copyrename;
+extern int flag_tree_cselim;
+extern int flag_tree_dce;
+extern int flag_tree_dom;
+extern int flag_tree_dse;
+extern int flag_tree_fre;
+extern int flag_tree_loop_distribution;
+extern int flag_tree_loop_im;
+extern int flag_tree_loop_ivcanon;
+extern int flag_tree_loop_linear;
+extern int flag_tree_loop_optimize;
+extern int flag_tree_lr_shrinking;
+extern int flag_tree_live_range_split;
+extern int flag_tree_parallelize_loops;
+extern int flag_tree_pre;
+extern int flag_tree_reassoc;
+extern int flag_tree_scev_cprop;
+extern int flag_tree_sink;
+extern int flag_tree_sra;
+extern int flag_tree_switch_conversion;
+extern int flag_tree_ter;
+extern int flag_tree_vect_loop_version;
+extern int flag_tree_vectorize;
+extern int flag_tree_vrp;
+extern int flag_unit_at_a_time;
+extern int flag_unroll_all_loops;
+extern int flag_unroll_loops;
+extern int flag_unsafe_loop_optimizations;
+extern int flag_unsafe_math_optimizations;
+extern int flag_unswitch_loops;
+extern int flag_unwind_tables;
+extern int flag_use_boehm_gc;
+extern int flag_use_divide_subroutine;
+extern int flag_var_tracking;
+extern int flag_var_tracking_uninit;
+extern int flag_variable_expansion_in_unroller;
+extern int flag_vect_cost_model;
+extern int flag_verbose_asm;
+extern int flag_visibility_ms_compat;
+extern int flag_value_profile_transformations;
+extern int flag_web;
+extern int flag_whole_program;
+extern int flag_wrapv;
+extern int flag_zee;
+extern int flag_zero_initialized_in_bss;
+extern int dwarf_strict;
+extern const char *target_abi_name;
+extern int flag_android;
+extern int linux_libc;
+extern int fix_cm3_ldrd;
+extern const char *target_float_abi_name;
+extern const char *target_fpe_name;
+extern const char *target_fpu_name;
+extern const char *arm_pic_register_string;
+extern const char *structure_size_string;
+extern const char *target_thread_switch;
+extern int target_word_relocations;
+extern int pedantic;
+extern int quiet_flag;
+extern int version_flag;
+extern int inhibit_warnings;
+
+#if !defined(GCC_DRIVER) && !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
+
+/* Structure to save/restore optimization and target specific options. */
+struct cl_optimization GTY(())
+{
+ int align_functions;
+ int align_jumps;
+ int align_labels;
+ int align_loops;
+ int flag_sched_stalled_insns;
+ int flag_sched_stalled_insns_dep;
+ unsigned char optimize;
+ unsigned char optimize_size;
+ unsigned char flag_argument_noalias;
+ unsigned char flag_asynchronous_unwind_tables;
+ unsigned char flag_branch_on_count_reg;
+ unsigned char flag_branch_probabilities;
+ unsigned char flag_branch_target_load_optimize;
+ unsigned char flag_branch_target_load_optimize2;
+ unsigned char flag_btr_bb_exclusive;
+ unsigned char flag_caller_saves;
+ unsigned char flag_no_common;
+ unsigned char flag_conserve_stack;
+ unsigned char flag_cprop_registers;
+ unsigned char flag_crossjumping;
+ unsigned char flag_cse_follow_jumps;
+ unsigned char flag_cse_skip_blocks;
+ unsigned char flag_cx_fortran_rules;
+ unsigned char flag_cx_limited_range;
+ unsigned char flag_data_sections;
+ unsigned char flag_dce;
+ unsigned char flag_defer_pop;
+ unsigned char flag_delayed_branch;
+ unsigned char flag_delete_null_pointer_checks;
+ unsigned char flag_enable_dom_check;
+ unsigned char flag_dse;
+ unsigned char flag_early_inlining;
+ unsigned char flag_exceptions;
+ unsigned char flag_expensive_optimizations;
+ unsigned char flag_finite_math_only;
+ unsigned char flag_float_store;
+ unsigned char flag_forward_propagate;
+ unsigned char flag_float_value_profile_transformations;
+ unsigned char flag_gcse;
+ unsigned char flag_gcse_after_reload;
+ unsigned char flag_gcse_las;
+ unsigned char flag_gcse_lm;
+ unsigned char flag_gcse_sm;
+ unsigned char flag_graphite_identity;
+ unsigned char flag_guess_branch_prob;
+ unsigned char flag_if_conversion;
+ unsigned char flag_if_conversion2;
+ unsigned char flag_inline_functions;
+ unsigned char flag_inline_functions_called_once;
+ unsigned char flag_inline_small_functions;
+ unsigned char flag_ipa_cp;
+ unsigned char flag_ipa_cp_clone;
+ unsigned char flag_ipa_matrix_reorg;
+ unsigned char flag_ipa_pta;
+ unsigned char flag_ipa_pure_const;
+ unsigned char flag_ipa_reference;
+ unsigned char flag_ipa_type_escape;
+ unsigned char flag_ivopts;
+ unsigned char flag_jump_tables;
+ unsigned char flag_limit_hot_components;
+ unsigned char flag_loop_block;
+ unsigned char flag_loop_interchange;
+ unsigned char flag_loop_strip_mine;
+ unsigned char flag_errno_math;
+ unsigned char flag_merge_constants;
+ unsigned char flag_modulo_sched;
+ unsigned char flag_move_loop_invariants;
+ unsigned char flag_non_call_exceptions;
+ unsigned char flag_omit_frame_pointer;
+ unsigned char flag_regmove;
+ unsigned char flag_optimize_sibling_calls;
+ unsigned char flag_pack_struct;
+ unsigned char flag_peel_loops;
+ unsigned char flag_no_peephole;
+ unsigned char flag_peephole2;
+ unsigned char flag_pessimistic_inline_stack_limit;
+ unsigned char flag_predictive_commoning;
+ unsigned char flag_prefetch_loop_arrays;
+ unsigned char flag_profile_dump;
+ unsigned char flag_record_options_in_elf;
+ unsigned char flag_pcc_struct_return;
+ unsigned char flag_rename_registers;
+ unsigned char flag_reorder_blocks;
+ unsigned char flag_reorder_blocks_and_partition;
+ unsigned char flag_reorder_functions;
+ unsigned char flag_rerun_cse_after_loop;
+ unsigned char flag_resched_modulo_sched;
+ unsigned char flag_rounding_math;
+ unsigned char flag_sample_profile;
+ unsigned char flag_sample_profile_use_entry;
+ unsigned char flag_schedule_interblock;
+ unsigned char flag_schedule_speculative;
+ unsigned char flag_schedule_speculative_load;
+ unsigned char flag_schedule_speculative_load_dangerous;
+ unsigned char flag_sched2_use_superblocks;
+ unsigned char flag_sched2_use_traces;
+ unsigned char flag_schedule_insns;
+ unsigned char flag_schedule_insns_after_reload;
+ unsigned char flag_section_anchors;
+ unsigned char flag_sel_sched_pipelining;
+ unsigned char flag_sel_sched_pipelining_outer_loops;
+ unsigned char flag_sel_sched_reschedule_pipelined;
+ unsigned char flag_selective_scheduling;
+ unsigned char flag_selective_scheduling2;
+ unsigned char flag_signaling_nans;
+ unsigned char flag_signed_zeros;
+ unsigned char flag_single_precision_constant;
+ unsigned char flag_split_ivs_in_unroller;
+ unsigned char flag_split_wide_types;
+ unsigned char flag_strict_aliasing;
+ unsigned char flag_strict_enum_precision;
+ unsigned char flag_thread_jumps;
+ unsigned char flag_toplevel_reorder;
+ unsigned char flag_trapping_math;
+ unsigned char flag_trapv;
+ unsigned char flag_tree_builtin_call_dce;
+ unsigned char flag_tree_ccp;
+ unsigned char flag_tree_ch;
+ unsigned char flag_tree_copy_prop;
+ unsigned char flag_tree_copyrename;
+ unsigned char flag_tree_cselim;
+ unsigned char flag_tree_dce;
+ unsigned char flag_tree_dom;
+ unsigned char flag_tree_dse;
+ unsigned char flag_tree_fre;
+ unsigned char flag_tree_loop_distribution;
+ unsigned char flag_tree_loop_im;
+ unsigned char flag_tree_loop_ivcanon;
+ unsigned char flag_tree_loop_linear;
+ unsigned char flag_tree_loop_optimize;
+ unsigned char flag_tree_lr_shrinking;
+ unsigned char flag_tree_live_range_split;
+ unsigned char flag_tree_pre;
+ unsigned char flag_tree_reassoc;
+ unsigned char flag_tree_scev_cprop;
+ unsigned char flag_tree_sink;
+ unsigned char flag_tree_sra;
+ unsigned char flag_tree_switch_conversion;
+ unsigned char flag_tree_ter;
+ unsigned char flag_tree_vect_loop_version;
+ unsigned char flag_tree_vectorize;
+ unsigned char flag_tree_vrp;
+ unsigned char flag_unit_at_a_time;
+ unsigned char flag_unroll_all_loops;
+ unsigned char flag_unroll_loops;
+ unsigned char flag_unsafe_loop_optimizations;
+ unsigned char flag_unsafe_math_optimizations;
+ unsigned char flag_unswitch_loops;
+ unsigned char flag_unwind_tables;
+ unsigned char flag_var_tracking;
+ unsigned char flag_var_tracking_uninit;
+ unsigned char flag_variable_expansion_in_unroller;
+ unsigned char flag_vect_cost_model;
+ unsigned char flag_value_profile_transformations;
+ unsigned char flag_web;
+ unsigned char flag_whole_program;
+ unsigned char flag_wrapv;
+};
+
+/* Structure to save/restore selected target specific options. */
+struct cl_target_option GTY(())
+{
+ int target_flags;
+};
+
+
+/* Save optimization variables into a structure. */
+extern void cl_optimization_save (struct cl_optimization *);
+
+/* Restore optimization variables from a structure. */
+extern void cl_optimization_restore (struct cl_optimization *);
+
+/* Print optimization variables from a structure. */
+extern void cl_optimization_print (FILE *, int, struct cl_optimization *);
+
+/* Save selected option variables into a structure. */
+extern void cl_target_option_save (struct cl_target_option *);
+
+/* Restore selected option variables from a structure. */
+extern void cl_target_option_restore (struct cl_target_option *);
+
+/* Print target option variables from a structure. */
+extern void cl_target_option_print (FILE *, int, struct cl_target_option *);
+#endif
+
+#define MASK_ABORT_NORETURN (1 << 0)
+#define OPTION_MASK_ANDROID (1 << 0)
+#define MASK_APCS_FLOAT (1 << 1)
+#define MASK_APCS_FRAME (1 << 2)
+#define MASK_APCS_REENT (1 << 3)
+#define MASK_APCS_STACK (1 << 4)
+#define MASK_BIG_END (1 << 5)
+#define MASK_CALLEE_INTERWORKING (1 << 6)
+#define MASK_CALLER_INTERWORKING (1 << 7)
+#define MASK_CIRRUS_FIX_INVALID_INSNS (1 << 8)
+#define MASK_FPE (1 << 9)
+#define MASK_LONG_CALLS (1 << 10)
+#define MASK_POKE_FUNCTION_NAME (1 << 11)
+#define MASK_SCHED_PROLOG (1 << 12)
+#define MASK_SINGLE_PIC_BASE (1 << 13)
+#define MASK_THUMB (1 << 14)
+#define MASK_INTERWORK (1 << 15)
+#define MASK_TPCS_FRAME (1 << 16)
+#define MASK_TPCS_LEAF_FRAME (1 << 17)
+#define MASK_NEON_VECTORIZE_QUAD (1 << 18)
+#define MASK_LITTLE_WORDS (1 << 19)
+
+#define TARGET_ABORT_NORETURN ((target_flags & MASK_ABORT_NORETURN) != 0)
+#define OPTION_ANDROID ((flag_android & OPTION_MASK_ANDROID) != 0)
+#define TARGET_APCS_FLOAT ((target_flags & MASK_APCS_FLOAT) != 0)
+#define TARGET_APCS_FRAME ((target_flags & MASK_APCS_FRAME) != 0)
+#define TARGET_APCS_REENT ((target_flags & MASK_APCS_REENT) != 0)
+#define TARGET_APCS_STACK ((target_flags & MASK_APCS_STACK) != 0)
+#define TARGET_BIG_END ((target_flags & MASK_BIG_END) != 0)
+#define TARGET_CALLEE_INTERWORKING ((target_flags & MASK_CALLEE_INTERWORKING) != 0)
+#define TARGET_CALLER_INTERWORKING ((target_flags & MASK_CALLER_INTERWORKING) != 0)
+#define TARGET_CIRRUS_FIX_INVALID_INSNS ((target_flags & MASK_CIRRUS_FIX_INVALID_INSNS) != 0)
+#define TARGET_FPE ((target_flags & MASK_FPE) != 0)
+#define TARGET_LONG_CALLS ((target_flags & MASK_LONG_CALLS) != 0)
+#define TARGET_POKE_FUNCTION_NAME ((target_flags & MASK_POKE_FUNCTION_NAME) != 0)
+#define TARGET_SCHED_PROLOG ((target_flags & MASK_SCHED_PROLOG) != 0)
+#define TARGET_SINGLE_PIC_BASE ((target_flags & MASK_SINGLE_PIC_BASE) != 0)
+#define TARGET_THUMB ((target_flags & MASK_THUMB) != 0)
+#define TARGET_INTERWORK ((target_flags & MASK_INTERWORK) != 0)
+#define TARGET_TPCS_FRAME ((target_flags & MASK_TPCS_FRAME) != 0)
+#define TARGET_TPCS_LEAF_FRAME ((target_flags & MASK_TPCS_LEAF_FRAME) != 0)
+#define TARGET_NEON_VECTORIZE_QUAD ((target_flags & MASK_NEON_VECTORIZE_QUAD) != 0)
+#define TARGET_LITTLE_WORDS ((target_flags & MASK_LITTLE_WORDS) != 0)
+
+
+#define CL_Ada (1 << 0)
+#define CL_C (1 << 1)
+#define CL_CXX (1 << 2)
+#define CL_Fortran (1 << 3)
+#define CL_Java (1 << 4)
+#define CL_ObjC (1 << 5)
+#define CL_ObjCXX (1 << 6)
+#define CL_LANG_ALL ((1 << 7) - 1)
+
+enum opt_code
+{
+ OPT__help, /* --help */
+ OPT__help_, /* --help= */
+ OPT__output_pch_, /* --output-pch= */
+ OPT__param, /* --param */
+ OPT__target_help, /* --target-help */
+ OPT__version, /* --version */
+ OPT_A, /* -A */
+ OPT_C, /* -C */
+ OPT_CC, /* -CC */
+ OPT_D, /* -D */
+ OPT_E, /* -E */
+ OPT_F, /* -F */
+ OPT_G, /* -G */
+ OPT_H, /* -H */
+ OPT_I, /* -I */
+ OPT_J, /* -J */
+ OPT_M, /* -M */
+ OPT_MD, /* -MD */
+ OPT_MD_, /* -MD_ */
+ OPT_MF, /* -MF */
+ OPT_MG, /* -MG */
+ OPT_MM, /* -MM */
+ OPT_MMD, /* -MMD */
+ OPT_MMD_, /* -MMD_ */
+ OPT_MP, /* -MP */
+ OPT_MQ, /* -MQ */
+ OPT_MT, /* -MT */
+ OPT_O, /* -O */
+ OPT_Os, /* -Os */
+ OPT_P, /* -P */
+ OPT_U, /* -U */
+ OPT_W, /* -W */
+ OPT_Wabi, /* -Wabi */
+ OPT_Waddress, /* -Waddress */
+ OPT_Waggregate_return, /* -Waggregate-return */
+ OPT_Waliasing, /* -Waliasing */
+ OPT_Walign_commons, /* -Walign-commons */
+ OPT_Wall, /* -Wall */
+ OPT_Wall_deprecation, /* -Wall-deprecation */
+ OPT_Wall_javadoc, /* -Wall-javadoc */
+ OPT_Wampersand, /* -Wampersand */
+ OPT_Warray_bounds, /* -Warray-bounds */
+ OPT_Warray_temporaries, /* -Warray-temporaries */
+ OPT_Wassert_identifier, /* -Wassert-identifier */
+ OPT_Wassign_intercept, /* -Wassign-intercept */
+ OPT_Wattributes, /* -Wattributes */
+ OPT_Wbad_function_cast, /* -Wbad-function-cast */
+ OPT_Wboxing, /* -Wboxing */
+ OPT_Wbuiltin_macro_redefined, /* -Wbuiltin-macro-redefined */
+ OPT_Wc___compat, /* -Wc++-compat */
+ OPT_Wc__0x_compat, /* -Wc++0x-compat */
+ OPT_Wcast_align, /* -Wcast-align */
+ OPT_Wcast_qual, /* -Wcast-qual */
+ OPT_Wchar_concat, /* -Wchar-concat */
+ OPT_Wchar_subscripts, /* -Wchar-subscripts */
+ OPT_Wcharacter_truncation, /* -Wcharacter-truncation */
+ OPT_Wclobbered, /* -Wclobbered */
+ OPT_Wcomment, /* -Wcomment */
+ OPT_Wcomments, /* -Wcomments */
+ OPT_Wcondition_assign, /* -Wcondition-assign */
+ OPT_Wconstructor_name, /* -Wconstructor-name */
+ OPT_Wconversion, /* -Wconversion */
+ OPT_Wconversion_null, /* -Wconversion-null */
+ OPT_Wcoverage_mismatch, /* -Wcoverage-mismatch */
+ OPT_Wctor_dtor_privacy, /* -Wctor-dtor-privacy */
+ OPT_Wdeclaration_after_statement, /* -Wdeclaration-after-statement */
+ OPT_Wdep_ann, /* -Wdep-ann */
+ OPT_Wdeprecated, /* -Wdeprecated */
+ OPT_Wdeprecated_declarations, /* -Wdeprecated-declarations */
+ OPT_Wdisabled_optimization, /* -Wdisabled-optimization */
+ OPT_Wdiscouraged, /* -Wdiscouraged */
+ OPT_Wdiv_by_zero, /* -Wdiv-by-zero */
+ OPT_Weffc__, /* -Weffc++ */
+ OPT_Wempty_block, /* -Wempty-block */
+ OPT_Wempty_body, /* -Wempty-body */
+ OPT_Wendif_labels, /* -Wendif-labels */
+ OPT_Wenum_compare, /* -Wenum-compare */
+ OPT_Wenum_identifier, /* -Wenum-identifier */
+ OPT_Wenum_switch, /* -Wenum-switch */
+ OPT_Werror, /* -Werror */
+ OPT_Werror_implicit_function_declaration, /* -Werror-implicit-function-declaration */
+ OPT_Werror_, /* -Werror= */
+ OPT_Wextra, /* -Wextra */
+ OPT_Wextraneous_semicolon, /* -Wextraneous-semicolon */
+ OPT_Wfallthrough, /* -Wfallthrough */
+ OPT_Wfatal_errors, /* -Wfatal-errors */
+ OPT_Wfield_hiding, /* -Wfield-hiding */
+ OPT_Wfinal_bound, /* -Wfinal-bound */
+ OPT_Wfinally, /* -Wfinally */
+ OPT_Wfloat_equal, /* -Wfloat-equal */
+ OPT_Wforbidden, /* -Wforbidden */
+ OPT_Wformat, /* -Wformat */
+ OPT_Wformat_contains_nul, /* -Wformat-contains-nul */
+ OPT_Wformat_extra_args, /* -Wformat-extra-args */
+ OPT_Wformat_nonliteral, /* -Wformat-nonliteral */
+ OPT_Wformat_security, /* -Wformat-security */
+ OPT_Wformat_y2k, /* -Wformat-y2k */
+ OPT_Wformat_zero_length, /* -Wformat-zero-length */
+ OPT_Wformat_, /* -Wformat= */
+ OPT_Wframe_larger_than_, /* -Wframe-larger-than= */
+ OPT_Whiding, /* -Whiding */
+ OPT_Wignored_qualifiers, /* -Wignored-qualifiers */
+ OPT_Wimplicit, /* -Wimplicit */
+ OPT_Wimplicit_function_declaration, /* -Wimplicit-function-declaration */
+ OPT_Wimplicit_int, /* -Wimplicit-int */
+ OPT_Wimplicit_interface, /* -Wimplicit-interface */
+ OPT_Wimport, /* -Wimport */
+ OPT_Windirect_static, /* -Windirect-static */
+ OPT_Winit_self, /* -Winit-self */
+ OPT_Winline, /* -Winline */
+ OPT_Wint_to_pointer_cast, /* -Wint-to-pointer-cast */
+ OPT_Wintf_annotation, /* -Wintf-annotation */
+ OPT_Wintf_non_inherited, /* -Wintf-non-inherited */
+ OPT_Wintrinsic_shadow, /* -Wintrinsic-shadow */
+ OPT_Wintrinsics_std, /* -Wintrinsics-std */
+ OPT_Winvalid_offsetof, /* -Winvalid-offsetof */
+ OPT_Winvalid_pch, /* -Winvalid-pch */
+ OPT_Wjavadoc, /* -Wjavadoc */
+ OPT_Wlarger_than_, /* -Wlarger-than- */
+ OPT_Wlarger_than_eq, /* -Wlarger-than= */
+ OPT_Wline_truncation, /* -Wline-truncation */
+ OPT_Wlocal_hiding, /* -Wlocal-hiding */
+ OPT_Wlogical_op, /* -Wlogical-op */
+ OPT_Wlong_long, /* -Wlong-long */
+ OPT_Wmain, /* -Wmain */
+ OPT_Wmasked_catch_block, /* -Wmasked-catch-block */
+ OPT_Wmaybe_uninitialized, /* -Wmaybe-uninitialized */
+ OPT_Wmissing_braces, /* -Wmissing-braces */
+ OPT_Wmissing_declarations, /* -Wmissing-declarations */
+ OPT_Wmissing_field_initializers, /* -Wmissing-field-initializers */
+ OPT_Wmissing_format_attribute, /* -Wmissing-format-attribute */
+ OPT_Wmissing_include_dirs, /* -Wmissing-include-dirs */
+ OPT_Wmissing_noreturn, /* -Wmissing-noreturn */
+ OPT_Wmissing_parameter_type, /* -Wmissing-parameter-type */
+ OPT_Wmissing_prototypes, /* -Wmissing-prototypes */
+ OPT_Wmudflap, /* -Wmudflap */
+ OPT_Wmultichar, /* -Wmultichar */
+ OPT_Wnested_externs, /* -Wnested-externs */
+ OPT_Wnls, /* -Wnls */
+ OPT_Wno_effect_assign, /* -Wno-effect-assign */
+ OPT_Wnon_template_friend, /* -Wnon-template-friend */
+ OPT_Wnon_virtual_dtor, /* -Wnon-virtual-dtor */
+ OPT_Wnonnull, /* -Wnonnull */
+ OPT_Wnormalized_, /* -Wnormalized= */
+ OPT_Wnull, /* -Wnull */
+ OPT_Wold_style_cast, /* -Wold-style-cast */
+ OPT_Wold_style_declaration, /* -Wold-style-declaration */
+ OPT_Wold_style_definition, /* -Wold-style-definition */
+ OPT_Wout_of_date, /* -Wout-of-date */
+ OPT_Wover_ann, /* -Wover-ann */
+ OPT_Woverflow, /* -Woverflow */
+ OPT_Woverlength_strings, /* -Woverlength-strings */
+ OPT_Woverloaded_virtual, /* -Woverloaded-virtual */
+ OPT_Woverride_init, /* -Woverride-init */
+ OPT_Wpacked, /* -Wpacked */
+ OPT_Wpacked_bitfield_compat, /* -Wpacked-bitfield-compat */
+ OPT_Wpadded, /* -Wpadded */
+ OPT_Wparam_assign, /* -Wparam-assign */
+ OPT_Wparentheses, /* -Wparentheses */
+ OPT_Wpkg_default_method, /* -Wpkg-default-method */
+ OPT_Wpmf_conversions, /* -Wpmf-conversions */
+ OPT_Wpointer_arith, /* -Wpointer-arith */
+ OPT_Wpointer_sign, /* -Wpointer-sign */
+ OPT_Wpointer_to_int_cast, /* -Wpointer-to-int-cast */
+ OPT_Wpragmas, /* -Wpragmas */
+ OPT_Wprotocol, /* -Wprotocol */
+ OPT_Wpsabi, /* -Wpsabi */
+ OPT_Wraw, /* -Wraw */
+ OPT_Wreal_conversion, /* -Wreal-conversion */
+ OPT_Wredundant_decls, /* -Wredundant-decls */
+ OPT_Wredundant_modifiers, /* -Wredundant-modifiers */
+ OPT_Wreorder, /* -Wreorder */
+ OPT_Wreturn_type, /* -Wreturn-type */
+ OPT_Wripa_opt_mismatch, /* -Wripa-opt-mismatch */
+ OPT_Wselector, /* -Wselector */
+ OPT_Wself_assign, /* -Wself-assign */
+ OPT_Wself_assign_non_pod, /* -Wself-assign-non-pod */
+ OPT_Wsequence_point, /* -Wsequence-point */
+ OPT_Wserial, /* -Wserial */
+ OPT_Wshadow, /* -Wshadow */
+ OPT_Wshadow_compatible_local, /* -Wshadow-compatible-local */
+ OPT_Wshadow_local, /* -Wshadow-local */
+ OPT_Wsign_compare, /* -Wsign-compare */
+ OPT_Wsign_conversion, /* -Wsign-conversion */
+ OPT_Wsign_promo, /* -Wsign-promo */
+ OPT_Wspecial_param_hiding, /* -Wspecial-param-hiding */
+ OPT_Wstack_protector, /* -Wstack-protector */
+ OPT_Wstatic_access, /* -Wstatic-access */
+ OPT_Wstatic_receiver, /* -Wstatic-receiver */
+ OPT_Wstrict_aliasing, /* -Wstrict-aliasing */
+ OPT_Wstrict_aliasing_, /* -Wstrict-aliasing= */
+ OPT_Wstrict_null_sentinel, /* -Wstrict-null-sentinel */
+ OPT_Wstrict_overflow, /* -Wstrict-overflow */
+ OPT_Wstrict_overflow_, /* -Wstrict-overflow= */
+ OPT_Wstrict_prototypes, /* -Wstrict-prototypes */
+ OPT_Wstrict_selector_match, /* -Wstrict-selector-match */
+ OPT_Wsuppress, /* -Wsuppress */
+ OPT_Wsurprising, /* -Wsurprising */
+ OPT_Wswitch, /* -Wswitch */
+ OPT_Wswitch_default, /* -Wswitch-default */
+ OPT_Wswitch_enum, /* -Wswitch-enum */
+ OPT_Wsync_nand, /* -Wsync-nand */
+ OPT_Wsynth, /* -Wsynth */
+ OPT_Wsynthetic_access, /* -Wsynthetic-access */
+ OPT_Wsystem_headers, /* -Wsystem-headers */
+ OPT_Wtabs, /* -Wtabs */
+ OPT_Wtasks, /* -Wtasks */
+ OPT_Wthread_mismatched_lock_acq_rel, /* -Wthread-mismatched-lock-acq-rel */
+ OPT_Wthread_mismatched_lock_order, /* -Wthread-mismatched-lock-order */
+ OPT_Wthread_reentrant_lock, /* -Wthread-reentrant-lock */
+ OPT_Wthread_safety, /* -Wthread-safety */
+ OPT_Wthread_unguarded_func, /* -Wthread-unguarded-func */
+ OPT_Wthread_unguarded_var, /* -Wthread-unguarded-var */
+ OPT_Wthread_unsupported_lock_name, /* -Wthread-unsupported-lock-name */
+ OPT_Wtraditional, /* -Wtraditional */
+ OPT_Wtraditional_conversion, /* -Wtraditional-conversion */
+ OPT_Wtrigraphs, /* -Wtrigraphs */
+ OPT_Wtype_hiding, /* -Wtype-hiding */
+ OPT_Wtype_limits, /* -Wtype-limits */
+ OPT_Wuncheck, /* -Wuncheck */
+ OPT_Wundeclared_selector, /* -Wundeclared-selector */
+ OPT_Wundef, /* -Wundef */
+ OPT_Wunderflow, /* -Wunderflow */
+ OPT_Wuninitialized, /* -Wuninitialized */
+ OPT_Wunknown_pragmas, /* -Wunknown-pragmas */
+ OPT_Wunnecessary_else, /* -Wunnecessary-else */
+ OPT_Wunqualified_field, /* -Wunqualified-field */
+ OPT_Wunreachable_code, /* -Wunreachable-code */
+ OPT_Wunsafe_loop_optimizations, /* -Wunsafe-loop-optimizations */
+ OPT_Wunused, /* -Wunused */
+ OPT_Wunused_argument, /* -Wunused-argument */
+ OPT_Wunused_function, /* -Wunused-function */
+ OPT_Wunused_import, /* -Wunused-import */
+ OPT_Wunused_label, /* -Wunused-label */
+ OPT_Wunused_local, /* -Wunused-local */
+ OPT_Wunused_macros, /* -Wunused-macros */
+ OPT_Wunused_parameter, /* -Wunused-parameter */
+ OPT_Wunused_private, /* -Wunused-private */
+ OPT_Wunused_thrown, /* -Wunused-thrown */
+ OPT_Wunused_value, /* -Wunused-value */
+ OPT_Wunused_variable, /* -Wunused-variable */
+ OPT_Wuseless_type_check, /* -Wuseless-type-check */
+ OPT_Wvarargs_cast, /* -Wvarargs-cast */
+ OPT_Wvariadic_macros, /* -Wvariadic-macros */
+ OPT_Wvla, /* -Wvla */
+ OPT_Wvolatile_register_var, /* -Wvolatile-register-var */
+ OPT_Wwarning_token, /* -Wwarning-token */
+ OPT_Wwrite_strings, /* -Wwrite-strings */
+ OPT_ansi, /* -ansi */
+ OPT_aux_info, /* -aux-info */
+ OPT_aux_info_, /* -aux-info= */
+ OPT_auxbase, /* -auxbase */
+ OPT_auxbase_strip, /* -auxbase-strip */
+ OPT_cpp, /* -cpp */
+ OPT_d, /* -d */
+ OPT_dumpbase, /* -dumpbase */
+ OPT_fCLASSPATH_, /* -fCLASSPATH= */
+ OPT_fPIC, /* -fPIC */
+ OPT_fPIE, /* -fPIE */
+ OPT_fRTS_, /* -fRTS= */
+ OPT_fabi_version_, /* -fabi-version= */
+ OPT_faccess_control, /* -faccess-control */
+ OPT_falign_commons, /* -falign-commons */
+ OPT_falign_functions, /* -falign-functions */
+ OPT_falign_functions_, /* -falign-functions= */
+ OPT_falign_jumps, /* -falign-jumps */
+ OPT_falign_jumps_, /* -falign-jumps= */
+ OPT_falign_labels, /* -falign-labels */
+ OPT_falign_labels_, /* -falign-labels= */
+ OPT_falign_loops, /* -falign-loops */
+ OPT_falign_loops_, /* -falign-loops= */
+ OPT_fall_intrinsics, /* -fall-intrinsics */
+ OPT_fall_virtual, /* -fall-virtual */
+ OPT_fallow_leading_underscore, /* -fallow-leading-underscore */
+ OPT_falt_external_templates, /* -falt-external-templates */
+ OPT_fargument_alias, /* -fargument-alias */
+ OPT_fargument_noalias, /* -fargument-noalias */
+ OPT_fargument_noalias_anything, /* -fargument-noalias-anything */
+ OPT_fargument_noalias_global, /* -fargument-noalias-global */
+ OPT_fasm, /* -fasm */
+ OPT_fassert, /* -fassert */
+ OPT_fassociative_math, /* -fassociative-math */
+ OPT_fassume_compiled, /* -fassume-compiled */
+ OPT_fassume_compiled_, /* -fassume-compiled= */
+ OPT_fasynchronous_unwind_tables, /* -fasynchronous-unwind-tables */
+ OPT_fauto_inc_dec, /* -fauto-inc-dec */
+ OPT_fautomatic, /* -fautomatic */
+ OPT_faux_classpath, /* -faux-classpath */
+ OPT_fbackslash, /* -fbackslash */
+ OPT_fbacktrace, /* -fbacktrace */
+ OPT_fblas_matmul_limit_, /* -fblas-matmul-limit= */
+ OPT_fbootclasspath_, /* -fbootclasspath= */
+ OPT_fbootstrap_classes, /* -fbootstrap-classes */
+ OPT_fbounds_check, /* -fbounds-check */
+ OPT_fbranch_count_reg, /* -fbranch-count-reg */
+ OPT_fbranch_probabilities, /* -fbranch-probabilities */
+ OPT_fbranch_target_load_optimize, /* -fbranch-target-load-optimize */
+ OPT_fbranch_target_load_optimize2, /* -fbranch-target-load-optimize2 */
+ OPT_fbtr_bb_exclusive, /* -fbtr-bb-exclusive */
+ OPT_fbuiltin, /* -fbuiltin */
+ OPT_fbuiltin_, /* -fbuiltin- */
+ OPT_fcall_saved_, /* -fcall-saved- */
+ OPT_fcall_used_, /* -fcall-used- */
+ OPT_fcaller_saves, /* -fcaller-saves */
+ OPT_fcgraph_section, /* -fcgraph-section */
+ OPT_fcheck_array_temporaries, /* -fcheck-array-temporaries */
+ OPT_fcheck_data_deps, /* -fcheck-data-deps */
+ OPT_fcheck_new, /* -fcheck-new */
+ OPT_fcheck_references, /* -fcheck-references */
+ OPT_fclasspath_, /* -fclasspath= */
+ OPT_fclone_hot_version_paths, /* -fclone-hot-version-paths */
+ OPT_fcommon, /* -fcommon */
+ OPT_fcompile_resource_, /* -fcompile-resource= */
+ OPT_fcond_mismatch, /* -fcond-mismatch */
+ OPT_fconserve_space, /* -fconserve-space */
+ OPT_fconserve_stack, /* -fconserve-stack */
+ OPT_fconstant_string_class_, /* -fconstant-string-class= */
+ OPT_fconvert_big_endian, /* -fconvert=big-endian */
+ OPT_fconvert_little_endian, /* -fconvert=little-endian */
+ OPT_fconvert_native, /* -fconvert=native */
+ OPT_fconvert_swap, /* -fconvert=swap */
+ OPT_fcprop_registers, /* -fcprop-registers */
+ OPT_fcray_pointer, /* -fcray-pointer */
+ OPT_fcrossjumping, /* -fcrossjumping */
+ OPT_fcse_follow_jumps, /* -fcse-follow-jumps */
+ OPT_fcse_skip_blocks, /* -fcse-skip-blocks */
+ OPT_fcx_fortran_rules, /* -fcx-fortran-rules */
+ OPT_fcx_limited_range, /* -fcx-limited-range */
+ OPT_fd_lines_as_code, /* -fd-lines-as-code */
+ OPT_fd_lines_as_comments, /* -fd-lines-as-comments */
+ OPT_fdata_sections, /* -fdata-sections */
+ OPT_fdbg_cnt_list, /* -fdbg-cnt-list */
+ OPT_fdbg_cnt_, /* -fdbg-cnt= */
+ OPT_fdce, /* -fdce */
+ OPT_fdebug_prefix_map_, /* -fdebug-prefix-map= */
+ OPT_fdeduce_init_list, /* -fdeduce-init-list */
+ OPT_fdefault_double_8, /* -fdefault-double-8 */
+ OPT_fdefault_inline, /* -fdefault-inline */
+ OPT_fdefault_integer_8, /* -fdefault-integer-8 */
+ OPT_fdefault_real_8, /* -fdefault-real-8 */
+ OPT_fdefer_pop, /* -fdefer-pop */
+ OPT_fdelayed_branch, /* -fdelayed-branch */
+ OPT_fdelete_null_pointer_checks, /* -fdelete-null-pointer-checks */
+ OPT_fdiagnostics_show_location_, /* -fdiagnostics-show-location= */
+ OPT_fdiagnostics_show_option, /* -fdiagnostics-show-option */
+ OPT_fdirectives_only, /* -fdirectives-only */
+ OPT_fdisable_assertions, /* -fdisable-assertions */
+ OPT_fdisable_assertions_, /* -fdisable-assertions= */
+ OPT_fdollar_ok, /* -fdollar-ok */
+ OPT_fdollars_in_identifiers, /* -fdollars-in-identifiers */
+ OPT_fdominance_check, /* -fdominance-check */
+ OPT_fdse, /* -fdse */
+ OPT_fdump_, /* -fdump- */
+ OPT_fdump_core, /* -fdump-core */
+ OPT_fdump_noaddr, /* -fdump-noaddr */
+ OPT_fdump_parse_tree, /* -fdump-parse-tree */
+ OPT_fdump_unnumbered, /* -fdump-unnumbered */
+ OPT_fdwarf2_cfi_asm, /* -fdwarf2-cfi-asm */
+ OPT_fearly_inlining, /* -fearly-inlining */
+ OPT_fearly_stack_alloc, /* -fearly-stack-alloc */
+ OPT_felide_constructors, /* -felide-constructors */
+ OPT_feliminate_dwarf2_dups, /* -feliminate-dwarf2-dups */
+ OPT_feliminate_unused_debug_symbols, /* -feliminate-unused-debug-symbols */
+ OPT_feliminate_unused_debug_types, /* -feliminate-unused-debug-types */
+ OPT_femit_class_debug_always, /* -femit-class-debug-always */
+ OPT_femit_class_file, /* -femit-class-file */
+ OPT_femit_class_files, /* -femit-class-files */
+ OPT_femit_struct_debug_baseonly, /* -femit-struct-debug-baseonly */
+ OPT_femit_struct_debug_detailed_, /* -femit-struct-debug-detailed= */
+ OPT_femit_struct_debug_reduced, /* -femit-struct-debug-reduced */
+ OPT_fenable_assertions, /* -fenable-assertions */
+ OPT_fenable_assertions_, /* -fenable-assertions= */
+ OPT_fenable_icf_debug, /* -fenable-icf-debug */
+ OPT_fencoding_, /* -fencoding= */
+ OPT_fenforce_eh_specs, /* -fenforce-eh-specs */
+ OPT_fenum_int_equiv, /* -fenum-int-equiv */
+ OPT_fexceptions, /* -fexceptions */
+ OPT_fexec_charset_, /* -fexec-charset= */
+ OPT_fexpensive_optimizations, /* -fexpensive-optimizations */
+ OPT_fextdirs_, /* -fextdirs= */
+ OPT_fextended_identifiers, /* -fextended-identifiers */
+ OPT_fexternal_blas, /* -fexternal-blas */
+ OPT_fexternal_templates, /* -fexternal-templates */
+ OPT_ff2c, /* -ff2c */
+ OPT_ffast_math, /* -ffast-math */
+ OPT_ffilelist_file, /* -ffilelist-file */
+ OPT_ffinite_math_only, /* -ffinite-math-only */
+ OPT_ffixed_, /* -ffixed- */
+ OPT_ffixed_form, /* -ffixed-form */
+ OPT_ffixed_line_length_, /* -ffixed-line-length- */
+ OPT_ffixed_line_length_none, /* -ffixed-line-length-none */
+ OPT_ffloat_store, /* -ffloat-store */
+ OPT_ffor_scope, /* -ffor-scope */
+ OPT_fforce_addr, /* -fforce-addr */
+ OPT_fforce_classes_archive_check, /* -fforce-classes-archive-check */
+ OPT_fforward_propagate, /* -fforward-propagate */
+ OPT_ffpe_trap_, /* -ffpe-trap= */
+ OPT_ffree_form, /* -ffree-form */
+ OPT_ffree_line_length_, /* -ffree-line-length- */
+ OPT_ffree_line_length_none, /* -ffree-line-length-none */
+ OPT_ffreestanding, /* -ffreestanding */
+ OPT_ffriend_injection, /* -ffriend-injection */
+ OPT_ffunction_cse, /* -ffunction-cse */
+ OPT_ffunction_sections, /* -ffunction-sections */
+ OPT_ffvpt, /* -ffvpt */
+ OPT_ffvpt_functions_, /* -ffvpt-functions= */
+ OPT_fgcse, /* -fgcse */
+ OPT_fgcse_after_reload, /* -fgcse-after-reload */
+ OPT_fgcse_las, /* -fgcse-las */
+ OPT_fgcse_lm, /* -fgcse-lm */
+ OPT_fgcse_sm, /* -fgcse-sm */
+ OPT_fgnu_keywords, /* -fgnu-keywords */
+ OPT_fgnu_runtime, /* -fgnu-runtime */
+ OPT_fgnu89_inline, /* -fgnu89-inline */
+ OPT_fgraphite, /* -fgraphite */
+ OPT_fgraphite_identity, /* -fgraphite-identity */
+ OPT_fguess_branch_probability, /* -fguess-branch-probability */
+ OPT_fguiding_decls, /* -fguiding-decls */
+ OPT_fhandle_exceptions, /* -fhandle-exceptions */
+ OPT_fhash_synchronization, /* -fhash-synchronization */
+ OPT_fhelp, /* -fhelp */
+ OPT_fhelp_, /* -fhelp= */
+ OPT_fhonor_std, /* -fhonor-std */
+ OPT_fhosted, /* -fhosted */
+ OPT_fhuge_objects, /* -fhuge-objects */
+ OPT_fident, /* -fident */
+ OPT_fif_conversion, /* -fif-conversion */
+ OPT_fif_conversion2, /* -fif-conversion2 */
+ OPT_fimplement_inlines, /* -fimplement-inlines */
+ OPT_fimplicit_inline_templates, /* -fimplicit-inline-templates */
+ OPT_fimplicit_none, /* -fimplicit-none */
+ OPT_fimplicit_templates, /* -fimplicit-templates */
+ OPT_findirect_classes, /* -findirect-classes */
+ OPT_findirect_dispatch, /* -findirect-dispatch */
+ OPT_findirect_inlining, /* -findirect-inlining */
+ OPT_finhibit_size_directive, /* -finhibit-size-directive */
+ OPT_finit_character_, /* -finit-character= */
+ OPT_finit_integer_, /* -finit-integer= */
+ OPT_finit_local_zero, /* -finit-local-zero */
+ OPT_finit_logical_, /* -finit-logical= */
+ OPT_finit_real_, /* -finit-real= */
+ OPT_finline, /* -finline */
+ OPT_finline_functions, /* -finline-functions */
+ OPT_finline_functions_called_once, /* -finline-functions-called-once */
+ OPT_finline_limit_, /* -finline-limit- */
+ OPT_finline_limit_eq, /* -finline-limit= */
+ OPT_finline_plan_, /* -finline-plan- */
+ OPT_finline_small_functions, /* -finline-small-functions */
+ OPT_finput_charset_, /* -finput-charset= */
+ OPT_finstrument_functions, /* -finstrument-functions */
+ OPT_finstrument_functions_exclude_file_list_,/* -finstrument-functions-exclude-file-list= */
+ OPT_finstrument_functions_exclude_function_list_,/* -finstrument-functions-exclude-function-list= */
+ OPT_fintrinsic_modules_path, /* -fintrinsic-modules-path */
+ OPT_fipa_cp, /* -fipa-cp */
+ OPT_fipa_cp_clone, /* -fipa-cp-clone */
+ OPT_fipa_matrix_reorg, /* -fipa-matrix-reorg */
+ OPT_fipa_pta, /* -fipa-pta */
+ OPT_fipa_pure_const, /* -fipa-pure-const */
+ OPT_fipa_reference, /* -fipa-reference */
+ OPT_fipa_struct_reorg, /* -fipa-struct-reorg */
+ OPT_fipa_type_escape, /* -fipa-type-escape */
+ OPT_fira_algorithm_, /* -fira-algorithm= */
+ OPT_fira_coalesce, /* -fira-coalesce */
+ OPT_fira_region_, /* -fira-region= */
+ OPT_fira_share_save_slots, /* -fira-share-save-slots */
+ OPT_fira_share_spill_slots, /* -fira-share-spill-slots */
+ OPT_fira_verbose_, /* -fira-verbose= */
+ OPT_fivopts, /* -fivopts */
+ OPT_fjni, /* -fjni */
+ OPT_fjump_tables, /* -fjump-tables */
+ OPT_fkeep_inline_functions, /* -fkeep-inline-functions */
+ OPT_fkeep_static_consts, /* -fkeep-static-consts */
+ OPT_flabels_ok, /* -flabels-ok */
+ OPT_flax_vector_conversions, /* -flax-vector-conversions */
+ OPT_fleading_underscore, /* -fleading-underscore */
+ OPT_flimit_hot_components, /* -flimit-hot-components */
+ OPT_floop_block, /* -floop-block */
+ OPT_floop_interchange, /* -floop-interchange */
+ OPT_floop_optimize, /* -floop-optimize */
+ OPT_floop_strip_mine, /* -floop-strip-mine */
+ OPT_fmath_errno, /* -fmath-errno */
+ OPT_fmax_array_constructor_, /* -fmax-array-constructor= */
+ OPT_fmax_errors_, /* -fmax-errors= */
+ OPT_fmax_identifier_length_, /* -fmax-identifier-length= */
+ OPT_fmax_stack_var_size_, /* -fmax-stack-var-size= */
+ OPT_fmax_subrecord_length_, /* -fmax-subrecord-length= */
+ OPT_fmem_report, /* -fmem-report */
+ OPT_fmerge_all_constants, /* -fmerge-all-constants */
+ OPT_fmerge_constants, /* -fmerge-constants */
+ OPT_fmerge_debug_strings, /* -fmerge-debug-strings */
+ OPT_fmessage_length_, /* -fmessage-length= */
+ OPT_fmodule_private, /* -fmodule-private */
+ OPT_fmodulo_sched, /* -fmodulo-sched */
+ OPT_fmodulo_sched_allow_regmoves, /* -fmodulo-sched-allow-regmoves */
+ OPT_fmove_loop_invariants, /* -fmove-loop-invariants */
+ OPT_fms_extensions, /* -fms-extensions */
+ OPT_fmudflap, /* -fmudflap */
+ OPT_fmudflapir, /* -fmudflapir */
+ OPT_fmudflapth, /* -fmudflapth */
+ OPT_fname_mangling_version_, /* -fname-mangling-version- */
+ OPT_fnew_abi, /* -fnew-abi */
+ OPT_fnext_runtime, /* -fnext-runtime */
+ OPT_fnil_receivers, /* -fnil-receivers */
+ OPT_fnon_call_exceptions, /* -fnon-call-exceptions */
+ OPT_fnonansi_builtins, /* -fnonansi-builtins */
+ OPT_fnonnull_objects, /* -fnonnull-objects */
+ OPT_fobjc_call_cxx_cdtors, /* -fobjc-call-cxx-cdtors */
+ OPT_fobjc_direct_dispatch, /* -fobjc-direct-dispatch */
+ OPT_fobjc_exceptions, /* -fobjc-exceptions */
+ OPT_fobjc_gc, /* -fobjc-gc */
+ OPT_fobjc_sjlj_exceptions, /* -fobjc-sjlj-exceptions */
+ OPT_fomit_frame_pointer, /* -fomit-frame-pointer */
+ OPT_fopenmp, /* -fopenmp */
+ OPT_foperator_names, /* -foperator-names */
+ OPT_foptimize_locality, /* -foptimize-locality */
+ OPT_foptimize_register_move, /* -foptimize-register-move */
+ OPT_foptimize_sibling_calls, /* -foptimize-sibling-calls */
+ OPT_foptimize_static_class_initialization, /* -foptimize-static-class-initialization */
+ OPT_foptional_diags, /* -foptional-diags */
+ OPT_foutput_class_dir_, /* -foutput-class-dir= */
+ OPT_fpack_derived, /* -fpack-derived */
+ OPT_fpack_struct, /* -fpack-struct */
+ OPT_fpack_struct_, /* -fpack-struct= */
+ OPT_fpcc_struct_return, /* -fpcc-struct-return */
+ OPT_fpch_deps, /* -fpch-deps */
+ OPT_fpch_preprocess, /* -fpch-preprocess */
+ OPT_fpeel_loops, /* -fpeel-loops */
+ OPT_fpeephole, /* -fpeephole */
+ OPT_fpeephole2, /* -fpeephole2 */
+ OPT_fpermissive, /* -fpermissive */
+ OPT_fpessimistic_inline_stack_limit, /* -fpessimistic-inline-stack-limit */
+ OPT_fpic, /* -fpic */
+ OPT_fpie, /* -fpie */
+ OPT_fplugin_arg_, /* -fplugin-arg- */
+ OPT_fplugin_, /* -fplugin= */
+ OPT_fpmu_profile_generate_, /* -fpmu-profile-generate= */
+ OPT_fpmu_profile_use_, /* -fpmu-profile-use= */
+ OPT_fpost_ipa_mem_report, /* -fpost-ipa-mem-report */
+ OPT_fpre_ipa_mem_report, /* -fpre-ipa-mem-report */
+ OPT_fpredictive_commoning, /* -fpredictive-commoning */
+ OPT_fprefetch_loop_arrays, /* -fprefetch-loop-arrays */
+ OPT_fpreprocessed, /* -fpreprocessed */
+ OPT_fprofile, /* -fprofile */
+ OPT_fprofile_arcs, /* -fprofile-arcs */
+ OPT_fprofile_correction, /* -fprofile-correction */
+ OPT_fprofile_dir_, /* -fprofile-dir= */
+ OPT_fprofile_dump, /* -fprofile-dump */
+ OPT_fprofile_generate, /* -fprofile-generate */
+ OPT_fprofile_generate_sampling, /* -fprofile-generate-sampling */
+ OPT_fprofile_generate_, /* -fprofile-generate= */
+ OPT_fprofile_reusedist, /* -fprofile-reusedist */
+ OPT_fprofile_use, /* -fprofile-use */
+ OPT_fprofile_use_, /* -fprofile-use= */
+ OPT_fprofile_values, /* -fprofile-values */
+ OPT_frandom_seed, /* -frandom-seed */
+ OPT_frandom_seed_, /* -frandom-seed= */
+ OPT_frange_check, /* -frange-check */
+ OPT_freciprocal_math, /* -freciprocal-math */
+ OPT_frecord_gcc_switches, /* -frecord-gcc-switches */
+ OPT_frecord_marker_4, /* -frecord-marker=4 */
+ OPT_frecord_marker_8, /* -frecord-marker=8 */
+ OPT_frecord_options_in_elf, /* -frecord-options-in-elf */
+ OPT_frecursive, /* -frecursive */
+ OPT_freduced_reflection, /* -freduced-reflection */
+ OPT_freg_struct_return, /* -freg-struct-return */
+ OPT_fregmove, /* -fregmove */
+ OPT_frename_registers, /* -frename-registers */
+ OPT_freorder_blocks, /* -freorder-blocks */
+ OPT_freorder_blocks_and_partition, /* -freorder-blocks-and-partition */
+ OPT_freorder_functions, /* -freorder-functions */
+ OPT_frepack_arrays, /* -frepack-arrays */
+ OPT_freplace_objc_classes, /* -freplace-objc-classes */
+ OPT_frepo, /* -frepo */
+ OPT_frerun_cse_after_loop, /* -frerun-cse-after-loop */
+ OPT_frerun_loop_opt, /* -frerun-loop-opt */
+ OPT_freschedule_modulo_scheduled_loops, /* -freschedule-modulo-scheduled-loops */
+ OPT_fripa, /* -fripa */
+ OPT_fripa_disallow_asm_modules, /* -fripa-disallow-asm-modules */
+ OPT_fripa_disallow_opt_mismatch, /* -fripa-disallow-opt-mismatch */
+ OPT_fripa_no_promote_always_inline_func, /* -fripa-no-promote-always-inline-func */
+ OPT_fripa_verbose, /* -fripa-verbose */
+ OPT_frounding_math, /* -frounding-math */
+ OPT_frtti, /* -frtti */
+ OPT_fsample_profile, /* -fsample-profile */
+ OPT_fsample_profile_aggregate_using_, /* -fsample-profile-aggregate-using= */
+ OPT_fsample_profile_use_entry, /* -fsample-profile-use-entry */
+ OPT_fsample_profile_, /* -fsample-profile= */
+ OPT_fsaw_java_file, /* -fsaw-java-file */
+ OPT_fsched_interblock, /* -fsched-interblock */
+ OPT_fsched_spec, /* -fsched-spec */
+ OPT_fsched_spec_load, /* -fsched-spec-load */
+ OPT_fsched_spec_load_dangerous, /* -fsched-spec-load-dangerous */
+ OPT_fsched_stalled_insns, /* -fsched-stalled-insns */
+ OPT_fsched_stalled_insns_dep, /* -fsched-stalled-insns-dep */
+ OPT_fsched_stalled_insns_dep_, /* -fsched-stalled-insns-dep= */
+ OPT_fsched_stalled_insns_, /* -fsched-stalled-insns= */
+ OPT_fsched_verbose_, /* -fsched-verbose= */
+ OPT_fsched2_use_superblocks, /* -fsched2-use-superblocks */
+ OPT_fsched2_use_traces, /* -fsched2-use-traces */
+ OPT_fschedule_insns, /* -fschedule-insns */
+ OPT_fschedule_insns2, /* -fschedule-insns2 */
+ OPT_fsecond_underscore, /* -fsecond-underscore */
+ OPT_fsection_anchors, /* -fsection-anchors */
+ OPT_fsee, /* -fsee */
+ OPT_fsel_sched_pipelining, /* -fsel-sched-pipelining */
+ OPT_fsel_sched_pipelining_outer_loops, /* -fsel-sched-pipelining-outer-loops */
+ OPT_fsel_sched_reschedule_pipelined, /* -fsel-sched-reschedule-pipelined */
+ OPT_fselective_scheduling, /* -fselective-scheduling */
+ OPT_fselective_scheduling2, /* -fselective-scheduling2 */
+ OPT_fshort_double, /* -fshort-double */
+ OPT_fshort_enums, /* -fshort-enums */
+ OPT_fshort_wchar, /* -fshort-wchar */
+ OPT_fshow_column, /* -fshow-column */
+ OPT_fsign_zero, /* -fsign-zero */
+ OPT_fsignaling_nans, /* -fsignaling-nans */
+ OPT_fsigned_bitfields, /* -fsigned-bitfields */
+ OPT_fsigned_char, /* -fsigned-char */
+ OPT_fsigned_zeros, /* -fsigned-zeros */
+ OPT_fsingle_precision_constant, /* -fsingle-precision-constant */
+ OPT_fsource_filename_, /* -fsource-filename= */
+ OPT_fsource_, /* -fsource= */
+ OPT_fsplit_ivs_in_unroller, /* -fsplit-ivs-in-unroller */
+ OPT_fsplit_wide_types, /* -fsplit-wide-types */
+ OPT_fsquangle, /* -fsquangle */
+ OPT_fstack_check, /* -fstack-check */
+ OPT_fstack_check_, /* -fstack-check= */
+ OPT_fstack_limit, /* -fstack-limit */
+ OPT_fstack_limit_register_, /* -fstack-limit-register= */
+ OPT_fstack_limit_symbol_, /* -fstack-limit-symbol= */
+ OPT_fstack_protector, /* -fstack-protector */
+ OPT_fstack_protector_all, /* -fstack-protector-all */
+ OPT_fstats, /* -fstats */
+ OPT_fstore_check, /* -fstore-check */
+ OPT_fstrength_reduce, /* -fstrength-reduce */
+ OPT_fstrict_aliasing, /* -fstrict-aliasing */
+ OPT_fstrict_enum_precision, /* -fstrict-enum-precision */
+ OPT_fstrict_overflow, /* -fstrict-overflow */
+ OPT_fstrict_prototype, /* -fstrict-prototype */
+ OPT_fsyntax_only, /* -fsyntax-only */
+ OPT_ftabstop_, /* -ftabstop= */
+ OPT_ftarget_help, /* -ftarget-help */
+ OPT_ftarget_, /* -ftarget= */
+ OPT_ftemplate_depth_, /* -ftemplate-depth- */
+ OPT_ftest_coverage, /* -ftest-coverage */
+ OPT_fthis_is_variable, /* -fthis-is-variable */
+ OPT_fthread_jumps, /* -fthread-jumps */
+ OPT_fthreadsafe_statics, /* -fthreadsafe-statics */
+ OPT_ftime_report, /* -ftime-report */
+ OPT_ftls_model_, /* -ftls-model= */
+ OPT_ftoplevel_reorder, /* -ftoplevel-reorder */
+ OPT_ftracer, /* -ftracer */
+ OPT_ftrapping_math, /* -ftrapping-math */
+ OPT_ftrapv, /* -ftrapv */
+ OPT_ftree_builtin_call_dce, /* -ftree-builtin-call-dce */
+ OPT_ftree_ccp, /* -ftree-ccp */
+ OPT_ftree_ch, /* -ftree-ch */
+ OPT_ftree_copy_prop, /* -ftree-copy-prop */
+ OPT_ftree_copyrename, /* -ftree-copyrename */
+ OPT_ftree_cselim, /* -ftree-cselim */
+ OPT_ftree_dce, /* -ftree-dce */
+ OPT_ftree_dominator_opts, /* -ftree-dominator-opts */
+ OPT_ftree_dse, /* -ftree-dse */
+ OPT_ftree_fre, /* -ftree-fre */
+ OPT_ftree_loop_distribution, /* -ftree-loop-distribution */
+ OPT_ftree_loop_im, /* -ftree-loop-im */
+ OPT_ftree_loop_ivcanon, /* -ftree-loop-ivcanon */
+ OPT_ftree_loop_linear, /* -ftree-loop-linear */
+ OPT_ftree_loop_optimize, /* -ftree-loop-optimize */
+ OPT_ftree_lr_shrinking, /* -ftree-lr-shrinking */
+ OPT_ftree_lrs, /* -ftree-lrs */
+ OPT_ftree_parallelize_loops_, /* -ftree-parallelize-loops= */
+ OPT_ftree_pre, /* -ftree-pre */
+ OPT_ftree_reassoc, /* -ftree-reassoc */
+ OPT_ftree_salias, /* -ftree-salias */
+ OPT_ftree_scev_cprop, /* -ftree-scev-cprop */
+ OPT_ftree_sink, /* -ftree-sink */
+ OPT_ftree_sra, /* -ftree-sra */
+ OPT_ftree_store_ccp, /* -ftree-store-ccp */
+ OPT_ftree_store_copy_prop, /* -ftree-store-copy-prop */
+ OPT_ftree_switch_conversion, /* -ftree-switch-conversion */
+ OPT_ftree_ter, /* -ftree-ter */
+ OPT_ftree_vect_loop_version, /* -ftree-vect-loop-version */
+ OPT_ftree_vectorize, /* -ftree-vectorize */
+ OPT_ftree_vectorizer_verbose_, /* -ftree-vectorizer-verbose= */
+ OPT_ftree_vrp, /* -ftree-vrp */
+ OPT_funderscoring, /* -funderscoring */
+ OPT_funit_at_a_time, /* -funit-at-a-time */
+ OPT_funroll_all_loops, /* -funroll-all-loops */
+ OPT_funroll_loops, /* -funroll-loops */
+ OPT_funsafe_loop_optimizations, /* -funsafe-loop-optimizations */
+ OPT_funsafe_math_optimizations, /* -funsafe-math-optimizations */
+ OPT_funsigned_bitfields, /* -funsigned-bitfields */
+ OPT_funsigned_char, /* -funsigned-char */
+ OPT_funswitch_loops, /* -funswitch-loops */
+ OPT_funwind_tables, /* -funwind-tables */
+ OPT_fuse_boehm_gc, /* -fuse-boehm-gc */
+ OPT_fuse_cxa_atexit, /* -fuse-cxa-atexit */
+ OPT_fuse_cxa_get_exception_ptr, /* -fuse-cxa-get-exception-ptr */
+ OPT_fuse_divide_subroutine, /* -fuse-divide-subroutine */
+ OPT_fuse_ld_, /* -fuse-ld= */
+ OPT_fvar_tracking, /* -fvar-tracking */
+ OPT_fvar_tracking_uninit, /* -fvar-tracking-uninit */
+ OPT_fvariable_expansion_in_unroller, /* -fvariable-expansion-in-unroller */
+ OPT_fvect_cost_model, /* -fvect-cost-model */
+ OPT_fverbose_asm, /* -fverbose-asm */
+ OPT_fversion, /* -fversion */
+ OPT_fvisibility_inlines_hidden, /* -fvisibility-inlines-hidden */
+ OPT_fvisibility_ms_compat, /* -fvisibility-ms-compat */
+ OPT_fvisibility_, /* -fvisibility= */
+ OPT_fvpt, /* -fvpt */
+ OPT_fvtable_gc, /* -fvtable-gc */
+ OPT_fvtable_thunks, /* -fvtable-thunks */
+ OPT_fweak, /* -fweak */
+ OPT_fweb, /* -fweb */
+ OPT_fwhole_program, /* -fwhole-program */
+ OPT_fwide_exec_charset_, /* -fwide-exec-charset= */
+ OPT_fworking_directory, /* -fworking-directory */
+ OPT_fwrapv, /* -fwrapv */
+ OPT_fxref, /* -fxref */
+ OPT_fzee, /* -fzee */
+ OPT_fzero_initialized_in_bss, /* -fzero-initialized-in-bss */
+ OPT_fzero_link, /* -fzero-link */
+ OPT_g, /* -g */
+ OPT_gant, /* -gant */
+ OPT_gcoff, /* -gcoff */
+ OPT_gdwarf_, /* -gdwarf+ */
+ OPT_gdwarf_2, /* -gdwarf-2 */
+ OPT_gdwarf_4, /* -gdwarf-4 */
+ OPT_gen_decls, /* -gen-decls */
+ OPT_ggdb, /* -ggdb */
+ OPT_gmlt, /* -gmlt */
+ OPT_gnat, /* -gnat */
+ OPT_gnatO, /* -gnatO */
+ OPT_gno_strict_dwarf, /* -gno-strict-dwarf */
+ OPT_gstabs, /* -gstabs */
+ OPT_gstabs_, /* -gstabs+ */
+ OPT_gstrict_dwarf, /* -gstrict-dwarf */
+ OPT_gvms, /* -gvms */
+ OPT_gxcoff, /* -gxcoff */
+ OPT_gxcoff_, /* -gxcoff+ */
+ OPT_idirafter, /* -idirafter */
+ OPT_imacros, /* -imacros */
+ OPT_imultilib, /* -imultilib */
+ OPT_include, /* -include */
+ OPT_iprefix, /* -iprefix */
+ OPT_iquote, /* -iquote */
+ OPT_isysroot, /* -isysroot */
+ OPT_isystem, /* -isystem */
+ OPT_iwithprefix, /* -iwithprefix */
+ OPT_iwithprefixbefore, /* -iwithprefixbefore */
+ OPT_lang_asm, /* -lang-asm */
+ OPT_lang_objc, /* -lang-objc */
+ OPT_mabi_, /* -mabi= */
+ OPT_mabort_on_noreturn, /* -mabort-on-noreturn */
+ OPT_mandroid, /* -mandroid */
+ OPT_mapcs, /* -mapcs */
+ OPT_mapcs_float, /* -mapcs-float */
+ OPT_mapcs_frame, /* -mapcs-frame */
+ OPT_mapcs_reentrant, /* -mapcs-reentrant */
+ OPT_mapcs_stack_check, /* -mapcs-stack-check */
+ OPT_march_, /* -march= */
+ OPT_marm, /* -marm */
+ OPT_mbig_endian, /* -mbig-endian */
+ OPT_mbionic, /* -mbionic */
+ OPT_mcallee_super_interworking, /* -mcallee-super-interworking */
+ OPT_mcaller_super_interworking, /* -mcaller-super-interworking */
+ OPT_mcirrus_fix_invalid_insns, /* -mcirrus-fix-invalid-insns */
+ OPT_mcpu_, /* -mcpu= */
+ OPT_mfix_cortex_m3_ldrd, /* -mfix-cortex-m3-ldrd */
+ OPT_mfloat_abi_, /* -mfloat-abi= */
+ OPT_mfp_, /* -mfp= */
+ OPT_mfpe, /* -mfpe */
+ OPT_mfpe_, /* -mfpe= */
+ OPT_mfpu_, /* -mfpu= */
+ OPT_mglibc, /* -mglibc */
+ OPT_mhard_float, /* -mhard-float */
+ OPT_mlittle_endian, /* -mlittle-endian */
+ OPT_mlong_calls, /* -mlong-calls */
+ OPT_mpic_register_, /* -mpic-register= */
+ OPT_mpoke_function_name, /* -mpoke-function-name */
+ OPT_msched_prolog, /* -msched-prolog */
+ OPT_msingle_pic_base, /* -msingle-pic-base */
+ OPT_msoft_float, /* -msoft-float */
+ OPT_mstructure_size_boundary_, /* -mstructure-size-boundary= */
+ OPT_mthumb, /* -mthumb */
+ OPT_mthumb_interwork, /* -mthumb-interwork */
+ OPT_mtp_, /* -mtp= */
+ OPT_mtpcs_frame, /* -mtpcs-frame */
+ OPT_mtpcs_leaf_frame, /* -mtpcs-leaf-frame */
+ OPT_mtune_, /* -mtune= */
+ OPT_muclibc, /* -muclibc */
+ OPT_mvectorize_with_neon_quad, /* -mvectorize-with-neon-quad */
+ OPT_mword_relocations, /* -mword-relocations */
+ OPT_mwords_little_endian, /* -mwords-little-endian */
+ OPT_nocpp, /* -nocpp */
+ OPT_nostdinc, /* -nostdinc */
+ OPT_nostdinc__, /* -nostdinc++ */
+ OPT_nostdlib, /* -nostdlib */
+ OPT_o, /* -o */
+ OPT_p, /* -p */
+ OPT_pedantic, /* -pedantic */
+ OPT_pedantic_errors, /* -pedantic-errors */
+ OPT_pie, /* -pie */
+ OPT_print_objc_runtime_info, /* -print-objc-runtime-info */
+ OPT_print_pch_checksum, /* -print-pch-checksum */
+ OPT_quiet, /* -quiet */
+ OPT_remap, /* -remap */
+ OPT_shared, /* -shared */
+ OPT_static_libgfortran, /* -static-libgfortran */
+ OPT_std_c__0x, /* -std=c++0x */
+ OPT_std_c__98, /* -std=c++98 */
+ OPT_std_c89, /* -std=c89 */
+ OPT_std_c99, /* -std=c99 */
+ OPT_std_c9x, /* -std=c9x */
+ OPT_std_f2003, /* -std=f2003 */
+ OPT_std_f2008, /* -std=f2008 */
+ OPT_std_f95, /* -std=f95 */
+ OPT_std_gnu, /* -std=gnu */
+ OPT_std_gnu__0x, /* -std=gnu++0x */
+ OPT_std_gnu__98, /* -std=gnu++98 */
+ OPT_std_gnu89, /* -std=gnu89 */
+ OPT_std_gnu99, /* -std=gnu99 */
+ OPT_std_gnu9x, /* -std=gnu9x */
+ OPT_std_iso9899_1990, /* -std=iso9899:1990 */
+ OPT_std_iso9899_199409, /* -std=iso9899:199409 */
+ OPT_std_iso9899_1999, /* -std=iso9899:1999 */
+ OPT_std_iso9899_199x, /* -std=iso9899:199x */
+ OPT_std_legacy, /* -std=legacy */
+ OPT_traditional_cpp, /* -traditional-cpp */
+ OPT_trigraphs, /* -trigraphs */
+ OPT_undef, /* -undef */
+ OPT_v, /* -v */
+ OPT_version, /* -version */
+ OPT_w, /* -w */
+ N_OPTS
+};
+
+#endif /* OPTIONS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/output.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/output.h
new file mode 100644
index 0000000..79b628f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/output.h
@@ -0,0 +1,649 @@
+/* Declarations for insn-output.c. These functions are defined in recog.c,
+ final.c, and varasm.c.
+ Copyright (C) 1987, 1991, 1994, 1997, 1998, 1999, 2000, 2001, 2002,
+ 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OUTPUT_H
+#define GCC_OUTPUT_H
+
+/* Initialize data in final at the beginning of a compilation. */
+extern void init_final (const char *);
+
+/* Enable APP processing of subsequent output.
+ Used before the output from an `asm' statement. */
+extern void app_enable (void);
+
+/* Disable APP processing of subsequent output.
+ Called from varasm.c before most kinds of output. */
+extern void app_disable (void);
+
+/* Return the number of slots filled in the current
+ delayed branch sequence (we don't count the insn needing the
+ delay slot). Zero if not in a delayed branch sequence. */
+extern int dbr_sequence_length (void);
+
+/* Indicate that branch shortening hasn't yet been done. */
+extern void init_insn_lengths (void);
+
+/* Obtain the current length of an insn. If branch shortening has been done,
+ get its actual length. Otherwise, get its maximum length. */
+extern int get_attr_length (rtx);
+
+/* Obtain the current length of an insn. If branch shortening has been done,
+ get its actual length. Otherwise, get its minimum length. */
+extern int get_attr_min_length (rtx);
+
+/* Make a pass over all insns and compute their actual lengths by shortening
+ any branches of variable length if possible. */
+extern void shorten_branches (rtx);
+
+/* Output assembler code for the start of a function,
+ and initialize some of the variables in this file
+ for the new function. The label for the function and associated
+ assembler pseudo-ops have already been output in
+ `assemble_start_function'. */
+extern void final_start_function (rtx, FILE *, int);
+
+/* Output assembler code for the end of a function.
+ For clarity, args are same as those of `final_start_function'
+ even though not all of them are needed. */
+extern void final_end_function (void);
+
+/* Output assembler code for some insns: all or part of a function. */
+extern void final (rtx, FILE *, int);
+
+/* The final scan for one insn, INSN. Args are same as in `final', except
+ that INSN is the insn being scanned. Value returned is the next insn to
+ be scanned. */
+extern rtx final_scan_insn (rtx, FILE *, int, int, int *);
+
+/* Replace a SUBREG with a REG or a MEM, based on the thing it is a
+ subreg of. */
+extern rtx alter_subreg (rtx *);
+
+/* Report inconsistency between the assembler template and the operands.
+ In an `asm', it's the user's fault; otherwise, the compiler's fault. */
+extern void output_operand_lossage (const char *, ...) ATTRIBUTE_PRINTF_1;
+
+/* Output a string of assembler code, substituting insn operands.
+ Defined in final.c. */
+extern void output_asm_insn (const char *, rtx *);
+
+/* Compute a worst-case reference address of a branch so that it
+ can be safely used in the presence of aligned labels.
+ Defined in final.c. */
+extern int insn_current_reference_address (rtx);
+
+/* Find the alignment associated with a CODE_LABEL.
+ Defined in final.c. */
+extern int label_to_alignment (rtx);
+
+/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
+extern void output_asm_label (rtx);
+
+/* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
+extern void mark_symbol_refs_as_used (rtx);
+
+/* Print a memory reference operand for address X
+ using machine-dependent assembler syntax. */
+extern void output_address (rtx);
+
+/* Print an integer constant expression in assembler syntax.
+ Addition and subtraction are the only arithmetic
+ that may appear in these expressions. */
+extern void output_addr_const (FILE *, rtx);
+
+/* Output a string of assembler code, substituting numbers, strings
+ and fixed syntactic prefixes. */
+#if GCC_VERSION >= 3004
+#define ATTRIBUTE_ASM_FPRINTF(m, n) __attribute__ ((__format__ (__asm_fprintf__, m, n))) ATTRIBUTE_NONNULL(m)
+/* This is a magic identifier which allows GCC to figure out the type
+ of HOST_WIDE_INT for %wd specifier checks. You must issue this
+ typedef before using the __asm_fprintf__ format attribute. */
+typedef HOST_WIDE_INT __gcc_host_wide_int__;
+#else
+#define ATTRIBUTE_ASM_FPRINTF(m, n) ATTRIBUTE_NONNULL(m)
+#endif
+
+extern void asm_fprintf (FILE *file, const char *p, ...)
+ ATTRIBUTE_ASM_FPRINTF(2, 3);
+
+/* Split up a CONST_DOUBLE or integer constant rtx into two rtx's for single
+ words. */
+extern void split_double (rtx, rtx *, rtx *);
+
+/* Return nonzero if this function has no function calls. */
+extern int leaf_function_p (void);
+
+/* Return 1 if branch is a forward branch.
+ Uses insn_shuid array, so it works only in the final pass. May be used by
+ output templates to add branch prediction hints, for example. */
+extern int final_forward_branch_p (rtx);
+
+/* Return 1 if this function uses only the registers that can be
+ safely renumbered. */
+extern int only_leaf_regs_used (void);
+
+/* Scan IN_RTX and its subexpressions, and renumber all regs into those
+ available in leaf functions. */
+extern void leaf_renumber_regs_insn (rtx);
+
+/* Locate the proper template for the given insn-code. */
+extern const char *get_insn_template (int, rtx);
+
+/* Functions in varasm.c. */
+
+/* Declare DECL to be a weak symbol. */
+extern void declare_weak (tree);
+/* Merge weak status. */
+extern void merge_weak (tree, tree);
+
+/* Emit any pending weak declarations. */
+extern void weak_finish (void);
+
+/* Emit any pending emutls declarations and initializations. */
+extern void emutls_finish (void);
+
+/* Decode an `asm' spec for a declaration as a register name.
+ Return the register number, or -1 if nothing specified,
+ or -2 if the ASMSPEC is not `cc' or `memory' and is not recognized,
+ or -3 if ASMSPEC is `cc' and is not recognized,
+ or -4 if ASMSPEC is `memory' and is not recognized.
+ Accept an exact spelling or a decimal number.
+ Prefixes such as % are optional. */
+extern int decode_reg_name (const char *);
+
+extern void assemble_alias (tree, tree);
+
+extern void default_assemble_visibility (tree, int);
+
+/* Output a string of literal assembler code
+ for an `asm' keyword used between functions. */
+extern void assemble_asm (tree);
+
+/* Output assembler code for the constant pool of a function and associated
+ with defining the name of the function. DECL describes the function.
+ NAME is the function's name. For the constant pool, we use the current
+ constant pool data. */
+extern void assemble_start_function (tree, const char *);
+
+/* Output assembler code associated with defining the size of the
+ function. DECL describes the function. NAME is the function's name. */
+extern void assemble_end_function (tree, const char *);
+
+/* Assemble everything that is needed for a variable or function declaration.
+ Not used for automatic variables, and not used for function definitions.
+ Should not be called for variables of incomplete structure type.
+
+ TOP_LEVEL is nonzero if this variable has file scope.
+ AT_END is nonzero if this is the special handling, at end of compilation,
+ to define things that have had only tentative definitions.
+ DONT_OUTPUT_DATA if nonzero means don't actually output the
+ initial value (that will be done by the caller). */
+extern void assemble_variable (tree, int, int, int);
+
+/* Compute the alignment of variable specified by DECL.
+ DONT_OUTPUT_DATA is from assemble_variable. */
+extern void align_variable (tree decl, bool dont_output_data);
+
+/* Queue for outputting something to declare an external symbol to the
+ assembler. (Most assemblers don't need this, so we normally output
+ nothing.) Do nothing if DECL is not external. */
+extern void assemble_external (tree);
+
+/* Assemble code to leave SIZE bytes of zeros. */
+extern void assemble_zeros (unsigned HOST_WIDE_INT);
+
+/* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
+extern void assemble_align (int);
+
+/* Assemble a string constant with the specified C string as contents. */
+extern void assemble_string (const char *, int);
+
+/* Similar, for calling a library function FUN. */
+extern void assemble_external_libcall (rtx);
+
+/* Assemble a label named NAME. */
+extern void assemble_label (const char *);
+
+/* Output to FILE (an assembly file) a reference to NAME. If NAME
+ starts with a *, the rest of NAME is output verbatim. Otherwise
+ NAME is transformed in a target-specific way (usually by the
+ addition of an underscore). */
+extern void assemble_name_raw (FILE *, const char *);
+
+/* Like assemble_name_raw, but should be used when NAME might refer to
+ an entity that is also represented as a tree (like a function or
+ variable). If NAME does refer to such an entity, that entity will
+ be marked as referenced. */
+extern void assemble_name (FILE *, const char *);
+
+/* Return the assembler directive for creating a given kind of integer
+ object. SIZE is the number of bytes in the object and ALIGNED_P
+ indicates whether it is known to be aligned. Return NULL if the
+ assembly dialect has no such directive.
+
+ The returned string should be printed at the start of a new line and
+ be followed immediately by the object's initial value. */
+extern const char *integer_asm_op (int, int);
+
+/* Use directive OP to assemble an integer object X. Print OP at the
+ start of the line, followed immediately by the value of X. */
+extern void assemble_integer_with_op (const char *, rtx);
+
+/* The default implementation of the asm_out.integer target hook. */
+extern bool default_assemble_integer (rtx, unsigned int, int);
+
+/* Assemble the integer constant X into an object of SIZE bytes. ALIGN is
+ the alignment of the integer in bits. Return 1 if we were able to output
+ the constant, otherwise 0. If FORCE is nonzero the constant must
+ be outputable. */
+extern bool assemble_integer (rtx, unsigned, unsigned, int);
+
+/* An interface to assemble_integer for the common case in which a value is
+ fully aligned and must be printed. VALUE is the value of the integer
+ object and SIZE is the number of bytes it contains. */
+#define assemble_aligned_integer(SIZE, VALUE) \
+ assemble_integer (VALUE, SIZE, (SIZE) * BITS_PER_UNIT, 1)
+
+#ifdef REAL_VALUE_TYPE_SIZE
+/* Assemble the floating-point constant D into an object of size MODE. */
+extern void assemble_real (REAL_VALUE_TYPE, enum machine_mode, unsigned);
+#endif
+
+/* Write the address of the entity given by SYMBOL to SEC. */
+extern void assemble_addr_to_section (rtx, section *);
+
+/* Return the size of the constant pool. */
+extern int get_pool_size (void);
+
+#ifdef HAVE_peephole
+extern rtx peephole (rtx);
+#endif
+
+extern void output_shared_constant_pool (void);
+
+extern void output_object_blocks (void);
+
+/* Whether a constructor CTOR is a valid static constant initializer if all
+ its elements are. This used to be internal to initializer_constant_valid_p
+ and has been exposed to let other functions like categorize_ctor_elements
+ evaluate the property while walking a constructor for other purposes. */
+
+extern bool constructor_static_from_elts_p (const_tree);
+
+/* Return nonzero if VALUE is a valid constant-valued expression
+ for use in initializing a static variable; one that can be an
+ element of a "constant" initializer.
+
+ Return null_pointer_node if the value is absolute;
+ if it is relocatable, return the variable that determines the relocation.
+ We assume that VALUE has been folded as much as possible;
+ therefore, we do not need to check for such things as
+ arithmetic-combinations of integers. */
+extern tree initializer_constant_valid_p (tree, tree);
+
+/* Output assembler code for constant EXP to FILE, with no label.
+ This includes the pseudo-op such as ".int" or ".byte", and a newline.
+ Assumes output_addressed_constants has been done on EXP already.
+
+ Generate exactly SIZE bytes of assembler data, padding at the end
+ with zeros if necessary. SIZE must always be specified.
+
+ ALIGN is the alignment in bits that may be assumed for the data. */
+extern void output_constant (tree, unsigned HOST_WIDE_INT, unsigned int);
+
+/* When outputting delayed branch sequences, this rtx holds the
+ sequence being output. It is null when no delayed branch
+ sequence is being output, so it can be used as a test in the
+ insn output code.
+
+ This variable is defined in final.c. */
+extern rtx final_sequence;
+
+/* The line number of the beginning of the current function. Various
+ md code needs this so that it can output relative linenumbers. */
+
+#ifdef SDB_DEBUGGING_INFO /* Avoid undef sym in certain broken linkers. */
+extern int sdb_begin_function_line;
+#endif
+
+/* File in which assembler code is being written. */
+
+#ifdef BUFSIZ
+extern FILE *asm_out_file;
+#endif
+
+/* The first global object in the file. */
+extern const char *first_global_object_name;
+
+/* The first weak object in the file. */
+extern const char *weak_global_object_name;
+
+/* Nonzero if function being compiled doesn't contain any calls
+ (ignoring the prologue and epilogue). This is set prior to
+ local register allocation and is valid for the remaining
+ compiler passes. */
+
+extern int current_function_is_leaf;
+
+/* Nonzero if function being compiled doesn't modify the stack pointer
+ (ignoring the prologue and epilogue). This is only valid after
+ pass_stack_ptr_mod has run. */
+
+extern int current_function_sp_is_unchanging;
+
+/* Nonzero if the function being compiled is a leaf function which only
+ uses leaf registers. This is valid after reload (specifically after
+ sched2) and is useful only if the port defines LEAF_REGISTERS. */
+
+extern int current_function_uses_only_leaf_regs;
+
+/* Default file in which to dump debug output. */
+
+#ifdef BUFSIZ
+extern FILE *dump_file;
+#endif
+
+/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
+extern rtx current_insn_predicate;
+
+/* Last insn processed by final_scan_insn. */
+extern rtx current_output_insn;
+
+/* Nonzero while outputting an `asm' with operands.
+ This means that inconsistencies are the user's fault, so don't die.
+ The precise value is the insn being output, to pass to error_for_asm. */
+extern rtx this_is_asm_operands;
+
+/* Carry information from ASM_DECLARE_OBJECT_NAME
+ to ASM_FINISH_DECLARE_OBJECT. */
+extern int size_directive_output;
+extern tree last_assemble_variable_decl;
+
+extern bool first_function_block_is_cold;
+
+/* Decide whether DECL needs to be in a writable section.
+ RELOC is the same as for SELECT_SECTION. */
+extern bool decl_readonly_section (const_tree, int);
+
+/* This can be used to compute RELOC for the function above, when
+ given a constant expression. */
+extern int compute_reloc_for_constant (tree);
+
+/* User label prefix in effect for this compilation. */
+extern const char *user_label_prefix;
+
+/* Default target function prologue and epilogue assembler output. */
+extern void default_function_pro_epilogue (FILE *, HOST_WIDE_INT);
+
+/* Default target hook that outputs nothing to a stream. */
+extern void no_asm_to_stream (FILE *);
+
+/* Flags controlling properties of a section. */
+#define SECTION_ENTSIZE 0x000ff /* entity size in section */
+#define SECTION_CODE 0x00100 /* contains code */
+#define SECTION_WRITE 0x00200 /* data is writable */
+#define SECTION_DEBUG 0x00400 /* contains debug data */
+#define SECTION_LINKONCE 0x00800 /* is linkonce */
+#define SECTION_SMALL 0x01000 /* contains "small data" */
+#define SECTION_BSS 0x02000 /* contains zeros only */
+#define SECTION_FORGET 0x04000 /* forget that we've entered the section */
+#define SECTION_MERGE 0x08000 /* contains mergeable data */
+#define SECTION_STRINGS 0x10000 /* contains zero terminated strings without
+ embedded zeros */
+#define SECTION_OVERRIDE 0x20000 /* allow override of default flags */
+#define SECTION_TLS 0x40000 /* contains thread-local storage */
+#define SECTION_NOTYPE 0x80000 /* don't output @progbits */
+#define SECTION_DECLARED 0x100000 /* section has been used */
+#define SECTION_STYLE_MASK 0x600000 /* bits used for SECTION_STYLE */
+#define SECTION_COMMON 0x800000 /* contains common data */
+#define SECTION_MACH_DEP 0x1000000 /* subsequent bits reserved for target */
+
+/* This SECTION_STYLE is used for unnamed sections that we can switch
+ to using a special assembler directive. */
+#define SECTION_UNNAMED 0x000000
+
+/* This SECTION_STYLE is used for named sections that we can switch
+ to using a general section directive. */
+#define SECTION_NAMED 0x200000
+
+/* This SECTION_STYLE is used for sections that we cannot switch to at
+ all. The choice of section is implied by the directive that we use
+ to declare the object. */
+#define SECTION_NOSWITCH 0x400000
+
+/* A helper function for default_elf_select_section and
+ default_elf_unique_section. Categorizes the DECL. */
+
+enum section_category
+{
+ SECCAT_TEXT,
+
+ SECCAT_RODATA,
+ SECCAT_RODATA_MERGE_STR,
+ SECCAT_RODATA_MERGE_STR_INIT,
+ SECCAT_RODATA_MERGE_CONST,
+ SECCAT_SRODATA,
+
+ SECCAT_DATA,
+
+ /* To optimize loading of shared programs, define following subsections
+ of data section:
+ _REL Contains data that has relocations, so they get grouped
+ together and dynamic linker will visit fewer pages in memory.
+ _RO Contains data that is otherwise read-only. This is useful
+ with prelinking as most relocations won't be dynamically
+ linked and thus stay read only.
+ _LOCAL Marks data containing relocations only to local objects.
+ These relocations will get fully resolved by prelinking. */
+ SECCAT_DATA_REL,
+ SECCAT_DATA_REL_LOCAL,
+ SECCAT_DATA_REL_RO,
+ SECCAT_DATA_REL_RO_LOCAL,
+
+ SECCAT_SDATA,
+ SECCAT_TDATA,
+
+ SECCAT_BSS,
+ SECCAT_SBSS,
+ SECCAT_TBSS,
+
+ SECCAT_EMUTLS_VAR,
+ SECCAT_EMUTLS_TMPL
+};
+
+/* Information that is provided by all instances of the section type. */
+struct section_common GTY(()) {
+ /* The set of SECTION_* flags that apply to this section. */
+ unsigned int flags;
+};
+
+/* Information about a SECTION_NAMED section. */
+struct named_section GTY(()) {
+ struct section_common common;
+
+ /* The name of the section. */
+ const char *name;
+
+ /* If nonnull, the VAR_DECL or FUNCTION_DECL with which the
+ section is associated. */
+ tree decl;
+};
+
+/* A callback that writes the assembly code for switching to an unnamed
+ section. The argument provides callback-specific data. */
+typedef void (*unnamed_section_callback) (const void *);
+
+/* Information about a SECTION_UNNAMED section. */
+struct unnamed_section GTY(()) {
+ struct section_common common;
+
+ /* The callback used to switch to the section, and the data that
+ should be passed to the callback. */
+ unnamed_section_callback GTY ((skip)) callback;
+ const void *GTY ((skip)) data;
+
+ /* The next entry in the chain of unnamed sections. */
+ section *next;
+};
+
+/* A callback that writes the assembly code for a decl in a
+ SECTION_NOSWITCH section. DECL is the decl that should be assembled
+ and NAME is the name of its SYMBOL_REF. SIZE is the size of the decl
+ in bytes and ROUNDED is that size rounded up to the next
+ BIGGEST_ALIGNMENT / BITS_PER_UNIT boundary.
+
+ Return true if the callback used DECL_ALIGN to set the object's
+ alignment. A false return value implies that we are relying
+ on the rounded size to align the decl. */
+typedef bool (*noswitch_section_callback) (tree decl, const char *name,
+ unsigned HOST_WIDE_INT size,
+ unsigned HOST_WIDE_INT rounded);
+
+/* Information about a SECTION_NOSWITCH section. */
+struct noswitch_section GTY(()) {
+ struct section_common common;
+
+ /* The callback used to assemble decls in this section. */
+ noswitch_section_callback GTY ((skip)) callback;
+};
+
+/* Information about a section, which may be named or unnamed. */
+union section GTY ((desc ("SECTION_STYLE (&(%h))")))
+{
+ struct section_common GTY ((skip)) common;
+ struct named_section GTY ((tag ("SECTION_NAMED"))) named;
+ struct unnamed_section GTY ((tag ("SECTION_UNNAMED"))) unnamed;
+ struct noswitch_section GTY ((tag ("SECTION_NOSWITCH"))) noswitch;
+};
+
+/* Return the style of section SECT. */
+#define SECTION_STYLE(SECT) ((SECT)->common.flags & SECTION_STYLE_MASK)
+
+struct object_block;
+
+/* Special well-known sections. */
+extern GTY(()) section *text_section;
+extern GTY(()) section *data_section;
+extern GTY(()) section *readonly_data_section;
+extern GTY(()) section *sdata_section;
+extern GTY(()) section *ctors_section;
+extern GTY(()) section *dtors_section;
+extern GTY(()) section *bss_section;
+extern GTY(()) section *sbss_section;
+extern GTY(()) section *exception_section;
+extern GTY(()) section *eh_frame_section;
+extern GTY(()) section *tls_comm_section;
+extern GTY(()) section *comm_section;
+extern GTY(()) section *lcomm_section;
+extern GTY(()) section *bss_noswitch_section;
+
+extern GTY(()) section *in_section;
+extern GTY(()) bool in_cold_section_p;
+
+extern section *get_unnamed_section (unsigned int, void (*) (const void *),
+ const void *);
+extern section *get_section (const char *, unsigned int, tree);
+extern section *get_named_section (tree, const char *, int);
+extern void place_block_symbol (rtx);
+extern rtx get_section_anchor (struct object_block *, HOST_WIDE_INT,
+ enum tls_model);
+extern section *mergeable_constant_section (enum machine_mode,
+ unsigned HOST_WIDE_INT,
+ unsigned int);
+extern section *function_section (tree);
+extern section *unlikely_text_section (void);
+extern section *current_function_section (void);
+
+/* Return the numbered .ctors.N (if CONSTRUCTOR_P) or .dtors.N (if
+ not) section for PRIORITY. */
+extern section *get_cdtor_priority_section (int, bool);
+
+extern bool unlikely_text_section_p (section *);
+extern void switch_to_section (section *);
+extern void output_section_asm_op (const void *);
+
+extern unsigned int default_section_type_flags (tree, const char *, int);
+
+extern bool have_global_bss_p (void);
+extern void default_no_named_section (const char *, unsigned int, tree);
+extern void default_elf_asm_named_section (const char *, unsigned int, tree);
+extern enum section_category categorize_decl_for_section (const_tree, int);
+extern void default_coff_asm_named_section (const char *, unsigned int, tree);
+extern void default_pe_asm_named_section (const char *, unsigned int, tree);
+
+extern void default_stabs_asm_out_destructor (rtx, int);
+extern void default_named_section_asm_out_destructor (rtx, int);
+extern void default_dtor_section_asm_out_destructor (rtx, int);
+extern void default_stabs_asm_out_constructor (rtx, int);
+extern void default_named_section_asm_out_constructor (rtx, int);
+extern void default_ctor_section_asm_out_constructor (rtx, int);
+
+extern section *default_select_section (tree, int, unsigned HOST_WIDE_INT);
+extern section *default_elf_select_section (tree, int, unsigned HOST_WIDE_INT);
+extern void default_unique_section (tree, int);
+extern section *default_function_rodata_section (tree);
+extern section *default_no_function_rodata_section (tree);
+extern section *default_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+extern section *default_elf_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+extern void default_encode_section_info (tree, rtx, int);
+extern const char *default_strip_name_encoding (const char *);
+extern void default_asm_output_anchor (rtx);
+extern bool default_use_anchors_for_symbol_p (const_rtx);
+extern bool default_binds_local_p (const_tree);
+extern bool default_binds_local_p_1 (const_tree, int);
+extern void default_globalize_label (FILE *, const char *);
+extern void default_globalize_decl_name (FILE *, tree);
+extern void default_emit_unwind_label (FILE *, tree, int, int);
+extern void default_emit_except_table_label (FILE *);
+extern void default_internal_label (FILE *, const char *, unsigned long);
+extern void default_file_start (void);
+extern void file_end_indicate_exec_stack (void);
+extern bool default_valid_pointer_mode (enum machine_mode);
+
+extern void default_elf_asm_output_external (FILE *file, tree,
+ const char *);
+extern int maybe_assemble_visibility (tree);
+
+extern int default_address_cost (rtx, bool);
+
+/* dbxout helper functions */
+#if defined DBX_DEBUGGING_INFO || defined XCOFF_DEBUGGING_INFO
+
+extern void dbxout_int (int);
+extern void dbxout_stabd (int, int);
+extern void dbxout_begin_stabn (int);
+extern void dbxout_begin_stabn_sline (int);
+extern void dbxout_begin_empty_stabs (int);
+extern void dbxout_begin_simple_stabs (const char *, int);
+extern void dbxout_begin_simple_stabs_desc (const char *, int, int);
+
+extern void dbxout_stab_value_zero (void);
+extern void dbxout_stab_value_label (const char *);
+extern void dbxout_stab_value_label_diff (const char *, const char *);
+extern void dbxout_stab_value_internal_label (const char *, int *);
+extern void dbxout_stab_value_internal_label_diff (const char *, int *,
+ const char *);
+
+#endif
+
+#endif /* ! GCC_OUTPUT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/partition.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/partition.h
new file mode 100644
index 0000000..d8b554f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/partition.h
@@ -0,0 +1,82 @@
+/* List implementation of a partition of consecutive integers.
+ Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc.
+ Contributed by CodeSourcery, LLC.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING. If not, write to
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/* This package implements a partition of consecutive integers. The
+ elements are partitioned into classes. Each class is represented
+ by one of its elements, the canonical element, which is chosen
+ arbitrarily from elements in the class. The principal operations
+ on a partition are FIND, which takes an element, determines its
+ class, and returns the canonical element for that class, and UNION,
+ which unites the two classes that contain two given elements into a
+ single class.
+
+ The list implementation used here provides constant-time finds. By
+ storing the size of each class with the class's canonical element,
+ it is able to perform unions over all the classes in the partition
+ in O (N log N) time. */
+
+#ifndef _PARTITION_H
+#define _PARTITION_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ansidecl.h"
+#include <stdio.h>
+
+struct partition_elem
+{
+ /* The canonical element that represents the class containing this
+ element. */
+ int class_element;
+ /* The next element in this class. Elements in each class form a
+ circular list. */
+ struct partition_elem* next;
+ /* The number of elements in this class. Valid only if this is the
+ canonical element for its class. */
+ unsigned class_count;
+};
+
+typedef struct partition_def
+{
+ /* The number of elements in this partition. */
+ int num_elements;
+ /* The elements in the partition. */
+ struct partition_elem elements[1];
+} *partition;
+
+extern partition partition_new (int);
+extern void partition_delete (partition);
+extern int partition_union (partition, int, int);
+extern void partition_print (partition, FILE*);
+
+/* Returns the canonical element corresponding to the class containing
+ ELEMENT__ in PARTITION__. */
+
+#define partition_find(partition__, element__) \
+ ((partition__)->elements[(element__)].class_element)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _PARTITION_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin-version.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin-version.h
new file mode 100644
index 0000000..6e953d4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin-version.h
@@ -0,0 +1,13 @@
+#include "configargs.h"
+
+static char basever[] = "4.4.3";
+static char datestamp[] = "20100121";
+static char devphase[] = "";
+static char revision[] = "";
+
+/* FIXME plugins: We should make the version information more precise.
+ One way to do is to add a checksum. */
+
+static struct plugin_gcc_version gcc_version = {basever, datestamp,
+ devphase, revision,
+ configuration_arguments};
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin.h
new file mode 100644
index 0000000..b610b23
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/plugin.h
@@ -0,0 +1,42 @@
+/* Header file for internal GCC plugin mechanism.
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef PLUGIN_H
+#define PLUGIN_H
+
+#include "gcc-plugin.h"
+
+struct attribute_spec;
+
+extern void add_new_plugin (const char *);
+extern void parse_plugin_arg_opt (const char *);
+extern void invoke_plugin_callbacks (enum plugin_event, void *);
+extern void initialize_plugins (void);
+extern bool plugins_active_p (void);
+extern void dump_active_plugins (FILE *);
+extern void debug_active_plugins (void);
+extern void print_plugins_versions (FILE *file, const char *indent);
+extern void print_plugins_help (FILE *file, const char *indent);
+extern void finalize_plugins (void);
+
+/* In attribs.c. */
+
+extern void register_attribute (const struct attribute_spec *attr);
+
+#endif /* PLUGIN_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pointer-set.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pointer-set.h
new file mode 100644
index 0000000..d6f95c0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pointer-set.h
@@ -0,0 +1,53 @@
+/* Set operations on pointers
+ Copyright (C) 2004, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef POINTER_SET_H
+#define POINTER_SET_H
+
+struct pointer_set_t;
+struct pointer_set_t *pointer_set_create (void);
+void pointer_set_destroy (struct pointer_set_t *pset);
+struct pointer_set_t *pointer_set_copy (const struct pointer_set_t *pset);
+
+int pointer_set_contains (const struct pointer_set_t *pset, const void *p);
+int pointer_set_insert (struct pointer_set_t *pset, const void *p);
+int pointer_set_delete (struct pointer_set_t *pset, const void *p);
+void pointer_set_traverse (const struct pointer_set_t *,
+ bool (*) (const void *, void *),
+ void *);
+
+void pointer_set_intersection_complement (struct pointer_set_t *dst_pset,
+ const struct pointer_set_t *src_pset,
+ struct pointer_set_t *comp_pset);
+
+void pointer_set_union_inplace (struct pointer_set_t *dst_pset,
+ const struct pointer_set_t *src_pset);
+
+size_t pointer_set_cardinality (const struct pointer_set_t *pset);
+
+struct pointer_map_t;
+struct pointer_map_t *pointer_map_create (void);
+void pointer_map_destroy (struct pointer_map_t *pmap);
+
+void **pointer_map_contains (const struct pointer_map_t *pmap, const void *p);
+void **pointer_map_insert (struct pointer_map_t *pmap, const void *p);
+void pointer_map_traverse (const struct pointer_map_t *,
+ bool (*) (const void *, void **, void *), void *);
+
+#endif /* POINTER_SET_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.def
new file mode 100644
index 0000000..3ac129e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.def
@@ -0,0 +1,118 @@
+/* Definitions for the branch prediction routines in the GNU compiler.
+ Copyright (C) 2001, 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* Before including this file, you should define a macro:
+
+ DEF_PREDICTOR (ENUM, NAME, HITRATE)
+
+ This macro will be called once for each predictor. The ENUM will
+ be of type `enum predictor', and will enumerate all supported
+ predictors. The order of DEF_PREDICTOR calls is important, as
+ in the first match combining heuristics, the predictor appearing
+ first in this file will win.
+
+ NAME is used in the debugging output to determine predictor type.
+
+ HITRATE is the probability that edge predicted by predictor as taken
+ will be really taken (so it should be always above
+ REG_BR_PROB_BASE / 2). */
+
+
+/* A value used as final outcome of all heuristics. */
+DEF_PREDICTOR (PRED_COMBINED, "combined", PROB_ALWAYS, 0)
+
+/* An outcome estimated by Dempster-Shaffer theory. */
+DEF_PREDICTOR (PRED_DS_THEORY, "DS theory", PROB_ALWAYS, 0)
+
+/* A combined heuristics using probability determined by first
+ matching heuristics from this list. */
+DEF_PREDICTOR (PRED_FIRST_MATCH, "first match", PROB_ALWAYS, 0)
+
+/* Heuristic applying when no heuristic below applies. */
+DEF_PREDICTOR (PRED_NO_PREDICTION, "no prediction", PROB_ALWAYS, 0)
+
+/* Mark unconditional jump as taken. */
+DEF_PREDICTOR (PRED_UNCONDITIONAL, "unconditional jump", PROB_ALWAYS,
+ PRED_FLAG_FIRST_MATCH)
+
+/* Use number of loop iterations determined by # of iterations
+ analysis to set probability. We don't want to use Dempster-Shaffer
+ theory here, as the predictions is exact. */
+DEF_PREDICTOR (PRED_LOOP_ITERATIONS, "loop iterations", PROB_ALWAYS,
+ PRED_FLAG_FIRST_MATCH)
+
+/* Hints dropped by user via __builtin_expect feature. */
+DEF_PREDICTOR (PRED_BUILTIN_EXPECT, "__builtin_expect", PROB_VERY_LIKELY,
+ PRED_FLAG_FIRST_MATCH)
+
+/* Use number of loop iterations guessed by the contents of the loop. */
+DEF_PREDICTOR (PRED_LOOP_ITERATIONS_GUESSED, "guessed loop iterations",
+ PROB_ALWAYS, PRED_FLAG_FIRST_MATCH)
+
+/* Branch containing goto is probably not taken. */
+DEF_PREDICTOR (PRED_CONTINUE, "continue", HITRATE (50), 0)
+
+/* Branch to basic block containing call marked by noreturn attribute. */
+DEF_PREDICTOR (PRED_NORETURN, "noreturn call", PROB_VERY_LIKELY,
+ PRED_FLAG_FIRST_MATCH)
+
+/* Branch to basic block containing call marked by cold function attribute. */
+DEF_PREDICTOR (PRED_COLD_FUNCTION, "cold function call", PROB_VERY_LIKELY,
+ PRED_FLAG_FIRST_MATCH)
+
+/* Loopback edge is taken. */
+DEF_PREDICTOR (PRED_LOOP_BRANCH, "loop branch", HITRATE (86),
+ PRED_FLAG_FIRST_MATCH)
+
+/* Edge causing loop to terminate is probably not taken. */
+DEF_PREDICTOR (PRED_LOOP_EXIT, "loop exit", HITRATE (91),
+ PRED_FLAG_FIRST_MATCH)
+
+/* Pointers are usually not NULL. */
+DEF_PREDICTOR (PRED_POINTER, "pointer", HITRATE (85), 0)
+DEF_PREDICTOR (PRED_TREE_POINTER, "pointer (on trees)", HITRATE (85), 0)
+
+/* NE is probable, EQ not etc... */
+DEF_PREDICTOR (PRED_OPCODE_POSITIVE, "opcode values positive", HITRATE (79), 0)
+DEF_PREDICTOR (PRED_OPCODE_NONEQUAL, "opcode values nonequal", HITRATE (71), 0)
+DEF_PREDICTOR (PRED_FPOPCODE, "fp_opcode", HITRATE (90), 0)
+DEF_PREDICTOR (PRED_TREE_OPCODE_POSITIVE, "opcode values positive (on trees)", HITRATE (73), 0)
+DEF_PREDICTOR (PRED_TREE_OPCODE_NONEQUAL, "opcode values nonequal (on trees)", HITRATE (72), 0)
+DEF_PREDICTOR (PRED_TREE_FPOPCODE, "fp_opcode (on trees)", HITRATE (90), 0)
+
+/* Branch guarding call is probably taken. */
+DEF_PREDICTOR (PRED_CALL, "call", HITRATE (71), 0)
+
+/* Branch causing function to terminate is probably not taken. */
+DEF_PREDICTOR (PRED_TREE_EARLY_RETURN, "early return (on trees)", HITRATE (61), 0)
+
+/* Branch containing goto is probably not taken. */
+DEF_PREDICTOR (PRED_GOTO, "goto", HITRATE (70), 0)
+
+/* Branch ending with return constant is probably not taken. */
+DEF_PREDICTOR (PRED_CONST_RETURN, "const return", HITRATE (67), 0)
+
+/* Branch ending with return negative constant is probably not taken. */
+DEF_PREDICTOR (PRED_NEGATIVE_RETURN, "negative return", HITRATE (96), 0)
+
+/* Branch ending with return; is probably not taken */
+DEF_PREDICTOR (PRED_NULL_RETURN, "null return", HITRATE (90), 0)
+
+/* Branches to a mudflap bounds check are extremely unlikely. */
+DEF_PREDICTOR (PRED_MUDFLAP, "mudflap check", PROB_VERY_LIKELY, 0)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.h
new file mode 100644
index 0000000..e115bb5
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/predict.h
@@ -0,0 +1,44 @@
+/* Definitions for branch prediction routines in the GNU compiler.
+ Copyright (C) 2001, 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_PREDICT_H
+#define GCC_PREDICT_H
+
+#define DEF_PREDICTOR(ENUM, NAME, HITRATE, FLAGS) ENUM,
+enum br_predictor
+{
+#include "predict.def"
+
+ /* Upper bound on non-language-specific builtins. */
+ END_PREDICTORS
+};
+#undef DEF_PREDICTOR
+enum prediction
+{
+ NOT_TAKEN,
+ TAKEN
+};
+
+extern void predict_insn_def (rtx, enum br_predictor, enum prediction);
+extern int counts_to_freqs (void);
+extern void estimate_bb_frequencies (void);
+extern const char *predictor_name (enum br_predictor);
+extern tree build_predict_expr (enum br_predictor, enum prediction);
+
+#endif /* GCC_PREDICT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pretty-print.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pretty-print.h
new file mode 100644
index 0000000..dd3f0c0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/pretty-print.h
@@ -0,0 +1,337 @@
+/* Various declarations for language-independent pretty-print subroutines.
+ Copyright (C) 2002, 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_PRETTY_PRINT_H
+#define GCC_PRETTY_PRINT_H
+
+#include "obstack.h"
+#include "input.h"
+
+/* Maximum number of format string arguments. */
+#define PP_NL_ARGMAX 30
+
+/* The type of a text to be formatted according a format specification
+ along with a list of things. */
+typedef struct
+{
+ const char *format_spec;
+ va_list *args_ptr;
+ int err_no; /* for %m */
+ location_t *locus;
+ tree *abstract_origin;
+} text_info;
+
+/* How often diagnostics are prefixed by their locations:
+ o DIAGNOSTICS_SHOW_PREFIX_NEVER: never - not yet supported;
+ o DIAGNOSTICS_SHOW_PREFIX_ONCE: emit only once;
+ o DIAGNOSTICS_SHOW_PREFIX_EVERY_LINE: emit each time a physical
+ line is started. */
+typedef enum
+{
+ DIAGNOSTICS_SHOW_PREFIX_ONCE = 0x0,
+ DIAGNOSTICS_SHOW_PREFIX_NEVER = 0x1,
+ DIAGNOSTICS_SHOW_PREFIX_EVERY_LINE = 0x2
+} diagnostic_prefixing_rule_t;
+
+/* The chunk_info data structure forms a stack of the results from the
+ first phase of formatting (pp_base_format) which have not yet been
+ output (pp_base_output_formatted_text). A stack is necessary because
+ the diagnostic starter may decide to generate its own output by way
+ of the formatter. */
+struct chunk_info
+{
+ /* Pointer to previous chunk on the stack. */
+ struct chunk_info *prev;
+
+ /* Array of chunks to output. Each chunk is a NUL-terminated string.
+ In the first phase of formatting, even-numbered chunks are
+ to be output verbatim, odd-numbered chunks are format specifiers.
+ The second phase replaces all odd-numbered chunks with formatted
+ text, and the third phase simply emits all the chunks in sequence
+ with appropriate line-wrapping. */
+ const char *args[PP_NL_ARGMAX * 2];
+};
+
+/* The output buffer datatype. This is best seen as an abstract datatype
+ whose fields should not be accessed directly by clients. */
+typedef struct
+{
+ /* Obstack where the text is built up. */
+ struct obstack formatted_obstack;
+
+ /* Obstack containing a chunked representation of the format
+ specification plus arguments. */
+ struct obstack chunk_obstack;
+
+ /* Currently active obstack: one of the above two. This is used so
+ that the text formatters don't need to know which phase we're in. */
+ struct obstack *obstack;
+
+ /* Stack of chunk arrays. These come from the chunk_obstack. */
+ struct chunk_info *cur_chunk_array;
+
+ /* Where to output formatted text. */
+ FILE *stream;
+
+ /* The amount of characters output so far. */
+ int line_length;
+
+ /* This must be large enough to hold any printed integer or
+ floating-point value. */
+ char digit_buffer[128];
+} output_buffer;
+
+/* The type of pretty-printer flags passed to clients. */
+typedef unsigned int pp_flags;
+
+typedef enum
+{
+ pp_none, pp_before, pp_after
+} pp_padding;
+
+/* Structure for switching in and out of verbatim mode in a convenient
+ manner. */
+typedef struct
+{
+ /* Current prefixing rule. */
+ diagnostic_prefixing_rule_t rule;
+
+ /* The ideal upper bound of number of characters per line, as suggested
+ by front-end. */
+ int line_cutoff;
+} pp_wrapping_mode_t;
+
+/* Maximum characters per line in automatic line wrapping mode.
+ Zero means don't wrap lines. */
+#define pp_line_cutoff(PP) pp_base (PP)->wrapping.line_cutoff
+
+/* Prefixing rule used in formatting a diagnostic message. */
+#define pp_prefixing_rule(PP) pp_base (PP)->wrapping.rule
+
+/* Get or set the wrapping mode as a single entity. */
+#define pp_wrapping_mode(PP) pp_base (PP)->wrapping
+
+/* The type of a hook that formats client-specific data onto a pretty_pinter.
+ A client-supplied formatter returns true if everything goes well,
+ otherwise it returns false. */
+typedef struct pretty_print_info pretty_printer;
+typedef bool (*printer_fn) (pretty_printer *, text_info *, const char *,
+ int, bool, bool, bool);
+
+/* Client supplied function used to decode formats. */
+#define pp_format_decoder(PP) pp_base (PP)->format_decoder
+
+/* TRUE if a newline character needs to be added before further
+ formatting. */
+#define pp_needs_newline(PP) pp_base (PP)->need_newline
+
+/* True if PRETTY-PRINTER is in line-wrapping mode. */
+#define pp_is_wrapping_line(PP) (pp_line_cutoff (PP) > 0)
+
+/* The amount of whitespace to be emitted when starting a new line. */
+#define pp_indentation(PP) pp_base (PP)->indent_skip
+
+/* The data structure that contains the bare minimum required to do
+ proper pretty-printing. Clients may derived from this structure
+ and add additional fields they need. */
+struct pretty_print_info
+{
+ /* Where we print external representation of ENTITY. */
+ output_buffer *buffer;
+
+ /* The prefix for each new line. */
+ const char *prefix;
+
+ /* Where to put whitespace around the entity being formatted. */
+ pp_padding padding;
+
+ /* The real upper bound of number of characters per line, taking into
+ account the case of a very very looong prefix. */
+ int maximum_length;
+
+ /* Indentation count. */
+ int indent_skip;
+
+ /* Current wrapping mode. */
+ pp_wrapping_mode_t wrapping;
+
+ /* If non-NULL, this function formats a TEXT into the BUFFER. When called,
+ TEXT->format_spec points to a format code. FORMAT_DECODER should call
+ pp_string (and related functions) to add data to the BUFFER.
+ FORMAT_DECODER can read arguments from *TEXT->args_pts using VA_ARG.
+ If the BUFFER needs additional characters from the format string, it
+ should advance the TEXT->format_spec as it goes. When FORMAT_DECODER
+ returns, TEXT->format_spec should point to the last character processed.
+ */
+ printer_fn format_decoder;
+
+ /* Nonzero if current PREFIX was emitted at least once. */
+ bool emitted_prefix;
+
+ /* Nonzero means one should emit a newline before outputting anything. */
+ bool need_newline;
+};
+
+#define pp_set_line_maximum_length(PP, L) \
+ pp_base_set_line_maximum_length (pp_base (PP), L)
+#define pp_set_prefix(PP, P) pp_base_set_prefix (pp_base (PP), P)
+#define pp_destroy_prefix(PP) pp_base_destroy_prefix (pp_base (PP))
+#define pp_remaining_character_count_for_line(PP) \
+ pp_base_remaining_character_count_for_line (pp_base (PP))
+#define pp_clear_output_area(PP) \
+ pp_base_clear_output_area (pp_base (PP))
+#define pp_formatted_text(PP) pp_base_formatted_text (pp_base (PP))
+#define pp_last_position_in_text(PP) \
+ pp_base_last_position_in_text (pp_base (PP))
+#define pp_emit_prefix(PP) pp_base_emit_prefix (pp_base (PP))
+#define pp_append_text(PP, B, E) \
+ pp_base_append_text (pp_base (PP), B, E)
+#define pp_flush(PP) pp_base_flush (pp_base (PP))
+#define pp_format(PP, TI) pp_base_format (pp_base (PP), TI)
+#define pp_output_formatted_text(PP) \
+ pp_base_output_formatted_text (pp_base (PP))
+#define pp_format_verbatim(PP, TI) \
+ pp_base_format_verbatim (pp_base (PP), TI)
+
+#define pp_character(PP, C) pp_base_character (pp_base (PP), C)
+#define pp_string(PP, S) pp_base_string (pp_base (PP), S)
+#define pp_newline(PP) pp_base_newline (pp_base (PP))
+
+#define pp_space(PP) pp_character (PP, ' ')
+#define pp_left_paren(PP) pp_character (PP, '(')
+#define pp_right_paren(PP) pp_character (PP, ')')
+#define pp_left_bracket(PP) pp_character (PP, '[')
+#define pp_right_bracket(PP) pp_character (PP, ']')
+#define pp_left_brace(PP) pp_character (PP, '{')
+#define pp_right_brace(PP) pp_character (PP, '}')
+#define pp_semicolon(PP) pp_character (PP, ';')
+#define pp_comma(PP) pp_string (PP, ", ")
+#define pp_dot(PP) pp_character (PP, '.')
+#define pp_colon(PP) pp_character (PP, ':')
+#define pp_colon_colon(PP) pp_string (PP, "::")
+#define pp_arrow(PP) pp_string (PP, "->")
+#define pp_equal(PP) pp_character (PP, '=')
+#define pp_question(PP) pp_character (PP, '?')
+#define pp_bar(PP) pp_character (PP, '|')
+#define pp_carret(PP) pp_character (PP, '^')
+#define pp_ampersand(PP) pp_character (PP, '&')
+#define pp_less(PP) pp_character (PP, '<')
+#define pp_greater(PP) pp_character (PP, '>')
+#define pp_plus(PP) pp_character (PP, '+')
+#define pp_minus(PP) pp_character (PP, '-')
+#define pp_star(PP) pp_character (PP, '*')
+#define pp_slash(PP) pp_character (PP, '/')
+#define pp_modulo(PP) pp_character (PP, '%')
+#define pp_exclamation(PP) pp_character (PP, '!')
+#define pp_complement(PP) pp_character (PP, '~')
+#define pp_quote(PP) pp_character (PP, '\'')
+#define pp_backquote(PP) pp_character (PP, '`')
+#define pp_doublequote(PP) pp_character (PP, '"')
+#define pp_newline_and_indent(PP, N) \
+ do { \
+ pp_indentation (PP) += N; \
+ pp_newline (PP); \
+ pp_base_indent (pp_base (PP)); \
+ pp_needs_newline (PP) = false; \
+ } while (0)
+#define pp_maybe_newline_and_indent(PP, N) \
+ if (pp_needs_newline (PP)) pp_newline_and_indent (PP, N)
+#define pp_maybe_space(PP) pp_base_maybe_space (pp_base (PP))
+#define pp_separate_with(PP, C) \
+ do { \
+ pp_character (PP, C); \
+ pp_space (PP); \
+ } while (0)
+#define pp_scalar(PP, FORMAT, SCALAR) \
+ do \
+ { \
+ sprintf (pp_buffer (PP)->digit_buffer, FORMAT, SCALAR); \
+ pp_string (PP, pp_buffer (PP)->digit_buffer); \
+ } \
+ while (0)
+#define pp_decimal_int(PP, I) pp_scalar (PP, "%d", I)
+#define pp_wide_integer(PP, I) \
+ pp_scalar (PP, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) I)
+#define pp_widest_integer(PP, I) \
+ pp_scalar (PP, HOST_WIDEST_INT_PRINT_DEC, (HOST_WIDEST_INT) I)
+#define pp_pointer(PP, P) pp_scalar (PP, "%p", P)
+
+#define pp_identifier(PP, ID) pp_string (PP, ID)
+#define pp_tree_identifier(PP, T) \
+ pp_append_text(PP, IDENTIFIER_POINTER (T), \
+ IDENTIFIER_POINTER (T) + IDENTIFIER_LENGTH (T))
+
+#define pp_unsupported_tree(PP, T) \
+ pp_verbatim (pp_base (PP), "#%qs not supported by %s#", \
+ tree_code_name[(int) TREE_CODE (T)], __FUNCTION__)
+
+
+#define pp_buffer(PP) pp_base (PP)->buffer
+/* Clients that directly derive from pretty_printer need to override
+ this macro to return a pointer to the base pretty_printer structure. */
+#define pp_base(PP) (PP)
+
+extern void pp_construct (pretty_printer *, const char *, int);
+extern void pp_base_set_line_maximum_length (pretty_printer *, int);
+extern void pp_base_set_prefix (pretty_printer *, const char *);
+extern void pp_base_destroy_prefix (pretty_printer *);
+extern int pp_base_remaining_character_count_for_line (pretty_printer *);
+extern void pp_base_clear_output_area (pretty_printer *);
+extern const char *pp_base_formatted_text (pretty_printer *);
+extern const char *pp_base_last_position_in_text (const pretty_printer *);
+extern void pp_base_emit_prefix (pretty_printer *);
+extern void pp_base_append_text (pretty_printer *, const char *, const char *);
+
+/* This header may be included before toplev.h, hence the duplicate
+ definitions to allow for GCC-specific formats. */
+#if GCC_VERSION >= 3005
+#define ATTRIBUTE_GCC_PPDIAG(m, n) __attribute__ ((__format__ (__gcc_diag__, m ,n))) ATTRIBUTE_NONNULL(m)
+#else
+#define ATTRIBUTE_GCC_PPDIAG(m, n) ATTRIBUTE_NONNULL(m)
+#endif
+extern void pp_printf (pretty_printer *, const char *, ...)
+ ATTRIBUTE_GCC_PPDIAG(2,3);
+
+extern void pp_verbatim (pretty_printer *, const char *, ...)
+ ATTRIBUTE_GCC_PPDIAG(2,3);
+extern void pp_base_flush (pretty_printer *);
+extern void pp_base_format (pretty_printer *, text_info *);
+extern void pp_base_output_formatted_text (pretty_printer *);
+extern void pp_base_format_verbatim (pretty_printer *, text_info *);
+
+extern void pp_base_indent (pretty_printer *);
+extern void pp_base_newline (pretty_printer *);
+extern void pp_base_character (pretty_printer *, int);
+extern void pp_base_string (pretty_printer *, const char *);
+extern void pp_write_text_to_stream (pretty_printer *pp);
+extern void pp_base_maybe_space (pretty_printer *);
+
+/* Switch into verbatim mode and return the old mode. */
+static inline pp_wrapping_mode_t
+pp_set_verbatim_wrapping_ (pretty_printer *pp)
+{
+ pp_wrapping_mode_t oldmode = pp_wrapping_mode (pp);
+ pp_line_cutoff (pp) = 0;
+ pp_prefixing_rule (pp) = DIAGNOSTICS_SHOW_PREFIX_NEVER;
+ return oldmode;
+}
+#define pp_set_verbatim_wrapping(PP) pp_set_verbatim_wrapping_ (pp_base (PP))
+
+#endif /* GCC_PRETTY_PRINT_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/real.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/real.h
new file mode 100644
index 0000000..71fed7d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/real.h
@@ -0,0 +1,487 @@
+/* Definitions of floating-point access for GNU compiler.
+ Copyright (C) 1989, 1991, 1994, 1996, 1997, 1998, 1999,
+ 2000, 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_REAL_H
+#define GCC_REAL_H
+
+#ifndef GENERATOR_FILE
+#include <gmp.h>
+#include <mpfr.h>
+#endif
+#include "machmode.h"
+
+/* An expanded form of the represented number. */
+
+/* Enumerate the special cases of numbers that we encounter. */
+enum real_value_class {
+ rvc_zero,
+ rvc_normal,
+ rvc_inf,
+ rvc_nan
+};
+
+#define SIGNIFICAND_BITS (128 + HOST_BITS_PER_LONG)
+#define EXP_BITS (32 - 6)
+#define MAX_EXP ((1 << (EXP_BITS - 1)) - 1)
+#define SIGSZ (SIGNIFICAND_BITS / HOST_BITS_PER_LONG)
+#define SIG_MSB ((unsigned long)1 << (HOST_BITS_PER_LONG - 1))
+
+struct real_value GTY(())
+{
+ /* Use the same underlying type for all bit-fields, so as to make
+ sure they're packed together, otherwise REAL_VALUE_TYPE_SIZE will
+ be miscomputed. */
+ unsigned int /* ENUM_BITFIELD (real_value_class) */ cl : 2;
+ unsigned int decimal : 1;
+ unsigned int sign : 1;
+ unsigned int signalling : 1;
+ unsigned int canonical : 1;
+ unsigned int uexp : EXP_BITS;
+ unsigned long sig[SIGSZ];
+};
+
+#define REAL_EXP(REAL) \
+ ((int)((REAL)->uexp ^ (unsigned int)(1 << (EXP_BITS - 1))) \
+ - (1 << (EXP_BITS - 1)))
+#define SET_REAL_EXP(REAL, EXP) \
+ ((REAL)->uexp = ((unsigned int)(EXP) & (unsigned int)((1 << EXP_BITS) - 1)))
+
+/* Various headers condition prototypes on #ifdef REAL_VALUE_TYPE, so it
+ needs to be a macro. We do need to continue to have a structure tag
+ so that other headers can forward declare it. */
+#define REAL_VALUE_TYPE struct real_value
+
+/* We store a REAL_VALUE_TYPE into an rtx, and we do this by putting it in
+ consecutive "w" slots. Moreover, we've got to compute the number of "w"
+ slots at preprocessor time, which means we can't use sizeof. Guess. */
+
+#define REAL_VALUE_TYPE_SIZE (SIGNIFICAND_BITS + 32)
+#define REAL_WIDTH \
+ (REAL_VALUE_TYPE_SIZE/HOST_BITS_PER_WIDE_INT \
+ + (REAL_VALUE_TYPE_SIZE%HOST_BITS_PER_WIDE_INT ? 1 : 0)) /* round up */
+
+/* Verify the guess. */
+extern char test_real_width
+ [sizeof(REAL_VALUE_TYPE) <= REAL_WIDTH*sizeof(HOST_WIDE_INT) ? 1 : -1];
+
+/* Calculate the format for CONST_DOUBLE. We need as many slots as
+ are necessary to overlay a REAL_VALUE_TYPE on them. This could be
+ as many as four (32-bit HOST_WIDE_INT, 128-bit REAL_VALUE_TYPE).
+
+ A number of places assume that there are always at least two 'w'
+ slots in a CONST_DOUBLE, so we provide them even if one would suffice. */
+
+#if REAL_WIDTH == 1
+# define CONST_DOUBLE_FORMAT "ww"
+#else
+# if REAL_WIDTH == 2
+# define CONST_DOUBLE_FORMAT "ww"
+# else
+# if REAL_WIDTH == 3
+# define CONST_DOUBLE_FORMAT "www"
+# else
+# if REAL_WIDTH == 4
+# define CONST_DOUBLE_FORMAT "wwww"
+# else
+# if REAL_WIDTH == 5
+# define CONST_DOUBLE_FORMAT "wwwww"
+# else
+# if REAL_WIDTH == 6
+# define CONST_DOUBLE_FORMAT "wwwwww"
+# else
+ #error "REAL_WIDTH > 6 not supported"
+# endif
+# endif
+# endif
+# endif
+# endif
+#endif
+
+
+/* Describes the properties of the specific target format in use. */
+struct real_format
+{
+ /* Move to and from the target bytes. */
+ void (*encode) (const struct real_format *, long *,
+ const REAL_VALUE_TYPE *);
+ void (*decode) (const struct real_format *, REAL_VALUE_TYPE *,
+ const long *);
+
+ /* The radix of the exponent and digits of the significand. */
+ int b;
+
+ /* Size of the significand in digits of radix B. */
+ int p;
+
+ /* Size of the significant of a NaN, in digits of radix B. */
+ int pnan;
+
+ /* The minimum negative integer, x, such that b**(x-1) is normalized. */
+ int emin;
+
+ /* The maximum integer, x, such that b**(x-1) is representable. */
+ int emax;
+
+ /* The bit position of the sign bit, for determining whether a value
+ is positive/negative, or -1 for a complex encoding. */
+ int signbit_ro;
+
+ /* The bit position of the sign bit, for changing the sign of a number,
+ or -1 for a complex encoding. */
+ int signbit_rw;
+
+ /* Default rounding mode for operations on this format. */
+ bool round_towards_zero;
+ bool has_sign_dependent_rounding;
+
+ /* Properties of the format. */
+ bool has_nans;
+ bool has_inf;
+ bool has_denorm;
+ bool has_signed_zero;
+ bool qnan_msb_set;
+ bool canonical_nan_lsbs_set;
+};
+
+
+/* The target format used for each floating point mode.
+ Float modes are followed by decimal float modes, with entries for
+ float modes indexed by (MODE - first float mode), and entries for
+ decimal float modes indexed by (MODE - first decimal float mode) +
+ the number of float modes. */
+extern const struct real_format *
+ real_format_for_mode[MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1
+ + MAX_MODE_DECIMAL_FLOAT - MIN_MODE_DECIMAL_FLOAT + 1];
+
+#define REAL_MODE_FORMAT(MODE) \
+ (real_format_for_mode[DECIMAL_FLOAT_MODE_P (MODE) \
+ ? (((MODE) - MIN_MODE_DECIMAL_FLOAT) \
+ + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) \
+ : ((MODE) - MIN_MODE_FLOAT)])
+
+#define FLOAT_MODE_FORMAT(MODE) \
+ (REAL_MODE_FORMAT (SCALAR_FLOAT_MODE_P (MODE)? (MODE) \
+ : GET_MODE_INNER (MODE)))
+
+/* The following macro determines whether the floating point format is
+ composite, i.e. may contain non-consecutive mantissa bits, in which
+ case compile-time FP overflow may not model run-time overflow. */
+#define MODE_COMPOSITE_P(MODE) \
+ (FLOAT_MODE_P (MODE) \
+ && FLOAT_MODE_FORMAT (MODE)->pnan < FLOAT_MODE_FORMAT (MODE)->p)
+
+/* Accessor macros for format properties. */
+#define MODE_HAS_NANS(MODE) \
+ (FLOAT_MODE_P (MODE) && FLOAT_MODE_FORMAT (MODE)->has_nans)
+#define MODE_HAS_INFINITIES(MODE) \
+ (FLOAT_MODE_P (MODE) && FLOAT_MODE_FORMAT (MODE)->has_inf)
+#define MODE_HAS_SIGNED_ZEROS(MODE) \
+ (FLOAT_MODE_P (MODE) && FLOAT_MODE_FORMAT (MODE)->has_signed_zero)
+#define MODE_HAS_SIGN_DEPENDENT_ROUNDING(MODE) \
+ (FLOAT_MODE_P (MODE) \
+ && FLOAT_MODE_FORMAT (MODE)->has_sign_dependent_rounding)
+
+
+/* Declare functions in real.c. */
+
+/* Binary or unary arithmetic on tree_code. */
+extern bool real_arithmetic (REAL_VALUE_TYPE *, int, const REAL_VALUE_TYPE *,
+ const REAL_VALUE_TYPE *);
+
+/* Compare reals by tree_code. */
+extern bool real_compare (int, const REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *);
+
+/* Determine whether a floating-point value X is infinite. */
+extern bool real_isinf (const REAL_VALUE_TYPE *);
+
+/* Determine whether a floating-point value X is a NaN. */
+extern bool real_isnan (const REAL_VALUE_TYPE *);
+
+/* Determine whether a floating-point value X is finite. */
+extern bool real_isfinite (const REAL_VALUE_TYPE *);
+
+/* Determine whether a floating-point value X is negative. */
+extern bool real_isneg (const REAL_VALUE_TYPE *);
+
+/* Determine whether a floating-point value X is minus zero. */
+extern bool real_isnegzero (const REAL_VALUE_TYPE *);
+
+/* Compare two floating-point objects for bitwise identity. */
+extern bool real_identical (const REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *);
+
+/* Extend or truncate to a new mode. */
+extern void real_convert (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+
+/* Return true if truncating to NEW is exact. */
+extern bool exact_real_truncate (enum machine_mode, const REAL_VALUE_TYPE *);
+
+/* Render R as a decimal floating point constant. */
+extern void real_to_decimal (char *, const REAL_VALUE_TYPE *, size_t,
+ size_t, int);
+
+/* Render R as a decimal floating point constant, rounded so as to be
+ parsed back to the same value when interpreted in mode MODE. */
+extern void real_to_decimal_for_mode (char *, const REAL_VALUE_TYPE *, size_t,
+ size_t, int, enum machine_mode);
+
+/* Render R as a hexadecimal floating point constant. */
+extern void real_to_hexadecimal (char *, const REAL_VALUE_TYPE *,
+ size_t, size_t, int);
+
+/* Render R as an integer. */
+extern HOST_WIDE_INT real_to_integer (const REAL_VALUE_TYPE *);
+extern void real_to_integer2 (HOST_WIDE_INT *, HOST_WIDE_INT *,
+ const REAL_VALUE_TYPE *);
+
+/* Initialize R from a decimal or hexadecimal string. Return -1 if
+ the value underflows, +1 if overflows, and 0 otherwise. */
+extern int real_from_string (REAL_VALUE_TYPE *, const char *);
+/* Wrapper to allow different internal representation for decimal floats. */
+extern void real_from_string3 (REAL_VALUE_TYPE *, const char *, enum machine_mode);
+
+/* Initialize R from an integer pair HIGH/LOW. */
+extern void real_from_integer (REAL_VALUE_TYPE *, enum machine_mode,
+ unsigned HOST_WIDE_INT, HOST_WIDE_INT, int);
+
+extern long real_to_target_fmt (long *, const REAL_VALUE_TYPE *,
+ const struct real_format *);
+extern long real_to_target (long *, const REAL_VALUE_TYPE *, enum machine_mode);
+
+extern void real_from_target_fmt (REAL_VALUE_TYPE *, const long *,
+ const struct real_format *);
+extern void real_from_target (REAL_VALUE_TYPE *, const long *,
+ enum machine_mode);
+
+extern void real_inf (REAL_VALUE_TYPE *);
+
+extern bool real_nan (REAL_VALUE_TYPE *, const char *, int, enum machine_mode);
+
+extern void real_maxval (REAL_VALUE_TYPE *, int, enum machine_mode);
+
+extern void real_2expN (REAL_VALUE_TYPE *, int, enum machine_mode);
+
+extern unsigned int real_hash (const REAL_VALUE_TYPE *);
+
+
+/* Target formats defined in real.c. */
+extern const struct real_format ieee_single_format;
+extern const struct real_format mips_single_format;
+extern const struct real_format motorola_single_format;
+extern const struct real_format spu_single_format;
+extern const struct real_format ieee_double_format;
+extern const struct real_format mips_double_format;
+extern const struct real_format motorola_double_format;
+extern const struct real_format ieee_extended_motorola_format;
+extern const struct real_format ieee_extended_intel_96_format;
+extern const struct real_format ieee_extended_intel_96_round_53_format;
+extern const struct real_format ieee_extended_intel_128_format;
+extern const struct real_format ibm_extended_format;
+extern const struct real_format mips_extended_format;
+extern const struct real_format ieee_quad_format;
+extern const struct real_format mips_quad_format;
+extern const struct real_format vax_f_format;
+extern const struct real_format vax_d_format;
+extern const struct real_format vax_g_format;
+extern const struct real_format real_internal_format;
+extern const struct real_format decimal_single_format;
+extern const struct real_format decimal_double_format;
+extern const struct real_format decimal_quad_format;
+
+
+/* ====================================================================== */
+/* Crap. */
+
+#define REAL_ARITHMETIC(value, code, d1, d2) \
+ real_arithmetic (&(value), code, &(d1), &(d2))
+
+#define REAL_VALUES_IDENTICAL(x, y) real_identical (&(x), &(y))
+#define REAL_VALUES_EQUAL(x, y) real_compare (EQ_EXPR, &(x), &(y))
+#define REAL_VALUES_LESS(x, y) real_compare (LT_EXPR, &(x), &(y))
+
+/* Determine whether a floating-point value X is infinite. */
+#define REAL_VALUE_ISINF(x) real_isinf (&(x))
+
+/* Determine whether a floating-point value X is a NaN. */
+#define REAL_VALUE_ISNAN(x) real_isnan (&(x))
+
+/* Determine whether a floating-point value X is negative. */
+#define REAL_VALUE_NEGATIVE(x) real_isneg (&(x))
+
+/* Determine whether a floating-point value X is minus zero. */
+#define REAL_VALUE_MINUS_ZERO(x) real_isnegzero (&(x))
+
+/* IN is a REAL_VALUE_TYPE. OUT is an array of longs. */
+#define REAL_VALUE_TO_TARGET_LONG_DOUBLE(IN, OUT) \
+ real_to_target (OUT, &(IN), \
+ mode_for_size (LONG_DOUBLE_TYPE_SIZE, MODE_FLOAT, 0))
+
+#define REAL_VALUE_TO_TARGET_DOUBLE(IN, OUT) \
+ real_to_target (OUT, &(IN), mode_for_size (64, MODE_FLOAT, 0))
+
+/* IN is a REAL_VALUE_TYPE. OUT is a long. */
+#define REAL_VALUE_TO_TARGET_SINGLE(IN, OUT) \
+ ((OUT) = real_to_target (NULL, &(IN), mode_for_size (32, MODE_FLOAT, 0)))
+
+#define REAL_VALUE_FROM_INT(r, lo, hi, mode) \
+ real_from_integer (&(r), mode, lo, hi, 0)
+
+#define REAL_VALUE_FROM_UNSIGNED_INT(r, lo, hi, mode) \
+ real_from_integer (&(r), mode, lo, hi, 1)
+
+/* Real values to IEEE 754 decimal floats. */
+
+/* IN is a REAL_VALUE_TYPE. OUT is an array of longs. */
+#define REAL_VALUE_TO_TARGET_DECIMAL128(IN, OUT) \
+ real_to_target (OUT, &(IN), mode_for_size (128, MODE_DECIMAL_FLOAT, 0))
+
+#define REAL_VALUE_TO_TARGET_DECIMAL64(IN, OUT) \
+ real_to_target (OUT, &(IN), mode_for_size (64, MODE_DECIMAL_FLOAT, 0))
+
+/* IN is a REAL_VALUE_TYPE. OUT is a long. */
+#define REAL_VALUE_TO_TARGET_DECIMAL32(IN, OUT) \
+ ((OUT) = real_to_target (NULL, &(IN), mode_for_size (32, MODE_DECIMAL_FLOAT, 0)))
+
+extern REAL_VALUE_TYPE real_value_truncate (enum machine_mode,
+ REAL_VALUE_TYPE);
+
+#define REAL_VALUE_TO_INT(plow, phigh, r) \
+ real_to_integer2 (plow, phigh, &(r))
+
+extern REAL_VALUE_TYPE real_arithmetic2 (int, const REAL_VALUE_TYPE *,
+ const REAL_VALUE_TYPE *);
+
+#define REAL_VALUE_NEGATE(X) \
+ real_arithmetic2 (NEGATE_EXPR, &(X), NULL)
+
+#define REAL_VALUE_ABS(X) \
+ real_arithmetic2 (ABS_EXPR, &(X), NULL)
+
+extern int significand_size (enum machine_mode);
+
+extern REAL_VALUE_TYPE real_from_string2 (const char *, enum machine_mode);
+
+#define REAL_VALUE_ATOF(s, m) \
+ real_from_string2 (s, m)
+
+#define CONST_DOUBLE_ATOF(s, m) \
+ CONST_DOUBLE_FROM_REAL_VALUE (real_from_string2 (s, m), m)
+
+#define REAL_VALUE_FIX(r) \
+ real_to_integer (&(r))
+
+/* ??? Not quite right. */
+#define REAL_VALUE_UNSIGNED_FIX(r) \
+ real_to_integer (&(r))
+
+/* ??? These were added for Paranoia support. */
+
+/* Return floor log2(R). */
+extern int real_exponent (const REAL_VALUE_TYPE *);
+
+/* R = A * 2**EXP. */
+extern void real_ldexp (REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *, int);
+
+/* **** End of software floating point emulator interface macros **** */
+
+/* Constant real values 0, 1, 2, -1 and 0.5. */
+
+extern REAL_VALUE_TYPE dconst0;
+extern REAL_VALUE_TYPE dconst1;
+extern REAL_VALUE_TYPE dconst2;
+extern REAL_VALUE_TYPE dconstm1;
+extern REAL_VALUE_TYPE dconsthalf;
+
+#define dconst_e() (*dconst_e_ptr ())
+#define dconst_third() (*dconst_third_ptr ())
+#define dconst_sqrt2() (*dconst_sqrt2_ptr ())
+
+/* Function to return the real value special constant 'e'. */
+extern const REAL_VALUE_TYPE * dconst_e_ptr (void);
+
+/* Returns the special REAL_VALUE_TYPE corresponding to 1/3. */
+extern const REAL_VALUE_TYPE * dconst_third_ptr (void);
+
+/* Returns the special REAL_VALUE_TYPE corresponding to sqrt(2). */
+extern const REAL_VALUE_TYPE * dconst_sqrt2_ptr (void);
+
+/* Function to return a real value (not a tree node)
+ from a given integer constant. */
+REAL_VALUE_TYPE real_value_from_int_cst (const_tree, const_tree);
+
+bool real_from_native (tree, const unsigned char *, int, REAL_VALUE_TYPE *);
+
+/* Given a CONST_DOUBLE in FROM, store into TO the value it represents. */
+#define REAL_VALUE_FROM_CONST_DOUBLE(to, from) \
+ ((to) = *CONST_DOUBLE_REAL_VALUE (from))
+
+/* Return a CONST_DOUBLE with value R and mode M. */
+#define CONST_DOUBLE_FROM_REAL_VALUE(r, m) \
+ const_double_from_real_value (r, m)
+extern rtx const_double_from_real_value (REAL_VALUE_TYPE, enum machine_mode);
+
+/* Replace R by 1/R in the given machine mode, if the result is exact. */
+extern bool exact_real_inverse (enum machine_mode, REAL_VALUE_TYPE *);
+
+/* Return true if arithmetic on values in IMODE that were promoted
+ from values in TMODE is equivalent to direct arithmetic on values
+ in TMODE. */
+bool real_can_shorten_arithmetic (enum machine_mode, enum machine_mode);
+
+/* In tree.c: wrap up a REAL_VALUE_TYPE in a tree node. */
+extern tree build_real (tree, REAL_VALUE_TYPE);
+
+/* Calculate R as the square root of X in the given machine mode. */
+extern bool real_sqrt (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+
+/* Calculate R as X raised to the integer exponent N in mode MODE. */
+extern bool real_powi (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *, HOST_WIDE_INT);
+
+/* Standard round to integer value functions. */
+extern void real_trunc (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+extern void real_floor (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+extern void real_ceil (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+extern void real_round (REAL_VALUE_TYPE *, enum machine_mode,
+ const REAL_VALUE_TYPE *);
+
+/* Set the sign of R to the sign of X. */
+extern void real_copysign (REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *);
+
+#ifndef GENERATOR_FILE
+/* Convert between MPFR and REAL_VALUE_TYPE. The caller is
+ responsible for initializing and clearing the MPFR parameter. */
+
+extern void real_from_mpfr (REAL_VALUE_TYPE *, mpfr_srcptr, tree, mp_rnd_t);
+extern void mpfr_from_real (mpfr_ptr, const REAL_VALUE_TYPE *, mp_rnd_t);
+#endif
+
+/* Check whether the real constant value given is an integer. */
+extern bool real_isinteger (const REAL_VALUE_TYPE *c, enum machine_mode mode);
+
+/* Write into BUF the maximum representable finite floating-point
+ number, (1 - b**-p) * b**emax for a given FP format FMT as a hex
+ float string. BUF must be large enough to contain the result. */
+extern void get_max_float (const struct real_format *, char *, size_t);
+#endif /* ! GCC_REAL_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/reg-notes.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/reg-notes.def
new file mode 100644
index 0000000..90b5fde
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/reg-notes.def
@@ -0,0 +1,184 @@
+/* Register note definitions.
+ Copyright (C) 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* This file defines all the codes that may appear on individual
+ EXPR_LIST rtxes in the REG_NOTES chain of an insn. The codes are
+ stored in the mode field of the EXPR_LIST. Source files define
+ DEF_REG_NOTE appropriately before including this file. */
+
+/* Shorthand. */
+#define REG_NOTE(NAME) DEF_REG_NOTE (REG_##NAME)
+
+/* REG_DEP_TRUE is used in scheduler dependencies lists to represent a
+ read-after-write dependency (i.e. a true data dependency). This is
+ here, not grouped with REG_DEP_ANTI and REG_DEP_OUTPUT, because some
+ passes use a literal 0 for it. */
+REG_NOTE (DEP_TRUE)
+
+/* The value in REG dies in this insn (i.e., it is not needed past
+ this insn). If REG is set in this insn, the REG_DEAD note may,
+ but need not, be omitted. */
+REG_NOTE (DEAD)
+
+/* The REG is autoincremented or autodecremented in this insn. */
+REG_NOTE (INC)
+
+/* Describes the insn as a whole; it says that the insn sets a
+ register to a constant value or to be equivalent to a memory
+ address. If the register is spilled to the stack then the constant
+ value should be substituted for it. The contents of the REG_EQUIV
+ is the constant value or memory address, which may be different
+ from the source of the SET although it has the same value. A
+ REG_EQUIV note may also appear on an insn which copies a register
+ parameter to a pseudo-register, if there is a memory address which
+ could be used to hold that pseudo-register throughout the function. */
+REG_NOTE (EQUIV)
+
+/* Like REG_EQUIV except that the destination is only momentarily
+ equal to the specified rtx. Therefore, it cannot be used for
+ substitution; but it can be used for cse. */
+REG_NOTE (EQUAL)
+
+/* The register is always nonnegative during the containing loop.
+ This is used in branches so that decrement and branch instructions
+ terminating on zero can be matched. There must be an insn pattern
+ in the md file named `decrement_and_branch_until_zero' or else this
+ will never be added to any instructions. */
+REG_NOTE (NONNEG)
+
+/* Identifies a register set in this insn and never used. */
+REG_NOTE (UNUSED)
+
+/* REG_CC_SETTER and REG_CC_USER link a pair of insns that set and use
+ CC0, respectively. Normally, these are required to be consecutive
+ insns, but we permit putting a cc0-setting insn in the delay slot
+ of a branch as long as only one copy of the insn exists. In that
+ case, these notes point from one to the other to allow code
+ generation to determine what any require information and to
+ properly update CC_STATUS. These notes are INSN_LISTs. */
+REG_NOTE (CC_SETTER)
+REG_NOTE (CC_USER)
+
+/* Points to a CODE_LABEL. Used by JUMP_INSNs to say that the CODE_LABEL
+ contained in the REG_LABEL_TARGET note is a possible jump target of
+ this insn. This note is an INSN_LIST. */
+REG_NOTE (LABEL_TARGET)
+
+/* Points to a CODE_LABEL. Used by any insn to say that the CODE_LABEL
+ contained in the REG_LABEL_OPERAND note is used by the insn, but as an
+ operand, not as a jump target (though it may indirectly be a jump
+ target for a later jump insn). This note is an INSN_LIST. */
+REG_NOTE (LABEL_OPERAND)
+
+/* REG_DEP_OUTPUT and REG_DEP_ANTI are used in scheduler dependencies lists
+ to represent write-after-write and write-after-read dependencies
+ respectively. */
+REG_NOTE (DEP_OUTPUT)
+REG_NOTE (DEP_ANTI)
+
+/* REG_BR_PROB is attached to JUMP_INSNs and CALL_INSNs. It has an
+ integer value. For jumps, it is the probability that this is a
+ taken branch. For calls, it is the probability that this call
+ won't return. */
+REG_NOTE (BR_PROB)
+
+/* REG_VALUE_PROFILE is attached when the profile is read in to an
+ insn before that the code to profile the value is inserted. It
+ contains the results of profiling. */
+REG_NOTE (VALUE_PROFILE)
+
+/* Attached to a call insn; indicates that the call is malloc-like and
+ that the pointer returned cannot alias anything else. */
+REG_NOTE (NOALIAS)
+
+/* REG_BR_PRED is attached to JUMP_INSNs and CALL_INSNSs. It contains
+ CONCAT of two integer value. First specifies the branch predictor
+ that added the note, second specifies the predicted hitrate of
+ branch in the same format as REG_BR_PROB note uses. */
+REG_NOTE (BR_PRED)
+
+/* Attached to insns that are RTX_FRAME_RELATED_P, but are too complex
+ for DWARF to interpret what they imply. The attached rtx is used
+ instead of intuition. */
+REG_NOTE (FRAME_RELATED_EXPR)
+
+/* Attached to insns that are RTX_FRAME_RELATED_P, but are too complex
+ for FRAME_RELATED_EXPR intuition. The insn's first pattern must be
+ a SET, and the destination must be the CFA register. The attached
+ rtx is an expression that defines the CFA. In the simplest case, the
+ rtx could be just the stack_pointer_rtx; more common would be a PLUS
+ with a base register and a constant offset. In the most complicated
+ cases, this will result in a DW_CFA_def_cfa_expression with the rtx
+ expression rendered in a dwarf location expression. */
+REG_NOTE (CFA_DEF_CFA)
+
+/* Attached to insns that are RTX_FRAME_RELATED_P, but are too complex
+ for FRAME_RELATED_EXPR intuition. This note adjusts the expression
+ from which the CFA is computed. The attached rtx defines a new CFA
+ expression, relative to the old CFA expression. This rtx must be of
+ the form (SET new-cfa-reg (PLUS old-cfa-reg const_int)). If the note
+ rtx is NULL, we use the first SET of the insn. */
+REG_NOTE (CFA_ADJUST_CFA)
+
+/* Similar to FRAME_RELATED_EXPR, with the additional information that
+ this is a save to memory, i.e. will result in DW_CFA_offset or the
+ like. The pattern or the insn should be a simple store relative to
+ the CFA. */
+REG_NOTE (CFA_OFFSET)
+
+/* Similar to FRAME_RELATED_EXPR, with the additional information that this
+ is a save to a register, i.e. will result in DW_CFA_register. The insn
+ or the pattern should be simple reg-reg move. */
+REG_NOTE (CFA_REGISTER)
+
+/* Attached to insns that are RTX_FRAME_RELATED_P, with the information
+ that this is a restore operation, i.e. will result in DW_CFA_restore
+ or the like. Either the attached rtx, or the destination of the insn's
+ first pattern is the register to be restored. */
+REG_NOTE (CFA_RESTORE)
+
+/* Indicates that REG holds the exception context for the function.
+ This context is shared by inline functions, so the code to acquire
+ the real exception context is delayed until after inlining. */
+REG_NOTE (EH_CONTEXT)
+
+/* Indicates what exception region an INSN belongs in. This is used
+ to indicate what region to which a call may throw. REGION 0
+ indicates that a call cannot throw at all. REGION -1 indicates
+ that it cannot throw, nor will it execute a non-local goto. */
+REG_NOTE (EH_REGION)
+
+/* Used by haifa-sched to save NOTE_INSN notes across scheduling. */
+REG_NOTE (SAVE_NOTE)
+
+/* Indicates that a call does not return. */
+REG_NOTE (NORETURN)
+
+/* Indicates that an indirect jump is a non-local goto instead of a
+ computed goto. */
+REG_NOTE (NON_LOCAL_GOTO)
+
+/* Indicates that a jump crosses between hot and cold sections in a
+ (partitioned) assembly or .o file, and therefore should not be
+ reduced to a simpler jump by optimizations. */
+REG_NOTE (CROSSING_JUMP)
+
+/* This kind of note is generated at each to `setjmp', and similar
+ functions that can return twice. */
+REG_NOTE (SETJMP)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.def
new file mode 100644
index 0000000..febe773
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.def
@@ -0,0 +1,1260 @@
+/* This file contains the definitions and documentation for the
+ Register Transfer Expressions (rtx's) that make up the
+ Register Transfer Language (rtl) used in the Back End of the GNU compiler.
+ Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
+ 2005, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* Expression definitions and descriptions for all targets are in this file.
+ Some will not be used for some targets.
+
+ The fields in the cpp macro call "DEF_RTL_EXPR()"
+ are used to create declarations in the C source of the compiler.
+
+ The fields are:
+
+ 1. The internal name of the rtx used in the C source.
+ It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
+ By convention these are in UPPER_CASE.
+
+ 2. The name of the rtx in the external ASCII format read by
+ read_rtx(), and printed by print_rtx().
+ These names are stored in rtx_name[].
+ By convention these are the internal (field 1) names in lower_case.
+
+ 3. The print format, and type of each rtx->u.fld[] (field) in this rtx.
+ These formats are stored in rtx_format[].
+ The meaning of the formats is documented in front of this array in rtl.c
+
+ 4. The class of the rtx. These are stored in rtx_class and are accessed
+ via the GET_RTX_CLASS macro. They are defined as follows:
+
+ RTX_CONST_OBJ
+ an rtx code that can be used to represent a constant object
+ (e.g, CONST_INT)
+ RTX_OBJ
+ an rtx code that can be used to represent an object (e.g, REG, MEM)
+ RTX_COMPARE
+ an rtx code for a comparison (e.g, LT, GT)
+ RTX_COMM_COMPARE
+ an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED)
+ RTX_UNARY
+ an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
+ RTX_COMM_ARITH
+ an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
+ RTX_TERNARY
+ an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
+ RTX_BIN_ARITH
+ an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
+ RTX_BITFIELD_OPS
+ an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
+ RTX_INSN
+ an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
+ RTX_MATCH
+ an rtx code for something that matches in insns (e.g, MATCH_DUP)
+ RTX_AUTOINC
+ an rtx code for autoincrement addressing modes (e.g. POST_DEC)
+ RTX_EXTRA
+ everything else
+
+ All of the expressions that appear only in machine descriptions,
+ not in RTL used by the compiler itself, are at the end of the file. */
+
+/* Unknown, or no such operation; the enumeration constant should have
+ value zero. */
+DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
+
+/* ---------------------------------------------------------------------
+ Expressions used in constructing lists.
+ --------------------------------------------------------------------- */
+
+/* a linked list of expressions */
+DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
+
+/* a linked list of instructions.
+ The insns are represented in print by their uids. */
+DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
+
+/* SEQUENCE appears in the result of a `gen_...' function
+ for a DEFINE_EXPAND that wants to make several insns.
+ Its elements are the bodies of the insns that should be made.
+ `emit_insn' takes the SEQUENCE apart and makes separate insns. */
+DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
+
+/* Refers to the address of its argument. This is only used in alias.c. */
+DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
+
+/* ----------------------------------------------------------------------
+ Expression types used for things in the instruction chain.
+
+ All formats must start with "iuu" to handle the chain.
+ Each insn expression holds an rtl instruction and its semantics
+ during back-end processing.
+ See macros's in "rtl.h" for the meaning of each rtx->u.fld[].
+
+ ---------------------------------------------------------------------- */
+
+/* An annotation for variable assignment tracking. */
+DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "iuuBieie", RTX_INSN)
+
+/* An instruction that cannot jump. */
+DEF_RTL_EXPR(INSN, "insn", "iuuBieie", RTX_INSN)
+
+/* An instruction that can possibly jump.
+ Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
+DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieie0", RTX_INSN)
+
+/* An instruction that can possibly call a subroutine
+ but which will not change which instruction comes next
+ in the current function.
+ Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE.
+ All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
+DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieiee", RTX_INSN)
+
+/* A marker that indicates that control will not flow through. */
+DEF_RTL_EXPR(BARRIER, "barrier", "iuu00000", RTX_EXTRA)
+
+/* Holds a label that is followed by instructions.
+ Operand:
+ 4: is used in jump.c for the use-count of the label.
+ 5: is used in the sh backend.
+ 6: is a number that is unique in the entire compilation.
+ 7: is the user-given name of the label, if any. */
+DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
+
+/* Say where in the code a source line starts, for symbol table's sake.
+ Operand:
+ 4: note-specific data
+ 5: enum insn_note
+ 6: unique number if insn_note == note_insn_deleted_label. */
+DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
+
+/* ----------------------------------------------------------------------
+ Top level constituents of INSN, JUMP_INSN and CALL_INSN.
+ ---------------------------------------------------------------------- */
+
+/* Conditionally execute code.
+ Operand 0 is the condition that if true, the code is executed.
+ Operand 1 is the code to be executed (typically a SET).
+
+ Semantics are that there are no side effects if the condition
+ is false. This pattern is created automatically by the if_convert
+ pass run after reload or by target-specific splitters. */
+DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA)
+
+/* Several operations to be done in parallel (perhaps under COND_EXEC). */
+DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA)
+
+/* A string that is passed through to the assembler as input.
+ One can obviously pass comments through by using the
+ assembler comment syntax.
+ These occur in an insn all by themselves as the PATTERN.
+ They also appear inside an ASM_OPERANDS
+ as a convenient way to hold a string. */
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA)
+
+/* An assembler instruction with operands.
+ 1st operand is the instruction template.
+ 2nd operand is the constraint for the output.
+ 3rd operand is the number of the output this expression refers to.
+ When an insn stores more than one value, a separate ASM_OPERANDS
+ is made for each output; this integer distinguishes them.
+ 4th is a vector of values of input operands.
+ 5th is a vector of modes and constraints for the input operands.
+ Each element is an ASM_INPUT containing a constraint string
+ and whose mode indicates the mode of the input operand.
+ 6th is the source line number. */
+DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEi", RTX_EXTRA)
+
+/* A machine-specific operation.
+ 1st operand is a vector of operands being used by the operation so that
+ any needed reloads can be done.
+ 2nd operand is a unique value saying which of a number of machine-specific
+ operations is to be performed.
+ (Note that the vector must be the first operand because of the way that
+ genrecog.c record positions within an insn.)
+
+ UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL,
+ or inside an expression.
+ UNSPEC by itself or as a component of a PARALLEL
+ is currently considered not deletable.
+
+ FIXME: Replace all uses of UNSPEC that appears by itself or as a component
+ of a PARALLEL with USE.
+ */
+DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
+
+/* Similar, but a volatile operation and one which may trap. */
+DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
+
+/* Vector of addresses, stored as full words. */
+/* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
+DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
+
+/* Vector of address differences X0 - BASE, X1 - BASE, ...
+ First operand is BASE; the vector contains the X's.
+ The machine mode of this rtx says how much space to leave
+ for each difference and is adjusted by branch shortening if
+ CASE_VECTOR_SHORTEN_MODE is defined.
+ The third and fourth operands store the target labels with the
+ minimum and maximum addresses respectively.
+ The fifth operand stores flags for use by branch shortening.
+ Set at the start of shorten_branches:
+ min_align: the minimum alignment for any of the target labels.
+ base_after_vec: true iff BASE is after the ADDR_DIFF_VEC.
+ min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC.
+ max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC.
+ min_after_base: true iff minimum address target label is after BASE.
+ max_after_base: true iff maximum address target label is after BASE.
+ Set by the actual branch shortening process:
+ offset_unsigned: true iff offsets have to be treated as unsigned.
+ scale: scaling that is necessary to make offsets fit into the mode.
+
+ The third, fourth and fifth operands are only valid when
+ CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
+ compilations. */
+
+DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
+
+/* Memory prefetch, with attributes supported on some targets.
+ Operand 1 is the address of the memory to fetch.
+ Operand 2 is 1 for a write access, 0 otherwise.
+ Operand 3 is the level of temporal locality; 0 means there is no
+ temporal locality and 1, 2, and 3 are for increasing levels of temporal
+ locality.
+
+ The attributes specified by operands 2 and 3 are ignored for targets
+ whose prefetch instructions do not support them. */
+DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA)
+
+/* ----------------------------------------------------------------------
+ At the top level of an instruction (perhaps under PARALLEL).
+ ---------------------------------------------------------------------- */
+
+/* Assignment.
+ Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
+ Operand 2 is the value stored there.
+ ALL assignment must use SET.
+ Instructions that do multiple assignments must use multiple SET,
+ under PARALLEL. */
+DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA)
+
+/* Indicate something is used in a way that we don't want to explain.
+ For example, subroutine calls will use the register
+ in which the static chain is passed.
+
+ USE can not appear as an operand of other rtx except for PARALLEL.
+ USE is not deletable, as it indicates that the operand
+ is used in some unknown way. */
+DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
+
+/* Indicate something is clobbered in a way that we don't want to explain.
+ For example, subroutine calls will clobber some physical registers
+ (the ones that are by convention not saved).
+
+ CLOBBER can not appear as an operand of other rtx except for PARALLEL.
+ CLOBBER of a hard register appearing by itself (not within PARALLEL)
+ is considered undeletable before reload. */
+DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
+
+/* Call a subroutine.
+ Operand 1 is the address to call.
+ Operand 2 is the number of arguments. */
+
+DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA)
+
+/* Return from a subroutine. */
+
+DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+
+/* Special for EH return from subroutine. */
+
+DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
+
+/* Conditional trap.
+ Operand 1 is the condition.
+ Operand 2 is the trap code.
+ For an unconditional trap, make the condition (const_int 1). */
+DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
+
+/* Placeholder for _Unwind_Resume before we know if a function call
+ or a branch is needed. Operand 1 is the exception region from
+ which control is flowing. */
+DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
+
+/* ----------------------------------------------------------------------
+ Primitive values for use in expressions.
+ ---------------------------------------------------------------------- */
+
+/* numeric integer constant */
+DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
+
+/* fixed-point constant */
+DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
+
+/* numeric floating point constant.
+ Operands hold the value. They are all 'w' and there may be from 2 to 6;
+ see real.h. */
+DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
+
+/* Describes a vector constant. */
+DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_CONST_OBJ)
+
+/* String constant. Used for attributes in machine descriptions and
+ for special cases in DWARF2 debug output. NOT used for source-
+ language string constants. */
+DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ)
+
+/* This is used to encapsulate an expression whose value is constant
+ (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
+ recognized as a constant operand rather than by arithmetic instructions. */
+
+DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ)
+
+/* program counter. Ordinary jumps are represented
+ by a SET whose first operand is (PC). */
+DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
+
+/* Used in the cselib routines to describe a value. Objects of this
+ kind are only allocated in cselib.c, in an alloc pool instead of
+ in GC memory. The only operand of a VALUE is a cselib_val_struct. */
+DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
+
+/* A register. The "operand" is the register number, accessed with
+ the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
+ than a hardware register is being referred to. The second operand
+ holds the original register number - this will be different for a
+ pseudo register that got turned into a hard register. The third
+ operand points to a reg_attrs structure.
+ This rtx needs to have as many (or more) fields as a MEM, since we
+ can change REG rtx's into MEMs during reload. */
+DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
+
+/* A scratch register. This represents a register used only within a
+ single insn. It will be turned into a REG during register allocation
+ or reload unless the constraint indicates that the register won't be
+ needed, in which case it can remain a SCRATCH. This code is
+ marked as having one operand so it can be turned into a REG. */
+DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
+
+/* A reference to a part of another value. The first operand is the
+ complete value and the second is the byte offset of the selected part. */
+DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
+
+/* This one-argument rtx is used for move instructions
+ that are guaranteed to alter only the low part of a destination.
+ Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
+ has an unspecified effect on the high part of REG,
+ but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
+ is guaranteed to alter only the bits of REG that are in HImode.
+
+ The actual instruction used is probably the same in both cases,
+ but the register constraints may be tighter when STRICT_LOW_PART
+ is in use. */
+
+DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA)
+
+/* (CONCAT a b) represents the virtual concatenation of a and b
+ to make a value that has as many bits as a and b put together.
+ This is used for complex values. Normally it appears only
+ in DECL_RTLs and during RTL generation, but not in the insn chain. */
+DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ)
+
+/* (CONCATN [a1 a2 ... an]) represents the virtual concatenation of
+ all An to make a value. This is an extension of CONCAT to larger
+ number of components. Like CONCAT, it should not appear in the
+ insn chain. Every element of the CONCATN is the same size. */
+DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ)
+
+/* A memory location; operand is the address. The second operand is the
+ alias set to which this MEM belongs. We use `0' instead of `w' for this
+ field so that the field need not be specified in machine descriptions. */
+DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
+
+/* Reference to an assembler label in the code for this function.
+ The operand is a CODE_LABEL found in the insn chain. */
+DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
+
+/* Reference to a named label:
+ Operand 0: label name
+ Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
+ Operand 2: tree from which this symbol is derived, or null.
+ This is either a DECL node, or some kind of constant. */
+DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
+
+/* The condition code register is represented, in our imagination,
+ as a register holding a value that can be compared to zero.
+ In fact, the machine has already compared them and recorded the
+ results; but instructions that look at the condition code
+ pretend to be looking at the entire value and comparing it. */
+DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
+
+/* ----------------------------------------------------------------------
+ Expressions for operators in an rtl pattern
+ ---------------------------------------------------------------------- */
+
+/* if_then_else. This is used in representing ordinary
+ conditional jump instructions.
+ Operand:
+ 0: condition
+ 1: then expr
+ 2: else expr */
+DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY)
+
+/* Comparison, produces a condition code result. */
+DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH)
+
+/* plus */
+DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH)
+
+/* Operand 0 minus operand 1. */
+DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH)
+
+/* Minus operand 0. */
+DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY)
+
+DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH)
+
+/* Multiplication with signed saturation */
+DEF_RTL_EXPR(SS_MULT, "ss_mult", "ee", RTX_COMM_ARITH)
+/* Multiplication with unsigned saturation */
+DEF_RTL_EXPR(US_MULT, "us_mult", "ee", RTX_COMM_ARITH)
+
+/* Operand 0 divided by operand 1. */
+DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH)
+/* Division with signed saturation */
+DEF_RTL_EXPR(SS_DIV, "ss_div", "ee", RTX_BIN_ARITH)
+/* Division with unsigned saturation */
+DEF_RTL_EXPR(US_DIV, "us_div", "ee", RTX_BIN_ARITH)
+
+/* Remainder of operand 0 divided by operand 1. */
+DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH)
+
+/* Unsigned divide and remainder. */
+DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH)
+DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH)
+
+/* Bitwise operations. */
+DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY)
+
+/* Operand:
+ 0: value to be shifted.
+ 1: number of bits. */
+DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */
+DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */
+DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */
+DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */
+DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */
+
+/* Minimum and maximum values of two operands. We need both signed and
+ unsigned forms. (We cannot use MIN for SMIN because it conflicts
+ with a macro of the same name.) The signed variants should be used
+ with floating point. Further, if both operands are zeros, or if either
+ operand is NaN, then it is unspecified which of the two operands is
+ returned as the result. */
+
+DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH)
+
+/* These unary operations are used to represent incrementation
+ and decrementation as they occur in memory addresses.
+ The amount of increment or decrement are not represented
+ because they can be understood from the machine-mode of the
+ containing MEM. These operations exist in only two cases:
+ 1. pushes onto the stack.
+ 2. created automatically by the life_analysis pass in flow.c. */
+DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC)
+
+/* These binary operations are used to represent generic address
+ side-effects in memory addresses, except for simple incrementation
+ or decrementation which use the above operations. They are
+ created automatically by the life_analysis pass in flow.c.
+ The first operand is a REG which is used as the address.
+ The second operand is an expression that is assigned to the
+ register, either before (PRE_MODIFY) or after (POST_MODIFY)
+ evaluating the address.
+ Currently, the compiler can only handle second operands of the
+ form (plus (reg) (reg)) and (plus (reg) (const_int)), where
+ the first operand of the PLUS has to be the same register as
+ the first operand of the *_MODIFY. */
+DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC)
+
+/* Comparison operations. The ordered comparisons exist in two
+ flavors, signed and unsigned. */
+DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE)
+
+/* Additional floating point unordered comparison flavors. */
+DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE)
+
+/* These are equivalent to unordered or ... */
+DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE)
+
+/* This is an ordered NE, ie !UNEQ, ie false for NaN. */
+DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE)
+
+/* Represents the result of sign-extending the sole operand.
+ The machine modes of the operand and of the SIGN_EXTEND expression
+ determine how much sign-extension is going on. */
+DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY)
+
+/* Similar for zero-extension (such as unsigned short to int). */
+DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY)
+
+/* Similar but here the operand has a wider mode. */
+DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY)
+
+/* Similar for extending floating-point values (such as SFmode to DFmode). */
+DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY)
+DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY)
+
+/* Conversion of fixed point operand to floating point value. */
+DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY)
+
+/* With fixed-point machine mode:
+ Conversion of floating point operand to fixed point value.
+ Value is defined only when the operand's value is an integer.
+ With floating-point machine mode (and operand with same mode):
+ Operand is rounded toward zero to produce an integer value
+ represented in floating point. */
+DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY)
+
+/* Conversion of unsigned fixed point operand to floating point value. */
+DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY)
+
+/* With fixed-point machine mode:
+ Conversion of floating point operand to *unsigned* fixed point value.
+ Value is defined only when the operand's value is an integer. */
+DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types without saturation,
+ including:
+ fractional to fractional (of different precision),
+ signed integer to fractional,
+ fractional to signed integer,
+ floating point to fractional,
+ fractional to floating point.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(FRACT_CONVERT, "fract_convert", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types and unsigned integer
+ without saturation, including:
+ unsigned integer to fractional,
+ fractional to unsigned integer.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(UNSIGNED_FRACT_CONVERT, "unsigned_fract_convert", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types with saturation,
+ including:
+ fractional to fractional (of different precision),
+ signed integer to fractional,
+ floating point to fractional.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(SAT_FRACT, "sat_fract", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types and unsigned integer
+ with saturation, including:
+ unsigned integer to fractional.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(UNSIGNED_SAT_FRACT, "unsigned_sat_fract", "e", RTX_UNARY)
+
+/* Absolute value */
+DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY)
+
+/* Square root */
+DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY)
+
+/* Swap bytes. */
+DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY)
+
+/* Find first bit that is set.
+ Value is 1 + number of trailing zeros in the arg.,
+ or 0 if arg is 0. */
+DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
+
+/* Count leading zeros. */
+DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
+
+/* Count trailing zeros. */
+DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY)
+
+/* Population count (number of 1 bits). */
+DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY)
+
+/* Population parity (number of 1 bits modulo 2). */
+DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY)
+
+/* Reference to a signed bit-field of specified size and position.
+ Operand 0 is the memory unit (usually SImode or QImode) which
+ contains the field's first bit. Operand 1 is the width, in bits.
+ Operand 2 is the number of bits in the memory unit before the
+ first bit of this field.
+ If BITS_BIG_ENDIAN is defined, the first bit is the msb and
+ operand 2 counts from the msb of the memory unit.
+ Otherwise, the first bit is the lsb and operand 2 counts from
+ the lsb of the memory unit.
+ This kind of expression can not appear as an lvalue in RTL. */
+DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS)
+
+/* Similar for unsigned bit-field.
+ But note! This kind of expression _can_ appear as an lvalue. */
+DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS)
+
+/* For RISC machines. These save memory when splitting insns. */
+
+/* HIGH are the high-order bits of a constant expression. */
+DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ)
+
+/* LO_SUM is the sum of a register and the low-order bits
+ of a constant expression. */
+DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ)
+
+/* Describes a merge operation between two vector values.
+ Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask
+ that specifies where the parts of the result are taken from. Set bits
+ indicate operand 0, clear bits indicate operand 1. The parts are defined
+ by the mode of the vectors. */
+DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY)
+
+/* Describes an operation that selects parts of a vector.
+ Operands 0 is the source vector, operand 1 is a PARALLEL that contains
+ a CONST_INT for each of the subparts of the result vector, giving the
+ number of the source subpart that should be stored into it. */
+DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH)
+
+/* Describes a vector concat operation. Operands 0 and 1 are the source
+ vectors, the result is a vector that is as long as operands 0 and 1
+ combined and is the concatenation of the two source vectors. */
+DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH)
+
+/* Describes an operation that converts a small vector into a larger one by
+ duplicating the input values. The output vector mode must have the same
+ submodes as the input vector mode, and the number of output parts must be
+ an integer multiple of the number of input parts. */
+DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
+
+/* Addition with signed saturation */
+DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
+
+/* Addition with unsigned saturation */
+DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
+
+/* Operand 0 minus operand 1, with signed saturation. */
+DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
+
+/* Negation with signed saturation. */
+DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY)
+/* Negation with unsigned saturation. */
+DEF_RTL_EXPR(US_NEG, "us_neg", "e", RTX_UNARY)
+
+/* Absolute value with signed saturation. */
+DEF_RTL_EXPR(SS_ABS, "ss_abs", "e", RTX_UNARY)
+
+/* Shift left with signed saturation. */
+DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH)
+
+/* Shift left with unsigned saturation. */
+DEF_RTL_EXPR(US_ASHIFT, "us_ashift", "ee", RTX_BIN_ARITH)
+
+/* Operand 0 minus operand 1, with unsigned saturation. */
+DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
+
+/* Signed saturating truncate. */
+DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY)
+
+/* Unsigned saturating truncate. */
+DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY)
+
+/* Information about the variable and its location. */
+/* Changed 'te' to 'tei'; the 'i' field is for recording
+ initialization status of variables. */
+DEF_RTL_EXPR(VAR_LOCATION, "var_location", "tei", RTX_EXTRA)
+
+/* All expressions from this point forward appear only in machine
+ descriptions. */
+#ifdef GENERATOR_FILE
+
+/* Include a secondary machine-description file at this point. */
+DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA)
+
+/* Pattern-matching operators: */
+
+/* Use the function named by the second arg (the string)
+ as a predicate; if matched, store the structure that was matched
+ in the operand table at index specified by the first arg (the integer).
+ If the second arg is the null string, the structure is just stored.
+
+ A third string argument indicates to the register allocator restrictions
+ on where the operand can be allocated.
+
+ If the target needs no restriction on any instruction this field should
+ be the null string.
+
+ The string is prepended by:
+ '=' to indicate the operand is only written to.
+ '+' to indicate the operand is both read and written to.
+
+ Each character in the string represents an allocable class for an operand.
+ 'g' indicates the operand can be any valid class.
+ 'i' indicates the operand can be immediate (in the instruction) data.
+ 'r' indicates the operand can be in a register.
+ 'm' indicates the operand can be in memory.
+ 'o' a subset of the 'm' class. Those memory addressing modes that
+ can be offset at compile time (have a constant added to them).
+
+ Other characters indicate target dependent operand classes and
+ are described in each target's machine description.
+
+ For instructions with more than one operand, sets of classes can be
+ separated by a comma to indicate the appropriate multi-operand constraints.
+ There must be a 1 to 1 correspondence between these sets of classes in
+ all operands for an instruction.
+ */
+DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH)
+
+/* Match a SCRATCH or a register. When used to generate rtl, a
+ SCRATCH is generated. As for MATCH_OPERAND, the mode specifies
+ the desired mode and the first argument is the operand number.
+ The second argument is the constraint. */
+DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH)
+
+/* Apply a predicate, AND match recursively the operands of the rtx.
+ Operand 0 is the operand-number, as in match_operand.
+ Operand 1 is a predicate to apply (as a string, a function name).
+ Operand 2 is a vector of expressions, each of which must match
+ one subexpression of the rtx this construct is matching. */
+DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH)
+
+/* Match a PARALLEL of arbitrary length. The predicate is applied
+ to the PARALLEL and the initial expressions in the PARALLEL are matched.
+ Operand 0 is the operand-number, as in match_operand.
+ Operand 1 is a predicate to apply to the PARALLEL.
+ Operand 2 is a vector of expressions, each of which must match the
+ corresponding element in the PARALLEL. */
+DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
+
+/* Match only something equal to what is stored in the operand table
+ at the index specified by the argument. Use with MATCH_OPERAND. */
+DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH)
+
+/* Match only something equal to what is stored in the operand table
+ at the index specified by the argument. Use with MATCH_OPERATOR. */
+DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH)
+
+/* Match only something equal to what is stored in the operand table
+ at the index specified by the argument. Use with MATCH_PARALLEL. */
+DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH)
+
+/* Appears only in define_predicate/define_special_predicate
+ expressions. Evaluates true only if the operand has an RTX code
+ from the set given by the argument (a comma-separated list). If the
+ second argument is present and nonempty, it is a sequence of digits
+ and/or letters which indicates the subexpression to test, using the
+ same syntax as genextract/genrecog's location strings: 0-9 for
+ XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to
+ the result of the one before it. */
+DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
+
+/* Appears only in define_predicate/define_special_predicate
+ expressions. The argument is a C expression to be injected at this
+ point in the predicate formula. */
+DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH)
+
+/* Insn (and related) definitions. */
+
+/* Definition of the pattern for one kind of instruction.
+ Operand:
+ 0: names this instruction.
+ If the name is the null string, the instruction is in the
+ machine description just to be recognized, and will never be emitted by
+ the tree to rtl expander.
+ 1: is the pattern.
+ 2: is a string which is a C expression
+ giving an additional condition for recognizing this pattern.
+ A null string means no extra condition.
+ 3: is the action to execute if this pattern is matched.
+ If this assembler code template starts with a * then it is a fragment of
+ C code to run to decide on a template to use. Otherwise, it is the
+ template to use.
+ 4: optionally, a vector of attributes for this insn.
+ */
+DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA)
+
+/* Definition of a peephole optimization.
+ 1st operand: vector of insn patterns to match
+ 2nd operand: C expression that must be true
+ 3rd operand: template or C code to produce assembler output.
+ 4: optionally, a vector of attributes for this insn.
+
+ This form is deprecated; use define_peephole2 instead. */
+DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA)
+
+/* Definition of a split operation.
+ 1st operand: insn pattern to match
+ 2nd operand: C expression that must be true
+ 3rd operand: vector of insn patterns to place into a SEQUENCE
+ 4th operand: optionally, some C code to execute before generating the
+ insns. This might, for example, create some RTX's and store them in
+ elements of `recog_data.operand' for use by the vector of
+ insn-patterns.
+ (`operands' is an alias here for `recog_data.operand'). */
+DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA)
+
+/* Definition of an insn and associated split.
+ This is the concatenation, with a few modifications, of a define_insn
+ and a define_split which share the same pattern.
+ Operand:
+ 0: names this instruction.
+ If the name is the null string, the instruction is in the
+ machine description just to be recognized, and will never be emitted by
+ the tree to rtl expander.
+ 1: is the pattern.
+ 2: is a string which is a C expression
+ giving an additional condition for recognizing this pattern.
+ A null string means no extra condition.
+ 3: is the action to execute if this pattern is matched.
+ If this assembler code template starts with a * then it is a fragment of
+ C code to run to decide on a template to use. Otherwise, it is the
+ template to use.
+ 4: C expression that must be true for split. This may start with "&&"
+ in which case the split condition is the logical and of the insn
+ condition and what follows the "&&" of this operand.
+ 5: vector of insn patterns to place into a SEQUENCE
+ 6: optionally, some C code to execute before generating the
+ insns. This might, for example, create some RTX's and store them in
+ elements of `recog_data.operand' for use by the vector of
+ insn-patterns.
+ (`operands' is an alias here for `recog_data.operand').
+ 7: optionally, a vector of attributes for this insn. */
+DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
+
+/* Definition of an RTL peephole operation.
+ Follows the same arguments as define_split. */
+DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA)
+
+/* Define how to generate multiple insns for a standard insn name.
+ 1st operand: the insn name.
+ 2nd operand: vector of insn-patterns.
+ Use match_operand to substitute an element of `recog_data.operand'.
+ 3rd operand: C expression that must be true for this to be available.
+ This may not test any operands.
+ 4th operand: Extra C code to execute before generating the insns.
+ This might, for example, create some RTX's and store them in
+ elements of `recog_data.operand' for use by the vector of
+ insn-patterns.
+ (`operands' is an alias here for `recog_data.operand'). */
+DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
+
+/* Define a requirement for delay slots.
+ 1st operand: Condition involving insn attributes that, if true,
+ indicates that the insn requires the number of delay slots
+ shown.
+ 2nd operand: Vector whose length is the three times the number of delay
+ slots required.
+ Each entry gives three conditions, each involving attributes.
+ The first must be true for an insn to occupy that delay slot
+ location. The second is true for all insns that can be
+ annulled if the branch is true and the third is true for all
+ insns that can be annulled if the branch is false.
+
+ Multiple DEFINE_DELAYs may be present. They indicate differing
+ requirements for delay slots. */
+DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
+
+/* Define attribute computation for `asm' instructions. */
+DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA)
+
+/* Definition of a conditional execution meta operation. Automatically
+ generates new instances of DEFINE_INSN, selected by having attribute
+ "predicable" true. The new pattern will contain a COND_EXEC and the
+ predicate at top-level.
+
+ Operand:
+ 0: The predicate pattern. The top-level form should match a
+ relational operator. Operands should have only one alternative.
+ 1: A C expression giving an additional condition for recognizing
+ the generated pattern.
+ 2: A template or C code to produce assembler output. */
+DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
+
+/* Definition of an operand predicate. The difference between
+ DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will
+ not warn about a match_operand with no mode if it has a predicate
+ defined with DEFINE_SPECIAL_PREDICATE.
+
+ Operand:
+ 0: The name of the predicate.
+ 1: A boolean expression which computes whether or not the predicate
+ matches. This expression can use IOR, AND, NOT, MATCH_OPERAND,
+ MATCH_CODE, and MATCH_TEST. It must be specific enough that genrecog
+ can calculate the set of RTX codes that can possibly match.
+ 2: A C function body which must return true for the predicate to match.
+ Optional. Use this when the test is too complicated to fit into a
+ match_test expression. */
+DEF_RTL_EXPR(DEFINE_PREDICATE, "define_predicate", "ses", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_SPECIAL_PREDICATE, "define_special_predicate", "ses", RTX_EXTRA)
+
+/* Definition of a register operand constraint. This simply maps the
+ constraint string to a register class.
+
+ Operand:
+ 0: The name of the constraint (often, but not always, a single letter).
+ 1: A C expression which evaluates to the appropriate register class for
+ this constraint. If this is not just a constant, it should look only
+ at -m switches and the like.
+ 2: A docstring for this constraint, in Texinfo syntax; not currently
+ used, in future will be incorporated into the manual's list of
+ machine-specific operand constraints. */
+DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA)
+
+/* Definition of a non-register operand constraint. These look at the
+ operand and decide whether it fits the constraint.
+
+ DEFINE_CONSTRAINT gets no special treatment if it fails to match.
+ It is appropriate for constant-only constraints, and most others.
+
+ DEFINE_MEMORY_CONSTRAINT tells reload that this constraint can be made
+ to match, if it doesn't already, by converting the operand to the form
+ (mem (reg X)) where X is a base register. It is suitable for constraints
+ that describe a subset of all memory references.
+
+ DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made
+ to match, if it doesn't already, by converting the operand to the form
+ (reg X) where X is a base register. It is suitable for constraints that
+ describe a subset of all address references.
+
+ When in doubt, use plain DEFINE_CONSTRAINT.
+
+ Operand:
+ 0: The name of the constraint (often, but not always, a single letter).
+ 1: A docstring for this constraint, in Texinfo syntax; not currently
+ used, in future will be incorporated into the manual's list of
+ machine-specific operand constraints.
+ 2: A boolean expression which computes whether or not the constraint
+ matches. It should follow the same rules as a define_predicate
+ expression, including the bit about specifying the set of RTX codes
+ that could possibly match. MATCH_TEST subexpressions may make use of
+ these variables:
+ `op' - the RTL object defining the operand.
+ `mode' - the mode of `op'.
+ `ival' - INTVAL(op), if op is a CONST_INT.
+ `hval' - CONST_DOUBLE_HIGH(op), if op is an integer CONST_DOUBLE.
+ `lval' - CONST_DOUBLE_LOW(op), if op is an integer CONST_DOUBLE.
+ `rval' - CONST_DOUBLE_REAL_VALUE(op), if op is a floating-point
+ CONST_DOUBLE.
+ Do not use ival/hval/lval/rval if op is not the appropriate kind of
+ RTL object. */
+DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
+
+
+/* Constructions for CPU pipeline description described by NDFAs. */
+
+/* (define_cpu_unit string [string]) describes cpu functional
+ units (separated by comma).
+
+ 1st operand: Names of cpu functional units.
+ 2nd operand: Name of automaton (see comments for DEFINE_AUTOMATON).
+
+ All define_reservations, define_cpu_units, and
+ define_query_cpu_units should have unique names which may not be
+ "nothing". */
+DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA)
+
+/* (define_query_cpu_unit string [string]) describes cpu functional
+ units analogously to define_cpu_unit. The reservation of such
+ units can be queried for automaton state. */
+DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA)
+
+/* (exclusion_set string string) means that each CPU functional unit
+ in the first string can not be reserved simultaneously with any
+ unit whose name is in the second string and vise versa. CPU units
+ in the string are separated by commas. For example, it is useful
+ for description CPU with fully pipelined floating point functional
+ unit which can execute simultaneously only single floating point
+ insns or only double floating point insns. All CPU functional
+ units in a set should belong to the same automaton. */
+DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA)
+
+/* (presence_set string string) means that each CPU functional unit in
+ the first string can not be reserved unless at least one of pattern
+ of units whose names are in the second string is reserved. This is
+ an asymmetric relation. CPU units or unit patterns in the strings
+ are separated by commas. Pattern is one unit name or unit names
+ separated by white-spaces.
+
+ For example, it is useful for description that slot1 is reserved
+ after slot0 reservation for a VLIW processor. We could describe it
+ by the following construction
+
+ (presence_set "slot1" "slot0")
+
+ Or slot1 is reserved only after slot0 and unit b0 reservation. In
+ this case we could write
+
+ (presence_set "slot1" "slot0 b0")
+
+ All CPU functional units in a set should belong to the same
+ automaton. */
+DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA)
+
+/* (final_presence_set string string) is analogous to `presence_set'.
+ The difference between them is when checking is done. When an
+ instruction is issued in given automaton state reflecting all
+ current and planned unit reservations, the automaton state is
+ changed. The first state is a source state, the second one is a
+ result state. Checking for `presence_set' is done on the source
+ state reservation, checking for `final_presence_set' is done on the
+ result reservation. This construction is useful to describe a
+ reservation which is actually two subsequent reservations. For
+ example, if we use
+
+ (presence_set "slot1" "slot0")
+
+ the following insn will be never issued (because slot1 requires
+ slot0 which is absent in the source state).
+
+ (define_reservation "insn_and_nop" "slot0 + slot1")
+
+ but it can be issued if we use analogous `final_presence_set'. */
+DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA)
+
+/* (absence_set string string) means that each CPU functional unit in
+ the first string can be reserved only if each pattern of units
+ whose names are in the second string is not reserved. This is an
+ asymmetric relation (actually exclusion set is analogous to this
+ one but it is symmetric). CPU units or unit patterns in the string
+ are separated by commas. Pattern is one unit name or unit names
+ separated by white-spaces.
+
+ For example, it is useful for description that slot0 can not be
+ reserved after slot1 or slot2 reservation for a VLIW processor. We
+ could describe it by the following construction
+
+ (absence_set "slot2" "slot0, slot1")
+
+ Or slot2 can not be reserved if slot0 and unit b0 are reserved or
+ slot1 and unit b1 are reserved . In this case we could write
+
+ (absence_set "slot2" "slot0 b0, slot1 b1")
+
+ All CPU functional units in a set should to belong the same
+ automaton. */
+DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA)
+
+/* (final_absence_set string string) is analogous to `absence_set' but
+ checking is done on the result (state) reservation. See comments
+ for `final_presence_set'. */
+DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA)
+
+/* (define_bypass number out_insn_names in_insn_names) names bypass
+ with given latency (the first number) from insns given by the first
+ string (see define_insn_reservation) into insns given by the second
+ string. Insn names in the strings are separated by commas. The
+ third operand is optional name of function which is additional
+ guard for the bypass. The function will get the two insns as
+ parameters. If the function returns zero the bypass will be
+ ignored for this case. Additional guard is necessary to recognize
+ complicated bypasses, e.g. when consumer is load address. If there
+ are more one bypass with the same output and input insns, the
+ chosen bypass is the first bypass with a guard in description whose
+ guard function returns nonzero. If there is no such bypass, then
+ bypass without the guard function is chosen. */
+DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
+
+/* (define_automaton string) describes names of automata generated and
+ used for pipeline hazards recognition. The names are separated by
+ comma. Actually it is possibly to generate the single automaton
+ but unfortunately it can be very large. If we use more one
+ automata, the summary size of the automata usually is less than the
+ single one. The automaton name is used in define_cpu_unit and
+ define_query_cpu_unit. All automata should have unique names. */
+DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA)
+
+/* (automata_option string) describes option for generation of
+ automata. Currently there are the following options:
+
+ o "no-minimization" which makes no minimization of automata. This
+ is only worth to do when we are debugging the description and
+ need to look more accurately at reservations of states.
+
+ o "time" which means printing additional time statistics about
+ generation of automata.
+
+ o "v" which means generation of file describing the result
+ automata. The file has suffix `.dfa' and can be used for the
+ description verification and debugging.
+
+ o "w" which means generation of warning instead of error for
+ non-critical errors.
+
+ o "ndfa" which makes nondeterministic finite state automata.
+
+ o "progress" which means output of a progress bar showing how many
+ states were generated so far for automaton being processed. */
+DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA)
+
+/* (define_reservation string string) names reservation (the first
+ string) of cpu functional units (the 2nd string). Sometimes unit
+ reservations for different insns contain common parts. In such
+ case, you can describe common part and use its name (the 1st
+ parameter) in regular expression in define_insn_reservation. All
+ define_reservations, define_cpu_units, and define_query_cpu_units
+ should have unique names which may not be "nothing". */
+DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA)
+
+/* (define_insn_reservation name default_latency condition regexpr)
+ describes reservation of cpu functional units (the 3nd operand) for
+ instruction which is selected by the condition (the 2nd parameter).
+ The first parameter is used for output of debugging information.
+ The reservations are described by a regular expression according
+ the following syntax:
+
+ regexp = regexp "," oneof
+ | oneof
+
+ oneof = oneof "|" allof
+ | allof
+
+ allof = allof "+" repeat
+ | repeat
+
+ repeat = element "*" number
+ | element
+
+ element = cpu_function_unit_name
+ | reservation_name
+ | result_name
+ | "nothing"
+ | "(" regexp ")"
+
+ 1. "," is used for describing start of the next cycle in
+ reservation.
+
+ 2. "|" is used for describing the reservation described by the
+ first regular expression *or* the reservation described by the
+ second regular expression *or* etc.
+
+ 3. "+" is used for describing the reservation described by the
+ first regular expression *and* the reservation described by the
+ second regular expression *and* etc.
+
+ 4. "*" is used for convenience and simply means sequence in
+ which the regular expression are repeated NUMBER times with
+ cycle advancing (see ",").
+
+ 5. cpu functional unit name which means its reservation.
+
+ 6. reservation name -- see define_reservation.
+
+ 7. string "nothing" means no units reservation. */
+
+DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA)
+
+/* Expressions used for insn attributes. */
+
+/* Definition of an insn attribute.
+ 1st operand: name of the attribute
+ 2nd operand: comma-separated list of possible attribute values
+ 3rd operand: expression for the default value of the attribute. */
+DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA)
+
+/* Marker for the name of an attribute. */
+DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA)
+
+/* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
+ in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
+ pattern.
+
+ (set_attr "name" "value") is equivalent to
+ (set (attr "name") (const_string "value")) */
+DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA)
+
+/* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
+ specify that attribute values are to be assigned according to the
+ alternative matched.
+
+ The following three expressions are equivalent:
+
+ (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
+ (eq_attrq "alternative" "2") (const_string "a2")]
+ (const_string "a3")))
+ (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
+ (const_string "a3")])
+ (set_attr "att" "a1,a2,a3")
+ */
+DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA)
+
+/* A conditional expression true if the value of the specified attribute of
+ the current insn equals the specified value. The first operand is the
+ attribute name and the second is the comparison value. */
+DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA)
+
+/* A special case of the above representing a set of alternatives. The first
+ operand is bitmap of the set, the second one is the default value. */
+DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", RTX_EXTRA)
+
+/* A conditional expression which is true if the specified flag is
+ true for the insn being scheduled in reorg.
+
+ genattr.c defines the following flags which can be tested by
+ (attr_flag "foo") expressions in eligible_for_delay.
+
+ forward, backward, very_likely, likely, very_unlikely, and unlikely. */
+
+DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
+
+/* General conditional. The first operand is a vector composed of pairs of
+ expressions. The first element of each pair is evaluated, in turn.
+ The value of the conditional is the second expression of the first pair
+ whose first expression evaluates nonzero. If none of the expressions is
+ true, the second operand will be used as the value of the conditional. */
+DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
+
+#endif /* GENERATOR_FILE */
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.h
new file mode 100644
index 0000000..1398899
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/rtl.h
@@ -0,0 +1,2371 @@
+/* Register Transfer Language (RTL) definitions for GCC
+ Copyright (C) 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_RTL_H
+#define GCC_RTL_H
+
+#include "statistics.h"
+#include "machmode.h"
+#include "input.h"
+#include "real.h"
+#include "vec.h"
+#include "fixed-value.h"
+#include "alias.h"
+
+#undef FFS /* Some systems predefine this symbol; don't let it interfere. */
+#undef FLOAT /* Likewise. */
+#undef ABS /* Likewise. */
+#undef PC /* Likewise. */
+
+/* Value used by some passes to "recognize" noop moves as valid
+ instructions. */
+#define NOOP_MOVE_INSN_CODE INT_MAX
+
+/* Register Transfer Language EXPRESSIONS CODES */
+
+#define RTX_CODE enum rtx_code
+enum rtx_code {
+
+#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) ENUM ,
+#include "rtl.def" /* rtl expressions are documented here */
+#undef DEF_RTL_EXPR
+
+ LAST_AND_UNUSED_RTX_CODE}; /* A convenient way to get a value for
+ NUM_RTX_CODE.
+ Assumes default enum value assignment. */
+
+#define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE)
+ /* The cast here, saves many elsewhere. */
+
+/* Register Transfer Language EXPRESSIONS CODE CLASSES */
+
+enum rtx_class {
+ /* We check bit 0-1 of some rtx class codes in the predicates below. */
+
+ /* Bit 0 = comparison if 0, arithmetic is 1
+ Bit 1 = 1 if commutative. */
+ RTX_COMPARE, /* 0 */
+ RTX_COMM_COMPARE,
+ RTX_BIN_ARITH,
+ RTX_COMM_ARITH,
+
+ /* Must follow the four preceding values. */
+ RTX_UNARY, /* 4 */
+
+ RTX_EXTRA,
+ RTX_MATCH,
+ RTX_INSN,
+
+ /* Bit 0 = 1 if constant. */
+ RTX_OBJ, /* 8 */
+ RTX_CONST_OBJ,
+
+ RTX_TERNARY,
+ RTX_BITFIELD_OPS,
+ RTX_AUTOINC
+};
+
+#define RTX_OBJ_MASK (~1)
+#define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK)
+#define RTX_COMPARE_MASK (~1)
+#define RTX_COMPARE_RESULT (RTX_COMPARE & RTX_COMPARE_MASK)
+#define RTX_ARITHMETIC_MASK (~1)
+#define RTX_ARITHMETIC_RESULT (RTX_COMM_ARITH & RTX_ARITHMETIC_MASK)
+#define RTX_BINARY_MASK (~3)
+#define RTX_BINARY_RESULT (RTX_COMPARE & RTX_BINARY_MASK)
+#define RTX_COMMUTATIVE_MASK (~2)
+#define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK)
+#define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK)
+
+extern const unsigned char rtx_length[NUM_RTX_CODE];
+#define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)])
+
+extern const char * const rtx_name[NUM_RTX_CODE];
+#define GET_RTX_NAME(CODE) (rtx_name[(int) (CODE)])
+
+extern const char * const rtx_format[NUM_RTX_CODE];
+#define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)])
+
+extern const enum rtx_class rtx_class[NUM_RTX_CODE];
+#define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)])
+
+extern const unsigned char rtx_code_size[NUM_RTX_CODE];
+extern const unsigned char rtx_next[NUM_RTX_CODE];
+
+/* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label
+ relative to which the offsets are calculated, as explained in rtl.def. */
+typedef struct
+{
+ /* Set at the start of shorten_branches - ONLY WHEN OPTIMIZING - : */
+ unsigned min_align: 8;
+ /* Flags: */
+ unsigned base_after_vec: 1; /* BASE is after the ADDR_DIFF_VEC. */
+ unsigned min_after_vec: 1; /* minimum address target label is
+ after the ADDR_DIFF_VEC. */
+ unsigned max_after_vec: 1; /* maximum address target label is
+ after the ADDR_DIFF_VEC. */
+ unsigned min_after_base: 1; /* minimum address target label is
+ after BASE. */
+ unsigned max_after_base: 1; /* maximum address target label is
+ after BASE. */
+ /* Set by the actual branch shortening process - ONLY WHEN OPTIMIZING - : */
+ unsigned offset_unsigned: 1; /* offsets have to be treated as unsigned. */
+ unsigned : 2;
+ unsigned scale : 8;
+} addr_diff_vec_flags;
+
+/* Structure used to describe the attributes of a MEM. These are hashed
+ so MEMs that the same attributes share a data structure. This means
+ they cannot be modified in place. If any element is nonzero, it means
+ the value of the corresponding attribute is unknown. */
+/* ALIGN and SIZE are the alignment and size of the MEM itself,
+ while EXPR can describe a larger underlying object, which might have a
+ stricter alignment; OFFSET is the offset of the MEM within that object. */
+typedef struct mem_attrs GTY(())
+{
+ tree expr; /* expr corresponding to MEM. */
+ rtx offset; /* Offset from start of DECL, as CONST_INT. */
+ rtx size; /* Size in bytes, as a CONST_INT. */
+ alias_set_type alias; /* Memory alias set. */
+ unsigned int align; /* Alignment of MEM in bits. */
+} mem_attrs;
+
+/* Structure used to describe the attributes of a REG in similar way as
+ mem_attrs does for MEM above. Note that the OFFSET field is calculated
+ in the same way as for mem_attrs, rather than in the same way as a
+ SUBREG_BYTE. For example, if a big-endian target stores a byte
+ object in the low part of a 4-byte register, the OFFSET field
+ will be -3 rather than 0. */
+
+typedef struct reg_attrs GTY(())
+{
+ tree decl; /* decl corresponding to REG. */
+ HOST_WIDE_INT offset; /* Offset from start of DECL. */
+} reg_attrs;
+
+/* Common union for an element of an rtx. */
+
+union rtunion_def
+{
+ int rt_int;
+ unsigned int rt_uint;
+ const char *rt_str;
+ rtx rt_rtx;
+ rtvec rt_rtvec;
+ enum machine_mode rt_type;
+ addr_diff_vec_flags rt_addr_diff_vec_flags;
+ struct cselib_val_struct *rt_cselib;
+ struct bitmap_head_def *rt_bit;
+ tree rt_tree;
+ struct basic_block_def *rt_bb;
+ mem_attrs *rt_mem;
+ reg_attrs *rt_reg;
+ struct constant_descriptor_rtx *rt_constant;
+};
+typedef union rtunion_def rtunion;
+
+/* This structure remembers the position of a SYMBOL_REF within an
+ object_block structure. A SYMBOL_REF only provides this information
+ if SYMBOL_REF_HAS_BLOCK_INFO_P is true. */
+struct block_symbol GTY(()) {
+ /* The usual SYMBOL_REF fields. */
+ rtunion GTY ((skip)) fld[3];
+
+ /* The block that contains this object. */
+ struct object_block *block;
+
+ /* The offset of this object from the start of its block. It is negative
+ if the symbol has not yet been assigned an offset. */
+ HOST_WIDE_INT offset;
+};
+
+DEF_VEC_P(rtx);
+DEF_VEC_ALLOC_P(rtx,heap);
+DEF_VEC_ALLOC_P(rtx,gc);
+
+/* Describes a group of objects that are to be placed together in such
+ a way that their relative positions are known. */
+struct object_block GTY(())
+{
+ /* The section in which these objects should be placed. */
+ section *sect;
+
+ /* The alignment of the first object, measured in bits. */
+ unsigned int alignment;
+
+ /* The total size of the objects, measured in bytes. */
+ HOST_WIDE_INT size;
+
+ /* The SYMBOL_REFs for each object. The vector is sorted in
+ order of increasing offset and the following conditions will
+ hold for each element X:
+
+ SYMBOL_REF_HAS_BLOCK_INFO_P (X)
+ !SYMBOL_REF_ANCHOR_P (X)
+ SYMBOL_REF_BLOCK (X) == [address of this structure]
+ SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
+ VEC(rtx,gc) *objects;
+
+ /* All the anchor SYMBOL_REFs used to address these objects, sorted
+ in order of increasing offset, and then increasing TLS model.
+ The following conditions will hold for each element X in this vector:
+
+ SYMBOL_REF_HAS_BLOCK_INFO_P (X)
+ SYMBOL_REF_ANCHOR_P (X)
+ SYMBOL_REF_BLOCK (X) == [address of this structure]
+ SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
+ VEC(rtx,gc) *anchors;
+};
+
+/* RTL expression ("rtx"). */
+
+struct rtx_def GTY((chain_next ("RTX_NEXT (&%h)"),
+ chain_prev ("RTX_PREV (&%h)")))
+{
+ /* The kind of expression this is. */
+ ENUM_BITFIELD(rtx_code) code: 16;
+
+ /* The kind of value the expression has. */
+ ENUM_BITFIELD(machine_mode) mode : 8;
+
+ /* 1 in a MEM if we should keep the alias set for this mem unchanged
+ when we access a component.
+ 1 in a CALL_INSN if it is a sibling call.
+ 1 in a SET that is for a return.
+ In a CODE_LABEL, part of the two-bit alternate entry field. */
+ unsigned int jump : 1;
+ /* In a CODE_LABEL, part of the two-bit alternate entry field.
+ 1 in a MEM if it cannot trap.
+ 1 in a CALL_INSN logically equivalent to
+ ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. */
+ unsigned int call : 1;
+ /* 1 in a REG, MEM, or CONCAT if the value is set at most once, anywhere.
+ 1 in a SUBREG if it references an unsigned object whose mode has been
+ from a promoted to a wider mode.
+ 1 in a SYMBOL_REF if it addresses something in the per-function
+ constants pool.
+ 1 in a CALL_INSN logically equivalent to ECF_CONST and TREE_READONLY.
+ 1 in a NOTE, or EXPR_LIST for a const call.
+ 1 in a JUMP_INSN, CALL_INSN, or INSN of an annulling branch. */
+ unsigned int unchanging : 1;
+ /* 1 in a MEM or ASM_OPERANDS expression if the memory reference is volatile.
+ 1 in an INSN, CALL_INSN, JUMP_INSN, CODE_LABEL, BARRIER, or NOTE
+ if it has been deleted.
+ 1 in a REG expression if corresponds to a variable declared by the user,
+ 0 for an internally generated temporary.
+ 1 in a SUBREG with a negative value.
+ 1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a
+ non-local label.
+ In a SYMBOL_REF, this flag is used for machine-specific purposes. */
+ unsigned int volatil : 1;
+ /* 1 in a MEM referring to a field of an aggregate.
+ 0 if the MEM was a variable or the result of a * operator in C;
+ 1 if it was the result of a . or -> operator (on a struct) in C.
+ 1 in a REG if the register is used only in exit code a loop.
+ 1 in a SUBREG expression if was generated from a variable with a
+ promoted mode.
+ 1 in a CODE_LABEL if the label is used for nonlocal gotos
+ and must not be deleted even if its count is zero.
+ 1 in an INSN, JUMP_INSN or CALL_INSN if this insn must be scheduled
+ together with the preceding insn. Valid only within sched.
+ 1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and
+ from the target of a branch. Valid from reorg until end of compilation;
+ cleared before used. */
+ unsigned int in_struct : 1;
+ /* At the end of RTL generation, 1 if this rtx is used. This is used for
+ copying shared structure. See `unshare_all_rtl'.
+ In a REG, this is not needed for that purpose, and used instead
+ in `leaf_renumber_regs_insn'.
+ 1 in a SYMBOL_REF, means that emit_library_call
+ has used it as the function. */
+ unsigned int used : 1;
+ /* 1 in an INSN or a SET if this rtx is related to the call frame,
+ either changing how we compute the frame address or saving and
+ restoring registers in the prologue and epilogue.
+ 1 in a REG or MEM if it is a pointer.
+ 1 in a SYMBOL_REF if it addresses something in the per-function
+ constant string pool. */
+ unsigned frame_related : 1;
+ /* 1 in a REG or PARALLEL that is the current function's return value.
+ 1 in a MEM if it refers to a scalar.
+ 1 in a SYMBOL_REF for a weak symbol.
+ 1 in a CALL_INSN logically equivalent to ECF_PURE and DECL_PURE_P. */
+ unsigned return_val : 1;
+
+ /* The first element of the operands of this rtx.
+ The number of operands and their types are controlled
+ by the `code' field, according to rtl.def. */
+ union u {
+ rtunion fld[1];
+ HOST_WIDE_INT hwint[1];
+ struct block_symbol block_sym;
+ struct real_value rv;
+ struct fixed_value fv;
+ } GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
+};
+
+/* The size in bytes of an rtx header (code, mode and flags). */
+#define RTX_HDR_SIZE offsetof (struct rtx_def, u)
+
+/* The size in bytes of an rtx with code CODE. */
+#define RTX_CODE_SIZE(CODE) rtx_code_size[CODE]
+
+#define NULL_RTX (rtx) 0
+
+/* The "next" and "previous" RTX, relative to this one. */
+
+#define RTX_NEXT(X) (rtx_next[GET_CODE (X)] == 0 ? NULL \
+ : *(rtx *)(((char *)X) + rtx_next[GET_CODE (X)]))
+
+/* FIXME: the "NEXT_INSN (PREV_INSN (X)) == X" condition shouldn't be needed.
+ */
+#define RTX_PREV(X) ((INSN_P (X) \
+ || NOTE_P (X) \
+ || BARRIER_P (X) \
+ || LABEL_P (X)) \
+ && PREV_INSN (X) != NULL \
+ && NEXT_INSN (PREV_INSN (X)) == X \
+ ? PREV_INSN (X) : NULL)
+
+/* Define macros to access the `code' field of the rtx. */
+
+#define GET_CODE(RTX) ((enum rtx_code) (RTX)->code)
+#define PUT_CODE(RTX, CODE) ((RTX)->code = (CODE))
+
+#define GET_MODE(RTX) ((enum machine_mode) (RTX)->mode)
+#define PUT_MODE(RTX, MODE) ((RTX)->mode = (MODE))
+
+/* RTL vector. These appear inside RTX's when there is a need
+ for a variable number of things. The principle use is inside
+ PARALLEL expressions. */
+
+struct rtvec_def GTY(()) {
+ int num_elem; /* number of elements */
+ rtx GTY ((length ("%h.num_elem"))) elem[1];
+};
+
+#define NULL_RTVEC (rtvec) 0
+
+#define GET_NUM_ELEM(RTVEC) ((RTVEC)->num_elem)
+#define PUT_NUM_ELEM(RTVEC, NUM) ((RTVEC)->num_elem = (NUM))
+
+/* Predicate yielding nonzero iff X is an rtx for a register. */
+#define REG_P(X) (GET_CODE (X) == REG)
+
+/* Predicate yielding nonzero iff X is an rtx for a memory location. */
+#define MEM_P(X) (GET_CODE (X) == MEM)
+
+/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
+#define CONST_INT_P(X) (GET_CODE (X) == CONST_INT)
+
+/* Predicate yielding nonzero iff X is a label insn. */
+#define LABEL_P(X) (GET_CODE (X) == CODE_LABEL)
+
+/* Predicate yielding nonzero iff X is a jump insn. */
+#define JUMP_P(X) (GET_CODE (X) == JUMP_INSN)
+
+/* Predicate yielding nonzero iff X is a call insn. */
+#define CALL_P(X) (GET_CODE (X) == CALL_INSN)
+
+/* Predicate yielding nonzero iff X is an insn that cannot jump. */
+#define NONJUMP_INSN_P(X) (GET_CODE (X) == INSN)
+
+/* Predicate yielding nonzero iff X is a debug note/insn. */
+#define DEBUG_INSN_P(X) (GET_CODE (X) == DEBUG_INSN)
+
+/* Predicate yielding nonzero iff X is an insn that is not a debug insn. */
+#define NONDEBUG_INSN_P(X) (INSN_P (X) && !DEBUG_INSN_P (X))
+
+/* Predicate yielding nonzero iff X is a real insn. */
+#define INSN_P(X) \
+ (NONJUMP_INSN_P (X) || DEBUG_INSN_P (X) || JUMP_P (X) || CALL_P (X))
+
+/* Predicate yielding nonzero iff X is a note insn. */
+#define NOTE_P(X) (GET_CODE (X) == NOTE)
+
+/* Predicate yielding nonzero iff X is a barrier insn. */
+#define BARRIER_P(X) (GET_CODE (X) == BARRIER)
+
+/* Predicate yielding nonzero iff X is a data for a jump table. */
+#define JUMP_TABLE_DATA_P(INSN) \
+ (JUMP_P (INSN) && (GET_CODE (PATTERN (INSN)) == ADDR_VEC || \
+ GET_CODE (PATTERN (INSN)) == ADDR_DIFF_VEC))
+
+/* 1 if X is a unary operator. */
+
+#define UNARY_P(X) \
+ (GET_RTX_CLASS (GET_CODE (X)) == RTX_UNARY)
+
+/* 1 if X is a binary operator. */
+
+#define BINARY_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_BINARY_MASK) == RTX_BINARY_RESULT)
+
+/* 1 if X is an arithmetic operator. */
+
+#define ARITHMETIC_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_ARITHMETIC_MASK) \
+ == RTX_ARITHMETIC_RESULT)
+
+/* 1 if X is an arithmetic operator. */
+
+#define COMMUTATIVE_ARITH_P(X) \
+ (GET_RTX_CLASS (GET_CODE (X)) == RTX_COMM_ARITH)
+
+/* 1 if X is a commutative arithmetic operator or a comparison operator.
+ These two are sometimes selected together because it is possible to
+ swap the two operands. */
+
+#define SWAPPABLE_OPERANDS_P(X) \
+ ((1 << GET_RTX_CLASS (GET_CODE (X))) \
+ & ((1 << RTX_COMM_ARITH) | (1 << RTX_COMM_COMPARE) \
+ | (1 << RTX_COMPARE)))
+
+/* 1 if X is a non-commutative operator. */
+
+#define NON_COMMUTATIVE_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
+ == RTX_NON_COMMUTATIVE_RESULT)
+
+/* 1 if X is a commutative operator on integers. */
+
+#define COMMUTATIVE_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
+ == RTX_COMMUTATIVE_RESULT)
+
+/* 1 if X is a relational operator. */
+
+#define COMPARISON_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMPARE_MASK) == RTX_COMPARE_RESULT)
+
+/* 1 if X is a constant value that is an integer. */
+
+#define CONSTANT_P(X) \
+ (GET_RTX_CLASS (GET_CODE (X)) == RTX_CONST_OBJ)
+
+/* 1 if X can be used to represent an object. */
+#define OBJECT_P(X) \
+ ((GET_RTX_CLASS (GET_CODE (X)) & RTX_OBJ_MASK) == RTX_OBJ_RESULT)
+
+/* General accessor macros for accessing the fields of an rtx. */
+
+#if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007)
+/* The bit with a star outside the statement expr and an & inside is
+ so that N can be evaluated only once. */
+#define RTL_CHECK1(RTX, N, C1) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
+ const enum rtx_code _code = GET_CODE (_rtx); \
+ if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
+ rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ if (GET_RTX_FORMAT(_code)[_n] != C1) \
+ rtl_check_failed_type1 (_rtx, _n, C1, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.fld[_n]; }))
+
+#define RTL_CHECK2(RTX, N, C1, C2) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
+ const enum rtx_code _code = GET_CODE (_rtx); \
+ if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
+ rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ if (GET_RTX_FORMAT(_code)[_n] != C1 \
+ && GET_RTX_FORMAT(_code)[_n] != C2) \
+ rtl_check_failed_type2 (_rtx, _n, C1, C2, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.fld[_n]; }))
+
+#define RTL_CHECKC1(RTX, N, C) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
+ if (GET_CODE (_rtx) != (C)) \
+ rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.fld[_n]; }))
+
+#define RTL_CHECKC2(RTX, N, C1, C2) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
+ const enum rtx_code _code = GET_CODE (_rtx); \
+ if (_code != (C1) && _code != (C2)) \
+ rtl_check_failed_code2 (_rtx, (C1), (C2), __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.fld[_n]; }))
+
+#define RTVEC_ELT(RTVEC, I) __extension__ \
+(*({ __typeof (RTVEC) const _rtvec = (RTVEC); const int _i = (I); \
+ if (_i < 0 || _i >= GET_NUM_ELEM (_rtvec)) \
+ rtvec_check_failed_bounds (_rtvec, _i, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtvec->elem[_i]; }))
+
+#define XWINT(RTX, N) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
+ const enum rtx_code _code = GET_CODE (_rtx); \
+ if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
+ rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ if (GET_RTX_FORMAT(_code)[_n] != 'w') \
+ rtl_check_failed_type1 (_rtx, _n, 'w', __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.hwint[_n]; }))
+
+#define XCWINT(RTX, N, C) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE (_rtx) != (C)) \
+ rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_rtx->u.hwint[N]; }))
+
+#define XCMWINT(RTX, N, C, M) __extension__ \
+(*({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) != (M)) \
+ rtl_check_failed_code_mode (_rtx, (C), (M), false, __FILE__, \
+ __LINE__, __FUNCTION__); \
+ &_rtx->u.hwint[N]; }))
+
+#define XCNMPRV(RTX, C, M) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
+ rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
+ __LINE__, __FUNCTION__); \
+ &_rtx->u.rv; })
+
+#define XCNMPFV(RTX, C, M) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
+ rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
+ __LINE__, __FUNCTION__); \
+ &_rtx->u.fv; })
+
+#define BLOCK_SYMBOL_CHECK(RTX) __extension__ \
+({ __typeof (RTX) const _symbol = (RTX); \
+ const unsigned int flags = RTL_CHECKC1 (_symbol, 1, SYMBOL_REF).rt_int; \
+ if ((flags & SYMBOL_FLAG_HAS_BLOCK_INFO) == 0) \
+ rtl_check_failed_block_symbol (__FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_symbol->u.block_sym; })
+
+extern void rtl_check_failed_bounds (const_rtx, int, const char *, int,
+ const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_type1 (const_rtx, int, int, const char *, int,
+ const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_type2 (const_rtx, int, int, int, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_code1 (const_rtx, enum rtx_code, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_code2 (const_rtx, enum rtx_code, enum rtx_code,
+ const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_code_mode (const_rtx, enum rtx_code, enum machine_mode,
+ bool, const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtl_check_failed_block_symbol (const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
+ const char *)
+ ATTRIBUTE_NORETURN;
+
+#else /* not ENABLE_RTL_CHECKING */
+
+#define RTL_CHECK1(RTX, N, C1) ((RTX)->u.fld[N])
+#define RTL_CHECK2(RTX, N, C1, C2) ((RTX)->u.fld[N])
+#define RTL_CHECKC1(RTX, N, C) ((RTX)->u.fld[N])
+#define RTL_CHECKC2(RTX, N, C1, C2) ((RTX)->u.fld[N])
+#define RTVEC_ELT(RTVEC, I) ((RTVEC)->elem[I])
+#define XWINT(RTX, N) ((RTX)->u.hwint[N])
+#define XCWINT(RTX, N, C) ((RTX)->u.hwint[N])
+#define XCMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
+#define XCNMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
+#define XCNMPRV(RTX, C, M) (&(RTX)->u.rv)
+#define XCNMPFV(RTX, C, M) (&(RTX)->u.fv)
+#define BLOCK_SYMBOL_CHECK(RTX) (&(RTX)->u.block_sym)
+
+#endif
+
+/* General accessor macros for accessing the flags of an rtx. */
+
+/* Access an individual rtx flag, with no checking of any kind. */
+#define RTX_FLAG(RTX, FLAG) ((RTX)->FLAG)
+
+#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION >= 2007)
+#define RTL_FLAG_CHECK1(NAME, RTX, C1) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2) \
+ rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3 && GET_CODE(_rtx) != C4) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3 && GET_CODE(_rtx) != C4 \
+ && GET_CODE(_rtx) != C5) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) \
+ __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3 && GET_CODE(_rtx) != C4 \
+ && GET_CODE(_rtx) != C5 && GET_CODE(_rtx) != C6) \
+ rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) \
+ __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3 && GET_CODE(_rtx) != C4 \
+ && GET_CODE(_rtx) != C5 && GET_CODE(_rtx) != C6 \
+ && GET_CODE(_rtx) != C7) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+#define RTL_FLAG_CHECK8(NAME, RTX, C1, C2, C3, C4, C5, C6, C7, C8) \
+ __extension__ \
+({ __typeof (RTX) const _rtx = (RTX); \
+ if (GET_CODE(_rtx) != C1 && GET_CODE(_rtx) != C2 \
+ && GET_CODE(_rtx) != C3 && GET_CODE(_rtx) != C4 \
+ && GET_CODE(_rtx) != C5 && GET_CODE(_rtx) != C6 \
+ && GET_CODE(_rtx) != C7 && GET_CODE(_rtx) != C8) \
+ rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _rtx; })
+
+extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN
+ ;
+
+#else /* not ENABLE_RTL_FLAG_CHECKING */
+
+#define RTL_FLAG_CHECK1(NAME, RTX, C1) (RTX)
+#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) (RTX)
+#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) (RTX)
+#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) (RTX)
+#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) (RTX)
+#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) (RTX)
+#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) (RTX)
+#define RTL_FLAG_CHECK8(NAME, RTX, C1, C2, C3, C4, C5, C6, C7, C8) (RTX)
+#endif
+
+#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
+#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
+#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
+#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
+#define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type)
+#define XBITMAP(RTX, N) (RTL_CHECK1 (RTX, N, 'b').rt_bit)
+#define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree)
+#define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb)
+#define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str)
+
+#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
+#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
+
+/* These are like XINT, etc. except that they expect a '0' field instead
+ of the normal type code. */
+
+#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
+#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
+#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
+#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
+#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
+#define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type)
+#define X0BITMAP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bit)
+#define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree)
+#define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb)
+#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
+#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
+#define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
+#define X0REGATTR(RTX, N) (RTL_CHECKC1 (RTX, N, REG).rt_reg)
+#define X0CONSTANT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_constant)
+
+/* Access a '0' field with any type. */
+#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
+
+#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
+#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
+#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
+#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
+#define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec)
+#define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type)
+#define XCBITMAP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bit)
+#define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree)
+#define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb)
+#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
+
+#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
+#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
+
+#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
+
+/* ACCESS MACROS for particular fields of insns. */
+
+/* Holds a unique number for each insn.
+ These are not necessarily sequentially increasing. */
+#define INSN_UID(INSN) XINT (INSN, 0)
+
+/* Chain insns together in sequence. */
+#define PREV_INSN(INSN) XEXP (INSN, 1)
+#define NEXT_INSN(INSN) XEXP (INSN, 2)
+
+#define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 3)
+#define INSN_LOCATOR(INSN) XINT (INSN, 4)
+/* The body of an insn. */
+#define PATTERN(INSN) XEXP (INSN, 5)
+
+/* Code number of instruction, from when it was recognized.
+ -1 means this instruction has not been recognized yet. */
+#define INSN_CODE(INSN) XINT (INSN, 6)
+
+#define RTX_FRAME_RELATED_P(RTX) \
+ (RTL_FLAG_CHECK5("RTX_FRAME_RELATED_P", (RTX), INSN, CALL_INSN, \
+ JUMP_INSN, BARRIER, SET)->frame_related)
+
+/* 1 if RTX is an insn that has been deleted. */
+#define INSN_DELETED_P(RTX) \
+ (RTL_FLAG_CHECK6("INSN_DELETED_P", (RTX), INSN, CALL_INSN, JUMP_INSN, \
+ CODE_LABEL, BARRIER, NOTE)->volatil)
+
+/* 1 if RTX is a call to a const function. Built from ECF_CONST and
+ TREE_READONLY. */
+#define RTL_CONST_CALL_P(RTX) \
+ (RTL_FLAG_CHECK1("RTL_CONST_CALL_P", (RTX), CALL_INSN)->unchanging)
+
+/* 1 if RTX is a call to a pure function. Built from ECF_PURE and
+ DECL_PURE_P. */
+#define RTL_PURE_CALL_P(RTX) \
+ (RTL_FLAG_CHECK1("RTL_PURE_CALL_P", (RTX), CALL_INSN)->return_val)
+
+/* 1 if RTX is a call to a const or pure function. */
+#define RTL_CONST_OR_PURE_CALL_P(RTX) \
+ (RTL_CONST_CALL_P(RTX) || RTL_PURE_CALL_P(RTX))
+
+/* 1 if RTX is a call to a looping const or pure function. Built from
+ ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. */
+#define RTL_LOOPING_CONST_OR_PURE_CALL_P(RTX) \
+ (RTL_FLAG_CHECK1("CONST_OR_PURE_CALL_P", (RTX), CALL_INSN)->call)
+
+/* 1 if RTX is a call_insn for a sibling call. */
+#define SIBLING_CALL_P(RTX) \
+ (RTL_FLAG_CHECK1("SIBLING_CALL_P", (RTX), CALL_INSN)->jump)
+
+/* 1 if RTX is a jump_insn, call_insn, or insn that is an annulling branch. */
+#define INSN_ANNULLED_BRANCH_P(RTX) \
+ (RTL_FLAG_CHECK3("INSN_ANNULLED_BRANCH_P", (RTX), JUMP_INSN, CALL_INSN, INSN)->unchanging)
+
+/* 1 if RTX is an insn in a delay slot and is from the target of the branch.
+ If the branch insn has INSN_ANNULLED_BRANCH_P set, this insn should only be
+ executed if the branch is taken. For annulled branches with this bit
+ clear, the insn should be executed only if the branch is not taken. */
+#define INSN_FROM_TARGET_P(RTX) \
+ (RTL_FLAG_CHECK3("INSN_FROM_TARGET_P", (RTX), INSN, JUMP_INSN, CALL_INSN)->in_struct)
+
+/* In an ADDR_DIFF_VEC, the flags for RTX for use by branch shortening.
+ See the comments for ADDR_DIFF_VEC in rtl.def. */
+#define ADDR_DIFF_VEC_FLAGS(RTX) X0ADVFLAGS(RTX, 4)
+
+/* In a VALUE, the value cselib has assigned to RTX.
+ This is a "struct cselib_val_struct", see cselib.h. */
+#define CSELIB_VAL_PTR(RTX) X0CSELIB(RTX, 0)
+
+/* Holds a list of notes on what this insn does to various REGs.
+ It is a chain of EXPR_LIST rtx's, where the second operand is the
+ chain pointer and the first operand is the REG being described.
+ The mode field of the EXPR_LIST contains not a real machine mode
+ but a value from enum reg_note. */
+#define REG_NOTES(INSN) XEXP(INSN, 7)
+
+enum reg_note
+{
+#define DEF_REG_NOTE(NAME) NAME,
+#include "reg-notes.def"
+#undef DEF_REG_NOTE
+ REG_NOTE_MAX
+};
+
+/* Define macros to extract and insert the reg-note kind in an EXPR_LIST. */
+#define REG_NOTE_KIND(LINK) ((enum reg_note) GET_MODE (LINK))
+#define PUT_REG_NOTE_KIND(LINK, KIND) \
+ PUT_MODE (LINK, (enum machine_mode) (KIND))
+
+/* Names for REG_NOTE's in EXPR_LIST insn's. */
+
+extern const char * const reg_note_name[];
+#define GET_REG_NOTE_NAME(MODE) (reg_note_name[(int) (MODE)])
+
+/* This field is only present on CALL_INSNs. It holds a chain of EXPR_LIST of
+ USE and CLOBBER expressions.
+ USE expressions list the registers filled with arguments that
+ are passed to the function.
+ CLOBBER expressions document the registers explicitly clobbered
+ by this CALL_INSN.
+ Pseudo registers can not be mentioned in this list. */
+#define CALL_INSN_FUNCTION_USAGE(INSN) XEXP(INSN, 8)
+
+/* The label-number of a code-label. The assembler label
+ is made from `L' and the label-number printed in decimal.
+ Label numbers are unique in a compilation. */
+#define CODE_LABEL_NUMBER(INSN) XINT (INSN, 6)
+
+/* In a NOTE that is a line number, this is a string for the file name that the
+ line is in. We use the same field to record block numbers temporarily in
+ NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes. (We avoid lots of casts
+ between ints and pointers if we use a different macro for the block number.)
+ */
+
+/* Opaque data. */
+#define NOTE_DATA(INSN) RTL_CHECKC1 (INSN, 4, NOTE)
+#define NOTE_DELETED_LABEL_NAME(INSN) XCSTR (INSN, 4, NOTE)
+#define SET_INSN_DELETED(INSN) set_insn_deleted (INSN);
+#define NOTE_BLOCK(INSN) XCTREE (INSN, 4, NOTE)
+#define NOTE_EH_HANDLER(INSN) XCINT (INSN, 4, NOTE)
+#define NOTE_BASIC_BLOCK(INSN) XCBBDEF (INSN, 4, NOTE)
+#define NOTE_VAR_LOCATION(INSN) XCEXP (INSN, 4, NOTE)
+
+/* In a NOTE that is a line number, this is the line number.
+ Other kinds of NOTEs are identified by negative numbers here. */
+#define NOTE_KIND(INSN) XCINT (INSN, 5, NOTE)
+
+/* Nonzero if INSN is a note marking the beginning of a basic block. */
+#define NOTE_INSN_BASIC_BLOCK_P(INSN) \
+ (GET_CODE (INSN) == NOTE \
+ && NOTE_KIND (INSN) == NOTE_INSN_BASIC_BLOCK)
+
+/* Variable declaration and the location of a variable. */
+#define NOTE_VAR_LOCATION_DECL(INSN) (XCTREE (XCEXP (INSN, 4, NOTE), \
+ 0, VAR_LOCATION))
+#define NOTE_VAR_LOCATION_LOC(INSN) (XCEXP (XCEXP (INSN, 4, NOTE), \
+ 1, VAR_LOCATION))
+
+/* Initialization status of the variable in the location. Status
+ can be unknown, uninitialized or initialized. See enumeration
+ type below. */
+#define NOTE_VAR_LOCATION_STATUS(INSN) (XCINT (XCEXP (INSN, 4, NOTE), \
+ 2, VAR_LOCATION))
+
+/* Possible initialization status of a variable. When requested
+ by the user, this information is tracked and recorded in the DWARF
+ debug information, along with the variable's location. */
+enum var_init_status
+{
+ VAR_INIT_STATUS_UNKNOWN,
+ VAR_INIT_STATUS_UNINITIALIZED,
+ VAR_INIT_STATUS_INITIALIZED
+};
+
+/* Codes that appear in the NOTE_KIND field for kinds of notes
+ that are not line numbers. These codes are all negative.
+
+ Notice that we do not try to use zero here for any of
+ the special note codes because sometimes the source line
+ actually can be zero! This happens (for example) when we
+ are generating code for the per-translation-unit constructor
+ and destructor routines for some C++ translation unit. */
+
+enum insn_note
+{
+#define DEF_INSN_NOTE(NAME) NAME,
+#include "insn-notes.def"
+#undef DEF_INSN_NOTE
+
+ NOTE_INSN_MAX
+};
+
+/* Names for NOTE insn's other than line numbers. */
+
+extern const char * const note_insn_name[NOTE_INSN_MAX];
+#define GET_NOTE_INSN_NAME(NOTE_CODE) \
+ (note_insn_name[(NOTE_CODE)])
+
+/* The name of a label, in case it corresponds to an explicit label
+ in the input source code. */
+#define LABEL_NAME(RTX) XCSTR (RTX, 7, CODE_LABEL)
+
+/* In jump.c, each label contains a count of the number
+ of LABEL_REFs that point at it, so unused labels can be deleted. */
+#define LABEL_NUSES(RTX) XCINT (RTX, 4, CODE_LABEL)
+
+/* Labels carry a two-bit field composed of the ->jump and ->call
+ bits. This field indicates whether the label is an alternate
+ entry point, and if so, what kind. */
+enum label_kind
+{
+ LABEL_NORMAL = 0, /* ordinary label */
+ LABEL_STATIC_ENTRY, /* alternate entry point, not exported */
+ LABEL_GLOBAL_ENTRY, /* alternate entry point, exported */
+ LABEL_WEAK_ENTRY /* alternate entry point, exported as weak symbol */
+};
+
+#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION > 2007)
+
+/* Retrieve the kind of LABEL. */
+#define LABEL_KIND(LABEL) __extension__ \
+({ __typeof (LABEL) const _label = (LABEL); \
+ if (GET_CODE (_label) != CODE_LABEL) \
+ rtl_check_failed_flag ("LABEL_KIND", _label, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ (enum label_kind) ((_label->jump << 1) | _label->call); })
+
+/* Set the kind of LABEL. */
+#define SET_LABEL_KIND(LABEL, KIND) do { \
+ __typeof (LABEL) const _label = (LABEL); \
+ const unsigned int _kind = (KIND); \
+ if (GET_CODE (_label) != CODE_LABEL) \
+ rtl_check_failed_flag ("SET_LABEL_KIND", _label, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ _label->jump = ((_kind >> 1) & 1); \
+ _label->call = (_kind & 1); \
+} while (0)
+
+#else
+
+/* Retrieve the kind of LABEL. */
+#define LABEL_KIND(LABEL) \
+ ((enum label_kind) (((LABEL)->jump << 1) | (LABEL)->call))
+
+/* Set the kind of LABEL. */
+#define SET_LABEL_KIND(LABEL, KIND) do { \
+ rtx const _label = (LABEL); \
+ const unsigned int _kind = (KIND); \
+ _label->jump = ((_kind >> 1) & 1); \
+ _label->call = (_kind & 1); \
+} while (0)
+
+#endif /* rtl flag checking */
+
+#define LABEL_ALT_ENTRY_P(LABEL) (LABEL_KIND (LABEL) != LABEL_NORMAL)
+
+/* In jump.c, each JUMP_INSN can point to a label that it can jump to,
+ so that if the JUMP_INSN is deleted, the label's LABEL_NUSES can
+ be decremented and possibly the label can be deleted. */
+#define JUMP_LABEL(INSN) XCEXP (INSN, 8, JUMP_INSN)
+
+/* Once basic blocks are found, each CODE_LABEL starts a chain that
+ goes through all the LABEL_REFs that jump to that label. The chain
+ eventually winds up at the CODE_LABEL: it is circular. */
+#define LABEL_REFS(LABEL) XCEXP (LABEL, 5, CODE_LABEL)
+
+/* For a REG rtx, REGNO extracts the register number. REGNO can only
+ be used on RHS. Use SET_REGNO to change the value. */
+#define REGNO(RTX) (rhs_regno(RTX))
+#define SET_REGNO(RTX,N) (df_ref_change_reg_with_loc (REGNO(RTX), N, RTX), XCUINT (RTX, 0, REG) = N)
+#define SET_REGNO_RAW(RTX,N) (XCUINT (RTX, 0, REG) = N)
+
+/* ORIGINAL_REGNO holds the number the register originally had; for a
+ pseudo register turned into a hard reg this will hold the old pseudo
+ register number. */
+#define ORIGINAL_REGNO(RTX) X0UINT (RTX, 1)
+
+/* Force the REGNO macro to only be used on the lhs. */
+static inline unsigned int
+rhs_regno (const_rtx x)
+{
+ return XCUINT (x, 0, REG);
+}
+
+
+
+/* 1 if RTX is a reg or parallel that is the current function's return
+ value. */
+#define REG_FUNCTION_VALUE_P(RTX) \
+ (RTL_FLAG_CHECK2("REG_FUNCTION_VALUE_P", (RTX), REG, PARALLEL)->return_val)
+
+/* 1 if RTX is a reg that corresponds to a variable declared by the user. */
+#define REG_USERVAR_P(RTX) \
+ (RTL_FLAG_CHECK1("REG_USERVAR_P", (RTX), REG)->volatil)
+
+/* 1 if RTX is a reg that holds a pointer value. */
+#define REG_POINTER(RTX) \
+ (RTL_FLAG_CHECK1("REG_POINTER", (RTX), REG)->frame_related)
+
+/* 1 if RTX is a mem that holds a pointer value. */
+#define MEM_POINTER(RTX) \
+ (RTL_FLAG_CHECK1("MEM_POINTER", (RTX), MEM)->frame_related)
+
+/* 1 if the given register REG corresponds to a hard register. */
+#define HARD_REGISTER_P(REG) (HARD_REGISTER_NUM_P (REGNO (REG)))
+
+/* 1 if the given register number REG_NO corresponds to a hard register. */
+#define HARD_REGISTER_NUM_P(REG_NO) ((REG_NO) < FIRST_PSEUDO_REGISTER)
+
+/* For a CONST_INT rtx, INTVAL extracts the integer. */
+#define INTVAL(RTX) XCWINT(RTX, 0, CONST_INT)
+#define UINTVAL(RTX) ((unsigned HOST_WIDE_INT) INTVAL (RTX))
+
+/* For a CONST_DOUBLE:
+ For a VOIDmode, there are two integers CONST_DOUBLE_LOW is the
+ low-order word and ..._HIGH the high-order.
+ For a float, there is a REAL_VALUE_TYPE structure, and
+ CONST_DOUBLE_REAL_VALUE(r) is a pointer to it. */
+#define CONST_DOUBLE_LOW(r) XCMWINT (r, 0, CONST_DOUBLE, VOIDmode)
+#define CONST_DOUBLE_HIGH(r) XCMWINT (r, 1, CONST_DOUBLE, VOIDmode)
+#define CONST_DOUBLE_REAL_VALUE(r) \
+ ((const struct real_value *) XCNMPRV (r, CONST_DOUBLE, VOIDmode))
+
+#define CONST_FIXED_VALUE(r) \
+ ((const struct fixed_value *) XCNMPFV (r, CONST_FIXED, VOIDmode))
+#define CONST_FIXED_VALUE_HIGH(r) \
+ ((HOST_WIDE_INT) (CONST_FIXED_VALUE(r)->data.high))
+#define CONST_FIXED_VALUE_LOW(r) \
+ ((HOST_WIDE_INT) (CONST_FIXED_VALUE(r)->data.low))
+
+/* For a CONST_VECTOR, return element #n. */
+#define CONST_VECTOR_ELT(RTX, N) XCVECEXP (RTX, 0, N, CONST_VECTOR)
+
+/* For a CONST_VECTOR, return the number of elements in a vector. */
+#define CONST_VECTOR_NUNITS(RTX) XCVECLEN (RTX, 0, CONST_VECTOR)
+
+/* For a SUBREG rtx, SUBREG_REG extracts the value we want a subreg of.
+ SUBREG_BYTE extracts the byte-number. */
+
+#define SUBREG_REG(RTX) XCEXP (RTX, 0, SUBREG)
+#define SUBREG_BYTE(RTX) XCUINT (RTX, 1, SUBREG)
+
+/* in rtlanal.c */
+/* Return the right cost to give to an operation
+ to make the cost of the corresponding register-to-register instruction
+ N times that of a fast register-to-register instruction. */
+#define COSTS_N_INSNS(N) ((N) * 4)
+
+/* Maximum cost of an rtl expression. This value has the special meaning
+ not to use an rtx with this cost under any circumstances. */
+#define MAX_COST INT_MAX
+
+extern void init_rtlanal (void);
+extern int rtx_cost (rtx, enum rtx_code, bool);
+extern int address_cost (rtx, enum machine_mode, bool);
+extern unsigned int subreg_lsb (const_rtx);
+extern unsigned int subreg_lsb_1 (enum machine_mode, enum machine_mode,
+ unsigned int);
+extern unsigned int subreg_regno_offset (unsigned int, enum machine_mode,
+ unsigned int, enum machine_mode);
+extern bool subreg_offset_representable_p (unsigned int, enum machine_mode,
+ unsigned int, enum machine_mode);
+extern unsigned int subreg_regno (const_rtx);
+extern int simplify_subreg_regno (unsigned int, enum machine_mode,
+ unsigned int, enum machine_mode);
+extern unsigned int subreg_nregs (const_rtx);
+extern unsigned int subreg_nregs_with_regno (unsigned int, const_rtx);
+extern unsigned HOST_WIDE_INT nonzero_bits (const_rtx, enum machine_mode);
+extern unsigned int num_sign_bit_copies (const_rtx, enum machine_mode);
+extern bool constant_pool_constant_p (rtx);
+extern bool truncated_to_mode (enum machine_mode, const_rtx);
+
+
+/* 1 if RTX is a subreg containing a reg that is already known to be
+ sign- or zero-extended from the mode of the subreg to the mode of
+ the reg. SUBREG_PROMOTED_UNSIGNED_P gives the signedness of the
+ extension.
+
+ When used as a LHS, is means that this extension must be done
+ when assigning to SUBREG_REG. */
+
+#define SUBREG_PROMOTED_VAR_P(RTX) \
+ (RTL_FLAG_CHECK1("SUBREG_PROMOTED", (RTX), SUBREG)->in_struct)
+
+#define SUBREG_PROMOTED_UNSIGNED_SET(RTX, VAL) \
+do { \
+ rtx const _rtx = RTL_FLAG_CHECK1("SUBREG_PROMOTED_UNSIGNED_SET", (RTX), SUBREG); \
+ if ((VAL) < 0) \
+ _rtx->volatil = 1; \
+ else { \
+ _rtx->volatil = 0; \
+ _rtx->unchanging = (VAL); \
+ } \
+} while (0)
+#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
+ ((RTL_FLAG_CHECK1("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil) \
+ ? -1 : (RTX)->unchanging)
+
+/* Access various components of an ASM_OPERANDS rtx. */
+
+#define ASM_OPERANDS_TEMPLATE(RTX) XCSTR (RTX, 0, ASM_OPERANDS)
+#define ASM_OPERANDS_OUTPUT_CONSTRAINT(RTX) XCSTR (RTX, 1, ASM_OPERANDS)
+#define ASM_OPERANDS_OUTPUT_IDX(RTX) XCINT (RTX, 2, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT_VEC(RTX) XCVEC (RTX, 3, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT_CONSTRAINT_VEC(RTX) XCVEC (RTX, 4, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT(RTX, N) XCVECEXP (RTX, 3, N, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT_LENGTH(RTX) XCVECLEN (RTX, 3, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT_CONSTRAINT_EXP(RTX, N) \
+ XCVECEXP (RTX, 4, N, ASM_OPERANDS)
+#define ASM_OPERANDS_INPUT_CONSTRAINT(RTX, N) \
+ XSTR (XCVECEXP (RTX, 4, N, ASM_OPERANDS), 0)
+#define ASM_OPERANDS_INPUT_MODE(RTX, N) \
+ GET_MODE (XCVECEXP (RTX, 4, N, ASM_OPERANDS))
+#define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCUINT (RTX, 5, ASM_OPERANDS)
+#define ASM_INPUT_SOURCE_LOCATION(RTX) XCUINT (RTX, 1, ASM_INPUT)
+
+/* 1 if RTX is a mem that is statically allocated in read-only memory. */
+#define MEM_READONLY_P(RTX) \
+ (RTL_FLAG_CHECK1("MEM_READONLY_P", (RTX), MEM)->unchanging)
+
+/* 1 if RTX is a mem and we should keep the alias set for this mem
+ unchanged when we access a component. Set to 1, or example, when we
+ are already in a non-addressable component of an aggregate. */
+#define MEM_KEEP_ALIAS_SET_P(RTX) \
+ (RTL_FLAG_CHECK1("MEM_KEEP_ALIAS_SET_P", (RTX), MEM)->jump)
+
+/* 1 if RTX is a mem or asm_operand for a volatile reference. */
+#define MEM_VOLATILE_P(RTX) \
+ (RTL_FLAG_CHECK3("MEM_VOLATILE_P", (RTX), MEM, ASM_OPERANDS, \
+ ASM_INPUT)->volatil)
+
+/* 1 if RTX is a mem that refers to an aggregate, either to the
+ aggregate itself or to a field of the aggregate. If zero, RTX may
+ or may not be such a reference. */
+#define MEM_IN_STRUCT_P(RTX) \
+ (RTL_FLAG_CHECK1("MEM_IN_STRUCT_P", (RTX), MEM)->in_struct)
+
+/* 1 if RTX is a MEM that refers to a scalar. If zero, RTX may or may
+ not refer to a scalar. */
+#define MEM_SCALAR_P(RTX) \
+ (RTL_FLAG_CHECK1("MEM_SCALAR_P", (RTX), MEM)->return_val)
+
+/* 1 if RTX is a mem that cannot trap. */
+#define MEM_NOTRAP_P(RTX) \
+ (RTL_FLAG_CHECK1("MEM_NOTRAP_P", (RTX), MEM)->call)
+
+/* If VAL is nonzero, set MEM_IN_STRUCT_P and clear MEM_SCALAR_P in
+ RTX. Otherwise, vice versa. Use this macro only when you are
+ *sure* that you know that the MEM is in a structure, or is a
+ scalar. VAL is evaluated only once. */
+#define MEM_SET_IN_STRUCT_P(RTX, VAL) \
+do { \
+ if (VAL) \
+ { \
+ MEM_IN_STRUCT_P (RTX) = 1; \
+ MEM_SCALAR_P (RTX) = 0; \
+ } \
+ else \
+ { \
+ MEM_IN_STRUCT_P (RTX) = 0; \
+ MEM_SCALAR_P (RTX) = 1; \
+ } \
+} while (0)
+
+/* The memory attribute block. We provide access macros for each value
+ in the block and provide defaults if none specified. */
+#define MEM_ATTRS(RTX) X0MEMATTR (RTX, 1)
+
+/* The register attribute block. We provide access macros for each value
+ in the block and provide defaults if none specified. */
+#define REG_ATTRS(RTX) X0REGATTR (RTX, 2)
+
+/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias
+ set, and may alias anything. Otherwise, the MEM can only alias
+ MEMs in a conflicting alias set. This value is set in a
+ language-dependent manner in the front-end, and should not be
+ altered in the back-end. These set numbers are tested with
+ alias_sets_conflict_p. */
+#define MEM_ALIAS_SET(RTX) (MEM_ATTRS (RTX) == 0 ? 0 : MEM_ATTRS (RTX)->alias)
+
+/* For a MEM rtx, the decl it is known to refer to, if it is known to
+ refer to part of a DECL. It may also be a COMPONENT_REF. */
+#define MEM_EXPR(RTX) (MEM_ATTRS (RTX) == 0 ? 0 : MEM_ATTRS (RTX)->expr)
+
+/* For a MEM rtx, the offset from the start of MEM_EXPR, if known, as a
+ RTX that is always a CONST_INT. */
+#define MEM_OFFSET(RTX) (MEM_ATTRS (RTX) == 0 ? 0 : MEM_ATTRS (RTX)->offset)
+
+/* For a MEM rtx, the size in bytes of the MEM, if known, as an RTX that
+ is always a CONST_INT. */
+#define MEM_SIZE(RTX) \
+(MEM_ATTRS (RTX) != 0 ? MEM_ATTRS (RTX)->size \
+ : GET_MODE (RTX) != BLKmode ? GEN_INT (GET_MODE_SIZE (GET_MODE (RTX))) \
+ : 0)
+
+/* For a MEM rtx, the alignment in bits. We can use the alignment of the
+ mode as a default when STRICT_ALIGNMENT, but not if not. */
+#define MEM_ALIGN(RTX) \
+(MEM_ATTRS (RTX) != 0 ? MEM_ATTRS (RTX)->align \
+ : (STRICT_ALIGNMENT && GET_MODE (RTX) != BLKmode \
+ ? GET_MODE_ALIGNMENT (GET_MODE (RTX)) : BITS_PER_UNIT))
+
+/* For a REG rtx, the decl it is known to refer to, if it is known to
+ refer to part of a DECL. */
+#define REG_EXPR(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->decl)
+
+/* For a REG rtx, the offset from the start of REG_EXPR, if known, as an
+ HOST_WIDE_INT. */
+#define REG_OFFSET(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->offset)
+
+/* Copy the attributes that apply to memory locations from RHS to LHS. */
+#define MEM_COPY_ATTRIBUTES(LHS, RHS) \
+ (MEM_VOLATILE_P (LHS) = MEM_VOLATILE_P (RHS), \
+ MEM_IN_STRUCT_P (LHS) = MEM_IN_STRUCT_P (RHS), \
+ MEM_SCALAR_P (LHS) = MEM_SCALAR_P (RHS), \
+ MEM_NOTRAP_P (LHS) = MEM_NOTRAP_P (RHS), \
+ MEM_READONLY_P (LHS) = MEM_READONLY_P (RHS), \
+ MEM_KEEP_ALIAS_SET_P (LHS) = MEM_KEEP_ALIAS_SET_P (RHS), \
+ MEM_POINTER (LHS) = MEM_POINTER (RHS), \
+ MEM_ATTRS (LHS) = MEM_ATTRS (RHS))
+
+/* 1 if RTX is a label_ref for a nonlocal label. */
+/* Likewise in an expr_list for a REG_LABEL_OPERAND or
+ REG_LABEL_TARGET note. */
+#define LABEL_REF_NONLOCAL_P(RTX) \
+ (RTL_FLAG_CHECK1("LABEL_REF_NONLOCAL_P", (RTX), LABEL_REF)->volatil)
+
+/* 1 if RTX is a code_label that should always be considered to be needed. */
+#define LABEL_PRESERVE_P(RTX) \
+ (RTL_FLAG_CHECK2("LABEL_PRESERVE_P", (RTX), CODE_LABEL, NOTE)->in_struct)
+
+/* During sched, 1 if RTX is an insn that must be scheduled together
+ with the preceding insn. */
+#define SCHED_GROUP_P(RTX) \
+ (RTL_FLAG_CHECK3("SCHED_GROUP_P", (RTX), INSN, JUMP_INSN, CALL_INSN \
+ )->in_struct)
+
+/* For a SET rtx, SET_DEST is the place that is set
+ and SET_SRC is the value it is set to. */
+#define SET_DEST(RTX) XC2EXP(RTX, 0, SET, CLOBBER)
+#define SET_SRC(RTX) XCEXP(RTX, 1, SET)
+#define SET_IS_RETURN_P(RTX) \
+ (RTL_FLAG_CHECK1("SET_IS_RETURN_P", (RTX), SET)->jump)
+
+/* For a TRAP_IF rtx, TRAP_CONDITION is an expression. */
+#define TRAP_CONDITION(RTX) XCEXP (RTX, 0, TRAP_IF)
+#define TRAP_CODE(RTX) XCEXP (RTX, 1, TRAP_IF)
+
+/* For a COND_EXEC rtx, COND_EXEC_TEST is the condition to base
+ conditionally executing the code on, COND_EXEC_CODE is the code
+ to execute if the condition is true. */
+#define COND_EXEC_TEST(RTX) XCEXP (RTX, 0, COND_EXEC)
+#define COND_EXEC_CODE(RTX) XCEXP (RTX, 1, COND_EXEC)
+
+/* 1 if RTX is a symbol_ref that addresses this function's rtl
+ constants pool. */
+#define CONSTANT_POOL_ADDRESS_P(RTX) \
+ (RTL_FLAG_CHECK1("CONSTANT_POOL_ADDRESS_P", (RTX), SYMBOL_REF)->unchanging)
+
+/* 1 if RTX is a symbol_ref that addresses a value in the file's
+ tree constant pool. This information is private to varasm.c. */
+#define TREE_CONSTANT_POOL_ADDRESS_P(RTX) \
+ (RTL_FLAG_CHECK1("TREE_CONSTANT_POOL_ADDRESS_P", \
+ (RTX), SYMBOL_REF)->frame_related)
+
+/* Used if RTX is a symbol_ref, for machine-specific purposes. */
+#define SYMBOL_REF_FLAG(RTX) \
+ (RTL_FLAG_CHECK1("SYMBOL_REF_FLAG", (RTX), SYMBOL_REF)->volatil)
+
+/* 1 if RTX is a symbol_ref that has been the library function in
+ emit_library_call. */
+#define SYMBOL_REF_USED(RTX) \
+ (RTL_FLAG_CHECK1("SYMBOL_REF_USED", (RTX), SYMBOL_REF)->used)
+
+/* 1 if RTX is a symbol_ref for a weak symbol. */
+#define SYMBOL_REF_WEAK(RTX) \
+ (RTL_FLAG_CHECK1("SYMBOL_REF_WEAK", (RTX), SYMBOL_REF)->return_val)
+
+/* A pointer attached to the SYMBOL_REF; either SYMBOL_REF_DECL or
+ SYMBOL_REF_CONSTANT. */
+#define SYMBOL_REF_DATA(RTX) X0ANY ((RTX), 2)
+
+/* Set RTX's SYMBOL_REF_DECL to DECL. RTX must not be a constant
+ pool symbol. */
+#define SET_SYMBOL_REF_DECL(RTX, DECL) \
+ (gcc_assert (!CONSTANT_POOL_ADDRESS_P (RTX)), X0TREE ((RTX), 2) = (DECL))
+
+/* The tree (decl or constant) associated with the symbol, or null. */
+#define SYMBOL_REF_DECL(RTX) \
+ (CONSTANT_POOL_ADDRESS_P (RTX) ? NULL : X0TREE ((RTX), 2))
+
+/* Set RTX's SYMBOL_REF_CONSTANT to C. RTX must be a constant pool symbol. */
+#define SET_SYMBOL_REF_CONSTANT(RTX, C) \
+ (gcc_assert (CONSTANT_POOL_ADDRESS_P (RTX)), X0CONSTANT ((RTX), 2) = (C))
+
+/* The rtx constant pool entry for a symbol, or null. */
+#define SYMBOL_REF_CONSTANT(RTX) \
+ (CONSTANT_POOL_ADDRESS_P (RTX) ? X0CONSTANT ((RTX), 2) : NULL)
+
+/* A set of flags on a symbol_ref that are, in some respects, redundant with
+ information derivable from the tree decl associated with this symbol.
+ Except that we build a *lot* of SYMBOL_REFs that aren't associated with a
+ decl. In some cases this is a bug. But beyond that, it's nice to cache
+ this information to avoid recomputing it. Finally, this allows space for
+ the target to store more than one bit of information, as with
+ SYMBOL_REF_FLAG. */
+#define SYMBOL_REF_FLAGS(RTX) X0INT ((RTX), 1)
+
+/* These flags are common enough to be defined for all targets. They
+ are computed by the default version of targetm.encode_section_info. */
+
+/* Set if this symbol is a function. */
+#define SYMBOL_FLAG_FUNCTION (1 << 0)
+#define SYMBOL_REF_FUNCTION_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_FUNCTION) != 0)
+/* Set if targetm.binds_local_p is true. */
+#define SYMBOL_FLAG_LOCAL (1 << 1)
+#define SYMBOL_REF_LOCAL_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_LOCAL) != 0)
+/* Set if targetm.in_small_data_p is true. */
+#define SYMBOL_FLAG_SMALL (1 << 2)
+#define SYMBOL_REF_SMALL_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_SMALL) != 0)
+/* The three-bit field at [5:3] is true for TLS variables; use
+ SYMBOL_REF_TLS_MODEL to extract the field as an enum tls_model. */
+#define SYMBOL_FLAG_TLS_SHIFT 3
+#define SYMBOL_REF_TLS_MODEL(RTX) \
+ ((enum tls_model) ((SYMBOL_REF_FLAGS (RTX) >> SYMBOL_FLAG_TLS_SHIFT) & 7))
+/* Set if this symbol is not defined in this translation unit. */
+#define SYMBOL_FLAG_EXTERNAL (1 << 6)
+#define SYMBOL_REF_EXTERNAL_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_EXTERNAL) != 0)
+/* Set if this symbol has a block_symbol structure associated with it. */
+#define SYMBOL_FLAG_HAS_BLOCK_INFO (1 << 7)
+#define SYMBOL_REF_HAS_BLOCK_INFO_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_HAS_BLOCK_INFO) != 0)
+/* Set if this symbol is a section anchor. SYMBOL_REF_ANCHOR_P implies
+ SYMBOL_REF_HAS_BLOCK_INFO_P. */
+#define SYMBOL_FLAG_ANCHOR (1 << 8)
+#define SYMBOL_REF_ANCHOR_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_ANCHOR) != 0)
+
+/* Subsequent bits are available for the target to use. */
+#define SYMBOL_FLAG_MACH_DEP_SHIFT 9
+#define SYMBOL_FLAG_MACH_DEP (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
+
+/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the object_block
+ structure to which the symbol belongs, or NULL if it has not been
+ assigned a block. */
+#define SYMBOL_REF_BLOCK(RTX) (BLOCK_SYMBOL_CHECK (RTX)->block)
+
+/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the offset of RTX from
+ the first object in SYMBOL_REF_BLOCK (RTX). The value is negative if
+ RTX has not yet been assigned to a block, or it has not been given an
+ offset within that block. */
+#define SYMBOL_REF_BLOCK_OFFSET(RTX) (BLOCK_SYMBOL_CHECK (RTX)->offset)
+
+/* Indicate whether the machine has any sort of auto increment addressing.
+ If not, we can avoid checking for REG_INC notes. */
+
+#if (defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) \
+ || defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) \
+ || defined (HAVE_PRE_MODIFY_DISP) || defined (HAVE_PRE_MODIFY_DISP) \
+ || defined (HAVE_PRE_MODIFY_REG) || defined (HAVE_POST_MODIFY_REG))
+#define AUTO_INC_DEC
+#endif
+
+/* Define a macro to look for REG_INC notes,
+ but save time on machines where they never exist. */
+
+#ifdef AUTO_INC_DEC
+#define FIND_REG_INC_NOTE(INSN, REG) \
+ ((REG) != NULL_RTX && REG_P ((REG)) \
+ ? find_regno_note ((INSN), REG_INC, REGNO (REG)) \
+ : find_reg_note ((INSN), REG_INC, (REG)))
+#else
+#define FIND_REG_INC_NOTE(INSN, REG) 0
+#endif
+
+#ifndef HAVE_PRE_INCREMENT
+#define HAVE_PRE_INCREMENT 0
+#endif
+
+#ifndef HAVE_PRE_DECREMENT
+#define HAVE_PRE_DECREMENT 0
+#endif
+
+#ifndef HAVE_POST_INCREMENT
+#define HAVE_POST_INCREMENT 0
+#endif
+
+#ifndef HAVE_POST_DECREMENT
+#define HAVE_POST_DECREMENT 0
+#endif
+
+#ifndef HAVE_POST_MODIFY_DISP
+#define HAVE_POST_MODIFY_DISP 0
+#endif
+
+#ifndef HAVE_POST_MODIFY_REG
+#define HAVE_POST_MODIFY_REG 0
+#endif
+
+#ifndef HAVE_PRE_MODIFY_DISP
+#define HAVE_PRE_MODIFY_DISP 0
+#endif
+
+#ifndef HAVE_PRE_MODIFY_REG
+#define HAVE_PRE_MODIFY_REG 0
+#endif
+
+
+/* Some architectures do not have complete pre/post increment/decrement
+ instruction sets, or only move some modes efficiently. These macros
+ allow us to tune autoincrement generation. */
+
+#ifndef USE_LOAD_POST_INCREMENT
+#define USE_LOAD_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
+#endif
+
+#ifndef USE_LOAD_POST_DECREMENT
+#define USE_LOAD_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
+#endif
+
+#ifndef USE_LOAD_PRE_INCREMENT
+#define USE_LOAD_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
+#endif
+
+#ifndef USE_LOAD_PRE_DECREMENT
+#define USE_LOAD_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
+#endif
+
+#ifndef USE_STORE_POST_INCREMENT
+#define USE_STORE_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
+#endif
+
+#ifndef USE_STORE_POST_DECREMENT
+#define USE_STORE_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
+#endif
+
+#ifndef USE_STORE_PRE_INCREMENT
+#define USE_STORE_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
+#endif
+
+#ifndef USE_STORE_PRE_DECREMENT
+#define USE_STORE_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
+#endif
+
+/* Nonzero when we are generating CONCATs. */
+extern int generating_concat_p;
+
+/* Nonzero when we are expanding trees to RTL. */
+extern int currently_expanding_to_rtl;
+
+/* Generally useful functions. */
+
+/* In expmed.c */
+extern int ceil_log2 (unsigned HOST_WIDE_INT);
+
+/* In explow.c */
+extern void set_stack_check_libfunc (rtx);
+extern HOST_WIDE_INT trunc_int_for_mode (HOST_WIDE_INT, enum machine_mode);
+extern rtx plus_constant (rtx, HOST_WIDE_INT);
+
+/* In emit-rtl.c */
+extern rtx gen_blockage (void);
+extern rtvec gen_rtvec (int, ...);
+extern rtx copy_insn_1 (rtx);
+extern rtx copy_insn (rtx);
+extern rtx gen_int_mode (HOST_WIDE_INT, enum machine_mode);
+extern rtx emit_copy_of_insn_after (rtx, rtx);
+extern void set_reg_attrs_from_value (rtx, rtx);
+extern void set_mem_attrs_from_reg (rtx, rtx);
+extern void set_reg_attrs_for_parm (rtx, rtx);
+extern void adjust_reg_mode (rtx, enum machine_mode);
+extern int mem_expr_equal_p (const_tree, const_tree);
+
+/* In rtl.c */
+extern rtx rtx_alloc_stat (RTX_CODE MEM_STAT_DECL);
+#define rtx_alloc(c) rtx_alloc_stat (c MEM_STAT_INFO)
+
+extern rtvec rtvec_alloc (int);
+extern bool shared_const_p (const_rtx);
+extern rtx copy_rtx (rtx);
+extern void dump_rtx_statistics (void);
+
+/* In emit-rtl.c */
+extern rtx copy_rtx_if_shared (rtx);
+
+/* In rtl.c */
+extern unsigned int rtx_size (const_rtx);
+extern rtx shallow_copy_rtx_stat (const_rtx MEM_STAT_DECL);
+#define shallow_copy_rtx(a) shallow_copy_rtx_stat (a MEM_STAT_INFO)
+extern int rtx_equal_p (const_rtx, const_rtx);
+
+/* In emit-rtl.c */
+extern rtvec gen_rtvec_v (int, rtx *);
+extern rtx gen_reg_rtx (enum machine_mode);
+extern rtx gen_rtx_REG_offset (rtx, enum machine_mode, unsigned int, int);
+extern rtx gen_reg_rtx_offset (rtx, enum machine_mode, int);
+extern rtx gen_reg_rtx_and_attrs (rtx);
+extern rtx gen_label_rtx (void);
+extern rtx gen_lowpart_common (enum machine_mode, rtx);
+
+/* In cse.c */
+extern rtx gen_lowpart_if_possible (enum machine_mode, rtx);
+
+/* In emit-rtl.c */
+extern rtx gen_highpart (enum machine_mode, rtx);
+extern rtx gen_highpart_mode (enum machine_mode, enum machine_mode, rtx);
+extern rtx operand_subword (rtx, unsigned int, int, enum machine_mode);
+
+/* In emit-rtl.c */
+extern rtx operand_subword_force (rtx, unsigned int, enum machine_mode);
+extern int subreg_lowpart_p (const_rtx);
+extern unsigned int subreg_lowpart_offset (enum machine_mode,
+ enum machine_mode);
+extern unsigned int subreg_highpart_offset (enum machine_mode,
+ enum machine_mode);
+extern int byte_lowpart_offset (enum machine_mode, enum machine_mode);
+extern rtx make_safe_from (rtx, rtx);
+extern rtx convert_memory_address (enum machine_mode, rtx);
+extern rtx get_insns (void);
+extern const char *get_insn_name (int);
+extern rtx get_last_insn (void);
+extern rtx get_last_insn_anywhere (void);
+extern rtx get_first_nonnote_insn (void);
+extern rtx get_last_nonnote_insn (void);
+extern void start_sequence (void);
+extern void push_to_sequence (rtx);
+extern void push_to_sequence2 (rtx, rtx);
+extern void end_sequence (void);
+extern rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT,
+ enum machine_mode);
+
+/* In loop-iv.c */
+
+extern rtx lowpart_subreg (enum machine_mode, rtx, enum machine_mode);
+
+/* In varasm.c */
+extern rtx force_const_mem (enum machine_mode, rtx);
+
+/* In varasm.c */
+
+struct function;
+extern rtx get_pool_constant (rtx);
+extern rtx get_pool_constant_mark (rtx, bool *);
+extern enum machine_mode get_pool_mode (const_rtx);
+extern rtx simplify_subtraction (rtx);
+
+/* In function.c */
+extern rtx assign_stack_local (enum machine_mode, HOST_WIDE_INT, int);
+extern rtx assign_stack_local_1 (enum machine_mode, HOST_WIDE_INT, int, bool);
+extern rtx assign_stack_temp (enum machine_mode, HOST_WIDE_INT, int);
+extern rtx assign_stack_temp_for_type (enum machine_mode,
+ HOST_WIDE_INT, int, tree);
+extern rtx assign_temp (tree, int, int, int);
+
+/* In emit-rtl.c */
+extern rtx emit_insn_before (rtx, rtx);
+extern rtx emit_insn_before_noloc (rtx, rtx, struct basic_block_def *);
+extern rtx emit_insn_before_setloc (rtx, rtx, int);
+extern rtx emit_jump_insn_before (rtx, rtx);
+extern rtx emit_jump_insn_before_noloc (rtx, rtx);
+extern rtx emit_jump_insn_before_setloc (rtx, rtx, int);
+extern rtx emit_call_insn_before (rtx, rtx);
+extern rtx emit_call_insn_before_noloc (rtx, rtx);
+extern rtx emit_call_insn_before_setloc (rtx, rtx, int);
+extern rtx emit_barrier_before (rtx);
+extern rtx emit_label_before (rtx, rtx);
+extern rtx emit_note_before (enum insn_note, rtx);
+extern rtx emit_insn_after (rtx, rtx);
+extern rtx emit_insn_after_noloc (rtx, rtx, struct basic_block_def *);
+extern rtx emit_insn_after_setloc (rtx, rtx, int);
+extern rtx emit_jump_insn_after (rtx, rtx);
+extern rtx emit_jump_insn_after_noloc (rtx, rtx);
+extern rtx emit_jump_insn_after_setloc (rtx, rtx, int);
+extern rtx emit_call_insn_after (rtx, rtx);
+extern rtx emit_call_insn_after_noloc (rtx, rtx);
+extern rtx emit_call_insn_after_setloc (rtx, rtx, int);
+extern rtx emit_barrier_after (rtx);
+extern rtx emit_label_after (rtx, rtx);
+extern rtx emit_note_after (enum insn_note, rtx);
+extern rtx emit_insn (rtx);
+extern rtx emit_jump_insn (rtx);
+extern rtx emit_call_insn (rtx);
+extern rtx emit_label (rtx);
+extern rtx emit_barrier (void);
+extern rtx emit_note (enum insn_note);
+extern rtx emit_note_copy (rtx);
+extern rtx gen_clobber (rtx);
+extern rtx emit_clobber (rtx);
+extern rtx gen_use (rtx);
+extern rtx emit_use (rtx);
+extern rtx make_insn_raw (rtx);
+extern rtx make_jump_insn_raw (rtx);
+extern void add_function_usage_to (rtx, rtx);
+extern rtx last_call_insn (void);
+extern rtx previous_insn (rtx);
+extern rtx next_insn (rtx);
+extern rtx prev_nonnote_insn (rtx);
+extern rtx next_nonnote_insn (rtx);
+extern rtx prev_real_insn (rtx);
+extern rtx next_real_insn (rtx);
+extern rtx prev_active_insn (rtx);
+extern rtx next_active_insn (rtx);
+extern int active_insn_p (const_rtx);
+extern rtx prev_label (rtx);
+extern rtx next_label (rtx);
+extern rtx skip_consecutive_labels (rtx);
+extern rtx next_cc0_user (rtx);
+extern rtx prev_cc0_setter (rtx);
+
+/* In cfglayout.c */
+extern int insn_line (const_rtx);
+extern const char * insn_file (const_rtx);
+extern int insn_discriminator (const_rtx);
+extern location_t locator_location (int);
+extern int locator_line (int);
+extern const char * locator_file (int);
+extern bool locator_eq (int, int);
+extern int prologue_locator, epilogue_locator;
+
+/* In jump.c */
+extern enum rtx_code reverse_condition (enum rtx_code);
+extern enum rtx_code reverse_condition_maybe_unordered (enum rtx_code);
+extern enum rtx_code swap_condition (enum rtx_code);
+extern enum rtx_code unsigned_condition (enum rtx_code);
+extern enum rtx_code signed_condition (enum rtx_code);
+extern void mark_jump_label (rtx, rtx, int);
+extern unsigned int cleanup_barriers (void);
+
+/* In jump.c */
+extern rtx delete_related_insns (rtx);
+
+/* In recog.c */
+extern rtx *find_constant_term_loc (rtx *);
+
+/* In emit-rtl.c */
+extern rtx try_split (rtx, rtx, int);
+extern int split_branch_probability;
+
+/* In unknown file */
+extern rtx split_insns (rtx, rtx);
+
+/* In simplify-rtx.c */
+extern rtx simplify_const_unary_operation (enum rtx_code, enum machine_mode,
+ rtx, enum machine_mode);
+extern rtx simplify_unary_operation (enum rtx_code, enum machine_mode, rtx,
+ enum machine_mode);
+extern rtx simplify_const_binary_operation (enum rtx_code, enum machine_mode,
+ rtx, rtx);
+extern rtx simplify_binary_operation (enum rtx_code, enum machine_mode, rtx,
+ rtx);
+extern rtx simplify_ternary_operation (enum rtx_code, enum machine_mode,
+ enum machine_mode, rtx, rtx, rtx);
+extern rtx simplify_const_relational_operation (enum rtx_code,
+ enum machine_mode, rtx, rtx);
+extern rtx simplify_relational_operation (enum rtx_code, enum machine_mode,
+ enum machine_mode, rtx, rtx);
+extern rtx simplify_gen_binary (enum rtx_code, enum machine_mode, rtx, rtx);
+extern rtx simplify_gen_unary (enum rtx_code, enum machine_mode, rtx,
+ enum machine_mode);
+extern rtx simplify_gen_ternary (enum rtx_code, enum machine_mode,
+ enum machine_mode, rtx, rtx, rtx);
+extern rtx simplify_gen_relational (enum rtx_code, enum machine_mode,
+ enum machine_mode, rtx, rtx);
+extern rtx simplify_subreg (enum machine_mode, rtx, enum machine_mode,
+ unsigned int);
+extern rtx simplify_gen_subreg (enum machine_mode, rtx, enum machine_mode,
+ unsigned int);
+extern rtx simplify_replace_rtx (rtx, const_rtx, rtx);
+extern rtx simplify_rtx (const_rtx);
+extern rtx avoid_constant_pool_reference (rtx);
+extern bool mode_signbit_p (enum machine_mode, const_rtx);
+
+/* In reginfo.c */
+extern enum machine_mode choose_hard_reg_mode (unsigned int, unsigned int,
+ bool);
+
+/* In emit-rtl.c */
+extern rtx set_unique_reg_note (rtx, enum reg_note, rtx);
+extern void set_insn_deleted (rtx);
+
+/* Functions in rtlanal.c */
+
+/* Single set is implemented as macro for performance reasons. */
+#define single_set(I) (INSN_P (I) \
+ ? (GET_CODE (PATTERN (I)) == SET \
+ ? PATTERN (I) : single_set_1 (I)) \
+ : NULL_RTX)
+#define single_set_1(I) single_set_2 (I, PATTERN (I))
+
+/* Structure used for passing data to REPLACE_LABEL. */
+typedef struct replace_label_data
+{
+ rtx r1;
+ rtx r2;
+ bool update_label_nuses;
+} replace_label_data;
+
+extern int rtx_addr_can_trap_p (const_rtx);
+extern bool nonzero_address_p (const_rtx);
+extern int rtx_unstable_p (const_rtx);
+extern bool rtx_varies_p (const_rtx, bool);
+extern bool rtx_addr_varies_p (const_rtx, bool);
+extern HOST_WIDE_INT get_integer_term (const_rtx);
+extern rtx get_related_value (const_rtx);
+extern bool offset_within_block_p (const_rtx, HOST_WIDE_INT);
+extern void split_const (rtx, rtx *, rtx *);
+extern int reg_mentioned_p (const_rtx, const_rtx);
+extern int count_occurrences (const_rtx, const_rtx, int);
+extern int reg_referenced_p (const_rtx, const_rtx);
+extern int reg_used_between_p (const_rtx, const_rtx, const_rtx);
+extern int reg_set_between_p (const_rtx, const_rtx, const_rtx);
+extern int commutative_operand_precedence (rtx);
+extern bool swap_commutative_operands_p (rtx, rtx);
+extern int modified_between_p (const_rtx, const_rtx, const_rtx);
+extern int no_labels_between_p (const_rtx, const_rtx);
+extern int modified_in_p (const_rtx, const_rtx);
+extern int reg_set_p (const_rtx, const_rtx);
+extern rtx single_set_2 (const_rtx, const_rtx);
+extern int multiple_sets (const_rtx);
+extern int set_noop_p (const_rtx);
+extern int noop_move_p (const_rtx);
+extern rtx find_last_value (rtx, rtx *, rtx, int);
+extern int refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
+extern int reg_overlap_mentioned_p (const_rtx, const_rtx);
+extern const_rtx set_of (const_rtx, const_rtx);
+extern void note_stores (const_rtx, void (*) (rtx, const_rtx, void *), void *);
+extern void note_uses (rtx *, void (*) (rtx *, void *), void *);
+extern int dead_or_set_p (const_rtx, const_rtx);
+extern int dead_or_set_regno_p (const_rtx, unsigned int);
+extern rtx find_reg_note (const_rtx, enum reg_note, const_rtx);
+extern rtx find_regno_note (const_rtx, enum reg_note, unsigned int);
+extern rtx find_reg_equal_equiv_note (const_rtx);
+extern rtx find_constant_src (const_rtx);
+extern int find_reg_fusage (const_rtx, enum rtx_code, const_rtx);
+extern int find_regno_fusage (const_rtx, enum rtx_code, unsigned int);
+extern rtx alloc_reg_note (enum reg_note, rtx, rtx);
+extern void add_reg_note (rtx, enum reg_note, rtx);
+extern void remove_note (rtx, const_rtx);
+extern void remove_reg_equal_equiv_notes (rtx);
+extern int side_effects_p (const_rtx);
+extern int volatile_refs_p (const_rtx);
+extern int volatile_insn_p (const_rtx);
+extern int may_trap_p_1 (const_rtx, unsigned);
+extern int may_trap_p (const_rtx);
+extern int may_trap_or_fault_p (const_rtx);
+extern int inequality_comparisons_p (const_rtx);
+extern rtx replace_rtx (rtx, rtx, rtx);
+extern int replace_label (rtx *, void *);
+extern int rtx_referenced_p (rtx, rtx);
+extern bool tablejump_p (const_rtx, rtx *, rtx *);
+extern int computed_jump_p (const_rtx);
+
+typedef int (*rtx_function) (rtx *, void *);
+extern int for_each_rtx (rtx *, rtx_function, void *);
+
+typedef int (*rtx_equal_p_callback_function) (const_rtx *, const_rtx *,
+ rtx *, rtx *);
+extern int rtx_equal_p_cb (const_rtx, const_rtx,
+ rtx_equal_p_callback_function);
+
+typedef int (*hash_rtx_callback_function) (const_rtx, enum machine_mode, rtx *,
+ enum machine_mode *);
+extern unsigned hash_rtx_cb (const_rtx, enum machine_mode, int *, int *,
+ bool, hash_rtx_callback_function);
+
+extern rtx regno_use_in (unsigned int, rtx);
+extern int auto_inc_p (const_rtx);
+extern int in_expr_list_p (const_rtx, const_rtx);
+extern void remove_node_from_expr_list (const_rtx, rtx *);
+extern int loc_mentioned_in_p (rtx *, const_rtx);
+extern rtx find_first_parameter_load (rtx, rtx);
+extern bool keep_with_call_p (const_rtx);
+extern bool label_is_jump_target_p (const_rtx, const_rtx);
+extern int insn_rtx_cost (rtx, bool);
+
+/* Given an insn and condition, return a canonical description of
+ the test being made. */
+extern rtx canonicalize_condition (rtx, rtx, int, rtx *, rtx, int, int);
+
+/* Given a JUMP_INSN, return a canonical description of the test
+ being made. */
+extern rtx get_condition (rtx, rtx *, int, int);
+
+/* lists.c */
+
+extern void free_EXPR_LIST_list (rtx *);
+extern void free_INSN_LIST_list (rtx *);
+extern void free_EXPR_LIST_node (rtx);
+extern void free_INSN_LIST_node (rtx);
+extern rtx alloc_INSN_LIST (rtx, rtx);
+extern rtx alloc_EXPR_LIST (int, rtx, rtx);
+extern void remove_free_INSN_LIST_elem (rtx, rtx *);
+extern rtx remove_list_elem (rtx, rtx *);
+extern rtx remove_free_INSN_LIST_node (rtx *);
+extern rtx remove_free_EXPR_LIST_node (rtx *);
+
+
+/* reginfo.c */
+
+/* Initialize may_move_cost and friends for mode M. */
+extern void init_move_cost (enum machine_mode);
+/* Allocate register info memory. */
+extern void allocate_reg_info (void);
+/* Resize reg info. */
+extern void resize_reg_info (void);
+/* Free up register info memory. */
+extern void free_reg_info (void);
+
+/* recog.c */
+extern int asm_noperands (const_rtx);
+extern const char *decode_asm_operands (rtx, rtx *, rtx **, const char **,
+ enum machine_mode *, location_t *);
+
+extern enum reg_class reg_preferred_class (int);
+extern enum reg_class reg_alternate_class (int);
+extern void setup_reg_classes (int, enum reg_class, enum reg_class);
+
+extern void split_all_insns (void);
+extern unsigned int split_all_insns_noflow (void);
+
+#define MAX_SAVED_CONST_INT 64
+extern GTY(()) rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
+
+#define const0_rtx (const_int_rtx[MAX_SAVED_CONST_INT])
+#define const1_rtx (const_int_rtx[MAX_SAVED_CONST_INT+1])
+#define const2_rtx (const_int_rtx[MAX_SAVED_CONST_INT+2])
+#define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1])
+extern GTY(()) rtx const_true_rtx;
+
+extern GTY(()) rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+
+/* Returns a constant 0 rtx in mode MODE. Integer modes are treated the
+ same as VOIDmode. */
+
+#define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)])
+
+/* Likewise, for the constants 1 and 2. */
+
+#define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)])
+#define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)])
+
+/* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg
+ is used to represent the frame pointer. This is because the
+ hard frame pointer and the automatic variables are separated by an amount
+ that cannot be determined until after register allocation. We can assume
+ that in this case ELIMINABLE_REGS will be defined, one action of which
+ will be to eliminate FRAME_POINTER_REGNUM into HARD_FRAME_POINTER_REGNUM. */
+#ifndef HARD_FRAME_POINTER_REGNUM
+#define HARD_FRAME_POINTER_REGNUM FRAME_POINTER_REGNUM
+#endif
+
+/* Index labels for global_rtl. */
+enum global_rtl_index
+{
+ GR_PC,
+ GR_CC0,
+ GR_STACK_POINTER,
+ GR_FRAME_POINTER,
+/* For register elimination to work properly these hard_frame_pointer_rtx,
+ frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
+ the same register. */
+#if FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM
+ GR_ARG_POINTER = GR_FRAME_POINTER,
+#endif
+#if HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM
+ GR_HARD_FRAME_POINTER = GR_FRAME_POINTER,
+#else
+ GR_HARD_FRAME_POINTER,
+#endif
+#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
+#if HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM
+ GR_ARG_POINTER = GR_HARD_FRAME_POINTER,
+#else
+ GR_ARG_POINTER,
+#endif
+#endif
+ GR_VIRTUAL_INCOMING_ARGS,
+ GR_VIRTUAL_STACK_ARGS,
+ GR_VIRTUAL_STACK_DYNAMIC,
+ GR_VIRTUAL_OUTGOING_ARGS,
+ GR_VIRTUAL_CFA,
+
+ GR_MAX
+};
+
+/* Pointers to standard pieces of rtx are stored here. */
+extern GTY(()) rtx global_rtl[GR_MAX];
+
+/* Standard pieces of rtx, to be substituted directly into things. */
+#define pc_rtx (global_rtl[GR_PC])
+#define cc0_rtx (global_rtl[GR_CC0])
+
+/* All references to certain hard regs, except those created
+ by allocating pseudo regs into them (when that's possible),
+ go through these unique rtx objects. */
+#define stack_pointer_rtx (global_rtl[GR_STACK_POINTER])
+#define frame_pointer_rtx (global_rtl[GR_FRAME_POINTER])
+#define hard_frame_pointer_rtx (global_rtl[GR_HARD_FRAME_POINTER])
+#define arg_pointer_rtx (global_rtl[GR_ARG_POINTER])
+
+extern GTY(()) rtx pic_offset_table_rtx;
+extern GTY(()) rtx static_chain_rtx;
+extern GTY(()) rtx static_chain_incoming_rtx;
+extern GTY(()) rtx return_address_pointer_rtx;
+
+/* Include the RTL generation functions. */
+
+#ifndef GENERATOR_FILE
+#include "genrtl.h"
+#undef gen_rtx_ASM_INPUT
+#define gen_rtx_ASM_INPUT(MODE, ARG0) \
+ gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), 0)
+#define gen_rtx_ASM_INPUT_loc(MODE, ARG0, LOC) \
+ gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), (LOC))
+#endif
+
+/* There are some RTL codes that require special attention; the
+ generation functions included above do the raw handling. If you
+ add to this list, modify special_rtx in gengenrtl.c as well. */
+
+extern rtx gen_rtx_CONST_INT (enum machine_mode, HOST_WIDE_INT);
+extern rtx gen_rtx_CONST_VECTOR (enum machine_mode, rtvec);
+extern rtx gen_raw_REG (enum machine_mode, int);
+extern rtx gen_rtx_REG (enum machine_mode, unsigned);
+extern rtx gen_rtx_SUBREG (enum machine_mode, rtx, int);
+extern rtx gen_rtx_MEM (enum machine_mode, rtx);
+
+#define GEN_INT(N) gen_rtx_CONST_INT (VOIDmode, (N))
+
+/* Virtual registers are used during RTL generation to refer to locations into
+ the stack frame when the actual location isn't known until RTL generation
+ is complete. The routine instantiate_virtual_regs replaces these with
+ the proper value, which is normally {frame,arg,stack}_pointer_rtx plus
+ a constant. */
+
+#define FIRST_VIRTUAL_REGISTER (FIRST_PSEUDO_REGISTER)
+
+/* This points to the first word of the incoming arguments passed on the stack,
+ either by the caller or by the callee when pretending it was passed by the
+ caller. */
+
+#define virtual_incoming_args_rtx (global_rtl[GR_VIRTUAL_INCOMING_ARGS])
+
+#define VIRTUAL_INCOMING_ARGS_REGNUM (FIRST_VIRTUAL_REGISTER)
+
+/* If FRAME_GROWS_DOWNWARD, this points to immediately above the first
+ variable on the stack. Otherwise, it points to the first variable on
+ the stack. */
+
+#define virtual_stack_vars_rtx (global_rtl[GR_VIRTUAL_STACK_ARGS])
+
+#define VIRTUAL_STACK_VARS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 1)
+
+/* This points to the location of dynamically-allocated memory on the stack
+ immediately after the stack pointer has been adjusted by the amount
+ desired. */
+
+#define virtual_stack_dynamic_rtx (global_rtl[GR_VIRTUAL_STACK_DYNAMIC])
+
+#define VIRTUAL_STACK_DYNAMIC_REGNUM ((FIRST_VIRTUAL_REGISTER) + 2)
+
+/* This points to the location in the stack at which outgoing arguments should
+ be written when the stack is pre-pushed (arguments pushed using push
+ insns always use sp). */
+
+#define virtual_outgoing_args_rtx (global_rtl[GR_VIRTUAL_OUTGOING_ARGS])
+
+#define VIRTUAL_OUTGOING_ARGS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 3)
+
+/* This points to the Canonical Frame Address of the function. This
+ should correspond to the CFA produced by INCOMING_FRAME_SP_OFFSET,
+ but is calculated relative to the arg pointer for simplicity; the
+ frame pointer nor stack pointer are necessarily fixed relative to
+ the CFA until after reload. */
+
+#define virtual_cfa_rtx (global_rtl[GR_VIRTUAL_CFA])
+
+#define VIRTUAL_CFA_REGNUM ((FIRST_VIRTUAL_REGISTER) + 4)
+
+#define LAST_VIRTUAL_REGISTER ((FIRST_VIRTUAL_REGISTER) + 4)
+
+/* Nonzero if REGNUM is a pointer into the stack frame. */
+#define REGNO_PTR_FRAME_P(REGNUM) \
+ ((REGNUM) == STACK_POINTER_REGNUM \
+ || (REGNUM) == FRAME_POINTER_REGNUM \
+ || (REGNUM) == HARD_FRAME_POINTER_REGNUM \
+ || (REGNUM) == ARG_POINTER_REGNUM \
+ || ((REGNUM) >= FIRST_VIRTUAL_REGISTER \
+ && (REGNUM) <= LAST_VIRTUAL_REGISTER))
+
+/* REGNUM never really appearing in the INSN stream. */
+#define INVALID_REGNUM (~(unsigned int) 0)
+
+extern rtx output_constant_def (tree, int);
+extern rtx lookup_constant_def (tree);
+
+/* Nonzero after end of reload pass.
+ Set to 1 or 0 by reload1.c. */
+
+extern int reload_completed;
+
+/* Nonzero after thread_prologue_and_epilogue_insns has run. */
+extern int epilogue_completed;
+
+/* Set to 1 while reload_as_needed is operating.
+ Required by some machines to handle any generated moves differently. */
+
+extern int reload_in_progress;
+
+/* This macro indicates whether you may create a new
+ pseudo-register. */
+
+#define can_create_pseudo_p() (!reload_in_progress && !reload_completed)
+
+#ifdef STACK_REGS
+/* Nonzero after end of regstack pass.
+ Set to 1 or 0 by reg-stack.c. */
+extern int regstack_completed;
+#endif
+
+/* If this is nonzero, we do not bother generating VOLATILE
+ around volatile memory references, and we are willing to
+ output indirect addresses. If cse is to follow, we reject
+ indirect addresses so a useful potential cse is generated;
+ if it is used only once, instruction combination will produce
+ the same indirect address eventually. */
+extern int cse_not_expected;
+
+/* Translates rtx code to tree code, for those codes needed by
+ REAL_ARITHMETIC. The function returns an int because the caller may not
+ know what `enum tree_code' means. */
+
+extern int rtx_to_tree_code (enum rtx_code);
+
+/* In cse.c */
+extern int delete_trivially_dead_insns (rtx, int);
+extern int cse_main (rtx, int);
+extern int exp_equiv_p (const_rtx, const_rtx, int, bool);
+extern unsigned hash_rtx (const_rtx x, enum machine_mode, int *, int *, bool);
+
+/* In jump.c */
+extern int comparison_dominates_p (enum rtx_code, enum rtx_code);
+extern int condjump_p (const_rtx);
+extern int any_condjump_p (const_rtx);
+extern int any_uncondjump_p (const_rtx);
+extern rtx pc_set (const_rtx);
+extern rtx condjump_label (const_rtx);
+extern int simplejump_p (const_rtx);
+extern int returnjump_p (rtx);
+extern int eh_returnjump_p (rtx);
+extern int onlyjump_p (const_rtx);
+extern int only_sets_cc0_p (const_rtx);
+extern int sets_cc0_p (const_rtx);
+extern int invert_jump_1 (rtx, rtx);
+extern int invert_jump (rtx, rtx, int);
+extern int rtx_renumbered_equal_p (const_rtx, const_rtx);
+extern int true_regnum (const_rtx);
+extern unsigned int reg_or_subregno (const_rtx);
+extern int redirect_jump_1 (rtx, rtx);
+extern void redirect_jump_2 (rtx, rtx, rtx, int, int);
+extern int redirect_jump (rtx, rtx, int);
+extern void rebuild_jump_labels (rtx);
+extern rtx reversed_comparison (const_rtx, enum machine_mode);
+extern enum rtx_code reversed_comparison_code (const_rtx, const_rtx);
+extern enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx,
+ const_rtx, const_rtx);
+extern void delete_for_peephole (rtx, rtx);
+extern int condjump_in_parallel_p (const_rtx);
+
+/* In emit-rtl.c. */
+extern int max_reg_num (void);
+extern int max_label_num (void);
+extern int get_first_label_num (void);
+extern void maybe_set_first_label_num (rtx);
+extern void delete_insns_since (rtx);
+extern void mark_reg_pointer (rtx, int);
+extern void mark_user_reg (rtx);
+extern void reset_used_flags (rtx);
+extern void set_used_flags (rtx);
+extern void reorder_insns (rtx, rtx, rtx);
+extern void reorder_insns_nobb (rtx, rtx, rtx);
+extern int get_max_uid (void);
+extern int in_sequence_p (void);
+extern void force_next_line_note (void);
+extern void init_emit (void);
+extern void init_emit_regs (void);
+extern void init_emit_once (int);
+extern void push_topmost_sequence (void);
+extern void pop_topmost_sequence (void);
+extern void set_new_first_and_last_insn (rtx, rtx);
+extern unsigned int unshare_all_rtl (void);
+extern void unshare_all_rtl_again (rtx);
+extern void unshare_all_rtl_in_chain (rtx);
+extern void verify_rtl_sharing (void);
+extern void set_first_insn (rtx);
+extern void set_last_insn (rtx);
+extern void link_cc0_insns (rtx);
+extern void add_insn (rtx);
+extern void add_insn_before (rtx, rtx, struct basic_block_def *);
+extern void add_insn_after (rtx, rtx, struct basic_block_def *);
+extern void remove_insn (rtx);
+extern rtx emit (rtx);
+extern rtx delete_insn (rtx);
+extern rtx entry_of_function (void);
+extern void emit_insn_at_entry (rtx);
+extern void delete_insn_chain (rtx, rtx, bool);
+extern rtx unlink_insn_chain (rtx, rtx);
+extern rtx delete_insn_and_edges (rtx);
+extern void delete_insn_chain_and_edges (rtx, rtx);
+extern rtx gen_lowpart_SUBREG (enum machine_mode, rtx);
+extern rtx gen_const_mem (enum machine_mode, rtx);
+extern rtx gen_frame_mem (enum machine_mode, rtx);
+extern rtx gen_tmp_stack_mem (enum machine_mode, rtx);
+extern bool validate_subreg (enum machine_mode, enum machine_mode,
+ const_rtx, unsigned int);
+
+/* In combine.c */
+extern unsigned int extended_count (const_rtx, enum machine_mode, int);
+extern rtx remove_death (unsigned int, rtx);
+extern void dump_combine_stats (FILE *);
+extern void dump_combine_total_stats (FILE *);
+
+/* In cfgcleanup.c */
+extern void delete_dead_jumptables (void);
+
+/* In sched-vis.c. */
+extern void debug_bb_n_slim (int);
+extern void debug_bb_slim (struct basic_block_def *);
+extern void print_rtl_slim (FILE *, rtx, rtx, int, int);
+extern void print_rtl_slim_with_bb (FILE *, rtx, int);
+extern void dump_insn_slim (FILE *f, rtx x);
+extern void debug_insn_slim (rtx x);
+
+/* In sched-rgn.c. */
+extern void schedule_insns (void);
+
+/* In sched-ebb.c. */
+extern void schedule_ebbs (void);
+
+/* In haifa-sched.c. */
+extern void fix_sched_param (const char *, const char *);
+
+/* In sel-sched-dump.c. */
+extern void sel_sched_fix_param (const char *param, const char *val);
+
+/* In print-rtl.c */
+extern const char *print_rtx_head;
+extern void debug_rtx (const_rtx);
+extern void debug_rtx_list (const_rtx, int);
+extern void debug_rtx_range (const_rtx, const_rtx);
+extern const_rtx debug_rtx_find (const_rtx, int);
+extern void print_mem_expr (FILE *, const_tree);
+extern void print_rtl (FILE *, const_rtx);
+extern void print_simple_rtl (FILE *, const_rtx);
+extern int print_rtl_single (FILE *, const_rtx);
+extern void print_inline_rtx (FILE *, const_rtx, int);
+
+/* In function.c */
+extern void reposition_prologue_and_epilogue_notes (void);
+extern int prologue_epilogue_contains (const_rtx);
+extern int sibcall_epilogue_contains (const_rtx);
+extern void mark_temp_addr_taken (rtx);
+extern void update_temp_slot_address (rtx, rtx);
+extern void maybe_copy_epilogue_insn (rtx, rtx);
+
+/* In stmt.c */
+extern void expand_null_return (void);
+extern void expand_naked_return (void);
+extern void emit_jump (rtx);
+
+/* In expr.c */
+extern rtx move_by_pieces (rtx, rtx, unsigned HOST_WIDE_INT,
+ unsigned int, int);
+
+/* In cfgrtl.c */
+extern void print_rtl_with_bb (FILE *, const_rtx);
+
+/* In cfg.c. */
+extern void dump_reg_info (FILE *);
+extern void dump_flow_info (FILE *, int);
+
+/* In expmed.c */
+extern void init_expmed (void);
+extern void expand_inc (rtx, rtx);
+extern void expand_dec (rtx, rtx);
+
+/* In gcse.c */
+extern bool can_copy_p (enum machine_mode);
+extern rtx fis_get_condition (rtx);
+
+/* In ira.c */
+#ifdef HARD_CONST
+extern HARD_REG_SET eliminable_regset;
+#endif
+extern void mark_elimination (int, int);
+
+/* In reginfo.c */
+extern int reg_classes_intersect_p (enum reg_class, enum reg_class);
+extern int reg_class_subset_p (enum reg_class, enum reg_class);
+extern void globalize_reg (int);
+extern void init_reg_modes_target (void);
+extern void init_regs (void);
+extern void reinit_regs (void);
+extern void init_fake_stack_mems (void);
+extern void save_register_info (void);
+extern void init_reg_sets (void);
+extern void regclass (rtx, int);
+extern void reg_scan (rtx, unsigned int);
+extern void fix_register (const char *, int, int);
+#ifdef HARD_CONST
+extern void cannot_change_mode_set_regs (HARD_REG_SET *,
+ enum machine_mode, unsigned int);
+#endif
+extern bool invalid_mode_change_p (unsigned int, enum reg_class,
+ enum machine_mode);
+
+/* In reorg.c */
+extern void dbr_schedule (rtx);
+
+/* In reload1.c */
+extern int function_invariant_p (const_rtx);
+
+/* In calls.c */
+enum libcall_type
+{
+ LCT_NORMAL = 0,
+ LCT_CONST = 1,
+ LCT_PURE = 2,
+ LCT_NORETURN = 3,
+ LCT_THROW = 4,
+ LCT_RETURNS_TWICE = 5
+};
+
+extern void emit_library_call (rtx, enum libcall_type, enum machine_mode, int,
+ ...);
+extern rtx emit_library_call_value (rtx, rtx, enum libcall_type,
+ enum machine_mode, int, ...);
+
+/* In varasm.c */
+extern void init_varasm_once (void);
+extern enum tls_model decl_default_tls_model (const_tree);
+
+/* In rtl.c */
+extern void traverse_md_constants (int (*) (void **, void *), void *);
+struct md_constant { char *name, *value; };
+
+/* In read-rtl.c */
+extern int read_skip_spaces (FILE *);
+extern bool read_rtx (FILE *, rtx *, int *);
+extern void copy_rtx_ptr_loc (const void *, const void *);
+extern void print_rtx_ptr_loc (const void *);
+extern const char *join_c_conditions (const char *, const char *);
+extern void print_c_condition (const char *);
+extern const char *read_rtx_filename;
+extern int read_rtx_lineno;
+
+/* In alias.c */
+extern rtx canon_rtx (rtx);
+extern int true_dependence (const_rtx, enum machine_mode, const_rtx, bool (*)(const_rtx, bool));
+extern rtx get_addr (rtx);
+extern int canon_true_dependence (const_rtx, enum machine_mode, rtx, const_rtx,
+ rtx, bool (*)(const_rtx, bool));
+extern int read_dependence (const_rtx, const_rtx);
+extern int anti_dependence (const_rtx, const_rtx);
+extern int output_dependence (const_rtx, const_rtx);
+extern void init_alias_target (void);
+extern void init_alias_analysis (void);
+extern void end_alias_analysis (void);
+extern bool memory_modified_in_insn_p (const_rtx, const_rtx);
+extern rtx find_base_term (rtx);
+extern rtx gen_hard_reg_clobber (enum machine_mode, unsigned int);
+extern rtx get_reg_known_value (unsigned int);
+extern bool get_reg_known_equiv_p (unsigned int);
+
+#ifdef STACK_REGS
+extern int stack_regs_mentioned (const_rtx insn);
+#endif
+
+/* In toplev.c */
+extern GTY(()) rtx stack_limit_rtx;
+
+/* In predict.c */
+extern void invert_br_probabilities (rtx);
+extern bool expensive_function_p (int);
+/* In cfgexpand.c */
+extern void add_reg_br_prob_note (rtx last, int probability);
+
+/* In var-tracking.c */
+extern unsigned int variable_tracking_main (void);
+
+/* In stor-layout.c. */
+extern void get_mode_bounds (enum machine_mode, int, enum machine_mode,
+ rtx *, rtx *);
+
+/* In loop-unswitch.c */
+extern rtx reversed_condition (rtx);
+extern rtx compare_and_jump_seq (rtx, rtx, enum rtx_code, rtx, int, rtx);
+
+/* In loop-iv.c */
+extern rtx canon_condition (rtx);
+extern void simplify_using_condition (rtx, rtx *, struct bitmap_head_def *);
+
+/* In final.c */
+extern unsigned int compute_alignments (void);
+
+struct rtl_hooks
+{
+ rtx (*gen_lowpart) (enum machine_mode, rtx);
+ rtx (*gen_lowpart_no_emit) (enum machine_mode, rtx);
+ rtx (*reg_nonzero_bits) (const_rtx, enum machine_mode, const_rtx, enum machine_mode,
+ unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT *);
+ rtx (*reg_num_sign_bit_copies) (const_rtx, enum machine_mode, const_rtx, enum machine_mode,
+ unsigned int, unsigned int *);
+ bool (*reg_truncated_to_mode) (enum machine_mode, const_rtx);
+
+ /* Whenever you add entries here, make sure you adjust rtlhooks-def.h. */
+};
+
+/* Each pass can provide its own. */
+extern struct rtl_hooks rtl_hooks;
+
+/* ... but then it has to restore these. */
+extern const struct rtl_hooks general_rtl_hooks;
+
+/* Keep this for the nonce. */
+#define gen_lowpart rtl_hooks.gen_lowpart
+
+extern void insn_locators_alloc (void);
+extern void insn_locators_free (void);
+extern void insn_locators_finalize (void);
+extern void set_curr_insn_source_location (location_t);
+extern void set_curr_insn_block (tree);
+extern int curr_insn_locator (void);
+extern bool optimize_insn_for_size_p (void);
+extern bool optimize_insn_for_speed_p (void);
+
+#endif /* ! GCC_RTL_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/safe-ctype.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/safe-ctype.h
new file mode 100644
index 0000000..0266bf1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/safe-ctype.h
@@ -0,0 +1,150 @@
+/* <ctype.h> replacement macros.
+
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Zack Weinberg <zackw@stanford.edu>.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/* This is a compatible replacement of the standard C library's <ctype.h>
+ with the following properties:
+
+ - Implements all isxxx() macros required by C99.
+ - Also implements some character classes useful when
+ parsing C-like languages.
+ - Does not change behavior depending on the current locale.
+ - Behaves properly for all values in the range of a signed or
+ unsigned char.
+
+ To avoid conflicts, this header defines the isxxx functions in upper
+ case, e.g. ISALPHA not isalpha. */
+
+#ifndef SAFE_CTYPE_H
+#define SAFE_CTYPE_H
+
+/* Determine host character set. */
+#define HOST_CHARSET_UNKNOWN 0
+#define HOST_CHARSET_ASCII 1
+#define HOST_CHARSET_EBCDIC 2
+
+#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \
+ && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21
+# define HOST_CHARSET HOST_CHARSET_ASCII
+#else
+# if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \
+ && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A
+# define HOST_CHARSET HOST_CHARSET_EBCDIC
+# else
+# define HOST_CHARSET HOST_CHARSET_UNKNOWN
+# endif
+#endif
+
+/* Categories. */
+
+enum {
+ /* In C99 */
+ _sch_isblank = 0x0001, /* space \t */
+ _sch_iscntrl = 0x0002, /* nonprinting characters */
+ _sch_isdigit = 0x0004, /* 0-9 */
+ _sch_islower = 0x0008, /* a-z */
+ _sch_isprint = 0x0010, /* any printing character including ' ' */
+ _sch_ispunct = 0x0020, /* all punctuation */
+ _sch_isspace = 0x0040, /* space \t \n \r \f \v */
+ _sch_isupper = 0x0080, /* A-Z */
+ _sch_isxdigit = 0x0100, /* 0-9A-Fa-f */
+
+ /* Extra categories useful to cpplib. */
+ _sch_isidst = 0x0200, /* A-Za-z_ */
+ _sch_isvsp = 0x0400, /* \n \r */
+ _sch_isnvsp = 0x0800, /* space \t \f \v \0 */
+
+ /* Combinations of the above. */
+ _sch_isalpha = _sch_isupper|_sch_islower, /* A-Za-z */
+ _sch_isalnum = _sch_isalpha|_sch_isdigit, /* A-Za-z0-9 */
+ _sch_isidnum = _sch_isidst|_sch_isdigit, /* A-Za-z0-9_ */
+ _sch_isgraph = _sch_isalnum|_sch_ispunct, /* isprint and not space */
+ _sch_iscppsp = _sch_isvsp|_sch_isnvsp, /* isspace + \0 */
+ _sch_isbasic = _sch_isprint|_sch_iscppsp /* basic charset of ISO C
+ (plus ` and @) */
+};
+
+/* Character classification. */
+extern const unsigned short _sch_istable[256];
+
+#define _sch_test(c, bit) (_sch_istable[(c) & 0xff] & (unsigned short)(bit))
+
+#define ISALPHA(c) _sch_test(c, _sch_isalpha)
+#define ISALNUM(c) _sch_test(c, _sch_isalnum)
+#define ISBLANK(c) _sch_test(c, _sch_isblank)
+#define ISCNTRL(c) _sch_test(c, _sch_iscntrl)
+#define ISDIGIT(c) _sch_test(c, _sch_isdigit)
+#define ISGRAPH(c) _sch_test(c, _sch_isgraph)
+#define ISLOWER(c) _sch_test(c, _sch_islower)
+#define ISPRINT(c) _sch_test(c, _sch_isprint)
+#define ISPUNCT(c) _sch_test(c, _sch_ispunct)
+#define ISSPACE(c) _sch_test(c, _sch_isspace)
+#define ISUPPER(c) _sch_test(c, _sch_isupper)
+#define ISXDIGIT(c) _sch_test(c, _sch_isxdigit)
+
+#define ISIDNUM(c) _sch_test(c, _sch_isidnum)
+#define ISIDST(c) _sch_test(c, _sch_isidst)
+#define IS_ISOBASIC(c) _sch_test(c, _sch_isbasic)
+#define IS_VSPACE(c) _sch_test(c, _sch_isvsp)
+#define IS_NVSPACE(c) _sch_test(c, _sch_isnvsp)
+#define IS_SPACE_OR_NUL(c) _sch_test(c, _sch_iscppsp)
+
+/* Character transformation. */
+extern const unsigned char _sch_toupper[256];
+extern const unsigned char _sch_tolower[256];
+#define TOUPPER(c) _sch_toupper[(c) & 0xff]
+#define TOLOWER(c) _sch_tolower[(c) & 0xff]
+
+/* Prevent the users of safe-ctype.h from accidently using the routines
+ from ctype.h. Initially, the approach was to produce an error when
+ detecting that ctype.h has been included. But this was causing
+ trouble as ctype.h might get indirectly included as a result of
+ including another system header (for instance gnulib's stdint.h).
+ So we include ctype.h here and then immediately redefine its macros. */
+
+#include <ctype.h>
+#undef isalpha
+#define isalpha(c) do_not_use_isalpha_with_safe_ctype
+#undef isalnum
+#define isalnum(c) do_not_use_isalnum_with_safe_ctype
+#undef iscntrl
+#define iscntrl(c) do_not_use_iscntrl_with_safe_ctype
+#undef isdigit
+#define isdigit(c) do_not_use_isdigit_with_safe_ctype
+#undef isgraph
+#define isgraph(c) do_not_use_isgraph_with_safe_ctype
+#undef islower
+#define islower(c) do_not_use_islower_with_safe_ctype
+#undef isprint
+#define isprint(c) do_not_use_isprint_with_safe_ctype
+#undef ispunct
+#define ispunct(c) do_not_use_ispunct_with_safe_ctype
+#undef isspace
+#define isspace(c) do_not_use_isspace_with_safe_ctype
+#undef isupper
+#define isupper(c) do_not_use_isupper_with_safe_ctype
+#undef isxdigit
+#define isxdigit(c) do_not_use_isxdigit_with_safe_ctype
+#undef toupper
+#define toupper(c) do_not_use_toupper_with_safe_ctype
+#undef tolower
+#define tolower(c) do_not_use_tolower_with_safe_ctype
+
+#endif /* SAFE_CTYPE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sbitmap.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sbitmap.h
new file mode 100644
index 0000000..60efdac
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sbitmap.h
@@ -0,0 +1,272 @@
+/* Simple bitmaps.
+ Copyright (C) 1999, 2000, 2002, 2003, 2004, 2006, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_SBITMAP_H
+#define GCC_SBITMAP_H
+
+/* It's not clear yet whether using bitmap.[ch] will be a win.
+ It should be straightforward to convert so for now we keep things simple
+ while more important issues are dealt with. */
+
+#define SBITMAP_ELT_BITS ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
+#define SBITMAP_ELT_TYPE unsigned HOST_WIDEST_FAST_INT
+
+/* Can't use SBITMAP_ELT_BITS in this macro because it contains a
+ cast. There is no perfect macro in GCC to test against. This
+ suffices for roughly 99% of the hosts we run on, and the rest
+ don't have 256 bit integers. */
+#if HOST_BITS_PER_WIDEST_FAST_INT > 255
+#error Need to increase size of datatype used for popcount
+#endif
+
+typedef struct simple_bitmap_def
+{
+ unsigned char *popcount; /* Population count. */
+ unsigned int n_bits; /* Number of bits. */
+ unsigned int size; /* Size in elements. */
+ SBITMAP_ELT_TYPE elms[1]; /* The elements. */
+} *sbitmap;
+typedef const struct simple_bitmap_def *const_sbitmap;
+
+typedef SBITMAP_ELT_TYPE *sbitmap_ptr;
+typedef const SBITMAP_ELT_TYPE *const_sbitmap_ptr;
+
+/* Return the set size needed for N elements. */
+#define SBITMAP_SET_SIZE(N) (((N) + SBITMAP_ELT_BITS - 1) / SBITMAP_ELT_BITS)
+#define SBITMAP_SIZE_BYTES(BITMAP) ((BITMAP)->size * sizeof (SBITMAP_ELT_TYPE))
+
+/* Test if bit number bitno in the bitmap is set. */
+#define TEST_BIT(BITMAP, BITNO) \
+((BITMAP)->elms [(BITNO) / SBITMAP_ELT_BITS] >> (BITNO) % SBITMAP_ELT_BITS & 1)
+
+/* Set bit number BITNO in the sbitmap MAP. Updates population count
+ if this bitmap has one. */
+
+static inline void
+SET_BIT (sbitmap map, unsigned int bitno)
+{
+ if (map->popcount)
+ {
+ bool oldbit;
+ oldbit = TEST_BIT (map, bitno);
+ if (!oldbit)
+ map->popcount[bitno / SBITMAP_ELT_BITS]++;
+ }
+ map->elms[bitno / SBITMAP_ELT_BITS]
+ |= (SBITMAP_ELT_TYPE) 1 << (bitno) % SBITMAP_ELT_BITS;
+}
+
+
+
+/* Reset bit number BITNO in the sbitmap MAP. Updates population
+ count if this bitmap has one. */
+
+static inline void
+RESET_BIT (sbitmap map, unsigned int bitno)
+{
+ if (map->popcount)
+ {
+ bool oldbit;
+ oldbit = TEST_BIT (map, bitno);
+ if (oldbit)
+ map->popcount[bitno / SBITMAP_ELT_BITS]--;
+ }
+ map->elms[bitno / SBITMAP_ELT_BITS]
+ &= ~((SBITMAP_ELT_TYPE) 1 << (bitno) % SBITMAP_ELT_BITS);
+}
+
+/* The iterator for sbitmap. */
+typedef struct {
+ /* The pointer to the first word of the bitmap. */
+ const SBITMAP_ELT_TYPE *ptr;
+
+ /* The size of the bitmap. */
+ unsigned int size;
+
+ /* The current word index. */
+ unsigned int word_num;
+
+ /* The current bit index (not modulo SBITMAP_ELT_BITS). */
+ unsigned int bit_num;
+
+ /* The words currently visited. */
+ SBITMAP_ELT_TYPE word;
+} sbitmap_iterator;
+
+/* Initialize the iterator I with sbitmap BMP and the initial index
+ MIN. */
+
+static inline void
+sbitmap_iter_init (sbitmap_iterator *i, const_sbitmap bmp, unsigned int min)
+{
+ i->word_num = min / (unsigned int) SBITMAP_ELT_BITS;
+ i->bit_num = min;
+ i->size = bmp->size;
+ i->ptr = bmp->elms;
+
+ if (i->word_num >= i->size)
+ i->word = 0;
+ else
+ i->word = (i->ptr[i->word_num]
+ >> (i->bit_num % (unsigned int) SBITMAP_ELT_BITS));
+}
+
+/* Return true if we have more bits to visit, in which case *N is set
+ to the index of the bit to be visited. Otherwise, return
+ false. */
+
+static inline bool
+sbitmap_iter_cond (sbitmap_iterator *i, unsigned int *n)
+{
+ /* Skip words that are zeros. */
+ for (; i->word == 0; i->word = i->ptr[i->word_num])
+ {
+ i->word_num++;
+
+ /* If we have reached the end, break. */
+ if (i->word_num >= i->size)
+ return false;
+
+ i->bit_num = i->word_num * SBITMAP_ELT_BITS;
+ }
+
+ /* Skip bits that are zero. */
+ for (; (i->word & 1) == 0; i->word >>= 1)
+ i->bit_num++;
+
+ *n = i->bit_num;
+
+ return true;
+}
+
+/* Advance to the next bit. */
+
+static inline void
+sbitmap_iter_next (sbitmap_iterator *i)
+{
+ i->word >>= 1;
+ i->bit_num++;
+}
+
+/* Loop over all elements of SBITMAP, starting with MIN. In each
+ iteration, N is set to the index of the bit being visited. ITER is
+ an instance of sbitmap_iterator used to iterate the bitmap. */
+
+#define EXECUTE_IF_SET_IN_SBITMAP(SBITMAP, MIN, N, ITER) \
+ for (sbitmap_iter_init (&(ITER), (SBITMAP), (MIN)); \
+ sbitmap_iter_cond (&(ITER), &(N)); \
+ sbitmap_iter_next (&(ITER)))
+
+#define EXECUTE_IF_SET_IN_SBITMAP_REV(SBITMAP, N, CODE) \
+do { \
+ unsigned int word_num_; \
+ unsigned int bit_num_; \
+ unsigned int size_ = (SBITMAP)->size; \
+ SBITMAP_ELT_TYPE *ptr_ = (SBITMAP)->elms; \
+ \
+ for (word_num_ = size_; word_num_ > 0; word_num_--) \
+ { \
+ SBITMAP_ELT_TYPE word_ = ptr_[word_num_ - 1]; \
+ \
+ if (word_ != 0) \
+ for (bit_num_ = SBITMAP_ELT_BITS; bit_num_ > 0; bit_num_--) \
+ { \
+ SBITMAP_ELT_TYPE _mask = (SBITMAP_ELT_TYPE)1 << (bit_num_ - 1);\
+ \
+ if ((word_ & _mask) != 0) \
+ { \
+ word_ &= ~ _mask; \
+ (N) = (word_num_ - 1) * SBITMAP_ELT_BITS + bit_num_ - 1;\
+ CODE; \
+ if (word_ == 0) \
+ break; \
+ } \
+ } \
+ } \
+} while (0)
+
+#define sbitmap_free(MAP) (free((MAP)->popcount), free((MAP)))
+#define sbitmap_vector_free(VEC) free(VEC)
+
+struct int_list;
+
+extern void dump_sbitmap (FILE *, const_sbitmap);
+extern void dump_sbitmap_file (FILE *, const_sbitmap);
+extern void dump_sbitmap_vector (FILE *, const char *, const char *, sbitmap *,
+ int);
+extern sbitmap sbitmap_alloc (unsigned int);
+extern sbitmap sbitmap_alloc_with_popcount (unsigned int);
+extern sbitmap *sbitmap_vector_alloc (unsigned int, unsigned int);
+extern sbitmap sbitmap_resize (sbitmap, unsigned int, int);
+extern void sbitmap_copy (sbitmap, const_sbitmap);
+extern void sbitmap_copy_n (sbitmap, const_sbitmap, unsigned int);
+extern int sbitmap_equal (const_sbitmap, const_sbitmap);
+extern bool sbitmap_empty_p (const_sbitmap);
+extern bool sbitmap_range_empty_p (const_sbitmap, unsigned int, unsigned int);
+extern void sbitmap_zero (sbitmap);
+extern void sbitmap_ones (sbitmap);
+extern void sbitmap_vector_zero (sbitmap *, unsigned int);
+extern void sbitmap_vector_ones (sbitmap *, unsigned int);
+
+extern void sbitmap_union_of_diff (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_union_of_diff_cg (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_difference (sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_not (sbitmap, const_sbitmap);
+extern void sbitmap_a_or_b_and_c (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_or_b_and_c_cg (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_or_b_and_c_compl_cg (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_a_and_b_or_c (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_and_b_or_c_cg (sbitmap, const_sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_any_common_bits (const_sbitmap, const_sbitmap);
+extern void sbitmap_a_and_b (sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_and_b_cg (sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_a_and_not_b (sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_a_or_b (sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_or_b_cg (sbitmap, const_sbitmap, const_sbitmap);
+extern void sbitmap_a_xor_b (sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_xor_b_cg (sbitmap, const_sbitmap, const_sbitmap);
+extern bool sbitmap_a_subset_b_p (const_sbitmap, const_sbitmap);
+
+extern int sbitmap_first_set_bit (const_sbitmap);
+extern int sbitmap_last_set_bit (const_sbitmap);
+
+extern void sbitmap_intersect_of_predsucc (sbitmap, sbitmap *, int,
+ struct int_list **);
+#define sbitmap_intersect_of_predecessors sbitmap_intersect_of_predsucc
+#define sbitmap_intersect_of_successors sbitmap_intersect_of_predsucc
+
+extern void sbitmap_union_of_predsucc (sbitmap, sbitmap *, int,
+ struct int_list **);
+#define sbitmap_union_of_predecessors sbitmap_union_of_predsucc
+#define sbitmap_union_of_successors sbitmap_union_of_predsucc
+
+/* Intersection and Union of preds/succs using the new flow graph
+ structure instead of the pred/succ arrays. */
+
+extern void sbitmap_intersection_of_succs (sbitmap, sbitmap *, int);
+extern void sbitmap_intersection_of_preds (sbitmap, sbitmap *, int);
+extern void sbitmap_union_of_succs (sbitmap, sbitmap *, int);
+extern void sbitmap_union_of_preds (sbitmap, sbitmap *, int);
+
+extern void debug_sbitmap (const_sbitmap);
+extern sbitmap sbitmap_realloc (sbitmap, unsigned int);
+extern unsigned long sbitmap_popcount(const_sbitmap, unsigned long);
+extern void sbitmap_verify_popcount (const_sbitmap);
+#endif /* ! GCC_SBITMAP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/splay-tree.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/splay-tree.h
new file mode 100644
index 0000000..b03c581
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/splay-tree.h
@@ -0,0 +1,152 @@
+/* A splay-tree datatype.
+ Copyright 1998, 1999, 2000, 2002, 2007 Free Software Foundation, Inc.
+ Contributed by Mark Mitchell (mark@markmitchell.com).
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING. If not, write to
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/* For an easily readable description of splay-trees, see:
+
+ Lewis, Harry R. and Denenberg, Larry. Data Structures and Their
+ Algorithms. Harper-Collins, Inc. 1991.
+
+ The major feature of splay trees is that all basic tree operations
+ are amortized O(log n) time for a tree with n nodes. */
+
+#ifndef _SPLAY_TREE_H
+#define _SPLAY_TREE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ansidecl.h"
+
+#ifndef _WIN64
+ typedef unsigned long int libi_uhostptr_t;
+ typedef long int libi_shostptr_t;
+#else
+ typedef unsigned long long libi_uhostptr_t;
+ typedef long long libi_shostptr_t;
+#endif
+
+#ifndef GTY
+#define GTY(X)
+#endif
+
+/* Use typedefs for the key and data types to facilitate changing
+ these types, if necessary. These types should be sufficiently wide
+ that any pointer or scalar can be cast to these types, and then
+ cast back, without loss of precision. */
+typedef libi_uhostptr_t splay_tree_key;
+typedef libi_uhostptr_t splay_tree_value;
+
+/* Forward declaration for a node in the tree. */
+typedef struct splay_tree_node_s *splay_tree_node;
+
+/* The type of a function which compares two splay-tree keys. The
+ function should return values as for qsort. */
+typedef int (*splay_tree_compare_fn) (splay_tree_key, splay_tree_key);
+
+/* The type of a function used to deallocate any resources associated
+ with the key. */
+typedef void (*splay_tree_delete_key_fn) (splay_tree_key);
+
+/* The type of a function used to deallocate any resources associated
+ with the value. */
+typedef void (*splay_tree_delete_value_fn) (splay_tree_value);
+
+/* The type of a function used to iterate over the tree. */
+typedef int (*splay_tree_foreach_fn) (splay_tree_node, void*);
+
+/* The type of a function used to allocate memory for tree root and
+ node structures. The first argument is the number of bytes needed;
+ the second is a data pointer the splay tree functions pass through
+ to the allocator. This function must never return zero. */
+typedef void *(*splay_tree_allocate_fn) (int, void *);
+
+/* The type of a function used to free memory allocated using the
+ corresponding splay_tree_allocate_fn. The first argument is the
+ memory to be freed; the latter is a data pointer the splay tree
+ functions pass through to the freer. */
+typedef void (*splay_tree_deallocate_fn) (void *, void *);
+
+/* The nodes in the splay tree. */
+struct splay_tree_node_s GTY(())
+{
+ /* The key. */
+ splay_tree_key GTY ((use_param1)) key;
+
+ /* The value. */
+ splay_tree_value GTY ((use_param2)) value;
+
+ /* The left and right children, respectively. */
+ splay_tree_node GTY ((use_params)) left;
+ splay_tree_node GTY ((use_params)) right;
+};
+
+/* The splay tree itself. */
+struct splay_tree_s GTY(())
+{
+ /* The root of the tree. */
+ splay_tree_node GTY ((use_params)) root;
+
+ /* The comparision function. */
+ splay_tree_compare_fn comp;
+
+ /* The deallocate-key function. NULL if no cleanup is necessary. */
+ splay_tree_delete_key_fn delete_key;
+
+ /* The deallocate-value function. NULL if no cleanup is necessary. */
+ splay_tree_delete_value_fn delete_value;
+
+ /* Allocate/free functions, and a data pointer to pass to them. */
+ splay_tree_allocate_fn allocate;
+ splay_tree_deallocate_fn deallocate;
+ void * GTY((skip)) allocate_data;
+};
+
+typedef struct splay_tree_s *splay_tree;
+
+extern splay_tree splay_tree_new (splay_tree_compare_fn,
+ splay_tree_delete_key_fn,
+ splay_tree_delete_value_fn);
+extern splay_tree splay_tree_new_with_allocator (splay_tree_compare_fn,
+ splay_tree_delete_key_fn,
+ splay_tree_delete_value_fn,
+ splay_tree_allocate_fn,
+ splay_tree_deallocate_fn,
+ void *);
+extern void splay_tree_delete (splay_tree);
+extern splay_tree_node splay_tree_insert (splay_tree,
+ splay_tree_key,
+ splay_tree_value);
+extern void splay_tree_remove (splay_tree, splay_tree_key);
+extern splay_tree_node splay_tree_lookup (splay_tree, splay_tree_key);
+extern splay_tree_node splay_tree_predecessor (splay_tree, splay_tree_key);
+extern splay_tree_node splay_tree_successor (splay_tree, splay_tree_key);
+extern splay_tree_node splay_tree_max (splay_tree);
+extern splay_tree_node splay_tree_min (splay_tree);
+extern int splay_tree_foreach (splay_tree, splay_tree_foreach_fn, void*);
+extern int splay_tree_compare_ints (splay_tree_key, splay_tree_key);
+extern int splay_tree_compare_pointers (splay_tree_key, splay_tree_key);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _SPLAY_TREE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/statistics.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/statistics.h
new file mode 100644
index 0000000..6e21e85
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/statistics.h
@@ -0,0 +1,51 @@
+/* Memory and optimization statistics helpers.
+ Copyright (C) 2004, 2007, 2008
+ Free Software Foundation, Inc.
+ Contributed by Cygnus Solutions.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_STATISTICS
+#define GCC_STATISTICS
+
+#ifdef GATHER_STATISTICS
+#define MEM_STAT_DECL , const char * ARG_UNUSED (_loc_name), int ARG_UNUSED (_loc_line), const char * ARG_UNUSED (_loc_function)
+#define ALONE_MEM_STAT_DECL const char * ARG_UNUSED (_loc_name), int ARG_UNUSED (_loc_line), const char * ARG_UNUSED (_loc_function)
+#define PASS_MEM_STAT , _loc_name, _loc_line, _loc_function
+#define ALONE_PASS_MEM_STAT _loc_name, _loc_line, _loc_function
+#define MEM_STAT_INFO , __FILE__, __LINE__, __FUNCTION__
+#define ALONE_MEM_STAT_INFO __FILE__, __LINE__, __FUNCTION__
+#else
+#define MEM_STAT_DECL
+#define ALONE_MEM_STAT_DECL void
+#define PASS_MEM_STAT
+#define ALONE_PASS_MEM_STAT
+#define MEM_STAT_INFO
+#define ALONE_MEM_STAT_INFO
+#endif
+
+struct function;
+
+/* In statistics.c */
+extern void statistics_early_init (void);
+extern void statistics_init (void);
+extern void statistics_fini (void);
+extern void statistics_fini_pass (void);
+extern void statistics_counter_event (struct function *, const char *, int);
+extern void statistics_histogram_event (struct function *, const char *, int);
+
+#endif
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/symtab.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/symtab.h
new file mode 100644
index 0000000..225301e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/symtab.h
@@ -0,0 +1,103 @@
+/* Hash tables.
+ Copyright (C) 2000, 2001, 2003, 2004, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef LIBCPP_SYMTAB_H
+#define LIBCPP_SYMTAB_H
+
+#include "obstack.h"
+#ifndef GTY
+#define GTY(x) /* nothing */
+#endif
+
+/* This is what each hash table entry points to. It may be embedded
+ deeply within another object. */
+typedef struct ht_identifier ht_identifier;
+struct ht_identifier GTY(())
+{
+ const unsigned char *str;
+ unsigned int len;
+ unsigned int hash_value;
+};
+
+#define HT_LEN(NODE) ((NODE)->len)
+#define HT_STR(NODE) ((NODE)->str)
+
+typedef struct ht hash_table;
+typedef struct ht_identifier *hashnode;
+
+enum ht_lookup_option {HT_NO_INSERT = 0, HT_ALLOC};
+
+/* An identifier hash table for cpplib and the front ends. */
+struct ht
+{
+ /* Identifiers are allocated from here. */
+ struct obstack stack;
+
+ hashnode *entries;
+ /* Call back, allocate a node. */
+ hashnode (*alloc_node) (hash_table *);
+ /* Call back, allocate something that hangs off a node like a cpp_macro.
+ NULL means use the usual allocator. */
+ void * (*alloc_subobject) (size_t);
+
+ unsigned int nslots; /* Total slots in the entries array. */
+ unsigned int nelements; /* Number of live elements. */
+
+ /* Link to reader, if any. For the benefit of cpplib. */
+ struct cpp_reader *pfile;
+
+ /* Table usage statistics. */
+ unsigned int searches;
+ unsigned int collisions;
+
+ /* Should 'entries' be freed when it is no longer needed? */
+ bool entries_owned;
+};
+
+/* Initialize the hashtable with 2 ^ order entries. */
+extern hash_table *ht_create (unsigned int order);
+
+/* Frees all memory associated with a hash table. */
+extern void ht_destroy (hash_table *);
+
+extern hashnode ht_lookup (hash_table *, const unsigned char *,
+ size_t, enum ht_lookup_option);
+extern hashnode ht_lookup_with_hash (hash_table *, const unsigned char *,
+ size_t, unsigned int,
+ enum ht_lookup_option);
+#define HT_HASHSTEP(r, c) ((r) * 67 + ((c) - 113));
+#define HT_HASHFINISH(r, len) ((r) + (len))
+
+/* For all nodes in TABLE, make a callback. The callback takes
+ TABLE->PFILE, the node, and a PTR, and the callback sequence stops
+ if the callback returns zero. */
+typedef int (*ht_cb) (struct cpp_reader *, hashnode, const void *);
+extern void ht_forall (hash_table *, ht_cb, const void *);
+
+/* For all nodes in TABLE, call the callback. If the callback returns
+ a nonzero value, the node is removed from the table. */
+extern void ht_purge (hash_table *, ht_cb, const void *);
+
+/* Restore the hash table. */
+extern void ht_load (hash_table *ht, hashnode *entries,
+ unsigned int nslots, unsigned int nelements, bool own);
+
+/* Dump allocation statistics to stderr. */
+extern void ht_dump_statistics (hash_table *);
+
+#endif /* LIBCPP_SYMTAB_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sync-builtins.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sync-builtins.def
new file mode 100644
index 0000000..86cb0aa
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/sync-builtins.def
@@ -0,0 +1,252 @@
+/* This file contains the definitions and documentation for the
+ synchronization builtins used in the GNU compiler.
+ Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* Before including this file, you should define a macro:
+
+ DEF_SYNC_BUILTIN (ENUM, NAME, TYPE, ATTRS)
+
+ See builtins.def for details. */
+
+/* Synchronization Primitives. The "_N" version is the one that the user
+ is supposed to be using. It's overloaded, and is resolved to one of the
+ "_1" through "_16" versions, plus some extra casts. */
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_N, "__sync_fetch_and_add",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_1, "__sync_fetch_and_add_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_2, "__sync_fetch_and_add_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_4, "__sync_fetch_and_add_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_8, "__sync_fetch_and_add_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_ADD_16, "__sync_fetch_and_add_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_N, "__sync_fetch_and_sub",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_1, "__sync_fetch_and_sub_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_2, "__sync_fetch_and_sub_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_4, "__sync_fetch_and_sub_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_8, "__sync_fetch_and_sub_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_SUB_16, "__sync_fetch_and_sub_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_N, "__sync_fetch_and_or",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_1, "__sync_fetch_and_or_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_2, "__sync_fetch_and_or_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_4, "__sync_fetch_and_or_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_8, "__sync_fetch_and_or_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_OR_16, "__sync_fetch_and_or_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_N, "__sync_fetch_and_and",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_1, "__sync_fetch_and_and_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_2, "__sync_fetch_and_and_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_4, "__sync_fetch_and_and_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_8, "__sync_fetch_and_and_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_AND_16, "__sync_fetch_and_and_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_N, "__sync_fetch_and_xor",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_1, "__sync_fetch_and_xor_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_2, "__sync_fetch_and_xor_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_4, "__sync_fetch_and_xor_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_8, "__sync_fetch_and_xor_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_XOR_16, "__sync_fetch_and_xor_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_N, "__sync_fetch_and_nand",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_1, "__sync_fetch_and_nand_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_2, "__sync_fetch_and_nand_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_4, "__sync_fetch_and_nand_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_8, "__sync_fetch_and_nand_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_FETCH_AND_NAND_16, "__sync_fetch_and_nand_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_N, "__sync_add_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_1, "__sync_add_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_2, "__sync_add_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_4, "__sync_add_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_8, "__sync_add_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_ADD_AND_FETCH_16, "__sync_add_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_N, "__sync_sub_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_1, "__sync_sub_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_2, "__sync_sub_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_4, "__sync_sub_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_8, "__sync_sub_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_SUB_AND_FETCH_16, "__sync_sub_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_N, "__sync_or_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_1, "__sync_or_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_2, "__sync_or_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_4, "__sync_or_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_8, "__sync_or_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_OR_AND_FETCH_16, "__sync_or_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_N, "__sync_and_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_1, "__sync_and_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_2, "__sync_and_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_4, "__sync_and_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_8, "__sync_and_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_AND_AND_FETCH_16, "__sync_and_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_N, "__sync_xor_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_1, "__sync_xor_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_2, "__sync_xor_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_4, "__sync_xor_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_8, "__sync_xor_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_XOR_AND_FETCH_16, "__sync_xor_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_N, "__sync_nand_and_fetch",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_1, "__sync_nand_and_fetch_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_2, "__sync_nand_and_fetch_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_4, "__sync_nand_and_fetch_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_8, "__sync_nand_and_fetch_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_NAND_AND_FETCH_16, "__sync_nand_and_fetch_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_N,
+ "__sync_bool_compare_and_swap",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_1,
+ "__sync_bool_compare_and_swap_1",
+ BT_FN_BOOL_VPTR_I1_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_2,
+ "__sync_bool_compare_and_swap_2",
+ BT_FN_BOOL_VPTR_I2_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_4,
+ "__sync_bool_compare_and_swap_4",
+ BT_FN_BOOL_VPTR_I4_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_8,
+ "__sync_bool_compare_and_swap_8",
+ BT_FN_BOOL_VPTR_I8_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_BOOL_COMPARE_AND_SWAP_16,
+ "__sync_bool_compare_and_swap_16",
+ BT_FN_BOOL_VPTR_I16_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_N,
+ "__sync_val_compare_and_swap",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_1,
+ "__sync_val_compare_and_swap_1",
+ BT_FN_I1_VPTR_I1_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_2,
+ "__sync_val_compare_and_swap_2",
+ BT_FN_I2_VPTR_I2_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_4,
+ "__sync_val_compare_and_swap_4",
+ BT_FN_I4_VPTR_I4_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_8,
+ "__sync_val_compare_and_swap_8",
+ BT_FN_I8_VPTR_I8_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_VAL_COMPARE_AND_SWAP_16,
+ "__sync_val_compare_and_swap_16",
+ BT_FN_I16_VPTR_I16_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_N, "__sync_lock_test_and_set",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_1, "__sync_lock_test_and_set_1",
+ BT_FN_I1_VPTR_I1, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_2, "__sync_lock_test_and_set_2",
+ BT_FN_I2_VPTR_I2, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_4, "__sync_lock_test_and_set_4",
+ BT_FN_I4_VPTR_I4, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_8, "__sync_lock_test_and_set_8",
+ BT_FN_I8_VPTR_I8, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_TEST_AND_SET_16, "__sync_lock_test_and_set_16",
+ BT_FN_I16_VPTR_I16, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_N, "__sync_lock_release",
+ BT_FN_VOID_VAR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_1, "__sync_lock_release_1",
+ BT_FN_VOID_VPTR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_2, "__sync_lock_release_2",
+ BT_FN_VOID_VPTR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_4, "__sync_lock_release_4",
+ BT_FN_VOID_VPTR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_8, "__sync_lock_release_8",
+ BT_FN_VOID_VPTR, ATTR_NOTHROW_LIST)
+DEF_SYNC_BUILTIN (BUILT_IN_LOCK_RELEASE_16, "__sync_lock_release_16",
+ BT_FN_VOID_VPTR, ATTR_NOTHROW_LIST)
+
+DEF_SYNC_BUILTIN (BUILT_IN_SYNCHRONIZE, "__sync_synchronize",
+ BT_FN_VOID, ATTR_NOTHROW_LIST)
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/system.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/system.h
new file mode 100644
index 0000000..f1622e2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/system.h
@@ -0,0 +1,838 @@
+/* Get common system includes and various definitions and declarations based
+ on autoconf macros.
+ Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+#ifndef GCC_SYSTEM_H
+#define GCC_SYSTEM_H
+
+/* We must include stdarg.h before stdio.h. */
+#include <stdarg.h>
+
+#ifndef va_copy
+# ifdef __va_copy
+# define va_copy(d,s) __va_copy((d),(s))
+# else
+# define va_copy(d,s) ((d) = (s))
+# endif
+#endif
+
+#ifdef HAVE_STDDEF_H
+# include <stddef.h>
+#endif
+
+#include <stdio.h>
+
+/* Define a generic NULL if one hasn't already been defined. */
+#ifndef NULL
+#define NULL 0
+#endif
+
+/* Use the unlocked open routines from libiberty. */
+#define fopen(PATH,MODE) fopen_unlocked(PATH,MODE)
+#define fdopen(FILDES,MODE) fdopen_unlocked(FILDES,MODE)
+#define freopen(PATH,MODE,STREAM) freopen_unlocked(PATH,MODE,STREAM)
+
+/* The compiler is not a multi-threaded application and therefore we
+ do not have to use the locking functions. In fact, using the locking
+ functions can cause the compiler to be significantly slower under
+ I/O bound conditions (such as -g -O0 on very large source files).
+
+ HAVE_DECL_PUTC_UNLOCKED actually indicates whether or not the stdio
+ code is multi-thread safe by default. If it is set to 0, then do
+ not worry about using the _unlocked functions.
+
+ fputs_unlocked, fwrite_unlocked, and fprintf_unlocked are
+ extensions and need to be prototyped by hand (since we do not
+ define _GNU_SOURCE). */
+
+#if defined HAVE_DECL_PUTC_UNLOCKED && HAVE_DECL_PUTC_UNLOCKED
+
+# ifdef HAVE_PUTC_UNLOCKED
+# undef putc
+# define putc(C, Stream) putc_unlocked (C, Stream)
+# endif
+# ifdef HAVE_PUTCHAR_UNLOCKED
+# undef putchar
+# define putchar(C) putchar_unlocked (C)
+# endif
+# ifdef HAVE_GETC_UNLOCKED
+# undef getc
+# define getc(Stream) getc_unlocked (Stream)
+# endif
+# ifdef HAVE_GETCHAR_UNLOCKED
+# undef getchar
+# define getchar() getchar_unlocked ()
+# endif
+# ifdef HAVE_FPUTC_UNLOCKED
+# undef fputc
+# define fputc(C, Stream) fputc_unlocked (C, Stream)
+# endif
+
+# ifdef HAVE_CLEARERR_UNLOCKED
+# undef clearerr
+# define clearerr(Stream) clearerr_unlocked (Stream)
+# if defined (HAVE_DECL_CLEARERR_UNLOCKED) && !HAVE_DECL_CLEARERR_UNLOCKED
+extern void clearerr_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FEOF_UNLOCKED
+# undef feof
+# define feof(Stream) feof_unlocked (Stream)
+# if defined (HAVE_DECL_FEOF_UNLOCKED) && !HAVE_DECL_FEOF_UNLOCKED
+extern int feof_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FILENO_UNLOCKED
+# undef fileno
+# define fileno(Stream) fileno_unlocked (Stream)
+# if defined (HAVE_DECL_FILENO_UNLOCKED) && !HAVE_DECL_FILENO_UNLOCKED
+extern int fileno_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FFLUSH_UNLOCKED
+# undef fflush
+# define fflush(Stream) fflush_unlocked (Stream)
+# if defined (HAVE_DECL_FFLUSH_UNLOCKED) && !HAVE_DECL_FFLUSH_UNLOCKED
+extern int fflush_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FGETC_UNLOCKED
+# undef fgetc
+# define fgetc(Stream) fgetc_unlocked (Stream)
+# if defined (HAVE_DECL_FGETC_UNLOCKED) && !HAVE_DECL_FGETC_UNLOCKED
+extern int fgetc_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FGETS_UNLOCKED
+# undef fgets
+# define fgets(S, n, Stream) fgets_unlocked (S, n, Stream)
+# if defined (HAVE_DECL_FGETS_UNLOCKED) && !HAVE_DECL_FGETS_UNLOCKED
+extern char *fgets_unlocked (char *, int, FILE *);
+# endif
+# endif
+# ifdef HAVE_FPUTS_UNLOCKED
+# undef fputs
+# define fputs(String, Stream) fputs_unlocked (String, Stream)
+# if defined (HAVE_DECL_FPUTS_UNLOCKED) && !HAVE_DECL_FPUTS_UNLOCKED
+extern int fputs_unlocked (const char *, FILE *);
+# endif
+# endif
+# ifdef HAVE_FERROR_UNLOCKED
+# undef ferror
+# define ferror(Stream) ferror_unlocked (Stream)
+# if defined (HAVE_DECL_FERROR_UNLOCKED) && !HAVE_DECL_FERROR_UNLOCKED
+extern int ferror_unlocked (FILE *);
+# endif
+# endif
+# ifdef HAVE_FREAD_UNLOCKED
+# undef fread
+# define fread(Ptr, Size, N, Stream) fread_unlocked (Ptr, Size, N, Stream)
+# if defined (HAVE_DECL_FREAD_UNLOCKED) && !HAVE_DECL_FREAD_UNLOCKED
+extern size_t fread_unlocked (void *, size_t, size_t, FILE *);
+# endif
+# endif
+# ifdef HAVE_FWRITE_UNLOCKED
+# undef fwrite
+# define fwrite(Ptr, Size, N, Stream) fwrite_unlocked (Ptr, Size, N, Stream)
+# if defined (HAVE_DECL_FWRITE_UNLOCKED) && !HAVE_DECL_FWRITE_UNLOCKED
+extern size_t fwrite_unlocked (const void *, size_t, size_t, FILE *);
+# endif
+# endif
+# ifdef HAVE_FPRINTF_UNLOCKED
+# undef fprintf
+/* We can't use a function-like macro here because we don't know if
+ we have varargs macros. */
+# define fprintf fprintf_unlocked
+# if defined (HAVE_DECL_FPRINTF_UNLOCKED) && !HAVE_DECL_FPRINTF_UNLOCKED
+extern int fprintf_unlocked (FILE *, const char *, ...);
+# endif
+# endif
+
+#endif
+
+/* ??? Glibc's fwrite/fread_unlocked macros cause
+ "warning: signed and unsigned type in conditional expression". */
+#undef fread_unlocked
+#undef fwrite_unlocked
+
+/* There are an extraordinary number of issues with <ctype.h>.
+ The last straw is that it varies with the locale. Use libiberty's
+ replacement instead. */
+#include <safe-ctype.h>
+
+#include <sys/types.h>
+
+#include <errno.h>
+
+#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
+extern int errno;
+#endif
+
+/* Some of glibc's string inlines cause warnings. Plus we'd rather
+ rely on (and therefore test) GCC's string builtins. */
+#define __NO_STRING_INLINES
+
+#ifdef STRING_WITH_STRINGS
+# include <string.h>
+# include <strings.h>
+#else
+# ifdef HAVE_STRING_H
+# include <string.h>
+# else
+# ifdef HAVE_STRINGS_H
+# include <strings.h>
+# endif
+# endif
+#endif
+
+#ifdef HAVE_STDLIB_H
+# include <stdlib.h>
+#endif
+
+/* If we don't have an overriding definition, set SUCCESS_EXIT_CODE and
+ FATAL_EXIT_CODE to EXIT_SUCCESS and EXIT_FAILURE respectively,
+ or 0 and 1 if those macros are not defined. */
+#ifndef SUCCESS_EXIT_CODE
+# ifdef EXIT_SUCCESS
+# define SUCCESS_EXIT_CODE EXIT_SUCCESS
+# else
+# define SUCCESS_EXIT_CODE 0
+# endif
+#endif
+
+#ifndef FATAL_EXIT_CODE
+# ifdef EXIT_FAILURE
+# define FATAL_EXIT_CODE EXIT_FAILURE
+# else
+# define FATAL_EXIT_CODE 1
+# endif
+#endif
+
+#define ICE_EXIT_CODE 4
+
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif
+
+#ifdef HAVE_SYS_PARAM_H
+# include <sys/param.h>
+/* We use this identifier later and it appears in some vendor param.h's. */
+# undef PREFETCH
+#endif
+
+#if HAVE_LIMITS_H
+# include <limits.h>
+#endif
+
+/* Get definitions of HOST_WIDE_INT and HOST_WIDEST_INT. */
+#include "hwint.h"
+
+/* A macro to determine whether a VALUE lies inclusively within a
+ certain range without evaluating the VALUE more than once. This
+ macro won't warn if the VALUE is unsigned and the LOWER bound is
+ zero, as it would e.g. with "VALUE >= 0 && ...". Note the LOWER
+ bound *is* evaluated twice, and LOWER must not be greater than
+ UPPER. However the bounds themselves can be either positive or
+ negative. */
+#define IN_RANGE(VALUE, LOWER, UPPER) \
+ ((unsigned HOST_WIDE_INT) (VALUE) - (unsigned HOST_WIDE_INT) (LOWER) \
+ <= (unsigned HOST_WIDE_INT) (UPPER) - (unsigned HOST_WIDE_INT) (LOWER))
+
+/* Infrastructure for defining missing _MAX and _MIN macros. Note that
+ macros defined with these cannot be used in #if. */
+
+/* The extra casts work around common compiler bugs. */
+#define INTTYPE_SIGNED(t) (! ((t) 0 < (t) -1))
+/* The outer cast is needed to work around a bug in Cray C 5.0.3.0.
+ It is necessary at least when t == time_t. */
+#define INTTYPE_MINIMUM(t) ((t) (INTTYPE_SIGNED (t) \
+ ? ~ (t) 0 << (sizeof(t) * CHAR_BIT - 1) : (t) 0))
+#define INTTYPE_MAXIMUM(t) ((t) (~ (t) 0 - INTTYPE_MINIMUM (t)))
+
+/* Use that infrastructure to provide a few constants. */
+#ifndef UCHAR_MAX
+# define UCHAR_MAX INTTYPE_MAXIMUM (unsigned char)
+#endif
+
+#ifdef TIME_WITH_SYS_TIME
+# include <sys/time.h>
+# include <time.h>
+#else
+# if HAVE_SYS_TIME_H
+# include <sys/time.h>
+# else
+# ifdef HAVE_TIME_H
+# include <time.h>
+# endif
+# endif
+#endif
+
+#ifdef HAVE_FCNTL_H
+# include <fcntl.h>
+#else
+# ifdef HAVE_SYS_FILE_H
+# include <sys/file.h>
+# endif
+#endif
+
+#ifndef SEEK_SET
+# define SEEK_SET 0
+# define SEEK_CUR 1
+# define SEEK_END 2
+#endif
+#ifndef F_OK
+# define F_OK 0
+# define X_OK 1
+# define W_OK 2
+# define R_OK 4
+#endif
+#ifndef O_RDONLY
+# define O_RDONLY 0
+#endif
+#ifndef O_WRONLY
+# define O_WRONLY 1
+#endif
+
+/* Some systems define these in, e.g., param.h. We undefine these names
+ here to avoid the warnings. We prefer to use our definitions since we
+ know they are correct. */
+
+#undef MIN
+#undef MAX
+#define MIN(X,Y) ((X) < (Y) ? (X) : (Y))
+#define MAX(X,Y) ((X) > (Y) ? (X) : (Y))
+
+/* Returns the least number N such that N * Y >= X. */
+#define CEIL(x,y) (((x) + (y) - 1) / (y))
+
+#ifdef HAVE_SYS_WAIT_H
+#include <sys/wait.h>
+#endif
+
+#ifndef WIFSIGNALED
+#define WIFSIGNALED(S) (((S) & 0xff) != 0 && ((S) & 0xff) != 0x7f)
+#endif
+#ifndef WTERMSIG
+#define WTERMSIG(S) ((S) & 0x7f)
+#endif
+#ifndef WIFEXITED
+#define WIFEXITED(S) (((S) & 0xff) == 0)
+#endif
+#ifndef WEXITSTATUS
+#define WEXITSTATUS(S) (((S) & 0xff00) >> 8)
+#endif
+#ifndef WSTOPSIG
+#define WSTOPSIG WEXITSTATUS
+#endif
+#ifndef WCOREDUMP
+#define WCOREDUMP(S) ((S) & WCOREFLG)
+#endif
+#ifndef WCOREFLG
+#define WCOREFLG 0200
+#endif
+
+/* The HAVE_DECL_* macros are three-state, undefined, 0 or 1. If they
+ are defined to 0 then we must provide the relevant declaration
+ here. These checks will be in the undefined state while configure
+ is running so be careful to test "defined (HAVE_DECL_*)". */
+
+#if defined (HAVE_DECL_ATOF) && !HAVE_DECL_ATOF
+extern double atof (const char *);
+#endif
+
+#if defined (HAVE_DECL_ATOL) && !HAVE_DECL_ATOL
+extern long atol (const char *);
+#endif
+
+#if defined (HAVE_DECL_FREE) && !HAVE_DECL_FREE
+extern void free (void *);
+#endif
+
+#if defined (HAVE_DECL_GETCWD) && !HAVE_DECL_GETCWD
+extern char *getcwd (char *, size_t);
+#endif
+
+#if defined (HAVE_DECL_GETENV) && !HAVE_DECL_GETENV
+extern char *getenv (const char *);
+#endif
+
+#if defined (HAVE_DECL_GETOPT) && !HAVE_DECL_GETOPT
+extern int getopt (int, char * const *, const char *);
+#endif
+
+#if defined (HAVE_DECL_GETPAGESIZE) && !HAVE_DECL_GETPAGESIZE
+extern int getpagesize (void);
+#endif
+
+#if defined (HAVE_DECL_GETWD) && !HAVE_DECL_GETWD
+extern char *getwd (char *);
+#endif
+
+#if defined (HAVE_DECL_SBRK) && !HAVE_DECL_SBRK
+extern void *sbrk (int);
+#endif
+
+#if defined (HAVE_DECL_STRSTR) && !HAVE_DECL_STRSTR
+extern char *strstr (const char *, const char *);
+#endif
+
+#ifdef HAVE_MALLOC_H
+#include <malloc.h>
+#endif
+
+#if defined (HAVE_DECL_MALLOC) && !HAVE_DECL_MALLOC
+extern void *malloc (size_t);
+#endif
+
+#if defined (HAVE_DECL_CALLOC) && !HAVE_DECL_CALLOC
+extern void *calloc (size_t, size_t);
+#endif
+
+#if defined (HAVE_DECL_REALLOC) && !HAVE_DECL_REALLOC
+extern void *realloc (void *, size_t);
+#endif
+
+/* If the system doesn't provide strsignal, we get it defined in
+ libiberty but no declaration is supplied. */
+#if !defined (HAVE_STRSIGNAL) \
+ || (defined (HAVE_DECL_STRSIGNAL) && !HAVE_DECL_STRSIGNAL)
+# ifndef strsignal
+extern const char *strsignal (int);
+# endif
+#endif
+
+#ifdef HAVE_GETRLIMIT
+# if defined (HAVE_DECL_GETRLIMIT) && !HAVE_DECL_GETRLIMIT
+# ifndef getrlimit
+struct rlimit;
+extern int getrlimit (int, struct rlimit *);
+# endif
+# endif
+#endif
+
+#ifdef HAVE_SETRLIMIT
+# if defined (HAVE_DECL_SETRLIMIT) && !HAVE_DECL_SETRLIMIT
+# ifndef setrlimit
+struct rlimit;
+extern int setrlimit (int, const struct rlimit *);
+# endif
+# endif
+#endif
+
+#if defined (HAVE_DECL_ABORT) && !HAVE_DECL_ABORT
+extern void abort (void);
+#endif
+
+#if defined (HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF
+extern int snprintf (char *, size_t, const char *, ...);
+#endif
+
+#if defined (HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF
+extern int vsnprintf(char *, size_t, const char *, va_list);
+#endif
+
+/* 1 if we have C99 designated initializers. */
+#if !defined(HAVE_DESIGNATED_INITIALIZERS)
+#define HAVE_DESIGNATED_INITIALIZERS \
+ ((GCC_VERSION >= 2007) || (__STDC_VERSION__ >= 199901L))
+#endif
+
+#if HAVE_SYS_STAT_H
+# include <sys/stat.h>
+#endif
+
+/* Test if something is a normal file. */
+#ifndef S_ISREG
+#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG)
+#endif
+
+/* Test if something is a directory. */
+#ifndef S_ISDIR
+#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR)
+#endif
+
+/* Test if something is a character special file. */
+#ifndef S_ISCHR
+#define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR)
+#endif
+
+/* Test if something is a block special file. */
+#ifndef S_ISBLK
+#define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK)
+#endif
+
+/* Test if something is a socket. */
+#ifndef S_ISSOCK
+# ifdef S_IFSOCK
+# define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK)
+# else
+# define S_ISSOCK(m) 0
+# endif
+#endif
+
+/* Test if something is a FIFO. */
+#ifndef S_ISFIFO
+# ifdef S_IFIFO
+# define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO)
+# else
+# define S_ISFIFO(m) 0
+# endif
+#endif
+
+/* Define well known filenos if the system does not define them. */
+#ifndef STDIN_FILENO
+# define STDIN_FILENO 0
+#endif
+#ifndef STDOUT_FILENO
+# define STDOUT_FILENO 1
+#endif
+#ifndef STDERR_FILENO
+# define STDERR_FILENO 2
+#endif
+
+/* Some systems have mkdir that takes a single argument. */
+#ifdef MKDIR_TAKES_ONE_ARG
+# define mkdir(a,b) mkdir(a)
+#endif
+
+/* By default, colon separates directories in a path. */
+#ifndef PATH_SEPARATOR
+#define PATH_SEPARATOR ':'
+#endif
+
+/* Filename handling macros. */
+#include "filenames.h"
+
+/* These should be phased out in favor of IS_DIR_SEPARATOR, where possible. */
+#ifndef DIR_SEPARATOR
+# define DIR_SEPARATOR '/'
+# ifdef HAVE_DOS_BASED_FILE_SYSTEM
+# define DIR_SEPARATOR_2 '\\'
+# endif
+#endif
+
+/* Get libiberty declarations. */
+#include "libiberty.h"
+
+/* Provide a default for the HOST_BIT_BUCKET.
+ This suffices for POSIX-like hosts. */
+
+#ifndef HOST_BIT_BUCKET
+#define HOST_BIT_BUCKET "/dev/null"
+#endif
+
+/* Be conservative and only use enum bitfields with GCC.
+ FIXME: provide a complete autoconf test for buggy enum bitfields. */
+
+#if (GCC_VERSION > 2000)
+#define ENUM_BITFIELD(TYPE) __extension__ enum TYPE
+#else
+#define ENUM_BITFIELD(TYPE) unsigned int
+#endif
+
+#ifndef offsetof
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *) 0)->MEMBER)
+#endif
+
+/* Various error reporting routines want to use __FUNCTION__. */
+#if (GCC_VERSION < 2007)
+#ifndef __FUNCTION__
+#define __FUNCTION__ "?"
+#endif /* ! __FUNCTION__ */
+#endif
+
+/* __builtin_expect(A, B) evaluates to A, but notifies the compiler that
+ the most likely value of A is B. This feature was added at some point
+ between 2.95 and 3.0. Let's use 3.0 as the lower bound for now. */
+#if (GCC_VERSION < 3000)
+#define __builtin_expect(a, b) (a)
+#endif
+
+/* Redefine abort to report an internal error w/o coredump, and
+ reporting the location of the error in the source file. */
+extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN;
+#define abort() fancy_abort (__FILE__, __LINE__, __FUNCTION__)
+
+/* Use gcc_assert(EXPR) to test invariants. */
+#if ENABLE_ASSERT_CHECKING
+#define gcc_assert(EXPR) \
+ ((void)(!(EXPR) ? fancy_abort (__FILE__, __LINE__, __FUNCTION__), 0 : 0))
+#else
+/* Include EXPR, so that unused variable warnings do not occur. */
+#define gcc_assert(EXPR) ((void)(0 && (EXPR)))
+#endif
+
+/* Use gcc_unreachable() to mark unreachable locations (like an
+ unreachable default case of a switch. Do not use gcc_assert(0). */
+#define gcc_unreachable() (fancy_abort (__FILE__, __LINE__, __FUNCTION__))
+
+/* Provide a fake boolean type. We make no attempt to use the
+ C99 _Bool, as it may not be available in the bootstrap compiler,
+ and even if it is, it is liable to be buggy.
+ This must be after all inclusion of system headers, as some of
+ them will mess us up. */
+
+#undef TRUE
+#undef FALSE
+
+#ifdef __cplusplus
+ /* Obsolete. */
+# define TRUE true
+# define FALSE false
+#else /* !__cplusplus */
+# undef bool
+# undef true
+# undef false
+
+# define bool unsigned char
+# define true 1
+# define false 0
+
+ /* Obsolete. */
+# define TRUE true
+# define FALSE false
+#endif /* !__cplusplus */
+
+/* Some compilers do not allow the use of unsigned char in bitfields. */
+#define BOOL_BITFIELD unsigned int
+
+/* As the last action in this file, we poison the identifiers that
+ shouldn't be used. Note, luckily gcc-3.0's token-based integrated
+ preprocessor won't trip on poisoned identifiers that arrive from
+ the expansion of macros. E.g. #define strrchr rindex, won't error
+ if rindex is poisoned after this directive is issued and later on
+ strrchr is called.
+
+ Note: We define bypass macros for the few cases where we really
+ want to use the libc memory allocation routines. Otherwise we
+ insist you use the "x" versions from libiberty. */
+
+#define really_call_malloc malloc
+#define really_call_calloc calloc
+#define really_call_realloc realloc
+
+#if defined(FLEX_SCANNER) || defined(YYBISON) || defined(YYBYACC)
+/* Flex and bison use malloc and realloc. Yuk. Note that this means
+ really_call_* cannot be used in a .l or .y file. */
+#define malloc xmalloc
+#define realloc xrealloc
+#endif
+
+#if (GCC_VERSION >= 3000) && !defined(IN_GCC_PLUGIN)
+
+/* Note autoconf checks for prototype declarations and includes
+ system.h while doing so. Only poison these tokens if actually
+ compiling gcc, so that the autoconf declaration tests for malloc
+ etc don't spuriously fail. */
+#ifdef IN_GCC
+#undef calloc
+#undef strdup
+ #pragma GCC poison calloc strdup
+
+#if !defined(FLEX_SCANNER) && !defined(YYBISON)
+#undef malloc
+#undef realloc
+ #pragma GCC poison malloc realloc
+#endif
+
+/* Old target macros that have moved to the target hooks structure. */
+ #pragma GCC poison ASM_OPEN_PAREN ASM_CLOSE_PAREN \
+ FUNCTION_PROLOGUE FUNCTION_EPILOGUE \
+ FUNCTION_END_PROLOGUE FUNCTION_BEGIN_EPILOGUE \
+ DECL_MACHINE_ATTRIBUTES COMP_TYPE_ATTRIBUTES INSERT_ATTRIBUTES \
+ VALID_MACHINE_DECL_ATTRIBUTE VALID_MACHINE_TYPE_ATTRIBUTE \
+ SET_DEFAULT_TYPE_ATTRIBUTES SET_DEFAULT_DECL_ATTRIBUTES \
+ MERGE_MACHINE_TYPE_ATTRIBUTES MERGE_MACHINE_DECL_ATTRIBUTES \
+ MD_INIT_BUILTINS MD_EXPAND_BUILTIN ASM_OUTPUT_CONSTRUCTOR \
+ ASM_OUTPUT_DESTRUCTOR SIGNED_CHAR_SPEC MAX_CHAR_TYPE_SIZE \
+ WCHAR_UNSIGNED UNIQUE_SECTION SELECT_SECTION SELECT_RTX_SECTION \
+ ENCODE_SECTION_INFO STRIP_NAME_ENCODING ASM_GLOBALIZE_LABEL \
+ ASM_OUTPUT_MI_THUNK CONST_COSTS RTX_COSTS DEFAULT_RTX_COSTS \
+ ADDRESS_COST MACHINE_DEPENDENT_REORG ASM_FILE_START ASM_FILE_END \
+ ASM_SIMPLIFY_DWARF_ADDR INIT_TARGET_OPTABS INIT_SUBTARGET_OPTABS \
+ INIT_GOFAST_OPTABS MULSI3_LIBCALL MULDI3_LIBCALL DIVSI3_LIBCALL \
+ DIVDI3_LIBCALL UDIVSI3_LIBCALL UDIVDI3_LIBCALL MODSI3_LIBCALL \
+ MODDI3_LIBCALL UMODSI3_LIBCALL UMODDI3_LIBCALL BUILD_VA_LIST_TYPE \
+ PRETEND_OUTGOING_VARARGS_NAMED STRUCT_VALUE_INCOMING_REGNUM \
+ ASM_OUTPUT_SECTION_NAME PROMOTE_FUNCTION_ARGS \
+ STRUCT_VALUE_INCOMING STRICT_ARGUMENT_NAMING \
+ PROMOTE_FUNCTION_RETURN PROMOTE_PROTOTYPES STRUCT_VALUE_REGNUM \
+ SETUP_INCOMING_VARARGS EXPAND_BUILTIN_SAVEREGS \
+ DEFAULT_SHORT_ENUMS SPLIT_COMPLEX_ARGS MD_ASM_CLOBBERS \
+ HANDLE_PRAGMA_REDEFINE_EXTNAME HANDLE_PRAGMA_EXTERN_PREFIX \
+ MUST_PASS_IN_STACK FUNCTION_ARG_PASS_BY_REFERENCE \
+ VECTOR_MODE_SUPPORTED_P TARGET_SUPPORTS_HIDDEN \
+ FUNCTION_ARG_PARTIAL_NREGS ASM_OUTPUT_DWARF_DTPREL \
+ ALLOCATE_INITIAL_VALUE
+
+/* Other obsolete target macros, or macros that used to be in target
+ headers and were not used, and may be obsolete or may never have
+ been used. */
+ #pragma GCC poison INT_ASM_OP ASM_OUTPUT_EH_REGION_BEG CPP_PREDEFINES \
+ ASM_OUTPUT_EH_REGION_END ASM_OUTPUT_LABELREF_AS_INT SMALL_STACK \
+ DOESNT_NEED_UNWINDER EH_TABLE_LOOKUP OBJC_SELECTORS_WITHOUT_LABELS \
+ OMIT_EH_TABLE EASY_DIV_EXPR IMPLICIT_FIX_EXPR \
+ LONGJMP_RESTORE_FROM_STACK MAX_INT_TYPE_SIZE ASM_IDENTIFY_GCC \
+ STDC_VALUE TRAMPOLINE_ALIGN ASM_IDENTIFY_GCC_AFTER_SOURCE \
+ SLOW_ZERO_EXTEND SUBREG_REGNO_OFFSET DWARF_LINE_MIN_INSTR_LENGTH \
+ TRADITIONAL_RETURN_FLOAT NO_BUILTIN_SIZE_TYPE \
+ NO_BUILTIN_PTRDIFF_TYPE NO_BUILTIN_WCHAR_TYPE NO_BUILTIN_WINT_TYPE \
+ BLOCK_PROFILER BLOCK_PROFILER_CODE FUNCTION_BLOCK_PROFILER \
+ FUNCTION_BLOCK_PROFILER_EXIT MACHINE_STATE_SAVE \
+ MACHINE_STATE_RESTORE SCCS_DIRECTIVE SECTION_ASM_OP BYTEORDER \
+ ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL HOST_WORDS_BIG_ENDIAN \
+ OBJC_PROLOGUE ALLOCATE_TRAMPOLINE HANDLE_PRAGMA ROUND_TYPE_SIZE \
+ ROUND_TYPE_SIZE_UNIT CONST_SECTION_ASM_OP CRT_GET_RFIB_TEXT \
+ DBX_LBRAC_FIRST DBX_OUTPUT_ENUM DBX_OUTPUT_SOURCE_FILENAME \
+ DBX_WORKING_DIRECTORY INSN_CACHE_DEPTH INSN_CACHE_SIZE \
+ INSN_CACHE_LINE_WIDTH INIT_SECTION_PREAMBLE NEED_ATEXIT ON_EXIT \
+ EXIT_BODY OBJECT_FORMAT_ROSE MULTIBYTE_CHARS MAP_CHARACTER \
+ LIBGCC_NEEDS_DOUBLE FINAL_PRESCAN_LABEL DEFAULT_CALLER_SAVES \
+ LOAD_ARGS_REVERSED MAX_INTEGER_COMPUTATION_MODE \
+ CONVERT_HARD_REGISTER_TO_SSA_P ASM_OUTPUT_MAIN_SOURCE_FILENAME \
+ FIRST_INSN_ADDRESS TEXT_SECTION SHARED_BSS_SECTION_ASM_OP \
+ PROMOTED_MODE EXPAND_BUILTIN_VA_END \
+ LINKER_DOES_NOT_WORK_WITH_DWARF2 FUNCTION_ARG_KEEP_AS_REFERENCE \
+ GIV_SORT_CRITERION MAX_LONG_TYPE_SIZE MAX_LONG_DOUBLE_TYPE_SIZE \
+ MAX_WCHAR_TYPE_SIZE SHARED_SECTION_ASM_OP INTEGRATE_THRESHOLD \
+ FINAL_REG_PARM_STACK_SPACE MAYBE_REG_PARM_STACK_SPACE \
+ TRADITIONAL_PIPELINE_INTERFACE DFA_PIPELINE_INTERFACE \
+ DBX_OUTPUT_STANDARD_TYPES BUILTIN_SETJMP_FRAME_VALUE \
+ SUNOS4_SHARED_LIBRARIES PROMOTE_FOR_CALL_ONLY \
+ SPACE_AFTER_L_OPTION NO_RECURSIVE_FUNCTION_CSE \
+ DEFAULT_MAIN_RETURN TARGET_MEM_FUNCTIONS EXPAND_BUILTIN_VA_ARG \
+ COLLECT_PARSE_FLAG DWARF2_GENERATE_TEXT_SECTION_LABEL WINNING_GDB \
+ ASM_OUTPUT_FILENAME ASM_OUTPUT_SOURCE_LINE FILE_NAME_JOINER \
+ GDB_INV_REF_REGPARM_STABS_LETTER DBX_MEMPARM_STABS_LETTER \
+ PUT_SDB_SRC_FILE STABS_GCC_MARKER DBX_OUTPUT_FUNCTION_END \
+ DBX_OUTPUT_GCC_MARKER DBX_FINISH_SYMBOL SDB_GENERATE_FAKE \
+ NON_SAVING_SETJMP TARGET_LATE_RTL_PROLOGUE_EPILOGUE \
+ CASE_DROPS_THROUGH TARGET_BELL TARGET_BS TARGET_CR TARGET_DIGIT0 \
+ TARGET_ESC TARGET_FF TARGET_NEWLINE TARGET_TAB TARGET_VT \
+ LINK_LIBGCC_SPECIAL DONT_ACCESS_GBLS_AFTER_EPILOGUE \
+ TARGET_OPTIONS TARGET_SWITCHES EXTRA_CC_MODES FINALIZE_PIC \
+ PREDICATE_CODES SPECIAL_MODE_PREDICATES HOST_PTR_PRINTF \
+ EXTRA_SECTIONS EXTRA_SECTION_FUNCTIONS READONLY_DATA_SECTION \
+ TARGET_ASM_EXCEPTION_SECTION TARGET_ASM_EH_FRAME_SECTION \
+ SMALL_ARG_MAX ASM_OUTPUT_SHARED_BSS ASM_OUTPUT_SHARED_COMMON \
+ ASM_OUTPUT_SHARED_LOCAL UNALIGNED_WORD_ASM_OP \
+ ASM_MAKE_LABEL_LINKONCE \
+ ORDER_REGS_FOR_LOCAL_ALLOC
+
+/* Hooks that are no longer used. */
+ #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \
+ LANG_HOOKS_MARK_TREE LANG_HOOKS_INSERT_DEFAULT_ATTRIBUTES \
+ LANG_HOOKS_TREE_INLINING_ESTIMATE_NUM_INSNS \
+ LANG_HOOKS_PUSHLEVEL LANG_HOOKS_SET_BLOCK \
+ LANG_HOOKS_MAYBE_BUILD_CLEANUP LANG_HOOKS_UPDATE_DECL_AFTER_SAVING \
+ LANG_HOOKS_POPLEVEL LANG_HOOKS_TRUTHVALUE_CONVERSION
+
+/* Miscellaneous macros that are no longer used. */
+ #pragma GCC poison USE_MAPPED_LOCATION
+
+/* Libiberty macros that are no longer used in GCC. */
+#undef ANSI_PROTOTYPES
+#undef PTR_CONST
+#undef LONG_DOUBLE
+#undef VPARAMS
+#undef VA_OPEN
+#undef VA_FIXEDARG
+#undef VA_CLOSE
+#undef VA_START
+ #pragma GCC poison ANSI_PROTOTYPES PTR_CONST LONG_DOUBLE VPARAMS VA_OPEN \
+ VA_FIXEDARG VA_CLOSE VA_START
+#endif /* IN_GCC */
+
+/* Note: not all uses of the `index' token (e.g. variable names and
+ structure members) have been eliminated. */
+#undef bcopy
+#undef bzero
+#undef bcmp
+#undef rindex
+ #pragma GCC poison bcopy bzero bcmp rindex
+
+#endif /* GCC >= 3.0 */
+
+/* This macro allows casting away const-ness to pass -Wcast-qual
+ warnings. DO NOT USE THIS UNLESS YOU REALLY HAVE TO! It should
+ only be used in certain specific cases. One valid case is where
+ the C standard definitions or prototypes force you to. E.g. if you
+ need to free a const object, or if you pass a const string to
+ execv, et al. Another valid use would be in an allocation function
+ that creates const objects that need to be initialized. In some
+ cases we have non-const functions that return the argument
+ (e.g. next_nonnote_insn). Rather than create const shadow
+ functions, we can cast away const-ness in calling these interfaces
+ if we're careful to verify that the called function does indeed not
+ modify its argument and the return value is only used in a const
+ context. (This can be somewhat dangerous as these assumptions can
+ change after the fact). Beyond these uses, most other cases of
+ using this macro should be viewed with extreme caution. */
+
+#if defined(__GNUC__) && GCC_VERSION > 4000
+/* GCC 4.0.x has a bug where it may ICE on this expression,
+ so does GCC 3.4.x (PR17436). */
+#define CONST_CAST2(TOTYPE,FROMTYPE,X) ((__extension__(union {FROMTYPE _q; TOTYPE _nq;})(X))._nq)
+#else
+#define CONST_CAST2(TOTYPE,FROMTYPE,X) ((TOTYPE)(FROMTYPE)(X))
+#endif
+#define CONST_CAST(TYPE,X) CONST_CAST2(TYPE, const TYPE, (X))
+#define CONST_CAST_TREE(X) CONST_CAST(union tree_node *, (X))
+#define CONST_CAST_RTX(X) CONST_CAST(struct rtx_def *, (X))
+#define CONST_CAST_BB(X) CONST_CAST(struct basic_block_def *, (X))
+#define CONST_CAST_GIMPLE(X) CONST_CAST(union gimple_statement_d *, (X))
+
+/* Activate certain diagnostics as warnings (not errors via the
+ -Werror flag). */
+#if GCC_VERSION >= 4003
+/* If asserts are disabled, activate -Wuninitialized as a warning (not
+ an error/-Werror). */
+#ifndef ENABLE_ASSERT_CHECKING
+#pragma GCC diagnostic warning "-Wuninitialized"
+#endif
+#endif
+
+#ifdef ENABLE_VALGRIND_CHECKING
+# ifdef HAVE_VALGRIND_MEMCHECK_H
+# include <valgrind/memcheck.h>
+# elif defined HAVE_MEMCHECK_H
+# include <memcheck.h>
+# else
+# include <valgrind.h>
+# endif
+/* Compatibility macros to let valgrind 3.1 work. */
+# ifndef VALGRIND_MAKE_MEM_NOACCESS
+# define VALGRIND_MAKE_MEM_NOACCESS VALGRIND_MAKE_NOACCESS
+# endif
+# ifndef VALGRIND_MAKE_MEM_DEFINED
+# define VALGRIND_MAKE_MEM_DEFINED VALGRIND_MAKE_READABLE
+# endif
+# ifndef VALGRIND_MAKE_MEM_UNDEFINED
+# define VALGRIND_MAKE_MEM_UNDEFINED VALGRIND_MAKE_WRITABLE
+# endif
+#else
+/* Avoid #ifdef:s when we can help it. */
+#define VALGRIND_DISCARD(x)
+#define VALGRIND_MALLOCLIKE_BLOCK(w,x,y,z)
+#define VALGRIND_FREELIKE_BLOCK(x,y)
+#endif
+
+#endif /* ! GCC_SYSTEM_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/target.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/target.h
new file mode 100644
index 0000000..f504947
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/target.h
@@ -0,0 +1,1135 @@
+/* Data structure definitions for a generic GCC target.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>.
+
+ In other words, you are welcome to use, share and improve this program.
+ You are forbidden to forbid anyone else to use, share and improve
+ what you give them. Help stamp out software-hoarding! */
+
+
+/* This file contains a data structure that describes a GCC target.
+ At present it is incomplete, but in future it should grow to
+ contain most or all target machine and target O/S specific
+ information.
+
+ This structure has its initializer declared in target-def.h in the
+ form of large macro TARGET_INITIALIZER that expands to many smaller
+ macros.
+
+ The smaller macros each initialize one component of the structure,
+ and each has a default. Each target should have a file that
+ includes target.h and target-def.h, and overrides any inappropriate
+ defaults by undefining the relevant macro and defining a suitable
+ replacement. That file should then contain the definition of
+ "targetm" like so:
+
+ struct gcc_target targetm = TARGET_INITIALIZER;
+
+ Doing things this way allows us to bring together everything that
+ defines a GCC target. By supplying a default that is appropriate
+ to most targets, we can easily add new items without needing to
+ edit dozens of target configuration files. It should also allow us
+ to gradually reduce the amount of conditional compilation that is
+ scattered throughout GCC. */
+
+#ifndef GCC_TARGET_H
+#define GCC_TARGET_H
+
+#include "tm.h"
+#include "insn-modes.h"
+
+/* Types used by the record_gcc_switches() target function. */
+typedef enum
+{
+ SWITCH_TYPE_PASSED, /* A switch passed on the command line. */
+ SWITCH_TYPE_ENABLED, /* An option that is currently enabled. */
+ SWITCH_TYPE_DESCRIPTIVE, /* Descriptive text, not a switch or option. */
+ SWITCH_TYPE_LINE_START, /* Please emit any necessary text at the start of a line. */
+ SWITCH_TYPE_LINE_END /* Please emit a line terminator. */
+}
+print_switch_type;
+
+typedef int (* print_switch_fn_type) (print_switch_type, const char *);
+
+/* An example implementation for ELF targets. Defined in varasm.c */
+extern int elf_record_gcc_switches (print_switch_type type, const char *);
+
+struct stdarg_info;
+struct spec_info_def;
+
+/* The struct used by the secondary_reload target hook. */
+typedef struct secondary_reload_info
+{
+ /* icode is actually an enum insn_code, but we don't want to force every
+ file that includes target.h to include optabs.h . */
+ int icode;
+ int extra_cost; /* Cost for using (a) scratch register(s) to be taken
+ into account by copy_cost. */
+ /* The next two members are for the use of the backward
+ compatibility hook. */
+ struct secondary_reload_info *prev_sri;
+ int t_icode; /* Actually an enum insn_code - see above. */
+} secondary_reload_info;
+
+/* This is defined in sched-int.h . */
+struct _dep;
+
+/* This is defined in ddg.h . */
+struct ddg;
+
+struct gcc_target
+{
+ /* Functions that output assembler for the target. */
+ struct asm_out
+ {
+ /* Opening and closing parentheses for asm expression grouping. */
+ const char *open_paren, *close_paren;
+
+ /* Assembler instructions for creating various kinds of integer object. */
+ const char *byte_op;
+ struct asm_int_op
+ {
+ const char *hi;
+ const char *si;
+ const char *di;
+ const char *ti;
+ } aligned_op, unaligned_op;
+
+ /* Try to output the assembler code for an integer object whose
+ value is given by X. SIZE is the size of the object in bytes and
+ ALIGNED_P indicates whether it is aligned. Return true if
+ successful. Only handles cases for which BYTE_OP, ALIGNED_OP
+ and UNALIGNED_OP are NULL. */
+ bool (* integer) (rtx x, unsigned int size, int aligned_p);
+
+ /* Output code that will globalize a label. */
+ void (* globalize_label) (FILE *, const char *);
+
+ /* Output code that will globalize a declaration. */
+ void (* globalize_decl_name) (FILE *, tree);
+
+ /* Output code that will emit a label for unwind info, if this
+ target requires such labels. Second argument is the decl the
+ unwind info is associated with, third is a boolean: true if
+ this is for exception handling, fourth is a boolean: true if
+ this is only a placeholder for an omitted FDE. */
+ void (* unwind_label) (FILE *, tree, int, int);
+
+ /* Output code that will emit a label to divide up the exception
+ table. */
+ void (* except_table_label) (FILE *);
+
+ /* Emit any directives required to unwind this instruction. */
+ void (* unwind_emit) (FILE *, rtx);
+
+ /* Output an internal label. */
+ void (* internal_label) (FILE *, const char *, unsigned long);
+
+ /* Emit a ttype table reference to a typeinfo object. */
+ bool (* ttype) (rtx);
+
+ /* Emit an assembler directive to set visibility for the symbol
+ associated with the tree decl. */
+ void (* visibility) (tree, int);
+
+ /* Output the assembler code for entry to a function. */
+ void (* function_prologue) (FILE *, HOST_WIDE_INT);
+
+ /* Output the assembler code for end of prologue. */
+ void (* function_end_prologue) (FILE *);
+
+ /* Output the assembler code for start of epilogue. */
+ void (* function_begin_epilogue) (FILE *);
+
+ /* Output the assembler code for function exit. */
+ void (* function_epilogue) (FILE *, HOST_WIDE_INT);
+
+ /* Initialize target-specific sections. */
+ void (* init_sections) (void);
+
+ /* Tell assembler to change to section NAME with attributes FLAGS.
+ If DECL is non-NULL, it is the VAR_DECL or FUNCTION_DECL with
+ which this section is associated. */
+ void (* named_section) (const char *name, unsigned int flags, tree decl);
+
+ /* Return a mask describing how relocations should be treated when
+ selecting sections. Bit 1 should be set if global relocations
+ should be placed in a read-write section; bit 0 should be set if
+ local relocations should be placed in a read-write section. */
+ int (*reloc_rw_mask) (void);
+
+ /* Return a section for EXP. It may be a DECL or a constant. RELOC
+ is nonzero if runtime relocations must be applied; bit 1 will be
+ set if the runtime relocations require non-local name resolution.
+ ALIGN is the required alignment of the data. */
+ section *(* select_section) (tree, int, unsigned HOST_WIDE_INT);
+
+ /* Return a section for X. MODE is X's mode and ALIGN is its
+ alignment in bits. */
+ section *(* select_rtx_section) (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+
+ /* Select a unique section name for DECL. RELOC is the same as
+ for SELECT_SECTION. */
+ void (* unique_section) (tree, int);
+
+ /* Return the readonly data section associated with function DECL. */
+ section *(* function_rodata_section) (tree);
+
+ /* Output a constructor for a symbol with a given priority. */
+ void (* constructor) (rtx, int);
+
+ /* Output a destructor for a symbol with a given priority. */
+ void (* destructor) (rtx, int);
+
+ /* Output the assembler code for a thunk function. THUNK_DECL is the
+ declaration for the thunk function itself, FUNCTION is the decl for
+ the target function. DELTA is an immediate constant offset to be
+ added to THIS. If VCALL_OFFSET is nonzero, the word at
+ *(*this + vcall_offset) should be added to THIS. */
+ void (* output_mi_thunk) (FILE *file, tree thunk_decl,
+ HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
+ tree function_decl);
+
+ /* Determine whether output_mi_thunk would succeed. */
+ /* ??? Ideally, this hook would not exist, and success or failure
+ would be returned from output_mi_thunk directly. But there's
+ too much undo-able setup involved in invoking output_mi_thunk.
+ Could be fixed by making output_mi_thunk emit rtl instead of
+ text to the output file. */
+ bool (* can_output_mi_thunk) (const_tree thunk_decl, HOST_WIDE_INT delta,
+ HOST_WIDE_INT vcall_offset,
+ const_tree function_decl);
+
+ /* Output any boilerplate text needed at the beginning of a
+ translation unit. */
+ void (*file_start) (void);
+
+ /* Output any boilerplate text needed at the end of a
+ translation unit. */
+ void (*file_end) (void);
+
+ /* Output an assembler pseudo-op to declare a library function name
+ external. */
+ void (*external_libcall) (rtx);
+
+ /* Output an assembler directive to mark decl live. This instructs
+ linker to not dead code strip this symbol. */
+ void (*mark_decl_preserved) (const char *);
+
+ /* Output a record of the command line switches that have been passed. */
+ print_switch_fn_type record_gcc_switches;
+ /* The name of the section that the example ELF implementation of
+ record_gcc_switches will use to store the information. Target
+ specific versions of record_gcc_switches may or may not use
+ this information. */
+ const char * record_gcc_switches_section;
+
+ /* Output the definition of a section anchor. */
+ void (*output_anchor) (rtx);
+
+ /* Output a DTP-relative reference to a TLS symbol. */
+ void (*output_dwarf_dtprel) (FILE *file, int size, rtx x);
+
+ } asm_out;
+
+ /* Functions relating to instruction scheduling. */
+ struct sched
+ {
+ /* Given the current cost, COST, of an insn, INSN, calculate and
+ return a new cost based on its relationship to DEP_INSN through
+ the dependence LINK. The default is to make no adjustment. */
+ int (* adjust_cost) (rtx insn, rtx link, rtx dep_insn, int cost);
+
+ /* Adjust the priority of an insn as you see fit. Returns the new
+ priority. */
+ int (* adjust_priority) (rtx, int);
+
+ /* Function which returns the maximum number of insns that can be
+ scheduled in the same machine cycle. This must be constant
+ over an entire compilation. The default is 1. */
+ int (* issue_rate) (void);
+
+ /* Calculate how much this insn affects how many more insns we
+ can emit this cycle. Default is they all cost the same. */
+ int (* variable_issue) (FILE *, int, rtx, int);
+
+ /* Initialize machine-dependent scheduling code. */
+ void (* md_init) (FILE *, int, int);
+
+ /* Finalize machine-dependent scheduling code. */
+ void (* md_finish) (FILE *, int);
+
+ /* Initialize machine-dependent function wide scheduling code. */
+ void (* md_init_global) (FILE *, int, int);
+
+ /* Finalize machine-dependent function wide scheduling code. */
+ void (* md_finish_global) (FILE *, int);
+
+ /* Reorder insns in a machine-dependent fashion, in two different
+ places. Default does nothing. */
+ int (* reorder) (FILE *, int, rtx *, int *, int);
+ int (* reorder2) (FILE *, int, rtx *, int *, int);
+
+ /* The following member value is a pointer to a function called
+ after evaluation forward dependencies of insns in chain given
+ by two parameter values (head and tail correspondingly). */
+ void (* dependencies_evaluation_hook) (rtx, rtx);
+
+ /* The values of the following four members are pointers to
+ functions used to simplify the automaton descriptions.
+ dfa_pre_cycle_insn and dfa_post_cycle_insn give functions
+ returning insns which are used to change the pipeline hazard
+ recognizer state when the new simulated processor cycle
+ correspondingly starts and finishes. The function defined by
+ init_dfa_pre_cycle_insn and init_dfa_post_cycle_insn are used
+ to initialize the corresponding insns. The default values of
+ the members result in not changing the automaton state when
+ the new simulated processor cycle correspondingly starts and
+ finishes. */
+ void (* init_dfa_pre_cycle_insn) (void);
+ rtx (* dfa_pre_cycle_insn) (void);
+ void (* init_dfa_post_cycle_insn) (void);
+ rtx (* dfa_post_cycle_insn) (void);
+
+ /* The values of the following two members are pointers to
+ functions used to simplify the automaton descriptions.
+ dfa_pre_advance_cycle and dfa_post_advance_cycle are getting called
+ immediately before and after cycle is advanced. */
+ void (* dfa_pre_advance_cycle) (void);
+ void (* dfa_post_advance_cycle) (void);
+
+ /* The following member value is a pointer to a function returning value
+ which defines how many insns in queue `ready' will we try for
+ multi-pass scheduling. If the member value is nonzero and the
+ function returns positive value, the DFA based scheduler will make
+ multi-pass scheduling for the first cycle. In other words, we will
+ try to choose ready insn which permits to start maximum number of
+ insns on the same cycle. */
+ int (* first_cycle_multipass_dfa_lookahead) (void);
+
+ /* The following member value is pointer to a function controlling
+ what insns from the ready insn queue will be considered for the
+ multipass insn scheduling. If the hook returns zero for insn
+ passed as the parameter, the insn will be not chosen to be
+ issued. */
+ int (* first_cycle_multipass_dfa_lookahead_guard) (rtx);
+
+ /* The following member value is pointer to a function called by
+ the insn scheduler before issuing insn passed as the third
+ parameter on given cycle. If the hook returns nonzero, the
+ insn is not issued on given processors cycle. Instead of that,
+ the processor cycle is advanced. If the value passed through
+ the last parameter is zero, the insn ready queue is not sorted
+ on the new cycle start as usually. The first parameter passes
+ file for debugging output. The second one passes the scheduler
+ verbose level of the debugging output. The forth and the fifth
+ parameter values are correspondingly processor cycle on which
+ the previous insn has been issued and the current processor
+ cycle. */
+ int (* dfa_new_cycle) (FILE *, int, rtx, int, int, int *);
+
+ /* The following member value is a pointer to a function called by the
+ insn scheduler. It should return true if there exists a dependence
+ which is considered costly by the target, between the insn
+ DEP_PRO (&_DEP), and the insn DEP_CON (&_DEP). The first parameter is
+ the dep that represents the dependence between the two insns. The
+ second argument is the cost of the dependence as estimated by
+ the scheduler. The last argument is the distance in cycles
+ between the already scheduled insn (first parameter) and the
+ second insn (second parameter). */
+ bool (* is_costly_dependence) (struct _dep *_dep, int, int);
+
+ /* Given the current cost, COST, of an insn, INSN, calculate and
+ return a new cost based on its relationship to DEP_INSN through the
+ dependence of type DEP_TYPE. The default is to make no adjustment. */
+ int (* adjust_cost_2) (rtx insn, int, rtx dep_insn, int cost, int dw);
+
+ /* The following member value is a pointer to a function called
+ by the insn scheduler. This hook is called to notify the backend
+ that new instructions were emitted. */
+ void (* h_i_d_extended) (void);
+
+ /* Next 5 functions are for multi-point scheduling. */
+
+ /* Allocate memory for scheduler context. */
+ void *(* alloc_sched_context) (void);
+
+ /* Fills the context from the local machine scheduler context. */
+ void (* init_sched_context) (void *, bool);
+
+ /* Sets local machine scheduler context to a saved value. */
+ void (* set_sched_context) (void *);
+
+ /* Clears a scheduler context so it becomes like after init. */
+ void (* clear_sched_context) (void *);
+
+ /* Frees the scheduler context. */
+ void (* free_sched_context) (void *);
+
+ /* The following member value is a pointer to a function called
+ by the insn scheduler.
+ The first parameter is an instruction, the second parameter is the type
+ of the requested speculation, and the third parameter is a pointer to the
+ speculative pattern of the corresponding type (set if return value == 1).
+ It should return
+ -1, if there is no pattern, that will satisfy the requested speculation
+ type,
+ 0, if current pattern satisfies the requested speculation type,
+ 1, if pattern of the instruction should be changed to the newly
+ generated one. */
+ int (* speculate_insn) (rtx, int, rtx *);
+
+ /* The following member value is a pointer to a function called
+ by the insn scheduler. It should return true if the check instruction
+ passed as the parameter needs a recovery block. */
+ bool (* needs_block_p) (int);
+
+ /* The following member value is a pointer to a function called
+ by the insn scheduler. It should return a pattern for the check
+ instruction.
+ The first parameter is a speculative instruction, the second parameter
+ is the label of the corresponding recovery block (or null, if it is a
+ simple check). If the mutation of the check is requested (e.g. from
+ ld.c to chk.a), the third parameter is true - in this case the first
+ parameter is the previous check. */
+ rtx (* gen_spec_check) (rtx, rtx, int);
+
+ /* The following member value is a pointer to a function controlling
+ what insns from the ready insn queue will be considered for the
+ multipass insn scheduling. If the hook returns zero for the insn
+ passed as the parameter, the insn will not be chosen to be
+ issued. This hook is used to discard speculative instructions,
+ that stand at the first position of the ready list. */
+ bool (* first_cycle_multipass_dfa_lookahead_guard_spec) (const_rtx);
+
+ /* The following member value is a pointer to a function that provides
+ information about the speculation capabilities of the target.
+ The parameter is a pointer to spec_info variable. */
+ void (* set_sched_flags) (struct spec_info_def *);
+
+ /* Return speculation types of the instruction passed as the parameter. */
+ int (* get_insn_spec_ds) (rtx);
+
+ /* Return speculation types that are checked for the instruction passed as
+ the parameter. */
+ int (* get_insn_checked_ds) (rtx);
+
+ /* Return bool if rtx scanning should just skip current layer and
+ advance to the inner rtxes. */
+ bool (* skip_rtx_p) (const_rtx);
+
+ /* The following member value is a pointer to a function that provides
+ information about the target resource-based lower bound which is
+ used by the swing modulo scheduler. The parameter is a pointer
+ to ddg variable. */
+ int (* sms_res_mii) (struct ddg *);
+ } sched;
+
+ /* Functions relating to vectorization. */
+ struct vectorize
+ {
+ /* The following member value is a pointer to a function called
+ by the vectorizer, and return the decl of the target builtin
+ function. */
+ tree (* builtin_mask_for_load) (void);
+
+ /* Returns a code for builtin that realizes vectorized version of
+ function, or NULL_TREE if not available. */
+ tree (* builtin_vectorized_function) (unsigned, tree, tree);
+
+ /* Returns a code for builtin that realizes vectorized version of
+ conversion, or NULL_TREE if not available. */
+ tree (* builtin_conversion) (unsigned, tree);
+
+ /* Target builtin that implements vector widening multiplication.
+ builtin_mul_widen_eve computes the element-by-element products
+ for the even elements, and builtin_mul_widen_odd computes the
+ element-by-element products for the odd elements. */
+ tree (* builtin_mul_widen_even) (tree);
+ tree (* builtin_mul_widen_odd) (tree);
+
+ /* Returns the cost to be added to the overheads involved with
+ executing the vectorized version of a loop. */
+ int (*builtin_vectorization_cost) (bool);
+
+ /* Return true if vector alignment is reachable (by peeling N
+ iterations) for the given type. */
+ bool (* vector_alignment_reachable) (const_tree, bool);
+
+ /* Target builtin that implements vector permute. */
+ tree (* builtin_vec_perm) (tree, tree*);
+} vectorize;
+
+ /* The initial value of target_flags. */
+ int default_target_flags;
+
+ /* Handle target switch CODE (an OPT_* value). ARG is the argument
+ passed to the switch; it is NULL if no argument was. VALUE is the
+ value of ARG if CODE specifies a UInteger option, otherwise it is
+ 1 if the positive form of the switch was used and 0 if the negative
+ form was. Return true if the switch was valid. */
+ bool (* handle_option) (size_t code, const char *arg, int value);
+
+ /* Display extra, target specific information in response to a
+ --target-help switch. */
+ void (* target_help) (void);
+
+ /* Return machine mode for filter value. */
+ enum machine_mode (* eh_return_filter_mode) (void);
+
+ /* Return machine mode for libgcc expanded cmp instructions. */
+ enum machine_mode (* libgcc_cmp_return_mode) (void);
+
+ /* Return machine mode for libgcc expanded shift instructions. */
+ enum machine_mode (* libgcc_shift_count_mode) (void);
+
+ /* Return machine mode to be used for _Unwind_Word type. */
+ enum machine_mode (* unwind_word_mode) (void);
+
+ /* Given two decls, merge their attributes and return the result. */
+ tree (* merge_decl_attributes) (tree, tree);
+
+ /* Given two types, merge their attributes and return the result. */
+ tree (* merge_type_attributes) (tree, tree);
+
+ /* Table of machine attributes and functions to handle them.
+ Ignored if NULL. */
+ const struct attribute_spec *attribute_table;
+
+ /* Return zero if the attributes on TYPE1 and TYPE2 are incompatible,
+ one if they are compatible and two if they are nearly compatible
+ (which causes a warning to be generated). */
+ int (* comp_type_attributes) (const_tree type1, const_tree type2);
+
+ /* Assign default attributes to the newly defined TYPE. */
+ void (* set_default_type_attributes) (tree type);
+
+ /* Insert attributes on the newly created DECL. */
+ void (* insert_attributes) (tree decl, tree *attributes);
+
+ /* Return true if FNDECL (which has at least one machine attribute)
+ can be inlined despite its machine attributes, false otherwise. */
+ bool (* function_attribute_inlinable_p) (const_tree fndecl);
+
+ /* Return true if bitfields in RECORD_TYPE should follow the
+ Microsoft Visual C++ bitfield layout rules. */
+ bool (* ms_bitfield_layout_p) (const_tree record_type);
+
+ /* True if the target supports decimal floating point. */
+ bool (* decimal_float_supported_p) (void);
+
+ /* True if the target supports fixed-point. */
+ bool (* fixed_point_supported_p) (void);
+
+ /* Return true if anonymous bitfields affect structure alignment. */
+ bool (* align_anon_bitfield) (void);
+
+ /* Return true if volatile bitfields should use the narrowest type possible.
+ Return false if they should use the container type. */
+ bool (* narrow_volatile_bitfield) (void);
+
+ /* Set up target-specific built-in functions. */
+ void (* init_builtins) (void);
+
+ /* Expand a target-specific builtin. */
+ rtx (* expand_builtin) (tree exp, rtx target, rtx subtarget,
+ enum machine_mode mode, int ignore);
+
+ /* Select a replacement for a target-specific builtin. This is done
+ *before* regular type checking, and so allows the target to implement
+ a crude form of function overloading. The result is a complete
+ expression that implements the operation. */
+ tree (*resolve_overloaded_builtin) (tree decl, tree params);
+
+ /* Fold a target-specific builtin. */
+ tree (* fold_builtin) (tree fndecl, tree arglist, bool ignore);
+
+ /* Returns a code for a target-specific builtin that implements
+ reciprocal of the function, or NULL_TREE if not available. */
+ tree (* builtin_reciprocal) (unsigned, bool, bool);
+
+ /* For a vendor-specific TYPE, return a pointer to a statically-allocated
+ string containing the C++ mangling for TYPE. In all other cases, return
+ NULL. */
+ const char * (* mangle_type) (const_tree type);
+
+ /* Make any adjustments to libfunc names needed for this target. */
+ void (* init_libfuncs) (void);
+
+ /* Given a decl, a section name, and whether the decl initializer
+ has relocs, choose attributes for the section. */
+ /* ??? Should be merged with SELECT_SECTION and UNIQUE_SECTION. */
+ unsigned int (* section_type_flags) (tree, const char *, int);
+
+ /* True if new jumps cannot be created, to replace existing ones or
+ not, at the current point in the compilation. */
+ bool (* cannot_modify_jumps_p) (void);
+
+ /* Return a register class for which branch target register
+ optimizations should be applied. */
+ int (* branch_target_register_class) (void);
+
+ /* Return true if branch target register optimizations should include
+ callee-saved registers that are not already live during the current
+ function. AFTER_PE_GEN is true if prologues and epilogues have
+ already been generated. */
+ bool (* branch_target_register_callee_saved) (bool after_pe_gen);
+
+ /* Return true if the target supports conditional execution. */
+ bool (* have_conditional_execution) (void);
+
+ /* True if the constant X cannot be placed in the constant pool. */
+ bool (* cannot_force_const_mem) (rtx);
+
+ /* True if the insn X cannot be duplicated. */
+ bool (* cannot_copy_insn_p) (rtx);
+
+ /* True if X is considered to be commutative. */
+ bool (* commutative_p) (const_rtx, int);
+
+ /* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */
+ rtx (* delegitimize_address) (rtx);
+
+ /* True if the given constant can be put into an object_block. */
+ bool (* use_blocks_for_constant_p) (enum machine_mode, const_rtx);
+
+ /* The minimum and maximum byte offsets for anchored addresses. */
+ HOST_WIDE_INT min_anchor_offset;
+ HOST_WIDE_INT max_anchor_offset;
+
+ /* True if section anchors can be used to access the given symbol. */
+ bool (* use_anchors_for_symbol_p) (const_rtx);
+
+ /* True if it is OK to do sibling call optimization for the specified
+ call expression EXP. DECL will be the called function, or NULL if
+ this is an indirect call. */
+ bool (*function_ok_for_sibcall) (tree decl, tree exp);
+
+ /* Establish appropriate back-end context for processing the function
+ FNDECL. The argument might be NULL to indicate processing at top
+ level, outside of any function scope. */
+ void (*set_current_function) (tree fndecl);
+
+ /* True if EXP should be placed in a "small data" section. */
+ bool (* in_small_data_p) (const_tree);
+
+ /* True if EXP names an object for which name resolution must resolve
+ to the current executable or shared library. */
+ bool (* binds_local_p) (const_tree);
+
+ /* Modify and return the identifier of a DECL's external name,
+ originally identified by ID, as required by the target,
+ (eg, append @nn to windows32 stdcall function names).
+ The default is to return ID without modification. */
+ tree (* mangle_decl_assembler_name) (tree decl, tree id);
+
+ /* Do something target-specific to record properties of the DECL into
+ the associated SYMBOL_REF. */
+ void (* encode_section_info) (tree, rtx, int);
+
+ /* Undo the effects of encode_section_info on the symbol string. */
+ const char * (* strip_name_encoding) (const char *);
+
+ /* If shift optabs for MODE are known to always truncate the shift count,
+ return the mask that they apply. Return 0 otherwise. */
+ unsigned HOST_WIDE_INT (* shift_truncation_mask) (enum machine_mode mode);
+
+ /* Return the number of divisions in the given MODE that should be present,
+ so that it is profitable to turn the division into a multiplication by
+ the reciprocal. */
+ unsigned int (* min_divisions_for_recip_mul) (enum machine_mode mode);
+
+ /* If the representation of integral MODE is such that values are
+ always sign-extended to a wider mode MODE_REP then return
+ SIGN_EXTEND. Return UNKNOWN otherwise. */
+ /* Note that the return type ought to be RTX_CODE, but that's not
+ necessarily defined at this point. */
+ int (* mode_rep_extended) (enum machine_mode mode,
+ enum machine_mode mode_rep);
+
+ /* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
+ bool (* valid_pointer_mode) (enum machine_mode mode);
+
+ /* True if MODE is valid for the target. By "valid", we mean able to
+ be manipulated in non-trivial ways. In particular, this means all
+ the arithmetic is supported. */
+ bool (* scalar_mode_supported_p) (enum machine_mode mode);
+
+ /* Similarly for vector modes. "Supported" here is less strict. At
+ least some operations are supported; need to check optabs or builtins
+ for further details. */
+ bool (* vector_mode_supported_p) (enum machine_mode mode);
+
+ /* True if a vector is opaque. */
+ bool (* vector_opaque_p) (const_tree);
+
+ /* Compute a (partial) cost for rtx X. Return true if the complete
+ cost has been computed, and false if subexpressions should be
+ scanned. In either case, *TOTAL contains the cost result. */
+ /* Note that CODE and OUTER_CODE ought to be RTX_CODE, but that's
+ not necessarily defined at this point. */
+ bool (* rtx_costs) (rtx x, int code, int outer_code, int *total, bool speed);
+
+ /* Compute the cost of X, used as an address. Never called with
+ invalid addresses. */
+ int (* address_cost) (rtx x, bool speed);
+
+ /* Return where to allocate pseudo for a given hard register initial
+ value. */
+ rtx (* allocate_initial_value) (rtx x);
+
+ /* Return nonzero if evaluating UNSPEC[_VOLATILE] X might cause a trap.
+ FLAGS has the same meaning as in rtlanal.c: may_trap_p_1. */
+ int (* unspec_may_trap_p) (const_rtx x, unsigned flags);
+
+ /* Given a register, this hook should return a parallel of registers
+ to represent where to find the register pieces. Define this hook
+ if the register and its mode are represented in Dwarf in
+ non-contiguous locations, or if the register should be
+ represented in more than one register in Dwarf. Otherwise, this
+ hook should return NULL_RTX. */
+ rtx (* dwarf_register_span) (rtx);
+
+ /* If expand_builtin_init_dwarf_reg_sizes needs to fill in table
+ entries not corresponding directly to registers below
+ FIRST_PSEUDO_REGISTER, this hook should generate the necessary
+ code, given the address of the table. */
+ void (* init_dwarf_reg_sizes_extra) (tree);
+
+ /* Fetch the fixed register(s) which hold condition codes, for
+ targets where it makes sense to look for duplicate assignments to
+ the condition codes. This should return true if there is such a
+ register, false otherwise. The arguments should be set to the
+ fixed register numbers. Up to two condition code registers are
+ supported. If there is only one for this target, the int pointed
+ at by the second argument should be set to -1. */
+ bool (* fixed_condition_code_regs) (unsigned int *, unsigned int *);
+
+ /* If two condition code modes are compatible, return a condition
+ code mode which is compatible with both, such that a comparison
+ done in the returned mode will work for both of the original
+ modes. If the condition code modes are not compatible, return
+ VOIDmode. */
+ enum machine_mode (* cc_modes_compatible) (enum machine_mode,
+ enum machine_mode);
+
+ /* Do machine-dependent code transformations. Called just before
+ delayed-branch scheduling. */
+ void (* machine_dependent_reorg) (void);
+
+ /* Create the __builtin_va_list type. */
+ tree (* build_builtin_va_list) (void);
+
+ /* Get the cfun/fndecl calling abi __builtin_va_list type. */
+ tree (* fn_abi_va_list) (tree);
+
+ /* Get the __builtin_va_list type dependent on input type. */
+ tree (* canonical_va_list_type) (tree);
+
+ /* Expand the __builtin_va_start builtin. */
+ void (* expand_builtin_va_start) (tree valist, rtx nextarg);
+
+ /* Gimplifies a VA_ARG_EXPR. */
+ tree (* gimplify_va_arg_expr) (tree valist, tree type, gimple_seq *pre_p,
+ gimple_seq *post_p);
+
+ /* Validity-checking routines for PCH files, target-specific.
+ get_pch_validity returns a pointer to the data to be stored,
+ and stores the size in its argument. pch_valid_p gets the same
+ information back and returns NULL if the PCH is valid,
+ or an error message if not.
+ */
+ void * (* get_pch_validity) (size_t *);
+ const char * (* pch_valid_p) (const void *, size_t);
+
+ /* If nonnull, this function checks whether a PCH file with the
+ given set of target flags can be used. It returns NULL if so,
+ otherwise it returns an error message. */
+ const char *(*check_pch_target_flags) (int);
+
+ /* True if the compiler should give an enum type only as many
+ bytes as it takes to represent the range of possible values of
+ that type. */
+ bool (* default_short_enums) (void);
+
+ /* This target hook returns an rtx that is used to store the address
+ of the current frame into the built-in setjmp buffer. */
+ rtx (* builtin_setjmp_frame_value) (void);
+
+ /* This target hook should add STRING_CST trees for any hard regs
+ the port wishes to automatically clobber for an asm. */
+ tree (* md_asm_clobbers) (tree, tree, tree);
+
+ /* This target hook allows the backend to specify a calling convention
+ in the debug information. This function actually returns an
+ enum dwarf_calling_convention, but because of forward declarations
+ and not wanting to include dwarf2.h everywhere target.h is included
+ the function is being declared as an int. */
+ int (* dwarf_calling_convention) (const_tree);
+
+ /* This target hook allows the backend to emit frame-related insns that
+ contain UNSPECs or UNSPEC_VOLATILEs. The call frame debugging info
+ engine will invoke it on insns of the form
+ (set (reg) (unspec [...] UNSPEC_INDEX))
+ and
+ (set (reg) (unspec_volatile [...] UNSPECV_INDEX))
+ to let the backend emit the call frame instructions. */
+ void (* dwarf_handle_frame_unspec) (const char *, rtx, int);
+
+ /* Perform architecture specific checking of statements gimplified
+ from VA_ARG_EXPR. STMT is the statement. Returns true if the statement
+ doesn't need to be checked for va_list references. */
+ bool (* stdarg_optimize_hook) (struct stdarg_info *ai, const_gimple stmt);
+
+ /* This target hook allows the operating system to override the DECL
+ that represents the external variable that contains the stack
+ protection guard variable. The type of this DECL is ptr_type_node. */
+ tree (* stack_protect_guard) (void);
+
+ /* This target hook allows the operating system to override the CALL_EXPR
+ that is invoked when a check vs the guard variable fails. */
+ tree (* stack_protect_fail) (void);
+
+ /* Returns NULL if target supports the insn within a doloop block,
+ otherwise it returns an error message. */
+ const char * (*invalid_within_doloop) (const_rtx);
+
+ /* DECL is a variable or function with __attribute__((dllimport))
+ specified. Use this hook if the target needs to add extra validation
+ checks to handle_dll_attribute (). */
+ bool (* valid_dllimport_attribute_p) (const_tree decl);
+
+ /* Functions relating to calls - argument passing, returns, etc. */
+ struct calls {
+ bool (*promote_function_args) (const_tree fntype);
+ bool (*promote_function_return) (const_tree fntype);
+ bool (*promote_prototypes) (const_tree fntype);
+ rtx (*struct_value_rtx) (tree fndecl, int incoming);
+ bool (*return_in_memory) (const_tree type, const_tree fndecl);
+ bool (*return_in_msb) (const_tree type);
+
+ /* Return true if a parameter must be passed by reference. TYPE may
+ be null if this is a libcall. CA may be null if this query is
+ from __builtin_va_arg. */
+ bool (*pass_by_reference) (CUMULATIVE_ARGS *ca, enum machine_mode mode,
+ const_tree type, bool named_arg);
+
+ rtx (*expand_builtin_saveregs) (void);
+ /* Returns pretend_argument_size. */
+ void (*setup_incoming_varargs) (CUMULATIVE_ARGS *ca, enum machine_mode mode,
+ tree type, int *pretend_arg_size,
+ int second_time);
+ bool (*strict_argument_naming) (CUMULATIVE_ARGS *ca);
+ /* Returns true if we should use
+ targetm.calls.setup_incoming_varargs() and/or
+ targetm.calls.strict_argument_naming(). */
+ bool (*pretend_outgoing_varargs_named) (CUMULATIVE_ARGS *ca);
+
+ /* Given a complex type T, return true if a parameter of type T
+ should be passed as two scalars. */
+ bool (* split_complex_arg) (const_tree type);
+
+ /* Return true if type T, mode MODE, may not be passed in registers,
+ but must be passed on the stack. */
+ /* ??? This predicate should be applied strictly after pass-by-reference.
+ Need audit to verify that this is the case. */
+ bool (* must_pass_in_stack) (enum machine_mode mode, const_tree t);
+
+ /* Return true if type TYPE, mode MODE, which is passed by reference,
+ should have the object copy generated by the callee rather than
+ the caller. It is never called for TYPE requiring constructors. */
+ bool (* callee_copies) (CUMULATIVE_ARGS *ca, enum machine_mode mode,
+ const_tree type, bool named);
+
+ /* Return zero for arguments passed entirely on the stack or entirely
+ in registers. If passed in both, return the number of bytes passed
+ in registers; the balance is therefore passed on the stack. */
+ int (* arg_partial_bytes) (CUMULATIVE_ARGS *ca, enum machine_mode mode,
+ tree type, bool named);
+
+ /* Return the diagnostic message string if function without a prototype
+ is not allowed for this 'val' argument; NULL otherwise. */
+ const char *(*invalid_arg_for_unprototyped_fn) (const_tree typelist,
+ const_tree funcdecl,
+ const_tree val);
+
+ /* Return an rtx for the return value location of the function
+ specified by FN_DECL_OR_TYPE with a return type of RET_TYPE. */
+ rtx (*function_value) (const_tree ret_type, const_tree fn_decl_or_type,
+ bool outgoing);
+
+ /* Return the rtx for the result of a libcall of mode MODE,
+ calling the function FN_NAME. */
+ rtx (*libcall_value) (enum machine_mode, rtx);
+
+ /* Return an rtx for the argument pointer incoming to the
+ current function. */
+ rtx (*internal_arg_pointer) (void);
+
+ /* Update the current function stack boundary if needed. */
+ void (*update_stack_boundary) (void);
+
+ /* Handle stack alignment and return an rtx for Dynamic Realign
+ Argument Pointer if necessary. */
+ rtx (*get_drap_rtx) (void);
+
+ /* Return true if all function parameters should be spilled to the
+ stack. */
+ bool (*allocate_stack_slots_for_args) (void);
+
+ } calls;
+
+ /* Return the diagnostic message string if conversion from FROMTYPE
+ to TOTYPE is not allowed, NULL otherwise. */
+ const char *(*invalid_conversion) (const_tree fromtype, const_tree totype);
+
+ /* Return the diagnostic message string if the unary operation OP is
+ not permitted on TYPE, NULL otherwise. */
+ const char *(*invalid_unary_op) (int op, const_tree type);
+
+ /* Return the diagnostic message string if the binary operation OP
+ is not permitted on TYPE1 and TYPE2, NULL otherwise. */
+ const char *(*invalid_binary_op) (int op, const_tree type1, const_tree type2);
+
+ /* Return the array of IRA cover classes for the current target. */
+ const enum reg_class *(*ira_cover_classes) (void);
+
+ /* Return the class for a secondary reload, and fill in extra information. */
+ enum reg_class (*secondary_reload) (bool, rtx, enum reg_class,
+ enum machine_mode,
+ struct secondary_reload_info *);
+
+ /* This target hook allows the backend to perform additional
+ processing while initializing for variable expansion. */
+ void (* expand_to_rtl_hook) (void);
+
+ /* This target hook allows the backend to perform additional
+ instantiations on rtx that are not actually in insns yet,
+ but will be later. */
+ void (* instantiate_decls) (void);
+
+ /* Return true if is OK to use a hard register REGNO as scratch register
+ in peephole2. */
+ bool (* hard_regno_scratch_ok) (unsigned int regno);
+
+ /* Functions specific to the C family of frontends. */
+ struct c {
+ /* Return machine mode for non-standard suffix
+ or VOIDmode if non-standard suffixes are unsupported. */
+ enum machine_mode (*mode_for_suffix) (char);
+ } c;
+
+ /* Functions specific to the C++ frontend. */
+ struct cxx {
+ /* Return the integer type used for guard variables. */
+ tree (*guard_type) (void);
+ /* Return true if only the low bit of the guard should be tested. */
+ bool (*guard_mask_bit) (void);
+ /* Returns the size of the array cookie for an array of type. */
+ tree (*get_cookie_size) (tree);
+ /* Returns true if the element size should be stored in the
+ array cookie. */
+ bool (*cookie_has_size) (void);
+ /* Allows backends to perform additional processing when
+ deciding if a class should be exported or imported. */
+ int (*import_export_class) (tree, int);
+ /* Returns true if constructors and destructors return "this". */
+ bool (*cdtor_returns_this) (void);
+ /* Returns true if the key method for a class can be an inline
+ function, so long as it is not declared inline in the class
+ itself. Returning true is the behavior required by the Itanium
+ C++ ABI. */
+ bool (*key_method_may_be_inline) (void);
+ /* DECL is a virtual table, virtual table table, typeinfo object,
+ or other similar implicit class data object that will be
+ emitted with external linkage in this translation unit. No ELF
+ visibility has been explicitly specified. If the target needs
+ to specify a visibility other than that of the containing class,
+ use this hook to set DECL_VISIBILITY and
+ DECL_VISIBILITY_SPECIFIED. */
+ void (*determine_class_data_visibility) (tree decl);
+ /* Returns true (the default) if virtual tables and other
+ similar implicit class data objects are always COMDAT if they
+ have external linkage. If this hook returns false, then
+ class data for classes whose virtual table will be emitted in
+ only one translation unit will not be COMDAT. */
+ bool (*class_data_always_comdat) (void);
+ /* Returns true (the default) if the RTTI for the basic types,
+ which is always defined in the C++ runtime, should be COMDAT;
+ false if it should not be COMDAT. */
+ bool (*library_rtti_comdat) (void);
+ /* Returns true if __aeabi_atexit should be used to register static
+ destructors. */
+ bool (*use_aeabi_atexit) (void);
+ /* Returns true if target may use atexit in the same manner as
+ __cxa_atexit to register static destructors. */
+ bool (*use_atexit_for_cxa_atexit) (void);
+ /* TYPE is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that
+ has just been defined. Use this hook to make adjustments to the
+ class (eg, tweak visibility or perform any other required
+ target modifications). */
+ void (*adjust_class_at_definition) (tree type);
+ } cxx;
+
+ /* Functions and data for emulated TLS support. */
+ struct emutls {
+ /* Name of the address and common functions. */
+ const char *get_address;
+ const char *register_common;
+
+ /* Prefixes for proxy variable and template. */
+ const char *var_section;
+ const char *tmpl_section;
+
+ /* Prefixes for proxy variable and template. */
+ const char *var_prefix;
+ const char *tmpl_prefix;
+
+ /* Function to generate field definitions of the proxy variable. */
+ tree (*var_fields) (tree, tree *);
+
+ /* Function to initialize a proxy variable. */
+ tree (*var_init) (tree, tree, tree);
+
+ /* Whether we are allowed to alter the usual alignment of the
+ proxy variable. */
+ bool var_align_fixed;
+
+ /* Whether we can emit debug information for TLS vars. */
+ bool debug_form_tls_address;
+ } emutls;
+
+ struct target_option_hooks {
+ /* Function to validate the attribute((option(...))) strings or NULL. If
+ the option is validated, it is assumed that DECL_FUNCTION_SPECIFIC will
+ be filled in in the function decl node. */
+ bool (*valid_attribute_p) (tree, tree, tree, int);
+
+ /* Function to save any extra target state in the target options
+ structure. */
+ void (*save) (struct cl_target_option *);
+
+ /* Function to restore any extra target state from the target options
+ structure. */
+ void (*restore) (struct cl_target_option *);
+
+ /* Function to print any extra target state from the target options
+ structure. */
+ void (*print) (FILE *, int, struct cl_target_option *);
+
+ /* Function to parse arguments to be validated for #pragma option, and to
+ change the state if the options are valid. If the first argument is
+ NULL, the second argument specifies the default options to use. Return
+ true if the options are valid, and set the current state. */
+ bool (*pragma_parse) (tree, tree);
+
+ /* Function to determine if one function can inline another function. */
+ bool (*can_inline_p) (tree, tree);
+ } target_option;
+
+ /* Functions used to simplify GOT access. */
+ struct simplify_got_access {
+ /* Function to get the pic_reg which holds the base address of GOT. */
+ rtx (*get_pic_reg) (void);
+
+ /* Function to clear the pic_reg which is useless now. */
+ void (*clear_pic_reg) (void);
+
+ /* Function to detect if the specified insn loads a global variable's
+ address from GOT. If so returns that symbol. */
+ rtx (*loaded_global_var) (rtx, rtx *, rtx *);
+
+ /* This function checks if it satisfy the target dependent conditions
+ that we can simplify GOT accesses. */
+ bool (*can_simplify_got_access) (int, int);
+
+ /* This function does the actual rewriting of GOT accesses. */
+ void (*load_global_address) (rtx, rtx, rtx, rtx, rtx);
+ } got_access;
+
+ /* For targets that need to mark extra registers as live on entry to
+ the function, they should define this target hook and set their
+ bits in the bitmap passed in. */
+ void (*live_on_entry) (bitmap);
+
+ /* True if unwinding tables should be generated by default. */
+ bool unwind_tables_default;
+
+ /* Leave the boolean fields at the end. */
+
+ /* True if arbitrary sections are supported. */
+ bool have_named_sections;
+
+ /* True if we can create zeroed data by switching to a BSS section
+ and then using ASM_OUTPUT_SKIP to allocate the space. */
+ bool have_switchable_bss_sections;
+
+ /* True if "native" constructors and destructors are supported,
+ false if we're using collect2 for the job. */
+ bool have_ctors_dtors;
+
+ /* True if thread-local storage is supported. */
+ bool have_tls;
+
+ /* True if a small readonly data section is supported. */
+ bool have_srodata_section;
+
+ /* True if EH frame info sections should be zero-terminated. */
+ bool terminate_dw2_eh_frame_info;
+
+ /* True if #NO_APP should be emitted at the beginning of
+ assembly output. */
+ bool file_start_app_off;
+
+ /* True if output_file_directive should be called for main_input_filename
+ at the beginning of assembly output. */
+ bool file_start_file_directive;
+
+ /* True if #pragma redefine_extname is to be supported. */
+ bool handle_pragma_redefine_extname;
+
+ /* True if #pragma extern_prefix is to be supported. */
+ bool handle_pragma_extern_prefix;
+
+ /* True if the target is allowed to reorder memory accesses unless
+ synchronization is explicitly requested. */
+ bool relaxed_ordering;
+
+ /* Returns true if we should generate exception tables for use with the
+ ARM EABI. The effects the encoding of function exception specifications.
+ */
+ bool arm_eabi_unwinder;
+
+ /* Leave the boolean fields at the end. */
+};
+
+extern struct gcc_target targetm;
+
+struct gcc_targetcm {
+ /* Handle target switch CODE (an OPT_* value). ARG is the argument
+ passed to the switch; it is NULL if no argument was. VALUE is the
+ value of ARG if CODE specifies a UInteger option, otherwise it is
+ 1 if the positive form of the switch was used and 0 if the negative
+ form was. Return true if the switch was valid. */
+ bool (*handle_c_option) (size_t code, const char *arg, int value);
+};
+
+/* Each target can provide their own. */
+extern struct gcc_targetcm targetcm;
+
+#endif /* GCC_TARGET_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm-preds.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm-preds.h
new file mode 100644
index 0000000..64a6c00
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm-preds.h
@@ -0,0 +1,168 @@
+/* Generated automatically by the program 'build/genpreds'
+ from the machine description file '/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../gcc/gcc-4.4.3/gcc/config/arm/arm.md'. */
+
+#ifndef GCC_TM_PREDS_H
+#define GCC_TM_PREDS_H
+
+#ifdef HAVE_MACHINE_MODES
+extern int general_operand (rtx, enum machine_mode);
+extern int address_operand (rtx, enum machine_mode);
+extern int register_operand (rtx, enum machine_mode);
+extern int pmode_register_operand (rtx, enum machine_mode);
+extern int scratch_operand (rtx, enum machine_mode);
+extern int immediate_operand (rtx, enum machine_mode);
+extern int const_int_operand (rtx, enum machine_mode);
+extern int const_double_operand (rtx, enum machine_mode);
+extern int nonimmediate_operand (rtx, enum machine_mode);
+extern int nonmemory_operand (rtx, enum machine_mode);
+extern int push_operand (rtx, enum machine_mode);
+extern int pop_operand (rtx, enum machine_mode);
+extern int memory_operand (rtx, enum machine_mode);
+extern int indirect_operand (rtx, enum machine_mode);
+extern int comparison_operator (rtx, enum machine_mode);
+extern int s_register_operand (rtx, enum machine_mode);
+extern int arm_hard_register_operand (rtx, enum machine_mode);
+extern int low_register_operand (rtx, enum machine_mode);
+extern int low_reg_or_int_operand (rtx, enum machine_mode);
+extern int arm_general_register_operand (rtx, enum machine_mode);
+extern int f_register_operand (rtx, enum machine_mode);
+extern int reg_or_int_operand (rtx, enum machine_mode);
+extern int arm_immediate_operand (rtx, enum machine_mode);
+extern int arm_neg_immediate_operand (rtx, enum machine_mode);
+extern int arm_not_immediate_operand (rtx, enum machine_mode);
+extern int const0_operand (rtx, enum machine_mode);
+extern int arm_rhs_operand (rtx, enum machine_mode);
+extern int arm_rhsm_operand (rtx, enum machine_mode);
+extern int arm_add_operand (rtx, enum machine_mode);
+extern int arm_addimm_operand (rtx, enum machine_mode);
+extern int arm_not_operand (rtx, enum machine_mode);
+extern int offsettable_memory_operand (rtx, enum machine_mode);
+extern int call_memory_operand (rtx, enum machine_mode);
+extern int arm_reload_memory_operand (rtx, enum machine_mode);
+extern int arm_float_rhs_operand (rtx, enum machine_mode);
+extern int arm_float_add_operand (rtx, enum machine_mode);
+extern int vfp_compare_operand (rtx, enum machine_mode);
+extern int arm_float_compare_operand (rtx, enum machine_mode);
+extern int index_operand (rtx, enum machine_mode);
+extern int shiftable_operator (rtx, enum machine_mode);
+extern int logical_binary_operator (rtx, enum machine_mode);
+extern int shift_operator (rtx, enum machine_mode);
+extern int thumb_16bit_operator (rtx, enum machine_mode);
+extern int equality_operator (rtx, enum machine_mode);
+extern int arm_comparison_operator (rtx, enum machine_mode);
+extern int lt_ge_comparison_operator (rtx, enum machine_mode);
+extern int minmax_operator (rtx, enum machine_mode);
+extern int cc_register (rtx, enum machine_mode);
+extern int dominant_cc_register (rtx, enum machine_mode);
+extern int arm_extendqisi_mem_op (rtx, enum machine_mode);
+extern int arm_reg_or_extendqisi_mem_op (rtx, enum machine_mode);
+extern int power_of_two_operand (rtx, enum machine_mode);
+extern int nonimmediate_di_operand (rtx, enum machine_mode);
+extern int di_operand (rtx, enum machine_mode);
+extern int nonimmediate_soft_df_operand (rtx, enum machine_mode);
+extern int soft_df_operand (rtx, enum machine_mode);
+extern int const_shift_operand (rtx, enum machine_mode);
+extern int load_multiple_operation (rtx, enum machine_mode);
+extern int store_multiple_operation (rtx, enum machine_mode);
+extern int multi_register_push (rtx, enum machine_mode);
+extern int thumb1_cmp_operand (rtx, enum machine_mode);
+extern int thumb1_cmpneg_operand (rtx, enum machine_mode);
+extern int thumb_cbrch_target_operand (rtx, enum machine_mode);
+extern int cirrus_register_operand (rtx, enum machine_mode);
+extern int cirrus_fp_register (rtx, enum machine_mode);
+extern int cirrus_shift_const (rtx, enum machine_mode);
+extern int const_multiple_of_8_operand (rtx, enum machine_mode);
+extern int imm_for_neon_mov_operand (rtx, enum machine_mode);
+extern int imm_for_neon_logic_operand (rtx, enum machine_mode);
+extern int imm_for_neon_inv_logic_operand (rtx, enum machine_mode);
+extern int neon_logic_op2 (rtx, enum machine_mode);
+extern int neon_inv_logic_op2 (rtx, enum machine_mode);
+extern int neon_lane_number (rtx, enum machine_mode);
+#endif /* HAVE_MACHINE_MODES */
+
+enum constraint_num
+{
+ CONSTRAINT__UNKNOWN = 0,
+ CONSTRAINT_f,
+ CONSTRAINT_t,
+ CONSTRAINT_v,
+ CONSTRAINT_w,
+ CONSTRAINT_x,
+ CONSTRAINT_y,
+ CONSTRAINT_z,
+ CONSTRAINT_l,
+ CONSTRAINT_h,
+ CONSTRAINT_j,
+ CONSTRAINT_k,
+ CONSTRAINT_b,
+ CONSTRAINT_c,
+ CONSTRAINT_I,
+ CONSTRAINT_J,
+ CONSTRAINT_K,
+ CONSTRAINT_L,
+ CONSTRAINT_M,
+ CONSTRAINT_N,
+ CONSTRAINT_O,
+ CONSTRAINT_Pa,
+ CONSTRAINT_Pb,
+ CONSTRAINT_Ps,
+ CONSTRAINT_Pt,
+ CONSTRAINT_Pw,
+ CONSTRAINT_Px,
+ CONSTRAINT_G,
+ CONSTRAINT_H,
+ CONSTRAINT_Da,
+ CONSTRAINT_Db,
+ CONSTRAINT_Dc,
+ CONSTRAINT_Dn,
+ CONSTRAINT_Dl,
+ CONSTRAINT_DL,
+ CONSTRAINT_Dv,
+ CONSTRAINT_Ut,
+ CONSTRAINT_Uv,
+ CONSTRAINT_Uy,
+ CONSTRAINT_Un,
+ CONSTRAINT_Us,
+ CONSTRAINT_Uq,
+ CONSTRAINT_Q,
+ CONSTRAINT__LIMIT
+};
+
+extern enum constraint_num lookup_constraint (const char *);
+extern bool constraint_satisfied_p (rtx, enum constraint_num);
+
+static inline size_t
+insn_constraint_len (char fc, const char *str ATTRIBUTE_UNUSED)
+{
+ switch (fc)
+ {
+ case 'D': return 2;
+ case 'P': return 2;
+ case 'U': return 2;
+ default: break;
+ }
+ return 1;
+}
+
+#define CONSTRAINT_LEN(c_,s_) insn_constraint_len (c_,s_)
+
+extern enum reg_class regclass_for_constraint (enum constraint_num);
+#define REG_CLASS_FROM_CONSTRAINT(c_,s_) \
+ regclass_for_constraint (lookup_constraint (s_))
+
+extern bool insn_const_int_ok_for_constraint (HOST_WIDE_INT, enum constraint_num);
+#define CONST_OK_FOR_CONSTRAINT_P(v_,c_,s_) \
+ insn_const_int_ok_for_constraint (v_, lookup_constraint (s_))
+
+#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(v_,c_,s_) \
+ constraint_satisfied_p (v_, lookup_constraint (s_))
+
+#define EXTRA_CONSTRAINT_STR(v_,c_,s_) \
+ constraint_satisfied_p (v_, lookup_constraint (s_))
+
+extern bool insn_extra_memory_constraint (enum constraint_num);
+#define EXTRA_MEMORY_CONSTRAINT(c_,s_) insn_extra_memory_constraint (lookup_constraint (s_))
+
+#define EXTRA_ADDRESS_CONSTRAINT(c_,s_) false
+
+#endif /* tm-preds.h */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm.h
new file mode 100644
index 0000000..4f46ac3
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tm.h
@@ -0,0 +1,38 @@
+#ifndef GCC_TM_H
+#define GCC_TM_H
+#define TARGET_CPU_DEFAULT (TARGET_CPU_generic)
+#ifndef LIBC_GLIBC
+# define LIBC_GLIBC 1
+#endif
+#ifndef LIBC_UCLIBC
+# define LIBC_UCLIBC 2
+#endif
+#ifndef LIBC_BIONIC
+# define LIBC_BIONIC 3
+#endif
+#ifndef DEFAULT_LIBC
+# define DEFAULT_LIBC LIBC_BIONIC
+#endif
+#ifndef ANDROID_DEFAULT
+# define ANDROID_DEFAULT 1
+#endif
+#ifdef IN_GCC
+# include "options.h"
+# include "config/dbxelf.h"
+# include "config/elfos.h"
+# include "config/linux.h"
+# include "config/linux-android.h"
+# include "config/arm/elf.h"
+# include "config/arm/linux-gas.h"
+# include "config/arm/linux-elf.h"
+# include "config/arm/bpabi.h"
+# include "config/arm/linux-eabi.h"
+# include "config/arm/aout.h"
+# include "config/arm/arm.h"
+# include "defaults.h"
+#endif
+#if defined IN_GCC && !defined GENERATOR_FILE && !defined USED_FOR_TARGET
+# include "insn-constants.h"
+# include "insn-flags.h"
+#endif
+#endif /* GCC_TM_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/toplev.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/toplev.h
new file mode 100644
index 0000000..b89feda
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/toplev.h
@@ -0,0 +1,220 @@
+/* toplev.h - Various declarations for functions found in toplev.c
+ Copyright (C) 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_TOPLEV_H
+#define GCC_TOPLEV_H
+#include "input.h"
+#include "l-ipo.h"
+
+/* If non-NULL, return one past-the-end of the matching SUBPART of
+ the WHOLE string. */
+#define skip_leading_substring(whole, part) \
+ (strncmp (whole, part, strlen (part)) ? NULL : whole + strlen (part))
+
+extern int toplev_main (unsigned int, const char **);
+extern int read_integral_parameter (const char *, const char *, const int);
+extern void strip_off_ending (char *, int);
+extern const char *trim_filename (const char *);
+extern void _fatal_insn_not_found (const_rtx, const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void _fatal_insn (const char *, const_rtx, const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+
+#define fatal_insn(msgid, insn) \
+ _fatal_insn (msgid, insn, __FILE__, __LINE__, __FUNCTION__)
+#define fatal_insn_not_found(insn) \
+ _fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)
+
+/* If we haven't already defined a frontend specific diagnostics
+ style, use the generic one. */
+#ifndef GCC_DIAG_STYLE
+#define GCC_DIAG_STYLE __gcc_tdiag__
+#endif
+/* None of these functions are suitable for ATTRIBUTE_PRINTF, because
+ each language front end can extend them with its own set of format
+ specifiers. We must use custom format checks. */
+#if GCC_VERSION >= 4001
+#define ATTRIBUTE_GCC_DIAG(m, n) __attribute__ ((__format__ (GCC_DIAG_STYLE, m, n))) ATTRIBUTE_NONNULL(m)
+#else
+#define ATTRIBUTE_GCC_DIAG(m, n) ATTRIBUTE_NONNULL(m)
+#endif
+extern void internal_error (const char *, ...) ATTRIBUTE_GCC_DIAG(1,2)
+ ATTRIBUTE_NORETURN;
+/* Pass one of the OPT_W* from options.h as the first parameter. */
+extern bool warning (int, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern bool warning_at (location_t, int, const char *, ...)
+ ATTRIBUTE_GCC_DIAG(3,4);
+extern void error (const char *, ...) ATTRIBUTE_GCC_DIAG(1,2);
+extern void error_at (location_t, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern void fatal_error (const char *, ...) ATTRIBUTE_GCC_DIAG(1,2)
+ ATTRIBUTE_NORETURN;
+/* Pass one of the OPT_W* from options.h as the second parameter. */
+extern bool pedwarn (location_t, int, const char *, ...)
+ ATTRIBUTE_GCC_DIAG(3,4);
+extern bool permerror (location_t, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern void sorry (const char *, ...) ATTRIBUTE_GCC_DIAG(1,2);
+extern void inform (location_t, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern void verbatim (const char *, ...) ATTRIBUTE_GCC_DIAG(1,2);
+
+extern void rest_of_decl_compilation (tree, int, int);
+extern void rest_of_type_compilation (tree, int);
+extern void tree_rest_of_compilation (tree);
+extern void init_optimization_passes (void);
+extern void finish_optimization_passes (void);
+extern bool enable_rtl_dump_file (void);
+
+extern void announce_function (tree);
+
+extern void error_for_asm (const_rtx, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern void warning_for_asm (const_rtx, const char *, ...) ATTRIBUTE_GCC_DIAG(2,3);
+extern void warn_deprecated_use (tree);
+extern bool parse_optimize_options (tree, bool);
+
+#ifdef BUFSIZ
+extern void output_quoted_string (FILE *, const char *);
+extern void output_file_directive (FILE *, const char *);
+#endif
+
+#ifdef BUFSIZ
+ /* N.B. Unlike all the others, fnotice is just gettext+fprintf, and
+ therefore it can have ATTRIBUTE_PRINTF. */
+extern void fnotice (FILE *, const char *, ...)
+ ATTRIBUTE_PRINTF_2;
+#endif
+
+extern void wrapup_global_declaration_1 (tree);
+extern bool wrapup_global_declaration_2 (tree);
+extern bool wrapup_global_declarations (tree *, int);
+extern void check_global_declaration_1 (tree);
+extern void check_global_declarations (tree *, int);
+extern void emit_debug_global_declarations (tree *, int);
+extern void write_global_declarations (void);
+
+extern void dump_memory_report (bool);
+
+extern void target_reinit (void);
+
+/* A unique local time stamp, might be zero if none is available. */
+extern unsigned local_tick;
+
+extern const char *progname;
+extern const char *dump_base_name;
+extern const char *aux_base_name;
+extern const char *aux_info_file_name;
+extern const char *profile_data_prefix;
+extern const char *asm_file_name;
+extern bool exit_after_options;
+
+/* Sample data input file. */
+extern const char *sample_data_name;
+
+/* True if the user has tagged the function with the 'section'
+ attribute. */
+
+extern bool user_defined_section_attribute;
+
+/* True if the parser is currently parsing a lock attribute. */
+extern bool parsing_lock_attribute;
+
+/* See toplev.c. */
+extern int flag_crossjumping;
+extern int flag_if_conversion;
+extern int flag_if_conversion2;
+extern int flag_keep_static_consts;
+extern int flag_peel_loops;
+extern int flag_rerun_cse_after_loop;
+extern int flag_thread_jumps;
+extern int flag_tracer;
+extern int flag_unroll_loops;
+extern int flag_unroll_all_loops;
+extern int flag_unswitch_loops;
+extern int flag_cprop_registers;
+extern int time_report;
+extern int flag_ira_coalesce;
+extern int flag_ira_move_spills;
+extern int flag_ira_share_save_slots;
+extern int flag_ira_share_spill_slots;
+
+/* Things to do with target switches. */
+extern void print_version (FILE *, const char *);
+extern void * default_get_pch_validity (size_t *);
+extern const char * default_pch_valid_p (const void *, size_t);
+
+/* The hashtable, so that the C front ends can pass it to cpplib. */
+extern struct ht *ident_hash;
+
+/* This function can be used by targets to set the flags originally
+ implied by -ffast-math and -fno-fast-math. */
+
+extern void set_fast_math_flags (int);
+
+extern void set_unsafe_math_optimizations_flags (int);
+
+/* Handle -d switch. */
+extern void decode_d_option (const char *);
+
+/* Return true iff flags are set as if -ffast-math. */
+extern bool fast_math_flags_set_p (void);
+extern bool fast_math_flags_struct_set_p (struct cl_optimization *);
+
+/* Return log2, or -1 if not exact. */
+extern int exact_log2 (unsigned HOST_WIDE_INT);
+
+/* Return floor of log2, with -1 for zero. */
+extern int floor_log2 (unsigned HOST_WIDE_INT);
+
+/* Inline versions of the above for speed. */
+#if GCC_VERSION >= 3004
+# if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
+# define CLZ_HWI __builtin_clzl
+# define CTZ_HWI __builtin_ctzl
+# elif HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONGLONG
+# define CLZ_HWI __builtin_clzll
+# define CTZ_HWI __builtin_ctzll
+# else
+# define CLZ_HWI __builtin_clz
+# define CTZ_HWI __builtin_ctz
+# endif
+
+extern inline int
+floor_log2 (unsigned HOST_WIDE_INT x)
+{
+ return x ? HOST_BITS_PER_WIDE_INT - 1 - (int) CLZ_HWI (x) : -1;
+}
+
+extern inline int
+exact_log2 (unsigned HOST_WIDE_INT x)
+{
+ return x == (x & -x) && x ? (int) CTZ_HWI (x) : -1;
+}
+#endif /* GCC_VERSION >= 3004 */
+
+/* Functions used to get and set GCC's notion of in what directory
+ compilation was started. */
+
+extern const char *get_src_pwd (void);
+extern bool set_src_pwd (const char *);
+
+/* Functions used to manipulate the random seed. */
+
+extern const char *get_random_seed (bool);
+extern const char *set_random_seed (const char *);
+
+#endif /* ! GCC_TOPLEV_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-check.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-check.h
new file mode 100644
index 0000000..5a0bec5
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-check.h
@@ -0,0 +1,290 @@
+/* This file is generated using gencheck. Do not edit. */
+
+#ifndef GCC_TREE_CHECK_H
+#define GCC_TREE_CHECK_H
+
+#define ERROR_MARK_CHECK(t) TREE_CHECK (t, ERROR_MARK)
+#define IDENTIFIER_NODE_CHECK(t) TREE_CHECK (t, IDENTIFIER_NODE)
+#define TREE_LIST_CHECK(t) TREE_CHECK (t, TREE_LIST)
+#define TREE_VEC_CHECK(t) TREE_CHECK (t, TREE_VEC)
+#define BLOCK_CHECK(t) TREE_CHECK (t, BLOCK)
+#define OFFSET_TYPE_CHECK(t) TREE_CHECK (t, OFFSET_TYPE)
+#define ENUMERAL_TYPE_CHECK(t) TREE_CHECK (t, ENUMERAL_TYPE)
+#define BOOLEAN_TYPE_CHECK(t) TREE_CHECK (t, BOOLEAN_TYPE)
+#define INTEGER_TYPE_CHECK(t) TREE_CHECK (t, INTEGER_TYPE)
+#define REAL_TYPE_CHECK(t) TREE_CHECK (t, REAL_TYPE)
+#define POINTER_TYPE_CHECK(t) TREE_CHECK (t, POINTER_TYPE)
+#define FIXED_POINT_TYPE_CHECK(t) TREE_CHECK (t, FIXED_POINT_TYPE)
+#define REFERENCE_TYPE_CHECK(t) TREE_CHECK (t, REFERENCE_TYPE)
+#define COMPLEX_TYPE_CHECK(t) TREE_CHECK (t, COMPLEX_TYPE)
+#define VECTOR_TYPE_CHECK(t) TREE_CHECK (t, VECTOR_TYPE)
+#define ARRAY_TYPE_CHECK(t) TREE_CHECK (t, ARRAY_TYPE)
+#define RECORD_TYPE_CHECK(t) TREE_CHECK (t, RECORD_TYPE)
+#define UNION_TYPE_CHECK(t) TREE_CHECK (t, UNION_TYPE)
+#define QUAL_UNION_TYPE_CHECK(t) TREE_CHECK (t, QUAL_UNION_TYPE)
+#define VOID_TYPE_CHECK(t) TREE_CHECK (t, VOID_TYPE)
+#define FUNCTION_TYPE_CHECK(t) TREE_CHECK (t, FUNCTION_TYPE)
+#define METHOD_TYPE_CHECK(t) TREE_CHECK (t, METHOD_TYPE)
+#define LANG_TYPE_CHECK(t) TREE_CHECK (t, LANG_TYPE)
+#define INTEGER_CST_CHECK(t) TREE_CHECK (t, INTEGER_CST)
+#define REAL_CST_CHECK(t) TREE_CHECK (t, REAL_CST)
+#define FIXED_CST_CHECK(t) TREE_CHECK (t, FIXED_CST)
+#define COMPLEX_CST_CHECK(t) TREE_CHECK (t, COMPLEX_CST)
+#define VECTOR_CST_CHECK(t) TREE_CHECK (t, VECTOR_CST)
+#define STRING_CST_CHECK(t) TREE_CHECK (t, STRING_CST)
+#define FUNCTION_DECL_CHECK(t) TREE_CHECK (t, FUNCTION_DECL)
+#define LABEL_DECL_CHECK(t) TREE_CHECK (t, LABEL_DECL)
+#define FIELD_DECL_CHECK(t) TREE_CHECK (t, FIELD_DECL)
+#define VAR_DECL_CHECK(t) TREE_CHECK (t, VAR_DECL)
+#define CONST_DECL_CHECK(t) TREE_CHECK (t, CONST_DECL)
+#define PARM_DECL_CHECK(t) TREE_CHECK (t, PARM_DECL)
+#define TYPE_DECL_CHECK(t) TREE_CHECK (t, TYPE_DECL)
+#define RESULT_DECL_CHECK(t) TREE_CHECK (t, RESULT_DECL)
+#define NAME_MEMORY_TAG_CHECK(t) TREE_CHECK (t, NAME_MEMORY_TAG)
+#define SYMBOL_MEMORY_TAG_CHECK(t) TREE_CHECK (t, SYMBOL_MEMORY_TAG)
+#define MEMORY_PARTITION_TAG_CHECK(t) TREE_CHECK (t, MEMORY_PARTITION_TAG)
+#define NAMESPACE_DECL_CHECK(t) TREE_CHECK (t, NAMESPACE_DECL)
+#define IMPORTED_DECL_CHECK(t) TREE_CHECK (t, IMPORTED_DECL)
+#define TRANSLATION_UNIT_DECL_CHECK(t) TREE_CHECK (t, TRANSLATION_UNIT_DECL)
+#define COMPONENT_REF_CHECK(t) TREE_CHECK (t, COMPONENT_REF)
+#define BIT_FIELD_REF_CHECK(t) TREE_CHECK (t, BIT_FIELD_REF)
+#define INDIRECT_REF_CHECK(t) TREE_CHECK (t, INDIRECT_REF)
+#define ALIGN_INDIRECT_REF_CHECK(t) TREE_CHECK (t, ALIGN_INDIRECT_REF)
+#define MISALIGNED_INDIRECT_REF_CHECK(t) TREE_CHECK (t, MISALIGNED_INDIRECT_REF)
+#define ARRAY_REF_CHECK(t) TREE_CHECK (t, ARRAY_REF)
+#define ARRAY_RANGE_REF_CHECK(t) TREE_CHECK (t, ARRAY_RANGE_REF)
+#define OBJ_TYPE_REF_CHECK(t) TREE_CHECK (t, OBJ_TYPE_REF)
+#define EXC_PTR_EXPR_CHECK(t) TREE_CHECK (t, EXC_PTR_EXPR)
+#define FILTER_EXPR_CHECK(t) TREE_CHECK (t, FILTER_EXPR)
+#define CONSTRUCTOR_CHECK(t) TREE_CHECK (t, CONSTRUCTOR)
+#define COMPOUND_EXPR_CHECK(t) TREE_CHECK (t, COMPOUND_EXPR)
+#define MODIFY_EXPR_CHECK(t) TREE_CHECK (t, MODIFY_EXPR)
+#define INIT_EXPR_CHECK(t) TREE_CHECK (t, INIT_EXPR)
+#define TARGET_EXPR_CHECK(t) TREE_CHECK (t, TARGET_EXPR)
+#define COND_EXPR_CHECK(t) TREE_CHECK (t, COND_EXPR)
+#define VEC_COND_EXPR_CHECK(t) TREE_CHECK (t, VEC_COND_EXPR)
+#define BIND_EXPR_CHECK(t) TREE_CHECK (t, BIND_EXPR)
+#define CALL_EXPR_CHECK(t) TREE_CHECK (t, CALL_EXPR)
+#define WITH_CLEANUP_EXPR_CHECK(t) TREE_CHECK (t, WITH_CLEANUP_EXPR)
+#define CLEANUP_POINT_EXPR_CHECK(t) TREE_CHECK (t, CLEANUP_POINT_EXPR)
+#define PLACEHOLDER_EXPR_CHECK(t) TREE_CHECK (t, PLACEHOLDER_EXPR)
+#define PLUS_EXPR_CHECK(t) TREE_CHECK (t, PLUS_EXPR)
+#define MINUS_EXPR_CHECK(t) TREE_CHECK (t, MINUS_EXPR)
+#define MULT_EXPR_CHECK(t) TREE_CHECK (t, MULT_EXPR)
+#define POINTER_PLUS_EXPR_CHECK(t) TREE_CHECK (t, POINTER_PLUS_EXPR)
+#define TRUNC_DIV_EXPR_CHECK(t) TREE_CHECK (t, TRUNC_DIV_EXPR)
+#define CEIL_DIV_EXPR_CHECK(t) TREE_CHECK (t, CEIL_DIV_EXPR)
+#define FLOOR_DIV_EXPR_CHECK(t) TREE_CHECK (t, FLOOR_DIV_EXPR)
+#define ROUND_DIV_EXPR_CHECK(t) TREE_CHECK (t, ROUND_DIV_EXPR)
+#define TRUNC_MOD_EXPR_CHECK(t) TREE_CHECK (t, TRUNC_MOD_EXPR)
+#define CEIL_MOD_EXPR_CHECK(t) TREE_CHECK (t, CEIL_MOD_EXPR)
+#define FLOOR_MOD_EXPR_CHECK(t) TREE_CHECK (t, FLOOR_MOD_EXPR)
+#define ROUND_MOD_EXPR_CHECK(t) TREE_CHECK (t, ROUND_MOD_EXPR)
+#define RDIV_EXPR_CHECK(t) TREE_CHECK (t, RDIV_EXPR)
+#define EXACT_DIV_EXPR_CHECK(t) TREE_CHECK (t, EXACT_DIV_EXPR)
+#define FIX_TRUNC_EXPR_CHECK(t) TREE_CHECK (t, FIX_TRUNC_EXPR)
+#define FLOAT_EXPR_CHECK(t) TREE_CHECK (t, FLOAT_EXPR)
+#define NEGATE_EXPR_CHECK(t) TREE_CHECK (t, NEGATE_EXPR)
+#define MIN_EXPR_CHECK(t) TREE_CHECK (t, MIN_EXPR)
+#define MAX_EXPR_CHECK(t) TREE_CHECK (t, MAX_EXPR)
+#define ABS_EXPR_CHECK(t) TREE_CHECK (t, ABS_EXPR)
+#define LSHIFT_EXPR_CHECK(t) TREE_CHECK (t, LSHIFT_EXPR)
+#define RSHIFT_EXPR_CHECK(t) TREE_CHECK (t, RSHIFT_EXPR)
+#define LROTATE_EXPR_CHECK(t) TREE_CHECK (t, LROTATE_EXPR)
+#define RROTATE_EXPR_CHECK(t) TREE_CHECK (t, RROTATE_EXPR)
+#define BIT_IOR_EXPR_CHECK(t) TREE_CHECK (t, BIT_IOR_EXPR)
+#define BIT_XOR_EXPR_CHECK(t) TREE_CHECK (t, BIT_XOR_EXPR)
+#define BIT_AND_EXPR_CHECK(t) TREE_CHECK (t, BIT_AND_EXPR)
+#define BIT_NOT_EXPR_CHECK(t) TREE_CHECK (t, BIT_NOT_EXPR)
+#define TRUTH_ANDIF_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_ANDIF_EXPR)
+#define TRUTH_ORIF_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_ORIF_EXPR)
+#define TRUTH_AND_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_AND_EXPR)
+#define TRUTH_OR_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_OR_EXPR)
+#define TRUTH_XOR_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_XOR_EXPR)
+#define TRUTH_NOT_EXPR_CHECK(t) TREE_CHECK (t, TRUTH_NOT_EXPR)
+#define LT_EXPR_CHECK(t) TREE_CHECK (t, LT_EXPR)
+#define LE_EXPR_CHECK(t) TREE_CHECK (t, LE_EXPR)
+#define GT_EXPR_CHECK(t) TREE_CHECK (t, GT_EXPR)
+#define GE_EXPR_CHECK(t) TREE_CHECK (t, GE_EXPR)
+#define EQ_EXPR_CHECK(t) TREE_CHECK (t, EQ_EXPR)
+#define NE_EXPR_CHECK(t) TREE_CHECK (t, NE_EXPR)
+#define UNORDERED_EXPR_CHECK(t) TREE_CHECK (t, UNORDERED_EXPR)
+#define ORDERED_EXPR_CHECK(t) TREE_CHECK (t, ORDERED_EXPR)
+#define UNLT_EXPR_CHECK(t) TREE_CHECK (t, UNLT_EXPR)
+#define UNLE_EXPR_CHECK(t) TREE_CHECK (t, UNLE_EXPR)
+#define UNGT_EXPR_CHECK(t) TREE_CHECK (t, UNGT_EXPR)
+#define UNGE_EXPR_CHECK(t) TREE_CHECK (t, UNGE_EXPR)
+#define UNEQ_EXPR_CHECK(t) TREE_CHECK (t, UNEQ_EXPR)
+#define LTGT_EXPR_CHECK(t) TREE_CHECK (t, LTGT_EXPR)
+#define RANGE_EXPR_CHECK(t) TREE_CHECK (t, RANGE_EXPR)
+#define PAREN_EXPR_CHECK(t) TREE_CHECK (t, PAREN_EXPR)
+#define CONVERT_EXPR_CHECK(t) TREE_CHECK (t, CONVERT_EXPR)
+#define FIXED_CONVERT_EXPR_CHECK(t) TREE_CHECK (t, FIXED_CONVERT_EXPR)
+#define NOP_EXPR_CHECK(t) TREE_CHECK (t, NOP_EXPR)
+#define NON_LVALUE_EXPR_CHECK(t) TREE_CHECK (t, NON_LVALUE_EXPR)
+#define VIEW_CONVERT_EXPR_CHECK(t) TREE_CHECK (t, VIEW_CONVERT_EXPR)
+#define SAVE_EXPR_CHECK(t) TREE_CHECK (t, SAVE_EXPR)
+#define ADDR_EXPR_CHECK(t) TREE_CHECK (t, ADDR_EXPR)
+#define FDESC_EXPR_CHECK(t) TREE_CHECK (t, FDESC_EXPR)
+#define COMPLEX_EXPR_CHECK(t) TREE_CHECK (t, COMPLEX_EXPR)
+#define CONJ_EXPR_CHECK(t) TREE_CHECK (t, CONJ_EXPR)
+#define REALPART_EXPR_CHECK(t) TREE_CHECK (t, REALPART_EXPR)
+#define IMAGPART_EXPR_CHECK(t) TREE_CHECK (t, IMAGPART_EXPR)
+#define PREDECREMENT_EXPR_CHECK(t) TREE_CHECK (t, PREDECREMENT_EXPR)
+#define PREINCREMENT_EXPR_CHECK(t) TREE_CHECK (t, PREINCREMENT_EXPR)
+#define POSTDECREMENT_EXPR_CHECK(t) TREE_CHECK (t, POSTDECREMENT_EXPR)
+#define POSTINCREMENT_EXPR_CHECK(t) TREE_CHECK (t, POSTINCREMENT_EXPR)
+#define VA_ARG_EXPR_CHECK(t) TREE_CHECK (t, VA_ARG_EXPR)
+#define TRY_CATCH_EXPR_CHECK(t) TREE_CHECK (t, TRY_CATCH_EXPR)
+#define TRY_FINALLY_EXPR_CHECK(t) TREE_CHECK (t, TRY_FINALLY_EXPR)
+#define DECL_EXPR_CHECK(t) TREE_CHECK (t, DECL_EXPR)
+#define LABEL_EXPR_CHECK(t) TREE_CHECK (t, LABEL_EXPR)
+#define GOTO_EXPR_CHECK(t) TREE_CHECK (t, GOTO_EXPR)
+#define RETURN_EXPR_CHECK(t) TREE_CHECK (t, RETURN_EXPR)
+#define EXIT_EXPR_CHECK(t) TREE_CHECK (t, EXIT_EXPR)
+#define LOOP_EXPR_CHECK(t) TREE_CHECK (t, LOOP_EXPR)
+#define SWITCH_EXPR_CHECK(t) TREE_CHECK (t, SWITCH_EXPR)
+#define CASE_LABEL_EXPR_CHECK(t) TREE_CHECK (t, CASE_LABEL_EXPR)
+#define RESX_EXPR_CHECK(t) TREE_CHECK (t, RESX_EXPR)
+#define ASM_EXPR_CHECK(t) TREE_CHECK (t, ASM_EXPR)
+#define SSA_NAME_CHECK(t) TREE_CHECK (t, SSA_NAME)
+#define CATCH_EXPR_CHECK(t) TREE_CHECK (t, CATCH_EXPR)
+#define EH_FILTER_EXPR_CHECK(t) TREE_CHECK (t, EH_FILTER_EXPR)
+#define CHANGE_DYNAMIC_TYPE_EXPR_CHECK(t) TREE_CHECK (t, CHANGE_DYNAMIC_TYPE_EXPR)
+#define SCEV_KNOWN_CHECK(t) TREE_CHECK (t, SCEV_KNOWN)
+#define SCEV_NOT_KNOWN_CHECK(t) TREE_CHECK (t, SCEV_NOT_KNOWN)
+#define POLYNOMIAL_CHREC_CHECK(t) TREE_CHECK (t, POLYNOMIAL_CHREC)
+#define STATEMENT_LIST_CHECK(t) TREE_CHECK (t, STATEMENT_LIST)
+#define ASSERT_EXPR_CHECK(t) TREE_CHECK (t, ASSERT_EXPR)
+#define TREE_BINFO_CHECK(t) TREE_CHECK (t, TREE_BINFO)
+#define WITH_SIZE_EXPR_CHECK(t) TREE_CHECK (t, WITH_SIZE_EXPR)
+#define REALIGN_LOAD_EXPR_CHECK(t) TREE_CHECK (t, REALIGN_LOAD_EXPR)
+#define TARGET_MEM_REF_CHECK(t) TREE_CHECK (t, TARGET_MEM_REF)
+#define OMP_PARALLEL_CHECK(t) TREE_CHECK (t, OMP_PARALLEL)
+#define OMP_TASK_CHECK(t) TREE_CHECK (t, OMP_TASK)
+#define OMP_FOR_CHECK(t) TREE_CHECK (t, OMP_FOR)
+#define OMP_SECTIONS_CHECK(t) TREE_CHECK (t, OMP_SECTIONS)
+#define OMP_SINGLE_CHECK(t) TREE_CHECK (t, OMP_SINGLE)
+#define OMP_SECTION_CHECK(t) TREE_CHECK (t, OMP_SECTION)
+#define OMP_MASTER_CHECK(t) TREE_CHECK (t, OMP_MASTER)
+#define OMP_ORDERED_CHECK(t) TREE_CHECK (t, OMP_ORDERED)
+#define OMP_CRITICAL_CHECK(t) TREE_CHECK (t, OMP_CRITICAL)
+#define OMP_ATOMIC_CHECK(t) TREE_CHECK (t, OMP_ATOMIC)
+#define OMP_CLAUSE_CHECK(t) TREE_CHECK (t, OMP_CLAUSE)
+#define REDUC_MAX_EXPR_CHECK(t) TREE_CHECK (t, REDUC_MAX_EXPR)
+#define REDUC_MIN_EXPR_CHECK(t) TREE_CHECK (t, REDUC_MIN_EXPR)
+#define REDUC_PLUS_EXPR_CHECK(t) TREE_CHECK (t, REDUC_PLUS_EXPR)
+#define DOT_PROD_EXPR_CHECK(t) TREE_CHECK (t, DOT_PROD_EXPR)
+#define WIDEN_SUM_EXPR_CHECK(t) TREE_CHECK (t, WIDEN_SUM_EXPR)
+#define WIDEN_MULT_EXPR_CHECK(t) TREE_CHECK (t, WIDEN_MULT_EXPR)
+#define VEC_LSHIFT_EXPR_CHECK(t) TREE_CHECK (t, VEC_LSHIFT_EXPR)
+#define VEC_RSHIFT_EXPR_CHECK(t) TREE_CHECK (t, VEC_RSHIFT_EXPR)
+#define VEC_WIDEN_MULT_HI_EXPR_CHECK(t) TREE_CHECK (t, VEC_WIDEN_MULT_HI_EXPR)
+#define VEC_WIDEN_MULT_LO_EXPR_CHECK(t) TREE_CHECK (t, VEC_WIDEN_MULT_LO_EXPR)
+#define VEC_UNPACK_HI_EXPR_CHECK(t) TREE_CHECK (t, VEC_UNPACK_HI_EXPR)
+#define VEC_UNPACK_LO_EXPR_CHECK(t) TREE_CHECK (t, VEC_UNPACK_LO_EXPR)
+#define VEC_UNPACK_FLOAT_HI_EXPR_CHECK(t) TREE_CHECK (t, VEC_UNPACK_FLOAT_HI_EXPR)
+#define VEC_UNPACK_FLOAT_LO_EXPR_CHECK(t) TREE_CHECK (t, VEC_UNPACK_FLOAT_LO_EXPR)
+#define VEC_PACK_TRUNC_EXPR_CHECK(t) TREE_CHECK (t, VEC_PACK_TRUNC_EXPR)
+#define VEC_PACK_SAT_EXPR_CHECK(t) TREE_CHECK (t, VEC_PACK_SAT_EXPR)
+#define VEC_PACK_FIX_TRUNC_EXPR_CHECK(t) TREE_CHECK (t, VEC_PACK_FIX_TRUNC_EXPR)
+#define VEC_EXTRACT_EVEN_EXPR_CHECK(t) TREE_CHECK (t, VEC_EXTRACT_EVEN_EXPR)
+#define VEC_EXTRACT_ODD_EXPR_CHECK(t) TREE_CHECK (t, VEC_EXTRACT_ODD_EXPR)
+#define VEC_INTERLEAVE_HIGH_EXPR_CHECK(t) TREE_CHECK (t, VEC_INTERLEAVE_HIGH_EXPR)
+#define VEC_INTERLEAVE_LOW_EXPR_CHECK(t) TREE_CHECK (t, VEC_INTERLEAVE_LOW_EXPR)
+#define PREDICT_EXPR_CHECK(t) TREE_CHECK (t, PREDICT_EXPR)
+#define OPTIMIZATION_NODE_CHECK(t) TREE_CHECK (t, OPTIMIZATION_NODE)
+#define TARGET_OPTION_NODE_CHECK(t) TREE_CHECK (t, TARGET_OPTION_NODE)
+#define COMPOUND_LITERAL_EXPR_CHECK(t) TREE_CHECK (t, COMPOUND_LITERAL_EXPR)
+#define UNCONSTRAINED_ARRAY_TYPE_CHECK(t) TREE_CHECK (t, UNCONSTRAINED_ARRAY_TYPE)
+#define UNCONSTRAINED_ARRAY_REF_CHECK(t) TREE_CHECK (t, UNCONSTRAINED_ARRAY_REF)
+#define NULL_EXPR_CHECK(t) TREE_CHECK (t, NULL_EXPR)
+#define PLUS_NOMOD_EXPR_CHECK(t) TREE_CHECK (t, PLUS_NOMOD_EXPR)
+#define MINUS_NOMOD_EXPR_CHECK(t) TREE_CHECK (t, MINUS_NOMOD_EXPR)
+#define ATTR_ADDR_EXPR_CHECK(t) TREE_CHECK (t, ATTR_ADDR_EXPR)
+#define STMT_STMT_CHECK(t) TREE_CHECK (t, STMT_STMT)
+#define LOOP_STMT_CHECK(t) TREE_CHECK (t, LOOP_STMT)
+#define EXIT_STMT_CHECK(t) TREE_CHECK (t, EXIT_STMT)
+#define REGION_STMT_CHECK(t) TREE_CHECK (t, REGION_STMT)
+#define HANDLER_STMT_CHECK(t) TREE_CHECK (t, HANDLER_STMT)
+#define OFFSET_REF_CHECK(t) TREE_CHECK (t, OFFSET_REF)
+#define PTRMEM_CST_CHECK(t) TREE_CHECK (t, PTRMEM_CST)
+#define NEW_EXPR_CHECK(t) TREE_CHECK (t, NEW_EXPR)
+#define VEC_NEW_EXPR_CHECK(t) TREE_CHECK (t, VEC_NEW_EXPR)
+#define DELETE_EXPR_CHECK(t) TREE_CHECK (t, DELETE_EXPR)
+#define VEC_DELETE_EXPR_CHECK(t) TREE_CHECK (t, VEC_DELETE_EXPR)
+#define SCOPE_REF_CHECK(t) TREE_CHECK (t, SCOPE_REF)
+#define MEMBER_REF_CHECK(t) TREE_CHECK (t, MEMBER_REF)
+#define TYPE_EXPR_CHECK(t) TREE_CHECK (t, TYPE_EXPR)
+#define AGGR_INIT_EXPR_CHECK(t) TREE_CHECK (t, AGGR_INIT_EXPR)
+#define THROW_EXPR_CHECK(t) TREE_CHECK (t, THROW_EXPR)
+#define EMPTY_CLASS_EXPR_CHECK(t) TREE_CHECK (t, EMPTY_CLASS_EXPR)
+#define BASELINK_CHECK(t) TREE_CHECK (t, BASELINK)
+#define TEMPLATE_DECL_CHECK(t) TREE_CHECK (t, TEMPLATE_DECL)
+#define TEMPLATE_PARM_INDEX_CHECK(t) TREE_CHECK (t, TEMPLATE_PARM_INDEX)
+#define TEMPLATE_TEMPLATE_PARM_CHECK(t) TREE_CHECK (t, TEMPLATE_TEMPLATE_PARM)
+#define TEMPLATE_TYPE_PARM_CHECK(t) TREE_CHECK (t, TEMPLATE_TYPE_PARM)
+#define TYPENAME_TYPE_CHECK(t) TREE_CHECK (t, TYPENAME_TYPE)
+#define TYPEOF_TYPE_CHECK(t) TREE_CHECK (t, TYPEOF_TYPE)
+#define BOUND_TEMPLATE_TEMPLATE_PARM_CHECK(t) TREE_CHECK (t, BOUND_TEMPLATE_TEMPLATE_PARM)
+#define UNBOUND_CLASS_TEMPLATE_CHECK(t) TREE_CHECK (t, UNBOUND_CLASS_TEMPLATE)
+#define USING_DECL_CHECK(t) TREE_CHECK (t, USING_DECL)
+#define USING_STMT_CHECK(t) TREE_CHECK (t, USING_STMT)
+#define DEFAULT_ARG_CHECK(t) TREE_CHECK (t, DEFAULT_ARG)
+#define TEMPLATE_ID_EXPR_CHECK(t) TREE_CHECK (t, TEMPLATE_ID_EXPR)
+#define OVERLOAD_CHECK(t) TREE_CHECK (t, OVERLOAD)
+#define PSEUDO_DTOR_EXPR_CHECK(t) TREE_CHECK (t, PSEUDO_DTOR_EXPR)
+#define MODOP_EXPR_CHECK(t) TREE_CHECK (t, MODOP_EXPR)
+#define CAST_EXPR_CHECK(t) TREE_CHECK (t, CAST_EXPR)
+#define REINTERPRET_CAST_EXPR_CHECK(t) TREE_CHECK (t, REINTERPRET_CAST_EXPR)
+#define CONST_CAST_EXPR_CHECK(t) TREE_CHECK (t, CONST_CAST_EXPR)
+#define STATIC_CAST_EXPR_CHECK(t) TREE_CHECK (t, STATIC_CAST_EXPR)
+#define DYNAMIC_CAST_EXPR_CHECK(t) TREE_CHECK (t, DYNAMIC_CAST_EXPR)
+#define DOTSTAR_EXPR_CHECK(t) TREE_CHECK (t, DOTSTAR_EXPR)
+#define TYPEID_EXPR_CHECK(t) TREE_CHECK (t, TYPEID_EXPR)
+#define NON_DEPENDENT_EXPR_CHECK(t) TREE_CHECK (t, NON_DEPENDENT_EXPR)
+#define CTOR_INITIALIZER_CHECK(t) TREE_CHECK (t, CTOR_INITIALIZER)
+#define TRY_BLOCK_CHECK(t) TREE_CHECK (t, TRY_BLOCK)
+#define EH_SPEC_BLOCK_CHECK(t) TREE_CHECK (t, EH_SPEC_BLOCK)
+#define HANDLER_CHECK(t) TREE_CHECK (t, HANDLER)
+#define MUST_NOT_THROW_EXPR_CHECK(t) TREE_CHECK (t, MUST_NOT_THROW_EXPR)
+#define CLEANUP_STMT_CHECK(t) TREE_CHECK (t, CLEANUP_STMT)
+#define IF_STMT_CHECK(t) TREE_CHECK (t, IF_STMT)
+#define FOR_STMT_CHECK(t) TREE_CHECK (t, FOR_STMT)
+#define WHILE_STMT_CHECK(t) TREE_CHECK (t, WHILE_STMT)
+#define DO_STMT_CHECK(t) TREE_CHECK (t, DO_STMT)
+#define BREAK_STMT_CHECK(t) TREE_CHECK (t, BREAK_STMT)
+#define CONTINUE_STMT_CHECK(t) TREE_CHECK (t, CONTINUE_STMT)
+#define SWITCH_STMT_CHECK(t) TREE_CHECK (t, SWITCH_STMT)
+#define EXPR_STMT_CHECK(t) TREE_CHECK (t, EXPR_STMT)
+#define TAG_DEFN_CHECK(t) TREE_CHECK (t, TAG_DEFN)
+#define OFFSETOF_EXPR_CHECK(t) TREE_CHECK (t, OFFSETOF_EXPR)
+#define SIZEOF_EXPR_CHECK(t) TREE_CHECK (t, SIZEOF_EXPR)
+#define ARROW_EXPR_CHECK(t) TREE_CHECK (t, ARROW_EXPR)
+#define ALIGNOF_EXPR_CHECK(t) TREE_CHECK (t, ALIGNOF_EXPR)
+#define STMT_EXPR_CHECK(t) TREE_CHECK (t, STMT_EXPR)
+#define UNARY_PLUS_EXPR_CHECK(t) TREE_CHECK (t, UNARY_PLUS_EXPR)
+#define STATIC_ASSERT_CHECK(t) TREE_CHECK (t, STATIC_ASSERT)
+#define TYPE_ARGUMENT_PACK_CHECK(t) TREE_CHECK (t, TYPE_ARGUMENT_PACK)
+#define NONTYPE_ARGUMENT_PACK_CHECK(t) TREE_CHECK (t, NONTYPE_ARGUMENT_PACK)
+#define TYPE_PACK_EXPANSION_CHECK(t) TREE_CHECK (t, TYPE_PACK_EXPANSION)
+#define EXPR_PACK_EXPANSION_CHECK(t) TREE_CHECK (t, EXPR_PACK_EXPANSION)
+#define ARGUMENT_PACK_SELECT_CHECK(t) TREE_CHECK (t, ARGUMENT_PACK_SELECT)
+#define TRAIT_EXPR_CHECK(t) TREE_CHECK (t, TRAIT_EXPR)
+#define DECLTYPE_TYPE_CHECK(t) TREE_CHECK (t, DECLTYPE_TYPE)
+#define URSHIFT_EXPR_CHECK(t) TREE_CHECK (t, URSHIFT_EXPR)
+#define COMPARE_EXPR_CHECK(t) TREE_CHECK (t, COMPARE_EXPR)
+#define COMPARE_L_EXPR_CHECK(t) TREE_CHECK (t, COMPARE_L_EXPR)
+#define COMPARE_G_EXPR_CHECK(t) TREE_CHECK (t, COMPARE_G_EXPR)
+#define CLASS_INTERFACE_TYPE_CHECK(t) TREE_CHECK (t, CLASS_INTERFACE_TYPE)
+#define CLASS_IMPLEMENTATION_TYPE_CHECK(t) TREE_CHECK (t, CLASS_IMPLEMENTATION_TYPE)
+#define CATEGORY_INTERFACE_TYPE_CHECK(t) TREE_CHECK (t, CATEGORY_INTERFACE_TYPE)
+#define CATEGORY_IMPLEMENTATION_TYPE_CHECK(t) TREE_CHECK (t, CATEGORY_IMPLEMENTATION_TYPE)
+#define PROTOCOL_INTERFACE_TYPE_CHECK(t) TREE_CHECK (t, PROTOCOL_INTERFACE_TYPE)
+#define KEYWORD_DECL_CHECK(t) TREE_CHECK (t, KEYWORD_DECL)
+#define INSTANCE_METHOD_DECL_CHECK(t) TREE_CHECK (t, INSTANCE_METHOD_DECL)
+#define CLASS_METHOD_DECL_CHECK(t) TREE_CHECK (t, CLASS_METHOD_DECL)
+#define MESSAGE_SEND_EXPR_CHECK(t) TREE_CHECK (t, MESSAGE_SEND_EXPR)
+#define CLASS_REFERENCE_EXPR_CHECK(t) TREE_CHECK (t, CLASS_REFERENCE_EXPR)
+
+#endif /* GCC_TREE_CHECK_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-dump.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-dump.h
new file mode 100644
index 0000000..ba1b4a4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-dump.h
@@ -0,0 +1,101 @@
+/* Tree-dumping functionality for intermediate representation.
+ Copyright (C) 1999, 2000, 2003, 2004, 2005, 2007, 2008
+ Free Software Foundation, Inc.
+ Written by Mark Mitchell <mark@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_TREE_DUMP_H
+#define GCC_TREE_DUMP_H
+
+#include "splay-tree.h"
+#include "tree-pass.h"
+
+typedef struct dump_info *dump_info_p;
+
+/* Flags used with queue functions. */
+#define DUMP_NONE 0
+#define DUMP_BINFO 1
+
+/* Information about a node to be dumped. */
+
+typedef struct dump_node_info
+{
+ /* The index for the node. */
+ unsigned int index;
+ /* Nonzero if the node is a binfo. */
+ unsigned int binfo_p : 1;
+} *dump_node_info_p;
+
+/* A dump_queue is a link in the queue of things to be dumped. */
+
+typedef struct dump_queue
+{
+ /* The queued tree node. */
+ splay_tree_node node;
+ /* The next node in the queue. */
+ struct dump_queue *next;
+} *dump_queue_p;
+
+/* A dump_info gives information about how we should perform the dump
+ and about the current state of the dump. */
+
+struct dump_info
+{
+ /* The stream on which to dump the information. */
+ FILE *stream;
+ /* The original node. */
+ const_tree node;
+ /* User flags. */
+ int flags;
+ /* The next unused node index. */
+ unsigned int index;
+ /* The next column. */
+ unsigned int column;
+ /* The first node in the queue of nodes to be written out. */
+ dump_queue_p queue;
+ /* The last node in the queue. */
+ dump_queue_p queue_end;
+ /* Free queue nodes. */
+ dump_queue_p free_list;
+ /* The tree nodes which we have already written out. The
+ keys are the addresses of the nodes; the values are the integer
+ indices we assigned them. */
+ splay_tree nodes;
+};
+
+/* Dump the CHILD and its children. */
+#define dump_child(field, child) \
+ queue_and_dump_index (di, field, child, DUMP_NONE)
+
+extern void dump_pointer (dump_info_p, const char *, void *);
+extern void dump_int (dump_info_p, const char *, int);
+extern void dump_string (dump_info_p, const char *);
+extern void dump_string_field (dump_info_p, const char *, const char *);
+extern void dump_stmt (dump_info_p, const_tree);
+extern void queue_and_dump_index (dump_info_p, const char *, const_tree, int);
+extern void queue_and_dump_type (dump_info_p, const_tree);
+extern void dump_function (enum tree_dump_index, tree);
+extern void dump_function_to_file (tree, FILE *, int);
+extern void debug_function (tree, int);
+extern int dump_flag (dump_info_p, int, const_tree);
+
+extern unsigned int dump_register (const char *, const char *, const char *,
+ int);
+
+
+#endif /* ! GCC_TREE_DUMP_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow-inline.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow-inline.h
new file mode 100644
index 0000000..d33ac97
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow-inline.h
@@ -0,0 +1,1527 @@
+/* Inline functions for tree-flow.h
+ Copyright (C) 2001, 2003, 2005, 2006, 2007, 2008 Free Software
+ Foundation, Inc.
+ Contributed by Diego Novillo <dnovillo@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef _TREE_FLOW_INLINE_H
+#define _TREE_FLOW_INLINE_H 1
+
+/* Inline functions for manipulating various data structures defined in
+ tree-flow.h. See tree-flow.h for documentation. */
+
+/* Return true when gimple SSA form was built.
+ gimple_in_ssa_p is queried by gimplifier in various early stages before SSA
+ infrastructure is initialized. Check for presence of the datastructures
+ at first place. */
+static inline bool
+gimple_in_ssa_p (const struct function *fun)
+{
+ return fun && fun->gimple_df && fun->gimple_df->in_ssa_p;
+}
+
+/* 'true' after aliases have been computed (see compute_may_aliases). */
+static inline bool
+gimple_aliases_computed_p (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->aliases_computed_p;
+}
+
+/* Addressable variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) has had its address taken. Note that
+ CALL_CLOBBERED_VARS and ADDRESSABLE_VARS are not related. An
+ addressable variable is not necessarily call-clobbered (e.g., a
+ local addressable whose address does not escape) and not all
+ call-clobbered variables are addressable (e.g., a local static
+ variable). */
+static inline bitmap
+gimple_addressable_vars (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->addressable_vars;
+}
+
+/* Call clobbered variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) is call-clobbered. */
+static inline bitmap
+gimple_call_clobbered_vars (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->call_clobbered_vars;
+}
+
+/* Call-used variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) is call-used at pure function call-sites. */
+static inline bitmap
+gimple_call_used_vars (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->call_used_vars;
+}
+
+/* Array of all variables referenced in the function. */
+static inline htab_t
+gimple_referenced_vars (const struct function *fun)
+{
+ if (!fun->gimple_df)
+ return NULL;
+ return fun->gimple_df->referenced_vars;
+}
+
+/* Artificial variable used to model the effects of function calls. */
+static inline tree
+gimple_global_var (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->global_var;
+}
+
+/* Artificial variable used to model the effects of nonlocal
+ variables. */
+static inline tree
+gimple_nonlocal_all (const struct function *fun)
+{
+ gcc_assert (fun && fun->gimple_df);
+ return fun->gimple_df->nonlocal_all;
+}
+
+/* Initialize the hashtable iterator HTI to point to hashtable TABLE */
+
+static inline void *
+first_htab_element (htab_iterator *hti, htab_t table)
+{
+ hti->htab = table;
+ hti->slot = table->entries;
+ hti->limit = hti->slot + htab_size (table);
+ do
+ {
+ PTR x = *(hti->slot);
+ if (x != HTAB_EMPTY_ENTRY && x != HTAB_DELETED_ENTRY)
+ break;
+ } while (++(hti->slot) < hti->limit);
+
+ if (hti->slot < hti->limit)
+ return *(hti->slot);
+ return NULL;
+}
+
+/* Return current non-empty/deleted slot of the hashtable pointed to by HTI,
+ or NULL if we have reached the end. */
+
+static inline bool
+end_htab_p (const htab_iterator *hti)
+{
+ if (hti->slot >= hti->limit)
+ return true;
+ return false;
+}
+
+/* Advance the hashtable iterator pointed to by HTI to the next element of the
+ hashtable. */
+
+static inline void *
+next_htab_element (htab_iterator *hti)
+{
+ while (++(hti->slot) < hti->limit)
+ {
+ PTR x = *(hti->slot);
+ if (x != HTAB_EMPTY_ENTRY && x != HTAB_DELETED_ENTRY)
+ return x;
+ };
+ return NULL;
+}
+
+/* Initialize ITER to point to the first referenced variable in the
+ referenced_vars hashtable, and return that variable. */
+
+static inline tree
+first_referenced_var (referenced_var_iterator *iter)
+{
+ return (tree) first_htab_element (&iter->hti,
+ gimple_referenced_vars (cfun));
+}
+
+/* Return true if we have hit the end of the referenced variables ITER is
+ iterating through. */
+
+static inline bool
+end_referenced_vars_p (const referenced_var_iterator *iter)
+{
+ return end_htab_p (&iter->hti);
+}
+
+/* Make ITER point to the next referenced_var in the referenced_var hashtable,
+ and return that variable. */
+
+static inline tree
+next_referenced_var (referenced_var_iterator *iter)
+{
+ return (tree) next_htab_element (&iter->hti);
+}
+
+/* Fill up VEC with the variables in the referenced vars hashtable. */
+
+static inline void
+fill_referenced_var_vec (VEC (tree, heap) **vec)
+{
+ referenced_var_iterator rvi;
+ tree var;
+ *vec = NULL;
+ FOR_EACH_REFERENCED_VAR (var, rvi)
+ VEC_safe_push (tree, heap, *vec, var);
+}
+
+/* Return the variable annotation for T, which must be a _DECL node.
+ Return NULL if the variable annotation doesn't already exist. */
+static inline var_ann_t
+var_ann (const_tree t)
+{
+ var_ann_t ann;
+
+ if (!t->base.ann)
+ return NULL;
+ ann = (var_ann_t) t->base.ann;
+
+ gcc_assert (ann->common.type == VAR_ANN);
+
+ return ann;
+}
+
+/* Return the variable annotation for T, which must be a _DECL node.
+ Create the variable annotation if it doesn't exist. */
+static inline var_ann_t
+get_var_ann (tree var)
+{
+ var_ann_t ann = var_ann (var);
+ return (ann) ? ann : create_var_ann (var);
+}
+
+/* Return the function annotation for T, which must be a FUNCTION_DECL node.
+ Return NULL if the function annotation doesn't already exist. */
+static inline function_ann_t
+function_ann (const_tree t)
+{
+ gcc_assert (t);
+ gcc_assert (TREE_CODE (t) == FUNCTION_DECL);
+ gcc_assert (!t->base.ann
+ || t->base.ann->common.type == FUNCTION_ANN);
+
+ return (function_ann_t) t->base.ann;
+}
+
+/* Return the function annotation for T, which must be a FUNCTION_DECL node.
+ Create the function annotation if it doesn't exist. */
+static inline function_ann_t
+get_function_ann (tree var)
+{
+ function_ann_t ann = function_ann (var);
+ gcc_assert (!var->base.ann || var->base.ann->common.type == FUNCTION_ANN);
+ return (ann) ? ann : create_function_ann (var);
+}
+
+/* Get the number of the next statement uid to be allocated. */
+static inline unsigned int
+gimple_stmt_max_uid (struct function *fn)
+{
+ return fn->last_stmt_uid;
+}
+
+/* Set the number of the next statement uid to be allocated. */
+static inline void
+set_gimple_stmt_max_uid (struct function *fn, unsigned int maxid)
+{
+ fn->last_stmt_uid = maxid;
+}
+
+/* Set the number of the next statement uid to be allocated. */
+static inline unsigned int
+inc_gimple_stmt_max_uid (struct function *fn)
+{
+ return fn->last_stmt_uid++;
+}
+
+/* Return the annotation type for annotation ANN. */
+static inline enum tree_ann_type
+ann_type (tree_ann_t ann)
+{
+ return ann->common.type;
+}
+
+/* Return the may_aliases bitmap for variable VAR, or NULL if it has
+ no may aliases. */
+static inline bitmap
+may_aliases (const_tree var)
+{
+ return MTAG_ALIASES (var);
+}
+
+/* Return the line number for EXPR, or return -1 if we have no line
+ number information for it. */
+static inline int
+get_lineno (const_gimple stmt)
+{
+ location_t loc;
+
+ if (!stmt)
+ return -1;
+
+ loc = gimple_location (stmt);
+ if (loc == UNKNOWN_LOCATION)
+ return -1;
+
+ return LOCATION_LINE (loc);
+}
+
+/* Delink an immediate_uses node from its chain. */
+static inline void
+delink_imm_use (ssa_use_operand_t *linknode)
+{
+ /* Return if this node is not in a list. */
+ if (linknode->prev == NULL)
+ return;
+
+ linknode->prev->next = linknode->next;
+ linknode->next->prev = linknode->prev;
+ linknode->prev = NULL;
+ linknode->next = NULL;
+}
+
+/* Link ssa_imm_use node LINKNODE into the chain for LIST. */
+static inline void
+link_imm_use_to_list (ssa_use_operand_t *linknode, ssa_use_operand_t *list)
+{
+ /* Link the new node at the head of the list. If we are in the process of
+ traversing the list, we won't visit any new nodes added to it. */
+ linknode->prev = list;
+ linknode->next = list->next;
+ list->next->prev = linknode;
+ list->next = linknode;
+}
+
+/* Link ssa_imm_use node LINKNODE into the chain for DEF. */
+static inline void
+link_imm_use (ssa_use_operand_t *linknode, tree def)
+{
+ ssa_use_operand_t *root;
+
+ if (!def || TREE_CODE (def) != SSA_NAME)
+ linknode->prev = NULL;
+ else
+ {
+ root = &(SSA_NAME_IMM_USE_NODE (def));
+#ifdef ENABLE_CHECKING
+ if (linknode->use)
+ gcc_assert (*(linknode->use) == def);
+#endif
+ link_imm_use_to_list (linknode, root);
+ }
+}
+
+/* Set the value of a use pointed to by USE to VAL. */
+static inline void
+set_ssa_use_from_ptr (use_operand_p use, tree val)
+{
+ delink_imm_use (use);
+ *(use->use) = val;
+ link_imm_use (use, val);
+}
+
+/* Link ssa_imm_use node LINKNODE into the chain for DEF, with use occurring
+ in STMT. */
+static inline void
+link_imm_use_stmt (ssa_use_operand_t *linknode, tree def, gimple stmt)
+{
+ if (stmt)
+ link_imm_use (linknode, def);
+ else
+ link_imm_use (linknode, NULL);
+ linknode->loc.stmt = stmt;
+}
+
+/* Relink a new node in place of an old node in the list. */
+static inline void
+relink_imm_use (ssa_use_operand_t *node, ssa_use_operand_t *old)
+{
+ /* The node one had better be in the same list. */
+ gcc_assert (*(old->use) == *(node->use));
+ node->prev = old->prev;
+ node->next = old->next;
+ if (old->prev)
+ {
+ old->prev->next = node;
+ old->next->prev = node;
+ /* Remove the old node from the list. */
+ old->prev = NULL;
+ }
+}
+
+/* Relink ssa_imm_use node LINKNODE into the chain for OLD, with use occurring
+ in STMT. */
+static inline void
+relink_imm_use_stmt (ssa_use_operand_t *linknode, ssa_use_operand_t *old,
+ gimple stmt)
+{
+ if (stmt)
+ relink_imm_use (linknode, old);
+ else
+ link_imm_use (linknode, NULL);
+ linknode->loc.stmt = stmt;
+}
+
+
+/* Return true is IMM has reached the end of the immediate use list. */
+static inline bool
+end_readonly_imm_use_p (const imm_use_iterator *imm)
+{
+ return (imm->imm_use == imm->end_p);
+}
+
+/* Initialize iterator IMM to process the list for VAR. */
+static inline use_operand_p
+first_readonly_imm_use (imm_use_iterator *imm, tree var)
+{
+ gcc_assert (TREE_CODE (var) == SSA_NAME);
+
+ imm->end_p = &(SSA_NAME_IMM_USE_NODE (var));
+ imm->imm_use = imm->end_p->next;
+#ifdef ENABLE_CHECKING
+ imm->iter_node.next = imm->imm_use->next;
+#endif
+ if (end_readonly_imm_use_p (imm))
+ return NULL_USE_OPERAND_P;
+ return imm->imm_use;
+}
+
+/* Bump IMM to the next use in the list. */
+static inline use_operand_p
+next_readonly_imm_use (imm_use_iterator *imm)
+{
+ use_operand_p old = imm->imm_use;
+
+#ifdef ENABLE_CHECKING
+ /* If this assertion fails, it indicates the 'next' pointer has changed
+ since the last bump. This indicates that the list is being modified
+ via stmt changes, or SET_USE, or somesuch thing, and you need to be
+ using the SAFE version of the iterator. */
+ gcc_assert (imm->iter_node.next == old->next);
+ imm->iter_node.next = old->next->next;
+#endif
+
+ imm->imm_use = old->next;
+ if (end_readonly_imm_use_p (imm))
+ return NULL_USE_OPERAND_P;
+ return imm->imm_use;
+}
+
+/* Return true if VAR has no uses. */
+static inline bool
+has_zero_uses (const_tree var)
+{
+ const ssa_use_operand_t *const ptr = &(SSA_NAME_IMM_USE_NODE (var));
+ /* A single use means there is no items in the list. */
+ return (ptr == ptr->next);
+}
+
+/* Return true if VAR has a single use. */
+static inline bool
+has_single_use (const_tree var)
+{
+ const ssa_use_operand_t *const ptr = &(SSA_NAME_IMM_USE_NODE (var));
+ /* A single use means there is one item in the list. */
+ return (ptr != ptr->next && ptr == ptr->next->next);
+}
+
+
+/* If VAR has only a single immediate use, return true, and set USE_P and STMT
+ to the use pointer and stmt of occurrence. */
+static inline bool
+single_imm_use (const_tree var, use_operand_p *use_p, gimple *stmt)
+{
+ const ssa_use_operand_t *const ptr = &(SSA_NAME_IMM_USE_NODE (var));
+ if (ptr != ptr->next && ptr == ptr->next->next)
+ {
+ *use_p = ptr->next;
+ *stmt = ptr->next->loc.stmt;
+ return true;
+ }
+ *use_p = NULL_USE_OPERAND_P;
+ *stmt = NULL;
+ return false;
+}
+
+/* Return the number of immediate uses of VAR. */
+static inline unsigned int
+num_imm_uses (const_tree var)
+{
+ const ssa_use_operand_t *const start = &(SSA_NAME_IMM_USE_NODE (var));
+ const ssa_use_operand_t *ptr;
+ unsigned int num = 0;
+
+ for (ptr = start->next; ptr != start; ptr = ptr->next)
+ num++;
+
+ return num;
+}
+
+/* Return the tree pointed-to by USE. */
+static inline tree
+get_use_from_ptr (use_operand_p use)
+{
+ return *(use->use);
+}
+
+/* Return the tree pointed-to by DEF. */
+static inline tree
+get_def_from_ptr (def_operand_p def)
+{
+ return *def;
+}
+
+/* Return a use_operand_p pointer for argument I of PHI node GS. */
+
+static inline use_operand_p
+gimple_phi_arg_imm_use_ptr (gimple gs, int i)
+{
+ return &gimple_phi_arg (gs, i)->imm_use;
+}
+
+/* Return the tree operand for argument I of PHI node GS. */
+
+static inline tree
+gimple_phi_arg_def (gimple gs, size_t index)
+{
+ struct phi_arg_d *pd = gimple_phi_arg (gs, index);
+ return get_use_from_ptr (&pd->imm_use);
+}
+
+/* Return a pointer to the tree operand for argument I of PHI node GS. */
+
+static inline tree *
+gimple_phi_arg_def_ptr (gimple gs, size_t index)
+{
+ return &gimple_phi_arg (gs, index)->def;
+}
+
+/* Return the edge associated with argument I of phi node GS. */
+
+static inline edge
+gimple_phi_arg_edge (gimple gs, size_t i)
+{
+ return EDGE_PRED (gimple_bb (gs), i);
+}
+
+/* Return the source location of gimple argument I of phi node GS. */
+
+static inline source_location
+gimple_phi_arg_location (gimple gs, size_t i)
+{
+ return gimple_phi_arg (gs, i)->locus;
+}
+
+/* Return the source location of the argument on edge E of phi node GS. */
+
+static inline source_location
+gimple_phi_arg_location_from_edge (gimple gs, edge e)
+{
+ return gimple_phi_arg (gs, e->dest_idx)->locus;
+}
+
+/* Set the source location of gimple argument I of phi node GS to LOC. */
+
+static inline void
+gimple_phi_arg_set_location (gimple gs, size_t i, source_location loc)
+{
+ gimple_phi_arg (gs, i)->locus = loc;
+}
+
+/* Return TRUE if argument I of phi node GS has a location record. */
+
+static inline bool
+gimple_phi_arg_has_location (gimple gs, size_t i)
+{
+ return gimple_phi_arg_location (gs, i) != UNKNOWN_LOCATION;
+}
+
+
+/* Return the PHI nodes for basic block BB, or NULL if there are no
+ PHI nodes. */
+static inline gimple_seq
+phi_nodes (const_basic_block bb)
+{
+ gcc_assert (!(bb->flags & BB_RTL));
+ if (!bb->il.gimple)
+ return NULL;
+ return bb->il.gimple->phi_nodes;
+}
+
+/* Set PHI nodes of a basic block BB to SEQ. */
+
+static inline void
+set_phi_nodes (basic_block bb, gimple_seq seq)
+{
+ gimple_stmt_iterator i;
+
+ gcc_assert (!(bb->flags & BB_RTL));
+ bb->il.gimple->phi_nodes = seq;
+ if (seq)
+ for (i = gsi_start (seq); !gsi_end_p (i); gsi_next (&i))
+ gimple_set_bb (gsi_stmt (i), bb);
+}
+
+/* Return the phi argument which contains the specified use. */
+
+static inline int
+phi_arg_index_from_use (use_operand_p use)
+{
+ struct phi_arg_d *element, *root;
+ size_t index;
+ gimple phi;
+
+ /* Since the use is the first thing in a PHI argument element, we can
+ calculate its index based on casting it to an argument, and performing
+ pointer arithmetic. */
+
+ phi = USE_STMT (use);
+ gcc_assert (gimple_code (phi) == GIMPLE_PHI);
+
+ element = (struct phi_arg_d *)use;
+ root = gimple_phi_arg (phi, 0);
+ index = element - root;
+
+#ifdef ENABLE_CHECKING
+ /* Make sure the calculation doesn't have any leftover bytes. If it does,
+ then imm_use is likely not the first element in phi_arg_d. */
+ gcc_assert (
+ (((char *)element - (char *)root) % sizeof (struct phi_arg_d)) == 0);
+ gcc_assert (index < gimple_phi_capacity (phi));
+#endif
+
+ return index;
+}
+
+/* Mark VAR as used, so that it'll be preserved during rtl expansion. */
+
+static inline void
+set_is_used (tree var)
+{
+ var_ann_t ann = get_var_ann (var);
+ ann->used = 1;
+}
+
+
+/* Return true if T (assumed to be a DECL) is a global variable. */
+
+static inline bool
+is_global_var (const_tree t)
+{
+ if (MTAG_P (t))
+ return MTAG_GLOBAL (t);
+ else
+ return (TREE_STATIC (t) || DECL_EXTERNAL (t));
+}
+
+/* PHI nodes should contain only ssa_names and invariants. A test
+ for ssa_name is definitely simpler; don't let invalid contents
+ slip in in the meantime. */
+
+static inline bool
+phi_ssa_name_p (const_tree t)
+{
+ if (TREE_CODE (t) == SSA_NAME)
+ return true;
+#ifdef ENABLE_CHECKING
+ gcc_assert (is_gimple_min_invariant (t));
+#endif
+ return false;
+}
+
+
+/* Returns the loop of the statement STMT. */
+
+static inline struct loop *
+loop_containing_stmt (gimple stmt)
+{
+ basic_block bb = gimple_bb (stmt);
+ if (!bb)
+ return NULL;
+
+ return bb->loop_father;
+}
+
+
+/* Return the memory partition tag associated with symbol SYM. */
+
+static inline tree
+memory_partition (tree sym)
+{
+ tree tag;
+
+ /* MPTs belong to their own partition. */
+ if (TREE_CODE (sym) == MEMORY_PARTITION_TAG)
+ return sym;
+
+ gcc_assert (!is_gimple_reg (sym));
+ /* Autoparallelization moves statements from the original function (which has
+ aliases computed) to the new one (which does not). When rebuilding
+ operands for the statement in the new function, we do not want to
+ record the memory partition tags of the original function. */
+ if (!gimple_aliases_computed_p (cfun))
+ return NULL_TREE;
+ tag = get_var_ann (sym)->mpt;
+
+#if defined ENABLE_CHECKING
+ if (tag)
+ gcc_assert (TREE_CODE (tag) == MEMORY_PARTITION_TAG);
+#endif
+
+ return tag;
+}
+
+/* Return true if NAME is a memory factoring SSA name (i.e., an SSA
+ name for a memory partition. */
+
+static inline bool
+factoring_name_p (const_tree name)
+{
+ return TREE_CODE (SSA_NAME_VAR (name)) == MEMORY_PARTITION_TAG;
+}
+
+/* Return true if VAR is used by function calls. */
+static inline bool
+is_call_used (const_tree var)
+{
+ return (var_ann (var)->call_clobbered
+ || bitmap_bit_p (gimple_call_used_vars (cfun), DECL_UID (var)));
+}
+
+/* Return true if VAR is clobbered by function calls. */
+static inline bool
+is_call_clobbered (const_tree var)
+{
+ return var_ann (var)->call_clobbered;
+}
+
+/* Mark variable VAR as being clobbered by function calls. */
+static inline void
+mark_call_clobbered (tree var, unsigned int escape_type)
+{
+ var_ann (var)->escape_mask |= escape_type;
+ var_ann (var)->call_clobbered = true;
+ bitmap_set_bit (gimple_call_clobbered_vars (cfun), DECL_UID (var));
+}
+
+/* Clear the call-clobbered attribute from variable VAR. */
+static inline void
+clear_call_clobbered (tree var)
+{
+ var_ann_t ann = var_ann (var);
+ ann->escape_mask = 0;
+ if (MTAG_P (var))
+ MTAG_GLOBAL (var) = 0;
+ var_ann (var)->call_clobbered = false;
+ bitmap_clear_bit (gimple_call_clobbered_vars (cfun), DECL_UID (var));
+}
+
+/* Return the common annotation for T. Return NULL if the annotation
+ doesn't already exist. */
+static inline tree_ann_common_t
+tree_common_ann (const_tree t)
+{
+ /* Watch out static variables with unshared annotations. */
+ if (DECL_P (t) && TREE_CODE (t) == VAR_DECL)
+ return &var_ann (t)->common;
+ return &t->base.ann->common;
+}
+
+/* Return a common annotation for T. Create the constant annotation if it
+ doesn't exist. */
+static inline tree_ann_common_t
+get_tree_common_ann (tree t)
+{
+ tree_ann_common_t ann = tree_common_ann (t);
+ return (ann) ? ann : create_tree_common_ann (t);
+}
+
+/* ----------------------------------------------------------------------- */
+
+/* The following set of routines are used to iterator over various type of
+ SSA operands. */
+
+/* Return true if PTR is finished iterating. */
+static inline bool
+op_iter_done (const ssa_op_iter *ptr)
+{
+ return ptr->done;
+}
+
+/* Get the next iterator use value for PTR. */
+static inline use_operand_p
+op_iter_next_use (ssa_op_iter *ptr)
+{
+ use_operand_p use_p;
+#ifdef ENABLE_CHECKING
+ gcc_assert (ptr->iter_type == ssa_op_iter_use);
+#endif
+ if (ptr->uses)
+ {
+ use_p = USE_OP_PTR (ptr->uses);
+ ptr->uses = ptr->uses->next;
+ return use_p;
+ }
+ if (ptr->vuses)
+ {
+ use_p = VUSE_OP_PTR (ptr->vuses, ptr->vuse_index);
+ if (++(ptr->vuse_index) >= VUSE_NUM (ptr->vuses))
+ {
+ ptr->vuse_index = 0;
+ ptr->vuses = ptr->vuses->next;
+ }
+ return use_p;
+ }
+ if (ptr->mayuses)
+ {
+ use_p = VDEF_OP_PTR (ptr->mayuses, ptr->mayuse_index);
+ if (++(ptr->mayuse_index) >= VDEF_NUM (ptr->mayuses))
+ {
+ ptr->mayuse_index = 0;
+ ptr->mayuses = ptr->mayuses->next;
+ }
+ return use_p;
+ }
+ if (ptr->phi_i < ptr->num_phi)
+ {
+ return PHI_ARG_DEF_PTR (ptr->phi_stmt, (ptr->phi_i)++);
+ }
+ ptr->done = true;
+ return NULL_USE_OPERAND_P;
+}
+
+/* Get the next iterator def value for PTR. */
+static inline def_operand_p
+op_iter_next_def (ssa_op_iter *ptr)
+{
+ def_operand_p def_p;
+#ifdef ENABLE_CHECKING
+ gcc_assert (ptr->iter_type == ssa_op_iter_def);
+#endif
+ if (ptr->defs)
+ {
+ def_p = DEF_OP_PTR (ptr->defs);
+ ptr->defs = ptr->defs->next;
+ return def_p;
+ }
+ if (ptr->vdefs)
+ {
+ def_p = VDEF_RESULT_PTR (ptr->vdefs);
+ ptr->vdefs = ptr->vdefs->next;
+ return def_p;
+ }
+ ptr->done = true;
+ return NULL_DEF_OPERAND_P;
+}
+
+/* Get the next iterator tree value for PTR. */
+static inline tree
+op_iter_next_tree (ssa_op_iter *ptr)
+{
+ tree val;
+#ifdef ENABLE_CHECKING
+ gcc_assert (ptr->iter_type == ssa_op_iter_tree);
+#endif
+ if (ptr->uses)
+ {
+ val = USE_OP (ptr->uses);
+ ptr->uses = ptr->uses->next;
+ return val;
+ }
+ if (ptr->vuses)
+ {
+ val = VUSE_OP (ptr->vuses, ptr->vuse_index);
+ if (++(ptr->vuse_index) >= VUSE_NUM (ptr->vuses))
+ {
+ ptr->vuse_index = 0;
+ ptr->vuses = ptr->vuses->next;
+ }
+ return val;
+ }
+ if (ptr->mayuses)
+ {
+ val = VDEF_OP (ptr->mayuses, ptr->mayuse_index);
+ if (++(ptr->mayuse_index) >= VDEF_NUM (ptr->mayuses))
+ {
+ ptr->mayuse_index = 0;
+ ptr->mayuses = ptr->mayuses->next;
+ }
+ return val;
+ }
+ if (ptr->defs)
+ {
+ val = DEF_OP (ptr->defs);
+ ptr->defs = ptr->defs->next;
+ return val;
+ }
+ if (ptr->vdefs)
+ {
+ val = VDEF_RESULT (ptr->vdefs);
+ ptr->vdefs = ptr->vdefs->next;
+ return val;
+ }
+
+ ptr->done = true;
+ return NULL_TREE;
+
+}
+
+
+/* This functions clears the iterator PTR, and marks it done. This is normally
+ used to prevent warnings in the compile about might be uninitialized
+ components. */
+
+static inline void
+clear_and_done_ssa_iter (ssa_op_iter *ptr)
+{
+ ptr->defs = NULL;
+ ptr->uses = NULL;
+ ptr->vuses = NULL;
+ ptr->vdefs = NULL;
+ ptr->mayuses = NULL;
+ ptr->iter_type = ssa_op_iter_none;
+ ptr->phi_i = 0;
+ ptr->num_phi = 0;
+ ptr->phi_stmt = NULL;
+ ptr->done = true;
+ ptr->vuse_index = 0;
+ ptr->mayuse_index = 0;
+}
+
+/* Initialize the iterator PTR to the virtual defs in STMT. */
+static inline void
+op_iter_init (ssa_op_iter *ptr, gimple stmt, int flags)
+{
+ ptr->defs = (flags & SSA_OP_DEF) ? gimple_def_ops (stmt) : NULL;
+ ptr->uses = (flags & SSA_OP_USE) ? gimple_use_ops (stmt) : NULL;
+ ptr->vuses = (flags & SSA_OP_VUSE) ? gimple_vuse_ops (stmt) : NULL;
+ ptr->vdefs = (flags & SSA_OP_VDEF) ? gimple_vdef_ops (stmt) : NULL;
+ ptr->mayuses = (flags & SSA_OP_VMAYUSE) ? gimple_vdef_ops (stmt) : NULL;
+ ptr->done = false;
+
+ ptr->phi_i = 0;
+ ptr->num_phi = 0;
+ ptr->phi_stmt = NULL;
+ ptr->vuse_index = 0;
+ ptr->mayuse_index = 0;
+}
+
+/* Initialize iterator PTR to the use operands in STMT based on FLAGS. Return
+ the first use. */
+static inline use_operand_p
+op_iter_init_use (ssa_op_iter *ptr, gimple stmt, int flags)
+{
+ gcc_assert ((flags & SSA_OP_ALL_DEFS) == 0);
+ op_iter_init (ptr, stmt, flags);
+ ptr->iter_type = ssa_op_iter_use;
+ return op_iter_next_use (ptr);
+}
+
+/* Initialize iterator PTR to the def operands in STMT based on FLAGS. Return
+ the first def. */
+static inline def_operand_p
+op_iter_init_def (ssa_op_iter *ptr, gimple stmt, int flags)
+{
+ gcc_assert ((flags & SSA_OP_ALL_USES) == 0);
+ op_iter_init (ptr, stmt, flags);
+ ptr->iter_type = ssa_op_iter_def;
+ return op_iter_next_def (ptr);
+}
+
+/* Initialize iterator PTR to the operands in STMT based on FLAGS. Return
+ the first operand as a tree. */
+static inline tree
+op_iter_init_tree (ssa_op_iter *ptr, gimple stmt, int flags)
+{
+ op_iter_init (ptr, stmt, flags);
+ ptr->iter_type = ssa_op_iter_tree;
+ return op_iter_next_tree (ptr);
+}
+
+/* Get the next iterator mustdef value for PTR, returning the mustdef values in
+ KILL and DEF. */
+static inline void
+op_iter_next_vdef (vuse_vec_p *use, def_operand_p *def,
+ ssa_op_iter *ptr)
+{
+#ifdef ENABLE_CHECKING
+ gcc_assert (ptr->iter_type == ssa_op_iter_vdef);
+#endif
+ if (ptr->mayuses)
+ {
+ *def = VDEF_RESULT_PTR (ptr->mayuses);
+ *use = VDEF_VECT (ptr->mayuses);
+ ptr->mayuses = ptr->mayuses->next;
+ return;
+ }
+
+ *def = NULL_DEF_OPERAND_P;
+ *use = NULL;
+ ptr->done = true;
+ return;
+}
+
+
+static inline void
+op_iter_next_mustdef (use_operand_p *use, def_operand_p *def,
+ ssa_op_iter *ptr)
+{
+ vuse_vec_p vp;
+ op_iter_next_vdef (&vp, def, ptr);
+ if (vp != NULL)
+ {
+ gcc_assert (VUSE_VECT_NUM_ELEM (*vp) == 1);
+ *use = VUSE_ELEMENT_PTR (*vp, 0);
+ }
+ else
+ *use = NULL_USE_OPERAND_P;
+}
+
+/* Initialize iterator PTR to the operands in STMT. Return the first operands
+ in USE and DEF. */
+static inline void
+op_iter_init_vdef (ssa_op_iter *ptr, gimple stmt, vuse_vec_p *use,
+ def_operand_p *def)
+{
+ gcc_assert (gimple_code (stmt) != GIMPLE_PHI);
+
+ op_iter_init (ptr, stmt, SSA_OP_VMAYUSE);
+ ptr->iter_type = ssa_op_iter_vdef;
+ op_iter_next_vdef (use, def, ptr);
+}
+
+
+/* If there is a single operand in STMT matching FLAGS, return it. Otherwise
+ return NULL. */
+static inline tree
+single_ssa_tree_operand (gimple stmt, int flags)
+{
+ tree var;
+ ssa_op_iter iter;
+
+ var = op_iter_init_tree (&iter, stmt, flags);
+ if (op_iter_done (&iter))
+ return NULL_TREE;
+ op_iter_next_tree (&iter);
+ if (op_iter_done (&iter))
+ return var;
+ return NULL_TREE;
+}
+
+
+/* If there is a single operand in STMT matching FLAGS, return it. Otherwise
+ return NULL. */
+static inline use_operand_p
+single_ssa_use_operand (gimple stmt, int flags)
+{
+ use_operand_p var;
+ ssa_op_iter iter;
+
+ var = op_iter_init_use (&iter, stmt, flags);
+ if (op_iter_done (&iter))
+ return NULL_USE_OPERAND_P;
+ op_iter_next_use (&iter);
+ if (op_iter_done (&iter))
+ return var;
+ return NULL_USE_OPERAND_P;
+}
+
+
+
+/* If there is a single operand in STMT matching FLAGS, return it. Otherwise
+ return NULL. */
+static inline def_operand_p
+single_ssa_def_operand (gimple stmt, int flags)
+{
+ def_operand_p var;
+ ssa_op_iter iter;
+
+ var = op_iter_init_def (&iter, stmt, flags);
+ if (op_iter_done (&iter))
+ return NULL_DEF_OPERAND_P;
+ op_iter_next_def (&iter);
+ if (op_iter_done (&iter))
+ return var;
+ return NULL_DEF_OPERAND_P;
+}
+
+
+/* Return true if there are zero operands in STMT matching the type
+ given in FLAGS. */
+static inline bool
+zero_ssa_operands (gimple stmt, int flags)
+{
+ ssa_op_iter iter;
+
+ op_iter_init_tree (&iter, stmt, flags);
+ return op_iter_done (&iter);
+}
+
+
+/* Return the number of operands matching FLAGS in STMT. */
+static inline int
+num_ssa_operands (gimple stmt, int flags)
+{
+ ssa_op_iter iter;
+ tree t;
+ int num = 0;
+
+ FOR_EACH_SSA_TREE_OPERAND (t, stmt, iter, flags)
+ num++;
+ return num;
+}
+
+
+/* Delink all immediate_use information for STMT. */
+static inline void
+delink_stmt_imm_use (gimple stmt)
+{
+ ssa_op_iter iter;
+ use_operand_p use_p;
+
+ if (ssa_operands_active ())
+ FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, SSA_OP_ALL_USES)
+ delink_imm_use (use_p);
+}
+
+
+/* This routine will compare all the operands matching FLAGS in STMT1 to those
+ in STMT2. TRUE is returned if they are the same. STMTs can be NULL. */
+static inline bool
+compare_ssa_operands_equal (gimple stmt1, gimple stmt2, int flags)
+{
+ ssa_op_iter iter1, iter2;
+ tree op1 = NULL_TREE;
+ tree op2 = NULL_TREE;
+ bool look1, look2;
+
+ if (stmt1 == stmt2)
+ return true;
+
+ look1 = stmt1 != NULL;
+ look2 = stmt2 != NULL;
+
+ if (look1)
+ {
+ op1 = op_iter_init_tree (&iter1, stmt1, flags);
+ if (!look2)
+ return op_iter_done (&iter1);
+ }
+ else
+ clear_and_done_ssa_iter (&iter1);
+
+ if (look2)
+ {
+ op2 = op_iter_init_tree (&iter2, stmt2, flags);
+ if (!look1)
+ return op_iter_done (&iter2);
+ }
+ else
+ clear_and_done_ssa_iter (&iter2);
+
+ while (!op_iter_done (&iter1) && !op_iter_done (&iter2))
+ {
+ if (op1 != op2)
+ return false;
+ op1 = op_iter_next_tree (&iter1);
+ op2 = op_iter_next_tree (&iter2);
+ }
+
+ return (op_iter_done (&iter1) && op_iter_done (&iter2));
+}
+
+
+/* If there is a single DEF in the PHI node which matches FLAG, return it.
+ Otherwise return NULL_DEF_OPERAND_P. */
+static inline tree
+single_phi_def (gimple stmt, int flags)
+{
+ tree def = PHI_RESULT (stmt);
+ if ((flags & SSA_OP_DEF) && is_gimple_reg (def))
+ return def;
+ if ((flags & SSA_OP_VIRTUAL_DEFS) && !is_gimple_reg (def))
+ return def;
+ return NULL_TREE;
+}
+
+/* Initialize the iterator PTR for uses matching FLAGS in PHI. FLAGS should
+ be either SSA_OP_USES or SSA_OP_VIRTUAL_USES. */
+static inline use_operand_p
+op_iter_init_phiuse (ssa_op_iter *ptr, gimple phi, int flags)
+{
+ tree phi_def = gimple_phi_result (phi);
+ int comp;
+
+ clear_and_done_ssa_iter (ptr);
+ ptr->done = false;
+
+ gcc_assert ((flags & (SSA_OP_USE | SSA_OP_VIRTUAL_USES)) != 0);
+
+ comp = (is_gimple_reg (phi_def) ? SSA_OP_USE : SSA_OP_VIRTUAL_USES);
+
+ /* If the PHI node doesn't the operand type we care about, we're done. */
+ if ((flags & comp) == 0)
+ {
+ ptr->done = true;
+ return NULL_USE_OPERAND_P;
+ }
+
+ ptr->phi_stmt = phi;
+ ptr->num_phi = gimple_phi_num_args (phi);
+ ptr->iter_type = ssa_op_iter_use;
+ return op_iter_next_use (ptr);
+}
+
+
+/* Start an iterator for a PHI definition. */
+
+static inline def_operand_p
+op_iter_init_phidef (ssa_op_iter *ptr, gimple phi, int flags)
+{
+ tree phi_def = PHI_RESULT (phi);
+ int comp;
+
+ clear_and_done_ssa_iter (ptr);
+ ptr->done = false;
+
+ gcc_assert ((flags & (SSA_OP_DEF | SSA_OP_VIRTUAL_DEFS)) != 0);
+
+ comp = (is_gimple_reg (phi_def) ? SSA_OP_DEF : SSA_OP_VIRTUAL_DEFS);
+
+ /* If the PHI node doesn't the operand type we care about, we're done. */
+ if ((flags & comp) == 0)
+ {
+ ptr->done = true;
+ return NULL_USE_OPERAND_P;
+ }
+
+ ptr->iter_type = ssa_op_iter_def;
+ /* The first call to op_iter_next_def will terminate the iterator since
+ all the fields are NULL. Simply return the result here as the first and
+ therefore only result. */
+ return PHI_RESULT_PTR (phi);
+}
+
+/* Return true is IMM has reached the end of the immediate use stmt list. */
+
+static inline bool
+end_imm_use_stmt_p (const imm_use_iterator *imm)
+{
+ return (imm->imm_use == imm->end_p);
+}
+
+/* Finished the traverse of an immediate use stmt list IMM by removing the
+ placeholder node from the list. */
+
+static inline void
+end_imm_use_stmt_traverse (imm_use_iterator *imm)
+{
+ delink_imm_use (&(imm->iter_node));
+}
+
+/* Immediate use traversal of uses within a stmt require that all the
+ uses on a stmt be sequentially listed. This routine is used to build up
+ this sequential list by adding USE_P to the end of the current list
+ currently delimited by HEAD and LAST_P. The new LAST_P value is
+ returned. */
+
+static inline use_operand_p
+move_use_after_head (use_operand_p use_p, use_operand_p head,
+ use_operand_p last_p)
+{
+ gcc_assert (USE_FROM_PTR (use_p) == USE_FROM_PTR (head));
+ /* Skip head when we find it. */
+ if (use_p != head)
+ {
+ /* If use_p is already linked in after last_p, continue. */
+ if (last_p->next == use_p)
+ last_p = use_p;
+ else
+ {
+ /* Delink from current location, and link in at last_p. */
+ delink_imm_use (use_p);
+ link_imm_use_to_list (use_p, last_p);
+ last_p = use_p;
+ }
+ }
+ return last_p;
+}
+
+
+/* This routine will relink all uses with the same stmt as HEAD into the list
+ immediately following HEAD for iterator IMM. */
+
+static inline void
+link_use_stmts_after (use_operand_p head, imm_use_iterator *imm)
+{
+ use_operand_p use_p;
+ use_operand_p last_p = head;
+ gimple head_stmt = USE_STMT (head);
+ tree use = USE_FROM_PTR (head);
+ ssa_op_iter op_iter;
+ int flag;
+
+ /* Only look at virtual or real uses, depending on the type of HEAD. */
+ flag = (is_gimple_reg (use) ? SSA_OP_USE : SSA_OP_VIRTUAL_USES);
+
+ if (gimple_code (head_stmt) == GIMPLE_PHI)
+ {
+ FOR_EACH_PHI_ARG (use_p, head_stmt, op_iter, flag)
+ if (USE_FROM_PTR (use_p) == use)
+ last_p = move_use_after_head (use_p, head, last_p);
+ }
+ else
+ {
+ FOR_EACH_SSA_USE_OPERAND (use_p, head_stmt, op_iter, flag)
+ if (USE_FROM_PTR (use_p) == use)
+ last_p = move_use_after_head (use_p, head, last_p);
+ }
+ /* Link iter node in after last_p. */
+ if (imm->iter_node.prev != NULL)
+ delink_imm_use (&imm->iter_node);
+ link_imm_use_to_list (&(imm->iter_node), last_p);
+}
+
+/* Initialize IMM to traverse over uses of VAR. Return the first statement. */
+static inline gimple
+first_imm_use_stmt (imm_use_iterator *imm, tree var)
+{
+ gcc_assert (TREE_CODE (var) == SSA_NAME);
+
+ imm->end_p = &(SSA_NAME_IMM_USE_NODE (var));
+ imm->imm_use = imm->end_p->next;
+ imm->next_imm_name = NULL_USE_OPERAND_P;
+
+ /* iter_node is used as a marker within the immediate use list to indicate
+ where the end of the current stmt's uses are. Initialize it to NULL
+ stmt and use, which indicates a marker node. */
+ imm->iter_node.prev = NULL_USE_OPERAND_P;
+ imm->iter_node.next = NULL_USE_OPERAND_P;
+ imm->iter_node.loc.stmt = NULL;
+ imm->iter_node.use = NULL_USE_OPERAND_P;
+
+ if (end_imm_use_stmt_p (imm))
+ return NULL;
+
+ link_use_stmts_after (imm->imm_use, imm);
+
+ return USE_STMT (imm->imm_use);
+}
+
+/* Bump IMM to the next stmt which has a use of var. */
+
+static inline gimple
+next_imm_use_stmt (imm_use_iterator *imm)
+{
+ imm->imm_use = imm->iter_node.next;
+ if (end_imm_use_stmt_p (imm))
+ {
+ if (imm->iter_node.prev != NULL)
+ delink_imm_use (&imm->iter_node);
+ return NULL;
+ }
+
+ link_use_stmts_after (imm->imm_use, imm);
+ return USE_STMT (imm->imm_use);
+}
+
+/* This routine will return the first use on the stmt IMM currently refers
+ to. */
+
+static inline use_operand_p
+first_imm_use_on_stmt (imm_use_iterator *imm)
+{
+ imm->next_imm_name = imm->imm_use->next;
+ return imm->imm_use;
+}
+
+/* Return TRUE if the last use on the stmt IMM refers to has been visited. */
+
+static inline bool
+end_imm_use_on_stmt_p (const imm_use_iterator *imm)
+{
+ return (imm->imm_use == &(imm->iter_node));
+}
+
+/* Bump to the next use on the stmt IMM refers to, return NULL if done. */
+
+static inline use_operand_p
+next_imm_use_on_stmt (imm_use_iterator *imm)
+{
+ imm->imm_use = imm->next_imm_name;
+ if (end_imm_use_on_stmt_p (imm))
+ return NULL_USE_OPERAND_P;
+ else
+ {
+ imm->next_imm_name = imm->imm_use->next;
+ return imm->imm_use;
+ }
+}
+
+/* Return true if VAR cannot be modified by the program. */
+
+static inline bool
+unmodifiable_var_p (const_tree var)
+{
+ if (TREE_CODE (var) == SSA_NAME)
+ var = SSA_NAME_VAR (var);
+
+ if (MTAG_P (var))
+ return false;
+
+ return TREE_READONLY (var) && (TREE_STATIC (var) || DECL_EXTERNAL (var));
+}
+
+/* Return true if REF, an ARRAY_REF, has an INDIRECT_REF somewhere in it. */
+
+static inline bool
+array_ref_contains_indirect_ref (const_tree ref)
+{
+ gcc_assert (TREE_CODE (ref) == ARRAY_REF);
+
+ do {
+ ref = TREE_OPERAND (ref, 0);
+ } while (handled_component_p (ref));
+
+ return TREE_CODE (ref) == INDIRECT_REF;
+}
+
+/* Return true if REF, a handled component reference, has an ARRAY_REF
+ somewhere in it. */
+
+static inline bool
+ref_contains_array_ref (const_tree ref)
+{
+ gcc_assert (handled_component_p (ref));
+
+ do {
+ if (TREE_CODE (ref) == ARRAY_REF)
+ return true;
+ ref = TREE_OPERAND (ref, 0);
+ } while (handled_component_p (ref));
+
+ return false;
+}
+
+/* Return true, if the two ranges [POS1, SIZE1] and [POS2, SIZE2]
+ overlap. SIZE1 and/or SIZE2 can be (unsigned)-1 in which case the
+ range is open-ended. Otherwise return false. */
+
+static inline bool
+ranges_overlap_p (unsigned HOST_WIDE_INT pos1,
+ unsigned HOST_WIDE_INT size1,
+ unsigned HOST_WIDE_INT pos2,
+ unsigned HOST_WIDE_INT size2)
+{
+ if (pos1 >= pos2
+ && (size2 == (unsigned HOST_WIDE_INT)-1
+ || pos1 < (pos2 + size2)))
+ return true;
+ if (pos2 >= pos1
+ && (size1 == (unsigned HOST_WIDE_INT)-1
+ || pos2 < (pos1 + size1)))
+ return true;
+
+ return false;
+}
+
+/* Return the memory tag associated with symbol SYM. */
+
+static inline tree
+symbol_mem_tag (tree sym)
+{
+ tree tag = get_var_ann (sym)->symbol_mem_tag;
+
+#if defined ENABLE_CHECKING
+ if (tag)
+ gcc_assert (TREE_CODE (tag) == SYMBOL_MEMORY_TAG);
+#endif
+
+ return tag;
+}
+
+
+/* Set the memory tag associated with symbol SYM. */
+
+static inline void
+set_symbol_mem_tag (tree sym, tree tag)
+{
+#if defined ENABLE_CHECKING
+ if (tag)
+ gcc_assert (TREE_CODE (tag) == SYMBOL_MEMORY_TAG);
+#endif
+
+ get_var_ann (sym)->symbol_mem_tag = tag;
+}
+
+/* Accessor to tree-ssa-operands.c caches. */
+static inline struct ssa_operands *
+gimple_ssa_operands (const struct function *fun)
+{
+ return &fun->gimple_df->ssa_operands;
+}
+
+/* Map describing reference statistics for function FN. */
+static inline struct mem_ref_stats_d *
+gimple_mem_ref_stats (const struct function *fn)
+{
+ return &fn->gimple_df->mem_ref_stats;
+}
+
+/* Given an edge_var_map V, return the PHI arg definition. */
+
+static inline tree
+redirect_edge_var_map_def (edge_var_map *v)
+{
+ return v->def;
+}
+
+/* Given an edge_var_map V, return the PHI result. */
+
+static inline tree
+redirect_edge_var_map_result (edge_var_map *v)
+{
+ return v->result;
+}
+
+/* Given an edge_var_map V, return the PHI arg location. */
+
+static inline source_location
+redirect_edge_var_map_location (edge_var_map *v)
+{
+ return v->locus;
+}
+
+
+/* Return an SSA_NAME node for variable VAR defined in statement STMT
+ in function cfun. */
+
+static inline tree
+make_ssa_name (tree var, gimple stmt)
+{
+ return make_ssa_name_fn (cfun, var, stmt);
+}
+
+#endif /* _TREE_FLOW_INLINE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow.h
new file mode 100644
index 0000000..76c6898
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-flow.h
@@ -0,0 +1,1199 @@
+/* Data and Control Flow Analysis for Trees.
+ Copyright (C) 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Diego Novillo <dnovillo@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef _TREE_FLOW_H
+#define _TREE_FLOW_H 1
+
+#include "bitmap.h"
+#include "hard-reg-set.h"
+#include "basic-block.h"
+#include "hashtab.h"
+#include "gimple.h"
+#include "tree-ssa-operands.h"
+#include "cgraph.h"
+#include "ipa-reference.h"
+
+/* Forward declare structures for the garbage collector GTY markers. */
+#ifndef GCC_BASIC_BLOCK_H
+struct edge_def;
+typedef struct edge_def *edge;
+struct basic_block_def;
+typedef struct basic_block_def *basic_block;
+#endif
+struct static_var_ann_d;
+
+/* The reasons a variable may escape a function. */
+enum escape_type
+{
+ NO_ESCAPE = 0, /* Doesn't escape. */
+ ESCAPE_STORED_IN_GLOBAL = 1 << 0,
+ ESCAPE_TO_ASM = 1 << 1, /* Passed by address to an assembly
+ statement. */
+ ESCAPE_TO_CALL = 1 << 2, /* Escapes to a function call. */
+ ESCAPE_BAD_CAST = 1 << 3, /* Cast from pointer to integer */
+ ESCAPE_TO_RETURN = 1 << 4, /* Returned from function. */
+ ESCAPE_TO_PURE_CONST = 1 << 5, /* Escapes to a pure or constant
+ function call. */
+ ESCAPE_IS_GLOBAL = 1 << 6, /* Is a global variable. */
+ ESCAPE_IS_PARM = 1 << 7, /* Is an incoming function argument. */
+ ESCAPE_UNKNOWN = 1 << 8 /* We believe it escapes for
+ some reason not enumerated
+ above. */
+};
+
+/* Memory reference statistics for individual memory symbols,
+ collected during alias analysis. */
+struct mem_sym_stats_d GTY(())
+{
+ /* Memory symbol. */
+ tree var;
+
+ /* Nonzero if this entry has been assigned a partition. */
+ unsigned int partitioned_p : 1;
+
+ /* Nonzero if VAR is a memory partition tag that already contains
+ call-clobbered variables in its partition set. */
+ unsigned int has_call_clobbered_vars : 1;
+
+ /* Number of direct reference sites. A direct reference to VAR is any
+ reference of the form 'VAR = ' or ' = VAR'. For GIMPLE reg
+ pointers, this is the number of sites where the pointer is
+ dereferenced. */
+ long num_direct_writes;
+ long num_direct_reads;
+
+ /* Number of indirect reference sites. An indirect reference to VAR
+ is any reference via a pointer that contains VAR in its points-to
+ set or, in the case of call-clobbered symbols, a function call. */
+ long num_indirect_writes;
+ long num_indirect_reads;
+
+ /* Execution frequency. This is the sum of the execution
+ frequencies of all the statements that reference this object
+ weighted by the number of references in each statement. This is
+ the main key used to sort the list of symbols to partition.
+ Symbols with high execution frequencies are put at the bottom of
+ the work list (ie, they are partitioned last).
+ Execution frequencies are taken directly from each basic block,
+ so compiling with PGO enabled will increase the precision of this
+ estimate. */
+ long frequency_reads;
+ long frequency_writes;
+
+ /* Set of memory tags that contain VAR in their alias set. */
+ bitmap parent_tags;
+};
+
+typedef struct mem_sym_stats_d *mem_sym_stats_t;
+DEF_VEC_P(mem_sym_stats_t);
+DEF_VEC_ALLOC_P(mem_sym_stats_t, heap);
+
+/* Memory reference statistics collected during alias analysis. */
+struct mem_ref_stats_d GTY(())
+{
+ /* Number of statements that make memory references. */
+ long num_mem_stmts;
+
+ /* Number of statements that make function calls. */
+ long num_call_sites;
+
+ /* Number of statements that make calls to pure/const functions. */
+ long num_pure_const_call_sites;
+
+ /* Number of ASM statements. */
+ long num_asm_sites;
+
+ /* Estimated number of virtual operands needed as computed by
+ compute_memory_partitions. */
+ long num_vuses;
+ long num_vdefs;
+
+ /* This maps every symbol used to make "memory" references
+ (pointers, arrays, structures, etc) to an instance of struct
+ mem_sym_stats_d describing reference statistics for the symbol. */
+ struct pointer_map_t * GTY((skip)) mem_sym_stats;
+};
+
+
+/* Gimple dataflow datastructure. All publicly available fields shall have
+ gimple_ accessor defined in tree-flow-inline.h, all publicly modifiable
+ fields should have gimple_set accessor. */
+struct gimple_df GTY(())
+{
+ /* Array of all variables referenced in the function. */
+ htab_t GTY((param_is (union tree_node))) referenced_vars;
+
+ /* A vector of all the noreturn calls passed to modify_stmt.
+ cleanup_control_flow uses it to detect cases where a mid-block
+ indirect call has been turned into a noreturn call. When this
+ happens, all the instructions after the call are no longer
+ reachable and must be deleted as dead. */
+ VEC(gimple,gc) *modified_noreturn_calls;
+
+ /* Array of all SSA_NAMEs used in the function. */
+ VEC(tree,gc) *ssa_names;
+
+ /* Artificial variable used to model the effects of function calls. */
+ tree global_var;
+
+ /* Artificial variable used to model the effects of nonlocal
+ variables. */
+ tree nonlocal_all;
+
+ /* Call clobbered variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) is call-clobbered. */
+ bitmap call_clobbered_vars;
+
+ /* Call-used variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) is call-used at pure function call-sites. */
+ bitmap call_used_vars;
+
+ /* Addressable variables in the function. If bit I is set, then
+ REFERENCED_VARS (I) has had its address taken. Note that
+ CALL_CLOBBERED_VARS and ADDRESSABLE_VARS are not related. An
+ addressable variable is not necessarily call-clobbered (e.g., a
+ local addressable whose address does not escape) and not all
+ call-clobbered variables are addressable (e.g., a local static
+ variable). */
+ bitmap addressable_vars;
+
+ /* Free list of SSA_NAMEs. */
+ tree free_ssanames;
+
+ /* Hashtable holding definition for symbol. If this field is not NULL, it
+ means that the first reference to this variable in the function is a
+ USE or a VUSE. In those cases, the SSA renamer creates an SSA name
+ for this variable with an empty defining statement. */
+ htab_t GTY((param_is (union tree_node))) default_defs;
+
+ /* 'true' after aliases have been computed (see compute_may_aliases). */
+ unsigned int aliases_computed_p : 1;
+
+ /* True if the code is in ssa form. */
+ unsigned int in_ssa_p : 1;
+
+ struct ssa_operands ssa_operands;
+
+ /* Memory reference statistics collected during alias analysis.
+ This information is used to drive the memory partitioning
+ heuristics in compute_memory_partitions. */
+ struct mem_ref_stats_d mem_ref_stats;
+};
+
+/* Accessors for internal use only. Generic code should use abstraction
+ provided by tree-flow-inline.h or specific modules. */
+#define FREE_SSANAMES(fun) (fun)->gimple_df->free_ssanames
+#define SSANAMES(fun) (fun)->gimple_df->ssa_names
+#define MODIFIED_NORETURN_CALLS(fun) (fun)->gimple_df->modified_noreturn_calls
+#define DEFAULT_DEFS(fun) (fun)->gimple_df->default_defs
+
+typedef struct
+{
+ htab_t htab;
+ PTR *slot;
+ PTR *limit;
+} htab_iterator;
+
+/* Iterate through the elements of hashtable HTAB, using htab_iterator ITER,
+ storing each element in RESULT, which is of type TYPE. */
+#define FOR_EACH_HTAB_ELEMENT(HTAB, RESULT, TYPE, ITER) \
+ for (RESULT = (TYPE) first_htab_element (&(ITER), (HTAB)); \
+ !end_htab_p (&(ITER)); \
+ RESULT = (TYPE) next_htab_element (&(ITER)))
+
+/*---------------------------------------------------------------------------
+ Attributes for SSA_NAMEs.
+
+ NOTE: These structures are stored in struct tree_ssa_name
+ but are only used by the tree optimizers, so it makes better sense
+ to declare them here to avoid recompiling unrelated files when
+ making changes.
+---------------------------------------------------------------------------*/
+
+/* Aliasing information for SSA_NAMEs representing pointer variables. */
+struct ptr_info_def GTY(())
+{
+ /* Mask of reasons this pointer's value escapes the function. */
+ ENUM_BITFIELD (escape_type) escape_mask : 9;
+
+ /* Nonzero if points-to analysis couldn't determine where this pointer
+ is pointing to. */
+ unsigned int pt_anything : 1;
+
+ /* Nonzero if the value of this pointer escapes the current function. */
+ unsigned int value_escapes_p : 1;
+
+ /* Nonzero if a memory tag is needed for this pointer. This is
+ true if this pointer is eventually dereferenced. */
+ unsigned int memory_tag_needed : 1;
+
+ /* Nonzero if this pointer is really dereferenced. */
+ unsigned int is_dereferenced : 1;
+
+ /* Nonzero if this pointer points to a global variable. */
+ unsigned int pt_global_mem : 1;
+
+ /* Nonzero if this pointer points to NULL. */
+ unsigned int pt_null : 1;
+
+ /* Set of variables that this pointer may point to. */
+ bitmap pt_vars;
+
+ /* If this pointer has been dereferenced, and points-to information is
+ more precise than type-based aliasing, indirect references to this
+ pointer will be represented by this memory tag, instead of the type
+ tag computed by TBAA. */
+ tree name_mem_tag;
+};
+
+
+/*---------------------------------------------------------------------------
+ Tree annotations stored in tree_base.ann
+---------------------------------------------------------------------------*/
+enum tree_ann_type { TREE_ANN_COMMON, VAR_ANN, FUNCTION_ANN };
+
+struct tree_ann_common_d GTY(())
+{
+ /* Annotation type. */
+ enum tree_ann_type type;
+
+ /* Record EH region number into a statement tree created during RTL
+ expansion (see gimple_to_tree). */
+ int rn;
+
+ /* Auxiliary info specific to a pass. At all times, this
+ should either point to valid data or be NULL. */
+ PTR GTY ((skip (""))) aux;
+
+ /* The value handle for this expression. Used by GVN-PRE. */
+ tree GTY((skip)) value_handle;
+
+ /* Pointer to original GIMPLE statement. Used during RTL expansion
+ (see gimple_to_tree). */
+ gimple stmt;
+};
+
+/* It is advantageous to avoid things like life analysis for variables which
+ do not need PHI nodes. This enum describes whether or not a particular
+ variable may need a PHI node. */
+
+enum need_phi_state {
+ /* This is the default. If we are still in this state after finding
+ all the definition and use sites, then we will assume the variable
+ needs PHI nodes. This is probably an overly conservative assumption. */
+ NEED_PHI_STATE_UNKNOWN,
+
+ /* This state indicates that we have seen one or more sets of the
+ variable in a single basic block and that the sets dominate all
+ uses seen so far. If after finding all definition and use sites
+ we are still in this state, then the variable does not need any
+ PHI nodes. */
+ NEED_PHI_STATE_NO,
+
+ /* This state indicates that we have either seen multiple definitions of
+ the variable in multiple blocks, or that we encountered a use in a
+ block that was not dominated by the block containing the set(s) of
+ this variable. This variable is assumed to need PHI nodes. */
+ NEED_PHI_STATE_MAYBE
+};
+
+
+/* The "no alias" attribute allows alias analysis to make more
+ aggressive assumptions when assigning alias sets, computing
+ points-to information and memory partitions. These attributes
+ are the result of user annotations or flags (e.g.,
+ -fargument-noalias). */
+enum noalias_state {
+ /* Default state. No special assumptions can be made about this
+ symbol. */
+ MAY_ALIAS = 0,
+
+ /* The symbol does not alias with other symbols that have a
+ NO_ALIAS* attribute. */
+ NO_ALIAS,
+
+ /* The symbol does not alias with other symbols that have a
+ NO_ALIAS*, and it may not alias with global symbols. */
+ NO_ALIAS_GLOBAL,
+
+ /* The symbol does not alias with any other symbols. */
+ NO_ALIAS_ANYTHING
+};
+
+
+struct var_ann_d GTY(())
+{
+ struct tree_ann_common_d common;
+
+ /* Used by the out of SSA pass to determine whether this variable has
+ been seen yet or not. */
+ unsigned out_of_ssa_tag : 1;
+
+ /* Used when building base variable structures in a var_map. */
+ unsigned base_var_processed : 1;
+
+ /* Nonzero if this variable was used after SSA optimizations were
+ applied. We set this when translating out of SSA form. */
+ unsigned used : 1;
+
+ /* This field indicates whether or not the variable may need PHI nodes.
+ See the enum's definition for more detailed information about the
+ states. */
+ ENUM_BITFIELD (need_phi_state) need_phi_state : 2;
+
+ /* Used during operand processing to determine if this variable is already
+ in the VUSE list. */
+ unsigned in_vuse_list : 1;
+
+ /* Used during operand processing to determine if this variable is already
+ in the VDEF list. */
+ unsigned in_vdef_list : 1;
+
+ /* True for HEAP artificial variables. These variables represent
+ the memory area allocated by a call to malloc. */
+ unsigned is_heapvar : 1;
+
+ /* True if the variable is call clobbered. */
+ unsigned call_clobbered : 1;
+
+ /* This field describes several "no alias" attributes that some
+ symbols are known to have. See the enum's definition for more
+ information on each attribute. */
+ ENUM_BITFIELD (noalias_state) noalias_state : 2;
+
+ /* Mask of values saying the reasons why this variable has escaped
+ the function. */
+ ENUM_BITFIELD (escape_type) escape_mask : 9;
+
+ /* Memory partition tag assigned to this symbol. */
+ tree mpt;
+
+ /* If this variable is a pointer P that has been dereferenced, this
+ field is an artificial variable that represents the memory
+ location *P. Every other pointer Q that is type-compatible with
+ P will also have the same memory tag. If the variable is not a
+ pointer or if it is never dereferenced, this must be NULL.
+ FIXME, do we really need this here? How much slower would it be
+ to convert to hash table? */
+ tree symbol_mem_tag;
+
+ /* Used when going out of SSA form to indicate which partition this
+ variable represents storage for. */
+ unsigned partition;
+
+ /* Used by var_map for the base index of ssa base variables. */
+ unsigned base_index;
+
+ /* During into-ssa and the dominator optimizer, this field holds the
+ current version of this variable (an SSA_NAME). */
+ tree current_def;
+};
+
+/* Container for variable annotation used by hashtable for annotations for
+ static variables. */
+struct static_var_ann_d GTY(())
+{
+ struct var_ann_d ann;
+ unsigned int uid;
+};
+
+struct function_ann_d GTY(())
+{
+ struct tree_ann_common_d common;
+};
+
+
+/* Immediate use lists are used to directly access all uses for an SSA
+ name and get pointers to the statement for each use.
+
+ The structure ssa_use_operand_d consists of PREV and NEXT pointers
+ to maintain the list. A USE pointer, which points to address where
+ the use is located and a LOC pointer which can point to the
+ statement where the use is located, or, in the case of the root
+ node, it points to the SSA name itself.
+
+ The list is anchored by an occurrence of ssa_operand_d *in* the
+ ssa_name node itself (named 'imm_uses'). This node is uniquely
+ identified by having a NULL USE pointer. and the LOC pointer
+ pointing back to the ssa_name node itself. This node forms the
+ base for a circular list, and initially this is the only node in
+ the list.
+
+ Fast iteration allows each use to be examined, but does not allow
+ any modifications to the uses or stmts.
+
+ Normal iteration allows insertion, deletion, and modification. the
+ iterator manages this by inserting a marker node into the list
+ immediately before the node currently being examined in the list.
+ this marker node is uniquely identified by having null stmt *and* a
+ null use pointer.
+
+ When iterating to the next use, the iteration routines check to see
+ if the node after the marker has changed. if it has, then the node
+ following the marker is now the next one to be visited. if not, the
+ marker node is moved past that node in the list (visualize it as
+ bumping the marker node through the list). this continues until
+ the marker node is moved to the original anchor position. the
+ marker node is then removed from the list.
+
+ If iteration is halted early, the marker node must be removed from
+ the list before continuing. */
+typedef struct immediate_use_iterator_d
+{
+ /* This is the current use the iterator is processing. */
+ ssa_use_operand_t *imm_use;
+ /* This marks the last use in the list (use node from SSA_NAME) */
+ ssa_use_operand_t *end_p;
+ /* This node is inserted and used to mark the end of the uses for a stmt. */
+ ssa_use_operand_t iter_node;
+ /* This is the next ssa_name to visit. IMM_USE may get removed before
+ the next one is traversed to, so it must be cached early. */
+ ssa_use_operand_t *next_imm_name;
+} imm_use_iterator;
+
+
+/* Use this iterator when simply looking at stmts. Adding, deleting or
+ modifying stmts will cause this iterator to malfunction. */
+
+#define FOR_EACH_IMM_USE_FAST(DEST, ITER, SSAVAR) \
+ for ((DEST) = first_readonly_imm_use (&(ITER), (SSAVAR)); \
+ !end_readonly_imm_use_p (&(ITER)); \
+ (DEST) = next_readonly_imm_use (&(ITER)))
+
+/* Use this iterator to visit each stmt which has a use of SSAVAR. */
+
+#define FOR_EACH_IMM_USE_STMT(STMT, ITER, SSAVAR) \
+ for ((STMT) = first_imm_use_stmt (&(ITER), (SSAVAR)); \
+ !end_imm_use_stmt_p (&(ITER)); \
+ (STMT) = next_imm_use_stmt (&(ITER)))
+
+/* Use this to terminate the FOR_EACH_IMM_USE_STMT loop early. Failure to
+ do so will result in leaving a iterator marker node in the immediate
+ use list, and nothing good will come from that. */
+#define BREAK_FROM_IMM_USE_STMT(ITER) \
+ { \
+ end_imm_use_stmt_traverse (&(ITER)); \
+ break; \
+ }
+
+
+/* Use this iterator in combination with FOR_EACH_IMM_USE_STMT to
+ get access to each occurrence of ssavar on the stmt returned by
+ that iterator.. for instance:
+
+ FOR_EACH_IMM_USE_STMT (stmt, iter, var)
+ {
+ FOR_EACH_IMM_USE_ON_STMT (use_p, iter)
+ {
+ SET_USE (use_p, blah);
+ }
+ update_stmt (stmt);
+ } */
+
+#define FOR_EACH_IMM_USE_ON_STMT(DEST, ITER) \
+ for ((DEST) = first_imm_use_on_stmt (&(ITER)); \
+ !end_imm_use_on_stmt_p (&(ITER)); \
+ (DEST) = next_imm_use_on_stmt (&(ITER)))
+
+
+
+union tree_ann_d GTY((desc ("ann_type ((tree_ann_t)&%h)")))
+{
+ struct tree_ann_common_d GTY((tag ("TREE_ANN_COMMON"))) common;
+ struct var_ann_d GTY((tag ("VAR_ANN"))) vdecl;
+ struct function_ann_d GTY((tag ("FUNCTION_ANN"))) fdecl;
+};
+
+typedef union tree_ann_d *tree_ann_t;
+typedef struct var_ann_d *var_ann_t;
+typedef struct function_ann_d *function_ann_t;
+typedef struct tree_ann_common_d *tree_ann_common_t;
+
+static inline tree_ann_common_t tree_common_ann (const_tree);
+static inline tree_ann_common_t get_tree_common_ann (tree);
+static inline var_ann_t var_ann (const_tree);
+static inline var_ann_t get_var_ann (tree);
+static inline function_ann_t function_ann (const_tree);
+static inline function_ann_t get_function_ann (tree);
+static inline enum tree_ann_type ann_type (tree_ann_t);
+static inline void update_stmt (gimple);
+static inline bitmap may_aliases (const_tree);
+static inline int get_lineno (const_gimple);
+
+/*---------------------------------------------------------------------------
+ Structure representing predictions in tree level.
+---------------------------------------------------------------------------*/
+struct edge_prediction GTY((chain_next ("%h.ep_next")))
+{
+ struct edge_prediction *ep_next;
+ edge ep_edge;
+ enum br_predictor ep_predictor;
+ int ep_probability;
+};
+
+/* Accessors for basic block annotations. */
+static inline gimple_seq phi_nodes (const_basic_block);
+static inline void set_phi_nodes (basic_block, gimple_seq);
+
+/*---------------------------------------------------------------------------
+ Global declarations
+---------------------------------------------------------------------------*/
+struct int_tree_map GTY(())
+{
+
+ unsigned int uid;
+ tree to;
+};
+
+extern unsigned int int_tree_map_hash (const void *);
+extern int int_tree_map_eq (const void *, const void *);
+
+extern unsigned int uid_decl_map_hash (const void *);
+extern int uid_decl_map_eq (const void *, const void *);
+
+typedef struct
+{
+ htab_iterator hti;
+} referenced_var_iterator;
+
+
+/* This macro loops over all the referenced vars, one at a time, putting the
+ current var in VAR. Note: You are not allowed to add referenced variables
+ to the hashtable while using this macro. Doing so may cause it to behave
+ erratically. */
+
+#define FOR_EACH_REFERENCED_VAR(VAR, ITER) \
+ for ((VAR) = first_referenced_var (&(ITER)); \
+ !end_referenced_vars_p (&(ITER)); \
+ (VAR) = next_referenced_var (&(ITER)))
+
+
+typedef struct
+{
+ int i;
+} safe_referenced_var_iterator;
+
+/* This macro loops over all the referenced vars, one at a time, putting the
+ current var in VAR. You are allowed to add referenced variables during the
+ execution of this macro, however, the macro will not iterate over them. It
+ requires a temporary vector of trees, VEC, whose lifetime is controlled by
+ the caller. The purpose of the vector is to temporarily store the
+ referenced_variables hashtable so that adding referenced variables does not
+ affect the hashtable. */
+
+#define FOR_EACH_REFERENCED_VAR_SAFE(VAR, VEC, ITER) \
+ for ((ITER).i = 0, fill_referenced_var_vec (&(VEC)); \
+ VEC_iterate (tree, (VEC), (ITER).i, (VAR)); \
+ (ITER).i++)
+
+extern tree referenced_var_lookup (unsigned int);
+extern bool referenced_var_check_and_insert (tree);
+#define num_referenced_vars htab_elements (gimple_referenced_vars (cfun))
+#define referenced_var(i) referenced_var_lookup (i)
+
+#define num_ssa_names (VEC_length (tree, cfun->gimple_df->ssa_names))
+#define ssa_name(i) (VEC_index (tree, cfun->gimple_df->ssa_names, (i)))
+
+/* Macros for showing usage statistics. */
+#define SCALE(x) ((unsigned long) ((x) < 1024*10 \
+ ? (x) \
+ : ((x) < 1024*1024*10 \
+ ? (x) / 1024 \
+ : (x) / (1024*1024))))
+
+#define LABEL(x) ((x) < 1024*10 ? 'b' : ((x) < 1024*1024*10 ? 'k' : 'M'))
+
+#define PERCENT(x,y) ((float)(x) * 100.0 / (float)(y))
+
+/*---------------------------------------------------------------------------
+ OpenMP Region Tree
+---------------------------------------------------------------------------*/
+
+/* Parallel region information. Every parallel and workshare
+ directive is enclosed between two markers, the OMP_* directive
+ and a corresponding OMP_RETURN statement. */
+
+struct omp_region
+{
+ /* The enclosing region. */
+ struct omp_region *outer;
+
+ /* First child region. */
+ struct omp_region *inner;
+
+ /* Next peer region. */
+ struct omp_region *next;
+
+ /* Block containing the omp directive as its last stmt. */
+ basic_block entry;
+
+ /* Block containing the OMP_RETURN as its last stmt. */
+ basic_block exit;
+
+ /* Block containing the OMP_CONTINUE as its last stmt. */
+ basic_block cont;
+
+ /* If this is a combined parallel+workshare region, this is a list
+ of additional arguments needed by the combined parallel+workshare
+ library call. */
+ tree ws_args;
+
+ /* The code for the omp directive of this region. */
+ enum gimple_code type;
+
+ /* Schedule kind, only used for OMP_FOR type regions. */
+ enum omp_clause_schedule_kind sched_kind;
+
+ /* True if this is a combined parallel+workshare region. */
+ bool is_combined_parallel;
+};
+
+extern struct omp_region *root_omp_region;
+extern struct omp_region *new_omp_region (basic_block, enum gimple_code,
+ struct omp_region *);
+extern void free_omp_regions (void);
+void omp_expand_local (basic_block);
+extern tree find_omp_clause (tree, enum omp_clause_code);
+tree copy_var_decl (tree, tree, tree);
+
+/*---------------------------------------------------------------------------
+ Function prototypes
+---------------------------------------------------------------------------*/
+/* In tree-cfg.c */
+
+/* Location to track pending stmt for edge insertion. */
+#define PENDING_STMT(e) ((e)->insns.g)
+
+extern void delete_tree_cfg_annotations (void);
+extern bool stmt_ends_bb_p (gimple);
+extern bool is_ctrl_stmt (gimple);
+extern bool is_ctrl_altering_stmt (gimple);
+extern bool simple_goto_p (gimple);
+extern bool stmt_can_make_abnormal_goto (gimple);
+extern basic_block single_noncomplex_succ (basic_block bb);
+extern void gimple_dump_bb (basic_block, FILE *, int, int);
+extern void gimple_debug_bb (basic_block);
+extern basic_block gimple_debug_bb_n (int);
+extern void gimple_dump_cfg (FILE *, int);
+extern void gimple_debug_cfg (int);
+extern void dump_cfg_stats (FILE *);
+extern void dot_cfg (void);
+extern void debug_cfg_stats (void);
+extern void debug_loops (int);
+extern void debug_loop (struct loop *, int);
+extern void debug_loop_num (unsigned, int);
+extern void print_loops (FILE *, int);
+extern void print_loops_bb (FILE *, basic_block, int, int);
+extern void cleanup_dead_labels (void);
+extern void group_case_labels (void);
+extern gimple first_stmt (basic_block);
+extern gimple last_stmt (basic_block);
+extern gimple last_and_only_stmt (basic_block);
+extern edge find_taken_edge (basic_block, tree);
+extern basic_block label_to_block_fn (struct function *, tree);
+#define label_to_block(t) (label_to_block_fn (cfun, t))
+extern void notice_special_calls (gimple);
+extern void clear_special_calls (void);
+extern void verify_stmts (void);
+extern void verify_gimple (void);
+extern void verify_types_in_gimple_seq (gimple_seq);
+extern tree gimple_block_label (basic_block);
+extern void extract_true_false_edges_from_block (basic_block, edge *, edge *);
+extern bool gimple_duplicate_sese_region (edge, edge, basic_block *, unsigned,
+ basic_block *);
+extern bool gimple_duplicate_sese_tail (edge, edge, basic_block *, unsigned,
+ basic_block *);
+extern void gather_blocks_in_sese_region (basic_block entry, basic_block exit,
+ VEC(basic_block,heap) **bbs_p);
+extern void add_phi_args_after_copy_bb (basic_block);
+extern void add_phi_args_after_copy (basic_block *, unsigned, edge);
+extern bool gimple_purge_dead_abnormal_call_edges (basic_block);
+extern bool gimple_purge_dead_eh_edges (basic_block);
+extern bool gimple_purge_all_dead_eh_edges (const_bitmap);
+extern tree gimplify_build1 (gimple_stmt_iterator *, enum tree_code,
+ tree, tree);
+extern tree gimplify_build2 (gimple_stmt_iterator *, enum tree_code,
+ tree, tree, tree);
+extern tree gimplify_build3 (gimple_stmt_iterator *, enum tree_code,
+ tree, tree, tree, tree);
+extern void init_empty_tree_cfg (void);
+extern void init_empty_tree_cfg_for_function (struct function *);
+extern void fold_cond_expr_cond (void);
+extern void make_abnormal_goto_edges (basic_block, bool);
+extern void replace_uses_by (tree, tree);
+extern void start_recording_case_labels (void);
+extern void end_recording_case_labels (void);
+extern basic_block move_sese_region_to_fn (struct function *, basic_block,
+ basic_block, tree);
+void remove_edge_and_dominated_blocks (edge);
+void mark_virtual_ops_in_bb (basic_block);
+
+/* In tree-cfgcleanup.c */
+extern bitmap cfgcleanup_altered_bbs;
+extern bool cleanup_tree_cfg (void);
+
+/* In tree-pretty-print.c. */
+extern void dump_generic_bb (FILE *, basic_block, int, int);
+extern int op_code_prio (enum tree_code);
+extern int op_prio (const_tree);
+extern const char *op_symbol_code (enum tree_code);
+
+/* In tree-dfa.c */
+extern var_ann_t create_var_ann (tree);
+extern function_ann_t create_function_ann (tree);
+extern void renumber_gimple_stmt_uids (void);
+extern void renumber_gimple_stmt_uids_in_blocks (basic_block *, int);
+extern tree_ann_common_t create_tree_common_ann (tree);
+extern void dump_dfa_stats (FILE *);
+extern void debug_dfa_stats (void);
+extern void debug_referenced_vars (void);
+extern void dump_referenced_vars (FILE *);
+extern void dump_variable (FILE *, tree);
+extern void debug_variable (tree);
+extern tree get_virtual_var (tree);
+extern bool add_referenced_var (tree);
+extern void remove_referenced_var (tree);
+extern void mark_symbols_for_renaming (gimple);
+extern void find_new_referenced_vars (gimple);
+extern tree make_rename_temp (tree, const char *);
+extern void set_default_def (tree, tree);
+extern tree gimple_default_def (struct function *, tree);
+extern bool stmt_references_abnormal_ssa_name (gimple);
+extern bool refs_may_alias_p (tree, tree);
+extern gimple get_single_def_stmt (gimple);
+extern gimple get_single_def_stmt_from_phi (tree, gimple);
+extern gimple get_single_def_stmt_with_phi (tree, gimple);
+
+/* In tree-phinodes.c */
+extern void reserve_phi_args_for_new_edge (basic_block);
+extern void add_phi_node_to_bb (gimple phi, basic_block bb);
+extern gimple make_phi_node (tree var, int len);
+extern gimple create_phi_node (tree, basic_block);
+extern void add_phi_arg (gimple, tree, edge, source_location);
+extern void remove_phi_args (edge);
+extern void remove_phi_node (gimple_stmt_iterator *, bool);
+extern void remove_phi_nodes (basic_block);
+extern void init_phinodes (void);
+extern void fini_phinodes (void);
+extern void release_phi_node (gimple);
+#ifdef GATHER_STATISTICS
+extern void phinodes_print_statistics (void);
+#endif
+
+/* In gimple-low.c */
+extern void record_vars_into (tree, tree);
+extern void record_vars (tree);
+extern bool block_may_fallthru (const_tree);
+extern bool gimple_seq_may_fallthru (gimple_seq);
+extern bool gimple_stmt_may_fallthru (gimple);
+extern void check_call_args (gimple);
+
+/* In tree-ssa-alias.c */
+extern unsigned int compute_may_aliases (void);
+extern void dump_may_aliases_for (FILE *, tree);
+extern void debug_may_aliases_for (tree);
+extern void dump_alias_info (FILE *);
+extern void debug_alias_info (void);
+extern void dump_points_to_info (FILE *);
+extern void debug_points_to_info (void);
+extern void dump_points_to_info_for (FILE *, tree);
+extern void debug_points_to_info_for (tree);
+extern bool may_be_aliased (tree);
+extern bool may_alias_p (tree, alias_set_type, tree, alias_set_type, bool);
+extern struct ptr_info_def *get_ptr_info (tree);
+extern bool may_point_to_global_var (tree);
+extern void new_type_alias (tree, tree, tree);
+extern void count_uses_and_derefs (tree, gimple, unsigned *, unsigned *,
+ unsigned *);
+static inline bool ref_contains_array_ref (const_tree);
+static inline bool array_ref_contains_indirect_ref (const_tree);
+extern tree get_ref_base_and_extent (tree, HOST_WIDE_INT *,
+ HOST_WIDE_INT *, HOST_WIDE_INT *);
+extern tree create_tag_raw (enum tree_code, tree, const char *);
+extern void delete_mem_ref_stats (struct function *);
+extern void dump_mem_ref_stats (FILE *);
+extern void debug_mem_ref_stats (void);
+extern void debug_memory_partitions (void);
+extern void debug_mem_sym_stats (tree var);
+extern void dump_mem_sym_stats_for_var (FILE *, tree);
+extern void debug_all_mem_sym_stats (void);
+extern bool is_vptr_access (tree);
+extern bool is_vptr_init (gimple);
+extern bool is_vtbl_access (tree);
+extern bool is_global_delete (tree);
+extern bool is_global_delete_call (gimple);
+
+
+/* Call-back function for walk_use_def_chains(). At each reaching
+ definition, a function with this prototype is called. */
+typedef bool (*walk_use_def_chains_fn) (tree, gimple, void *);
+
+/* In tree-ssa-alias-warnings.c */
+extern void strict_aliasing_warning_backend (void);
+
+
+/* In tree-ssa.c */
+
+/* Mapping for redirected edges. */
+struct _edge_var_map GTY(())
+{
+ tree result; /* PHI result. */
+ tree def; /* PHI arg definition. */
+ source_location locus; /* PHI arg location. */
+};
+typedef struct _edge_var_map edge_var_map;
+
+DEF_VEC_O(edge_var_map);
+DEF_VEC_ALLOC_O(edge_var_map, heap);
+
+/* A vector of var maps. */
+typedef VEC(edge_var_map, heap) *edge_var_map_vector;
+
+extern void init_tree_ssa (struct function *);
+extern void redirect_edge_var_map_add (edge, tree, tree, source_location);
+extern void redirect_edge_var_map_clear (edge);
+extern void redirect_edge_var_map_dup (edge, edge);
+extern edge_var_map_vector redirect_edge_var_map_vector (edge);
+extern void redirect_edge_var_map_destroy (void);
+
+extern edge ssa_redirect_edge (edge, basic_block);
+extern void flush_pending_stmts (edge);
+extern void verify_ssa (bool);
+extern void delete_tree_ssa (void);
+extern void walk_use_def_chains (tree, walk_use_def_chains_fn, void *, bool);
+extern bool ssa_undefined_value_p (tree);
+extern void warn_uninit (enum opt_code, tree, const char *, void *);
+extern unsigned int warn_uninitialized_vars (bool);
+
+/* In tree-ssa-sccvn.c */
+extern void fixup_vdef_ssa_val_refs (gimple);
+
+
+/* In tree-into-ssa.c */
+void update_ssa (unsigned);
+void delete_update_ssa (void);
+void register_new_name_mapping (tree, tree);
+tree create_new_def_for (tree, gimple, def_operand_p);
+bool need_ssa_update_p (void);
+bool name_mappings_registered_p (void);
+bool name_registered_for_update_p (tree);
+bitmap ssa_names_to_replace (void);
+void release_ssa_name_after_update_ssa (tree);
+void compute_global_livein (bitmap, bitmap);
+void mark_sym_for_renaming (tree);
+void mark_set_for_renaming (bitmap);
+tree get_current_def (tree);
+void set_current_def (tree, tree);
+
+/* In tree-ssanames.c */
+extern void init_ssanames (struct function *, int);
+extern void fini_ssanames (void);
+extern tree make_ssa_name_fn (struct function *, tree, gimple);
+extern tree duplicate_ssa_name (tree, gimple);
+extern void duplicate_ssa_name_ptr_info (tree, struct ptr_info_def *);
+extern void release_ssa_name (tree);
+extern void release_defs (gimple);
+extern void replace_ssa_name_symbol (tree, tree);
+
+#ifdef GATHER_STATISTICS
+extern void ssanames_print_statistics (void);
+#endif
+
+/* In tree-ssa-ccp.c */
+bool fold_stmt (gimple_stmt_iterator *);
+bool fold_stmt_inplace (gimple);
+tree get_symbol_constant_value (tree);
+tree fold_const_aggregate_ref (tree);
+bool may_propagate_address_into_dereference (tree, tree);
+
+
+/* In tree-vrp.c */
+tree vrp_evaluate_conditional (enum tree_code, tree, tree, gimple);
+bool simplify_stmt_using_ranges (gimple_stmt_iterator *);
+
+/* In tree-ssa-dom.c */
+extern void dump_dominator_optimization_stats (FILE *);
+extern void debug_dominator_optimization_stats (void);
+int loop_depth_of_name (tree);
+
+/* In tree-ssa-copy.c */
+extern void merge_alias_info (tree, tree);
+extern void propagate_value (use_operand_p, tree);
+extern void propagate_tree_value (tree *, tree);
+extern void propagate_tree_value_into_stmt (gimple_stmt_iterator *, tree);
+extern void replace_exp (use_operand_p, tree);
+extern bool may_propagate_copy (tree, tree);
+extern bool may_propagate_copy_into_stmt (gimple, tree);
+extern bool may_propagate_copy_into_asm (tree);
+
+/* Affine iv. */
+
+typedef struct
+{
+ /* Iv = BASE + STEP * i. */
+ tree base, step;
+
+ /* True if this iv does not overflow. */
+ bool no_overflow;
+} affine_iv;
+
+/* Description of number of iterations of a loop. All the expressions inside
+ the structure can be evaluated at the end of the loop's preheader
+ (and due to ssa form, also anywhere inside the body of the loop). */
+
+struct tree_niter_desc
+{
+ tree assumptions; /* The boolean expression. If this expression evaluates
+ to false, then the other fields in this structure
+ should not be used; there is no guarantee that they
+ will be correct. */
+ tree may_be_zero; /* The boolean expression. If it evaluates to true,
+ the loop will exit in the first iteration (i.e.
+ its latch will not be executed), even if the niter
+ field says otherwise. */
+ tree niter; /* The expression giving the number of iterations of
+ a loop (provided that assumptions == true and
+ may_be_zero == false), more precisely the number
+ of executions of the latch of the loop. */
+ double_int max; /* The upper bound on the number of iterations of
+ the loop. */
+
+ /* The simplified shape of the exit condition. The loop exits if
+ CONTROL CMP BOUND is false, where CMP is one of NE_EXPR,
+ LT_EXPR, or GT_EXPR, and step of CONTROL is positive if CMP is
+ LE_EXPR and negative if CMP is GE_EXPR. This information is used
+ by loop unrolling. */
+ affine_iv control;
+ tree bound;
+ enum tree_code cmp;
+};
+
+/* In tree-vectorizer.c */
+unsigned vectorize_loops (void);
+extern bool vect_can_force_dr_alignment_p (const_tree, unsigned int);
+extern tree get_vectype_for_scalar_type (tree);
+
+/* In tree-ssa-phiopt.c */
+bool empty_block_p (basic_block);
+basic_block *blocks_in_phiopt_order (void);
+
+/* In tree-ssa-loop*.c */
+
+void tree_ssa_lim (void);
+unsigned int tree_ssa_unswitch_loops (void);
+unsigned int canonicalize_induction_variables (void);
+unsigned int tree_unroll_loops_completely (bool, bool);
+unsigned int tree_ssa_prefetch_arrays (void);
+unsigned int remove_empty_loops (void);
+void tree_ssa_iv_optimize (void);
+unsigned tree_predictive_commoning (void);
+tree canonicalize_loop_ivs (struct loop *, htab_t, tree *);
+bool parallelize_loops (void);
+
+bool loop_only_exit_p (const struct loop *, const_edge);
+bool number_of_iterations_exit (struct loop *, edge,
+ struct tree_niter_desc *niter, bool);
+tree find_loop_niter (struct loop *, edge *);
+tree loop_niter_by_eval (struct loop *, edge);
+tree find_loop_niter_by_eval (struct loop *, edge *);
+void estimate_numbers_of_iterations (void);
+bool scev_probably_wraps_p (tree, tree, gimple, struct loop *, bool);
+bool convert_affine_scev (struct loop *, tree, tree *, tree *, gimple, bool);
+
+bool nowrap_type_p (tree);
+enum ev_direction {EV_DIR_GROWS, EV_DIR_DECREASES, EV_DIR_UNKNOWN};
+enum ev_direction scev_direction (const_tree);
+
+void free_numbers_of_iterations_estimates (void);
+void free_numbers_of_iterations_estimates_loop (struct loop *);
+void rewrite_into_loop_closed_ssa (bitmap, unsigned);
+void verify_loop_closed_ssa (void);
+bool for_each_index (tree *, bool (*) (tree, tree *, void *), void *);
+void create_iv (tree, tree, tree, struct loop *, gimple_stmt_iterator *, bool,
+ tree *, tree *);
+basic_block split_loop_exit_edge (edge);
+void standard_iv_increment_position (struct loop *, gimple_stmt_iterator *,
+ bool *);
+basic_block ip_end_pos (struct loop *);
+basic_block ip_normal_pos (struct loop *);
+bool gimple_duplicate_loop_to_header_edge (struct loop *, edge,
+ unsigned int, sbitmap,
+ edge, VEC (edge, heap) **,
+ int);
+struct loop *slpeel_tree_duplicate_loop_to_edge_cfg (struct loop *, edge);
+void rename_variables_in_loop (struct loop *);
+void rename_variables_in_bb (basic_block bb);
+struct loop *tree_ssa_loop_version (struct loop *, tree,
+ basic_block *);
+tree expand_simple_operations (tree);
+void substitute_in_loop_info (struct loop *, tree, tree);
+edge single_dom_exit (struct loop *);
+bool can_unroll_loop_p (struct loop *loop, unsigned factor,
+ struct tree_niter_desc *niter);
+void tree_unroll_loop (struct loop *, unsigned,
+ edge, struct tree_niter_desc *);
+typedef void (*transform_callback)(struct loop *, void *);
+void tree_transform_and_unroll_loop (struct loop *, unsigned,
+ edge, struct tree_niter_desc *,
+ transform_callback, void *);
+bool contains_abnormal_ssa_name_p (tree);
+bool stmt_dominates_stmt_p (gimple, gimple);
+void mark_virtual_ops_for_renaming (gimple);
+
+/* In tree-ssa-threadedge.c */
+extern bool potentially_threadable_block (basic_block);
+extern void thread_across_edge (gimple, edge, bool,
+ VEC(tree, heap) **, tree (*) (gimple, gimple));
+
+/* In tree-ssa-loop-im.c */
+/* The possibilities of statement movement. */
+
+enum move_pos
+ {
+ MOVE_IMPOSSIBLE, /* No movement -- side effect expression. */
+ MOVE_PRESERVE_EXECUTION, /* Must not cause the non-executed statement
+ become executed -- memory accesses, ... */
+ MOVE_POSSIBLE /* Unlimited movement. */
+ };
+extern enum move_pos movement_possibility (gimple);
+char *get_lsm_tmp_name (tree, unsigned);
+
+/* In tree-flow-inline.h */
+static inline bool is_call_clobbered (const_tree);
+static inline void mark_call_clobbered (tree, unsigned int);
+static inline void set_is_used (tree);
+static inline bool unmodifiable_var_p (const_tree);
+
+/* In tree-eh.c */
+extern void make_eh_edges (gimple);
+extern bool tree_could_trap_p (tree);
+extern bool operation_could_trap_helper_p (enum tree_code, bool, bool, bool,
+ bool, tree, bool *);
+extern bool operation_could_trap_p (enum tree_code, bool, bool, tree);
+extern bool stmt_could_throw_p (gimple);
+extern bool tree_could_throw_p (tree);
+extern bool stmt_can_throw_internal (gimple);
+extern void add_stmt_to_eh_region (gimple, int);
+extern bool remove_stmt_from_eh_region (gimple);
+extern bool maybe_clean_or_replace_eh_stmt (gimple, gimple);
+extern void add_stmt_to_eh_region_fn (struct function *, gimple, int);
+extern bool remove_stmt_from_eh_region_fn (struct function *, gimple);
+extern int lookup_stmt_eh_region_fn (struct function *, gimple);
+extern int lookup_expr_eh_region (tree);
+extern int lookup_stmt_eh_region (gimple);
+extern bool verify_eh_edges (gimple);
+
+
+/* In tree-ssa-pre.c */
+struct pre_expr_d;
+void add_to_value (unsigned int, struct pre_expr_d *);
+void debug_value_expressions (unsigned int);
+void print_value_expressions (FILE *, unsigned int);
+
+
+/* In tree-vn.c */
+tree make_value_handle (tree);
+void set_value_handle (tree, tree);
+bool expressions_equal_p (tree, tree);
+void sort_vuses (VEC (tree, gc) *);
+void sort_vuses_heap (VEC (tree, heap) *);
+tree vn_lookup_or_add (tree);
+tree vn_lookup_or_add_with_stmt (tree, gimple);
+tree vn_lookup_or_add_with_vuses (tree, VEC (tree, gc) *);
+void vn_add (tree, tree);
+void vn_add_with_vuses (tree, tree, VEC (tree, gc) *);
+tree vn_lookup_with_stmt (tree, gimple);
+tree vn_lookup (tree);
+tree vn_lookup_with_vuses (tree, VEC (tree, gc) *);
+
+/* In tree-ssa-sink.c */
+bool is_hidden_global_store (gimple);
+
+/* In tree-sra.c */
+void insert_edge_copies_seq (gimple_seq, basic_block);
+void sra_insert_before (gimple_stmt_iterator *, gimple_seq);
+void sra_insert_after (gimple_stmt_iterator *, gimple_seq);
+void sra_init_cache (void);
+bool sra_type_can_be_decomposed_p (tree);
+
+/* In tree-loop-linear.c */
+extern void linear_transform_loops (void);
+extern unsigned perfect_loop_nest_depth (struct loop *);
+
+/* In graphite.c */
+extern void graphite_transform_loops (void);
+
+/* In tree-data-ref.c */
+extern void tree_check_data_deps (void);
+
+/* In tree-ssa-loop-ivopts.c */
+bool expr_invariant_in_loop_p (struct loop *, tree);
+bool stmt_invariant_in_loop_p (struct loop *, gimple);
+bool multiplier_allowed_in_address_p (HOST_WIDE_INT, enum machine_mode);
+unsigned multiply_by_cost (HOST_WIDE_INT, enum machine_mode, bool);
+
+/* In tree-ssa-threadupdate.c. */
+extern bool thread_through_all_blocks (bool);
+extern void register_jump_thread (edge, edge);
+
+/* In gimplify.c */
+tree force_gimple_operand (tree, gimple_seq *, bool, tree);
+tree force_gimple_operand_gsi (gimple_stmt_iterator *, tree, bool, tree,
+ bool, enum gsi_iterator_update);
+tree gimple_fold_indirect_ref (tree);
+
+/* In tree-ssa-structalias.c */
+bool find_what_p_points_to (tree);
+bool clobber_what_escaped (void);
+void compute_call_used_vars (void);
+
+/* In tree-ssa-live.c */
+extern void remove_unused_locals (void);
+extern void dump_scope_blocks (FILE *, int);
+
+/* In tree-ssa-address.c */
+
+/* Description of a memory address. */
+
+struct mem_address
+{
+ tree symbol, base, index, step, offset;
+};
+
+struct affine_tree_combination;
+tree create_mem_ref (gimple_stmt_iterator *, tree,
+ struct affine_tree_combination *,
+ tree, bool, bool);
+rtx addr_for_mem_ref (struct mem_address *, bool);
+void get_address_description (tree, struct mem_address *);
+tree maybe_fold_tmr (tree);
+
+void init_alias_heapvars (void);
+void delete_alias_heapvars (void);
+unsigned int execute_fixup_cfg (void);
+
+#include "tree-flow-inline.h"
+
+void swap_tree_operands (gimple, tree *, tree *);
+
+int least_common_multiple (int, int);
+
+#endif /* _TREE_FLOW_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-iterator.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-iterator.h
new file mode 100644
index 0000000..98f0cf8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-iterator.h
@@ -0,0 +1,122 @@
+/* Iterator routines for manipulating GENERIC and GIMPLE tree statements.
+ Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc.
+ Contributed by Andrew MacLeod <amacleod@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* This file is dependent upon the implementation of tree's. It provides an
+ abstract interface to the tree objects such that if all tree creation and
+ manipulations are done through this interface, we can easily change the
+ implementation of tree's, and not impact other code. */
+
+#ifndef GCC_TREE_ITERATOR_H
+#define GCC_TREE_ITERATOR_H 1
+
+/* Iterator object for GENERIC or GIMPLE TREE statements. */
+
+typedef struct {
+ struct tree_statement_list_node *ptr;
+ tree container;
+} tree_stmt_iterator;
+
+static inline tree_stmt_iterator
+tsi_start (tree t)
+{
+ tree_stmt_iterator i;
+
+ i.ptr = STATEMENT_LIST_HEAD (t);
+ i.container = t;
+
+ return i;
+}
+
+static inline tree_stmt_iterator
+tsi_last (tree t)
+{
+ tree_stmt_iterator i;
+
+ i.ptr = STATEMENT_LIST_TAIL (t);
+ i.container = t;
+
+ return i;
+}
+
+static inline bool
+tsi_end_p (tree_stmt_iterator i)
+{
+ return i.ptr == NULL;
+}
+
+static inline bool
+tsi_one_before_end_p (tree_stmt_iterator i)
+{
+ return i.ptr != NULL && i.ptr->next == NULL;
+}
+
+static inline void
+tsi_next (tree_stmt_iterator *i)
+{
+ i->ptr = i->ptr->next;
+}
+
+static inline void
+tsi_prev (tree_stmt_iterator *i)
+{
+ i->ptr = i->ptr->prev;
+}
+
+static inline tree *
+tsi_stmt_ptr (tree_stmt_iterator i)
+{
+ return &i.ptr->stmt;
+}
+
+static inline tree
+tsi_stmt (tree_stmt_iterator i)
+{
+ return i.ptr->stmt;
+}
+
+enum tsi_iterator_update
+{
+ TSI_NEW_STMT, /* Only valid when single statement is added, move
+ iterator to it. */
+ TSI_SAME_STMT, /* Leave the iterator at the same statement. */
+ TSI_CHAIN_START, /* Only valid when chain of statements is added, move
+ iterator to the first statement in the chain. */
+ TSI_CHAIN_END, /* Only valid when chain of statements is added, move
+ iterator to the last statement in the chain. */
+ TSI_CONTINUE_LINKING /* Move iterator to whatever position is suitable for
+ linking other statements/chains of statements in
+ the same direction. */
+};
+
+extern void tsi_link_before (tree_stmt_iterator *, tree,
+ enum tsi_iterator_update);
+extern void tsi_link_after (tree_stmt_iterator *, tree,
+ enum tsi_iterator_update);
+
+void tsi_delink (tree_stmt_iterator *);
+
+tree tsi_split_statement_list_after (const tree_stmt_iterator *);
+tree tsi_split_statement_list_before (tree_stmt_iterator *);
+
+void append_to_statement_list (tree, tree *);
+void append_to_statement_list_force (tree, tree *);
+
+#endif /* GCC_TREE_ITERATOR_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-pass.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-pass.h
new file mode 100644
index 0000000..53ab682
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-pass.h
@@ -0,0 +1,564 @@
+/* Definitions for describing one tree-ssa optimization pass.
+ Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+ Contributed by Richard Henderson <rth@redhat.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+#ifndef GCC_TREE_PASS_H
+#define GCC_TREE_PASS_H 1
+
+/* In tree-dump.c */
+
+/* Different tree dump places. When you add new tree dump places,
+ extend the DUMP_FILES array in tree-dump.c. */
+enum tree_dump_index
+{
+ TDI_none, /* No dump */
+ TDI_cgraph, /* dump function call graph. */
+ TDI_tu, /* dump the whole translation unit. */
+ TDI_class, /* dump class hierarchy. */
+ TDI_original, /* dump each function before optimizing it */
+ TDI_generic, /* dump each function after genericizing it */
+ TDI_nested, /* dump each function after unnesting it */
+ TDI_vcg, /* create a VCG graph file for each
+ function's flowgraph. */
+ TDI_tree_all, /* enable all the GENERIC/GIMPLE dumps. */
+ TDI_rtl_all, /* enable all the RTL dumps. */
+ TDI_ipa_all, /* enable all the IPA dumps. */
+
+ TDI_end
+};
+
+/* Bit masks to control dumping. Not all values are applicable to
+ all dumps. Add new ones at the end. When you define new
+ values, extend the DUMP_OPTIONS array in tree-dump.c */
+#define TDF_ADDRESS (1 << 0) /* dump node addresses */
+#define TDF_SLIM (1 << 1) /* don't go wild following links */
+#define TDF_RAW (1 << 2) /* don't unparse the function */
+#define TDF_DETAILS (1 << 3) /* show more detailed info about
+ each pass */
+#define TDF_STATS (1 << 4) /* dump various statistics about
+ each pass */
+#define TDF_BLOCKS (1 << 5) /* display basic block boundaries */
+#define TDF_VOPS (1 << 6) /* display virtual operands */
+#define TDF_LINENO (1 << 7) /* display statement line numbers */
+#define TDF_UID (1 << 8) /* display decl UIDs */
+
+#define TDF_TREE (1 << 9) /* is a tree dump */
+#define TDF_RTL (1 << 10) /* is a RTL dump */
+#define TDF_IPA (1 << 11) /* is an IPA dump */
+#define TDF_STMTADDR (1 << 12) /* Address of stmt. */
+
+#define TDF_GRAPH (1 << 13) /* a graph dump is being emitted */
+#define TDF_MEMSYMS (1 << 14) /* display memory symbols in expr.
+ Implies TDF_VOPS. */
+
+#define TDF_DIAGNOSTIC (1 << 15) /* A dump to be put in a diagnostic
+ message. */
+#define TDF_VERBOSE (1 << 16) /* A dump that uses the full tree
+ dumper to print stmts. */
+#define TDF_RHS_ONLY (1 << 17) /* a flag to only print the RHS of
+ a gimple stmt. */
+#define TDF_CGRAPH (1 << 18) /* Dump a graphical representation of call graph
+ to a separate file. */
+
+/* Auxilliary dump file indices. Each value defines an auxiliary
+ dump file which is an additional dump file which may be generated
+ for a set of phases. Auxilliary dump files are named by appending
+ a suffix to the phase's main dump file name. When adding a new
+ auxiliary dump file, add a corresponding element in AUX_DUMP_INFO
+ in tree-dump.c to define the filename suffix. */
+enum aux_dump_index
+{
+ TDA_CGRAPH_VCG
+};
+
+extern char *get_dump_file_name (enum tree_dump_index);
+extern int dump_enabled_p (enum tree_dump_index);
+extern int dump_initialized_p (enum tree_dump_index);
+extern FILE *dump_begin (enum tree_dump_index, int *);
+extern void dump_end (enum tree_dump_index, FILE *);
+extern FILE *aux_dump_begin (enum aux_dump_index, enum tree_dump_index);
+extern void aux_dump_end (enum aux_dump_index, enum tree_dump_index, FILE *);
+extern void dump_node (const_tree, int, FILE *);
+extern int dump_switch_p (const char *);
+extern const char *dump_flag_name (enum tree_dump_index);
+
+/* Global variables used to communicate with passes. */
+extern FILE *dump_file;
+extern int dump_flags;
+extern const char *dump_file_name;
+
+/* Return the dump_file_info for the given phase. */
+extern struct dump_file_info *get_dump_file_info (enum tree_dump_index);
+
+/* Describe one pass; this is the common part shared across different pass
+ types. */
+struct opt_pass
+{
+ /* Optimization pass type. */
+ enum opt_pass_type {
+ GIMPLE_PASS,
+ RTL_PASS,
+ SIMPLE_IPA_PASS,
+ IPA_PASS
+ } type;
+ /* Terse name of the pass used as a fragment of the dump file
+ name. If the name starts with a star, no dump happens. */
+ const char *name;
+
+ /* If non-null, this pass and all sub-passes are executed only if
+ the function returns true. */
+ bool (*gate) (void);
+
+ /* This is the code to run. If null, then there should be sub-passes
+ otherwise this pass does nothing. The return value contains
+ TODOs to execute in addition to those in TODO_flags_finish. */
+ unsigned int (*execute) (void);
+
+ /* A list of sub-passes to run, dependent on gate predicate. */
+ struct opt_pass *sub;
+
+ /* Next in the list of passes to run, independent of gate predicate. */
+ struct opt_pass *next;
+
+ /* Static pass number, used as a fragment of the dump file name. */
+ int static_pass_number;
+
+ /* The timevar id associated with this pass. */
+ /* ??? Ideally would be dynamically assigned. */
+ unsigned int tv_id;
+
+ /* Sets of properties input and output from this pass. */
+ unsigned int properties_required;
+ unsigned int properties_provided;
+ unsigned int properties_destroyed;
+
+ /* Flags indicating common sets things to do before and after. */
+ unsigned int todo_flags_start;
+ unsigned int todo_flags_finish;
+};
+
+/* Description of GIMPLE pass. */
+struct gimple_opt_pass
+{
+ struct opt_pass pass;
+};
+
+/* Description of RTL pass. */
+struct rtl_opt_pass
+{
+ struct opt_pass pass;
+};
+
+struct varpool_node;
+struct cgraph_node;
+
+/* Description of IPA pass with generate summary, write, execute, read and
+ transform stages. */
+struct ipa_opt_pass
+{
+ struct opt_pass pass;
+
+ /* IPA passes can analyze function body and variable initializers
+ using this hook and produce summary. */
+ void (*generate_summary) (void);
+
+ /* This hook is used to serialize IPA summaries on disk. */
+ void (*write_summary) (void);
+
+ /* For most ipa passes, the information can only be deserialized in
+ one chunk. However, function bodies are read function at a time
+ as needed so both calls are necessary. */
+ void (*read_summary) (void);
+ void (*function_read_summary) (struct cgraph_node *);
+
+ /* Results of interprocedural propagation of an IPA pass is applied to
+ function body via this hook. */
+ unsigned int function_transform_todo_flags_start;
+ unsigned int (*function_transform) (struct cgraph_node *);
+ void (*variable_transform) (struct varpool_node *);
+};
+
+/* Description of simple IPA pass. Simple IPA passes have just one execute
+ hook. */
+struct simple_ipa_opt_pass
+{
+ struct opt_pass pass;
+};
+
+/* Define a tree dump switch. */
+struct dump_file_info
+{
+ const char *suffix; /* suffix to give output file. */
+ const char *swtch; /* command line switch */
+ const char *glob; /* command line glob */
+ int flags; /* user flags */
+ int state; /* state of play */
+ int num; /* dump file number */
+};
+
+/* Pass properties. */
+#define PROP_gimple_any (1 << 0) /* entire gimple grammar */
+#define PROP_gimple_lcf (1 << 1) /* lowered control flow */
+#define PROP_gimple_leh (1 << 2) /* lowered eh */
+#define PROP_cfg (1 << 3)
+#define PROP_referenced_vars (1 << 4)
+#define PROP_ssa (1 << 5)
+#define PROP_no_crit_edges (1 << 6)
+#define PROP_rtl (1 << 7)
+#define PROP_alias (1 << 8)
+#define PROP_gimple_lomp (1 << 9) /* lowered OpenMP directives */
+
+#define PROP_trees \
+ (PROP_gimple_any | PROP_gimple_lcf | PROP_gimple_leh | PROP_gimple_lomp)
+
+/* To-do flags. */
+#define TODO_dump_func (1 << 0)
+#define TODO_ggc_collect (1 << 1)
+#define TODO_verify_ssa (1 << 2)
+#define TODO_verify_flow (1 << 3)
+#define TODO_verify_stmts (1 << 4)
+#define TODO_cleanup_cfg (1 << 5)
+#define TODO_verify_loops (1 << 6)
+#define TODO_dump_cgraph (1 << 7)
+#define TODO_remove_functions (1 << 8)
+#define TODO_rebuild_frequencies (1 << 9)
+#define TODO_verify_rtl_sharing (1 << 10)
+
+/* To-do flags for calls to update_ssa. */
+
+/* Update the SSA form inserting PHI nodes for newly exposed symbols
+ and virtual names marked for updating. When updating real names,
+ only insert PHI nodes for a real name O_j in blocks reached by all
+ the new and old definitions for O_j. If the iterated dominance
+ frontier for O_j is not pruned, we may end up inserting PHI nodes
+ in blocks that have one or more edges with no incoming definition
+ for O_j. This would lead to uninitialized warnings for O_j's
+ symbol. */
+#define TODO_update_ssa (1 << 11)
+
+/* Update the SSA form without inserting any new PHI nodes at all.
+ This is used by passes that have either inserted all the PHI nodes
+ themselves or passes that need only to patch use-def and def-def
+ chains for virtuals (e.g., DCE). */
+#define TODO_update_ssa_no_phi (1 << 12)
+
+/* Insert PHI nodes everywhere they are needed. No pruning of the
+ IDF is done. This is used by passes that need the PHI nodes for
+ O_j even if it means that some arguments will come from the default
+ definition of O_j's symbol (e.g., pass_linear_transform).
+
+ WARNING: If you need to use this flag, chances are that your pass
+ may be doing something wrong. Inserting PHI nodes for an old name
+ where not all edges carry a new replacement may lead to silent
+ codegen errors or spurious uninitialized warnings. */
+#define TODO_update_ssa_full_phi (1 << 13)
+
+/* Passes that update the SSA form on their own may want to delegate
+ the updating of virtual names to the generic updater. Since FUD
+ chains are easier to maintain, this simplifies the work they need
+ to do. NOTE: If this flag is used, any OLD->NEW mappings for real
+ names are explicitly destroyed and only the symbols marked for
+ renaming are processed. */
+#define TODO_update_ssa_only_virtuals (1 << 14)
+
+/* Some passes leave unused local variables that can be removed from
+ cfun->local_decls. This reduces the size of dump files
+ and the memory footprint for VAR_DECLs. */
+#define TODO_remove_unused_locals (1 << 15)
+
+/* Internally used for the first in a sequence of passes. It is set
+ for the passes that are handed to register_dump_files. */
+#define TODO_set_props (1 << 16)
+
+/* Call df_finish at the end of the pass. This is done after all of
+ the dumpers have been allowed to run so that they have access to
+ the instance before it is destroyed. */
+#define TODO_df_finish (1 << 17)
+
+/* Call df_verify at the end of the pass if checking is enabled. */
+#define TODO_df_verify (1 << 18)
+
+/* Internally used for the first instance of a pass. */
+#define TODO_mark_first_instance (1 << 19)
+
+/* Rebuild aliasing info. */
+#define TODO_rebuild_alias (1 << 20)
+
+#define TODO_update_ssa_any \
+ (TODO_update_ssa \
+ | TODO_update_ssa_no_phi \
+ | TODO_update_ssa_full_phi \
+ | TODO_update_ssa_only_virtuals)
+
+#define TODO_verify_all \
+ (TODO_verify_ssa | TODO_verify_flow | TODO_verify_stmts)
+
+extern void tree_lowering_passes (tree decl);
+
+extern struct gimple_opt_pass pass_mudflap_1;
+extern struct gimple_opt_pass pass_mudflap_2;
+extern struct gimple_opt_pass pass_remove_useless_stmts;
+extern struct gimple_opt_pass pass_lower_cf;
+extern struct gimple_opt_pass pass_refactor_eh;
+extern struct gimple_opt_pass pass_lower_eh;
+extern struct gimple_opt_pass pass_build_cfg;
+extern struct gimple_opt_pass pass_tree_profile;
+extern struct gimple_opt_pass pass_tree_convert_builtin_dispatch;
+extern struct gimple_opt_pass pass_direct_call_profile;
+extern struct gimple_opt_pass pass_early_tree_profile;
+extern struct gimple_opt_pass pass_tree_sample_profile;
+extern struct gimple_opt_pass pass_tree_profile_dump;
+extern struct gimple_opt_pass pass_cleanup_cfg;
+extern struct gimple_opt_pass pass_referenced_vars;
+extern struct gimple_opt_pass pass_sra;
+extern struct gimple_opt_pass pass_sra_early;
+extern struct gimple_opt_pass pass_tail_recursion;
+extern struct gimple_opt_pass pass_tail_calls;
+extern struct gimple_opt_pass pass_tree_loop;
+extern struct gimple_opt_pass pass_tree_loop_init;
+extern struct gimple_opt_pass pass_lim;
+extern struct gimple_opt_pass pass_tree_unswitch;
+extern struct gimple_opt_pass pass_predcom;
+extern struct gimple_opt_pass pass_iv_canon;
+extern struct gimple_opt_pass pass_scev_cprop;
+extern struct gimple_opt_pass pass_empty_loop;
+extern struct gimple_opt_pass pass_record_bounds;
+extern struct gimple_opt_pass pass_graphite_transforms;
+extern struct gimple_opt_pass pass_if_conversion;
+extern struct gimple_opt_pass pass_loop_distribution;
+extern struct gimple_opt_pass pass_vectorize;
+extern struct gimple_opt_pass pass_complete_unroll;
+extern struct gimple_opt_pass pass_complete_unrolli;
+extern struct gimple_opt_pass pass_parallelize_loops;
+extern struct gimple_opt_pass pass_loop_prefetch;
+extern struct gimple_opt_pass pass_iv_optimize;
+extern struct gimple_opt_pass pass_tree_loop_done;
+extern struct gimple_opt_pass pass_ch;
+extern struct gimple_opt_pass pass_ccp;
+extern struct gimple_opt_pass pass_phi_only_cprop;
+extern struct gimple_opt_pass pass_build_ssa;
+extern struct gimple_opt_pass pass_del_ssa;
+extern struct gimple_opt_pass pass_build_alias;
+extern struct gimple_opt_pass pass_dominator;
+extern struct gimple_opt_pass pass_dce;
+extern struct gimple_opt_pass pass_dce_loop;
+extern struct gimple_opt_pass pass_cd_dce;
+extern struct gimple_opt_pass pass_call_cdce;
+extern struct gimple_opt_pass pass_merge_phi;
+extern struct gimple_opt_pass pass_split_crit_edges;
+extern struct gimple_opt_pass pass_pre;
+extern struct gimple_opt_pass pass_profile;
+extern struct gimple_opt_pass pass_strip_predict_hints;
+extern struct gimple_opt_pass pass_lower_complex_O0;
+extern struct gimple_opt_pass pass_lower_complex;
+extern struct gimple_opt_pass pass_lower_vector;
+extern struct gimple_opt_pass pass_lower_vector_ssa;
+extern struct gimple_opt_pass pass_lower_omp;
+extern struct gimple_opt_pass pass_expand_omp;
+extern struct gimple_opt_pass pass_expand_omp_ssa;
+extern struct gimple_opt_pass pass_object_sizes;
+extern struct gimple_opt_pass pass_fold_builtins;
+extern struct gimple_opt_pass pass_stdarg;
+extern struct gimple_opt_pass pass_early_warn_uninitialized;
+extern struct gimple_opt_pass pass_late_warn_uninitialized;
+extern struct gimple_opt_pass pass_cse_reciprocals;
+extern struct gimple_opt_pass pass_cse_sincos;
+extern struct gimple_opt_pass pass_convert_to_rsqrt;
+extern struct gimple_opt_pass pass_warn_function_return;
+extern struct gimple_opt_pass pass_warn_function_noreturn;
+extern struct gimple_opt_pass pass_cselim;
+extern struct gimple_opt_pass pass_phiopt;
+extern struct gimple_opt_pass pass_forwprop;
+extern struct gimple_opt_pass pass_phiprop;
+extern struct gimple_opt_pass pass_tree_ifcombine;
+extern struct gimple_opt_pass pass_dse;
+extern struct gimple_opt_pass pass_simple_dse;
+extern struct gimple_opt_pass pass_nrv;
+extern struct gimple_opt_pass pass_mark_used_blocks;
+extern struct gimple_opt_pass pass_rename_ssa_copies;
+extern struct gimple_opt_pass pass_rest_of_compilation;
+extern struct gimple_opt_pass pass_sink_code;
+extern struct gimple_opt_pass pass_fre;
+extern struct gimple_opt_pass pass_linear_transform;
+extern struct gimple_opt_pass pass_check_data_deps;
+extern struct gimple_opt_pass pass_copy_prop;
+extern struct gimple_opt_pass pass_vrp;
+extern struct gimple_opt_pass pass_uncprop;
+extern struct gimple_opt_pass pass_return_slot;
+extern struct gimple_opt_pass pass_reassoc;
+extern struct gimple_opt_pass pass_lrs;
+extern struct gimple_opt_pass pass_rebuild_cgraph_edges;
+extern struct gimple_opt_pass pass_build_cgraph_edges;
+extern struct gimple_opt_pass pass_reset_cc_flags;
+extern struct gimple_opt_pass pass_threadsafe_analyze;
+extern struct gimple_opt_pass pass_stack_overlay;
+
+/* IPA Passes */
+extern struct ipa_opt_pass pass_ipa_inline;
+extern struct ipa_opt_pass pass_ipa_cp;
+extern struct ipa_opt_pass pass_ipa_reference;
+extern struct ipa_opt_pass pass_ipa_pure_const;
+
+extern struct simple_ipa_opt_pass pass_ipa_matrix_reorg;
+extern struct simple_ipa_opt_pass pass_ipa_early_inline;
+extern struct simple_ipa_opt_pass pass_ipa_type_escape;
+extern struct simple_ipa_opt_pass pass_ipa_pta;
+extern struct simple_ipa_opt_pass pass_ipa_struct_reorg;
+extern struct simple_ipa_opt_pass pass_early_local_passes;
+extern struct simple_ipa_opt_pass pass_ipa_increase_alignment;
+extern struct simple_ipa_opt_pass pass_ipa_function_and_variable_visibility;
+extern struct simple_ipa_opt_pass pass_ipa_multiversion_dispatch;
+
+extern struct gimple_opt_pass pass_all_optimizations;
+extern struct gimple_opt_pass pass_cleanup_cfg_post_optimizing;
+extern struct gimple_opt_pass pass_free_cfg_annotations;
+extern struct gimple_opt_pass pass_free_datastructures;
+extern struct gimple_opt_pass pass_init_datastructures;
+extern struct gimple_opt_pass pass_fixup_cfg;
+
+extern struct rtl_opt_pass pass_expand;
+extern struct rtl_opt_pass pass_init_function;
+extern struct rtl_opt_pass pass_jump;
+extern struct rtl_opt_pass pass_rtl_eh;
+extern struct rtl_opt_pass pass_initial_value_sets;
+extern struct rtl_opt_pass pass_unshare_all_rtl;
+extern struct rtl_opt_pass pass_instantiate_virtual_regs;
+extern struct rtl_opt_pass pass_rtl_fwprop;
+extern struct rtl_opt_pass pass_rtl_fwprop_addr;
+extern struct rtl_opt_pass pass_jump2;
+extern struct rtl_opt_pass pass_lower_subreg;
+extern struct rtl_opt_pass pass_cse;
+extern struct rtl_opt_pass pass_fast_rtl_dce;
+extern struct rtl_opt_pass pass_ud_rtl_dce;
+extern struct rtl_opt_pass pass_rtl_dce;
+extern struct rtl_opt_pass pass_rtl_dse1;
+extern struct rtl_opt_pass pass_rtl_dse2;
+extern struct rtl_opt_pass pass_rtl_dse3;
+extern struct rtl_opt_pass pass_gcse;
+extern struct rtl_opt_pass pass_simplify_got;
+extern struct rtl_opt_pass pass_jump_bypass;
+extern struct rtl_opt_pass pass_profiling;
+extern struct rtl_opt_pass pass_rtl_ifcvt;
+extern struct gimple_opt_pass pass_tracer;
+
+extern struct rtl_opt_pass pass_into_cfg_layout_mode;
+extern struct rtl_opt_pass pass_outof_cfg_layout_mode;
+
+extern struct rtl_opt_pass pass_loop2;
+extern struct rtl_opt_pass pass_rtl_loop_init;
+extern struct rtl_opt_pass pass_rtl_move_loop_invariants;
+extern struct rtl_opt_pass pass_rtl_unswitch;
+extern struct rtl_opt_pass pass_rtl_unroll_and_peel_loops;
+extern struct rtl_opt_pass pass_rtl_doloop;
+extern struct rtl_opt_pass pass_rtl_loop_done;
+
+extern struct rtl_opt_pass pass_web;
+extern struct rtl_opt_pass pass_cse2;
+extern struct rtl_opt_pass pass_df_initialize_opt;
+extern struct rtl_opt_pass pass_df_initialize_no_opt;
+extern struct rtl_opt_pass pass_reginfo_init;
+extern struct rtl_opt_pass pass_subregs_of_mode_init;
+extern struct rtl_opt_pass pass_subregs_of_mode_finish;
+extern struct rtl_opt_pass pass_inc_dec;
+extern struct rtl_opt_pass pass_stack_ptr_mod;
+extern struct rtl_opt_pass pass_initialize_regs;
+extern struct rtl_opt_pass pass_combine;
+extern struct rtl_opt_pass pass_if_after_combine;
+extern struct rtl_opt_pass pass_implicit_zee;
+extern struct rtl_opt_pass pass_partition_blocks;
+extern struct rtl_opt_pass pass_match_asm_constraints;
+extern struct rtl_opt_pass pass_regmove;
+extern struct rtl_opt_pass pass_split_all_insns;
+extern struct rtl_opt_pass pass_fast_rtl_byte_dce;
+extern struct rtl_opt_pass pass_lower_subreg2;
+extern struct rtl_opt_pass pass_mode_switching;
+extern struct rtl_opt_pass pass_see;
+extern struct rtl_opt_pass pass_sms;
+extern struct rtl_opt_pass pass_sched;
+extern struct rtl_opt_pass pass_ira;
+extern struct rtl_opt_pass pass_postreload;
+extern struct rtl_opt_pass pass_clean_state;
+extern struct rtl_opt_pass pass_branch_prob;
+extern struct rtl_opt_pass pass_value_profile_transformations;
+extern struct rtl_opt_pass pass_postreload_cse;
+extern struct rtl_opt_pass pass_gcse2;
+extern struct rtl_opt_pass pass_split_after_reload;
+extern struct rtl_opt_pass pass_branch_target_load_optimize1;
+extern struct rtl_opt_pass pass_thread_prologue_and_epilogue;
+extern struct rtl_opt_pass pass_stack_adjustments;
+extern struct rtl_opt_pass pass_peephole2;
+extern struct rtl_opt_pass pass_if_after_reload;
+extern struct rtl_opt_pass pass_regrename;
+extern struct rtl_opt_pass pass_cprop_hardreg;
+extern struct rtl_opt_pass pass_reorder_blocks;
+extern struct rtl_opt_pass pass_branch_target_load_optimize2;
+extern struct rtl_opt_pass pass_leaf_regs;
+extern struct rtl_opt_pass pass_split_before_sched2;
+extern struct rtl_opt_pass pass_sched2;
+extern struct rtl_opt_pass pass_stack_regs;
+extern struct rtl_opt_pass pass_stack_regs_run;
+extern struct rtl_opt_pass pass_df_finish;
+extern struct rtl_opt_pass pass_compute_alignments;
+extern struct rtl_opt_pass pass_duplicate_computed_gotos;
+extern struct rtl_opt_pass pass_variable_tracking;
+extern struct rtl_opt_pass pass_free_cfg;
+extern struct rtl_opt_pass pass_machine_reorg;
+extern struct rtl_opt_pass pass_cleanup_barriers;
+extern struct rtl_opt_pass pass_delay_slots;
+extern struct rtl_opt_pass pass_split_for_shorten_branches;
+extern struct rtl_opt_pass pass_split_before_regstack;
+extern struct rtl_opt_pass pass_convert_to_eh_region_ranges;
+extern struct rtl_opt_pass pass_shorten_branches;
+extern struct rtl_opt_pass pass_set_nothrow_function_flags;
+extern struct rtl_opt_pass pass_final;
+extern struct rtl_opt_pass pass_rtl_seqabstr;
+extern struct gimple_opt_pass pass_release_ssa_names;
+extern struct gimple_opt_pass pass_early_inline;
+extern struct gimple_opt_pass pass_inline_parameters;
+extern struct gimple_opt_pass pass_all_early_optimizations;
+extern struct gimple_opt_pass pass_update_address_taken;
+extern struct gimple_opt_pass pass_convert_switch;
+
+/* The root of the compilation pass tree, once constructed. */
+extern struct opt_pass *all_passes, *all_ipa_passes, *all_lowering_passes;
+
+/* Current optimization pass. */
+extern struct opt_pass *current_pass;
+
+extern struct opt_pass * get_pass_for_id (int);
+extern void execute_pass_list (struct opt_pass *);
+extern void execute_ipa_pass_list (struct opt_pass *);
+extern void print_current_pass (FILE *);
+extern void debug_pass (void);
+/* Need to expose this function externally for the plugin pass management
+ support to register dump files for new passes. */
+extern void register_one_dump_file (struct opt_pass *);
+
+/* Set to true if the pass is called the first time during compilation of the
+ current function. Note that using this information in the optimization
+ passes is considered not to be clean, and it should be avoided if possible.
+ This flag is currently used to prevent loops from being peeled repeatedly
+ in jump threading; it will be removed once we preserve loop structures
+ throughout the compilation -- we will be able to mark the affected loops
+ directly in jump threading, and avoid peeling them next time. */
+extern bool first_pass_instance;
+
+#endif /* GCC_TREE_PASS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-operands.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-operands.h
new file mode 100644
index 0000000..bd30f82
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-operands.h
@@ -0,0 +1,349 @@
+/* SSA operand management for trees.
+ Copyright (C) 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_TREE_SSA_OPERANDS_H
+#define GCC_TREE_SSA_OPERANDS_H
+
+/* Interface to SSA operands. */
+
+
+/* This represents a pointer to a DEF operand. */
+typedef tree *def_operand_p;
+
+/* This represents a pointer to a USE operand. */
+typedef ssa_use_operand_t *use_operand_p;
+
+/* NULL operand types. */
+#define NULL_USE_OPERAND_P NULL
+#define NULL_DEF_OPERAND_P NULL
+
+/* This represents the DEF operands of a stmt. */
+struct def_optype_d
+{
+ struct def_optype_d *next;
+ tree *def_ptr;
+};
+typedef struct def_optype_d *def_optype_p;
+
+/* This represents the USE operands of a stmt. */
+struct use_optype_d
+{
+ struct use_optype_d *next;
+ struct ssa_use_operand_d use_ptr;
+};
+typedef struct use_optype_d *use_optype_p;
+
+typedef struct vuse_element_d
+{
+ tree use_var;
+ struct ssa_use_operand_d use_ptr;
+} vuse_element_t;
+
+typedef struct vuse_vec_d
+{
+ unsigned int num_vuse;
+ vuse_element_t uses[1];
+} vuse_vec_t;
+typedef struct vuse_vec_d *vuse_vec_p;
+
+#define VUSE_VECT_NUM_ELEM(V) (V).num_vuse
+#define VUSE_VECT_ELEMENT_NC(V,X) (V).uses[(X)]
+#define VUSE_ELEMENT_PTR_NC(V,X) (&(VUSE_VECT_ELEMENT_NC ((V),(X)).use_ptr))
+#define VUSE_ELEMENT_VAR_NC(V,X) (VUSE_VECT_ELEMENT_NC ((V),(X)).use_var)
+
+#ifdef ENABLE_CHECKING
+#define VUSE_VECT_ELEMENT(V,X) \
+ (gcc_assert (((unsigned int) (X)) < VUSE_VECT_NUM_ELEM (V)), \
+ VUSE_VECT_ELEMENT_NC (V,X))
+
+#define VUSE_ELEMENT_PTR(V,X) \
+ (gcc_assert (((unsigned int) (X)) < VUSE_VECT_NUM_ELEM (V)), \
+ VUSE_ELEMENT_PTR_NC (V, X))
+
+#define SET_VUSE_VECT_ELEMENT(V,X,N) \
+ (gcc_assert (((unsigned int) (X)) < VUSE_VECT_NUM_ELEM (V)), \
+ VUSE_VECT_ELEMENT_NC (V,X) = (N))
+
+#define SET_VUSE_ELEMENT_VAR(V,X,N) \
+ (gcc_assert (((unsigned int) (X)) < VUSE_VECT_NUM_ELEM (V)), \
+ VUSE_VECT_ELEMENT_NC ((V),(X)).use_var = (N))
+
+#define SET_VUSE_ELEMENT_PTR(V,X,N) \
+ (gcc_assert (((unsigned int) (X)) < VUSE_VECT_NUM_ELEM (V)), \
+ VUSE_ELEMENT_PTR_NC (V, X) = (N))
+#else
+#define VUSE_VECT_ELEMENT(V,X) VUSE_VECT_ELEMENT_NC(V,X)
+#define VUSE_ELEMENT_PTR(V,X) VUSE_ELEMENT_PTR_NC(V,X)
+#define SET_VUSE_VECT_ELEMENT(V,X,N) VUSE_VECT_ELEMENT_NC(V,X) = (N)
+#define SET_VUSE_ELEMENT_PTR(V,X,N) VUSE_ELEMENT_PTR_NC(V,X) = (N)
+#define SET_VUSE_ELEMENT_VAR(V,X,N) VUSE_VECT_ELEMENT_NC ((V),(X)).use_var = (N)
+#endif
+
+#define VUSE_ELEMENT_VAR(V,X) (VUSE_VECT_ELEMENT ((V),(X)).use_var)
+
+/* This represents the virtual ops of a stmt. */
+struct voptype_d
+{
+ struct voptype_d *next;
+ tree def_var;
+ vuse_vec_t usev;
+};
+typedef struct voptype_d *voptype_p;
+
+/* This structure represents a variable sized buffer which is allocated by the
+ operand memory manager. Operands are suballocated out of this block. The
+ MEM array varies in size. */
+
+struct ssa_operand_memory_d GTY((chain_next("%h.next")))
+{
+ struct ssa_operand_memory_d *next;
+ char mem[1];
+};
+
+/* Number of different size free buckets for virtual operands. */
+#define NUM_VOP_FREE_BUCKETS 29
+
+/* Per-function operand caches. */
+struct ssa_operands GTY(()) {
+ struct ssa_operand_memory_d *operand_memory;
+ unsigned operand_memory_index;
+ /* Current size of the operand memory buffer. */
+ unsigned int ssa_operand_mem_size;
+
+ bool ops_active;
+
+ struct def_optype_d * GTY ((skip (""))) free_defs;
+ struct use_optype_d * GTY ((skip (""))) free_uses;
+ struct voptype_d * GTY ((skip (""))) vop_free_buckets[NUM_VOP_FREE_BUCKETS];
+ VEC(tree,heap) * GTY ((skip (""))) mpt_table;
+};
+
+/* This represents the operand cache for a stmt. */
+struct stmt_operands_d
+{
+ /* Statement operands. */
+ struct def_optype_d * def_ops;
+ struct use_optype_d * use_ops;
+
+ /* Virtual operands (VDEF, VUSE). */
+ struct voptype_d * vdef_ops;
+ struct voptype_d * vuse_ops;
+
+ /* Sets of memory symbols loaded and stored. */
+ bitmap stores;
+ bitmap loads;
+};
+
+typedef struct stmt_operands_d *stmt_operands_p;
+
+#define USE_FROM_PTR(PTR) get_use_from_ptr (PTR)
+#define DEF_FROM_PTR(PTR) get_def_from_ptr (PTR)
+#define SET_USE(USE, V) set_ssa_use_from_ptr (USE, V)
+#define SET_DEF(DEF, V) ((*(DEF)) = (V))
+
+#define USE_STMT(USE) (USE)->loc.stmt
+
+#define USE_OP_PTR(OP) (&((OP)->use_ptr))
+#define USE_OP(OP) (USE_FROM_PTR (USE_OP_PTR (OP)))
+
+#define DEF_OP_PTR(OP) ((OP)->def_ptr)
+#define DEF_OP(OP) (DEF_FROM_PTR (DEF_OP_PTR (OP)))
+
+#define VUSE_OP_PTR(OP,X) VUSE_ELEMENT_PTR ((OP)->usev, (X))
+#define VUSE_OP(OP,X) VUSE_ELEMENT_VAR ((OP)->usev, (X))
+#define SET_VUSE_OP(OP,X,N) SET_VUSE_ELEMENT_VAR ((OP)->usev, (X), (N))
+#define VUSE_NUM(OP) VUSE_VECT_NUM_ELEM ((OP)->usev)
+#define VUSE_VECT(OP) &((OP)->usev)
+
+#define VDEF_RESULT_PTR(OP) (&((OP)->def_var))
+#define VDEF_RESULT(OP) ((OP)->def_var)
+#define VDEF_OP_PTR(OP,X) VUSE_OP_PTR (OP, X)
+#define VDEF_OP(OP,X) VUSE_OP (OP, X)
+#define SET_VDEF_OP(OP,X,N) SET_VUSE_OP (OP, X, N)
+#define VDEF_NUM(OP) VUSE_VECT_NUM_ELEM ((OP)->usev)
+#define VDEF_VECT(OP) &((OP)->usev)
+
+#define PHI_RESULT_PTR(PHI) gimple_phi_result_ptr (PHI)
+#define PHI_RESULT(PHI) DEF_FROM_PTR (PHI_RESULT_PTR (PHI))
+#define SET_PHI_RESULT(PHI, V) SET_DEF (PHI_RESULT_PTR (PHI), (V))
+
+#define PHI_ARG_DEF_PTR(PHI, I) gimple_phi_arg_imm_use_ptr ((PHI), (I))
+#define PHI_ARG_DEF(PHI, I) USE_FROM_PTR (PHI_ARG_DEF_PTR ((PHI), (I)))
+#define SET_PHI_ARG_DEF(PHI, I, V) \
+ SET_USE (PHI_ARG_DEF_PTR ((PHI), (I)), (V))
+#define PHI_ARG_DEF_FROM_EDGE(PHI, E) \
+ PHI_ARG_DEF ((PHI), (E)->dest_idx)
+#define PHI_ARG_DEF_PTR_FROM_EDGE(PHI, E) \
+ PHI_ARG_DEF_PTR ((PHI), (E)->dest_idx)
+#define PHI_ARG_INDEX_FROM_USE(USE) phi_arg_index_from_use (USE)
+
+
+extern void init_ssa_operands (void);
+extern void fini_ssa_operands (void);
+extern void update_stmt_operands (gimple);
+extern void free_stmt_operands (gimple);
+extern bool verify_imm_links (FILE *f, tree var);
+
+extern void copy_virtual_operands (gimple, gimple);
+extern int operand_build_cmp (const void *, const void *);
+extern void create_ssa_artificial_load_stmt (gimple, gimple, bool);
+
+extern void dump_immediate_uses (FILE *file);
+extern void dump_immediate_uses_for (FILE *file, tree var);
+extern void debug_immediate_uses (void);
+extern void debug_immediate_uses_for (tree var);
+extern void dump_decl_set (FILE *, bitmap);
+extern void debug_decl_set (bitmap);
+
+extern bool ssa_operands_active (void);
+
+extern void push_stmt_changes (gimple *);
+extern void pop_stmt_changes (gimple *);
+extern void discard_stmt_changes (gimple *);
+void add_to_addressable_set (tree, bitmap *);
+
+enum ssa_op_iter_type {
+ ssa_op_iter_none = 0,
+ ssa_op_iter_tree,
+ ssa_op_iter_use,
+ ssa_op_iter_def,
+ ssa_op_iter_vdef
+};
+
+/* This structure is used in the operand iterator loops. It contains the
+ items required to determine which operand is retrieved next. During
+ optimization, this structure is scalarized, and any unused fields are
+ optimized away, resulting in little overhead. */
+
+typedef struct ssa_operand_iterator_d
+{
+ def_optype_p defs;
+ use_optype_p uses;
+ voptype_p vuses;
+ voptype_p vdefs;
+ voptype_p mayuses;
+ enum ssa_op_iter_type iter_type;
+ int phi_i;
+ int num_phi;
+ gimple phi_stmt;
+ bool done;
+ unsigned int vuse_index;
+ unsigned int mayuse_index;
+} ssa_op_iter;
+
+/* These flags are used to determine which operands are returned during
+ execution of the loop. */
+#define SSA_OP_USE 0x01 /* Real USE operands. */
+#define SSA_OP_DEF 0x02 /* Real DEF operands. */
+#define SSA_OP_VUSE 0x04 /* VUSE operands. */
+#define SSA_OP_VMAYUSE 0x08 /* USE portion of VDEFS. */
+#define SSA_OP_VDEF 0x10 /* DEF portion of VDEFS. */
+
+/* These are commonly grouped operand flags. */
+#define SSA_OP_VIRTUAL_USES (SSA_OP_VUSE | SSA_OP_VMAYUSE)
+#define SSA_OP_VIRTUAL_DEFS (SSA_OP_VDEF)
+#define SSA_OP_ALL_VIRTUALS (SSA_OP_VIRTUAL_USES | SSA_OP_VIRTUAL_DEFS)
+#define SSA_OP_ALL_USES (SSA_OP_VIRTUAL_USES | SSA_OP_USE)
+#define SSA_OP_ALL_DEFS (SSA_OP_VIRTUAL_DEFS | SSA_OP_DEF)
+#define SSA_OP_ALL_OPERANDS (SSA_OP_ALL_USES | SSA_OP_ALL_DEFS)
+
+/* This macro executes a loop over the operands of STMT specified in FLAG,
+ returning each operand as a 'tree' in the variable TREEVAR. ITER is an
+ ssa_op_iter structure used to control the loop. */
+#define FOR_EACH_SSA_TREE_OPERAND(TREEVAR, STMT, ITER, FLAGS) \
+ for (TREEVAR = op_iter_init_tree (&(ITER), STMT, FLAGS); \
+ !op_iter_done (&(ITER)); \
+ TREEVAR = op_iter_next_tree (&(ITER)))
+
+/* This macro executes a loop over the operands of STMT specified in FLAG,
+ returning each operand as a 'use_operand_p' in the variable USEVAR.
+ ITER is an ssa_op_iter structure used to control the loop. */
+#define FOR_EACH_SSA_USE_OPERAND(USEVAR, STMT, ITER, FLAGS) \
+ for (USEVAR = op_iter_init_use (&(ITER), STMT, FLAGS); \
+ !op_iter_done (&(ITER)); \
+ USEVAR = op_iter_next_use (&(ITER)))
+
+/* This macro executes a loop over the operands of STMT specified in FLAG,
+ returning each operand as a 'def_operand_p' in the variable DEFVAR.
+ ITER is an ssa_op_iter structure used to control the loop. */
+#define FOR_EACH_SSA_DEF_OPERAND(DEFVAR, STMT, ITER, FLAGS) \
+ for (DEFVAR = op_iter_init_def (&(ITER), STMT, FLAGS); \
+ !op_iter_done (&(ITER)); \
+ DEFVAR = op_iter_next_def (&(ITER)))
+
+/* This macro executes a loop over the VDEF operands of STMT. The def
+ and use vector for each VDEF is returned in DEFVAR and USEVECT.
+ ITER is an ssa_op_iter structure used to control the loop. */
+#define FOR_EACH_SSA_VDEF_OPERAND(DEFVAR, USEVECT, STMT, ITER) \
+ for (op_iter_init_vdef (&(ITER), STMT, &(USEVECT), &(DEFVAR)); \
+ !op_iter_done (&(ITER)); \
+ op_iter_next_vdef (&(USEVECT), &(DEFVAR), &(ITER)))
+
+/* This macro will execute a loop over all the arguments of a PHI which
+ match FLAGS. A use_operand_p is always returned via USEVAR. FLAGS
+ can be either SSA_OP_USE or SSA_OP_VIRTUAL_USES or SSA_OP_ALL_USES. */
+#define FOR_EACH_PHI_ARG(USEVAR, STMT, ITER, FLAGS) \
+ for ((USEVAR) = op_iter_init_phiuse (&(ITER), STMT, FLAGS); \
+ !op_iter_done (&(ITER)); \
+ (USEVAR) = op_iter_next_use (&(ITER)))
+
+
+/* This macro will execute a loop over a stmt, regardless of whether it is
+ a real stmt or a PHI node, looking at the USE nodes matching FLAGS. */
+#define FOR_EACH_PHI_OR_STMT_USE(USEVAR, STMT, ITER, FLAGS) \
+ for ((USEVAR) = (gimple_code (STMT) == GIMPLE_PHI \
+ ? op_iter_init_phiuse (&(ITER), STMT, FLAGS) \
+ : op_iter_init_use (&(ITER), STMT, FLAGS)); \
+ !op_iter_done (&(ITER)); \
+ (USEVAR) = op_iter_next_use (&(ITER)))
+
+/* This macro will execute a loop over a stmt, regardless of whether it is
+ a real stmt or a PHI node, looking at the DEF nodes matching FLAGS. */
+#define FOR_EACH_PHI_OR_STMT_DEF(DEFVAR, STMT, ITER, FLAGS) \
+ for ((DEFVAR) = (gimple_code (STMT) == GIMPLE_PHI \
+ ? op_iter_init_phidef (&(ITER), STMT, FLAGS) \
+ : op_iter_init_def (&(ITER), STMT, FLAGS)); \
+ !op_iter_done (&(ITER)); \
+ (DEFVAR) = op_iter_next_def (&(ITER)))
+
+/* This macro returns an operand in STMT as a tree if it is the ONLY
+ operand matching FLAGS. If there are 0 or more than 1 operand matching
+ FLAGS, then NULL_TREE is returned. */
+#define SINGLE_SSA_TREE_OPERAND(STMT, FLAGS) \
+ single_ssa_tree_operand (STMT, FLAGS)
+
+/* This macro returns an operand in STMT as a use_operand_p if it is the ONLY
+ operand matching FLAGS. If there are 0 or more than 1 operand matching
+ FLAGS, then NULL_USE_OPERAND_P is returned. */
+#define SINGLE_SSA_USE_OPERAND(STMT, FLAGS) \
+ single_ssa_use_operand (STMT, FLAGS)
+
+/* This macro returns an operand in STMT as a def_operand_p if it is the ONLY
+ operand matching FLAGS. If there are 0 or more than 1 operand matching
+ FLAGS, then NULL_DEF_OPERAND_P is returned. */
+#define SINGLE_SSA_DEF_OPERAND(STMT, FLAGS) \
+ single_ssa_def_operand (STMT, FLAGS)
+
+/* This macro returns TRUE if there are no operands matching FLAGS in STMT. */
+#define ZERO_SSA_OPERANDS(STMT, FLAGS) zero_ssa_operands (STMT, FLAGS)
+
+/* This macro counts the number of operands in STMT matching FLAGS. */
+#define NUM_SSA_OPERANDS(STMT, FLAGS) num_ssa_operands (STMT, FLAGS)
+
+#endif /* GCC_TREE_SSA_OPERANDS_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-sccvn.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-sccvn.h
new file mode 100644
index 0000000..bc6ecc0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree-ssa-sccvn.h
@@ -0,0 +1,199 @@
+/* Tree SCC value numbering
+ Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+ Contributed by Daniel Berlin <dberlin@dberlin.org>
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef TREE_SSA_SCCVN_H
+#define TREE_SSA_SCCVN_H
+
+/* TOP of the VN lattice. */
+extern tree VN_TOP;
+
+/* N-ary operations in the hashtable consist of length operands, an
+ opcode, and a type. Result is the value number of the operation,
+ and hashcode is stored to avoid having to calculate it
+ repeatedly. */
+
+typedef struct vn_nary_op_s
+{
+ /* Unique identify that all expressions with the same value have. */
+ unsigned int value_id;
+ ENUM_BITFIELD(tree_code) opcode : 16;
+ unsigned length : 16;
+ hashval_t hashcode;
+ tree result;
+ tree type;
+ tree op[4];
+} *vn_nary_op_t;
+typedef const struct vn_nary_op_s *const_vn_nary_op_t;
+
+/* Phi nodes in the hashtable consist of their non-VN_TOP phi
+ arguments, and the basic block the phi is in. Result is the value
+ number of the operation, and hashcode is stored to avoid having to
+ calculate it repeatedly. Phi nodes not in the same block are never
+ considered equivalent. */
+
+typedef struct vn_phi_s
+{
+ /* Unique identifier that all expressions with the same value have. */
+ unsigned int value_id;
+ hashval_t hashcode;
+ VEC (tree, heap) *phiargs;
+ basic_block block;
+ tree result;
+} *vn_phi_t;
+typedef const struct vn_phi_s *const_vn_phi_t;
+
+/* Reference operands only exist in reference operations structures.
+ They consist of an opcode, type, and some number of operands. For
+ a given opcode, some, all, or none of the operands may be used.
+ The operands are there to store the information that makes up the
+ portion of the addressing calculation that opcode performs. */
+
+typedef struct vn_reference_op_struct
+{
+ enum tree_code opcode;
+ tree type;
+ tree op0;
+ tree op1;
+ tree op2;
+} vn_reference_op_s;
+typedef vn_reference_op_s *vn_reference_op_t;
+typedef const vn_reference_op_s *const_vn_reference_op_t;
+
+DEF_VEC_O(vn_reference_op_s);
+DEF_VEC_ALLOC_O(vn_reference_op_s, heap);
+
+/* A reference operation in the hashtable is representation as a
+ collection of vuses, representing the memory state at the time of
+ the operation, and a collection of operands that make up the
+ addressing calculation. If two vn_reference_t's have the same set
+ of operands, they access the same memory location. We also store
+ the resulting value number, and the hashcode. The vuses are
+ always stored in order sorted by ssa name version. */
+
+typedef struct vn_reference_s
+{
+ /* Unique identifier that all expressions with the same value have. */
+ unsigned int value_id;
+ hashval_t hashcode;
+ VEC (tree, gc) *vuses;
+ VEC (vn_reference_op_s, heap) *operands;
+ tree result;
+} *vn_reference_t;
+typedef const struct vn_reference_s *const_vn_reference_t;
+
+typedef struct vn_constant_s
+{
+ unsigned int value_id;
+ hashval_t hashcode;
+ tree constant;
+} *vn_constant_t;
+
+/* Hash the constant CONSTANT with distinguishing type incompatible
+ constants in the types_compatible_p sense. */
+
+static inline hashval_t
+vn_hash_constant_with_type (tree constant)
+{
+ tree type = TREE_TYPE (constant);
+ return (iterative_hash_expr (constant, 0)
+ + INTEGRAL_TYPE_P (type)
+ + (INTEGRAL_TYPE_P (type)
+ ? TYPE_PRECISION (type) + TYPE_UNSIGNED (type) : 0));
+}
+
+/* Compare the constants C1 and C2 with distinguishing type incompatible
+ constants in the types_compatible_p sense. */
+
+static inline bool
+vn_constant_eq_with_type (tree c1, tree c2)
+{
+ return (expressions_equal_p (c1, c2)
+ && types_compatible_p (TREE_TYPE (c1), TREE_TYPE (c2)));
+}
+
+typedef struct vn_ssa_aux
+{
+ /* Value number. This may be an SSA name or a constant. */
+ tree valnum;
+ /* Representative expression, if not a direct constant. */
+ tree expr;
+
+ /* Unique identifier that all expressions with the same value have. */
+ unsigned int value_id;
+
+ /* SCC information. */
+ unsigned int dfsnum;
+ unsigned int low;
+ unsigned visited : 1;
+ unsigned on_sccstack : 1;
+
+ /* Whether the representative expression contains constants. */
+ unsigned has_constants : 1;
+ /* Whether the SSA_NAME has been value numbered already. This is
+ only saying whether visit_use has been called on it at least
+ once. It cannot be used to avoid visitation for SSA_NAME's
+ involved in non-singleton SCC's. */
+ unsigned use_processed : 1;
+
+ /* Whether the SSA_NAME has no defining statement and thus an
+ insertion of such with EXPR as definition is required before
+ a use can be created of it. */
+ unsigned needs_insertion : 1;
+} *vn_ssa_aux_t;
+
+/* Return the value numbering info for an SSA_NAME. */
+extern vn_ssa_aux_t VN_INFO (tree);
+extern vn_ssa_aux_t VN_INFO_GET (tree);
+tree vn_get_expr_for (tree);
+bool run_scc_vn (bool);
+void free_scc_vn (void);
+tree vn_nary_op_lookup (tree, vn_nary_op_t *);
+tree vn_nary_op_lookup_stmt (gimple, vn_nary_op_t *);
+tree vn_nary_op_lookup_pieces (unsigned int, enum tree_code,
+ tree, tree, tree, tree, tree,
+ vn_nary_op_t *);
+vn_nary_op_t vn_nary_op_insert (tree, tree);
+vn_nary_op_t vn_nary_op_insert_stmt (gimple, tree);
+vn_nary_op_t vn_nary_op_insert_pieces (unsigned int, enum tree_code,
+ tree, tree, tree, tree,
+ tree, tree, unsigned int);
+void copy_reference_ops_from_ref (tree, VEC(vn_reference_op_s, heap) **);
+void copy_reference_ops_from_call (gimple, VEC(vn_reference_op_s, heap) **);
+tree vn_reference_lookup_pieces (VEC (tree, gc) *,
+ VEC (vn_reference_op_s, heap) *,
+ vn_reference_t *, bool);
+tree vn_reference_lookup (tree, VEC (tree, gc) *, bool, vn_reference_t *);
+vn_reference_t vn_reference_insert (tree, tree, VEC (tree, gc) *);
+vn_reference_t vn_reference_insert_pieces (VEC (tree, gc) *,
+ VEC (vn_reference_op_s, heap) *,
+ tree, unsigned int);
+
+hashval_t vn_nary_op_compute_hash (const vn_nary_op_t);
+int vn_nary_op_eq (const void *, const void *);
+bool vn_nary_may_trap (vn_nary_op_t);
+hashval_t vn_reference_compute_hash (const vn_reference_t);
+int vn_reference_eq (const void *, const void *);
+unsigned int get_max_value_id (void);
+unsigned int get_next_value_id (void);
+unsigned int get_constant_value_id (tree);
+unsigned int get_or_alloc_constant_value_id (tree);
+bool value_id_constant_p (unsigned int);
+VEC (tree, gc) *shared_vuses_from_stmt (gimple);
+#endif /* TREE_SSA_SCCVN_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.def
new file mode 100644
index 0000000..c675812
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.def
@@ -0,0 +1,1170 @@
+/* This file contains the definitions and documentation for the
+ tree codes used in GCC.
+ Copyright (C) 1987, 1988, 1993, 1995, 1997, 1998, 2000, 2001, 2004, 2005,
+ 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+
+/* For tcc_references, tcc_expression, tcc_comparison, tcc_unary,
+ tcc_binary, and tcc_statement nodes, which use struct tree_exp, the
+ 4th element is the number of argument slots to allocate. This
+ determines the size of the tree node object. Other nodes use
+ different structures, and the size is determined by the tree_union
+ member structure; the 4th element should be zero. Languages that
+ define language-specific tcc_exceptional or tcc_constant codes must
+ define the tree_size langhook to say how big they are.
+
+ These tree codes have been sorted so that the macros in tree.h that
+ check for various tree codes are optimized into range checks. This
+ gives a measurable performance improvement. When adding a new
+ code, consider its placement in relation to the other codes. */
+
+/* Any erroneous construct is parsed into a node of this type.
+ This type of node is accepted without complaint in all contexts
+ by later parsing activities, to avoid multiple error messages
+ for one error.
+ No fields in these nodes are used except the TREE_CODE. */
+DEFTREECODE (ERROR_MARK, "error_mark", tcc_exceptional, 0)
+
+/* Used to represent a name (such as, in the DECL_NAME of a decl node).
+ Internally it looks like a STRING_CST node.
+ There is only one IDENTIFIER_NODE ever made for any particular name.
+ Use `get_identifier' to get it (or create it, the first time). */
+DEFTREECODE (IDENTIFIER_NODE, "identifier_node", tcc_exceptional, 0)
+
+/* Has the TREE_VALUE and TREE_PURPOSE fields. */
+/* These nodes are made into lists by chaining through the
+ TREE_CHAIN field. The elements of the list live in the
+ TREE_VALUE fields, while TREE_PURPOSE fields are occasionally
+ used as well to get the effect of Lisp association lists. */
+DEFTREECODE (TREE_LIST, "tree_list", tcc_exceptional, 0)
+
+/* These nodes contain an array of tree nodes. */
+DEFTREECODE (TREE_VEC, "tree_vec", tcc_exceptional, 0)
+
+/* A symbol binding block. These are arranged in a tree,
+ where the BLOCK_SUBBLOCKS field contains a chain of subblocks
+ chained through the BLOCK_CHAIN field.
+ BLOCK_SUPERCONTEXT points to the parent block.
+ For a block which represents the outermost scope of a function, it
+ points to the FUNCTION_DECL node.
+ BLOCK_VARS points to a chain of decl nodes.
+ BLOCK_CHAIN points to the next BLOCK at the same level.
+ BLOCK_ABSTRACT_ORIGIN points to the original (abstract) tree node which
+ this block is an instance of, or else is NULL to indicate that this
+ block is not an instance of anything else. When non-NULL, the value
+ could either point to another BLOCK node or it could point to a
+ FUNCTION_DECL node (e.g. in the case of a block representing the
+ outermost scope of a particular inlining of a function).
+ BLOCK_ABSTRACT is nonzero if the block represents an abstract
+ instance of a block (i.e. one which is nested within an abstract
+ instance of an inline function).
+ TREE_ASM_WRITTEN is nonzero if the block was actually referenced
+ in the generated assembly. */
+DEFTREECODE (BLOCK, "block", tcc_exceptional, 0)
+
+/* Each data type is represented by a tree node whose code is one of
+ the following: */
+/* Each node that represents a data type has a component TYPE_SIZE
+ containing a tree that is an expression for the size in bits.
+ The TYPE_MODE contains the machine mode for values of this type.
+ The TYPE_POINTER_TO field contains a type for a pointer to this type,
+ or zero if no such has been created yet.
+ The TYPE_NEXT_VARIANT field is used to chain together types
+ that are variants made by type modifiers such as "const" and "volatile".
+ The TYPE_MAIN_VARIANT field, in any member of such a chain,
+ points to the start of the chain.
+ The TYPE_NONCOPIED_PARTS field is a list specifying which parts
+ of an object of this type should *not* be copied by assignment.
+ The TREE_VALUE of each is a FIELD_DECL that should not be
+ copied. The TREE_PURPOSE is an initial value for that field when
+ an object of this type is initialized via an INIT_EXPR. It may
+ be NULL if no special value is required. Even the things in this
+ list are copied if the right-hand side of an assignment is known
+ to be a complete object (rather than being, perhaps, a subobject
+ of some other object.) The determination of what constitutes a
+ complete object is done by fixed_type_p.
+ The TYPE_NAME field contains info on the name used in the program
+ for this type (for GDB symbol table output). It is either a
+ TYPE_DECL node, for types that are typedefs, or an IDENTIFIER_NODE
+ in the case of structs, unions or enums that are known with a tag,
+ or zero for types that have no special name.
+ The TYPE_CONTEXT for any sort of type which could have a name or
+ which could have named members (e.g. tagged types in C/C++) will
+ point to the node which represents the scope of the given type, or
+ will be NULL_TREE if the type has "file scope". For most types, this
+ will point to a BLOCK node or a FUNCTION_DECL node, but it could also
+ point to a FUNCTION_TYPE node (for types whose scope is limited to the
+ formal parameter list of some function type specification) or it
+ could point to a RECORD_TYPE, UNION_TYPE or QUAL_UNION_TYPE node
+ (for C++ "member" types).
+ For non-tagged-types, TYPE_CONTEXT need not be set to anything in
+ particular, since any type which is of some type category (e.g.
+ an array type or a function type) which cannot either have a name
+ itself or have named members doesn't really have a "scope" per se.
+ The TREE_CHAIN field is used as a forward-references to names for
+ ENUMERAL_TYPE, RECORD_TYPE, UNION_TYPE, and QUAL_UNION_TYPE nodes;
+ see below. */
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. OFFSET_TYPE, ENUMERAL_TYPE, BOOLEAN_TYPE, INTEGER_TYPE,
+ REAL_TYPE, POINTER_TYPE. */
+
+/* An offset is a pointer relative to an object.
+ The TREE_TYPE field is the type of the object at the offset.
+ The TYPE_OFFSET_BASETYPE points to the node for the type of object
+ that the offset is relative to. */
+DEFTREECODE (OFFSET_TYPE, "offset_type", tcc_type, 0)
+
+/* C enums. The type node looks just like an INTEGER_TYPE node.
+ The symbols for the values of the enum type are defined by
+ CONST_DECL nodes, but the type does not point to them;
+ however, the TYPE_VALUES is a list in which each element's TREE_PURPOSE
+ is a name and the TREE_VALUE is the value (an INTEGER_CST node). */
+/* A forward reference `enum foo' when no enum named foo is defined yet
+ has zero (a null pointer) in its TYPE_SIZE. The tag name is in
+ the TYPE_NAME field. If the type is later defined, the normal
+ fields are filled in.
+ RECORD_TYPE, UNION_TYPE, and QUAL_UNION_TYPE forward refs are
+ treated similarly. */
+DEFTREECODE (ENUMERAL_TYPE, "enumeral_type", tcc_type, 0)
+
+/* Boolean type (true or false are the only values). Looks like an
+ INTEGRAL_TYPE. */
+DEFTREECODE (BOOLEAN_TYPE, "boolean_type", tcc_type, 0)
+
+/* Integer types in all languages, including char in C.
+ Also used for sub-ranges of other discrete types.
+ Has components TYPE_MIN_VALUE, TYPE_MAX_VALUE (expressions, inclusive)
+ and TYPE_PRECISION (number of bits used by this type).
+ In the case of a subrange type in Pascal, the TREE_TYPE
+ of this will point at the supertype (another INTEGER_TYPE,
+ or an ENUMERAL_TYPE or BOOLEAN_TYPE).
+ Otherwise, the TREE_TYPE is zero. */
+DEFTREECODE (INTEGER_TYPE, "integer_type", tcc_type, 0)
+
+/* C's float and double. Different floating types are distinguished
+ by machine mode and by the TYPE_SIZE and the TYPE_PRECISION. */
+DEFTREECODE (REAL_TYPE, "real_type", tcc_type, 0)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. POINTER_TYPE, REFERENCE_TYPE. Note that this range
+ overlaps the previous range of ordered types. */
+
+/* All pointer-to-x types have code POINTER_TYPE.
+ The TREE_TYPE points to the node for the type pointed to. */
+DEFTREECODE (POINTER_TYPE, "pointer_type", tcc_type, 0)
+
+/* _Fract and _Accum types in Embedded-C. Different fixed-point types
+ are distinguished by machine mode and by the TYPE_SIZE and the
+ TYPE_PRECISION. */
+DEFTREECODE (FIXED_POINT_TYPE, "fixed_point_type", tcc_type, 0)
+
+/* A reference is like a pointer except that it is coerced
+ automatically to the value it points to. Used in C++. */
+DEFTREECODE (REFERENCE_TYPE, "reference_type", tcc_type, 0)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. COMPLEX_TYPE, VECTOR_TYPE, ARRAY_TYPE. */
+
+/* Complex number types. The TREE_TYPE field is the data type
+ of the real and imaginary parts. It must be of scalar
+ arithmetic type, not including pointer type. */
+DEFTREECODE (COMPLEX_TYPE, "complex_type", tcc_type, 0)
+
+/* Vector types. The TREE_TYPE field is the data type of the vector
+ elements. The TYPE_PRECISION field is the number of subparts of
+ the vector. */
+DEFTREECODE (VECTOR_TYPE, "vector_type", tcc_type, 0)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. ARRAY_TYPE, RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE.
+ Note that this range overlaps the previous range. */
+
+/* Types of arrays. Special fields:
+ TREE_TYPE Type of an array element.
+ TYPE_DOMAIN Type to index by.
+ Its range of values specifies the array length.
+ The field TYPE_POINTER_TO (TREE_TYPE (array_type)) is always nonzero
+ and holds the type to coerce a value of that array type to in C.
+ TYPE_STRING_FLAG indicates a string (in contrast to an array of chars)
+ in languages (such as Chill) that make a distinction. */
+/* Array types in C or Pascal */
+DEFTREECODE (ARRAY_TYPE, "array_type", tcc_type, 0)
+
+/* Struct in C, or record in Pascal. */
+/* Special fields:
+ TYPE_FIELDS chain of FIELD_DECLs for the fields of the struct,
+ and VAR_DECLs, TYPE_DECLs and CONST_DECLs for record-scope variables,
+ types and enumerators.
+ A few may need to be added for Pascal. */
+/* See the comment above, before ENUMERAL_TYPE, for how
+ forward references to struct tags are handled in C. */
+DEFTREECODE (RECORD_TYPE, "record_type", tcc_type, 0)
+
+/* Union in C. Like a struct, except that the offsets of the fields
+ will all be zero. */
+/* See the comment above, before ENUMERAL_TYPE, for how
+ forward references to union tags are handled in C. */
+DEFTREECODE (UNION_TYPE, "union_type", tcc_type, 0) /* C union type */
+
+/* Similar to UNION_TYPE, except that the expressions in DECL_QUALIFIER
+ in each FIELD_DECL determine what the union contains. The first
+ field whose DECL_QUALIFIER expression is true is deemed to occupy
+ the union. */
+DEFTREECODE (QUAL_UNION_TYPE, "qual_union_type", tcc_type, 0)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. VOID_TYPE, FUNCTION_TYPE, METHOD_TYPE. */
+
+/* The void type in C */
+DEFTREECODE (VOID_TYPE, "void_type", tcc_type, 0)
+
+/* Type of functions. Special fields:
+ TREE_TYPE type of value returned.
+ TYPE_ARG_TYPES list of types of arguments expected.
+ this list is made of TREE_LIST nodes.
+ Types of "Procedures" in languages where they are different from functions
+ have code FUNCTION_TYPE also, but then TREE_TYPE is zero or void type. */
+DEFTREECODE (FUNCTION_TYPE, "function_type", tcc_type, 0)
+
+/* METHOD_TYPE is the type of a function which takes an extra first
+ argument for "self", which is not present in the declared argument list.
+ The TREE_TYPE is the return type of the method. The TYPE_METHOD_BASETYPE
+ is the type of "self". TYPE_ARG_TYPES is the real argument list, which
+ includes the hidden argument for "self". */
+DEFTREECODE (METHOD_TYPE, "method_type", tcc_type, 0)
+
+/* This is a language-specific kind of type.
+ Its meaning is defined by the language front end.
+ layout_type does not know how to lay this out,
+ so the front-end must do so manually. */
+DEFTREECODE (LANG_TYPE, "lang_type", tcc_type, 0)
+
+/* Expressions */
+
+/* First, the constants. */
+
+/* Contents are in TREE_INT_CST_LOW and TREE_INT_CST_HIGH fields,
+ 32 bits each, giving us a 64 bit constant capability. INTEGER_CST
+ nodes can be shared, and therefore should be considered read only.
+ They should be copied, before setting a flag such as
+ TREE_OVERFLOW. If an INTEGER_CST has TREE_OVERFLOW or
+ TREE_CONSTANT_OVERFLOW already set, it is known to be unique.
+ INTEGER_CST nodes are created for the integral types, for pointer
+ types and for vector and float types in some circumstances. */
+DEFTREECODE (INTEGER_CST, "integer_cst", tcc_constant, 0)
+
+/* Contents are in TREE_REAL_CST field. */
+DEFTREECODE (REAL_CST, "real_cst", tcc_constant, 0)
+
+/* Contents are in TREE_FIXED_CST field. */
+DEFTREECODE (FIXED_CST, "fixed_cst", tcc_constant, 0)
+
+/* Contents are in TREE_REALPART and TREE_IMAGPART fields,
+ whose contents are other constant nodes. */
+DEFTREECODE (COMPLEX_CST, "complex_cst", tcc_constant, 0)
+
+/* Contents are in TREE_VECTOR_CST_ELTS field. */
+DEFTREECODE (VECTOR_CST, "vector_cst", tcc_constant, 0)
+
+/* Contents are TREE_STRING_LENGTH and the actual contents of the string. */
+DEFTREECODE (STRING_CST, "string_cst", tcc_constant, 0)
+
+/* Declarations. All references to names are represented as ..._DECL
+ nodes. The decls in one binding context are chained through the
+ TREE_CHAIN field. Each DECL has a DECL_NAME field which contains
+ an IDENTIFIER_NODE. (Some decls, most often labels, may have zero
+ as the DECL_NAME). DECL_CONTEXT points to the node representing
+ the context in which this declaration has its scope. For
+ FIELD_DECLs, this is the RECORD_TYPE, UNION_TYPE, or
+ QUAL_UNION_TYPE node that the field is a member of. For VAR_DECL,
+ PARM_DECL, FUNCTION_DECL, LABEL_DECL, and CONST_DECL nodes, this
+ points to either the FUNCTION_DECL for the containing function, the
+ RECORD_TYPE or UNION_TYPE for the containing type, or NULL_TREE or
+ a TRANSLATION_UNIT_DECL if the given decl has "file scope".
+ DECL_ABSTRACT_ORIGIN, if non-NULL, points to the original (abstract)
+ ..._DECL node of which this decl is an (inlined or template expanded)
+ instance.
+ The TREE_TYPE field holds the data type of the object, when relevant.
+ LABEL_DECLs have no data type. For TYPE_DECL, the TREE_TYPE field
+ contents are the type whose name is being declared.
+ The DECL_ALIGN, DECL_SIZE,
+ and DECL_MODE fields exist in decl nodes just as in type nodes.
+ They are unused in LABEL_DECL, TYPE_DECL and CONST_DECL nodes.
+
+ DECL_FIELD_BIT_OFFSET holds an integer number of bits offset for
+ the location. DECL_VOFFSET holds an expression for a variable
+ offset; it is to be multiplied by DECL_VOFFSET_UNIT (an integer).
+ These fields are relevant only in FIELD_DECLs and PARM_DECLs.
+
+ DECL_INITIAL holds the value to initialize a variable to,
+ or the value of a constant. For a function, it holds the body
+ (a node of type BLOCK representing the function's binding contour
+ and whose body contains the function's statements.) For a LABEL_DECL
+ in C, it is a flag, nonzero if the label's definition has been seen.
+
+ PARM_DECLs use a special field:
+ DECL_ARG_TYPE is the type in which the argument is actually
+ passed, which may be different from its type within the function.
+
+ FUNCTION_DECLs use four special fields:
+ DECL_ARGUMENTS holds a chain of PARM_DECL nodes for the arguments.
+ DECL_RESULT holds a RESULT_DECL node for the value of a function.
+ The DECL_RTL field is 0 for a function that returns no value.
+ (C functions returning void have zero here.)
+ The TREE_TYPE field is the type in which the result is actually
+ returned. This is usually the same as the return type of the
+ FUNCTION_DECL, but it may be a wider integer type because of
+ promotion.
+ DECL_FUNCTION_CODE is a code number that is nonzero for
+ built-in functions. Its value is an enum built_in_function
+ that says which built-in function it is.
+
+ DECL_SOURCE_FILE holds a filename string and DECL_SOURCE_LINE
+ holds a line number. In some cases these can be the location of
+ a reference, if no definition has been seen.
+
+ DECL_ABSTRACT is nonzero if the decl represents an abstract instance
+ of a decl (i.e. one which is nested within an abstract instance of a
+ inline function. */
+
+DEFTREECODE (FUNCTION_DECL, "function_decl", tcc_declaration, 0)
+DEFTREECODE (LABEL_DECL, "label_decl", tcc_declaration, 0)
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. FIELD_DECL, VAR_DECL, CONST_DECL, PARM_DECL,
+ TYPE_DECL. */
+DEFTREECODE (FIELD_DECL, "field_decl", tcc_declaration, 0)
+DEFTREECODE (VAR_DECL, "var_decl", tcc_declaration, 0)
+DEFTREECODE (CONST_DECL, "const_decl", tcc_declaration, 0)
+DEFTREECODE (PARM_DECL, "parm_decl", tcc_declaration, 0)
+DEFTREECODE (TYPE_DECL, "type_decl", tcc_declaration, 0)
+DEFTREECODE (RESULT_DECL, "result_decl", tcc_declaration, 0)
+
+/* Memory tags used in tree-ssa to represent memory locations in
+ virtual SSA. */
+DEFTREECODE (NAME_MEMORY_TAG, "name_memory_tag", tcc_declaration, 0)
+DEFTREECODE (SYMBOL_MEMORY_TAG, "symbol_memory_tag", tcc_declaration, 0)
+DEFTREECODE (MEMORY_PARTITION_TAG, "memory_partition_tag", tcc_declaration, 0)
+
+/* A namespace declaration. Namespaces appear in DECL_CONTEXT of other
+ _DECLs, providing a hierarchy of names. */
+DEFTREECODE (NAMESPACE_DECL, "namespace_decl", tcc_declaration, 0)
+
+/* A declaration import.
+ The C++ FE uses this to represent a using-directive; eg:
+ "using namespace foo".
+ But it could be used to represent any declaration import construct.
+ Whenever a declaration import appears in a lexical block, the BLOCK node
+ representing that lexical block in GIMPLE will contain an IMPORTED_DECL
+ node, linked via BLOCK_VARS accessor of the said BLOCK.
+ For a given NODE which code is IMPORTED_DECL,
+ IMPORTED_DECL_ASSOCIATED_DECL (NODE) accesses the imported declaration. */
+DEFTREECODE (IMPORTED_DECL, "imported_decl", tcc_declaration, 0)
+
+/* A translation unit. This is not technically a declaration, since it
+ can't be looked up, but it's close enough. */
+DEFTREECODE (TRANSLATION_UNIT_DECL, "translation_unit_decl",\
+ tcc_declaration, 0)
+
+/* References to storage. */
+
+/* Value is structure or union component.
+ Operand 0 is the structure or union (an expression).
+ Operand 1 is the field (a node of type FIELD_DECL).
+ Operand 2, if present, is the value of DECL_FIELD_OFFSET, measured
+ in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. */
+DEFTREECODE (COMPONENT_REF, "component_ref", tcc_reference, 3)
+
+/* Reference to a group of bits within an object. Similar to COMPONENT_REF
+ except the position is given explicitly rather than via a FIELD_DECL.
+ Operand 0 is the structure or union expression;
+ operand 1 is a tree giving the constant number of bits being referenced;
+ operand 2 is a tree giving the constant position of the first referenced bit.
+ The result type width has to match the number of bits referenced.
+ If the result type is integral, its signedness specifies how it is extended
+ to its mode width. */
+DEFTREECODE (BIT_FIELD_REF, "bit_field_ref", tcc_reference, 3)
+
+/* The ordering of the following codes is optimized for the checking
+ macros in tree.h. Changing the order will degrade the speed of the
+ compiler. INDIRECT_REF, ALIGN_INDIRECT_REF, MISALIGNED_INDIRECT_REF. */
+
+/* C unary `*' or Pascal `^'. One operand, an expression for a pointer. */
+DEFTREECODE (INDIRECT_REF, "indirect_ref", tcc_reference, 1)
+
+/* Like above, but aligns the referenced address (i.e, if the address
+ in P is not aligned on TYPE_ALIGN boundary, then &(*P) != P). */
+DEFTREECODE (ALIGN_INDIRECT_REF, "align_indirect_ref", tcc_reference, 1)
+
+/* Same as INDIRECT_REF, but also specifies the alignment of the referenced
+ address:
+ Operand 0 is the referenced address (a pointer);
+ Operand 1 is an INTEGER_CST which represents the alignment of the address,
+ or 0 if the alignment is unknown. */
+DEFTREECODE (MISALIGNED_INDIRECT_REF, "misaligned_indirect_ref", tcc_reference, 2)
+
+/* Array indexing.
+ Operand 0 is the array; operand 1 is a (single) array index.
+ Operand 2, if present, is a copy of TYPE_MIN_VALUE of the index.
+ Operand 3, if present, is the element size, measured in units of
+ the alignment of the element type. */
+DEFTREECODE (ARRAY_REF, "array_ref", tcc_reference, 4)
+
+/* Likewise, except that the result is a range ("slice") of the array. The
+ starting index of the resulting array is taken from operand 1 and the size
+ of the range is taken from the type of the expression. */
+DEFTREECODE (ARRAY_RANGE_REF, "array_range_ref", tcc_reference, 4)
+
+/* Used to represent lookup of runtime type dependent data. Often this is
+ a reference to a vtable, but it needn't be. Operands are:
+ OBJ_TYPE_REF_EXPR: An expression that evaluates the value to use.
+ OBJ_TYPE_REF_OBJECT: Is the object on whose behalf the lookup is
+ being performed. Through this the optimizers may be able to statically
+ determine the dynamic type of the object.
+ OBJ_TYPE_REF_TOKEN: Something front-end specific used to resolve the
+ reference to something simpler, usually to the address of a DECL.
+ Never touched by the middle-end. Good choices would be either an
+ identifier or a vtable index. */
+DEFTREECODE (OBJ_TYPE_REF, "obj_type_ref", tcc_expression, 3)
+
+/* The exception object from the runtime. */
+DEFTREECODE (EXC_PTR_EXPR, "exc_ptr_expr", tcc_expression, 0)
+
+/* The filter object from the runtime. */
+DEFTREECODE (FILTER_EXPR, "filter_expr", tcc_expression, 0)
+
+/* Constructor: return an aggregate value made from specified components.
+ In C, this is used only for structure and array initializers.
+ The operand is a sequence of component values made out of a VEC of
+ struct constructor_elt.
+
+ For ARRAY_TYPE:
+ The field INDEX of each constructor_elt is the corresponding index.
+ If the index is a RANGE_EXPR, it is a short-hand for many nodes,
+ one for each index in the range. (If the corresponding field VALUE
+ has side-effects, they are evaluated once for each element. Wrap the
+ value in a SAVE_EXPR if you want to evaluate side effects only once.)
+
+ For RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE:
+ The field INDEX of each node is a FIELD_DECL. */
+DEFTREECODE (CONSTRUCTOR, "constructor", tcc_exceptional, 0)
+
+/* The expression types are mostly straightforward, with the fourth argument
+ of DEFTREECODE saying how many operands there are.
+ Unless otherwise specified, the operands are expressions and the
+ types of all the operands and the expression must all be the same. */
+
+/* Contains two expressions to compute, one followed by the other.
+ the first value is ignored. The second one's value is used. The
+ type of the first expression need not agree with the other types. */
+DEFTREECODE (COMPOUND_EXPR, "compound_expr", tcc_expression, 2)
+
+/* Assignment expression. Operand 0 is the what to set; 1, the new value. */
+DEFTREECODE (MODIFY_EXPR, "modify_expr", tcc_expression, 2)
+
+/* Initialization expression. Operand 0 is the variable to initialize;
+ Operand 1 is the initializer. This differs from MODIFY_EXPR in that any
+ reference to the referent of operand 0 within operand 1 is undefined. */
+DEFTREECODE (INIT_EXPR, "init_expr", tcc_expression, 2)
+
+/* For TARGET_EXPR, operand 0 is the target of an initialization,
+ operand 1 is the initializer for the target, which may be void
+ if simply expanding it initializes the target.
+ operand 2 is the cleanup for this node, if any.
+ operand 3 is the saved initializer after this node has been
+ expanded once; this is so we can re-expand the tree later. */
+DEFTREECODE (TARGET_EXPR, "target_expr", tcc_expression, 4)
+
+/* Conditional expression ( ... ? ... : ... in C).
+ Operand 0 is the condition.
+ Operand 1 is the then-value.
+ Operand 2 is the else-value.
+ Operand 0 may be of any type.
+ Operand 1 must have the same type as the entire expression, unless
+ it unconditionally throws an exception, in which case it should
+ have VOID_TYPE. The same constraints apply to operand 2. The
+ condition in operand 0 must be of integral type.
+
+ In cfg gimple, if you do not have a selection expression, operands
+ 1 and 2 are NULL. The operands are then taken from the cfg edges. */
+DEFTREECODE (COND_EXPR, "cond_expr", tcc_expression, 3)
+
+/* Vector conditional expression. It is like COND_EXPR, but with
+ vector operands.
+
+ A = VEC_COND_EXPR ( X < Y, B, C)
+
+ means
+
+ for (i=0; i<N; i++)
+ A[i] = X[i] < Y[i] ? B[i] : C[i];
+*/
+DEFTREECODE (VEC_COND_EXPR, "vec_cond_expr", tcc_expression, 3)
+
+/* Declare local variables, including making RTL and allocating space.
+ BIND_EXPR_VARS is a chain of VAR_DECL nodes for the variables.
+ BIND_EXPR_BODY is the body, the expression to be computed using
+ the variables. The value of operand 1 becomes that of the BIND_EXPR.
+ BIND_EXPR_BLOCK is the BLOCK that corresponds to these bindings
+ for debugging purposes. If this BIND_EXPR is actually expanded,
+ that sets the TREE_USED flag in the BLOCK.
+
+ The BIND_EXPR is not responsible for informing parsers
+ about these variables. If the body is coming from the input file,
+ then the code that creates the BIND_EXPR is also responsible for
+ informing the parser of the variables.
+
+ If the BIND_EXPR is ever expanded, its TREE_USED flag is set.
+ This tells the code for debugging symbol tables not to ignore the BIND_EXPR.
+ If the BIND_EXPR should be output for debugging but will not be expanded,
+ set the TREE_USED flag by hand.
+
+ In order for the BIND_EXPR to be known at all, the code that creates it
+ must also install it as a subblock in the tree of BLOCK
+ nodes for the function. */
+DEFTREECODE (BIND_EXPR, "bind_expr", tcc_expression, 3)
+
+/* Function call. CALL_EXPRs are represented by variably-sized expression
+ nodes. There are at least three fixed operands. Operand 0 is an
+ INTEGER_CST node containing the total operand count, the number of
+ arguments plus 3. Operand 1 is the function, while operand 2 is
+ is static chain argument, or NULL. The remaining operands are the
+ arguments to the call. */
+DEFTREECODE (CALL_EXPR, "call_expr", tcc_vl_exp, 3)
+
+/* Specify a value to compute along with its corresponding cleanup.
+ Operand 0 is the cleanup expression.
+ The cleanup is executed by the first enclosing CLEANUP_POINT_EXPR,
+ which must exist. This differs from TRY_CATCH_EXPR in that operand 1
+ is always evaluated when cleanups are run. */
+DEFTREECODE (WITH_CLEANUP_EXPR, "with_cleanup_expr", tcc_expression, 1)
+
+/* Specify a cleanup point.
+ Operand 0 is an expression that may have cleanups. If it does, those
+ cleanups are executed after the expression is expanded.
+
+ Note that if the expression is a reference to storage, it is forced out
+ of memory before the cleanups are run. This is necessary to handle
+ cases where the cleanups modify the storage referenced; in the
+ expression 't.i', if 't' is a struct with an integer member 'i' and a
+ cleanup which modifies 'i', the value of the expression depends on
+ whether the cleanup is run before or after 't.i' is evaluated. When
+ expand_expr is run on 't.i', it returns a MEM. This is not good enough;
+ the value of 't.i' must be forced out of memory.
+
+ As a consequence, the operand of a CLEANUP_POINT_EXPR must not have
+ BLKmode, because it will not be forced out of memory. */
+DEFTREECODE (CLEANUP_POINT_EXPR, "cleanup_point_expr", tcc_expression, 1)
+
+/* The following two codes are used in languages that have types where
+ some field in an object of the type contains a value that is used in
+ the computation of another field's offset or size and/or the size of
+ the type. The positions and/or sizes of fields can vary from object
+ to object of the same type or even for one and the same object within
+ its scope.
+
+ Record types with discriminants in Ada or schema types in Pascal are
+ examples of such types. This mechanism is also used to create "fat
+ pointers" for unconstrained array types in Ada; the fat pointer is a
+ structure one of whose fields is a pointer to the actual array type
+ and the other field is a pointer to a template, which is a structure
+ containing the bounds of the array. The bounds in the type pointed
+ to by the first field in the fat pointer refer to the values in the
+ template.
+
+ When you wish to construct such a type you need "self-references"
+ that allow you to reference the object having this type from the
+ TYPE node, i.e. without having a variable instantiating this type.
+
+ Such a "self-references" is done using a PLACEHOLDER_EXPR. This is
+ a node that will later be replaced with the object being referenced.
+ Its type is that of the object and selects which object to use from
+ a chain of references (see below). No other slots are used in the
+ PLACEHOLDER_EXPR.
+
+ For example, if your type FOO is a RECORD_TYPE with a field BAR,
+ and you need the value of <variable>.BAR to calculate TYPE_SIZE
+ (FOO), just substitute <variable> above with a PLACEHOLDER_EXPR
+ whose TREE_TYPE is FOO. Then construct your COMPONENT_REF with
+ the PLACEHOLDER_EXPR as the first operand (which has the correct
+ type). Later, when the size is needed in the program, the back-end
+ will find this PLACEHOLDER_EXPR and generate code to calculate the
+ actual size at run-time. In the following, we describe how this
+ calculation is done.
+
+ When we wish to evaluate a size or offset, we check whether it contains a
+ PLACEHOLDER_EXPR. If it does, we call substitute_placeholder_in_expr
+ passing both that tree and an expression within which the object may be
+ found. The latter expression is the object itself in the simple case of
+ an Ada record with discriminant, but it can be the array in the case of an
+ unconstrained array.
+
+ In the latter case, we need the fat pointer, because the bounds of
+ the array can only be accessed from it. However, we rely here on the
+ fact that the expression for the array contains the dereference of
+ the fat pointer that obtained the array pointer. */
+
+/* Denotes a record to later be substituted before evaluating this expression.
+ The type of this expression is used to find the record to replace it. */
+DEFTREECODE (PLACEHOLDER_EXPR, "placeholder_expr", tcc_exceptional, 0)
+
+/* Simple arithmetic. */
+DEFTREECODE (PLUS_EXPR, "plus_expr", tcc_binary, 2)
+DEFTREECODE (MINUS_EXPR, "minus_expr", tcc_binary, 2)
+DEFTREECODE (MULT_EXPR, "mult_expr", tcc_binary, 2)
+
+/* Pointer addition. The first operand is always a pointer and the
+ second operand is an integer of type sizetype. */
+DEFTREECODE (POINTER_PLUS_EXPR, "pointer_plus_expr", tcc_binary, 2)
+
+/* Division for integer result that rounds the quotient toward zero. */
+DEFTREECODE (TRUNC_DIV_EXPR, "trunc_div_expr", tcc_binary, 2)
+
+/* Division for integer result that rounds the quotient toward infinity. */
+DEFTREECODE (CEIL_DIV_EXPR, "ceil_div_expr", tcc_binary, 2)
+
+/* Division for integer result that rounds toward minus infinity. */
+DEFTREECODE (FLOOR_DIV_EXPR, "floor_div_expr", tcc_binary, 2)
+
+/* Division for integer result that rounds toward nearest integer. */
+DEFTREECODE (ROUND_DIV_EXPR, "round_div_expr", tcc_binary, 2)
+
+/* Four kinds of remainder that go with the four kinds of division. */
+DEFTREECODE (TRUNC_MOD_EXPR, "trunc_mod_expr", tcc_binary, 2)
+DEFTREECODE (CEIL_MOD_EXPR, "ceil_mod_expr", tcc_binary, 2)
+DEFTREECODE (FLOOR_MOD_EXPR, "floor_mod_expr", tcc_binary, 2)
+DEFTREECODE (ROUND_MOD_EXPR, "round_mod_expr", tcc_binary, 2)
+
+/* Division for real result. */
+DEFTREECODE (RDIV_EXPR, "rdiv_expr", tcc_binary, 2)
+
+/* Division which is not supposed to need rounding.
+ Used for pointer subtraction in C. */
+DEFTREECODE (EXACT_DIV_EXPR, "exact_div_expr", tcc_binary, 2)
+
+/* Conversion of real to fixed point by truncation. */
+DEFTREECODE (FIX_TRUNC_EXPR, "fix_trunc_expr", tcc_unary, 1)
+
+/* Conversion of an integer to a real. */
+DEFTREECODE (FLOAT_EXPR, "float_expr", tcc_unary, 1)
+
+/* Unary negation. */
+DEFTREECODE (NEGATE_EXPR, "negate_expr", tcc_unary, 1)
+
+/* Minimum and maximum values. When used with floating point, if both
+ operands are zeros, or if either operand is NaN, then it is unspecified
+ which of the two operands is returned as the result. */
+DEFTREECODE (MIN_EXPR, "min_expr", tcc_binary, 2)
+DEFTREECODE (MAX_EXPR, "max_expr", tcc_binary, 2)
+
+/* Represents the absolute value of the operand.
+
+ An ABS_EXPR must have either an INTEGER_TYPE or a REAL_TYPE. The
+ operand of the ABS_EXPR must have the same type. */
+DEFTREECODE (ABS_EXPR, "abs_expr", tcc_unary, 1)
+
+/* Shift operations for shift and rotate.
+ Shift means logical shift if done on an
+ unsigned type, arithmetic shift if done on a signed type.
+ The second operand is the number of bits to
+ shift by; it need not be the same type as the first operand and result.
+ Note that the result is undefined if the second operand is larger
+ than or equal to the first operand's type size.
+
+ The first operand of a shift can have either an integer or a
+ (non-integer) fixed-point type. We follow the ISO/IEC TR 18037:2004
+ semantics for the latter.
+
+ Rotates are defined for integer types only. */
+DEFTREECODE (LSHIFT_EXPR, "lshift_expr", tcc_binary, 2)
+DEFTREECODE (RSHIFT_EXPR, "rshift_expr", tcc_binary, 2)
+DEFTREECODE (LROTATE_EXPR, "lrotate_expr", tcc_binary, 2)
+DEFTREECODE (RROTATE_EXPR, "rrotate_expr", tcc_binary, 2)
+
+/* Bitwise operations. Operands have same mode as result. */
+DEFTREECODE (BIT_IOR_EXPR, "bit_ior_expr", tcc_binary, 2)
+DEFTREECODE (BIT_XOR_EXPR, "bit_xor_expr", tcc_binary, 2)
+DEFTREECODE (BIT_AND_EXPR, "bit_and_expr", tcc_binary, 2)
+DEFTREECODE (BIT_NOT_EXPR, "bit_not_expr", tcc_unary, 1)
+
+/* ANDIF and ORIF allow the second operand not to be computed if the
+ value of the expression is determined from the first operand. AND,
+ OR, and XOR always compute the second operand whether its value is
+ needed or not (for side effects). The operand may have
+ BOOLEAN_TYPE or INTEGER_TYPE. In either case, the argument will be
+ either zero or one. For example, a TRUTH_NOT_EXPR will never have
+ an INTEGER_TYPE VAR_DECL as its argument; instead, a NE_EXPR will be
+ used to compare the VAR_DECL to zero, thereby obtaining a node with
+ value zero or one. */
+DEFTREECODE (TRUTH_ANDIF_EXPR, "truth_andif_expr", tcc_expression, 2)
+DEFTREECODE (TRUTH_ORIF_EXPR, "truth_orif_expr", tcc_expression, 2)
+DEFTREECODE (TRUTH_AND_EXPR, "truth_and_expr", tcc_expression, 2)
+DEFTREECODE (TRUTH_OR_EXPR, "truth_or_expr", tcc_expression, 2)
+DEFTREECODE (TRUTH_XOR_EXPR, "truth_xor_expr", tcc_expression, 2)
+DEFTREECODE (TRUTH_NOT_EXPR, "truth_not_expr", tcc_expression, 1)
+
+/* Relational operators.
+ `EQ_EXPR' and `NE_EXPR' are allowed for any types.
+ The others are allowed only for integer (or pointer or enumeral)
+ or real types.
+ In all cases the operands will have the same type,
+ and the value is always the type used by the language for booleans. */
+DEFTREECODE (LT_EXPR, "lt_expr", tcc_comparison, 2)
+DEFTREECODE (LE_EXPR, "le_expr", tcc_comparison, 2)
+DEFTREECODE (GT_EXPR, "gt_expr", tcc_comparison, 2)
+DEFTREECODE (GE_EXPR, "ge_expr", tcc_comparison, 2)
+DEFTREECODE (EQ_EXPR, "eq_expr", tcc_comparison, 2)
+DEFTREECODE (NE_EXPR, "ne_expr", tcc_comparison, 2)
+
+/* Additional relational operators for floating point unordered. */
+DEFTREECODE (UNORDERED_EXPR, "unordered_expr", tcc_comparison, 2)
+DEFTREECODE (ORDERED_EXPR, "ordered_expr", tcc_comparison, 2)
+
+/* These are equivalent to unordered or ... */
+DEFTREECODE (UNLT_EXPR, "unlt_expr", tcc_comparison, 2)
+DEFTREECODE (UNLE_EXPR, "unle_expr", tcc_comparison, 2)
+DEFTREECODE (UNGT_EXPR, "ungt_expr", tcc_comparison, 2)
+DEFTREECODE (UNGE_EXPR, "unge_expr", tcc_comparison, 2)
+DEFTREECODE (UNEQ_EXPR, "uneq_expr", tcc_comparison, 2)
+
+/* This is the reverse of uneq_expr. */
+DEFTREECODE (LTGT_EXPR, "ltgt_expr", tcc_comparison, 2)
+
+DEFTREECODE (RANGE_EXPR, "range_expr", tcc_binary, 2)
+
+/* Represents a re-association barrier for floating point expressions
+ like explicit parenthesis in fortran. */
+DEFTREECODE (PAREN_EXPR, "paren_expr", tcc_unary, 1)
+
+/* Represents a conversion of type of a value.
+ All conversions, including implicit ones, must be
+ represented by CONVERT_EXPR or NOP_EXPR nodes. */
+DEFTREECODE (CONVERT_EXPR, "convert_expr", tcc_unary, 1)
+
+/* Conversion of a fixed-point value to an integer, a real, or a fixed-point
+ value. Or conversion of a fixed-point value from an integer, a real, or
+ a fixed-point value. */
+DEFTREECODE (FIXED_CONVERT_EXPR, "fixed_convert_expr", tcc_unary, 1)
+
+/* Represents a conversion expected to require no code to be generated. */
+DEFTREECODE (NOP_EXPR, "nop_expr", tcc_unary, 1)
+
+/* Value is same as argument, but guaranteed not an lvalue. */
+DEFTREECODE (NON_LVALUE_EXPR, "non_lvalue_expr", tcc_unary, 1)
+
+/* Represents viewing something of one type as being of a second type.
+ This corresponds to an "Unchecked Conversion" in Ada and roughly to
+ the idiom *(type2 *)&X in C. The only operand is the value to be
+ viewed as being of another type. It is undefined if the type of the
+ input and of the expression have different sizes.
+
+ This code may also be used within the LHS of a MODIFY_EXPR, in which
+ case no actual data motion may occur. TREE_ADDRESSABLE will be set in
+ this case and GCC must abort if it could not do the operation without
+ generating insns. */
+DEFTREECODE (VIEW_CONVERT_EXPR, "view_convert_expr", tcc_reference, 1)
+
+/* Represents something we computed once and will use multiple times.
+ First operand is that expression. After it is evaluated once, it
+ will be replaced by the temporary variable that holds the value. */
+DEFTREECODE (SAVE_EXPR, "save_expr", tcc_expression, 1)
+
+/* & in C. Value is the address at which the operand's value resides.
+ Operand may have any mode. Result mode is Pmode. */
+DEFTREECODE (ADDR_EXPR, "addr_expr", tcc_expression, 1)
+
+/* Operand0 is a function constant; result is part N of a function
+ descriptor of type ptr_mode. */
+DEFTREECODE (FDESC_EXPR, "fdesc_expr", tcc_expression, 2)
+
+/* Given two real or integer operands of the same type,
+ returns a complex value of the corresponding complex type. */
+DEFTREECODE (COMPLEX_EXPR, "complex_expr", tcc_binary, 2)
+
+/* Complex conjugate of operand. Used only on complex types. */
+DEFTREECODE (CONJ_EXPR, "conj_expr", tcc_unary, 1)
+
+/* Used only on an operand of complex type, these return
+ a value of the corresponding component type. */
+DEFTREECODE (REALPART_EXPR, "realpart_expr", tcc_reference, 1)
+DEFTREECODE (IMAGPART_EXPR, "imagpart_expr", tcc_reference, 1)
+
+/* Nodes for ++ and -- in C.
+ The second arg is how much to increment or decrement by.
+ For a pointer, it would be the size of the object pointed to. */
+DEFTREECODE (PREDECREMENT_EXPR, "predecrement_expr", tcc_expression, 2)
+DEFTREECODE (PREINCREMENT_EXPR, "preincrement_expr", tcc_expression, 2)
+DEFTREECODE (POSTDECREMENT_EXPR, "postdecrement_expr", tcc_expression, 2)
+DEFTREECODE (POSTINCREMENT_EXPR, "postincrement_expr", tcc_expression, 2)
+
+/* Used to implement `va_arg'. */
+DEFTREECODE (VA_ARG_EXPR, "va_arg_expr", tcc_expression, 1)
+
+/* Evaluate operand 1. If and only if an exception is thrown during
+ the evaluation of operand 1, evaluate operand 2.
+
+ This differs from TRY_FINALLY_EXPR in that operand 2 is not evaluated
+ on a normal or jump exit, only on an exception. */
+DEFTREECODE (TRY_CATCH_EXPR, "try_catch_expr", tcc_statement, 2)
+
+/* Evaluate the first operand.
+ The second operand is a cleanup expression which is evaluated
+ on any exit (normal, exception, or jump out) from this expression. */
+DEFTREECODE (TRY_FINALLY_EXPR, "try_finally", tcc_statement, 2)
+
+/* These types of expressions have no useful value,
+ and always have side effects. */
+
+/* Used to represent a local declaration. The operand is DECL_EXPR_DECL. */
+DEFTREECODE (DECL_EXPR, "decl_expr", tcc_statement, 1)
+
+/* A label definition, encapsulated as a statement.
+ Operand 0 is the LABEL_DECL node for the label that appears here.
+ The type should be void and the value should be ignored. */
+DEFTREECODE (LABEL_EXPR, "label_expr", tcc_statement, 1)
+
+/* GOTO. Operand 0 is a LABEL_DECL node or an expression.
+ The type should be void and the value should be ignored. */
+DEFTREECODE (GOTO_EXPR, "goto_expr", tcc_statement, 1)
+
+/* RETURN. Evaluates operand 0, then returns from the current function.
+ Presumably that operand is an assignment that stores into the
+ RESULT_DECL that hold the value to be returned.
+ The operand may be null.
+ The type should be void and the value should be ignored. */
+DEFTREECODE (RETURN_EXPR, "return_expr", tcc_statement, 1)
+
+/* Exit the inner most loop conditionally. Operand 0 is the condition.
+ The type should be void and the value should be ignored. */
+DEFTREECODE (EXIT_EXPR, "exit_expr", tcc_statement, 1)
+
+/* A loop. Operand 0 is the body of the loop.
+ It must contain an EXIT_EXPR or is an infinite loop.
+ The type should be void and the value should be ignored. */
+DEFTREECODE (LOOP_EXPR, "loop_expr", tcc_statement, 1)
+
+/* Switch expression.
+
+ TREE_TYPE is the original type of the condition, before any
+ language required type conversions. It may be NULL, in which case
+ the original type and final types are assumed to be the same.
+
+ Operand 0 is the expression used to perform the branch,
+ Operand 1 is the body of the switch, which probably contains
+ CASE_LABEL_EXPRs. It may also be NULL, in which case operand 2
+ must not be NULL.
+ Operand 2 is either NULL_TREE or a TREE_VEC of the CASE_LABEL_EXPRs
+ of all the cases. */
+DEFTREECODE (SWITCH_EXPR, "switch_expr", tcc_statement, 3)
+
+/* Used to represent a case label. The operands are CASE_LOW and
+ CASE_HIGH, respectively. If CASE_LOW is NULL_TREE, the label is a
+ 'default' label. If CASE_HIGH is NULL_TREE, the label is a normal case
+ label. CASE_LABEL is the corresponding LABEL_DECL. */
+DEFTREECODE (CASE_LABEL_EXPR, "case_label_expr", tcc_statement, 3)
+
+/* RESX. Resume execution after an exception. Operand 0 is a
+ number indicating the exception region that is being left. */
+DEFTREECODE (RESX_EXPR, "resx_expr", tcc_statement, 1)
+
+/* Used to represent an inline assembly statement. ASM_STRING returns a
+ STRING_CST for the instruction (e.g., "mov x, y"). ASM_OUTPUTS,
+ ASM_INPUTS, and ASM_CLOBBERS represent the outputs, inputs, and clobbers
+ for the statement. */
+DEFTREECODE (ASM_EXPR, "asm_expr", tcc_statement, 4)
+
+/* Variable references for SSA analysis. New SSA names are created every
+ time a variable is assigned a new value. The SSA builder uses SSA_NAME
+ nodes to implement SSA versioning. */
+DEFTREECODE (SSA_NAME, "ssa_name", tcc_exceptional, 0)
+
+/* Used to represent a typed exception handler. CATCH_TYPES is the type (or
+ list of types) handled, and CATCH_BODY is the code for the handler. */
+DEFTREECODE (CATCH_EXPR, "catch_expr", tcc_statement, 2)
+
+/* Used to represent an exception specification. EH_FILTER_TYPES is a list
+ of allowed types, and EH_FILTER_FAILURE is an expression to evaluate on
+ failure. EH_FILTER_MUST_NOT_THROW controls which range type to use when
+ expanding. */
+DEFTREECODE (EH_FILTER_EXPR, "eh_filter_expr", tcc_statement, 2)
+
+/* Indicates a change in the dynamic type of a memory location. This
+ has no value and generates no executable code. It is only used for
+ type based alias analysis. This is generated by C++ placement new.
+ CHANGE_DYNAMIC_TYPE_NEW_TYPE, the first operand, is the new type.
+ CHANGE_DYNAMIC_TYPE_LOCATION, the second operand, is the location
+ whose type is being changed. */
+DEFTREECODE (CHANGE_DYNAMIC_TYPE_EXPR, "change_dynamic_type_expr",
+ tcc_statement, 2)
+
+/* Node used for describing a property that is known at compile
+ time. */
+DEFTREECODE (SCEV_KNOWN, "scev_known", tcc_expression, 0)
+
+/* Node used for describing a property that is not known at compile
+ time. */
+DEFTREECODE (SCEV_NOT_KNOWN, "scev_not_known", tcc_expression, 0)
+
+/* Polynomial chains of recurrences.
+ Under the form: cr = {CHREC_LEFT (cr), +, CHREC_RIGHT (cr)}. */
+DEFTREECODE (POLYNOMIAL_CHREC, "polynomial_chrec", tcc_expression, 3)
+
+/* Used to chain children of container statements together.
+ Use the interface in tree-iterator.h to access this node. */
+DEFTREECODE (STATEMENT_LIST, "statement_list", tcc_exceptional, 0)
+
+/* Predicate assertion. Artificial expression generated by the optimizers
+ to keep track of predicate values. This expression may only appear on
+ the RHS of assignments.
+
+ Given X = ASSERT_EXPR <Y, EXPR>, the optimizers can infer
+ two things:
+
+ 1- X is a copy of Y.
+ 2- EXPR is a conditional expression and is known to be true.
+
+ Valid and to be expected forms of conditional expressions are
+ valid GIMPLE conditional expressions (as defined by is_gimple_condexpr)
+ and conditional expressions with the first operand being a
+ PLUS_EXPR with a variable possibly wrapped in a NOP_EXPR first
+ operand and an integer constant second operand.
+
+ The type of the expression is the same as Y. */
+DEFTREECODE (ASSERT_EXPR, "assert_expr", tcc_expression, 2)
+
+/* Base class information. Holds information about a class as a
+ baseclass of itself or another class. */
+DEFTREECODE (TREE_BINFO, "tree_binfo", tcc_exceptional, 0)
+
+/* Records the size for an expression of variable size type. This is
+ for use in contexts in which we are accessing the entire object,
+ such as for a function call, or block copy.
+ Operand 0 is the real expression.
+ Operand 1 is the size of the type in the expression. */
+DEFTREECODE (WITH_SIZE_EXPR, "with_size_expr", tcc_expression, 2)
+
+/* Extract elements from two input vectors Operand 0 and Operand 1
+ size VS, according to the offset OFF defined by Operand 2 as
+ follows:
+ If OFF > 0, the last VS - OFF elements of vector OP0 are concatenated to
+ the first OFF elements of the vector OP1.
+ If OFF == 0, then the returned vector is OP1.
+ On different targets OFF may take different forms; It can be an address, in
+ which case its low log2(VS)-1 bits define the offset, or it can be a mask
+ generated by the builtin targetm.vectorize.mask_for_load_builtin_decl. */
+DEFTREECODE (REALIGN_LOAD_EXPR, "realign_load", tcc_expression, 3)
+
+/* Low-level memory addressing. Operands are SYMBOL (static or global
+ variable), BASE (register), INDEX (register), STEP (integer constant),
+ OFFSET (integer constant). Corresponding address is
+ SYMBOL + BASE + STEP * INDEX + OFFSET. Only variations and values valid on
+ the target are allowed.
+
+ The type of STEP, INDEX and OFFSET is sizetype. The type of BASE is
+ sizetype or a pointer type (if SYMBOL is NULL).
+
+ The sixth argument is the reference to the original memory access, which
+ is preserved for the purposes of the RTL alias analysis. The seventh
+ argument is a tag representing results of the tree level alias analysis. */
+
+DEFTREECODE (TARGET_MEM_REF, "target_mem_ref", tcc_reference, 7)
+
+/* The ordering of the codes between OMP_PARALLEL and OMP_CRITICAL is
+ exposed to TREE_RANGE_CHECK. */
+/* OpenMP - #pragma omp parallel [clause1 ... clauseN]
+ Operand 0: OMP_PARALLEL_BODY: Code to be executed by all threads.
+ Operand 1: OMP_PARALLEL_CLAUSES: List of clauses. */
+
+DEFTREECODE (OMP_PARALLEL, "omp_parallel", tcc_statement, 2)
+
+/* OpenMP - #pragma omp task [clause1 ... clauseN]
+ Operand 0: OMP_TASK_BODY: Code to be executed by all threads.
+ Operand 1: OMP_TASK_CLAUSES: List of clauses. */
+
+DEFTREECODE (OMP_TASK, "omp_task", tcc_statement, 2)
+
+/* OpenMP - #pragma omp for [clause1 ... clauseN]
+ Operand 0: OMP_FOR_BODY: Loop body.
+ Operand 1: OMP_FOR_CLAUSES: List of clauses.
+ Operand 2: OMP_FOR_INIT: Initialization code of the form
+ VAR = N1.
+ Operand 3: OMP_FOR_COND: Loop conditional expression of the form
+ VAR { <, >, <=, >= } N2.
+ Operand 4: OMP_FOR_INCR: Loop index increment of the form
+ VAR { +=, -= } INCR.
+ Operand 5: OMP_FOR_PRE_BODY: Filled by the gimplifier with things
+ from INIT, COND, and INCR that are technically part of the
+ OMP_FOR structured block, but are evaluated before the loop
+ body begins.
+
+ VAR must be an integer or pointer variable, which is implicitly thread
+ private. N1, N2 and INCR are required to be loop invariant integer
+ expressions that are evaluated without any synchronization.
+ The evaluation order, frequency of evaluation and side-effects are
+ unspecified by the standard. */
+DEFTREECODE (OMP_FOR, "omp_for", tcc_statement, 6)
+
+/* OpenMP - #pragma omp sections [clause1 ... clauseN]
+ Operand 0: OMP_SECTIONS_BODY: Sections body.
+ Operand 1: OMP_SECTIONS_CLAUSES: List of clauses. */
+DEFTREECODE (OMP_SECTIONS, "omp_sections", tcc_statement, 2)
+
+/* OpenMP - #pragma omp single
+ Operand 0: OMP_SINGLE_BODY: Single section body.
+ Operand 1: OMP_SINGLE_CLAUSES: List of clauses. */
+DEFTREECODE (OMP_SINGLE, "omp_single", tcc_statement, 2)
+
+/* OpenMP - #pragma omp section
+ Operand 0: OMP_SECTION_BODY: Section body. */
+DEFTREECODE (OMP_SECTION, "omp_section", tcc_statement, 1)
+
+/* OpenMP - #pragma omp master
+ Operand 0: OMP_MASTER_BODY: Master section body. */
+DEFTREECODE (OMP_MASTER, "omp_master", tcc_statement, 1)
+
+/* OpenMP - #pragma omp ordered
+ Operand 0: OMP_ORDERED_BODY: Master section body. */
+DEFTREECODE (OMP_ORDERED, "omp_ordered", tcc_statement, 1)
+
+/* OpenMP - #pragma omp critical [name]
+ Operand 0: OMP_CRITICAL_BODY: Critical section body.
+ Operand 1: OMP_CRITICAL_NAME: Identifier for critical section. */
+DEFTREECODE (OMP_CRITICAL, "omp_critical", tcc_statement, 2)
+
+/* OpenMP - #pragma omp atomic
+ Operand 0: The address at which the atomic operation is to be performed.
+ This address should be stabilized with save_expr.
+ Operand 1: The expression to evaluate. When the old value of the object
+ at the address is used in the expression, it should appear as if
+ build_fold_indirect_ref of the address. */
+DEFTREECODE (OMP_ATOMIC, "omp_atomic", tcc_statement, 2)
+
+/* OpenMP clauses. */
+DEFTREECODE (OMP_CLAUSE, "omp_clause", tcc_exceptional, 0)
+
+/* Reduction operations.
+ Operations that take a vector of elements and "reduce" it to a scalar
+ result (e.g. summing the elements of the vector, finding the minimum over
+ the vector elements, etc).
+ Operand 0 is a vector; the first element in the vector has the result.
+ Operand 1 is a vector. */
+DEFTREECODE (REDUC_MAX_EXPR, "reduc_max_expr", tcc_unary, 1)
+DEFTREECODE (REDUC_MIN_EXPR, "reduc_min_expr", tcc_unary, 1)
+DEFTREECODE (REDUC_PLUS_EXPR, "reduc_plus_expr", tcc_unary, 1)
+
+/* Widening dot-product.
+ The first two arguments are of type t1.
+ The third argument and the result are of type t2, such that t2 is at least
+ twice the size of t1. DOT_PROD_EXPR(arg1,arg2,arg3) is equivalent to:
+ tmp = WIDEN_MULT_EXPR(arg1, arg2);
+ arg3 = PLUS_EXPR (tmp, arg3);
+ or:
+ tmp = WIDEN_MULT_EXPR(arg1, arg2);
+ arg3 = WIDEN_SUM_EXPR (tmp, arg3); */
+DEFTREECODE (DOT_PROD_EXPR, "dot_prod_expr", tcc_expression, 3)
+
+/* Widening summation.
+ The first argument is of type t1.
+ The second argument is of type t2, such that t2 is at least twice
+ the size of t1. The type of the entire expression is also t2.
+ WIDEN_SUM_EXPR is equivalent to first widening (promoting)
+ the first argument from type t1 to type t2, and then summing it
+ with the second argument. */
+DEFTREECODE (WIDEN_SUM_EXPR, "widen_sum_expr", tcc_binary, 2)
+
+/* Widening multiplication.
+ The two arguments are of type t1.
+ The result is of type t2, such that t2 is at least twice
+ the size of t1. WIDEN_MULT_EXPR is equivalent to first widening (promoting)
+ the arguments from type t1 to type t2, and then multiplying them. */
+DEFTREECODE (WIDEN_MULT_EXPR, "widen_mult_expr", tcc_binary, 2)
+
+/* Whole vector left/right shift in bits.
+ Operand 0 is a vector to be shifted.
+ Operand 1 is an integer shift amount in bits. */
+DEFTREECODE (VEC_LSHIFT_EXPR, "vec_lshift_expr", tcc_binary, 2)
+DEFTREECODE (VEC_RSHIFT_EXPR, "vec_rshift_expr", tcc_binary, 2)
+
+/* Widening vector multiplication.
+ The two operands are vectors with N elements of size S. Multiplying the
+ elements of the two vectors will result in N products of size 2*S.
+ VEC_WIDEN_MULT_HI_EXPR computes the N/2 high products.
+ VEC_WIDEN_MULT_LO_EXPR computes the N/2 low products. */
+DEFTREECODE (VEC_WIDEN_MULT_HI_EXPR, "widen_mult_hi_expr", tcc_binary, 2)
+DEFTREECODE (VEC_WIDEN_MULT_LO_EXPR, "widen_mult_lo_expr", tcc_binary, 2)
+
+/* Unpack (extract and promote/widen) the high/low elements of the input
+ vector into the output vector. The input vector has twice as many
+ elements as the output vector, that are half the size of the elements
+ of the output vector. This is used to support type promotion. */
+DEFTREECODE (VEC_UNPACK_HI_EXPR, "vec_unpack_hi_expr", tcc_unary, 1)
+DEFTREECODE (VEC_UNPACK_LO_EXPR, "vec_unpack_lo_expr", tcc_unary, 1)
+
+/* Unpack (extract) the high/low elements of the input vector, convert
+ fixed point values to floating point and widen elements into the
+ output vector. The input vector has twice as many elements as the output
+ vector, that are half the size of the elements of the output vector. */
+DEFTREECODE (VEC_UNPACK_FLOAT_HI_EXPR, "vec_unpack_float_hi_expr", tcc_unary, 1)
+DEFTREECODE (VEC_UNPACK_FLOAT_LO_EXPR, "vec_unpack_float_lo_expr", tcc_unary, 1)
+
+/* Pack (demote/narrow and merge) the elements of the two input vectors
+ into the output vector using truncation/saturation.
+ The elements of the input vectors are twice the size of the elements of the
+ output vector. This is used to support type demotion. */
+DEFTREECODE (VEC_PACK_TRUNC_EXPR, "vec_pack_trunc_expr", tcc_binary, 2)
+DEFTREECODE (VEC_PACK_SAT_EXPR, "vec_pack_sat_expr", tcc_binary, 2)
+
+/* Convert floating point values of the two input vectors to integer
+ and pack (narrow and merge) the elements into the output vector. The
+ elements of the input vector are twice the size of the elements of
+ the output vector. */
+DEFTREECODE (VEC_PACK_FIX_TRUNC_EXPR, "vec_pack_fix_trunc_expr", tcc_binary, 2)
+
+/* Extract even/odd fields from vectors. */
+DEFTREECODE (VEC_EXTRACT_EVEN_EXPR, "vec_extracteven_expr", tcc_binary, 2)
+DEFTREECODE (VEC_EXTRACT_ODD_EXPR, "vec_extractodd_expr", tcc_binary, 2)
+
+/* Merge input vectors interleaving their fields. */
+DEFTREECODE (VEC_INTERLEAVE_HIGH_EXPR, "vec_interleavehigh_expr", tcc_binary, 2)
+DEFTREECODE (VEC_INTERLEAVE_LOW_EXPR, "vec_interleavelow_expr", tcc_binary, 2)
+
+/* PREDICT_EXPR. Specify hint for branch prediction. The
+ PREDICT_EXPR_PREDICTOR specify predictor and PREDICT_EXPR_OUTCOME the
+ outcome (0 for not taken and 1 for taken). Once the profile is guessed
+ all conditional branches leading to execution paths executing the
+ PREDICT_EXPR will get predicted by the specified predictor. */
+DEFTREECODE (PREDICT_EXPR, "predict_expr", tcc_expression, 1)
+
+/* OPTIMIZATION_NODE. Node to store the optimization options. */
+DEFTREECODE (OPTIMIZATION_NODE, "optimization_node", tcc_exceptional, 0)
+
+/* TARGET_OPTION_NODE. Node to store the target specific options. */
+DEFTREECODE (TARGET_OPTION_NODE, "target_option_node", tcc_exceptional, 0)
+
+/*
+Local variables:
+mode:c
+End:
+*/
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.h
new file mode 100644
index 0000000..b98f5b8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/tree.h
@@ -0,0 +1,5403 @@
+/* Front-end tree definitions for GNU compiler.
+ Copyright (C) 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_TREE_H
+#define GCC_TREE_H
+
+#include "hashtab.h"
+#include "machmode.h"
+#include "input.h"
+#include "statistics.h"
+#include "vec.h"
+#include "double-int.h"
+#include "alias.h"
+#include "options.h"
+
+/* Codes of tree nodes */
+
+#define DEFTREECODE(SYM, STRING, TYPE, NARGS) SYM,
+#define END_OF_BASE_TREE_CODES LAST_AND_UNUSED_TREE_CODE,
+
+enum tree_code {
+#include "all-tree.def"
+MAX_TREE_CODES
+};
+
+#undef DEFTREECODE
+#undef END_OF_BASE_TREE_CODES
+
+extern unsigned char tree_contains_struct[MAX_TREE_CODES][64];
+#define CODE_CONTAINS_STRUCT(CODE, STRUCT) (tree_contains_struct[(CODE)][(STRUCT)])
+
+/* Number of language-independent tree codes. */
+#define NUM_TREE_CODES ((int) LAST_AND_UNUSED_TREE_CODE)
+
+/* Tree code classes. */
+
+/* Each tree_code has an associated code class represented by a
+ TREE_CODE_CLASS. */
+
+enum tree_code_class {
+ tcc_exceptional, /* An exceptional code (fits no category). */
+ tcc_constant, /* A constant. */
+ /* Order of tcc_type and tcc_declaration is important. */
+ tcc_type, /* A type object code. */
+ tcc_declaration, /* A declaration (also serving as variable refs). */
+ tcc_reference, /* A reference to storage. */
+ tcc_comparison, /* A comparison expression. */
+ tcc_unary, /* A unary arithmetic expression. */
+ tcc_binary, /* A binary arithmetic expression. */
+ tcc_statement, /* A statement expression, which have side effects
+ but usually no interesting value. */
+ tcc_vl_exp, /* A function call or other expression with a
+ variable-length operand vector. */
+ tcc_expression /* Any other expression. */
+};
+
+/* Each tree code class has an associated string representation.
+ These must correspond to the tree_code_class entries. */
+
+extern const char *const tree_code_class_strings[];
+
+/* Returns the string representing CLASS. */
+
+#define TREE_CODE_CLASS_STRING(CLASS)\
+ tree_code_class_strings[(int) (CLASS)]
+
+extern const enum tree_code_class tree_code_type[];
+#define TREE_CODE_CLASS(CODE) tree_code_type[(int) (CODE)]
+
+/* Nonzero if CODE represents an exceptional code. */
+
+#define EXCEPTIONAL_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_exceptional)
+
+/* Nonzero if CODE represents a constant. */
+
+#define CONSTANT_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_constant)
+
+/* Nonzero if CODE represents a type. */
+
+#define TYPE_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_type)
+
+/* Nonzero if CODE represents a declaration. */
+
+#define DECL_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_declaration)
+
+/* Nonzero if CODE represents a memory tag. */
+
+#define MTAG_P(CODE) \
+ (TREE_CODE (CODE) == NAME_MEMORY_TAG \
+ || TREE_CODE (CODE) == SYMBOL_MEMORY_TAG \
+ || TREE_CODE (CODE) == MEMORY_PARTITION_TAG)
+
+
+/* Nonzero if DECL represents a VAR_DECL or FUNCTION_DECL. */
+
+#define VAR_OR_FUNCTION_DECL_P(DECL)\
+ (TREE_CODE (DECL) == VAR_DECL || TREE_CODE (DECL) == FUNCTION_DECL)
+
+/* Nonzero if CODE represents a INDIRECT_REF. Keep these checks in
+ ascending code order. */
+
+#define INDIRECT_REF_P(CODE)\
+ (TREE_CODE (CODE) == INDIRECT_REF \
+ || TREE_CODE (CODE) == ALIGN_INDIRECT_REF \
+ || TREE_CODE (CODE) == MISALIGNED_INDIRECT_REF)
+
+/* Nonzero if CODE represents a reference. */
+
+#define REFERENCE_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_reference)
+
+/* Nonzero if CODE represents a comparison. */
+
+#define COMPARISON_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_comparison)
+
+/* Nonzero if CODE represents a unary arithmetic expression. */
+
+#define UNARY_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_unary)
+
+/* Nonzero if CODE represents a binary arithmetic expression. */
+
+#define BINARY_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_binary)
+
+/* Nonzero if CODE represents a statement expression. */
+
+#define STATEMENT_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_statement)
+
+/* Nonzero if CODE represents a function call-like expression with a
+ variable-length operand vector. */
+
+#define VL_EXP_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_vl_exp)
+
+/* Nonzero if CODE represents any other expression. */
+
+#define EXPRESSION_CLASS_P(CODE)\
+ (TREE_CODE_CLASS (TREE_CODE (CODE)) == tcc_expression)
+
+/* Returns nonzero iff CODE represents a type or declaration. */
+
+#define IS_TYPE_OR_DECL_P(CODE)\
+ (TYPE_P (CODE) || DECL_P (CODE))
+
+/* Returns nonzero iff CLASS is the tree-code class of an
+ expression. */
+
+#define IS_EXPR_CODE_CLASS(CLASS)\
+ ((CLASS) >= tcc_reference && (CLASS) <= tcc_expression)
+
+/* Returns nonzero iff NODE is an expression of some kind. */
+
+#define EXPR_P(NODE) IS_EXPR_CODE_CLASS (TREE_CODE_CLASS (TREE_CODE (NODE)))
+
+/* Number of argument-words in each kind of tree-node. */
+
+extern const unsigned char tree_code_length[];
+#define TREE_CODE_LENGTH(CODE) tree_code_length[(int) (CODE)]
+
+/* Names of tree components. */
+
+extern const char *const tree_code_name[];
+
+/* A vectors of trees. */
+DEF_VEC_P(tree);
+DEF_VEC_ALLOC_P(tree,gc);
+DEF_VEC_ALLOC_P(tree,heap);
+
+
+/* Classify which part of the compiler has defined a given builtin function.
+ Note that we assume below that this is no more than two bits. */
+enum built_in_class
+{
+ NOT_BUILT_IN = 0,
+ BUILT_IN_FRONTEND,
+ BUILT_IN_MD,
+ BUILT_IN_NORMAL
+};
+
+/* Names for the above. */
+extern const char *const built_in_class_names[4];
+
+/* Codes that identify the various built in functions
+ so that expand_call can identify them quickly. */
+
+#define DEF_BUILTIN(ENUM, N, C, T, LT, B, F, NA, AT, IM, COND) ENUM,
+enum built_in_function
+{
+#include "builtins.def"
+
+ /* Complex division routines in libgcc. These are done via builtins
+ because emit_library_call_value can't handle complex values. */
+ BUILT_IN_COMPLEX_MUL_MIN,
+ BUILT_IN_COMPLEX_MUL_MAX
+ = BUILT_IN_COMPLEX_MUL_MIN
+ + MAX_MODE_COMPLEX_FLOAT
+ - MIN_MODE_COMPLEX_FLOAT,
+
+ BUILT_IN_COMPLEX_DIV_MIN,
+ BUILT_IN_COMPLEX_DIV_MAX
+ = BUILT_IN_COMPLEX_DIV_MIN
+ + MAX_MODE_COMPLEX_FLOAT
+ - MIN_MODE_COMPLEX_FLOAT,
+
+ /* Upper bound on non-language-specific builtins. */
+ END_BUILTINS
+};
+#undef DEF_BUILTIN
+
+/* Names for the above. */
+extern const char * built_in_names[(int) END_BUILTINS];
+
+/* Helper macros for math builtins. */
+
+#define BUILTIN_EXP10_P(FN) \
+ ((FN) == BUILT_IN_EXP10 || (FN) == BUILT_IN_EXP10F || (FN) == BUILT_IN_EXP10L \
+ || (FN) == BUILT_IN_POW10 || (FN) == BUILT_IN_POW10F || (FN) == BUILT_IN_POW10L)
+
+#define BUILTIN_EXPONENT_P(FN) (BUILTIN_EXP10_P (FN) \
+ || (FN) == BUILT_IN_EXP || (FN) == BUILT_IN_EXPF || (FN) == BUILT_IN_EXPL \
+ || (FN) == BUILT_IN_EXP2 || (FN) == BUILT_IN_EXP2F || (FN) == BUILT_IN_EXP2L)
+
+#define BUILTIN_SQRT_P(FN) \
+ ((FN) == BUILT_IN_SQRT || (FN) == BUILT_IN_SQRTF || (FN) == BUILT_IN_SQRTL)
+
+#define BUILTIN_CBRT_P(FN) \
+ ((FN) == BUILT_IN_CBRT || (FN) == BUILT_IN_CBRTF || (FN) == BUILT_IN_CBRTL)
+
+#define BUILTIN_ROOT_P(FN) (BUILTIN_SQRT_P (FN) || BUILTIN_CBRT_P (FN))
+
+#define CASE_FLT_FN(FN) case FN: case FN##F: case FN##L
+#define CASE_FLT_FN_REENT(FN) case FN##_R: case FN##F_R: case FN##L_R
+#define CASE_INT_FN(FN) case FN: case FN##L: case FN##LL
+
+/* An array of _DECL trees for the above. */
+extern GTY(()) tree built_in_decls[(int) END_BUILTINS];
+extern GTY(()) tree implicit_built_in_decls[(int) END_BUILTINS];
+
+/* In an OMP_CLAUSE node. */
+
+/* Number of operands and names for each clause. */
+extern unsigned const char omp_clause_num_ops[];
+extern const char * const omp_clause_code_name[];
+
+/* Clause codes. Do not reorder, as this is used to index into the tables
+ omp_clause_num_ops and omp_clause_code_name. */
+enum omp_clause_code
+{
+ /* Clause zero is special-cased inside the parser
+ (c_parser_omp_variable_list). */
+ OMP_CLAUSE_ERROR = 0,
+
+ /* OpenMP clause: private (variable_list). */
+ OMP_CLAUSE_PRIVATE,
+
+ /* OpenMP clause: shared (variable_list). */
+ OMP_CLAUSE_SHARED,
+
+ /* OpenMP clause: firstprivate (variable_list). */
+ OMP_CLAUSE_FIRSTPRIVATE,
+
+ /* OpenMP clause: lastprivate (variable_list). */
+ OMP_CLAUSE_LASTPRIVATE,
+
+ /* OpenMP clause: reduction (operator:variable_list).
+ OMP_CLAUSE_REDUCTION_CODE: The tree_code of the operator.
+ Operand 1: OMP_CLAUSE_REDUCTION_INIT: Stmt-list to initialize the var.
+ Operand 2: OMP_CLAUSE_REDUCTION_MERGE: Stmt-list to merge private var
+ into the shared one.
+ Operand 3: OMP_CLAUSE_REDUCTION_PLACEHOLDER: A dummy VAR_DECL
+ placeholder used in OMP_CLAUSE_REDUCTION_{INIT,MERGE}. */
+ OMP_CLAUSE_REDUCTION,
+
+ /* OpenMP clause: copyin (variable_list). */
+ OMP_CLAUSE_COPYIN,
+
+ /* OpenMP clause: copyprivate (variable_list). */
+ OMP_CLAUSE_COPYPRIVATE,
+
+ /* OpenMP clause: if (scalar-expression). */
+ OMP_CLAUSE_IF,
+
+ /* OpenMP clause: num_threads (integer-expression). */
+ OMP_CLAUSE_NUM_THREADS,
+
+ /* OpenMP clause: schedule. */
+ OMP_CLAUSE_SCHEDULE,
+
+ /* OpenMP clause: nowait. */
+ OMP_CLAUSE_NOWAIT,
+
+ /* OpenMP clause: ordered. */
+ OMP_CLAUSE_ORDERED,
+
+ /* OpenMP clause: default. */
+ OMP_CLAUSE_DEFAULT,
+
+ /* OpenMP clause: collapse (constant-integer-expression). */
+ OMP_CLAUSE_COLLAPSE,
+
+ /* OpenMP clause: untied. */
+ OMP_CLAUSE_UNTIED
+};
+
+/* The definition of tree nodes fills the next several pages. */
+
+/* A tree node can represent a data type, a variable, an expression
+ or a statement. Each node has a TREE_CODE which says what kind of
+ thing it represents. Some common codes are:
+ INTEGER_TYPE -- represents a type of integers.
+ ARRAY_TYPE -- represents a type of pointer.
+ VAR_DECL -- represents a declared variable.
+ INTEGER_CST -- represents a constant integer value.
+ PLUS_EXPR -- represents a sum (an expression).
+
+ As for the contents of a tree node: there are some fields
+ that all nodes share. Each TREE_CODE has various special-purpose
+ fields as well. The fields of a node are never accessed directly,
+ always through accessor macros. */
+
+/* Every kind of tree node starts with this structure,
+ so all nodes have these fields.
+
+ See the accessor macros, defined below, for documentation of the
+ fields. */
+union tree_ann_d;
+
+struct tree_base GTY(())
+{
+ ENUM_BITFIELD(tree_code) code : 16;
+
+ unsigned side_effects_flag : 1;
+ unsigned constant_flag : 1;
+ unsigned addressable_flag : 1;
+ unsigned volatile_flag : 1;
+ unsigned readonly_flag : 1;
+ unsigned unsigned_flag : 1;
+ unsigned asm_written_flag: 1;
+ unsigned nowarning_flag : 1;
+
+ unsigned used_flag : 1;
+ unsigned nothrow_flag : 1;
+ unsigned static_flag : 1;
+ unsigned public_flag : 1;
+ unsigned private_flag : 1;
+ unsigned protected_flag : 1;
+ unsigned deprecated_flag : 1;
+ unsigned saturating_flag : 1;
+ unsigned default_def_flag : 1;
+ unsigned expr_folded_flag : 1;
+
+ unsigned lang_flag_0 : 1;
+ unsigned lang_flag_1 : 1;
+ unsigned lang_flag_2 : 1;
+ unsigned lang_flag_3 : 1;
+ unsigned lang_flag_4 : 1;
+ unsigned lang_flag_5 : 1;
+ unsigned lang_flag_6 : 1;
+ unsigned visited : 1;
+
+ unsigned spare : 22;
+
+ union tree_ann_d *ann;
+};
+
+struct tree_common GTY(())
+{
+ struct tree_base base;
+ tree chain;
+ tree type;
+};
+
+/* The following table lists the uses of each of the above flags and
+ for which types of nodes they are defined.
+
+ addressable_flag:
+
+ TREE_ADDRESSABLE in
+ VAR_DECL, FUNCTION_DECL, FIELD_DECL, LABEL_DECL
+ all types
+ CONSTRUCTOR, IDENTIFIER_NODE
+ STMT_EXPR, it means we want the result of the enclosed expression
+
+ CALL_EXPR_TAILCALL in
+ CALL_EXPR
+
+ CASE_LOW_SEEN in
+ CASE_LABEL_EXPR
+
+ static_flag:
+
+ TREE_STATIC in
+ VAR_DECL, FUNCTION_DECL
+ CONSTRUCTOR
+
+ TREE_NO_TRAMPOLINE in
+ ADDR_EXPR
+
+ BINFO_VIRTUAL_P in
+ TREE_BINFO
+
+ TREE_SYMBOL_REFERENCED in
+ IDENTIFIER_NODE
+
+ CLEANUP_EH_ONLY in
+ TARGET_EXPR, WITH_CLEANUP_EXPR
+
+ TRY_CATCH_IS_CLEANUP in
+ TRY_CATCH_EXPR
+
+ ASM_INPUT_P in
+ ASM_EXPR
+
+ EH_FILTER_MUST_NOT_THROW in
+ EH_FILTER_EXPR
+
+ TYPE_REF_CAN_ALIAS_ALL in
+ POINTER_TYPE, REFERENCE_TYPE
+
+ MOVE_NONTEMPORAL in
+ MODIFY_EXPR
+
+ CASE_HIGH_SEEN in
+ CASE_LABEL_EXPR
+
+ CALL_CANNOT_INLINE_P in
+ CALL_EXPR
+
+ public_flag:
+
+ TREE_OVERFLOW in
+ INTEGER_CST, REAL_CST, COMPLEX_CST, VECTOR_CST
+
+ TREE_PUBLIC in
+ VAR_DECL, FUNCTION_DECL
+ IDENTIFIER_NODE
+
+ ASM_VOLATILE_P in
+ ASM_EXPR
+
+ CALL_EXPR_VA_ARG_PACK in
+ CALL_EXPR
+
+ TYPE_CACHED_VALUES_P in
+ all types
+
+ SAVE_EXPR_RESOLVED_P in
+ SAVE_EXPR
+
+ OMP_CLAUSE_LASTPRIVATE_FIRSTPRIVATE in
+ OMP_CLAUSE_LASTPRIVATE
+
+ OMP_CLAUSE_PRIVATE_DEBUG in
+ OMP_CLAUSE_PRIVATE
+
+ private_flag:
+
+ TREE_PRIVATE in
+ all decls
+
+ CALL_EXPR_RETURN_SLOT_OPT in
+ CALL_EXPR
+
+ DECL_BY_REFERENCE in
+ PARM_DECL, RESULT_DECL
+
+ OMP_SECTION_LAST in
+ OMP_SECTION
+
+ OMP_PARALLEL_COMBINED in
+ OMP_PARALLEL
+ OMP_CLAUSE_PRIVATE_OUTER_REF in
+ OMP_CLAUSE_PRIVATE
+
+ protected_flag:
+
+ TREE_PROTECTED in
+ BLOCK
+ all decls
+
+ CALL_FROM_THUNK_P in
+ CALL_EXPR
+
+ side_effects_flag:
+
+ TREE_SIDE_EFFECTS in
+ all expressions
+ all decls
+ all constants
+
+ FORCED_LABEL in
+ LABEL_DECL
+
+ volatile_flag:
+
+ TREE_THIS_VOLATILE in
+ all expressions
+ all decls
+
+ TYPE_VOLATILE in
+ all types
+
+ readonly_flag:
+
+ TREE_READONLY in
+ all expressions
+ all decls
+
+ TYPE_READONLY in
+ all types
+
+ constant_flag:
+
+ TREE_CONSTANT in
+ all expressions
+ all decls
+ all constants
+
+ TYPE_SIZES_GIMPLIFIED in
+ all types
+
+ unsigned_flag:
+
+ TYPE_UNSIGNED in
+ all types
+
+ DECL_UNSIGNED in
+ all decls
+
+ REGISTER_DEFS_IN_THIS_STMT in
+ all expressions (tree-into-ssa.c)
+
+ asm_written_flag:
+
+ TREE_ASM_WRITTEN in
+ VAR_DECL, FUNCTION_DECL
+ RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE
+ BLOCK, SSA_NAME, STRING_CST
+
+ NECESSARY in
+ all expressions (tree-ssa-dce.c, tree-ssa-pre.c)
+
+ used_flag:
+
+ TREE_USED in
+ all expressions
+ all decls
+ IDENTIFIER_NODE
+
+ nothrow_flag:
+
+ TREE_NOTHROW in
+ CALL_EXPR
+ FUNCTION_DECL
+
+ TYPE_ALIGN_OK in
+ all types
+
+ TREE_THIS_NOTRAP in
+ (ALIGN/MISALIGNED_)INDIRECT_REF, ARRAY_REF, ARRAY_RANGE_REF
+
+ deprecated_flag:
+
+ TREE_DEPRECATED in
+ all decls
+
+ IDENTIFIER_TRANSPARENT_ALIAS in
+ IDENTIFIER_NODE
+
+ STMT_IN_SSA_EDGE_WORKLIST in
+ all expressions (tree-ssa-propagate.c)
+
+ visited:
+
+ TREE_VISITED in
+ all trees (used liberally by many passes)
+
+ saturating_flag:
+
+ TYPE_SATURATING in
+ all types
+
+ nowarning_flag:
+
+ TREE_NO_WARNING in
+ all expressions
+ all decls
+
+ default_def_flag:
+
+ SSA_NAME_IS_DEFAULT_DEF in
+ SSA_NAME
+
+ expr_folded_flag:
+
+ EXPR_FOLDED in
+ all expressions
+ all decls
+ all constants
+*/
+
+#undef DEFTREESTRUCT
+#define DEFTREESTRUCT(ENUM, NAME) ENUM,
+enum tree_node_structure_enum {
+#include "treestruct.def"
+ LAST_TS_ENUM
+};
+#undef DEFTREESTRUCT
+
+/* Define accessors for the fields that all tree nodes have
+ (though some fields are not used for all kinds of nodes). */
+
+/* The tree-code says what kind of node it is.
+ Codes are defined in tree.def. */
+#define TREE_CODE(NODE) ((enum tree_code) (NODE)->base.code)
+#define TREE_SET_CODE(NODE, VALUE) ((NODE)->base.code = (VALUE))
+
+/* When checking is enabled, errors will be generated if a tree node
+ is accessed incorrectly. The macros die with a fatal error. */
+#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
+
+#define TREE_CHECK(T, CODE) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != (CODE)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE), 0); \
+ __t; })
+
+#define TREE_NOT_CHECK(T, CODE) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) == (CODE)) \
+ tree_not_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE), 0); \
+ __t; })
+
+#define TREE_CHECK2(T, CODE1, CODE2) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != (CODE1) \
+ && TREE_CODE (__t) != (CODE2)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), 0); \
+ __t; })
+
+#define TREE_NOT_CHECK2(T, CODE1, CODE2) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) == (CODE1) \
+ || TREE_CODE (__t) == (CODE2)) \
+ tree_not_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), 0); \
+ __t; })
+
+#define TREE_CHECK3(T, CODE1, CODE2, CODE3) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != (CODE1) \
+ && TREE_CODE (__t) != (CODE2) \
+ && TREE_CODE (__t) != (CODE3)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), 0); \
+ __t; })
+
+#define TREE_NOT_CHECK3(T, CODE1, CODE2, CODE3) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) == (CODE1) \
+ || TREE_CODE (__t) == (CODE2) \
+ || TREE_CODE (__t) == (CODE3)) \
+ tree_not_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), 0); \
+ __t; })
+
+#define TREE_CHECK4(T, CODE1, CODE2, CODE3, CODE4) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != (CODE1) \
+ && TREE_CODE (__t) != (CODE2) \
+ && TREE_CODE (__t) != (CODE3) \
+ && TREE_CODE (__t) != (CODE4)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), (CODE4), 0); \
+ __t; })
+
+#define NON_TREE_CHECK4(T, CODE1, CODE2, CODE3, CODE4) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) == (CODE1) \
+ || TREE_CODE (__t) == (CODE2) \
+ || TREE_CODE (__t) == (CODE3) \
+ || TREE_CODE (__t) == (CODE4)) \
+ tree_not_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), (CODE4), 0); \
+ __t; })
+
+#define TREE_CHECK5(T, CODE1, CODE2, CODE3, CODE4, CODE5) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != (CODE1) \
+ && TREE_CODE (__t) != (CODE2) \
+ && TREE_CODE (__t) != (CODE3) \
+ && TREE_CODE (__t) != (CODE4) \
+ && TREE_CODE (__t) != (CODE5)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), (CODE4), (CODE5), 0);\
+ __t; })
+
+#define TREE_NOT_CHECK5(T, CODE1, CODE2, CODE3, CODE4, CODE5) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) == (CODE1) \
+ || TREE_CODE (__t) == (CODE2) \
+ || TREE_CODE (__t) == (CODE3) \
+ || TREE_CODE (__t) == (CODE4) \
+ || TREE_CODE (__t) == (CODE5)) \
+ tree_not_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2), (CODE3), (CODE4), (CODE5), 0);\
+ __t; })
+
+#define CONTAINS_STRUCT_CHECK(T, STRUCT) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (tree_contains_struct[TREE_CODE(__t)][(STRUCT)] != 1) \
+ tree_contains_struct_check_failed (__t, (STRUCT), __FILE__, __LINE__, \
+ __FUNCTION__); \
+ __t; })
+
+#define TREE_CLASS_CHECK(T, CLASS) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE_CLASS (TREE_CODE(__t)) != (CLASS)) \
+ tree_class_check_failed (__t, (CLASS), __FILE__, __LINE__, \
+ __FUNCTION__); \
+ __t; })
+
+#define TREE_RANGE_CHECK(T, CODE1, CODE2) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) < (CODE1) || TREE_CODE (__t) > (CODE2)) \
+ tree_range_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE1), (CODE2)); \
+ __t; })
+
+#define OMP_CLAUSE_SUBCODE_CHECK(T, CODE) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != OMP_CLAUSE) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ OMP_CLAUSE, 0); \
+ if (__t->omp_clause.code != (CODE)) \
+ omp_clause_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ (CODE)); \
+ __t; })
+
+#define OMP_CLAUSE_RANGE_CHECK(T, CODE1, CODE2) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TREE_CODE (__t) != OMP_CLAUSE) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ OMP_CLAUSE, 0); \
+ if ((int) __t->omp_clause.code < (int) (CODE1) \
+ || (int) __t->omp_clause.code > (int) (CODE2)) \
+ omp_clause_range_check_failed (__t, __FILE__, __LINE__, \
+ __FUNCTION__, (CODE1), (CODE2)); \
+ __t; })
+
+/* These checks have to be special cased. */
+#define EXPR_CHECK(T) __extension__ \
+({ __typeof (T) const __t = (T); \
+ char const __c = TREE_CODE_CLASS (TREE_CODE (__t)); \
+ if (!IS_EXPR_CODE_CLASS (__c)) \
+ tree_class_check_failed (__t, tcc_expression, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ __t; })
+
+/* These checks have to be special cased. */
+#define NON_TYPE_CHECK(T) __extension__ \
+({ __typeof (T) const __t = (T); \
+ if (TYPE_P (__t)) \
+ tree_not_class_check_failed (__t, tcc_type, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ __t; })
+
+#define TREE_VEC_ELT_CHECK(T, I) __extension__ \
+(*({__typeof (T) const __t = (T); \
+ const int __i = (I); \
+ if (TREE_CODE (__t) != TREE_VEC) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ TREE_VEC, 0); \
+ if (__i < 0 || __i >= __t->vec.length) \
+ tree_vec_elt_check_failed (__i, __t->vec.length, \
+ __FILE__, __LINE__, __FUNCTION__); \
+ &__t->vec.a[__i]; }))
+
+#define OMP_CLAUSE_ELT_CHECK(T, I) __extension__ \
+(*({__typeof (T) const __t = (T); \
+ const int __i = (I); \
+ if (TREE_CODE (__t) != OMP_CLAUSE) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, \
+ OMP_CLAUSE, 0); \
+ if (__i < 0 || __i >= omp_clause_num_ops [__t->omp_clause.code]) \
+ omp_clause_operand_check_failed (__i, __t, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &__t->omp_clause.ops[__i]; }))
+
+/* Special checks for TREE_OPERANDs. */
+#define TREE_OPERAND_CHECK(T, I) __extension__ \
+(*({__typeof (T) const __t = EXPR_CHECK (T); \
+ const int __i = (I); \
+ if (__i < 0 || __i >= TREE_OPERAND_LENGTH (__t)) \
+ tree_operand_check_failed (__i, __t, \
+ __FILE__, __LINE__, __FUNCTION__); \
+ &__t->exp.operands[__i]; }))
+
+#define TREE_OPERAND_CHECK_CODE(T, CODE, I) __extension__ \
+(*({__typeof (T) const __t = (T); \
+ const int __i = (I); \
+ if (TREE_CODE (__t) != CODE) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, (CODE), 0);\
+ if (__i < 0 || __i >= TREE_OPERAND_LENGTH (__t)) \
+ tree_operand_check_failed (__i, __t, \
+ __FILE__, __LINE__, __FUNCTION__); \
+ &__t->exp.operands[__i]; }))
+
+#define TREE_RTL_OPERAND_CHECK(T, CODE, I) __extension__ \
+(*(rtx *) \
+ ({__typeof (T) const __t = (T); \
+ const int __i = (I); \
+ if (TREE_CODE (__t) != (CODE)) \
+ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, (CODE), 0); \
+ if (__i < 0 || __i >= TREE_OPERAND_LENGTH (__t)) \
+ tree_operand_check_failed (__i, __t, \
+ __FILE__, __LINE__, __FUNCTION__); \
+ &__t->exp.operands[__i]; }))
+
+/* Nodes are chained together for many purposes.
+ Types are chained together to record them for being output to the debugger
+ (see the function `chain_type').
+ Decls in the same scope are chained together to record the contents
+ of the scope.
+ Statement nodes for successive statements used to be chained together.
+ Often lists of things are represented by TREE_LIST nodes that
+ are chained together. */
+
+#define TREE_CHAIN(NODE) __extension__ \
+(*({__typeof (NODE) const __t = (NODE); \
+ &__t->common.chain; }))
+
+/* In all nodes that are expressions, this is the data type of the expression.
+ In POINTER_TYPE nodes, this is the type that the pointer points to.
+ In ARRAY_TYPE nodes, this is the type of the elements.
+ In VECTOR_TYPE nodes, this is the type of the elements. */
+#define TREE_TYPE(NODE) __extension__ \
+(*({__typeof (NODE) const __t = (NODE); \
+ &__t->common.type; }))
+
+extern void tree_contains_struct_check_failed (const_tree,
+ const enum tree_node_structure_enum,
+ const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+
+extern void tree_check_failed (const_tree, const char *, int, const char *,
+ ...) ATTRIBUTE_NORETURN;
+extern void tree_not_check_failed (const_tree, const char *, int, const char *,
+ ...) ATTRIBUTE_NORETURN;
+extern void tree_class_check_failed (const_tree, const enum tree_code_class,
+ const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void tree_range_check_failed (const_tree, const char *, int,
+ const char *, enum tree_code,
+ enum tree_code);
+extern void tree_not_class_check_failed (const_tree,
+ const enum tree_code_class,
+ const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void tree_vec_elt_check_failed (int, int, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void phi_node_elt_check_failed (int, int, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void tree_operand_check_failed (int, const_tree,
+ const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void omp_clause_check_failed (const_tree, const char *, int,
+ const char *, enum omp_clause_code)
+ ATTRIBUTE_NORETURN;
+extern void omp_clause_operand_check_failed (int, const_tree, const char *,
+ int, const char *)
+ ATTRIBUTE_NORETURN;
+extern void omp_clause_range_check_failed (const_tree, const char *, int,
+ const char *, enum omp_clause_code,
+ enum omp_clause_code)
+ ATTRIBUTE_NORETURN;
+
+#else /* not ENABLE_TREE_CHECKING, or not gcc */
+
+#define CONTAINS_STRUCT_CHECK(T, ENUM) (T)
+#define TREE_CHECK(T, CODE) (T)
+#define TREE_NOT_CHECK(T, CODE) (T)
+#define TREE_CHECK2(T, CODE1, CODE2) (T)
+#define TREE_NOT_CHECK2(T, CODE1, CODE2) (T)
+#define TREE_CHECK3(T, CODE1, CODE2, CODE3) (T)
+#define TREE_NOT_CHECK3(T, CODE1, CODE2, CODE3) (T)
+#define TREE_CHECK4(T, CODE1, CODE2, CODE3, CODE4) (T)
+#define TREE_NOT_CHECK4(T, CODE1, CODE2, CODE3, CODE4) (T)
+#define TREE_CHECK5(T, CODE1, CODE2, CODE3, CODE4, CODE5) (T)
+#define TREE_NOT_CHECK5(T, CODE1, CODE2, CODE3, CODE4, CODE5) (T)
+#define TREE_CLASS_CHECK(T, CODE) (T)
+#define TREE_RANGE_CHECK(T, CODE1, CODE2) (T)
+#define EXPR_CHECK(T) (T)
+#define NON_TYPE_CHECK(T) (T)
+#define TREE_VEC_ELT_CHECK(T, I) ((T)->vec.a[I])
+#define TREE_OPERAND_CHECK(T, I) ((T)->exp.operands[I])
+#define TREE_OPERAND_CHECK_CODE(T, CODE, I) ((T)->exp.operands[I])
+#define TREE_RTL_OPERAND_CHECK(T, CODE, I) (*(rtx *) &((T)->exp.operands[I]))
+#define OMP_CLAUSE_ELT_CHECK(T, i) ((T)->omp_clause.ops[i])
+#define OMP_CLAUSE_RANGE_CHECK(T, CODE1, CODE2) (T)
+#define OMP_CLAUSE_SUBCODE_CHECK(T, CODE) (T)
+
+#define TREE_CHAIN(NODE) ((NODE)->common.chain)
+#define TREE_TYPE(NODE) ((NODE)->common.type)
+
+#endif
+
+#define TREE_BLOCK(NODE) *(tree_block (NODE))
+
+#include "tree-check.h"
+
+#define TYPE_CHECK(T) TREE_CLASS_CHECK (T, tcc_type)
+#define DECL_MINIMAL_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_DECL_MINIMAL)
+#define TREE_MEMORY_TAG_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_MEMORY_TAG)
+#define DECL_COMMON_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_DECL_COMMON)
+#define DECL_WRTL_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_DECL_WRTL)
+#define DECL_WITH_VIS_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_DECL_WITH_VIS)
+#define DECL_NON_COMMON_CHECK(T) CONTAINS_STRUCT_CHECK (T, TS_DECL_NON_COMMON)
+#define CST_CHECK(T) TREE_CLASS_CHECK (T, tcc_constant)
+#define STMT_CHECK(T) TREE_CLASS_CHECK (T, tcc_statement)
+#define VL_EXP_CHECK(T) TREE_CLASS_CHECK (T, tcc_vl_exp)
+#define FUNC_OR_METHOD_CHECK(T) TREE_CHECK2 (T, FUNCTION_TYPE, METHOD_TYPE)
+#define PTR_OR_REF_CHECK(T) TREE_CHECK2 (T, POINTER_TYPE, REFERENCE_TYPE)
+
+#define RECORD_OR_UNION_CHECK(T) \
+ TREE_CHECK3 (T, RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE)
+#define NOT_RECORD_OR_UNION_CHECK(T) \
+ TREE_NOT_CHECK3 (T, RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE)
+
+#define NUMERICAL_TYPE_CHECK(T) \
+ TREE_CHECK5 (T, INTEGER_TYPE, ENUMERAL_TYPE, BOOLEAN_TYPE, REAL_TYPE, \
+ FIXED_POINT_TYPE)
+
+/* Here is how primitive or already-canonicalized types' hash codes
+ are made. */
+#define TYPE_HASH(TYPE) (TYPE_UID (TYPE))
+
+/* A simple hash function for an arbitrary tree node. This must not be
+ used in hash tables which are saved to a PCH. */
+#define TREE_HASH(NODE) ((size_t) (NODE) & 0777777)
+
+/* Tests if CODE is a conversion expr (NOP_EXPR or CONVERT_EXPR). */
+#define CONVERT_EXPR_CODE_P(CODE) \
+ ((CODE) == NOP_EXPR || (CODE) == CONVERT_EXPR)
+
+/* Similarly, but accept an expressions instead of a tree code. */
+#define CONVERT_EXPR_P(EXP) CONVERT_EXPR_CODE_P (TREE_CODE (EXP))
+
+/* Generate case for NOP_EXPR, CONVERT_EXPR. */
+
+#define CASE_CONVERT \
+ case NOP_EXPR: \
+ case CONVERT_EXPR
+
+/* Given an expression as a tree, strip any NON_LVALUE_EXPRs and NOP_EXPRs
+ that don't change the machine mode. */
+
+#define STRIP_NOPS(EXP) \
+ while ((CONVERT_EXPR_P (EXP) \
+ || TREE_CODE (EXP) == NON_LVALUE_EXPR) \
+ && TREE_OPERAND (EXP, 0) != error_mark_node \
+ && (TYPE_MODE (TREE_TYPE (EXP)) \
+ == TYPE_MODE (TREE_TYPE (TREE_OPERAND (EXP, 0))))) \
+ (EXP) = TREE_OPERAND (EXP, 0)
+
+/* Like STRIP_NOPS, but don't let the signedness change either. */
+
+#define STRIP_SIGN_NOPS(EXP) \
+ while ((CONVERT_EXPR_P (EXP) \
+ || TREE_CODE (EXP) == NON_LVALUE_EXPR) \
+ && TREE_OPERAND (EXP, 0) != error_mark_node \
+ && (TYPE_MODE (TREE_TYPE (EXP)) \
+ == TYPE_MODE (TREE_TYPE (TREE_OPERAND (EXP, 0)))) \
+ && (TYPE_UNSIGNED (TREE_TYPE (EXP)) \
+ == TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (EXP, 0)))) \
+ && (POINTER_TYPE_P (TREE_TYPE (EXP)) \
+ == POINTER_TYPE_P (TREE_TYPE (TREE_OPERAND (EXP, 0))))) \
+ (EXP) = TREE_OPERAND (EXP, 0)
+
+/* Like STRIP_NOPS, but don't alter the TREE_TYPE either. */
+
+#define STRIP_TYPE_NOPS(EXP) \
+ while ((CONVERT_EXPR_P (EXP) \
+ || TREE_CODE (EXP) == NON_LVALUE_EXPR) \
+ && TREE_OPERAND (EXP, 0) != error_mark_node \
+ && (TREE_TYPE (EXP) \
+ == TREE_TYPE (TREE_OPERAND (EXP, 0)))) \
+ (EXP) = TREE_OPERAND (EXP, 0)
+
+/* Remove unnecessary type conversions according to
+ tree_ssa_useless_type_conversion. */
+
+#define STRIP_USELESS_TYPE_CONVERSION(EXP) \
+ while (tree_ssa_useless_type_conversion (EXP)) \
+ EXP = TREE_OPERAND (EXP, 0)
+
+/* Nonzero if TYPE represents an integral type. Note that we do not
+ include COMPLEX types here. Keep these checks in ascending code
+ order. */
+
+#define INTEGRAL_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == ENUMERAL_TYPE \
+ || TREE_CODE (TYPE) == BOOLEAN_TYPE \
+ || TREE_CODE (TYPE) == INTEGER_TYPE)
+
+/* Nonzero if TYPE represents a non-saturating fixed-point type. */
+
+#define NON_SAT_FIXED_POINT_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == FIXED_POINT_TYPE && !TYPE_SATURATING (TYPE))
+
+/* Nonzero if TYPE represents a saturating fixed-point type. */
+
+#define SAT_FIXED_POINT_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == FIXED_POINT_TYPE && TYPE_SATURATING (TYPE))
+
+/* Nonzero if TYPE represents a fixed-point type. */
+
+#define FIXED_POINT_TYPE_P(TYPE) (TREE_CODE (TYPE) == FIXED_POINT_TYPE)
+
+/* Nonzero if TYPE represents a scalar floating-point type. */
+
+#define SCALAR_FLOAT_TYPE_P(TYPE) (TREE_CODE (TYPE) == REAL_TYPE)
+
+/* Nonzero if TYPE represents a complex floating-point type. */
+
+#define COMPLEX_FLOAT_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == COMPLEX_TYPE \
+ && TREE_CODE (TREE_TYPE (TYPE)) == REAL_TYPE)
+
+/* Nonzero if TYPE represents a vector floating-point type. */
+
+#define VECTOR_FLOAT_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == VECTOR_TYPE \
+ && TREE_CODE (TREE_TYPE (TYPE)) == REAL_TYPE)
+
+/* Nonzero if TYPE represents a floating-point type, including complex
+ and vector floating-point types. The vector and complex check does
+ not use the previous two macros to enable early folding. */
+
+#define FLOAT_TYPE_P(TYPE) \
+ (SCALAR_FLOAT_TYPE_P (TYPE) \
+ || ((TREE_CODE (TYPE) == COMPLEX_TYPE \
+ || TREE_CODE (TYPE) == VECTOR_TYPE) \
+ && SCALAR_FLOAT_TYPE_P (TREE_TYPE (TYPE))))
+
+/* Nonzero if TYPE represents a decimal floating-point type. */
+#define DECIMAL_FLOAT_TYPE_P(TYPE) \
+ (SCALAR_FLOAT_TYPE_P (TYPE) \
+ && DECIMAL_FLOAT_MODE_P (TYPE_MODE (TYPE)))
+
+/* Nonzero if TYPE represents an aggregate (multi-component) type.
+ Keep these checks in ascending code order. */
+
+#define AGGREGATE_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == ARRAY_TYPE || TREE_CODE (TYPE) == RECORD_TYPE \
+ || TREE_CODE (TYPE) == UNION_TYPE || TREE_CODE (TYPE) == QUAL_UNION_TYPE)
+
+/* Nonzero if TYPE represents a pointer or reference type.
+ (It should be renamed to INDIRECT_TYPE_P.) Keep these checks in
+ ascending code order. */
+
+#define POINTER_TYPE_P(TYPE) \
+ (TREE_CODE (TYPE) == POINTER_TYPE || TREE_CODE (TYPE) == REFERENCE_TYPE)
+
+/* Nonzero if this type is a complete type. */
+#define COMPLETE_TYPE_P(NODE) (TYPE_SIZE (NODE) != NULL_TREE)
+
+/* Nonzero if this type is the (possibly qualified) void type. */
+#define VOID_TYPE_P(NODE) (TREE_CODE (NODE) == VOID_TYPE)
+
+/* Nonzero if this type is complete or is cv void. */
+#define COMPLETE_OR_VOID_TYPE_P(NODE) \
+ (COMPLETE_TYPE_P (NODE) || VOID_TYPE_P (NODE))
+
+/* Nonzero if this type is complete or is an array with unspecified bound. */
+#define COMPLETE_OR_UNBOUND_ARRAY_TYPE_P(NODE) \
+ (COMPLETE_TYPE_P (TREE_CODE (NODE) == ARRAY_TYPE ? TREE_TYPE (NODE) : (NODE)))
+
+
+/* Define many boolean fields that all tree nodes have. */
+
+/* In VAR_DECL nodes, nonzero means address of this is needed.
+ So it cannot be in a register.
+ In a FUNCTION_DECL, nonzero means its address is needed.
+ So it must be compiled even if it is an inline function.
+ In a FIELD_DECL node, it means that the programmer is permitted to
+ construct the address of this field. This is used for aliasing
+ purposes: see record_component_aliases.
+ In CONSTRUCTOR nodes, it means object constructed must be in memory.
+ In LABEL_DECL nodes, it means a goto for this label has been seen
+ from a place outside all binding contours that restore stack levels.
+ In ..._TYPE nodes, it means that objects of this type must
+ be fully addressable. This means that pieces of this
+ object cannot go into register parameters, for example.
+ In IDENTIFIER_NODEs, this means that some extern decl for this name
+ had its address taken. That matters for inline functions. */
+#define TREE_ADDRESSABLE(NODE) ((NODE)->base.addressable_flag)
+
+/* Set on a CALL_EXPR if the call is in a tail position, ie. just before the
+ exit of a function. Calls for which this is true are candidates for tail
+ call optimizations. */
+#define CALL_EXPR_TAILCALL(NODE) \
+ (CALL_EXPR_CHECK(NODE)->base.addressable_flag)
+
+/* Used as a temporary field on a CASE_LABEL_EXPR to indicate that the
+ CASE_LOW operand has been processed. */
+#define CASE_LOW_SEEN(NODE) \
+ (CASE_LABEL_EXPR_CHECK (NODE)->base.addressable_flag)
+
+#define PREDICT_EXPR_OUTCOME(NODE) \
+ (PREDICT_EXPR_CHECK(NODE)->base.addressable_flag)
+#define PREDICT_EXPR_PREDICTOR(NODE) \
+ ((enum br_predictor)tree_low_cst (TREE_OPERAND (PREDICT_EXPR_CHECK (NODE), 0), 0))
+
+/* In a VAR_DECL, nonzero means allocate static storage.
+ In a FUNCTION_DECL, nonzero if function has been defined.
+ In a CONSTRUCTOR, nonzero means allocate static storage. */
+#define TREE_STATIC(NODE) ((NODE)->base.static_flag)
+
+/* In an ADDR_EXPR, nonzero means do not use a trampoline. */
+#define TREE_NO_TRAMPOLINE(NODE) (ADDR_EXPR_CHECK (NODE)->base.static_flag)
+
+/* In a TARGET_EXPR or WITH_CLEANUP_EXPR, means that the pertinent cleanup
+ should only be executed if an exception is thrown, not on normal exit
+ of its scope. */
+#define CLEANUP_EH_ONLY(NODE) ((NODE)->base.static_flag)
+
+/* In a TRY_CATCH_EXPR, means that the handler should be considered a
+ separate cleanup in honor_protect_cleanup_actions. */
+#define TRY_CATCH_IS_CLEANUP(NODE) \
+ (TRY_CATCH_EXPR_CHECK (NODE)->base.static_flag)
+
+/* Used as a temporary field on a CASE_LABEL_EXPR to indicate that the
+ CASE_HIGH operand has been processed. */
+#define CASE_HIGH_SEEN(NODE) \
+ (CASE_LABEL_EXPR_CHECK (NODE)->base.static_flag)
+
+/* Used to mark a CALL_EXPR as not suitable for inlining. */
+#define CALL_CANNOT_INLINE_P(NODE) (CALL_EXPR_CHECK (NODE)->base.static_flag)
+
+/* In an expr node (usually a conversion) this means the node was made
+ implicitly and should not lead to any sort of warning. In a decl node,
+ warnings concerning the decl should be suppressed. This is used at
+ least for used-before-set warnings, and it set after one warning is
+ emitted. */
+#define TREE_NO_WARNING(NODE) ((NODE)->base.nowarning_flag)
+
+/* In an IDENTIFIER_NODE, this means that assemble_name was called with
+ this string as an argument. */
+#define TREE_SYMBOL_REFERENCED(NODE) \
+ (IDENTIFIER_NODE_CHECK (NODE)->base.static_flag)
+
+/* Nonzero in a pointer or reference type means the data pointed to
+ by this type can alias anything. */
+#define TYPE_REF_CAN_ALIAS_ALL(NODE) \
+ (PTR_OR_REF_CHECK (NODE)->base.static_flag)
+
+/* In a MODIFY_EXPR, means that the store in the expression is nontemporal. */
+#define MOVE_NONTEMPORAL(NODE) \
+ (EXPR_CHECK (NODE)->base.static_flag)
+
+/* In an INTEGER_CST, REAL_CST, COMPLEX_CST, or VECTOR_CST, this means
+ there was an overflow in folding. */
+
+#define TREE_OVERFLOW(NODE) (CST_CHECK (NODE)->base.public_flag)
+
+/* ??? This is an obsolete synonym for TREE_OVERFLOW. */
+#define TREE_CONSTANT_OVERFLOW(NODE) TREE_OVERFLOW(NODE)
+
+/* TREE_OVERFLOW can only be true for EXPR of CONSTANT_CLASS_P. */
+
+#define TREE_OVERFLOW_P(EXPR) \
+ (CONSTANT_CLASS_P (EXPR) && TREE_OVERFLOW (EXPR))
+
+/* In a VAR_DECL, FUNCTION_DECL, NAMESPACE_DECL or TYPE_DECL,
+ nonzero means name is to be accessible from outside this translation unit.
+ In an IDENTIFIER_NODE, nonzero means an external declaration
+ accessible from outside this translation unit was previously seen
+ for this name in an inner scope. */
+#define TREE_PUBLIC(NODE) ((NODE)->base.public_flag)
+
+/* In a _TYPE, indicates whether TYPE_CACHED_VALUES contains a vector
+ of cached values, or is something else. */
+#define TYPE_CACHED_VALUES_P(NODE) (TYPE_CHECK(NODE)->base.public_flag)
+
+/* In a SAVE_EXPR, indicates that the original expression has already
+ been substituted with a VAR_DECL that contains the value. */
+#define SAVE_EXPR_RESOLVED_P(NODE) \
+ (SAVE_EXPR_CHECK (NODE)->base.public_flag)
+
+/* Set on a CALL_EXPR if this stdarg call should be passed the argument
+ pack. */
+#define CALL_EXPR_VA_ARG_PACK(NODE) \
+ (CALL_EXPR_CHECK(NODE)->base.public_flag)
+
+/* In any expression, decl, or constant, nonzero means it has side effects or
+ reevaluation of the whole expression could produce a different value.
+ This is set if any subexpression is a function call, a side effect or a
+ reference to a volatile variable. In a ..._DECL, this is set only if the
+ declaration said `volatile'. This will never be set for a constant. */
+#define TREE_SIDE_EFFECTS(NODE) \
+ (NON_TYPE_CHECK (NODE)->base.side_effects_flag)
+
+/* In a LABEL_DECL, nonzero means this label had its address taken
+ and therefore can never be deleted and is a jump target for
+ computed gotos. */
+#define FORCED_LABEL(NODE) (LABEL_DECL_CHECK (NODE)->base.side_effects_flag)
+
+/* Nonzero means this expression is volatile in the C sense:
+ its address should be of type `volatile WHATEVER *'.
+ In other words, the declared item is volatile qualified.
+ This is used in _DECL nodes and _REF nodes.
+ On a FUNCTION_DECL node, this means the function does not
+ return normally. This is the same effect as setting
+ the attribute noreturn on the function in C.
+
+ In a ..._TYPE node, means this type is volatile-qualified.
+ But use TYPE_VOLATILE instead of this macro when the node is a type,
+ because eventually we may make that a different bit.
+
+ If this bit is set in an expression, so is TREE_SIDE_EFFECTS. */
+#define TREE_THIS_VOLATILE(NODE) ((NODE)->base.volatile_flag)
+
+/* Nonzero means this node will not trap. In an INDIRECT_REF, means
+ accessing the memory pointed to won't generate a trap. However,
+ this only applies to an object when used appropriately: it doesn't
+ mean that writing a READONLY mem won't trap. Similarly for
+ ALIGN_INDIRECT_REF and MISALIGNED_INDIRECT_REF.
+
+ In ARRAY_REF and ARRAY_RANGE_REF means that we know that the index
+ (or slice of the array) always belongs to the range of the array.
+ I.e. that the access will not trap, provided that the access to
+ the base to the array will not trap. */
+#define TREE_THIS_NOTRAP(NODE) ((NODE)->base.nothrow_flag)
+
+/* In a VAR_DECL, PARM_DECL or FIELD_DECL, or any kind of ..._REF node,
+ nonzero means it may not be the lhs of an assignment.
+ Nonzero in a FUNCTION_DECL means this function should be treated
+ as "const" function (can only read its arguments). */
+#define TREE_READONLY(NODE) (NON_TYPE_CHECK (NODE)->base.readonly_flag)
+
+/* Value of expression is constant. Always on in all ..._CST nodes. May
+ also appear in an expression or decl where the value is constant. */
+#define TREE_CONSTANT(NODE) (NON_TYPE_CHECK (NODE)->base.constant_flag)
+
+/* Nonzero if NODE, a type, has had its sizes gimplified. */
+#define TYPE_SIZES_GIMPLIFIED(NODE) \
+ (TYPE_CHECK (NODE)->base.constant_flag)
+
+/* In a decl (most significantly a FIELD_DECL), means an unsigned field. */
+#define DECL_UNSIGNED(NODE) \
+ (DECL_COMMON_CHECK (NODE)->base.unsigned_flag)
+
+/* In integral and pointer types, means an unsigned type. */
+#define TYPE_UNSIGNED(NODE) (TYPE_CHECK (NODE)->base.unsigned_flag)
+
+/* Nonzero in a VAR_DECL or STRING_CST means assembler code has been written.
+ Nonzero in a FUNCTION_DECL means that the function has been compiled.
+ This is interesting in an inline function, since it might not need
+ to be compiled separately.
+ Nonzero in a RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE or ENUMERAL_TYPE
+ if the sdb debugging info for the type has been written.
+ In a BLOCK node, nonzero if reorder_blocks has already seen this block.
+ In an SSA_NAME node, nonzero if the SSA_NAME occurs in an abnormal
+ PHI node. */
+#define TREE_ASM_WRITTEN(NODE) ((NODE)->base.asm_written_flag)
+
+/* Nonzero in a _DECL if the name is used in its scope.
+ Nonzero in an expr node means inhibit warning if value is unused.
+ In IDENTIFIER_NODEs, this means that some extern decl for this name
+ was used.
+ In a BLOCK, this means that the block contains variables that are used. */
+#define TREE_USED(NODE) ((NODE)->base.used_flag)
+
+/* In a FUNCTION_DECL, nonzero means a call to the function cannot throw
+ an exception. In a CALL_EXPR, nonzero means the call cannot throw. */
+#define TREE_NOTHROW(NODE) ((NODE)->base.nothrow_flag)
+
+/* In a CALL_EXPR, means that it's safe to use the target of the call
+ expansion as the return slot for a call that returns in memory. */
+#define CALL_EXPR_RETURN_SLOT_OPT(NODE) \
+ (CALL_EXPR_CHECK (NODE)->base.private_flag)
+
+/* In a RESULT_DECL or PARM_DECL, means that it is passed by invisible
+ reference (and the TREE_TYPE is a pointer to the true type). */
+#define DECL_BY_REFERENCE(NODE) (DECL_COMMON_CHECK (NODE)->base.private_flag)
+
+/* In a CALL_EXPR, means that the call is the jump from a thunk to the
+ thunked-to function. */
+#define CALL_FROM_THUNK_P(NODE) (CALL_EXPR_CHECK (NODE)->base.protected_flag)
+
+/* In a type, nonzero means that all objects of the type are guaranteed by the
+ language or front-end to be properly aligned, so we can indicate that a MEM
+ of this type is aligned at least to the alignment of the type, even if it
+ doesn't appear that it is. We see this, for example, in object-oriented
+ languages where a tag field may show this is an object of a more-aligned
+ variant of the more generic type.
+
+ In an SSA_NAME node, nonzero if the SSA_NAME node is on the SSA_NAME
+ freelist. */
+#define TYPE_ALIGN_OK(NODE) (TYPE_CHECK (NODE)->base.nothrow_flag)
+
+/* Used in classes in C++. */
+#define TREE_PRIVATE(NODE) ((NODE)->base.private_flag)
+/* Used in classes in C++. */
+#define TREE_PROTECTED(NODE) ((NODE)->base.protected_flag)
+
+/* Nonzero in a _DECL if the use of the name is defined as a
+ deprecated feature by __attribute__((deprecated)). */
+#define TREE_DEPRECATED(NODE) \
+ ((NODE)->base.deprecated_flag)
+
+/* Nonzero in an IDENTIFIER_NODE if the name is a local alias, whose
+ uses are to be substituted for uses of the TREE_CHAINed identifier. */
+#define IDENTIFIER_TRANSPARENT_ALIAS(NODE) \
+ (IDENTIFIER_NODE_CHECK (NODE)->base.deprecated_flag)
+
+/* In fixed-point types, means a saturating type. */
+#define TYPE_SATURATING(NODE) ((NODE)->base.saturating_flag)
+
+/* Nonzero in an expression, a decl, or a constant node if the node is
+ the result of a successful constant-folding. */
+#define EXPR_FOLDED(NODE) ((NODE)->base.expr_folded_flag)
+
+/* These flags are available for each language front end to use internally. */
+#define TREE_LANG_FLAG_0(NODE) ((NODE)->base.lang_flag_0)
+#define TREE_LANG_FLAG_1(NODE) ((NODE)->base.lang_flag_1)
+#define TREE_LANG_FLAG_2(NODE) ((NODE)->base.lang_flag_2)
+#define TREE_LANG_FLAG_3(NODE) ((NODE)->base.lang_flag_3)
+#define TREE_LANG_FLAG_4(NODE) ((NODE)->base.lang_flag_4)
+#define TREE_LANG_FLAG_5(NODE) ((NODE)->base.lang_flag_5)
+#define TREE_LANG_FLAG_6(NODE) ((NODE)->base.lang_flag_6)
+
+/* Define additional fields and accessors for nodes representing constants. */
+
+/* In an INTEGER_CST node. These two together make a 2-word integer.
+ If the data type is signed, the value is sign-extended to 2 words
+ even though not all of them may really be in use.
+ In an unsigned constant shorter than 2 words, the extra bits are 0. */
+#define TREE_INT_CST(NODE) (INTEGER_CST_CHECK (NODE)->int_cst.int_cst)
+#define TREE_INT_CST_LOW(NODE) (TREE_INT_CST (NODE).low)
+#define TREE_INT_CST_HIGH(NODE) (TREE_INT_CST (NODE).high)
+
+#define INT_CST_LT(A, B) \
+ (TREE_INT_CST_HIGH (A) < TREE_INT_CST_HIGH (B) \
+ || (TREE_INT_CST_HIGH (A) == TREE_INT_CST_HIGH (B) \
+ && TREE_INT_CST_LOW (A) < TREE_INT_CST_LOW (B)))
+
+#define INT_CST_LT_UNSIGNED(A, B) \
+ (((unsigned HOST_WIDE_INT) TREE_INT_CST_HIGH (A) \
+ < (unsigned HOST_WIDE_INT) TREE_INT_CST_HIGH (B)) \
+ || (((unsigned HOST_WIDE_INT) TREE_INT_CST_HIGH (A) \
+ == (unsigned HOST_WIDE_INT) TREE_INT_CST_HIGH (B)) \
+ && TREE_INT_CST_LOW (A) < TREE_INT_CST_LOW (B)))
+
+struct tree_int_cst GTY(())
+{
+ struct tree_common common;
+ double_int int_cst;
+};
+
+/* In a REAL_CST node. struct real_value is an opaque entity, with
+ manipulators defined in real.h. We don't want tree.h depending on
+ real.h and transitively on tm.h. */
+struct real_value;
+
+#define TREE_REAL_CST_PTR(NODE) (REAL_CST_CHECK (NODE)->real_cst.real_cst_ptr)
+#define TREE_REAL_CST(NODE) (*TREE_REAL_CST_PTR (NODE))
+
+struct tree_real_cst GTY(())
+{
+ struct tree_common common;
+ struct real_value * real_cst_ptr;
+};
+
+/* In a FIXED_CST node. */
+struct fixed_value;
+
+#define TREE_FIXED_CST_PTR(NODE) (FIXED_CST_CHECK (NODE)->fixed_cst.fixed_cst_ptr)
+#define TREE_FIXED_CST(NODE) (*TREE_FIXED_CST_PTR (NODE))
+
+struct tree_fixed_cst GTY(())
+{
+ struct tree_common common;
+ struct fixed_value * fixed_cst_ptr;
+};
+
+/* In a STRING_CST */
+#define TREE_STRING_LENGTH(NODE) (STRING_CST_CHECK (NODE)->string.length)
+#define TREE_STRING_POINTER(NODE) \
+ ((const char *)(STRING_CST_CHECK (NODE)->string.str))
+
+struct tree_string GTY(())
+{
+ struct tree_common common;
+ int length;
+ char str[1];
+};
+
+/* In a COMPLEX_CST node. */
+#define TREE_REALPART(NODE) (COMPLEX_CST_CHECK (NODE)->complex.real)
+#define TREE_IMAGPART(NODE) (COMPLEX_CST_CHECK (NODE)->complex.imag)
+
+struct tree_complex GTY(())
+{
+ struct tree_common common;
+ tree real;
+ tree imag;
+};
+
+/* In a VECTOR_CST node. */
+#define TREE_VECTOR_CST_ELTS(NODE) (VECTOR_CST_CHECK (NODE)->vector.elements)
+
+struct tree_vector GTY(())
+{
+ struct tree_common common;
+ tree elements;
+};
+
+#include "symtab.h"
+
+/* Define fields and accessors for some special-purpose tree nodes. */
+
+#define IDENTIFIER_LENGTH(NODE) \
+ (IDENTIFIER_NODE_CHECK (NODE)->identifier.id.len)
+#define IDENTIFIER_POINTER(NODE) \
+ ((const char *) IDENTIFIER_NODE_CHECK (NODE)->identifier.id.str)
+#define IDENTIFIER_HASH_VALUE(NODE) \
+ (IDENTIFIER_NODE_CHECK (NODE)->identifier.id.hash_value)
+
+/* Translate a hash table identifier pointer to a tree_identifier
+ pointer, and vice versa. */
+
+#define HT_IDENT_TO_GCC_IDENT(NODE) \
+ ((tree) ((char *) (NODE) - sizeof (struct tree_common)))
+#define GCC_IDENT_TO_HT_IDENT(NODE) (&((struct tree_identifier *) (NODE))->id)
+
+struct tree_identifier GTY(())
+{
+ struct tree_common common;
+ struct ht_identifier id;
+};
+
+/* In a TREE_LIST node. */
+#define TREE_PURPOSE(NODE) (TREE_LIST_CHECK (NODE)->list.purpose)
+#define TREE_VALUE(NODE) (TREE_LIST_CHECK (NODE)->list.value)
+
+struct tree_list GTY(())
+{
+ struct tree_common common;
+ tree purpose;
+ tree value;
+};
+
+/* In a TREE_VEC node. */
+#define TREE_VEC_LENGTH(NODE) (TREE_VEC_CHECK (NODE)->vec.length)
+#define TREE_VEC_END(NODE) \
+ ((void) TREE_VEC_CHECK (NODE), &((NODE)->vec.a[(NODE)->vec.length]))
+
+#define TREE_VEC_ELT(NODE,I) TREE_VEC_ELT_CHECK (NODE, I)
+
+struct tree_vec GTY(())
+{
+ struct tree_common common;
+ int length;
+ tree GTY ((length ("TREE_VEC_LENGTH ((tree)&%h)"))) a[1];
+};
+
+/* In a CONSTRUCTOR node. */
+#define CONSTRUCTOR_ELTS(NODE) (CONSTRUCTOR_CHECK (NODE)->constructor.elts)
+#define CONSTRUCTOR_ELT(NODE,IDX) \
+ (VEC_index (constructor_elt, CONSTRUCTOR_ELTS (NODE), IDX))
+#define CONSTRUCTOR_NELTS(NODE) (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (NODE)))
+
+/* Iterate through the vector V of CONSTRUCTOR_ELT elements, yielding the
+ value of each element (stored within VAL). IX must be a scratch variable
+ of unsigned integer type. */
+#define FOR_EACH_CONSTRUCTOR_VALUE(V, IX, VAL) \
+ for (IX = 0; (IX >= VEC_length (constructor_elt, V)) \
+ ? false \
+ : ((VAL = VEC_index (constructor_elt, V, IX)->value), \
+ true); \
+ (IX)++)
+
+/* Iterate through the vector V of CONSTRUCTOR_ELT elements, yielding both
+ the value of each element (stored within VAL) and its index (stored
+ within INDEX). IX must be a scratch variable of unsigned integer type. */
+#define FOR_EACH_CONSTRUCTOR_ELT(V, IX, INDEX, VAL) \
+ for (IX = 0; (IX >= VEC_length (constructor_elt, V)) \
+ ? false \
+ : ((VAL = VEC_index (constructor_elt, V, IX)->value), \
+ (INDEX = VEC_index (constructor_elt, V, IX)->index), \
+ true); \
+ (IX)++)
+
+/* Append a new constructor element to V, with the specified INDEX and VAL. */
+#define CONSTRUCTOR_APPEND_ELT(V, INDEX, VALUE) \
+ do { \
+ constructor_elt *_ce___ = VEC_safe_push (constructor_elt, gc, V, NULL); \
+ _ce___->index = INDEX; \
+ _ce___->value = VALUE; \
+ } while (0)
+
+/* A single element of a CONSTRUCTOR. VALUE holds the actual value of the
+ element. INDEX can optionally design the position of VALUE: in arrays,
+ it is the index where VALUE has to be placed; in structures, it is the
+ FIELD_DECL of the member. */
+typedef struct constructor_elt_d GTY(())
+{
+ tree index;
+ tree value;
+} constructor_elt;
+
+DEF_VEC_O(constructor_elt);
+DEF_VEC_ALLOC_O(constructor_elt,gc);
+
+struct tree_constructor GTY(())
+{
+ struct tree_common common;
+ VEC(constructor_elt,gc) *elts;
+};
+
+/* Define fields and accessors for some nodes that represent expressions. */
+
+/* Nonzero if NODE is an empty statement (NOP_EXPR <0>). */
+#define IS_EMPTY_STMT(NODE) (TREE_CODE (NODE) == NOP_EXPR \
+ && VOID_TYPE_P (TREE_TYPE (NODE)) \
+ && integer_zerop (TREE_OPERAND (NODE, 0)))
+
+/* In ordinary expression nodes. */
+#define TREE_OPERAND_LENGTH(NODE) tree_operand_length (NODE)
+#define TREE_OPERAND(NODE, I) TREE_OPERAND_CHECK (NODE, I)
+
+/* In a tcc_vl_exp node, operand 0 is an INT_CST node holding the operand
+ length. Its value includes the length operand itself; that is,
+ the minimum valid length is 1.
+ Note that we have to bypass the use of TREE_OPERAND to access
+ that field to avoid infinite recursion in expanding the macros. */
+#define VL_EXP_OPERAND_LENGTH(NODE) \
+ ((int)TREE_INT_CST_LOW (VL_EXP_CHECK (NODE)->exp.operands[0]))
+
+/* In a LOOP_EXPR node. */
+#define LOOP_EXPR_BODY(NODE) TREE_OPERAND_CHECK_CODE (NODE, LOOP_EXPR, 0)
+
+/* The source location of this expression. Non-tree_exp nodes such as
+ decls and constants can be shared among multiple locations, so
+ return nothing. */
+#define EXPR_LOCATION(NODE) (EXPR_P ((NODE)) ? (NODE)->exp.locus : UNKNOWN_LOCATION)
+#define SET_EXPR_LOCATION(NODE, LOCUS) EXPR_CHECK ((NODE))->exp.locus = (LOCUS)
+#define EXPR_HAS_LOCATION(NODE) (EXPR_LOCATION (NODE) != UNKNOWN_LOCATION)
+#define EXPR_LOCUS(NODE) (EXPR_P (NODE) \
+ ? CONST_CAST (source_location *, &(NODE)->exp.locus) \
+ : (source_location *) NULL)
+#define SET_EXPR_LOCUS(NODE, FROM) set_expr_locus ((NODE), (FROM))
+#define EXPR_FILENAME(NODE) LOCATION_FILE (EXPR_CHECK ((NODE))->exp.locus)
+#define EXPR_LINENO(NODE) LOCATION_LINE (EXPR_CHECK (NODE)->exp.locus)
+
+/* True if a tree is an expression or statement that can have a
+ location. */
+#define CAN_HAVE_LOCATION_P(NODE) (EXPR_P (NODE))
+
+extern void protected_set_expr_location (tree, location_t);
+
+/* In a TARGET_EXPR node. */
+#define TARGET_EXPR_SLOT(NODE) TREE_OPERAND_CHECK_CODE (NODE, TARGET_EXPR, 0)
+#define TARGET_EXPR_INITIAL(NODE) TREE_OPERAND_CHECK_CODE (NODE, TARGET_EXPR, 1)
+#define TARGET_EXPR_CLEANUP(NODE) TREE_OPERAND_CHECK_CODE (NODE, TARGET_EXPR, 2)
+
+/* DECL_EXPR accessor. This gives access to the DECL associated with
+ the given declaration statement. */
+#define DECL_EXPR_DECL(NODE) TREE_OPERAND (DECL_EXPR_CHECK (NODE), 0)
+
+#define EXIT_EXPR_COND(NODE) TREE_OPERAND (EXIT_EXPR_CHECK (NODE), 0)
+
+/* SWITCH_EXPR accessors. These give access to the condition, body and
+ original condition type (before any compiler conversions)
+ of the switch statement, respectively. */
+#define SWITCH_COND(NODE) TREE_OPERAND (SWITCH_EXPR_CHECK (NODE), 0)
+#define SWITCH_BODY(NODE) TREE_OPERAND (SWITCH_EXPR_CHECK (NODE), 1)
+#define SWITCH_LABELS(NODE) TREE_OPERAND (SWITCH_EXPR_CHECK (NODE), 2)
+
+/* CASE_LABEL_EXPR accessors. These give access to the high and low values
+ of a case label, respectively. */
+#define CASE_LOW(NODE) TREE_OPERAND (CASE_LABEL_EXPR_CHECK (NODE), 0)
+#define CASE_HIGH(NODE) TREE_OPERAND (CASE_LABEL_EXPR_CHECK (NODE), 1)
+#define CASE_LABEL(NODE) TREE_OPERAND (CASE_LABEL_EXPR_CHECK (NODE), 2)
+
+/* The operands of a TARGET_MEM_REF. */
+#define TMR_SYMBOL(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 0))
+#define TMR_BASE(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 1))
+#define TMR_INDEX(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 2))
+#define TMR_STEP(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 3))
+#define TMR_OFFSET(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 4))
+#define TMR_ORIGINAL(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 5))
+#define TMR_TAG(NODE) (TREE_OPERAND (TARGET_MEM_REF_CHECK (NODE), 6))
+
+/* The operands of a BIND_EXPR. */
+#define BIND_EXPR_VARS(NODE) (TREE_OPERAND (BIND_EXPR_CHECK (NODE), 0))
+#define BIND_EXPR_BODY(NODE) (TREE_OPERAND (BIND_EXPR_CHECK (NODE), 1))
+#define BIND_EXPR_BLOCK(NODE) (TREE_OPERAND (BIND_EXPR_CHECK (NODE), 2))
+
+/* GOTO_EXPR accessor. This gives access to the label associated with
+ a goto statement. */
+#define GOTO_DESTINATION(NODE) TREE_OPERAND ((NODE), 0)
+
+/* ASM_EXPR accessors. ASM_STRING returns a STRING_CST for the
+ instruction (e.g., "mov x, y"). ASM_OUTPUTS, ASM_INPUTS, and
+ ASM_CLOBBERS represent the outputs, inputs, and clobbers for the
+ statement. */
+#define ASM_STRING(NODE) TREE_OPERAND (ASM_EXPR_CHECK (NODE), 0)
+#define ASM_OUTPUTS(NODE) TREE_OPERAND (ASM_EXPR_CHECK (NODE), 1)
+#define ASM_INPUTS(NODE) TREE_OPERAND (ASM_EXPR_CHECK (NODE), 2)
+#define ASM_CLOBBERS(NODE) TREE_OPERAND (ASM_EXPR_CHECK (NODE), 3)
+/* Nonzero if we want to create an ASM_INPUT instead of an
+ ASM_OPERAND with no operands. */
+#define ASM_INPUT_P(NODE) (ASM_EXPR_CHECK (NODE)->base.static_flag)
+#define ASM_VOLATILE_P(NODE) (ASM_EXPR_CHECK (NODE)->base.public_flag)
+
+/* COND_EXPR accessors. */
+#define COND_EXPR_COND(NODE) (TREE_OPERAND (COND_EXPR_CHECK (NODE), 0))
+#define COND_EXPR_THEN(NODE) (TREE_OPERAND (COND_EXPR_CHECK (NODE), 1))
+#define COND_EXPR_ELSE(NODE) (TREE_OPERAND (COND_EXPR_CHECK (NODE), 2))
+
+/* Accessors for the chains of recurrences. */
+#define CHREC_VAR(NODE) TREE_OPERAND (POLYNOMIAL_CHREC_CHECK (NODE), 0)
+#define CHREC_LEFT(NODE) TREE_OPERAND (POLYNOMIAL_CHREC_CHECK (NODE), 1)
+#define CHREC_RIGHT(NODE) TREE_OPERAND (POLYNOMIAL_CHREC_CHECK (NODE), 2)
+#define CHREC_VARIABLE(NODE) TREE_INT_CST_LOW (CHREC_VAR (NODE))
+
+/* LABEL_EXPR accessor. This gives access to the label associated with
+ the given label expression. */
+#define LABEL_EXPR_LABEL(NODE) TREE_OPERAND (LABEL_EXPR_CHECK (NODE), 0)
+
+/* VDEF_EXPR accessors are specified in tree-flow.h, along with the other
+ accessors for SSA operands. */
+
+/* CATCH_EXPR accessors. */
+#define CATCH_TYPES(NODE) TREE_OPERAND (CATCH_EXPR_CHECK (NODE), 0)
+#define CATCH_BODY(NODE) TREE_OPERAND (CATCH_EXPR_CHECK (NODE), 1)
+
+/* EH_FILTER_EXPR accessors. */
+#define EH_FILTER_TYPES(NODE) TREE_OPERAND (EH_FILTER_EXPR_CHECK (NODE), 0)
+#define EH_FILTER_FAILURE(NODE) TREE_OPERAND (EH_FILTER_EXPR_CHECK (NODE), 1)
+#define EH_FILTER_MUST_NOT_THROW(NODE) \
+ (EH_FILTER_EXPR_CHECK (NODE)->base.static_flag)
+
+/* CHANGE_DYNAMIC_TYPE_EXPR accessors. */
+#define CHANGE_DYNAMIC_TYPE_NEW_TYPE(NODE) \
+ TREE_OPERAND (CHANGE_DYNAMIC_TYPE_EXPR_CHECK (NODE), 0)
+#define CHANGE_DYNAMIC_TYPE_LOCATION(NODE) \
+ TREE_OPERAND (CHANGE_DYNAMIC_TYPE_EXPR_CHECK (NODE), 1)
+
+/* OBJ_TYPE_REF accessors. */
+#define OBJ_TYPE_REF_EXPR(NODE) TREE_OPERAND (OBJ_TYPE_REF_CHECK (NODE), 0)
+#define OBJ_TYPE_REF_OBJECT(NODE) TREE_OPERAND (OBJ_TYPE_REF_CHECK (NODE), 1)
+#define OBJ_TYPE_REF_TOKEN(NODE) TREE_OPERAND (OBJ_TYPE_REF_CHECK (NODE), 2)
+
+/* ASSERT_EXPR accessors. */
+#define ASSERT_EXPR_VAR(NODE) TREE_OPERAND (ASSERT_EXPR_CHECK (NODE), 0)
+#define ASSERT_EXPR_COND(NODE) TREE_OPERAND (ASSERT_EXPR_CHECK (NODE), 1)
+
+/* CALL_EXPR accessors.
+ */
+#define CALL_EXPR_FN(NODE) TREE_OPERAND (CALL_EXPR_CHECK (NODE), 1)
+#define CALL_EXPR_STATIC_CHAIN(NODE) TREE_OPERAND (CALL_EXPR_CHECK (NODE), 2)
+#define CALL_EXPR_ARGS(NODE) call_expr_arglist (NODE)
+#define CALL_EXPR_ARG(NODE, I) TREE_OPERAND (CALL_EXPR_CHECK (NODE), (I) + 3)
+#define call_expr_nargs(NODE) (VL_EXP_OPERAND_LENGTH(NODE) - 3)
+
+/* CALL_EXPR_ARGP returns a pointer to the argument vector for NODE.
+ We can't use &CALL_EXPR_ARG (NODE, 0) because that will complain if
+ the argument count is zero when checking is enabled. Instead, do
+ the pointer arithmetic to advance past the 3 fixed operands in a
+ CALL_EXPR. That produces a valid pointer to just past the end of the
+ operand array, even if it's not valid to dereference it. */
+#define CALL_EXPR_ARGP(NODE) \
+ (&(TREE_OPERAND (CALL_EXPR_CHECK (NODE), 0)) + 3)
+
+/* OpenMP directive and clause accessors. */
+
+#define OMP_BODY(NODE) \
+ TREE_OPERAND (TREE_RANGE_CHECK (NODE, OMP_PARALLEL, OMP_CRITICAL), 0)
+#define OMP_CLAUSES(NODE) \
+ TREE_OPERAND (TREE_RANGE_CHECK (NODE, OMP_PARALLEL, OMP_SINGLE), 1)
+
+#define OMP_PARALLEL_BODY(NODE) TREE_OPERAND (OMP_PARALLEL_CHECK (NODE), 0)
+#define OMP_PARALLEL_CLAUSES(NODE) TREE_OPERAND (OMP_PARALLEL_CHECK (NODE), 1)
+
+#define OMP_TASK_BODY(NODE) TREE_OPERAND (OMP_TASK_CHECK (NODE), 0)
+#define OMP_TASK_CLAUSES(NODE) TREE_OPERAND (OMP_TASK_CHECK (NODE), 1)
+
+#define OMP_TASKREG_CHECK(NODE) TREE_RANGE_CHECK (NODE, OMP_PARALLEL, OMP_TASK)
+#define OMP_TASKREG_BODY(NODE) TREE_OPERAND (OMP_TASKREG_CHECK (NODE), 0)
+#define OMP_TASKREG_CLAUSES(NODE) TREE_OPERAND (OMP_TASKREG_CHECK (NODE), 1)
+
+#define OMP_FOR_BODY(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 0)
+#define OMP_FOR_CLAUSES(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 1)
+#define OMP_FOR_INIT(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 2)
+#define OMP_FOR_COND(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 3)
+#define OMP_FOR_INCR(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 4)
+#define OMP_FOR_PRE_BODY(NODE) TREE_OPERAND (OMP_FOR_CHECK (NODE), 5)
+
+#define OMP_SECTIONS_BODY(NODE) TREE_OPERAND (OMP_SECTIONS_CHECK (NODE), 0)
+#define OMP_SECTIONS_CLAUSES(NODE) TREE_OPERAND (OMP_SECTIONS_CHECK (NODE), 1)
+
+#define OMP_SECTION_BODY(NODE) TREE_OPERAND (OMP_SECTION_CHECK (NODE), 0)
+
+#define OMP_SINGLE_BODY(NODE) TREE_OPERAND (OMP_SINGLE_CHECK (NODE), 0)
+#define OMP_SINGLE_CLAUSES(NODE) TREE_OPERAND (OMP_SINGLE_CHECK (NODE), 1)
+
+#define OMP_MASTER_BODY(NODE) TREE_OPERAND (OMP_MASTER_CHECK (NODE), 0)
+
+#define OMP_ORDERED_BODY(NODE) TREE_OPERAND (OMP_ORDERED_CHECK (NODE), 0)
+
+#define OMP_CRITICAL_BODY(NODE) TREE_OPERAND (OMP_CRITICAL_CHECK (NODE), 0)
+#define OMP_CRITICAL_NAME(NODE) TREE_OPERAND (OMP_CRITICAL_CHECK (NODE), 1)
+
+#define OMP_CLAUSE_CHAIN(NODE) TREE_CHAIN (OMP_CLAUSE_CHECK (NODE))
+#define OMP_CLAUSE_DECL(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_RANGE_CHECK (OMP_CLAUSE_CHECK (NODE), \
+ OMP_CLAUSE_PRIVATE, \
+ OMP_CLAUSE_COPYPRIVATE), 0)
+
+/* True on an OMP_SECTION statement that was the last lexical member.
+ This status is meaningful in the implementation of lastprivate. */
+#define OMP_SECTION_LAST(NODE) \
+ (OMP_SECTION_CHECK (NODE)->base.private_flag)
+
+/* True on an OMP_PARALLEL statement if it represents an explicit
+ combined parallel work-sharing constructs. */
+#define OMP_PARALLEL_COMBINED(NODE) \
+ (OMP_PARALLEL_CHECK (NODE)->base.private_flag)
+
+/* True on a PRIVATE clause if its decl is kept around for debugging
+ information only and its DECL_VALUE_EXPR is supposed to point
+ to what it has been remapped to. */
+#define OMP_CLAUSE_PRIVATE_DEBUG(NODE) \
+ (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_PRIVATE)->base.public_flag)
+
+/* True on a PRIVATE clause if ctor needs access to outer region's
+ variable. */
+#define OMP_CLAUSE_PRIVATE_OUTER_REF(NODE) \
+ TREE_PRIVATE (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_PRIVATE))
+
+/* True on a LASTPRIVATE clause if a FIRSTPRIVATE clause for the same
+ decl is present in the chain. */
+#define OMP_CLAUSE_LASTPRIVATE_FIRSTPRIVATE(NODE) \
+ (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_LASTPRIVATE)->base.public_flag)
+#define OMP_CLAUSE_LASTPRIVATE_STMT(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, \
+ OMP_CLAUSE_LASTPRIVATE),\
+ 1)
+#define OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ(NODE) \
+ (OMP_CLAUSE_CHECK (NODE))->omp_clause.gimple_reduction_init
+
+#define OMP_CLAUSE_IF_EXPR(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_IF), 0)
+#define OMP_CLAUSE_NUM_THREADS_EXPR(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_NUM_THREADS),0)
+#define OMP_CLAUSE_SCHEDULE_CHUNK_EXPR(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_SCHEDULE), 0)
+
+#define OMP_CLAUSE_COLLAPSE_EXPR(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_COLLAPSE), 0)
+#define OMP_CLAUSE_COLLAPSE_ITERVAR(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_COLLAPSE), 1)
+#define OMP_CLAUSE_COLLAPSE_COUNT(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_COLLAPSE), 2)
+
+#define OMP_CLAUSE_REDUCTION_CODE(NODE) \
+ (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_REDUCTION)->omp_clause.subcode.reduction_code)
+#define OMP_CLAUSE_REDUCTION_INIT(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_REDUCTION), 1)
+#define OMP_CLAUSE_REDUCTION_MERGE(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_REDUCTION), 2)
+#define OMP_CLAUSE_REDUCTION_GIMPLE_INIT(NODE) \
+ (OMP_CLAUSE_CHECK (NODE))->omp_clause.gimple_reduction_init
+#define OMP_CLAUSE_REDUCTION_GIMPLE_MERGE(NODE) \
+ (OMP_CLAUSE_CHECK (NODE))->omp_clause.gimple_reduction_merge
+#define OMP_CLAUSE_REDUCTION_PLACEHOLDER(NODE) \
+ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_REDUCTION), 3)
+
+enum omp_clause_schedule_kind
+{
+ OMP_CLAUSE_SCHEDULE_STATIC,
+ OMP_CLAUSE_SCHEDULE_DYNAMIC,
+ OMP_CLAUSE_SCHEDULE_GUIDED,
+ OMP_CLAUSE_SCHEDULE_AUTO,
+ OMP_CLAUSE_SCHEDULE_RUNTIME
+};
+
+#define OMP_CLAUSE_SCHEDULE_KIND(NODE) \
+ (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_SCHEDULE)->omp_clause.subcode.schedule_kind)
+
+enum omp_clause_default_kind
+{
+ OMP_CLAUSE_DEFAULT_UNSPECIFIED,
+ OMP_CLAUSE_DEFAULT_SHARED,
+ OMP_CLAUSE_DEFAULT_NONE,
+ OMP_CLAUSE_DEFAULT_PRIVATE,
+ OMP_CLAUSE_DEFAULT_FIRSTPRIVATE
+};
+
+#define OMP_CLAUSE_DEFAULT_KIND(NODE) \
+ (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_DEFAULT)->omp_clause.subcode.default_kind)
+
+struct tree_exp GTY(())
+{
+ struct tree_common common;
+ location_t locus;
+ tree block;
+ tree GTY ((special ("tree_exp"),
+ desc ("TREE_CODE ((tree) &%0)")))
+ operands[1];
+};
+
+/* SSA_NAME accessors. */
+
+/* Returns the variable being referenced. Once released, this is the
+ only field that can be relied upon. */
+#define SSA_NAME_VAR(NODE) SSA_NAME_CHECK (NODE)->ssa_name.var
+
+/* Returns the statement which defines this SSA name. */
+#define SSA_NAME_DEF_STMT(NODE) SSA_NAME_CHECK (NODE)->ssa_name.def_stmt
+
+/* Returns the SSA version number of this SSA name. Note that in
+ tree SSA, version numbers are not per variable and may be recycled. */
+#define SSA_NAME_VERSION(NODE) SSA_NAME_CHECK (NODE)->ssa_name.version
+
+/* Nonzero if this SSA name occurs in an abnormal PHI. SSA_NAMES are
+ never output, so we can safely use the ASM_WRITTEN_FLAG for this
+ status bit. */
+#define SSA_NAME_OCCURS_IN_ABNORMAL_PHI(NODE) \
+ SSA_NAME_CHECK (NODE)->base.asm_written_flag
+
+/* Nonzero if this SSA_NAME expression is currently on the free list of
+ SSA_NAMES. Using NOTHROW_FLAG seems reasonably safe since throwing
+ has no meaning for an SSA_NAME. */
+#define SSA_NAME_IN_FREE_LIST(NODE) \
+ SSA_NAME_CHECK (NODE)->base.nothrow_flag
+
+/* Nonzero if this SSA_NAME is the default definition for the
+ underlying symbol. A default SSA name is created for symbol S if
+ the very first reference to S in the function is a read operation.
+ Default definitions are always created by an empty statement and
+ belong to no basic block. */
+#define SSA_NAME_IS_DEFAULT_DEF(NODE) \
+ SSA_NAME_CHECK (NODE)->base.default_def_flag
+
+/* Attributes for SSA_NAMEs for pointer-type variables. */
+#define SSA_NAME_PTR_INFO(N) \
+ SSA_NAME_CHECK (N)->ssa_name.ptr_info
+
+/* Get the value of this SSA_NAME, if available. */
+#define SSA_NAME_VALUE(N) \
+ SSA_NAME_CHECK (N)->ssa_name.value_handle
+
+#ifndef _TREE_FLOW_H
+struct ptr_info_def;
+#endif
+
+
+
+/* Immediate use linking structure. This structure is used for maintaining
+ a doubly linked list of uses of an SSA_NAME. */
+typedef struct ssa_use_operand_d GTY(())
+{
+ struct ssa_use_operand_d* GTY((skip(""))) prev;
+ struct ssa_use_operand_d* GTY((skip(""))) next;
+ /* Immediate uses for a given SSA name are maintained as a cyclic
+ list. To recognize the root of this list, the location field
+ needs to point to the original SSA name. Since statements and
+ SSA names are of different data types, we need this union. See
+ the explanation in struct immediate_use_iterator_d. */
+ union { gimple stmt; tree ssa_name; } GTY((skip(""))) loc;
+ tree *GTY((skip(""))) use;
+} ssa_use_operand_t;
+
+/* Return the immediate_use information for an SSA_NAME. */
+#define SSA_NAME_IMM_USE_NODE(NODE) SSA_NAME_CHECK (NODE)->ssa_name.imm_uses
+
+struct tree_ssa_name GTY(())
+{
+ struct tree_common common;
+
+ /* _DECL wrapped by this SSA name. */
+ tree var;
+
+ /* Statement that defines this SSA name. */
+ gimple def_stmt;
+
+ /* SSA version number. */
+ unsigned int version;
+
+ /* Pointer attributes used for alias analysis. */
+ struct ptr_info_def *ptr_info;
+
+ /* Value for SSA name used by various passes.
+
+ Right now only invariants are allowed to persist beyond a pass in
+ this field; in the future we will allow VALUE_HANDLEs to persist
+ as well. */
+ tree value_handle;
+
+ /* Immediate uses list for this SSA_NAME. */
+ struct ssa_use_operand_d imm_uses;
+};
+
+struct phi_arg_d GTY(())
+{
+ /* imm_use MUST be the first element in struct because we do some
+ pointer arithmetic with it. See phi_arg_index_from_use. */
+ struct ssa_use_operand_d imm_use;
+ tree def;
+ location_t locus;
+};
+
+
+#define OMP_CLAUSE_CODE(NODE) \
+ (OMP_CLAUSE_CHECK (NODE))->omp_clause.code
+
+#define OMP_CLAUSE_SET_CODE(NODE, CODE) \
+ ((OMP_CLAUSE_CHECK (NODE))->omp_clause.code = (CODE))
+
+#define OMP_CLAUSE_CODE(NODE) \
+ (OMP_CLAUSE_CHECK (NODE))->omp_clause.code
+
+#define OMP_CLAUSE_OPERAND(NODE, I) \
+ OMP_CLAUSE_ELT_CHECK (NODE, I)
+
+struct tree_omp_clause GTY(())
+{
+ struct tree_common common;
+ enum omp_clause_code code;
+ union omp_clause_subcode {
+ enum omp_clause_default_kind default_kind;
+ enum omp_clause_schedule_kind schedule_kind;
+ enum tree_code reduction_code;
+ } GTY ((skip)) subcode;
+
+ /* The gimplification of OMP_CLAUSE_REDUCTION_{INIT,MERGE} for omp-low's
+ usage. */
+ gimple_seq gimple_reduction_init;
+ gimple_seq gimple_reduction_merge;
+
+ tree GTY ((length ("omp_clause_num_ops[OMP_CLAUSE_CODE ((tree)&%h)]"))) ops[1];
+};
+
+
+struct varray_head_tag;
+
+/* In a BLOCK node. */
+#define BLOCK_VARS(NODE) (BLOCK_CHECK (NODE)->block.vars)
+#define BLOCK_NONLOCALIZED_VARS(NODE) (BLOCK_CHECK (NODE)->block.nonlocalized_vars)
+#define BLOCK_NUM_NONLOCALIZED_VARS(NODE) VEC_length (tree, BLOCK_NONLOCALIZED_VARS (NODE))
+#define BLOCK_NONLOCALIZED_VAR(NODE,N) VEC_index (tree, BLOCK_NONLOCALIZED_VARS (NODE), N)
+#define BLOCK_SUBBLOCKS(NODE) (BLOCK_CHECK (NODE)->block.subblocks)
+#define BLOCK_SUPERCONTEXT(NODE) (BLOCK_CHECK (NODE)->block.supercontext)
+/* Note: when changing this, make sure to find the places
+ that use chainon or nreverse. */
+#define BLOCK_CHAIN(NODE) TREE_CHAIN (BLOCK_CHECK (NODE))
+#define BLOCK_ABSTRACT_ORIGIN(NODE) (BLOCK_CHECK (NODE)->block.abstract_origin)
+#define BLOCK_ABSTRACT(NODE) (BLOCK_CHECK (NODE)->block.abstract_flag)
+
+/* An index number for this block. These values are not guaranteed to
+ be unique across functions -- whether or not they are depends on
+ the debugging output format in use. */
+#define BLOCK_NUMBER(NODE) (BLOCK_CHECK (NODE)->block.block_num)
+
+/* If block reordering splits a lexical block into discontiguous
+ address ranges, we'll make a copy of the original block.
+
+ Note that this is logically distinct from BLOCK_ABSTRACT_ORIGIN.
+ In that case, we have one source block that has been replicated
+ (through inlining or unrolling) into many logical blocks, and that
+ these logical blocks have different physical variables in them.
+
+ In this case, we have one logical block split into several
+ non-contiguous address ranges. Most debug formats can't actually
+ represent this idea directly, so we fake it by creating multiple
+ logical blocks with the same variables in them. However, for those
+ that do support non-contiguous regions, these allow the original
+ logical block to be reconstructed, along with the set of address
+ ranges.
+
+ One of the logical block fragments is arbitrarily chosen to be
+ the ORIGIN. The other fragments will point to the origin via
+ BLOCK_FRAGMENT_ORIGIN; the origin itself will have this pointer
+ be null. The list of fragments will be chained through
+ BLOCK_FRAGMENT_CHAIN from the origin. */
+
+#define BLOCK_FRAGMENT_ORIGIN(NODE) (BLOCK_CHECK (NODE)->block.fragment_origin)
+#define BLOCK_FRAGMENT_CHAIN(NODE) (BLOCK_CHECK (NODE)->block.fragment_chain)
+
+/* For an inlined function, this gives the location where it was called
+ from. This is only set in the top level block, which corresponds to the
+ inlined function scope. This is used in the debug output routines. */
+
+#define BLOCK_SOURCE_LOCATION(NODE) (BLOCK_CHECK (NODE)->block.locus)
+
+struct tree_block GTY(())
+{
+ struct tree_common common;
+
+ unsigned abstract_flag : 1;
+ unsigned block_num : 31;
+
+ location_t locus;
+
+ tree vars;
+ VEC(tree,gc) *nonlocalized_vars;
+
+ tree subblocks;
+ tree supercontext;
+ tree abstract_origin;
+ tree fragment_origin;
+ tree fragment_chain;
+};
+
+/* Define fields and accessors for nodes representing data types. */
+
+/* See tree.def for documentation of the use of these fields.
+ Look at the documentation of the various ..._TYPE tree codes.
+
+ Note that the type.values, type.minval, and type.maxval fields are
+ overloaded and used for different macros in different kinds of types.
+ Each macro must check to ensure the tree node is of the proper kind of
+ type. Note also that some of the front-ends also overload these fields,
+ so they must be checked as well. */
+
+#define TYPE_UID(NODE) (TYPE_CHECK (NODE)->type.uid)
+#define TYPE_SIZE(NODE) (TYPE_CHECK (NODE)->type.size)
+#define TYPE_SIZE_UNIT(NODE) (TYPE_CHECK (NODE)->type.size_unit)
+#define TYPE_VALUES(NODE) (ENUMERAL_TYPE_CHECK (NODE)->type.values)
+#define TYPE_DOMAIN(NODE) (ARRAY_TYPE_CHECK (NODE)->type.values)
+#define TYPE_FIELDS(NODE) (RECORD_OR_UNION_CHECK (NODE)->type.values)
+#define TYPE_CACHED_VALUES(NODE) (TYPE_CHECK(NODE)->type.values)
+#define TYPE_ORIG_SIZE_TYPE(NODE) \
+ (INTEGER_TYPE_CHECK (NODE)->type.values \
+ ? TREE_TYPE ((NODE)->type.values) : NULL_TREE)
+#define TYPE_METHODS(NODE) (RECORD_OR_UNION_CHECK (NODE)->type.maxval)
+#define TYPE_VFIELD(NODE) (RECORD_OR_UNION_CHECK (NODE)->type.minval)
+#define TYPE_ARG_TYPES(NODE) (FUNC_OR_METHOD_CHECK (NODE)->type.values)
+#define TYPE_METHOD_BASETYPE(NODE) (FUNC_OR_METHOD_CHECK (NODE)->type.maxval)
+#define TYPE_OFFSET_BASETYPE(NODE) (OFFSET_TYPE_CHECK (NODE)->type.maxval)
+#define TYPE_POINTER_TO(NODE) (TYPE_CHECK (NODE)->type.pointer_to)
+#define TYPE_REFERENCE_TO(NODE) (TYPE_CHECK (NODE)->type.reference_to)
+#define TYPE_NEXT_PTR_TO(NODE) (POINTER_TYPE_CHECK (NODE)->type.minval)
+#define TYPE_NEXT_REF_TO(NODE) (REFERENCE_TYPE_CHECK (NODE)->type.minval)
+#define TYPE_MIN_VALUE(NODE) (NUMERICAL_TYPE_CHECK (NODE)->type.minval)
+#define TYPE_MAX_VALUE(NODE) (NUMERICAL_TYPE_CHECK (NODE)->type.maxval)
+#define TYPE_PRECISION(NODE) (TYPE_CHECK (NODE)->type.precision)
+#define TYPE_SYMTAB_ADDRESS(NODE) (TYPE_CHECK (NODE)->type.symtab.address)
+#define TYPE_SYMTAB_POINTER(NODE) (TYPE_CHECK (NODE)->type.symtab.pointer)
+#define TYPE_SYMTAB_DIE(NODE) (TYPE_CHECK (NODE)->type.symtab.die)
+#define TYPE_NAME(NODE) (TYPE_CHECK (NODE)->type.name)
+#define TYPE_NEXT_VARIANT(NODE) (TYPE_CHECK (NODE)->type.next_variant)
+#define TYPE_MAIN_VARIANT(NODE) (TYPE_CHECK (NODE)->type.main_variant)
+#define TYPE_CONTEXT(NODE) (TYPE_CHECK (NODE)->type.context)
+
+/* Vector types need to check target flags to determine type. */
+extern enum machine_mode vector_type_mode (const_tree);
+#define TYPE_MODE(NODE) \
+ (TREE_CODE (TYPE_CHECK (NODE)) == VECTOR_TYPE \
+ ? vector_type_mode (NODE) : (NODE)->type.mode)
+#define SET_TYPE_MODE(NODE, MODE) \
+ (TYPE_CHECK (NODE)->type.mode = (MODE))
+
+/* The "canonical" type for this type node, which can be used to
+ compare the type for equality with another type. If two types are
+ equal (based on the semantics of the language), then they will have
+ equivalent TYPE_CANONICAL entries.
+
+ As a special case, if TYPE_CANONICAL is NULL_TREE, then it cannot
+ be used for comparison against other types. Instead, the type is
+ said to require structural equality checks, described in
+ TYPE_STRUCTURAL_EQUALITY_P. */
+#define TYPE_CANONICAL(NODE) (TYPE_CHECK (NODE)->type.canonical)
+/* Indicates that the type node requires structural equality
+ checks. The compiler will need to look at the composition of the
+ type to determine whether it is equal to another type, rather than
+ just comparing canonical type pointers. For instance, we would need
+ to look at the return and parameter types of a FUNCTION_TYPE
+ node. */
+#define TYPE_STRUCTURAL_EQUALITY_P(NODE) (TYPE_CANONICAL (NODE) == NULL_TREE)
+/* Sets the TYPE_CANONICAL field to NULL_TREE, indicating that the
+ type node requires structural equality. */
+#define SET_TYPE_STRUCTURAL_EQUALITY(NODE) (TYPE_CANONICAL (NODE) = NULL_TREE)
+#define TYPE_LANG_SPECIFIC(NODE) (TYPE_CHECK (NODE)->type.lang_specific)
+#define TYPE_IBIT(NODE) (GET_MODE_IBIT (TYPE_MODE (NODE)))
+#define TYPE_FBIT(NODE) (GET_MODE_FBIT (TYPE_MODE (NODE)))
+
+/* For a VECTOR_TYPE node, this describes a different type which is emitted
+ in the debugging output. We use this to describe a vector as a
+ structure containing an array. */
+#define TYPE_DEBUG_REPRESENTATION_TYPE(NODE) (VECTOR_TYPE_CHECK (NODE)->type.values)
+
+/* For record and union types, information about this type, as a base type
+ for itself. */
+#define TYPE_BINFO(NODE) (RECORD_OR_UNION_CHECK(NODE)->type.binfo)
+
+/* For non record and union types, used in a language-dependent way. */
+#define TYPE_LANG_SLOT_1(NODE) (NOT_RECORD_OR_UNION_CHECK(NODE)->type.binfo)
+
+/* The (language-specific) typed-based alias set for this type.
+ Objects whose TYPE_ALIAS_SETs are different cannot alias each
+ other. If the TYPE_ALIAS_SET is -1, no alias set has yet been
+ assigned to this type. If the TYPE_ALIAS_SET is 0, objects of this
+ type can alias objects of any type. */
+#define TYPE_ALIAS_SET(NODE) (TYPE_CHECK (NODE)->type.alias_set)
+
+/* Nonzero iff the typed-based alias set for this type has been
+ calculated. */
+#define TYPE_ALIAS_SET_KNOWN_P(NODE) (TYPE_CHECK (NODE)->type.alias_set != -1)
+
+/* A TREE_LIST of IDENTIFIER nodes of the attributes that apply
+ to this type. */
+#define TYPE_ATTRIBUTES(NODE) (TYPE_CHECK (NODE)->type.attributes)
+
+/* The alignment necessary for objects of this type.
+ The value is an int, measured in bits. */
+#define TYPE_ALIGN(NODE) (TYPE_CHECK (NODE)->type.align)
+
+/* 1 if the alignment for this type was requested by "aligned" attribute,
+ 0 if it is the default for this type. */
+#define TYPE_USER_ALIGN(NODE) (TYPE_CHECK (NODE)->type.user_align)
+
+/* The alignment for NODE, in bytes. */
+#define TYPE_ALIGN_UNIT(NODE) (TYPE_ALIGN (NODE) / BITS_PER_UNIT)
+
+/* If your language allows you to declare types, and you want debug info
+ for them, then you need to generate corresponding TYPE_DECL nodes.
+ These "stub" TYPE_DECL nodes have no name, and simply point at the
+ type node. You then set the TYPE_STUB_DECL field of the type node
+ to point back at the TYPE_DECL node. This allows the debug routines
+ to know that the two nodes represent the same type, so that we only
+ get one debug info record for them. */
+#define TYPE_STUB_DECL(NODE) TREE_CHAIN (NODE)
+
+/* In a RECORD_TYPE, UNION_TYPE or QUAL_UNION_TYPE, it means the type
+ has BLKmode only because it lacks the alignment requirement for
+ its size. */
+#define TYPE_NO_FORCE_BLK(NODE) (TYPE_CHECK (NODE)->type.no_force_blk_flag)
+
+/* In an INTEGER_TYPE, it means the type represents a size. We use
+ this both for validity checking and to permit optimizations that
+ are unsafe for other types. Note that the C `size_t' type should
+ *not* have this flag set. The `size_t' type is simply a typedef
+ for an ordinary integer type that happens to be the type of an
+ expression returned by `sizeof'; `size_t' has no special
+ properties. Expressions whose type have TYPE_IS_SIZETYPE set are
+ always actual sizes. */
+#define TYPE_IS_SIZETYPE(NODE) \
+ (INTEGER_TYPE_CHECK (NODE)->type.no_force_blk_flag)
+
+/* Nonzero in a type considered volatile as a whole. */
+#define TYPE_VOLATILE(NODE) (TYPE_CHECK (NODE)->base.volatile_flag)
+
+/* Means this type is const-qualified. */
+#define TYPE_READONLY(NODE) (TYPE_CHECK (NODE)->base.readonly_flag)
+
+/* If nonzero, this type is `restrict'-qualified, in the C sense of
+ the term. */
+#define TYPE_RESTRICT(NODE) (TYPE_CHECK (NODE)->type.restrict_flag)
+
+/* There is a TYPE_QUAL value for each type qualifier. They can be
+ combined by bitwise-or to form the complete set of qualifiers for a
+ type. */
+
+#define TYPE_UNQUALIFIED 0x0
+#define TYPE_QUAL_CONST 0x1
+#define TYPE_QUAL_VOLATILE 0x2
+#define TYPE_QUAL_RESTRICT 0x4
+
+/* The set of type qualifiers for this type. */
+#define TYPE_QUALS(NODE) \
+ ((TYPE_READONLY (NODE) * TYPE_QUAL_CONST) \
+ | (TYPE_VOLATILE (NODE) * TYPE_QUAL_VOLATILE) \
+ | (TYPE_RESTRICT (NODE) * TYPE_QUAL_RESTRICT))
+
+/* These flags are available for each language front end to use internally. */
+#define TYPE_LANG_FLAG_0(NODE) (TYPE_CHECK (NODE)->type.lang_flag_0)
+#define TYPE_LANG_FLAG_1(NODE) (TYPE_CHECK (NODE)->type.lang_flag_1)
+#define TYPE_LANG_FLAG_2(NODE) (TYPE_CHECK (NODE)->type.lang_flag_2)
+#define TYPE_LANG_FLAG_3(NODE) (TYPE_CHECK (NODE)->type.lang_flag_3)
+#define TYPE_LANG_FLAG_4(NODE) (TYPE_CHECK (NODE)->type.lang_flag_4)
+#define TYPE_LANG_FLAG_5(NODE) (TYPE_CHECK (NODE)->type.lang_flag_5)
+#define TYPE_LANG_FLAG_6(NODE) (TYPE_CHECK (NODE)->type.lang_flag_6)
+
+/* Used to keep track of visited nodes in tree traversals. This is set to
+ 0 by copy_node and make_node. */
+#define TREE_VISITED(NODE) ((NODE)->base.visited)
+
+/* If set in an ARRAY_TYPE, indicates a string type (for languages
+ that distinguish string from array of char).
+ If set in a INTEGER_TYPE, indicates a character type. */
+#define TYPE_STRING_FLAG(NODE) (TYPE_CHECK (NODE)->type.string_flag)
+
+/* If non-NULL, this is an upper bound of the size (in bytes) of an
+ object of the given ARRAY_TYPE. This allows temporaries to be
+ allocated. */
+#define TYPE_ARRAY_MAX_SIZE(ARRAY_TYPE) \
+ (ARRAY_TYPE_CHECK (ARRAY_TYPE)->type.maxval)
+
+/* For a VECTOR_TYPE, this is the number of sub-parts of the vector. */
+#define TYPE_VECTOR_SUBPARTS(VECTOR_TYPE) \
+ (((unsigned HOST_WIDE_INT) 1) \
+ << VECTOR_TYPE_CHECK (VECTOR_TYPE)->type.precision)
+
+/* Set precision to n when we have 2^n sub-parts of the vector. */
+#define SET_TYPE_VECTOR_SUBPARTS(VECTOR_TYPE, X) \
+ (VECTOR_TYPE_CHECK (VECTOR_TYPE)->type.precision = exact_log2 (X))
+
+/* Indicates that objects of this type must be initialized by calling a
+ function when they are created. */
+#define TYPE_NEEDS_CONSTRUCTING(NODE) \
+ (TYPE_CHECK (NODE)->type.needs_constructing_flag)
+
+/* Indicates that objects of this type (a UNION_TYPE), should be passed
+ the same way that the first union alternative would be passed. */
+#define TYPE_TRANSPARENT_UNION(NODE) \
+ (UNION_TYPE_CHECK (NODE)->type.transparent_union_flag)
+
+/* For an ARRAY_TYPE, indicates that it is not permitted to take the
+ address of a component of the type. This is the counterpart of
+ DECL_NONADDRESSABLE_P for arrays, see the definition of this flag. */
+#define TYPE_NONALIASED_COMPONENT(NODE) \
+ (ARRAY_TYPE_CHECK (NODE)->type.transparent_union_flag)
+
+/* Indicated that objects of this type should be laid out in as
+ compact a way as possible. */
+#define TYPE_PACKED(NODE) (TYPE_CHECK (NODE)->type.packed_flag)
+
+/* Used by type_contains_placeholder_p to avoid recomputation.
+ Values are: 0 (unknown), 1 (false), 2 (true). Never access
+ this field directly. */
+#define TYPE_CONTAINS_PLACEHOLDER_INTERNAL(NODE) \
+ (TYPE_CHECK (NODE)->type.contains_placeholder_bits)
+
+struct die_struct;
+
+struct tree_type GTY(())
+{
+ struct tree_common common;
+ tree values;
+ tree size;
+ tree size_unit;
+ tree attributes;
+ unsigned int uid;
+
+ unsigned int precision : 9;
+ ENUM_BITFIELD(machine_mode) mode : 7;
+
+ unsigned string_flag : 1;
+ unsigned no_force_blk_flag : 1;
+ unsigned needs_constructing_flag : 1;
+ unsigned transparent_union_flag : 1;
+ unsigned packed_flag : 1;
+ unsigned restrict_flag : 1;
+ unsigned contains_placeholder_bits : 2;
+
+ unsigned lang_flag_0 : 1;
+ unsigned lang_flag_1 : 1;
+ unsigned lang_flag_2 : 1;
+ unsigned lang_flag_3 : 1;
+ unsigned lang_flag_4 : 1;
+ unsigned lang_flag_5 : 1;
+ unsigned lang_flag_6 : 1;
+ unsigned user_align : 1;
+
+ unsigned int align;
+ alias_set_type alias_set;
+ tree pointer_to;
+ tree reference_to;
+ union tree_type_symtab {
+ int GTY ((tag ("0"))) address;
+ const char * GTY ((tag ("1"))) pointer;
+ struct die_struct * GTY ((tag ("2"))) die;
+ } GTY ((desc ("debug_hooks == &sdb_debug_hooks ? 1 : debug_hooks == &dwarf2_debug_hooks ? 2 : 0"),
+ descbits ("2"))) symtab;
+ tree name;
+ tree minval;
+ tree maxval;
+ tree next_variant;
+ tree main_variant;
+ tree binfo;
+ tree context;
+ tree canonical;
+ /* Points to a structure whose details depend on the language in use. */
+ struct lang_type *lang_specific;
+};
+
+/* Define accessor macros for information about type inheritance
+ and basetypes.
+
+ A "basetype" means a particular usage of a data type for inheritance
+ in another type. Each such basetype usage has its own "binfo"
+ object to describe it. The binfo object is a TREE_VEC node.
+
+ Inheritance is represented by the binfo nodes allocated for a
+ given type. For example, given types C and D, such that D is
+ inherited by C, 3 binfo nodes will be allocated: one for describing
+ the binfo properties of C, similarly one for D, and one for
+ describing the binfo properties of D as a base type for C.
+ Thus, given a pointer to class C, one can get a pointer to the binfo
+ of D acting as a basetype for C by looking at C's binfo's basetypes. */
+
+/* BINFO specific flags. */
+
+/* Nonzero means that the derivation chain is via a `virtual' declaration. */
+#define BINFO_VIRTUAL_P(NODE) (TREE_BINFO_CHECK (NODE)->base.static_flag)
+
+/* Flags for language dependent use. */
+#define BINFO_MARKED(NODE) TREE_LANG_FLAG_0(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_1(NODE) TREE_LANG_FLAG_1(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_2(NODE) TREE_LANG_FLAG_2(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_3(NODE) TREE_LANG_FLAG_3(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_4(NODE) TREE_LANG_FLAG_4(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_5(NODE) TREE_LANG_FLAG_5(TREE_BINFO_CHECK(NODE))
+#define BINFO_FLAG_6(NODE) TREE_LANG_FLAG_6(TREE_BINFO_CHECK(NODE))
+
+/* The actual data type node being inherited in this basetype. */
+#define BINFO_TYPE(NODE) TREE_TYPE (TREE_BINFO_CHECK(NODE))
+
+/* The offset where this basetype appears in its containing type.
+ BINFO_OFFSET slot holds the offset (in bytes)
+ from the base of the complete object to the base of the part of the
+ object that is allocated on behalf of this `type'.
+ This is always 0 except when there is multiple inheritance. */
+
+#define BINFO_OFFSET(NODE) (TREE_BINFO_CHECK(NODE)->binfo.offset)
+#define BINFO_OFFSET_ZEROP(NODE) (integer_zerop (BINFO_OFFSET (NODE)))
+
+/* The virtual function table belonging to this basetype. Virtual
+ function tables provide a mechanism for run-time method dispatching.
+ The entries of a virtual function table are language-dependent. */
+
+#define BINFO_VTABLE(NODE) (TREE_BINFO_CHECK(NODE)->binfo.vtable)
+
+/* The virtual functions in the virtual function table. This is
+ a TREE_LIST that is used as an initial approximation for building
+ a virtual function table for this basetype. */
+#define BINFO_VIRTUALS(NODE) (TREE_BINFO_CHECK(NODE)->binfo.virtuals)
+
+/* A vector of binfos for the direct basetypes inherited by this
+ basetype.
+
+ If this basetype describes type D as inherited in C, and if the
+ basetypes of D are E and F, then this vector contains binfos for
+ inheritance of E and F by C. */
+#define BINFO_BASE_BINFOS(NODE) (&TREE_BINFO_CHECK(NODE)->binfo.base_binfos)
+
+/* The number of basetypes for NODE. */
+#define BINFO_N_BASE_BINFOS(NODE) (VEC_length (tree, BINFO_BASE_BINFOS (NODE)))
+
+/* Accessor macro to get to the Nth base binfo of this binfo. */
+#define BINFO_BASE_BINFO(NODE,N) \
+ (VEC_index (tree, BINFO_BASE_BINFOS (NODE), (N)))
+#define BINFO_BASE_ITERATE(NODE,N,B) \
+ (VEC_iterate (tree, BINFO_BASE_BINFOS (NODE), (N), (B)))
+#define BINFO_BASE_APPEND(NODE,T) \
+ (VEC_quick_push (tree, BINFO_BASE_BINFOS (NODE), (T)))
+
+/* For a BINFO record describing a virtual base class, i.e., one where
+ TREE_VIA_VIRTUAL is set, this field assists in locating the virtual
+ base. The actual contents are language-dependent. In the C++
+ front-end this field is an INTEGER_CST giving an offset into the
+ vtable where the offset to the virtual base can be found. */
+#define BINFO_VPTR_FIELD(NODE) (TREE_BINFO_CHECK(NODE)->binfo.vptr_field)
+
+/* Indicates the accesses this binfo has to its bases. The values are
+ access_public_node, access_protected_node or access_private_node.
+ If this array is not present, public access is implied. */
+#define BINFO_BASE_ACCESSES(NODE) (TREE_BINFO_CHECK(NODE)->binfo.base_accesses)
+
+#define BINFO_BASE_ACCESS(NODE,N) \
+ VEC_index (tree, BINFO_BASE_ACCESSES (NODE), (N))
+#define BINFO_BASE_ACCESS_APPEND(NODE,T) \
+ VEC_quick_push (tree, BINFO_BASE_ACCESSES (NODE), (T))
+
+/* The index in the VTT where this subobject's sub-VTT can be found.
+ NULL_TREE if there is no sub-VTT. */
+#define BINFO_SUBVTT_INDEX(NODE) (TREE_BINFO_CHECK(NODE)->binfo.vtt_subvtt)
+
+/* The index in the VTT where the vptr for this subobject can be
+ found. NULL_TREE if there is no secondary vptr in the VTT. */
+#define BINFO_VPTR_INDEX(NODE) (TREE_BINFO_CHECK(NODE)->binfo.vtt_vptr)
+
+/* The BINFO_INHERITANCE_CHAIN points at the binfo for the base
+ inheriting this base for non-virtual bases. For virtual bases it
+ points either to the binfo for which this is a primary binfo, or to
+ the binfo of the most derived type. */
+#define BINFO_INHERITANCE_CHAIN(NODE) \
+ (TREE_BINFO_CHECK(NODE)->binfo.inheritance)
+
+struct tree_binfo GTY (())
+{
+ struct tree_common common;
+
+ tree offset;
+ tree vtable;
+ tree virtuals;
+ tree vptr_field;
+ VEC(tree,gc) *base_accesses;
+ tree inheritance;
+
+ tree vtt_subvtt;
+ tree vtt_vptr;
+
+ VEC(tree,none) base_binfos;
+};
+
+
+/* Define fields and accessors for nodes representing declared names. */
+
+/* Nonzero if DECL represents a variable for the SSA passes. */
+#define SSA_VAR_P(DECL) \
+ (TREE_CODE (DECL) == VAR_DECL \
+ || TREE_CODE (DECL) == PARM_DECL \
+ || TREE_CODE (DECL) == RESULT_DECL \
+ || MTAG_P (DECL) \
+ || (TREE_CODE (DECL) == SSA_NAME \
+ && (TREE_CODE (SSA_NAME_VAR (DECL)) == VAR_DECL \
+ || TREE_CODE (SSA_NAME_VAR (DECL)) == PARM_DECL \
+ || TREE_CODE (SSA_NAME_VAR (DECL)) == RESULT_DECL \
+ || MTAG_P (SSA_NAME_VAR (DECL)))))
+
+
+
+
+/* Enumerate visibility settings. */
+#ifndef SYMBOL_VISIBILITY_DEFINED
+#define SYMBOL_VISIBILITY_DEFINED
+enum symbol_visibility
+{
+ VISIBILITY_DEFAULT,
+ VISIBILITY_PROTECTED,
+ VISIBILITY_HIDDEN,
+ VISIBILITY_INTERNAL
+};
+#endif
+
+struct function;
+
+
+/* This is the name of the object as written by the user.
+ It is an IDENTIFIER_NODE. */
+#define DECL_NAME(NODE) (DECL_MINIMAL_CHECK (NODE)->decl_minimal.name)
+
+/* Every ..._DECL node gets a unique number. */
+#define DECL_UID(NODE) (DECL_MINIMAL_CHECK (NODE)->decl_minimal.uid)
+
+/* These two fields describe where in the source code the declaration
+ was. If the declaration appears in several places (as for a C
+ function that is declared first and then defined later), this
+ information should refer to the definition. */
+#define DECL_SOURCE_LOCATION(NODE) (DECL_MINIMAL_CHECK (NODE)->decl_minimal.locus)
+#define DECL_SOURCE_FILE(NODE) LOCATION_FILE (DECL_SOURCE_LOCATION (NODE))
+#define DECL_SOURCE_LINE(NODE) LOCATION_LINE (DECL_SOURCE_LOCATION (NODE))
+#define DECL_IS_BUILTIN(DECL) \
+ (DECL_SOURCE_LOCATION (DECL) <= BUILTINS_LOCATION)
+
+/* For FIELD_DECLs, this is the RECORD_TYPE, UNION_TYPE, or
+ QUAL_UNION_TYPE node that the field is a member of. For VAR_DECL,
+ PARM_DECL, FUNCTION_DECL, LABEL_DECL, and CONST_DECL nodes, this
+ points to either the FUNCTION_DECL for the containing function,
+ the RECORD_TYPE or UNION_TYPE for the containing type, or
+ NULL_TREE or a TRANSLATION_UNIT_DECL if the given decl has "file
+ scope". */
+#define DECL_CONTEXT(NODE) (DECL_MINIMAL_CHECK (NODE)->decl_minimal.context)
+#define DECL_FIELD_CONTEXT(NODE) (FIELD_DECL_CHECK (NODE)->decl_minimal.context)
+struct tree_decl_minimal GTY(())
+{
+ struct tree_common common;
+ location_t locus;
+ unsigned int uid;
+ tree name;
+ tree context;
+};
+
+/* When computing aliasing information, we represent the memory pointed-to
+ by pointers with artificial variables called "memory tags" (MT). There
+ are two kinds of tags, namely symbol and name:
+
+ Symbol tags (SMT) are used in flow-insensitive alias analysis, they
+ represent all the pointed-to locations and variables pointed-to by
+ the same pointer symbol. Usually, this set is computed using
+ type-based analysis (i.e., alias set classes), but this may not
+ always be the case.
+
+ Name tags (NMT) are used in flow-sensitive points-to alias
+ analysis, they represent the variables and memory locations
+ pointed-to by a specific SSA_NAME pointer.
+
+ In general, given a pointer P with a symbol tag SMT, the alias set
+ of SMT should be the union of all the alias sets of the NMTs of
+ every SSA_NAME for P. */
+struct tree_memory_tag GTY(())
+{
+ struct tree_decl_minimal common;
+
+ bitmap GTY ((skip)) aliases;
+
+ /* True if this tag has global scope. */
+ unsigned int is_global : 1;
+};
+
+#define MTAG_GLOBAL(NODE) (TREE_MEMORY_TAG_CHECK (NODE)->mtag.is_global)
+#define MTAG_ALIASES(NODE) (TREE_MEMORY_TAG_CHECK (NODE)->mtag.aliases)
+
+/* Memory Partition Tags (MPTs) group memory symbols under one
+ common name for the purposes of placing memory PHI nodes. */
+
+struct tree_memory_partition_tag GTY(())
+{
+ struct tree_memory_tag common;
+
+ /* Set of symbols grouped under this MPT. */
+ bitmap symbols;
+};
+
+#define MPT_SYMBOLS(NODE) (MEMORY_PARTITION_TAG_CHECK (NODE)->mpt.symbols)
+
+
+/* For any sort of a ..._DECL node, this points to the original (abstract)
+ decl node which this decl is an instance of, or else it is NULL indicating
+ that this decl is not an instance of some other decl. For example,
+ in a nested declaration of an inline function, this points back to the
+ definition. */
+#define DECL_ABSTRACT_ORIGIN(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.abstract_origin)
+
+/* Like DECL_ABSTRACT_ORIGIN, but returns NODE if there's no abstract
+ origin. This is useful when setting the DECL_ABSTRACT_ORIGIN. */
+#define DECL_ORIGIN(NODE) \
+ (DECL_ABSTRACT_ORIGIN (NODE) ? DECL_ABSTRACT_ORIGIN (NODE) : (NODE))
+
+/* Nonzero for any sort of ..._DECL node means this decl node represents an
+ inline instance of some original (abstract) decl from an inline function;
+ suppress any warnings about shadowing some other variable. FUNCTION_DECL
+ nodes can also have their abstract origin set to themselves. */
+#define DECL_FROM_INLINE(NODE) (DECL_ABSTRACT_ORIGIN (NODE) != NULL_TREE \
+ && DECL_ABSTRACT_ORIGIN (NODE) != (NODE))
+
+/* In a DECL this is the field where attributes are stored. */
+#define DECL_ATTRIBUTES(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.attributes)
+
+/* For a FUNCTION_DECL, holds the tree of BINDINGs.
+ For a TRANSLATION_UNIT_DECL, holds the namespace's BLOCK.
+ For a VAR_DECL, holds the initial value.
+ For a PARM_DECL, used for DECL_ARG_TYPE--default
+ values for parameters are encoded in the type of the function,
+ not in the PARM_DECL slot.
+ For a FIELD_DECL, this is used for enumeration values and the C
+ frontend uses it for temporarily storing bitwidth of bitfields.
+
+ ??? Need to figure out some way to check this isn't a PARM_DECL. */
+#define DECL_INITIAL(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.initial)
+
+/* Holds the size of the datum, in bits, as a tree expression.
+ Need not be constant. */
+#define DECL_SIZE(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.size)
+/* Likewise for the size in bytes. */
+#define DECL_SIZE_UNIT(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.size_unit)
+/* Holds the alignment required for the datum, in bits. */
+#define DECL_ALIGN(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.align)
+/* The alignment of NODE, in bytes. */
+#define DECL_ALIGN_UNIT(NODE) (DECL_ALIGN (NODE) / BITS_PER_UNIT)
+/* Set if the alignment of this DECL has been set by the user, for
+ example with an 'aligned' attribute. */
+#define DECL_USER_ALIGN(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.user_align)
+/* Holds the machine mode corresponding to the declaration of a variable or
+ field. Always equal to TYPE_MODE (TREE_TYPE (decl)) except for a
+ FIELD_DECL. */
+#define DECL_MODE(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.mode)
+
+/* For FUNCTION_DECL, if it is built-in, this identifies which built-in
+ operation it is. Note, however, that this field is overloaded, with
+ DECL_BUILT_IN_CLASS as the discriminant, so the latter must always be
+ checked before any access to the former. */
+#define DECL_FUNCTION_CODE(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.function_code)
+#define DECL_DEBUG_EXPR_IS_FROM(NODE) \
+ (DECL_COMMON_CHECK (NODE)->decl_common.debug_expr_is_from)
+
+/* Nonzero for a given ..._DECL node means that the name of this node should
+ be ignored for symbolic debug purposes. */
+#define DECL_IGNORED_P(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.ignored_flag)
+
+/* Nonzero for a given ..._DECL node means that this node represents an
+ "abstract instance" of the given declaration (e.g. in the original
+ declaration of an inline function). When generating symbolic debugging
+ information, we mustn't try to generate any address information for nodes
+ marked as "abstract instances" because we don't actually generate
+ any code or allocate any data space for such instances. */
+#define DECL_ABSTRACT(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.abstract_flag)
+
+/* Language-specific decl information. */
+#define DECL_LANG_SPECIFIC(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_specific)
+
+/* In a VAR_DECL or FUNCTION_DECL, nonzero means external reference:
+ do not allocate storage, and refer to a definition elsewhere. Note that
+ this does not necessarily imply the entity represented by NODE
+ has no program source-level definition in this translation unit. For
+ example, for a FUNCTION_DECL, DECL_SAVED_TREE may be non-NULL and
+ DECL_EXTERNAL may be true simultaneously; that can be the case for
+ a C99 "extern inline" function. */
+#define DECL_EXTERNAL(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.decl_flag_2)
+
+/* Nonzero in a ..._DECL means this variable is ref'd from a nested function.
+ For VAR_DECL nodes, PARM_DECL nodes, and FUNCTION_DECL nodes.
+
+ For LABEL_DECL nodes, nonzero if nonlocal gotos to the label are permitted.
+
+ Also set in some languages for variables, etc., outside the normal
+ lexical scope, such as class instance variables. */
+#define DECL_NONLOCAL(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.nonlocal_flag)
+
+/* Used in VAR_DECLs to indicate that the variable is a vtable.
+ Used in FIELD_DECLs for vtable pointers.
+ Used in FUNCTION_DECLs to indicate that the function is virtual. */
+#define DECL_VIRTUAL_P(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.virtual_flag)
+
+/* Used to indicate that this DECL represents a compiler-generated entity. */
+#define DECL_ARTIFICIAL(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.artificial_flag)
+
+/* Additional flags for language-specific uses. */
+#define DECL_LANG_FLAG_0(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_0)
+#define DECL_LANG_FLAG_1(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_1)
+#define DECL_LANG_FLAG_2(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_2)
+#define DECL_LANG_FLAG_3(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_3)
+#define DECL_LANG_FLAG_4(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_4)
+#define DECL_LANG_FLAG_5(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_5)
+#define DECL_LANG_FLAG_6(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_6)
+#define DECL_LANG_FLAG_7(NODE) (DECL_COMMON_CHECK (NODE)->decl_common.lang_flag_7)
+
+/* Used to indicate an alias set for the memory pointed to by this
+ particular FIELD_DECL, PARM_DECL, or VAR_DECL, which must have
+ pointer (or reference) type. */
+#define DECL_POINTER_ALIAS_SET(NODE) \
+ (DECL_COMMON_CHECK (NODE)->decl_common.pointer_alias_set)
+
+/* Nonzero if an alias set has been assigned to this declaration. */
+#define DECL_POINTER_ALIAS_SET_KNOWN_P(NODE) \
+ (DECL_POINTER_ALIAS_SET (NODE) != - 1)
+
+/* Nonzero for a decl which is at file scope. */
+#define DECL_FILE_SCOPE_P(EXP) \
+ (! DECL_CONTEXT (EXP) \
+ || TREE_CODE (DECL_CONTEXT (EXP)) == TRANSLATION_UNIT_DECL)
+
+/* Nonzero for a decl that is decorated using attribute used.
+ This indicates compiler tools that this decl needs to be preserved. */
+#define DECL_PRESERVE_P(DECL) \
+ DECL_COMMON_CHECK (DECL)->decl_common.preserve_flag
+
+/* For function local variables of COMPLEX and VECTOR types,
+ indicates that the variable is not aliased, and that all
+ modifications to the variable have been adjusted so that
+ they are killing assignments. Thus the variable may now
+ be treated as a GIMPLE register, and use real instead of
+ virtual ops in SSA form. */
+#define DECL_GIMPLE_REG_P(DECL) \
+ DECL_COMMON_CHECK (DECL)->decl_common.gimple_reg_flag
+
+/* For a DECL with pointer type, this is set if Type Based Alias
+ Analysis should not be applied to this DECL. */
+#define DECL_NO_TBAA_P(DECL) \
+ DECL_COMMON_CHECK (DECL)->decl_common.no_tbaa_flag
+
+struct tree_decl_common GTY(())
+{
+ struct tree_decl_minimal common;
+ tree size;
+
+ ENUM_BITFIELD(machine_mode) mode : 8;
+
+ unsigned nonlocal_flag : 1;
+ unsigned virtual_flag : 1;
+ unsigned ignored_flag : 1;
+ unsigned abstract_flag : 1;
+ unsigned artificial_flag : 1;
+ unsigned user_align : 1;
+ unsigned preserve_flag: 1;
+ unsigned debug_expr_is_from : 1;
+
+ unsigned lang_flag_0 : 1;
+ unsigned lang_flag_1 : 1;
+ unsigned lang_flag_2 : 1;
+ unsigned lang_flag_3 : 1;
+ unsigned lang_flag_4 : 1;
+ unsigned lang_flag_5 : 1;
+ unsigned lang_flag_6 : 1;
+ unsigned lang_flag_7 : 1;
+
+ /* In LABEL_DECL, this is DECL_ERROR_ISSUED.
+ In VAR_DECL and PARM_DECL, this is DECL_REGISTER. */
+ unsigned decl_flag_0 : 1;
+ /* In FIELD_DECL, this is DECL_PACKED. */
+ unsigned decl_flag_1 : 1;
+ /* In FIELD_DECL, this is DECL_BIT_FIELD
+ In VAR_DECL and FUNCTION_DECL, this is DECL_EXTERNAL.
+ In TYPE_DECL, this is TYPE_DECL_SUPRESS_DEBUG. */
+ unsigned decl_flag_2 : 1;
+ /* In FIELD_DECL, this is DECL_NONADDRESSABLE_P
+ In VAR_DECL and PARM_DECL, this is DECL_HAS_VALUE_EXPR. */
+ unsigned decl_flag_3 : 1;
+ /* Logically, these two would go in a theoretical base shared by var and
+ parm decl. */
+ unsigned gimple_reg_flag : 1;
+ /* In a DECL with pointer type, set if no TBAA should be done. */
+ unsigned no_tbaa_flag : 1;
+ /* Padding so that 'align' can be on a 32-bit boundary. */
+ unsigned decl_common_unused : 2;
+
+ unsigned int align : 24;
+ /* DECL_OFFSET_ALIGN, used only for FIELD_DECLs. */
+ unsigned int off_align : 8;
+
+ tree size_unit;
+ tree initial;
+ tree attributes;
+ tree abstract_origin;
+
+ alias_set_type pointer_alias_set;
+ /* Points to a structure whose details depend on the language in use. */
+ struct lang_decl *lang_specific;
+};
+
+extern tree decl_value_expr_lookup (tree);
+extern void decl_value_expr_insert (tree, tree);
+
+/* In a VAR_DECL or PARM_DECL, the location at which the value may be found,
+ if transformations have made this more complicated than evaluating the
+ decl itself. This should only be used for debugging; once this field has
+ been set, the decl itself may not legitimately appear in the function. */
+#define DECL_HAS_VALUE_EXPR_P(NODE) \
+ (TREE_CHECK2 (NODE, VAR_DECL, PARM_DECL)->decl_common.decl_flag_3)
+#define DECL_VALUE_EXPR(NODE) \
+ (decl_value_expr_lookup (DECL_WRTL_CHECK (NODE)))
+#define SET_DECL_VALUE_EXPR(NODE, VAL) \
+ (decl_value_expr_insert (DECL_WRTL_CHECK (NODE), VAL))
+
+/* Holds the RTL expression for the value of a variable or function.
+ This value can be evaluated lazily for functions, variables with
+ static storage duration, and labels. */
+#define DECL_RTL(NODE) \
+ (DECL_WRTL_CHECK (NODE)->decl_with_rtl.rtl \
+ ? (NODE)->decl_with_rtl.rtl \
+ : (make_decl_rtl (NODE), (NODE)->decl_with_rtl.rtl))
+
+/* Set the DECL_RTL for NODE to RTL. */
+#define SET_DECL_RTL(NODE, RTL) set_decl_rtl (NODE, RTL)
+
+/* Returns nonzero if NODE is a tree node that can contain RTL. */
+#define HAS_RTL_P(NODE) (CODE_CONTAINS_STRUCT (TREE_CODE (NODE), TS_DECL_WRTL))
+
+/* Returns nonzero if the DECL_RTL for NODE has already been set. */
+#define DECL_RTL_SET_P(NODE) (HAS_RTL_P (NODE) && DECL_WRTL_CHECK (NODE)->decl_with_rtl.rtl != NULL)
+
+/* Copy the RTL from NODE1 to NODE2. If the RTL was not set for
+ NODE1, it will not be set for NODE2; this is a lazy copy. */
+#define COPY_DECL_RTL(NODE1, NODE2) \
+ (DECL_WRTL_CHECK (NODE2)->decl_with_rtl.rtl = DECL_WRTL_CHECK (NODE1)->decl_with_rtl.rtl)
+
+/* The DECL_RTL for NODE, if it is set, or NULL, if it is not set. */
+#define DECL_RTL_IF_SET(NODE) (DECL_RTL_SET_P (NODE) ? DECL_RTL (NODE) : NULL)
+
+/* In VAR_DECL and PARM_DECL nodes, nonzero means declared `register'. */
+#define DECL_REGISTER(NODE) (DECL_WRTL_CHECK (NODE)->decl_common.decl_flag_0)
+
+struct tree_decl_with_rtl GTY(())
+{
+ struct tree_decl_common common;
+ rtx rtl;
+};
+
+/* In a FIELD_DECL, this is the field position, counting in bytes, of the
+ DECL_OFFSET_ALIGN-bit-sized word containing the bit closest to the beginning
+ of the structure. */
+#define DECL_FIELD_OFFSET(NODE) (FIELD_DECL_CHECK (NODE)->field_decl.offset)
+
+/* In a FIELD_DECL, this is the offset, in bits, of the first bit of the
+ field from DECL_FIELD_OFFSET. This field may be nonzero even for fields
+ that are not bit fields (since DECL_OFFSET_ALIGN may be larger than the
+ natural alignment of the field's type). */
+#define DECL_FIELD_BIT_OFFSET(NODE) (FIELD_DECL_CHECK (NODE)->field_decl.bit_offset)
+
+/* In a FIELD_DECL, this indicates whether the field was a bit-field and
+ if so, the type that was originally specified for it.
+ TREE_TYPE may have been modified (in finish_struct). */
+#define DECL_BIT_FIELD_TYPE(NODE) (FIELD_DECL_CHECK (NODE)->field_decl.bit_field_type)
+
+/* For a FIELD_DECL in a QUAL_UNION_TYPE, records the expression, which
+ if nonzero, indicates that the field occupies the type. */
+#define DECL_QUALIFIER(NODE) (FIELD_DECL_CHECK (NODE)->field_decl.qualifier)
+
+/* For FIELD_DECLs, off_align holds the number of low-order bits of
+ DECL_FIELD_OFFSET which are known to be always zero.
+ DECL_OFFSET_ALIGN thus returns the alignment that DECL_FIELD_OFFSET
+ has. */
+#define DECL_OFFSET_ALIGN(NODE) \
+ (((unsigned HOST_WIDE_INT)1) << FIELD_DECL_CHECK (NODE)->decl_common.off_align)
+
+/* Specify that DECL_ALIGN(NODE) is a multiple of X. */
+#define SET_DECL_OFFSET_ALIGN(NODE, X) \
+ (FIELD_DECL_CHECK (NODE)->decl_common.off_align = exact_log2 ((X) & -(X)))
+/* 1 if the alignment for this type was requested by "aligned" attribute,
+ 0 if it is the default for this type. */
+
+/* For FIELD_DECLS, DECL_FCONTEXT is the *first* baseclass in
+ which this FIELD_DECL is defined. This information is needed when
+ writing debugging information about vfield and vbase decls for C++. */
+#define DECL_FCONTEXT(NODE) (FIELD_DECL_CHECK (NODE)->field_decl.fcontext)
+
+/* In a FIELD_DECL, indicates this field should be bit-packed. */
+#define DECL_PACKED(NODE) (FIELD_DECL_CHECK (NODE)->decl_common.decl_flag_1)
+
+/* Nonzero in a FIELD_DECL means it is a bit field, and must be accessed
+ specially. */
+#define DECL_BIT_FIELD(NODE) (FIELD_DECL_CHECK (NODE)->decl_common.decl_flag_2)
+
+/* Used in a FIELD_DECL to indicate that we cannot form the address of
+ this component. This makes it possible for Type-Based Alias Analysis
+ to disambiguate accesses to this field with indirect accesses using
+ the field's type:
+
+ struct S { int i; } s;
+ int *p;
+
+ If the flag is set on 'i', TBAA computes that s.i and *p never conflict.
+
+ From the implementation's viewpoint, the alias set of the type of the
+ field 'i' (int) will not be recorded as a subset of that of the type of
+ 's' (struct S) in record_component_aliases. The counterpart is that
+ accesses to s.i must not be given the alias set of the type of 'i'
+ (int) but instead directly that of the type of 's' (struct S). */
+#define DECL_NONADDRESSABLE_P(NODE) \
+ (FIELD_DECL_CHECK (NODE)->decl_common.decl_flag_3)
+
+struct tree_field_decl GTY(())
+{
+ struct tree_decl_common common;
+
+ tree offset;
+ tree bit_field_type;
+ tree qualifier;
+ tree bit_offset;
+ tree fcontext;
+
+};
+
+/* A numeric unique identifier for a LABEL_DECL. The UID allocation is
+ dense, unique within any one function, and may be used to index arrays.
+ If the value is -1, then no UID has been assigned. */
+#define LABEL_DECL_UID(NODE) \
+ (LABEL_DECL_CHECK (NODE)->decl_common.pointer_alias_set)
+
+/* In LABEL_DECL nodes, nonzero means that an error message about
+ jumping into such a binding contour has been printed for this label. */
+#define DECL_ERROR_ISSUED(NODE) (LABEL_DECL_CHECK (NODE)->decl_common.decl_flag_0)
+
+struct tree_label_decl GTY(())
+{
+ struct tree_decl_with_rtl common;
+};
+
+struct tree_result_decl GTY(())
+{
+ struct tree_decl_with_rtl common;
+};
+
+struct tree_const_decl GTY(())
+{
+ struct tree_decl_with_rtl common;
+};
+
+/* For a PARM_DECL, records the data type used to pass the argument,
+ which may be different from the type seen in the program. */
+#define DECL_ARG_TYPE(NODE) (PARM_DECL_CHECK (NODE)->decl_common.initial)
+
+/* For PARM_DECL, holds an RTL for the stack slot or register
+ where the data was actually passed. */
+#define DECL_INCOMING_RTL(NODE) (PARM_DECL_CHECK (NODE)->parm_decl.incoming_rtl)
+
+struct tree_parm_decl GTY(())
+{
+ struct tree_decl_with_rtl common;
+ rtx incoming_rtl;
+};
+
+
+/* Nonzero in a decl means that the gimplifier has seen (or placed)
+ this variable in a BIND_EXPR. */
+#define DECL_SEEN_IN_BIND_EXPR_P(NODE) \
+ (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.seen_in_bind_expr)
+
+/* Used to indicate that the linkage status of this DECL is not yet known,
+ so it should not be output now. */
+#define DECL_DEFER_OUTPUT(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.defer_output)
+
+/* Nonzero for a given ..._DECL node means that no warnings should be
+ generated just because this node is unused. */
+#define DECL_IN_SYSTEM_HEADER(NODE) \
+ (in_system_header_at (DECL_SOURCE_LOCATION (NODE)))
+
+ /* Used to indicate that this DECL has weak linkage. */
+#define DECL_WEAK(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.weak_flag)
+
+/* Internal to the gimplifier. Indicates that the value is a formal
+ temporary controlled by the gimplifier. */
+#define DECL_GIMPLE_FORMAL_TEMP_P(DECL) \
+ DECL_WITH_VIS_CHECK (DECL)->decl_with_vis.gimple_formal_temp
+
+/* Used to indicate that the DECL is a dllimport. */
+#define DECL_DLLIMPORT_P(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.dllimport_flag)
+
+/* DECL_BASED_ON_RESTRICT_P records whether a VAR_DECL is a temporary
+ based on a variable with a restrict qualified type. If it is,
+ DECL_RESTRICT_BASE returns the restrict qualified variable on which
+ it is based. */
+
+#define DECL_BASED_ON_RESTRICT_P(NODE) \
+ (VAR_DECL_CHECK (NODE)->decl_with_vis.based_on_restrict_p)
+#define DECL_GET_RESTRICT_BASE(NODE) \
+ (decl_restrict_base_lookup (VAR_DECL_CHECK (NODE)))
+#define SET_DECL_RESTRICT_BASE(NODE, VAL) \
+ (decl_restrict_base_insert (VAR_DECL_CHECK (NODE), (VAL)))
+
+extern tree decl_restrict_base_lookup (tree);
+extern void decl_restrict_base_insert (tree, tree);
+
+/* Used in a DECL to indicate that, even if it TREE_PUBLIC, it need
+ not be put out unless it is needed in this translation unit.
+ Entities like this are shared across translation units (like weak
+ entities), but are guaranteed to be generated by any translation
+ unit that needs them, and therefore need not be put out anywhere
+ where they are not needed. DECL_COMDAT is just a hint to the
+ back-end; it is up to front-ends which set this flag to ensure
+ that there will never be any harm, other than bloat, in putting out
+ something which is DECL_COMDAT. */
+#define DECL_COMDAT(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.comdat_flag)
+
+/* A replaceable function is one which may be replaced at link-time
+ with an entirely different definition, provided that the
+ replacement has the same type. For example, functions declared
+ with __attribute__((weak)) on most systems are replaceable.
+
+ COMDAT functions are not replaceable, since all definitions of the
+ function must be equivalent. It is important that COMDAT functions
+ not be treated as replaceable so that use of C++ template
+ instantiations is not penalized.
+
+ For example, DECL_REPLACEABLE is used to determine whether or not a
+ function (including a template instantiation) which is not
+ explicitly declared "inline" can be inlined. If the function is
+ DECL_REPLACEABLE then it is not safe to do the inlining, since the
+ implementation chosen at link-time may be different. However, a
+ function that is not DECL_REPLACEABLE can be inlined, since all
+ versions of the function will be functionally identical. */
+#define DECL_REPLACEABLE_P(NODE) \
+ (!DECL_COMDAT (NODE) && !targetm.binds_local_p (NODE))
+
+/* The name of the object as the assembler will see it (but before any
+ translations made by ASM_OUTPUT_LABELREF). Often this is the same
+ as DECL_NAME. It is an IDENTIFIER_NODE. */
+#define DECL_ASSEMBLER_NAME(NODE) decl_assembler_name (NODE)
+
+/* Return true if NODE is a NODE that can contain a DECL_ASSEMBLER_NAME.
+ This is true of all DECL nodes except FIELD_DECL. */
+#define HAS_DECL_ASSEMBLER_NAME_P(NODE) \
+ (CODE_CONTAINS_STRUCT (TREE_CODE (NODE), TS_DECL_WITH_VIS))
+
+/* Returns nonzero if the DECL_ASSEMBLER_NAME for NODE has been set. If zero,
+ the NODE might still have a DECL_ASSEMBLER_NAME -- it just hasn't been set
+ yet. */
+#define DECL_ASSEMBLER_NAME_SET_P(NODE) \
+ (HAS_DECL_ASSEMBLER_NAME_P (NODE) && DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.assembler_name != NULL_TREE)
+
+/* Set the DECL_ASSEMBLER_NAME for NODE to NAME. */
+#define SET_DECL_ASSEMBLER_NAME(NODE, NAME) \
+ (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.assembler_name = (NAME))
+
+/* Copy the DECL_ASSEMBLER_NAME from DECL1 to DECL2. Note that if DECL1's
+ DECL_ASSEMBLER_NAME has not yet been set, using this macro will not cause
+ the DECL_ASSEMBLER_NAME of either DECL to be set. In other words, the
+ semantics of using this macro, are different than saying:
+
+ SET_DECL_ASSEMBLER_NAME(DECL2, DECL_ASSEMBLER_NAME (DECL1))
+
+ which will try to set the DECL_ASSEMBLER_NAME for DECL1. */
+
+#define COPY_DECL_ASSEMBLER_NAME(DECL1, DECL2) \
+ (DECL_ASSEMBLER_NAME_SET_P (DECL1) \
+ ? (void) SET_DECL_ASSEMBLER_NAME (DECL2, \
+ DECL_ASSEMBLER_NAME (DECL1)) \
+ : (void) 0)
+
+/* Records the section name in a section attribute. Used to pass
+ the name from decl_attributes to make_function_rtl and make_decl_rtl. */
+#define DECL_SECTION_NAME(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.section_name)
+
+/* Value of the decls's visibility attribute */
+#define DECL_VISIBILITY(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.visibility)
+
+/* Nonzero means that the decl had its visibility specified rather than
+ being inferred. */
+#define DECL_VISIBILITY_SPECIFIED(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.visibility_specified)
+
+/* Used in TREE_PUBLIC decls to indicate that copies of this DECL in
+ multiple translation units should be merged. */
+#define DECL_ONE_ONLY(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.one_only)
+
+struct tree_decl_with_vis GTY(())
+{
+ struct tree_decl_with_rtl common;
+ tree assembler_name;
+ tree section_name;
+
+ /* Belong to VAR_DECL exclusively. */
+ unsigned defer_output:1;
+ unsigned hard_register:1;
+ unsigned thread_local:1;
+ unsigned common_flag:1;
+ unsigned in_text_section : 1;
+ unsigned gimple_formal_temp : 1;
+ unsigned dllimport_flag : 1;
+ unsigned based_on_restrict_p : 1;
+ /* Used by C++. Might become a generic decl flag. */
+ unsigned shadowed_for_var_p : 1;
+
+ /* Don't belong to VAR_DECL exclusively. */
+ unsigned weak_flag:1;
+ unsigned seen_in_bind_expr : 1;
+ unsigned comdat_flag : 1;
+ ENUM_BITFIELD(symbol_visibility) visibility : 2;
+ unsigned visibility_specified : 1;
+ /* Belong to FUNCTION_DECL exclusively. */
+ unsigned one_only : 1;
+ unsigned init_priority_p:1;
+
+ /* Belongs to VAR_DECL exclusively. */
+ ENUM_BITFIELD(tls_model) tls_model : 3;
+ /* 12 unused bits. */
+};
+
+/* In a VAR_DECL that's static,
+ nonzero if the space is in the text section. */
+#define DECL_IN_TEXT_SECTION(NODE) (VAR_DECL_CHECK (NODE)->decl_with_vis.in_text_section)
+
+/* Nonzero for a given ..._DECL node means that this node should be
+ put in .common, if possible. If a DECL_INITIAL is given, and it
+ is not error_mark_node, then the decl cannot be put in .common. */
+#define DECL_COMMON(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.common_flag)
+
+/* In a VAR_DECL, nonzero if the decl is a register variable with
+ an explicit asm specification. */
+#define DECL_HARD_REGISTER(NODE) (VAR_DECL_CHECK (NODE)->decl_with_vis.hard_register)
+
+extern tree decl_debug_expr_lookup (tree);
+extern void decl_debug_expr_insert (tree, tree);
+/* For VAR_DECL, this is set to either an expression that it was split
+ from (if DECL_DEBUG_EXPR_IS_FROM is true), otherwise a tree_list of
+ subexpressions that it was split into. */
+#define DECL_DEBUG_EXPR(NODE) \
+ (decl_debug_expr_lookup (VAR_DECL_CHECK (NODE)))
+
+#define SET_DECL_DEBUG_EXPR(NODE, VAL) \
+ (decl_debug_expr_insert (VAR_DECL_CHECK (NODE), VAL))
+
+/* An initialization priority. */
+typedef unsigned short priority_type;
+
+extern priority_type decl_init_priority_lookup (tree);
+extern priority_type decl_fini_priority_lookup (tree);
+extern void decl_init_priority_insert (tree, priority_type);
+extern void decl_fini_priority_insert (tree, priority_type);
+
+/* In a non-local VAR_DECL with static storage duration, true if the
+ variable has an initialization priority. If false, the variable
+ will be initialized at the DEFAULT_INIT_PRIORITY. */
+#define DECL_HAS_INIT_PRIORITY_P(NODE) \
+ (VAR_DECL_CHECK (NODE)->decl_with_vis.init_priority_p)
+
+/* For a VAR_DECL or FUNCTION_DECL the initialization priority of
+ NODE. */
+#define DECL_INIT_PRIORITY(NODE) \
+ (decl_init_priority_lookup (NODE))
+/* Set the initialization priority for NODE to VAL. */
+#define SET_DECL_INIT_PRIORITY(NODE, VAL) \
+ (decl_init_priority_insert (NODE, VAL))
+
+/* For a FUNCTION_DECL the finalization priority of NODE. */
+#define DECL_FINI_PRIORITY(NODE) \
+ (decl_fini_priority_lookup (NODE))
+/* Set the finalization priority for NODE to VAL. */
+#define SET_DECL_FINI_PRIORITY(NODE, VAL) \
+ (decl_fini_priority_insert (NODE, VAL))
+
+/* The initialization priority for entities for which no explicit
+ initialization priority has been specified. */
+#define DEFAULT_INIT_PRIORITY 65535
+
+/* The maximum allowed initialization priority. */
+#define MAX_INIT_PRIORITY 65535
+
+/* The largest priority value reserved for use by system runtime
+ libraries. */
+#define MAX_RESERVED_INIT_PRIORITY 100
+
+/* In a VAR_DECL, the model to use if the data should be allocated from
+ thread-local storage. */
+#define DECL_TLS_MODEL(NODE) (VAR_DECL_CHECK (NODE)->decl_with_vis.tls_model)
+
+/* In a VAR_DECL, nonzero if the data should be allocated from
+ thread-local storage. */
+#define DECL_THREAD_LOCAL_P(NODE) \
+ (VAR_DECL_CHECK (NODE)->decl_with_vis.tls_model >= TLS_MODEL_REAL)
+
+struct tree_var_decl GTY(())
+{
+ struct tree_decl_with_vis common;
+};
+
+
+/* This field is used to reference anything in decl.result and is meant only
+ for use by the garbage collector. */
+#define DECL_RESULT_FLD(NODE) (DECL_NON_COMMON_CHECK (NODE)->decl_non_common.result)
+
+/* The DECL_VINDEX is used for FUNCTION_DECLS in two different ways.
+ Before the struct containing the FUNCTION_DECL is laid out,
+ DECL_VINDEX may point to a FUNCTION_DECL in a base class which
+ is the FUNCTION_DECL which this FUNCTION_DECL will replace as a virtual
+ function. When the class is laid out, this pointer is changed
+ to an INTEGER_CST node which is suitable for use as an index
+ into the virtual function table.
+ C++ also uses this field in namespaces, hence the DECL_NON_COMMON_CHECK. */
+#define DECL_VINDEX(NODE) (DECL_NON_COMMON_CHECK (NODE)->decl_non_common.vindex)
+
+struct tree_decl_non_common GTY(())
+
+{
+ struct tree_decl_with_vis common;
+ /* C++ uses this in namespaces. */
+ tree saved_tree;
+ /* C++ uses this in templates. */
+ tree arguments;
+ /* Almost all FE's use this. */
+ tree result;
+ /* C++ uses this in namespaces. */
+ tree vindex;
+};
+
+/* In FUNCTION_DECL, holds the decl for the return value. */
+#define DECL_RESULT(NODE) (FUNCTION_DECL_CHECK (NODE)->decl_non_common.result)
+
+/* In a FUNCTION_DECL, nonzero if the function cannot be inlined. */
+#define DECL_UNINLINABLE(NODE) (FUNCTION_DECL_CHECK (NODE)->function_decl.uninlinable)
+
+/* In a FUNCTION_DECL, the saved representation of the body of the
+ entire function. */
+#define DECL_SAVED_TREE(NODE) (FUNCTION_DECL_CHECK (NODE)->decl_non_common.saved_tree)
+
+/* Nonzero in a FUNCTION_DECL means this function should be treated
+ as if it were a malloc, meaning it returns a pointer that is
+ not an alias. */
+#define DECL_IS_MALLOC(NODE) (FUNCTION_DECL_CHECK (NODE)->function_decl.malloc_flag)
+
+/* Nonzero in a FUNCTION_DECL means this function should be treated as
+ C++ operator new, meaning that it returns a pointer for which we
+ should not use type based aliasing. */
+#define DECL_IS_OPERATOR_NEW(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.operator_new_flag)
+
+/* Nonzero in a FUNCTION_DECL means this function may return more
+ than once. */
+#define DECL_IS_RETURNS_TWICE(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.returns_twice_flag)
+
+/* Nonzero in a FUNCTION_DECL means this function should be treated
+ as "pure" function (like const function, but may read global memory). */
+#define DECL_PURE_P(NODE) (FUNCTION_DECL_CHECK (NODE)->function_decl.pure_flag)
+
+/* Nonzero only if one of TREE_READONLY or DECL_PURE_P is nonzero AND
+ the const or pure function may not terminate. When this is nonzero
+ for a const or pure function, it can be dealt with by cse passes
+ but cannot be removed by dce passes since you are not allowed to
+ change an infinite looping program into one that terminates without
+ error. */
+#define DECL_LOOPING_CONST_OR_PURE_P(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.looping_const_or_pure_flag)
+
+/* Nonzero in a FUNCTION_DECL means this function should be treated
+ as "novops" function (function that does not read global memory,
+ but may have arbitrary side effects). */
+#define DECL_IS_NOVOPS(NODE) (FUNCTION_DECL_CHECK (NODE)->function_decl.novops_flag)
+
+/* Used in FUNCTION_DECLs to indicate that they should be run automatically
+ at the beginning or end of execution. */
+#define DECL_STATIC_CONSTRUCTOR(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.static_ctor_flag)
+
+#define DECL_STATIC_DESTRUCTOR(NODE) \
+(FUNCTION_DECL_CHECK (NODE)->function_decl.static_dtor_flag)
+
+/* Used in FUNCTION_DECLs to indicate that function entry and exit should
+ be instrumented with calls to support routines. */
+#define DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.no_instrument_function_entry_exit)
+
+/* Used in FUNCTION_DECLs to indicate that limit-stack-* should be
+ disabled in this function. */
+#define DECL_NO_LIMIT_STACK(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.no_limit_stack)
+
+/* In a FUNCTION_DECL with a nonzero DECL_CONTEXT, indicates that a
+ static chain is not needed. */
+#define DECL_NO_STATIC_CHAIN(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.regdecl_flag)
+
+/* Nonzero for a decl that cgraph has decided should be inlined into
+ at least one call site. It is not meaningful to look at this
+ directly; always use cgraph_function_possibly_inlined_p. */
+#define DECL_POSSIBLY_INLINED(DECL) \
+ FUNCTION_DECL_CHECK (DECL)->function_decl.possibly_inlined
+
+/* Nonzero in a FUNCTION_DECL means that this function was declared inline,
+ such as via the `inline' keyword in C/C++. This flag controls the linkage
+ semantics of 'inline' */
+#define DECL_DECLARED_INLINE_P(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.declared_inline_flag)
+
+/* Nonzero in a FUNCTION_DECL means this function should not get
+ -Winline warnings. */
+#define DECL_NO_INLINE_WARNING_P(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.no_inline_warning_flag)
+
+/* Nonzero in a FUNCTION_DECL that should be always inlined by the inliner
+ disregarding size and cost heuristics. This is equivalent to using
+ the always_inline attribute without the required diagnostics if the
+ function cannot be inlined. */
+#define DECL_DISREGARD_INLINE_LIMITS(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.disregard_inline_limits)
+
+/* For FUNCTION_DECL, this holds a pointer to a structure ("struct function")
+ that describes the status of this function. */
+#define DECL_STRUCT_FUNCTION(NODE) (FUNCTION_DECL_CHECK (NODE)->function_decl.f)
+
+/* In a FUNCTION_DECL, nonzero means a built in function. */
+#define DECL_BUILT_IN(NODE) (DECL_BUILT_IN_CLASS (NODE) != NOT_BUILT_IN)
+
+/* For a builtin function, identify which part of the compiler defined it. */
+#define DECL_BUILT_IN_CLASS(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.built_in_class)
+
+/* In FUNCTION_DECL, a chain of ..._DECL nodes.
+ VAR_DECL and PARM_DECL reserve the arguments slot for language-specific
+ uses. */
+#define DECL_ARGUMENTS(NODE) (FUNCTION_DECL_CHECK (NODE)->decl_non_common.arguments)
+#define DECL_ARGUMENT_FLD(NODE) (DECL_NON_COMMON_CHECK (NODE)->decl_non_common.arguments)
+
+/* In FUNCTION_DECL, the function specific target options to use when compiling
+ this function. */
+#define DECL_FUNCTION_SPECIFIC_TARGET(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.function_specific_target)
+
+/* In FUNCTION_DECL, the function specific optimization options to use when
+ compiling this function. */
+#define DECL_FUNCTION_SPECIFIC_OPTIMIZATION(NODE) \
+ (FUNCTION_DECL_CHECK (NODE)->function_decl.function_specific_optimization)
+
+/* FUNCTION_DECL inherits from DECL_NON_COMMON because of the use of the
+ arguments/result/saved_tree fields by front ends. It was either inherit
+ FUNCTION_DECL from non_common, or inherit non_common from FUNCTION_DECL,
+ which seemed a bit strange. */
+
+struct tree_function_decl GTY(())
+{
+ struct tree_decl_non_common common;
+
+ struct function *f;
+
+ /* Function specific options that are used by this function. */
+ tree function_specific_target; /* target options */
+ tree function_specific_optimization; /* optimization options */
+
+ /* In a FUNCTION_DECL for which DECL_BUILT_IN holds, this is
+ DECL_FUNCTION_CODE. Otherwise unused.
+ ??? The bitfield needs to be able to hold all target function
+ codes as well. */
+ ENUM_BITFIELD(built_in_function) function_code : 11;
+ ENUM_BITFIELD(built_in_class) built_in_class : 2;
+
+ unsigned static_ctor_flag : 1;
+ unsigned static_dtor_flag : 1;
+ unsigned uninlinable : 1;
+
+ unsigned possibly_inlined : 1;
+ unsigned novops_flag : 1;
+ unsigned returns_twice_flag : 1;
+ unsigned malloc_flag : 1;
+ unsigned operator_new_flag : 1;
+ unsigned declared_inline_flag : 1;
+ unsigned regdecl_flag : 1;
+
+ unsigned no_inline_warning_flag : 1;
+ unsigned no_instrument_function_entry_exit : 1;
+ unsigned no_limit_stack : 1;
+ unsigned disregard_inline_limits : 1;
+ unsigned pure_flag : 1;
+ unsigned looping_const_or_pure_flag : 1;
+
+
+ /* 3 bits left */
+};
+
+/* For a TYPE_DECL, holds the "original" type. (TREE_TYPE has the copy.) */
+#define DECL_ORIGINAL_TYPE(NODE) (TYPE_DECL_CHECK (NODE)->decl_non_common.result)
+
+/* In a TYPE_DECL nonzero means the detail info about this type is not dumped
+ into stabs. Instead it will generate cross reference ('x') of names.
+ This uses the same flag as DECL_EXTERNAL. */
+#define TYPE_DECL_SUPPRESS_DEBUG(NODE) \
+ (TYPE_DECL_CHECK (NODE)->decl_common.decl_flag_2)
+
+/* Getter of the imported declaration associated to the
+ IMPORTED_DECL node. */
+#define IMPORTED_DECL_ASSOCIATED_DECL(NODE) \
+(DECL_INITIAL (IMPORTED_DECL_CHECK (NODE)))
+
+struct tree_type_decl GTY(())
+{
+ struct tree_decl_non_common common;
+
+};
+
+/* A STATEMENT_LIST chains statements together in GENERIC and GIMPLE.
+ To reduce overhead, the nodes containing the statements are not trees.
+ This avoids the overhead of tree_common on all linked list elements.
+
+ Use the interface in tree-iterator.h to access this node. */
+
+#define STATEMENT_LIST_HEAD(NODE) \
+ (STATEMENT_LIST_CHECK (NODE)->stmt_list.head)
+#define STATEMENT_LIST_TAIL(NODE) \
+ (STATEMENT_LIST_CHECK (NODE)->stmt_list.tail)
+
+struct tree_statement_list_node
+ GTY ((chain_next ("%h.next"), chain_prev ("%h.prev")))
+{
+ struct tree_statement_list_node *prev;
+ struct tree_statement_list_node *next;
+ tree stmt;
+};
+
+struct tree_statement_list
+ GTY(())
+{
+ struct tree_common common;
+ struct tree_statement_list_node *head;
+ struct tree_statement_list_node *tail;
+};
+
+
+/* Optimization options used by a function. */
+
+struct tree_optimization_option GTY(())
+{
+ struct tree_common common;
+
+ /* The optimization options used by the user. */
+ struct cl_optimization opts;
+};
+
+#define TREE_OPTIMIZATION(NODE) \
+ (&OPTIMIZATION_NODE_CHECK (NODE)->optimization.opts)
+
+/* Return a tree node that encapsulates the current optimization options. */
+extern tree build_optimization_node (void);
+
+/* Target options used by a function. */
+
+struct tree_target_option GTY(())
+{
+ struct tree_common common;
+
+ /* The optimization options used by the user. */
+ struct cl_target_option opts;
+};
+
+#define TREE_TARGET_OPTION(NODE) \
+ (&TARGET_OPTION_NODE_CHECK (NODE)->target_option.opts)
+
+/* Return a tree node that encapsulates the current target options. */
+extern tree build_target_option_node (void);
+
+
+/* Define the overall contents of a tree node.
+ It may be any of the structures declared above
+ for various types of node. */
+
+union tree_node GTY ((ptr_alias (union lang_tree_node),
+ desc ("tree_node_structure (&%h)")))
+{
+ struct tree_base GTY ((tag ("TS_BASE"))) base;
+ struct tree_common GTY ((tag ("TS_COMMON"))) common;
+ struct tree_int_cst GTY ((tag ("TS_INT_CST"))) int_cst;
+ struct tree_real_cst GTY ((tag ("TS_REAL_CST"))) real_cst;
+ struct tree_fixed_cst GTY ((tag ("TS_FIXED_CST"))) fixed_cst;
+ struct tree_vector GTY ((tag ("TS_VECTOR"))) vector;
+ struct tree_string GTY ((tag ("TS_STRING"))) string;
+ struct tree_complex GTY ((tag ("TS_COMPLEX"))) complex;
+ struct tree_identifier GTY ((tag ("TS_IDENTIFIER"))) identifier;
+ struct tree_decl_minimal GTY((tag ("TS_DECL_MINIMAL"))) decl_minimal;
+ struct tree_decl_common GTY ((tag ("TS_DECL_COMMON"))) decl_common;
+ struct tree_decl_with_rtl GTY ((tag ("TS_DECL_WRTL"))) decl_with_rtl;
+ struct tree_decl_non_common GTY ((tag ("TS_DECL_NON_COMMON"))) decl_non_common;
+ struct tree_parm_decl GTY ((tag ("TS_PARM_DECL"))) parm_decl;
+ struct tree_decl_with_vis GTY ((tag ("TS_DECL_WITH_VIS"))) decl_with_vis;
+ struct tree_var_decl GTY ((tag ("TS_VAR_DECL"))) var_decl;
+ struct tree_field_decl GTY ((tag ("TS_FIELD_DECL"))) field_decl;
+ struct tree_label_decl GTY ((tag ("TS_LABEL_DECL"))) label_decl;
+ struct tree_result_decl GTY ((tag ("TS_RESULT_DECL"))) result_decl;
+ struct tree_const_decl GTY ((tag ("TS_CONST_DECL"))) const_decl;
+ struct tree_type_decl GTY ((tag ("TS_TYPE_DECL"))) type_decl;
+ struct tree_function_decl GTY ((tag ("TS_FUNCTION_DECL"))) function_decl;
+ struct tree_type GTY ((tag ("TS_TYPE"))) type;
+ struct tree_list GTY ((tag ("TS_LIST"))) list;
+ struct tree_vec GTY ((tag ("TS_VEC"))) vec;
+ struct tree_exp GTY ((tag ("TS_EXP"))) exp;
+ struct tree_ssa_name GTY ((tag ("TS_SSA_NAME"))) ssa_name;
+ struct tree_block GTY ((tag ("TS_BLOCK"))) block;
+ struct tree_binfo GTY ((tag ("TS_BINFO"))) binfo;
+ struct tree_statement_list GTY ((tag ("TS_STATEMENT_LIST"))) stmt_list;
+ struct tree_constructor GTY ((tag ("TS_CONSTRUCTOR"))) constructor;
+ struct tree_memory_tag GTY ((tag ("TS_MEMORY_TAG"))) mtag;
+ struct tree_omp_clause GTY ((tag ("TS_OMP_CLAUSE"))) omp_clause;
+ struct tree_memory_partition_tag GTY ((tag ("TS_MEMORY_PARTITION_TAG"))) mpt;
+ struct tree_optimization_option GTY ((tag ("TS_OPTIMIZATION"))) optimization;
+ struct tree_target_option GTY ((tag ("TS_TARGET_OPTION"))) target_option;
+};
+
+/* Standard named or nameless data types of the C compiler. */
+
+enum tree_index
+{
+ TI_ERROR_MARK,
+ TI_INTQI_TYPE,
+ TI_INTHI_TYPE,
+ TI_INTSI_TYPE,
+ TI_INTDI_TYPE,
+ TI_INTTI_TYPE,
+
+ TI_UINTQI_TYPE,
+ TI_UINTHI_TYPE,
+ TI_UINTSI_TYPE,
+ TI_UINTDI_TYPE,
+ TI_UINTTI_TYPE,
+
+ TI_UINT32_TYPE,
+ TI_UINT64_TYPE,
+
+ TI_INTEGER_ZERO,
+ TI_INTEGER_ONE,
+ TI_INTEGER_MINUS_ONE,
+ TI_NULL_POINTER,
+
+ TI_SIZE_ZERO,
+ TI_SIZE_ONE,
+
+ TI_BITSIZE_ZERO,
+ TI_BITSIZE_ONE,
+ TI_BITSIZE_UNIT,
+
+ TI_PUBLIC,
+ TI_PROTECTED,
+ TI_PRIVATE,
+
+ TI_BOOLEAN_FALSE,
+ TI_BOOLEAN_TRUE,
+
+ TI_COMPLEX_INTEGER_TYPE,
+ TI_COMPLEX_FLOAT_TYPE,
+ TI_COMPLEX_DOUBLE_TYPE,
+ TI_COMPLEX_LONG_DOUBLE_TYPE,
+
+ TI_FLOAT_TYPE,
+ TI_DOUBLE_TYPE,
+ TI_LONG_DOUBLE_TYPE,
+
+ TI_FLOAT_PTR_TYPE,
+ TI_DOUBLE_PTR_TYPE,
+ TI_LONG_DOUBLE_PTR_TYPE,
+ TI_INTEGER_PTR_TYPE,
+
+ TI_VOID_TYPE,
+ TI_PTR_TYPE,
+ TI_CONST_PTR_TYPE,
+ TI_SIZE_TYPE,
+ TI_PID_TYPE,
+ TI_PTRDIFF_TYPE,
+ TI_VA_LIST_TYPE,
+ TI_VA_LIST_GPR_COUNTER_FIELD,
+ TI_VA_LIST_FPR_COUNTER_FIELD,
+ TI_BOOLEAN_TYPE,
+ TI_FILEPTR_TYPE,
+
+ TI_DFLOAT32_TYPE,
+ TI_DFLOAT64_TYPE,
+ TI_DFLOAT128_TYPE,
+ TI_DFLOAT32_PTR_TYPE,
+ TI_DFLOAT64_PTR_TYPE,
+ TI_DFLOAT128_PTR_TYPE,
+
+ TI_VOID_LIST_NODE,
+
+ TI_MAIN_IDENTIFIER,
+
+ TI_SAT_SFRACT_TYPE,
+ TI_SAT_FRACT_TYPE,
+ TI_SAT_LFRACT_TYPE,
+ TI_SAT_LLFRACT_TYPE,
+ TI_SAT_USFRACT_TYPE,
+ TI_SAT_UFRACT_TYPE,
+ TI_SAT_ULFRACT_TYPE,
+ TI_SAT_ULLFRACT_TYPE,
+ TI_SFRACT_TYPE,
+ TI_FRACT_TYPE,
+ TI_LFRACT_TYPE,
+ TI_LLFRACT_TYPE,
+ TI_USFRACT_TYPE,
+ TI_UFRACT_TYPE,
+ TI_ULFRACT_TYPE,
+ TI_ULLFRACT_TYPE,
+ TI_SAT_SACCUM_TYPE,
+ TI_SAT_ACCUM_TYPE,
+ TI_SAT_LACCUM_TYPE,
+ TI_SAT_LLACCUM_TYPE,
+ TI_SAT_USACCUM_TYPE,
+ TI_SAT_UACCUM_TYPE,
+ TI_SAT_ULACCUM_TYPE,
+ TI_SAT_ULLACCUM_TYPE,
+ TI_SACCUM_TYPE,
+ TI_ACCUM_TYPE,
+ TI_LACCUM_TYPE,
+ TI_LLACCUM_TYPE,
+ TI_USACCUM_TYPE,
+ TI_UACCUM_TYPE,
+ TI_ULACCUM_TYPE,
+ TI_ULLACCUM_TYPE,
+ TI_QQ_TYPE,
+ TI_HQ_TYPE,
+ TI_SQ_TYPE,
+ TI_DQ_TYPE,
+ TI_TQ_TYPE,
+ TI_UQQ_TYPE,
+ TI_UHQ_TYPE,
+ TI_USQ_TYPE,
+ TI_UDQ_TYPE,
+ TI_UTQ_TYPE,
+ TI_SAT_QQ_TYPE,
+ TI_SAT_HQ_TYPE,
+ TI_SAT_SQ_TYPE,
+ TI_SAT_DQ_TYPE,
+ TI_SAT_TQ_TYPE,
+ TI_SAT_UQQ_TYPE,
+ TI_SAT_UHQ_TYPE,
+ TI_SAT_USQ_TYPE,
+ TI_SAT_UDQ_TYPE,
+ TI_SAT_UTQ_TYPE,
+ TI_HA_TYPE,
+ TI_SA_TYPE,
+ TI_DA_TYPE,
+ TI_TA_TYPE,
+ TI_UHA_TYPE,
+ TI_USA_TYPE,
+ TI_UDA_TYPE,
+ TI_UTA_TYPE,
+ TI_SAT_HA_TYPE,
+ TI_SAT_SA_TYPE,
+ TI_SAT_DA_TYPE,
+ TI_SAT_TA_TYPE,
+ TI_SAT_UHA_TYPE,
+ TI_SAT_USA_TYPE,
+ TI_SAT_UDA_TYPE,
+ TI_SAT_UTA_TYPE,
+
+ TI_OPTIMIZATION_DEFAULT,
+ TI_OPTIMIZATION_CURRENT,
+ TI_TARGET_OPTION_DEFAULT,
+ TI_TARGET_OPTION_CURRENT,
+ TI_CURRENT_TARGET_PRAGMA,
+ TI_CURRENT_OPTIMIZE_PRAGMA,
+
+ TI_MAX
+};
+
+extern GTY(()) tree global_trees[TI_MAX];
+
+#define error_mark_node global_trees[TI_ERROR_MARK]
+
+#define intQI_type_node global_trees[TI_INTQI_TYPE]
+#define intHI_type_node global_trees[TI_INTHI_TYPE]
+#define intSI_type_node global_trees[TI_INTSI_TYPE]
+#define intDI_type_node global_trees[TI_INTDI_TYPE]
+#define intTI_type_node global_trees[TI_INTTI_TYPE]
+
+#define unsigned_intQI_type_node global_trees[TI_UINTQI_TYPE]
+#define unsigned_intHI_type_node global_trees[TI_UINTHI_TYPE]
+#define unsigned_intSI_type_node global_trees[TI_UINTSI_TYPE]
+#define unsigned_intDI_type_node global_trees[TI_UINTDI_TYPE]
+#define unsigned_intTI_type_node global_trees[TI_UINTTI_TYPE]
+
+#define uint32_type_node global_trees[TI_UINT32_TYPE]
+#define uint64_type_node global_trees[TI_UINT64_TYPE]
+
+#define integer_zero_node global_trees[TI_INTEGER_ZERO]
+#define integer_one_node global_trees[TI_INTEGER_ONE]
+#define integer_minus_one_node global_trees[TI_INTEGER_MINUS_ONE]
+#define size_zero_node global_trees[TI_SIZE_ZERO]
+#define size_one_node global_trees[TI_SIZE_ONE]
+#define bitsize_zero_node global_trees[TI_BITSIZE_ZERO]
+#define bitsize_one_node global_trees[TI_BITSIZE_ONE]
+#define bitsize_unit_node global_trees[TI_BITSIZE_UNIT]
+
+/* Base access nodes. */
+#define access_public_node global_trees[TI_PUBLIC]
+#define access_protected_node global_trees[TI_PROTECTED]
+#define access_private_node global_trees[TI_PRIVATE]
+
+#define null_pointer_node global_trees[TI_NULL_POINTER]
+
+#define float_type_node global_trees[TI_FLOAT_TYPE]
+#define double_type_node global_trees[TI_DOUBLE_TYPE]
+#define long_double_type_node global_trees[TI_LONG_DOUBLE_TYPE]
+
+#define float_ptr_type_node global_trees[TI_FLOAT_PTR_TYPE]
+#define double_ptr_type_node global_trees[TI_DOUBLE_PTR_TYPE]
+#define long_double_ptr_type_node global_trees[TI_LONG_DOUBLE_PTR_TYPE]
+#define integer_ptr_type_node global_trees[TI_INTEGER_PTR_TYPE]
+
+#define complex_integer_type_node global_trees[TI_COMPLEX_INTEGER_TYPE]
+#define complex_float_type_node global_trees[TI_COMPLEX_FLOAT_TYPE]
+#define complex_double_type_node global_trees[TI_COMPLEX_DOUBLE_TYPE]
+#define complex_long_double_type_node global_trees[TI_COMPLEX_LONG_DOUBLE_TYPE]
+
+#define void_type_node global_trees[TI_VOID_TYPE]
+/* The C type `void *'. */
+#define ptr_type_node global_trees[TI_PTR_TYPE]
+/* The C type `const void *'. */
+#define const_ptr_type_node global_trees[TI_CONST_PTR_TYPE]
+/* The C type `size_t'. */
+#define size_type_node global_trees[TI_SIZE_TYPE]
+#define pid_type_node global_trees[TI_PID_TYPE]
+#define ptrdiff_type_node global_trees[TI_PTRDIFF_TYPE]
+#define va_list_type_node global_trees[TI_VA_LIST_TYPE]
+#define va_list_gpr_counter_field global_trees[TI_VA_LIST_GPR_COUNTER_FIELD]
+#define va_list_fpr_counter_field global_trees[TI_VA_LIST_FPR_COUNTER_FIELD]
+/* The C type `FILE *'. */
+#define fileptr_type_node global_trees[TI_FILEPTR_TYPE]
+
+#define boolean_type_node global_trees[TI_BOOLEAN_TYPE]
+#define boolean_false_node global_trees[TI_BOOLEAN_FALSE]
+#define boolean_true_node global_trees[TI_BOOLEAN_TRUE]
+
+/* The decimal floating point types. */
+#define dfloat32_type_node global_trees[TI_DFLOAT32_TYPE]
+#define dfloat64_type_node global_trees[TI_DFLOAT64_TYPE]
+#define dfloat128_type_node global_trees[TI_DFLOAT128_TYPE]
+#define dfloat32_ptr_type_node global_trees[TI_DFLOAT32_PTR_TYPE]
+#define dfloat64_ptr_type_node global_trees[TI_DFLOAT64_PTR_TYPE]
+#define dfloat128_ptr_type_node global_trees[TI_DFLOAT128_PTR_TYPE]
+
+/* The fixed-point types. */
+#define sat_short_fract_type_node global_trees[TI_SAT_SFRACT_TYPE]
+#define sat_fract_type_node global_trees[TI_SAT_FRACT_TYPE]
+#define sat_long_fract_type_node global_trees[TI_SAT_LFRACT_TYPE]
+#define sat_long_long_fract_type_node global_trees[TI_SAT_LLFRACT_TYPE]
+#define sat_unsigned_short_fract_type_node \
+ global_trees[TI_SAT_USFRACT_TYPE]
+#define sat_unsigned_fract_type_node global_trees[TI_SAT_UFRACT_TYPE]
+#define sat_unsigned_long_fract_type_node \
+ global_trees[TI_SAT_ULFRACT_TYPE]
+#define sat_unsigned_long_long_fract_type_node \
+ global_trees[TI_SAT_ULLFRACT_TYPE]
+#define short_fract_type_node global_trees[TI_SFRACT_TYPE]
+#define fract_type_node global_trees[TI_FRACT_TYPE]
+#define long_fract_type_node global_trees[TI_LFRACT_TYPE]
+#define long_long_fract_type_node global_trees[TI_LLFRACT_TYPE]
+#define unsigned_short_fract_type_node global_trees[TI_USFRACT_TYPE]
+#define unsigned_fract_type_node global_trees[TI_UFRACT_TYPE]
+#define unsigned_long_fract_type_node global_trees[TI_ULFRACT_TYPE]
+#define unsigned_long_long_fract_type_node \
+ global_trees[TI_ULLFRACT_TYPE]
+#define sat_short_accum_type_node global_trees[TI_SAT_SACCUM_TYPE]
+#define sat_accum_type_node global_trees[TI_SAT_ACCUM_TYPE]
+#define sat_long_accum_type_node global_trees[TI_SAT_LACCUM_TYPE]
+#define sat_long_long_accum_type_node global_trees[TI_SAT_LLACCUM_TYPE]
+#define sat_unsigned_short_accum_type_node \
+ global_trees[TI_SAT_USACCUM_TYPE]
+#define sat_unsigned_accum_type_node global_trees[TI_SAT_UACCUM_TYPE]
+#define sat_unsigned_long_accum_type_node \
+ global_trees[TI_SAT_ULACCUM_TYPE]
+#define sat_unsigned_long_long_accum_type_node \
+ global_trees[TI_SAT_ULLACCUM_TYPE]
+#define short_accum_type_node global_trees[TI_SACCUM_TYPE]
+#define accum_type_node global_trees[TI_ACCUM_TYPE]
+#define long_accum_type_node global_trees[TI_LACCUM_TYPE]
+#define long_long_accum_type_node global_trees[TI_LLACCUM_TYPE]
+#define unsigned_short_accum_type_node global_trees[TI_USACCUM_TYPE]
+#define unsigned_accum_type_node global_trees[TI_UACCUM_TYPE]
+#define unsigned_long_accum_type_node global_trees[TI_ULACCUM_TYPE]
+#define unsigned_long_long_accum_type_node \
+ global_trees[TI_ULLACCUM_TYPE]
+#define qq_type_node global_trees[TI_QQ_TYPE]
+#define hq_type_node global_trees[TI_HQ_TYPE]
+#define sq_type_node global_trees[TI_SQ_TYPE]
+#define dq_type_node global_trees[TI_DQ_TYPE]
+#define tq_type_node global_trees[TI_TQ_TYPE]
+#define uqq_type_node global_trees[TI_UQQ_TYPE]
+#define uhq_type_node global_trees[TI_UHQ_TYPE]
+#define usq_type_node global_trees[TI_USQ_TYPE]
+#define udq_type_node global_trees[TI_UDQ_TYPE]
+#define utq_type_node global_trees[TI_UTQ_TYPE]
+#define sat_qq_type_node global_trees[TI_SAT_QQ_TYPE]
+#define sat_hq_type_node global_trees[TI_SAT_HQ_TYPE]
+#define sat_sq_type_node global_trees[TI_SAT_SQ_TYPE]
+#define sat_dq_type_node global_trees[TI_SAT_DQ_TYPE]
+#define sat_tq_type_node global_trees[TI_SAT_TQ_TYPE]
+#define sat_uqq_type_node global_trees[TI_SAT_UQQ_TYPE]
+#define sat_uhq_type_node global_trees[TI_SAT_UHQ_TYPE]
+#define sat_usq_type_node global_trees[TI_SAT_USQ_TYPE]
+#define sat_udq_type_node global_trees[TI_SAT_UDQ_TYPE]
+#define sat_utq_type_node global_trees[TI_SAT_UTQ_TYPE]
+#define ha_type_node global_trees[TI_HA_TYPE]
+#define sa_type_node global_trees[TI_SA_TYPE]
+#define da_type_node global_trees[TI_DA_TYPE]
+#define ta_type_node global_trees[TI_TA_TYPE]
+#define uha_type_node global_trees[TI_UHA_TYPE]
+#define usa_type_node global_trees[TI_USA_TYPE]
+#define uda_type_node global_trees[TI_UDA_TYPE]
+#define uta_type_node global_trees[TI_UTA_TYPE]
+#define sat_ha_type_node global_trees[TI_SAT_HA_TYPE]
+#define sat_sa_type_node global_trees[TI_SAT_SA_TYPE]
+#define sat_da_type_node global_trees[TI_SAT_DA_TYPE]
+#define sat_ta_type_node global_trees[TI_SAT_TA_TYPE]
+#define sat_uha_type_node global_trees[TI_SAT_UHA_TYPE]
+#define sat_usa_type_node global_trees[TI_SAT_USA_TYPE]
+#define sat_uda_type_node global_trees[TI_SAT_UDA_TYPE]
+#define sat_uta_type_node global_trees[TI_SAT_UTA_TYPE]
+
+/* The node that should be placed at the end of a parameter list to
+ indicate that the function does not take a variable number of
+ arguments. The TREE_VALUE will be void_type_node and there will be
+ no TREE_CHAIN. Language-independent code should not assume
+ anything else about this node. */
+#define void_list_node global_trees[TI_VOID_LIST_NODE]
+
+#define main_identifier_node global_trees[TI_MAIN_IDENTIFIER]
+#define MAIN_NAME_P(NODE) (IDENTIFIER_NODE_CHECK (NODE) == main_identifier_node)
+
+/* Optimization options (OPTIMIZATION_NODE) to use for default and current
+ functions. */
+#define optimization_default_node global_trees[TI_OPTIMIZATION_DEFAULT]
+#define optimization_current_node global_trees[TI_OPTIMIZATION_CURRENT]
+
+/* Default/current target options (TARGET_OPTION_NODE). */
+#define target_option_default_node global_trees[TI_TARGET_OPTION_DEFAULT]
+#define target_option_current_node global_trees[TI_TARGET_OPTION_CURRENT]
+
+/* Default tree list option(), optimize() pragmas to be linked into the
+ attribute list. */
+#define current_target_pragma global_trees[TI_CURRENT_TARGET_PRAGMA]
+#define current_optimize_pragma global_trees[TI_CURRENT_OPTIMIZE_PRAGMA]
+
+/* An enumeration of the standard C integer types. These must be
+ ordered so that shorter types appear before longer ones, and so
+ that signed types appear before unsigned ones, for the correct
+ functioning of interpret_integer() in c-lex.c. */
+enum integer_type_kind
+{
+ itk_char,
+ itk_signed_char,
+ itk_unsigned_char,
+ itk_short,
+ itk_unsigned_short,
+ itk_int,
+ itk_unsigned_int,
+ itk_long,
+ itk_unsigned_long,
+ itk_long_long,
+ itk_unsigned_long_long,
+ itk_none
+};
+
+typedef enum integer_type_kind integer_type_kind;
+
+/* The standard C integer types. Use integer_type_kind to index into
+ this array. */
+extern GTY(()) tree integer_types[itk_none];
+
+#define char_type_node integer_types[itk_char]
+#define signed_char_type_node integer_types[itk_signed_char]
+#define unsigned_char_type_node integer_types[itk_unsigned_char]
+#define short_integer_type_node integer_types[itk_short]
+#define short_unsigned_type_node integer_types[itk_unsigned_short]
+#define integer_type_node integer_types[itk_int]
+#define unsigned_type_node integer_types[itk_unsigned_int]
+#define long_integer_type_node integer_types[itk_long]
+#define long_unsigned_type_node integer_types[itk_unsigned_long]
+#define long_long_integer_type_node integer_types[itk_long_long]
+#define long_long_unsigned_type_node integer_types[itk_unsigned_long_long]
+
+/* Set to the default thread-local storage (tls) model to use. */
+
+extern enum tls_model flag_tls_default;
+
+
+/* A pointer-to-function member type looks like:
+
+ struct {
+ __P __pfn;
+ ptrdiff_t __delta;
+ };
+
+ If __pfn is NULL, it is a NULL pointer-to-member-function.
+
+ (Because the vtable is always the first thing in the object, we
+ don't need its offset.) If the function is virtual, then PFN is
+ one plus twice the index into the vtable; otherwise, it is just a
+ pointer to the function.
+
+ Unfortunately, using the lowest bit of PFN doesn't work in
+ architectures that don't impose alignment requirements on function
+ addresses, or that use the lowest bit to tell one ISA from another,
+ for example. For such architectures, we use the lowest bit of
+ DELTA instead of the lowest bit of the PFN, and DELTA will be
+ multiplied by 2. */
+
+enum ptrmemfunc_vbit_where_t
+{
+ ptrmemfunc_vbit_in_pfn,
+ ptrmemfunc_vbit_in_delta
+};
+
+#define NULL_TREE (tree) NULL
+
+extern tree decl_assembler_name (tree);
+extern bool decl_assembler_name_equal (tree decl, const_tree asmname);
+extern hashval_t decl_assembler_name_hash (const_tree asmname);
+
+/* Compute the number of bytes occupied by 'node'. This routine only
+ looks at TREE_CODE and, if the code is TREE_VEC, TREE_VEC_LENGTH. */
+
+extern size_t tree_size (const_tree);
+
+/* Compute the number of bytes occupied by a tree with code CODE. This
+ function cannot be used for TREE_VEC codes, which are of variable
+ length. */
+extern size_t tree_code_size (enum tree_code);
+
+/* Lowest level primitive for allocating a node.
+ The TREE_CODE is the only argument. Contents are initialized
+ to zero except for a few of the common fields. */
+
+extern tree make_node_stat (enum tree_code MEM_STAT_DECL);
+#define make_node(t) make_node_stat (t MEM_STAT_INFO)
+
+/* Make a copy of a node, with all the same contents. */
+
+extern tree copy_node_stat (tree MEM_STAT_DECL);
+#define copy_node(t) copy_node_stat (t MEM_STAT_INFO)
+
+/* Make a copy of a chain of TREE_LIST nodes. */
+
+extern tree copy_list (tree);
+
+/* Make a BINFO. */
+extern tree make_tree_binfo_stat (unsigned MEM_STAT_DECL);
+#define make_tree_binfo(t) make_tree_binfo_stat (t MEM_STAT_INFO)
+
+/* Make a TREE_VEC. */
+
+extern tree make_tree_vec_stat (int MEM_STAT_DECL);
+#define make_tree_vec(t) make_tree_vec_stat (t MEM_STAT_INFO)
+
+/* Return the (unique) IDENTIFIER_NODE node for a given name.
+ The name is supplied as a char *. */
+
+extern tree get_identifier (const char *);
+
+#if GCC_VERSION >= 3000
+#define get_identifier(str) \
+ (__builtin_constant_p (str) \
+ ? get_identifier_with_length ((str), strlen (str)) \
+ : get_identifier (str))
+#endif
+
+
+/* Identical to get_identifier, except that the length is assumed
+ known. */
+
+extern tree get_identifier_with_length (const char *, size_t);
+
+/* If an identifier with the name TEXT (a null-terminated string) has
+ previously been referred to, return that node; otherwise return
+ NULL_TREE. */
+
+extern tree maybe_get_identifier (const char *);
+
+/* Construct various types of nodes. */
+
+extern tree build_nt (enum tree_code, ...);
+extern tree build_nt_call_list (tree, tree);
+
+extern tree build0_stat (enum tree_code, tree MEM_STAT_DECL);
+#define build0(c,t) build0_stat (c,t MEM_STAT_INFO)
+extern tree build1_stat (enum tree_code, tree, tree MEM_STAT_DECL);
+#define build1(c,t1,t2) build1_stat (c,t1,t2 MEM_STAT_INFO)
+extern tree build2_stat (enum tree_code, tree, tree, tree MEM_STAT_DECL);
+#define build2(c,t1,t2,t3) build2_stat (c,t1,t2,t3 MEM_STAT_INFO)
+extern tree build3_stat (enum tree_code, tree, tree, tree, tree MEM_STAT_DECL);
+#define build3(c,t1,t2,t3,t4) build3_stat (c,t1,t2,t3,t4 MEM_STAT_INFO)
+extern tree build4_stat (enum tree_code, tree, tree, tree, tree,
+ tree MEM_STAT_DECL);
+#define build4(c,t1,t2,t3,t4,t5) build4_stat (c,t1,t2,t3,t4,t5 MEM_STAT_INFO)
+extern tree build5_stat (enum tree_code, tree, tree, tree, tree, tree,
+ tree MEM_STAT_DECL);
+#define build5(c,t1,t2,t3,t4,t5,t6) build5_stat (c,t1,t2,t3,t4,t5,t6 MEM_STAT_INFO)
+extern tree build7_stat (enum tree_code, tree, tree, tree, tree, tree,
+ tree, tree, tree MEM_STAT_DECL);
+#define build7(c,t1,t2,t3,t4,t5,t6,t7,t8) \
+ build7_stat (c,t1,t2,t3,t4,t5,t6,t7,t8 MEM_STAT_INFO)
+
+extern tree build_int_cst (tree, HOST_WIDE_INT);
+extern tree build_int_cst_type (tree, HOST_WIDE_INT);
+extern tree build_int_cstu (tree, unsigned HOST_WIDE_INT);
+extern tree build_int_cst_wide (tree, unsigned HOST_WIDE_INT, HOST_WIDE_INT);
+extern tree build_int_cst_wide_type (tree,
+ unsigned HOST_WIDE_INT, HOST_WIDE_INT);
+extern tree build_vector (tree, tree);
+extern tree build_vector_from_ctor (tree, VEC(constructor_elt,gc) *);
+extern tree build_constructor (tree, VEC(constructor_elt,gc) *);
+extern tree build_constructor_single (tree, tree, tree);
+extern tree build_constructor_from_list (tree, tree);
+extern tree build_real_from_int_cst (tree, const_tree);
+extern tree build_complex (tree, tree, tree);
+extern tree build_one_cst (tree);
+extern tree build_string (int, const char *);
+extern tree build_tree_list_stat (tree, tree MEM_STAT_DECL);
+#define build_tree_list(t,q) build_tree_list_stat(t,q MEM_STAT_INFO)
+extern tree build_decl_stat (enum tree_code, tree, tree MEM_STAT_DECL);
+extern tree build_fn_decl (const char *, tree);
+#define build_decl(c,t,q) build_decl_stat (c,t,q MEM_STAT_INFO)
+extern tree build_block (tree, tree, tree, tree);
+extern tree build_empty_stmt (void);
+extern tree build_omp_clause (enum omp_clause_code);
+
+extern tree build_vl_exp_stat (enum tree_code, int MEM_STAT_DECL);
+#define build_vl_exp(c,n) build_vl_exp_stat (c,n MEM_STAT_INFO)
+
+extern tree build_call_list (tree, tree, tree);
+extern tree build_call_nary (tree, tree, int, ...);
+extern tree build_call_valist (tree, tree, int, va_list);
+extern tree build_call_array (tree, tree, int, tree*);
+
+/* Construct various nodes representing data types. */
+
+extern tree make_signed_type (int);
+extern tree make_unsigned_type (int);
+extern tree signed_or_unsigned_type_for (int, tree);
+extern tree signed_type_for (tree);
+extern tree unsigned_type_for (tree);
+extern void initialize_sizetypes (bool);
+extern void set_sizetype (tree);
+extern void fixup_unsigned_type (tree);
+extern tree build_pointer_type_for_mode (tree, enum machine_mode, bool);
+extern tree build_pointer_type (tree);
+extern tree build_reference_type_for_mode (tree, enum machine_mode, bool);
+extern tree build_reference_type (tree);
+extern tree build_vector_type_for_mode (tree, enum machine_mode);
+extern tree build_vector_type (tree innertype, int nunits);
+extern tree build_type_no_quals (tree);
+extern tree build_index_type (tree);
+extern tree build_index_2_type (tree, tree);
+extern tree build_array_type (tree, tree);
+extern tree build_function_type (tree, tree);
+extern tree build_function_type_list (tree, ...);
+extern tree build_function_type_skip_args (tree, bitmap);
+extern tree build_function_decl_skip_args (tree, bitmap);
+extern tree build_varargs_function_type_list (tree, ...);
+extern tree build_method_type_directly (tree, tree, tree);
+extern tree build_method_type (tree, tree);
+extern tree build_offset_type (tree, tree);
+extern tree build_complex_type (tree);
+extern tree build_resx (int);
+extern tree array_type_nelts (const_tree);
+extern bool in_array_bounds_p (tree);
+extern bool range_in_array_bounds_p (tree);
+
+extern tree value_member (tree, tree);
+extern tree purpose_member (const_tree, tree);
+
+extern int attribute_list_equal (const_tree, const_tree);
+extern int attribute_list_contained (const_tree, const_tree);
+extern int tree_int_cst_equal (const_tree, const_tree);
+extern int tree_int_cst_lt (const_tree, const_tree);
+extern int tree_int_cst_compare (const_tree, const_tree);
+extern int host_integerp (const_tree, int);
+extern HOST_WIDE_INT tree_low_cst (const_tree, int);
+extern int tree_int_cst_msb (const_tree);
+extern int tree_int_cst_sgn (const_tree);
+extern int tree_int_cst_sign_bit (const_tree);
+extern unsigned int tree_int_cst_min_precision (tree, bool);
+extern bool tree_expr_nonnegative_p (tree);
+extern bool tree_expr_nonnegative_warnv_p (tree, bool *);
+extern bool may_negate_without_overflow_p (const_tree);
+extern tree strip_array_types (tree);
+
+/* Construct various nodes representing fract or accum data types. */
+
+extern tree make_fract_type (int, int, int);
+extern tree make_accum_type (int, int, int);
+
+#define make_signed_fract_type(P) make_fract_type (P, 0, 0)
+#define make_unsigned_fract_type(P) make_fract_type (P, 1, 0)
+#define make_sat_signed_fract_type(P) make_fract_type (P, 0, 1)
+#define make_sat_unsigned_fract_type(P) make_fract_type (P, 1, 1)
+#define make_signed_accum_type(P) make_accum_type (P, 0, 0)
+#define make_unsigned_accum_type(P) make_accum_type (P, 1, 0)
+#define make_sat_signed_accum_type(P) make_accum_type (P, 0, 1)
+#define make_sat_unsigned_accum_type(P) make_accum_type (P, 1, 1)
+
+#define make_or_reuse_signed_fract_type(P) \
+ make_or_reuse_fract_type (P, 0, 0)
+#define make_or_reuse_unsigned_fract_type(P) \
+ make_or_reuse_fract_type (P, 1, 0)
+#define make_or_reuse_sat_signed_fract_type(P) \
+ make_or_reuse_fract_type (P, 0, 1)
+#define make_or_reuse_sat_unsigned_fract_type(P) \
+ make_or_reuse_fract_type (P, 1, 1)
+#define make_or_reuse_signed_accum_type(P) \
+ make_or_reuse_accum_type (P, 0, 0)
+#define make_or_reuse_unsigned_accum_type(P) \
+ make_or_reuse_accum_type (P, 1, 0)
+#define make_or_reuse_sat_signed_accum_type(P) \
+ make_or_reuse_accum_type (P, 0, 1)
+#define make_or_reuse_sat_unsigned_accum_type(P) \
+ make_or_reuse_accum_type (P, 1, 1)
+
+/* From expmed.c. Since rtl.h is included after tree.h, we can't
+ put the prototype here. Rtl.h does declare the prototype if
+ tree.h had been included. */
+
+extern tree make_tree (tree, rtx);
+
+/* Return a type like TTYPE except that its TYPE_ATTRIBUTES
+ is ATTRIBUTE.
+
+ Such modified types already made are recorded so that duplicates
+ are not made. */
+
+extern tree build_type_attribute_variant (tree, tree);
+extern tree build_decl_attribute_variant (tree, tree);
+
+/* Structure describing an attribute and a function to handle it. */
+struct attribute_spec
+{
+ /* The name of the attribute (without any leading or trailing __),
+ or NULL to mark the end of a table of attributes. */
+ const char *const name;
+ /* The minimum length of the list of arguments of the attribute. */
+ const int min_length;
+ /* The maximum length of the list of arguments of the attribute
+ (-1 for no maximum). */
+ const int max_length;
+ /* Whether this attribute requires a DECL. If it does, it will be passed
+ from types of DECLs, function return types and array element types to
+ the DECLs, function types and array types respectively; but when
+ applied to a type in any other circumstances, it will be ignored with
+ a warning. (If greater control is desired for a given attribute,
+ this should be false, and the flags argument to the handler may be
+ used to gain greater control in that case.) */
+ const bool decl_required;
+ /* Whether this attribute requires a type. If it does, it will be passed
+ from a DECL to the type of that DECL. */
+ const bool type_required;
+ /* Whether this attribute requires a function (or method) type. If it does,
+ it will be passed from a function pointer type to the target type,
+ and from a function return type (which is not itself a function
+ pointer type) to the function type. */
+ const bool function_type_required;
+ /* Function to handle this attribute. NODE points to the node to which
+ the attribute is to be applied. If a DECL, it should be modified in
+ place; if a TYPE, a copy should be created. NAME is the name of the
+ attribute (possibly with leading or trailing __). ARGS is the TREE_LIST
+ of the arguments (which may be NULL). FLAGS gives further information
+ about the context of the attribute. Afterwards, the attributes will
+ be added to the DECL_ATTRIBUTES or TYPE_ATTRIBUTES, as appropriate,
+ unless *NO_ADD_ATTRS is set to true (which should be done on error,
+ as well as in any other cases when the attributes should not be added
+ to the DECL or TYPE). Depending on FLAGS, any attributes to be
+ applied to another type or DECL later may be returned;
+ otherwise the return value should be NULL_TREE. This pointer may be
+ NULL if no special handling is required beyond the checks implied
+ by the rest of this structure. */
+ tree (*const handler) (tree *node, tree name, tree args,
+ int flags, bool *no_add_attrs);
+};
+
+/* Flags that may be passed in the third argument of decl_attributes, and
+ to handler functions for attributes. */
+enum attribute_flags
+{
+ /* The type passed in is the type of a DECL, and any attributes that
+ should be passed in again to be applied to the DECL rather than the
+ type should be returned. */
+ ATTR_FLAG_DECL_NEXT = 1,
+ /* The type passed in is a function return type, and any attributes that
+ should be passed in again to be applied to the function type rather
+ than the return type should be returned. */
+ ATTR_FLAG_FUNCTION_NEXT = 2,
+ /* The type passed in is an array element type, and any attributes that
+ should be passed in again to be applied to the array type rather
+ than the element type should be returned. */
+ ATTR_FLAG_ARRAY_NEXT = 4,
+ /* The type passed in is a structure, union or enumeration type being
+ created, and should be modified in place. */
+ ATTR_FLAG_TYPE_IN_PLACE = 8,
+ /* The attributes are being applied by default to a library function whose
+ name indicates known behavior, and should be silently ignored if they
+ are not in fact compatible with the function type. */
+ ATTR_FLAG_BUILT_IN = 16
+};
+
+/* Default versions of target-overridable functions. */
+
+extern tree merge_decl_attributes (tree, tree);
+extern tree merge_type_attributes (tree, tree);
+
+/* Given a tree node and a string, return nonzero if the tree node is
+ a valid attribute name for the string. */
+
+extern int is_attribute_p (const char *, const_tree);
+
+/* Given an attribute name and a list of attributes, return the list element
+ of the attribute or NULL_TREE if not found. */
+
+extern tree lookup_attribute (const char *, tree);
+
+/* Remove any instances of attribute ATTR_NAME in LIST and return the
+ modified list. */
+
+extern tree remove_attribute (const char *, tree);
+
+/* Given two attributes lists, return a list of their union. */
+
+extern tree merge_attributes (tree, tree);
+
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+/* Given two Windows decl attributes lists, possibly including
+ dllimport, return a list of their union . */
+extern tree merge_dllimport_decl_attributes (tree, tree);
+
+/* Handle a "dllimport" or "dllexport" attribute. */
+extern tree handle_dll_attribute (tree *, tree, tree, int, bool *);
+#endif
+
+/* Check whether CAND is suitable to be returned from get_qualified_type
+ (BASE, TYPE_QUALS). */
+
+extern bool check_qualified_type (const_tree, const_tree, int);
+
+/* Return a version of the TYPE, qualified as indicated by the
+ TYPE_QUALS, if one exists. If no qualified version exists yet,
+ return NULL_TREE. */
+
+extern tree get_qualified_type (tree, int);
+
+/* Like get_qualified_type, but creates the type if it does not
+ exist. This function never returns NULL_TREE. */
+
+extern tree build_qualified_type (tree, int);
+
+/* Like build_qualified_type, but only deals with the `const' and
+ `volatile' qualifiers. This interface is retained for backwards
+ compatibility with the various front-ends; new code should use
+ build_qualified_type instead. */
+
+#define build_type_variant(TYPE, CONST_P, VOLATILE_P) \
+ build_qualified_type ((TYPE), \
+ ((CONST_P) ? TYPE_QUAL_CONST : 0) \
+ | ((VOLATILE_P) ? TYPE_QUAL_VOLATILE : 0))
+
+/* Make a copy of a type node. */
+
+extern tree build_distinct_type_copy (tree);
+extern tree build_variant_type_copy (tree);
+
+/* Finish up a builtin RECORD_TYPE. Give it a name and provide its
+ fields. Optionally specify an alignment, and then lay it out. */
+
+extern void finish_builtin_struct (tree, const char *,
+ tree, tree);
+
+/* Given a ..._TYPE node, calculate the TYPE_SIZE, TYPE_SIZE_UNIT,
+ TYPE_ALIGN and TYPE_MODE fields. If called more than once on one
+ node, does nothing except for the first time. */
+
+extern void layout_type (tree);
+
+/* These functions allow a front-end to perform a manual layout of a
+ RECORD_TYPE. (For instance, if the placement of subsequent fields
+ depends on the placement of fields so far.) Begin by calling
+ start_record_layout. Then, call place_field for each of the
+ fields. Then, call finish_record_layout. See layout_type for the
+ default way in which these functions are used. */
+
+typedef struct record_layout_info_s
+{
+ /* The RECORD_TYPE that we are laying out. */
+ tree t;
+ /* The offset into the record so far, in bytes, not including bits in
+ BITPOS. */
+ tree offset;
+ /* The last known alignment of SIZE. */
+ unsigned int offset_align;
+ /* The bit position within the last OFFSET_ALIGN bits, in bits. */
+ tree bitpos;
+ /* The alignment of the record so far, in bits. */
+ unsigned int record_align;
+ /* The alignment of the record so far, ignoring #pragma pack and
+ __attribute__ ((packed)), in bits. */
+ unsigned int unpacked_align;
+ /* The previous field layed out. */
+ tree prev_field;
+ /* The static variables (i.e., class variables, as opposed to
+ instance variables) encountered in T. */
+ tree pending_statics;
+ /* Bits remaining in the current alignment group */
+ int remaining_in_alignment;
+ /* True if we've seen a packed field that didn't have normal
+ alignment anyway. */
+ int packed_maybe_necessary;
+} *record_layout_info;
+
+extern record_layout_info start_record_layout (tree);
+extern tree bit_from_pos (tree, tree);
+extern tree byte_from_pos (tree, tree);
+extern void pos_from_bit (tree *, tree *, unsigned int, tree);
+extern void normalize_offset (tree *, tree *, unsigned int);
+extern tree rli_size_unit_so_far (record_layout_info);
+extern tree rli_size_so_far (record_layout_info);
+extern void normalize_rli (record_layout_info);
+extern void place_field (record_layout_info, tree);
+extern void compute_record_mode (tree);
+extern void finish_record_layout (record_layout_info, int);
+
+/* Given a hashcode and a ..._TYPE node (for which the hashcode was made),
+ return a canonicalized ..._TYPE node, so that duplicates are not made.
+ How the hash code is computed is up to the caller, as long as any two
+ callers that could hash identical-looking type nodes agree. */
+
+extern tree type_hash_canon (unsigned int, tree);
+
+/* Given a VAR_DECL, PARM_DECL, RESULT_DECL or FIELD_DECL node,
+ calculates the DECL_SIZE, DECL_SIZE_UNIT, DECL_ALIGN and DECL_MODE
+ fields. Call this only once for any given decl node.
+
+ Second argument is the boundary that this field can be assumed to
+ be starting at (in bits). Zero means it can be assumed aligned
+ on any boundary that may be needed. */
+
+extern void layout_decl (tree, unsigned);
+
+/* Given a VAR_DECL, PARM_DECL or RESULT_DECL, clears the results of
+ a previous call to layout_decl and calls it again. */
+
+extern void relayout_decl (tree);
+
+/* Return the mode for data of a given size SIZE and mode class CLASS.
+ If LIMIT is nonzero, then don't use modes bigger than MAX_FIXED_MODE_SIZE.
+ The value is BLKmode if no other mode is found. This is like
+ mode_for_size, but is passed a tree. */
+
+extern enum machine_mode mode_for_size_tree (const_tree, enum mode_class, int);
+
+/* Return an expr equal to X but certainly not valid as an lvalue. */
+
+extern tree non_lvalue (tree);
+
+extern tree convert (tree, tree);
+extern unsigned int expr_align (const_tree);
+extern tree expr_first (tree);
+extern tree expr_last (tree);
+extern tree expr_only (tree);
+extern tree size_in_bytes (const_tree);
+extern HOST_WIDE_INT int_size_in_bytes (const_tree);
+extern HOST_WIDE_INT max_int_size_in_bytes (const_tree);
+extern tree bit_position (const_tree);
+extern HOST_WIDE_INT int_bit_position (const_tree);
+extern tree byte_position (const_tree);
+extern HOST_WIDE_INT int_byte_position (const_tree);
+
+/* Define data structures, macros, and functions for handling sizes
+ and the various types used to represent sizes. */
+
+enum size_type_kind
+{
+ SIZETYPE, /* Normal representation of sizes in bytes. */
+ SSIZETYPE, /* Signed representation of sizes in bytes. */
+ BITSIZETYPE, /* Normal representation of sizes in bits. */
+ SBITSIZETYPE, /* Signed representation of sizes in bits. */
+ TYPE_KIND_LAST};
+
+extern GTY(()) tree sizetype_tab[(int) TYPE_KIND_LAST];
+
+#define sizetype sizetype_tab[(int) SIZETYPE]
+#define bitsizetype sizetype_tab[(int) BITSIZETYPE]
+#define ssizetype sizetype_tab[(int) SSIZETYPE]
+#define sbitsizetype sizetype_tab[(int) SBITSIZETYPE]
+
+extern tree size_int_kind (HOST_WIDE_INT, enum size_type_kind);
+extern tree size_binop (enum tree_code, tree, tree);
+extern tree size_diffop (tree, tree);
+
+#define size_int(L) size_int_kind (L, SIZETYPE)
+#define ssize_int(L) size_int_kind (L, SSIZETYPE)
+#define bitsize_int(L) size_int_kind (L, BITSIZETYPE)
+#define sbitsize_int(L) size_int_kind (L, SBITSIZETYPE)
+
+extern tree round_up (tree, int);
+extern tree round_down (tree, int);
+extern tree get_pending_sizes (void);
+extern void put_pending_size (tree);
+extern void put_pending_sizes (tree);
+
+/* Type for sizes of data-type. */
+
+#define BITS_PER_UNIT_LOG \
+ ((BITS_PER_UNIT > 1) + (BITS_PER_UNIT > 2) + (BITS_PER_UNIT > 4) \
+ + (BITS_PER_UNIT > 8) + (BITS_PER_UNIT > 16) + (BITS_PER_UNIT > 32) \
+ + (BITS_PER_UNIT > 64) + (BITS_PER_UNIT > 128) + (BITS_PER_UNIT > 256))
+
+/* If nonzero, an upper limit on alignment of structure fields, in bits, */
+extern unsigned int maximum_field_alignment;
+/* and its original value in bytes, specified via -fpack-struct=<value>. */
+extern unsigned int initial_max_fld_align;
+
+/* Concatenate two lists (chains of TREE_LIST nodes) X and Y
+ by making the last node in X point to Y.
+ Returns X, except if X is 0 returns Y. */
+
+extern tree chainon (tree, tree);
+
+/* Make a new TREE_LIST node from specified PURPOSE, VALUE and CHAIN. */
+
+extern tree tree_cons_stat (tree, tree, tree MEM_STAT_DECL);
+#define tree_cons(t,q,w) tree_cons_stat (t,q,w MEM_STAT_INFO)
+
+/* Return the last tree node in a chain. */
+
+extern tree tree_last (tree);
+
+/* Reverse the order of elements in a chain, and return the new head. */
+
+extern tree nreverse (tree);
+
+/* Returns the length of a chain of nodes
+ (number of chain pointers to follow before reaching a null pointer). */
+
+extern int list_length (const_tree);
+
+/* Returns the number of FIELD_DECLs in a type. */
+
+extern int fields_length (const_tree);
+
+/* Given an initializer INIT, return TRUE if INIT is zero or some
+ aggregate of zeros. Otherwise return FALSE. */
+
+extern bool initializer_zerop (const_tree);
+
+/* Given a CONSTRUCTOR CTOR, return the elements as a TREE_LIST. */
+
+extern tree ctor_to_list (tree);
+
+/* Examine CTOR to discover:
+ * how many scalar fields are set to nonzero values,
+ and place it in *P_NZ_ELTS;
+ * how many scalar fields in total are in CTOR,
+ and place it in *P_ELT_COUNT.
+ * if a type is a union, and the initializer from the constructor
+ is not the largest element in the union, then set *p_must_clear.
+
+ Return whether or not CTOR is a valid static constant initializer, the same
+ as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
+
+extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, HOST_WIDE_INT *,
+ bool *);
+
+extern HOST_WIDE_INT count_type_elements (const_tree, bool);
+
+/* integer_zerop (tree x) is nonzero if X is an integer constant of value 0. */
+
+extern int integer_zerop (const_tree);
+
+/* integer_onep (tree x) is nonzero if X is an integer constant of value 1. */
+
+extern int integer_onep (const_tree);
+
+/* integer_all_onesp (tree x) is nonzero if X is an integer constant
+ all of whose significant bits are 1. */
+
+extern int integer_all_onesp (const_tree);
+
+/* integer_pow2p (tree x) is nonzero is X is an integer constant with
+ exactly one bit 1. */
+
+extern int integer_pow2p (const_tree);
+
+/* integer_nonzerop (tree x) is nonzero if X is an integer constant
+ with a nonzero value. */
+
+extern int integer_nonzerop (const_tree);
+
+extern bool cst_and_fits_in_hwi (const_tree);
+extern tree num_ending_zeros (const_tree);
+
+/* fixed_zerop (tree x) is nonzero if X is a fixed-point constant of
+ value 0. */
+
+extern int fixed_zerop (const_tree);
+
+/* staticp (tree x) is nonzero if X is a reference to data allocated
+ at a fixed address in memory. Returns the outermost data. */
+
+extern tree staticp (tree);
+
+/* save_expr (EXP) returns an expression equivalent to EXP
+ but it can be used multiple times within context CTX
+ and only evaluate EXP once. */
+
+extern tree save_expr (tree);
+
+/* Look inside EXPR and into any simple arithmetic operations. Return
+ the innermost non-arithmetic node. */
+
+extern tree skip_simple_arithmetic (tree);
+
+/* Return which tree structure is used by T. */
+
+enum tree_node_structure_enum tree_node_structure (const_tree);
+
+/* Return 1 if EXP contains a PLACEHOLDER_EXPR; i.e., if it represents a size
+ or offset that depends on a field within a record.
+
+ Note that we only allow such expressions within simple arithmetic
+ or a COND_EXPR. */
+
+extern bool contains_placeholder_p (const_tree);
+
+/* This macro calls the above function but short-circuits the common
+ case of a constant to save time. Also check for null. */
+
+#define CONTAINS_PLACEHOLDER_P(EXP) \
+ ((EXP) != 0 && ! TREE_CONSTANT (EXP) && contains_placeholder_p (EXP))
+
+/* Return 1 if any part of the computation of TYPE involves a PLACEHOLDER_EXPR.
+ This includes size, bounds, qualifiers (for QUAL_UNION_TYPE) and field
+ positions. */
+
+extern bool type_contains_placeholder_p (tree);
+
+/* Given a tree EXP, a FIELD_DECL F, and a replacement value R,
+ return a tree with all occurrences of references to F in a
+ PLACEHOLDER_EXPR replaced by R. Note that we assume here that EXP
+ contains only arithmetic expressions. */
+
+extern tree substitute_in_expr (tree, tree, tree);
+
+/* This macro calls the above function but short-circuits the common
+ case of a constant to save time and also checks for NULL. */
+
+#define SUBSTITUTE_IN_EXPR(EXP, F, R) \
+ ((EXP) == 0 || TREE_CONSTANT (EXP) ? (EXP) : substitute_in_expr (EXP, F, R))
+
+/* Similar, but look for a PLACEHOLDER_EXPR in EXP and find a replacement
+ for it within OBJ, a tree that is an object or a chain of references. */
+
+extern tree substitute_placeholder_in_expr (tree, tree);
+
+/* This macro calls the above function but short-circuits the common
+ case of a constant to save time and also checks for NULL. */
+
+#define SUBSTITUTE_PLACEHOLDER_IN_EXPR(EXP, OBJ) \
+ ((EXP) == 0 || TREE_CONSTANT (EXP) ? (EXP) \
+ : substitute_placeholder_in_expr (EXP, OBJ))
+
+/* variable_size (EXP) is like save_expr (EXP) except that it
+ is for the special case of something that is part of a
+ variable size for a data type. It makes special arrangements
+ to compute the value at the right time when the data type
+ belongs to a function parameter. */
+
+extern tree variable_size (tree);
+
+/* stabilize_reference (EXP) returns a reference equivalent to EXP
+ but it can be used multiple times
+ and only evaluate the subexpressions once. */
+
+extern tree stabilize_reference (tree);
+
+/* Subroutine of stabilize_reference; this is called for subtrees of
+ references. Any expression with side-effects must be put in a SAVE_EXPR
+ to ensure that it is only evaluated once. */
+
+extern tree stabilize_reference_1 (tree);
+
+/* Return EXP, stripped of any conversions to wider types
+ in such a way that the result of converting to type FOR_TYPE
+ is the same as if EXP were converted to FOR_TYPE.
+ If FOR_TYPE is 0, it signifies EXP's type. */
+
+extern tree get_unwidened (tree, tree);
+
+/* Return OP or a simpler expression for a narrower value
+ which can be sign-extended or zero-extended to give back OP.
+ Store in *UNSIGNEDP_PTR either 1 if the value should be zero-extended
+ or 0 if the value should be sign-extended. */
+
+extern tree get_narrower (tree, int *);
+
+/* Return true if T is an expression that get_inner_reference handles. */
+
+extern int handled_component_p (const_tree);
+
+/* Given an expression EXP that is a handled_component_p,
+ look for the ultimate containing object, which is returned and specify
+ the access position and size. */
+
+extern tree get_inner_reference (tree, HOST_WIDE_INT *, HOST_WIDE_INT *,
+ tree *, enum machine_mode *, int *, int *,
+ bool);
+
+/* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
+ ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
+ EXP is marked as PACKED. */
+
+extern bool contains_packed_reference (const_tree exp);
+
+/* Return a tree of sizetype representing the size, in bytes, of the element
+ of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
+
+extern tree array_ref_element_size (tree);
+
+/* Return a tree representing the lower bound of the array mentioned in
+ EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
+
+extern tree array_ref_low_bound (tree);
+
+/* Return a tree representing the upper bound of the array mentioned in
+ EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
+
+extern tree array_ref_up_bound (tree);
+
+/* Return a tree representing the offset, in bytes, of the field referenced
+ by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
+
+extern tree component_ref_field_offset (tree);
+
+/* Given a DECL or TYPE, return the scope in which it was declared, or
+ NUL_TREE if there is no containing scope. */
+
+extern tree get_containing_scope (const_tree);
+
+/* Return the FUNCTION_DECL which provides this _DECL with its context,
+ or zero if none. */
+extern tree decl_function_context (const_tree);
+
+/* Return the RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE which provides
+ this _DECL with its context, or zero if none. */
+extern tree decl_type_context (const_tree);
+
+/* Return 1 if EXPR is the real constant zero. */
+extern int real_zerop (const_tree);
+
+/* Declare commonly used variables for tree structure. */
+
+/* Nonzero means lvalues are limited to those valid in pedantic ANSI C.
+ Zero means allow extended lvalues. */
+
+extern int pedantic_lvalues;
+
+/* Points to the FUNCTION_DECL of the function whose body we are reading. */
+
+extern GTY(()) tree current_function_decl;
+
+/* Nonzero means a FUNC_BEGIN label was emitted. */
+extern GTY(()) const char * current_function_func_begin_label;
+
+/* Iterator for going through the function arguments. */
+typedef struct {
+ tree fntype; /* function type declaration */
+ tree next; /* TREE_LIST pointing to the next argument */
+} function_args_iterator;
+
+/* Initialize the iterator I with arguments from function FNDECL */
+
+static inline void
+function_args_iter_init (function_args_iterator *i, tree fntype)
+{
+ i->fntype = fntype;
+ i->next = TYPE_ARG_TYPES (fntype);
+}
+
+/* Return a pointer that holds the next argument if there are more arguments to
+ handle, otherwise return NULL. */
+
+static inline tree *
+function_args_iter_cond_ptr (function_args_iterator *i)
+{
+ return (i->next) ? &TREE_VALUE (i->next) : NULL;
+}
+
+/* Return the next argument if there are more arguments to handle, otherwise
+ return NULL. */
+
+static inline tree
+function_args_iter_cond (function_args_iterator *i)
+{
+ return (i->next) ? TREE_VALUE (i->next) : NULL_TREE;
+}
+
+/* Advance to the next argument. */
+static inline void
+function_args_iter_next (function_args_iterator *i)
+{
+ gcc_assert (i->next != NULL_TREE);
+ i->next = TREE_CHAIN (i->next);
+}
+
+/* We set BLOCK_SOURCE_LOCATION only to inlined function entry points. */
+
+static inline bool
+inlined_function_outer_scope_p (const_tree block)
+{
+ return BLOCK_SOURCE_LOCATION (block) != UNKNOWN_LOCATION;
+}
+
+/* Loop over all function arguments of FNTYPE. In each iteration, PTR is set
+ to point to the next tree element. ITER is an instance of
+ function_args_iterator used to iterate the arguments. */
+#define FOREACH_FUNCTION_ARGS_PTR(FNTYPE, PTR, ITER) \
+ for (function_args_iter_init (&(ITER), (FNTYPE)); \
+ (PTR = function_args_iter_cond_ptr (&(ITER))) != NULL; \
+ function_args_iter_next (&(ITER)))
+
+/* Loop over all function arguments of FNTYPE. In each iteration, TREE is set
+ to the next tree element. ITER is an instance of function_args_iterator
+ used to iterate the arguments. */
+#define FOREACH_FUNCTION_ARGS(FNTYPE, TREE, ITER) \
+ for (function_args_iter_init (&(ITER), (FNTYPE)); \
+ (TREE = function_args_iter_cond (&(ITER))) != NULL_TREE; \
+ function_args_iter_next (&(ITER)))
+
+
+
+/* In tree.c */
+extern unsigned crc32_string (unsigned, const char *);
+extern unsigned crc32_byte (unsigned, char);
+extern void clean_symbol_name (char *);
+extern tree get_file_function_name (const char *);
+extern tree get_callee_fndecl (const_tree);
+extern void change_decl_assembler_name (tree, tree);
+extern int type_num_arguments (const_tree);
+extern bool associative_tree_code (enum tree_code);
+extern bool commutative_tree_code (enum tree_code);
+extern tree upper_bound_in_type (tree, tree);
+extern tree lower_bound_in_type (tree, tree);
+extern int operand_equal_for_phi_arg_p (const_tree, const_tree);
+extern tree call_expr_arg (tree, int);
+extern tree *call_expr_argp (tree, int);
+extern tree call_expr_arglist (tree);
+extern tree create_artificial_label (void);
+extern const char *get_name (tree);
+extern bool stdarg_p (tree);
+extern bool prototype_p (tree);
+extern int function_args_count (tree);
+extern bool auto_var_in_fn_p (const_tree, const_tree);
+
+/* In gimplify.c */
+extern tree unshare_expr (tree);
+
+/* In stmt.c */
+
+extern void expand_expr_stmt (tree);
+extern int warn_if_unused_value (const_tree, location_t);
+extern void expand_label (tree);
+extern void expand_goto (tree);
+
+extern rtx expand_stack_save (void);
+extern void expand_stack_restore (tree);
+extern void expand_return (tree);
+
+/* In tree-eh.c */
+extern void using_eh_for_cleanups (void);
+
+/* In fold-const.c */
+
+/* Non-zero if we are folding constants inside an initializer; zero
+ otherwise. */
+extern int folding_initializer;
+
+/* Convert between trees and native memory representation. */
+extern int native_encode_expr (const_tree, unsigned char *, int);
+extern tree native_interpret_expr (tree, const unsigned char *, int);
+
+/* Fold constants as much as possible in an expression.
+ Returns the simplified expression.
+ Acts only on the top level of the expression;
+ if the argument itself cannot be simplified, its
+ subexpressions are not changed. */
+
+extern tree fold (tree);
+extern tree fold_unary (enum tree_code, tree, tree);
+extern tree fold_unary_ignore_overflow (enum tree_code, tree, tree);
+extern tree fold_binary (enum tree_code, tree, tree, tree);
+extern tree fold_ternary (enum tree_code, tree, tree, tree, tree);
+extern tree fold_build1_stat (enum tree_code, tree, tree MEM_STAT_DECL);
+#define fold_build1(c,t1,t2) fold_build1_stat (c, t1, t2 MEM_STAT_INFO)
+extern tree fold_build2_stat (enum tree_code, tree, tree, tree MEM_STAT_DECL);
+#define fold_build2(c,t1,t2,t3) fold_build2_stat (c, t1, t2, t3 MEM_STAT_INFO)
+extern tree fold_build3_stat (enum tree_code, tree, tree, tree, tree MEM_STAT_DECL);
+#define fold_build3(c,t1,t2,t3,t4) fold_build3_stat (c, t1, t2, t3, t4 MEM_STAT_INFO)
+extern tree fold_build1_initializer (enum tree_code, tree, tree);
+extern tree fold_build2_initializer (enum tree_code, tree, tree, tree);
+extern tree fold_build3_initializer (enum tree_code, tree, tree, tree, tree);
+extern tree fold_build_call_array (tree, tree, int, tree *);
+extern tree fold_build_call_array_initializer (tree, tree, int, tree *);
+extern bool fold_convertible_p (const_tree, const_tree);
+extern tree fold_convert (tree, tree);
+extern tree fold_single_bit_test (enum tree_code, tree, tree, tree);
+extern tree fold_ignored_result (tree);
+extern tree fold_abs_const (tree, tree);
+extern tree fold_indirect_ref_1 (tree, tree);
+extern void fold_defer_overflow_warnings (void);
+extern void fold_undefer_overflow_warnings (bool, const_gimple, int);
+extern void fold_undefer_and_ignore_overflow_warnings (void);
+extern bool fold_deferring_overflow_warnings_p (void);
+extern tree maybe_fold_offset_to_reference (tree, tree, tree);
+extern tree maybe_fold_offset_to_address (tree, tree, tree);
+extern tree maybe_fold_stmt_addition (tree, tree, tree);
+
+extern tree force_fit_type_double (tree, unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ int, bool);
+
+extern int fit_double_type (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *, const_tree);
+extern int add_double_with_sign (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *,
+ bool);
+#define add_double(l1,h1,l2,h2,lv,hv) \
+ add_double_with_sign (l1, h1, l2, h2, lv, hv, false)
+extern int neg_double (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *);
+extern int mul_double_with_sign (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *,
+ bool);
+#define mul_double(l1,h1,l2,h2,lv,hv) \
+ mul_double_with_sign (l1, h1, l2, h2, lv, hv, false)
+extern void lshift_double (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned int,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *, int);
+extern void rshift_double (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned int,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *, int);
+extern void lrotate_double (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned int,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *);
+extern void rrotate_double (unsigned HOST_WIDE_INT, HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned int,
+ unsigned HOST_WIDE_INT *, HOST_WIDE_INT *);
+
+extern int div_and_round_double (enum tree_code, int, unsigned HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned HOST_WIDE_INT,
+ HOST_WIDE_INT, unsigned HOST_WIDE_INT *,
+ HOST_WIDE_INT *, unsigned HOST_WIDE_INT *,
+ HOST_WIDE_INT *);
+
+enum operand_equal_flag
+{
+ OEP_ONLY_CONST = 1,
+ OEP_PURE_SAME = 2,
+ OEP_ALLOW_NULL = 4 /* Allow NULL operands to be passed in and compared. */
+};
+
+extern int operand_equal_p (const_tree, const_tree, unsigned int);
+extern int multiple_of_p (tree, const_tree, const_tree);
+extern tree omit_one_operand (tree, tree, tree);
+extern tree omit_two_operands (tree, tree, tree, tree);
+extern tree invert_truthvalue (tree);
+extern tree fold_truth_not_expr (tree);
+extern tree fold_unary_to_constant (enum tree_code, tree, tree);
+extern tree fold_binary_to_constant (enum tree_code, tree, tree, tree);
+extern tree fold_read_from_constant_string (tree);
+extern tree int_const_binop (enum tree_code, const_tree, const_tree, int);
+extern tree build_fold_addr_expr (tree);
+extern tree fold_build_cleanup_point_expr (tree type, tree expr);
+extern tree fold_strip_sign_ops (tree);
+extern tree build_fold_addr_expr_with_type (tree, tree);
+extern tree build_fold_indirect_ref (tree);
+extern tree fold_indirect_ref (tree);
+extern tree constant_boolean_node (int, tree);
+extern tree build_low_bits_mask (tree, unsigned);
+
+extern bool tree_swap_operands_p (const_tree, const_tree, bool);
+extern enum tree_code swap_tree_comparison (enum tree_code);
+
+extern bool ptr_difference_const (tree, tree, HOST_WIDE_INT *);
+extern enum tree_code invert_tree_comparison (enum tree_code, bool);
+
+extern bool tree_expr_nonzero_p (tree);
+extern bool tree_unary_nonzero_warnv_p (enum tree_code, tree, tree, bool *);
+extern bool tree_binary_nonzero_warnv_p (enum tree_code, tree, tree, tree op1,
+ bool *);
+extern bool tree_single_nonzero_warnv_p (tree, bool *);
+extern bool tree_expr_nonzero_warnv_p (tree, bool *);
+extern bool tree_unary_nonnegative_warnv_p (enum tree_code, tree, tree, bool *);
+extern bool tree_binary_nonnegative_warnv_p (enum tree_code, tree, tree, tree,
+ bool *);
+extern bool tree_single_nonnegative_warnv_p (tree t, bool *strict_overflow_p);
+extern bool tree_invalid_nonnegative_warnv_p (tree t, bool *strict_overflow_p);
+extern bool tree_call_nonnegative_warnv_p (tree, tree, tree, tree, bool *);
+
+extern bool tree_expr_nonzero_warnv_p (tree, bool *);
+
+extern bool fold_real_zero_addition_p (const_tree, const_tree, int);
+
+/* Return nonzero if CODE is a tree code that represents a truth value. */
+static inline bool
+truth_value_p (enum tree_code code)
+{
+ return (TREE_CODE_CLASS (code) == tcc_comparison
+ || code == TRUTH_AND_EXPR || code == TRUTH_ANDIF_EXPR
+ || code == TRUTH_OR_EXPR || code == TRUTH_ORIF_EXPR
+ || code == TRUTH_XOR_EXPR || code == TRUTH_NOT_EXPR);
+}
+
+
+/* In builtins.c */
+extern tree fold_call_expr (tree, bool);
+extern tree fold_builtin_fputs (tree, tree, bool, bool, tree);
+extern tree fold_builtin_strcpy (tree, tree, tree, tree);
+extern tree fold_builtin_strncpy (tree, tree, tree, tree, tree);
+extern tree fold_builtin_memory_chk (tree, tree, tree, tree, tree, tree, bool,
+ enum built_in_function);
+extern tree fold_builtin_stxcpy_chk (tree, tree, tree, tree, tree, bool,
+ enum built_in_function);
+extern tree fold_builtin_strncpy_chk (tree, tree, tree, tree, tree);
+extern tree fold_builtin_snprintf_chk (tree, tree, enum built_in_function);
+extern bool fold_builtin_next_arg (tree, bool);
+extern enum built_in_function builtin_mathfn_code (const_tree);
+extern tree build_function_call_expr (tree, tree);
+extern tree fold_builtin_call_array (tree, tree, int, tree *);
+extern void debug_fold_checksum (const_tree);
+extern tree build_call_expr (tree, int, ...);
+extern tree mathfn_built_in (tree, enum built_in_function fn);
+extern tree strip_float_extensions (tree);
+extern tree c_strlen (tree, int);
+extern tree std_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
+extern tree build_va_arg_indirect_ref (tree);
+extern tree build_string_literal (int, const char *);
+extern bool validate_arglist (const_tree, ...);
+extern rtx builtin_memset_read_str (void *, HOST_WIDE_INT, enum machine_mode);
+extern int get_pointer_alignment (tree, unsigned int);
+extern int get_object_alignment (tree, unsigned int, unsigned int);
+extern tree fold_call_stmt (gimple, bool);
+extern tree gimple_fold_builtin_snprintf_chk (gimple, tree, enum built_in_function);
+
+/* In convert.c */
+extern tree strip_float_extensions (tree);
+
+/* In tree.c */
+extern int really_constant_p (const_tree);
+extern bool decl_address_invariant_p (const_tree);
+extern bool decl_address_ip_invariant_p (const_tree);
+extern int int_fits_type_p (const_tree, const_tree);
+#ifndef GENERATOR_FILE
+extern void get_type_static_bounds (const_tree, mpz_t, mpz_t);
+#endif
+extern bool variably_modified_type_p (tree, tree);
+extern int tree_log2 (const_tree);
+extern int tree_floor_log2 (const_tree);
+extern int simple_cst_equal (const_tree, const_tree);
+extern hashval_t iterative_hash_expr (const_tree, hashval_t);
+extern hashval_t iterative_hash_exprs_commutative (const_tree,
+ const_tree, hashval_t);
+extern hashval_t iterative_hash_hashval_t (hashval_t, hashval_t);
+extern int compare_tree_int (const_tree, unsigned HOST_WIDE_INT);
+extern int type_list_equal (const_tree, const_tree);
+extern int chain_member (const_tree, const_tree);
+extern tree type_hash_lookup (unsigned int, tree);
+extern void type_hash_add (unsigned int, tree);
+extern int simple_cst_list_equal (const_tree, const_tree);
+extern void dump_tree_statistics (void);
+extern void expand_function_end (void);
+extern void expand_function_start (tree);
+extern void stack_protect_prologue (void);
+extern void stack_protect_epilogue (void);
+extern void recompute_tree_invariant_for_addr_expr (tree);
+extern bool needs_to_live_in_memory (const_tree);
+extern tree reconstruct_complex_type (tree, tree);
+
+extern int real_onep (const_tree);
+extern int real_twop (const_tree);
+extern int real_minus_onep (const_tree);
+extern void init_ttree (void);
+extern void build_common_tree_nodes (bool, bool);
+extern void build_common_tree_nodes_2 (int);
+extern void build_common_builtin_nodes (void);
+extern tree build_nonstandard_integer_type (unsigned HOST_WIDE_INT, int);
+extern tree build_range_type (tree, tree, tree);
+extern HOST_WIDE_INT int_cst_value (const_tree);
+extern tree build_addr (tree, tree);
+
+extern bool fields_compatible_p (const_tree, const_tree);
+extern tree find_compatible_field (tree, tree);
+
+extern void set_expr_locus (tree, source_location *);
+
+extern tree *tree_block (tree);
+extern location_t *block_nonartificial_location (tree);
+extern location_t tree_nonartificial_location (tree);
+
+/* In function.c */
+extern void expand_main_function (void);
+extern void init_dummy_function_start (void);
+extern void expand_dummy_function_end (void);
+extern unsigned int init_function_for_compilation (void);
+extern void allocate_struct_function (tree, bool);
+extern void push_struct_function (tree fndecl);
+extern void init_function_start (tree);
+extern bool use_register_for_decl (const_tree);
+extern void generate_setjmp_warnings (void);
+extern void init_temp_slots (void);
+extern void free_temp_slots (void);
+extern void pop_temp_slots (void);
+extern void push_temp_slots (void);
+extern void preserve_temp_slots (rtx);
+extern int aggregate_value_p (const_tree, const_tree);
+extern void push_function_context (void);
+extern void pop_function_context (void);
+extern gimple_seq gimplify_parameters (void);
+
+/* In print-rtl.c */
+#ifdef BUFSIZ
+extern void print_rtl (FILE *, const_rtx);
+#endif
+
+/* In print-tree.c */
+extern void debug_tree (tree);
+#ifdef BUFSIZ
+extern void dump_addr (FILE*, const char *, const void *);
+extern void print_node (FILE *, const char *, tree, int);
+extern void print_node_brief (FILE *, const char *, const_tree, int);
+extern void indent_to (FILE *, int);
+#endif
+
+/* In tree-inline.c: */
+extern bool debug_find_tree (tree, tree);
+/* This is in tree-inline.c since the routine uses
+ data structures from the inliner. */
+extern tree unsave_expr_now (tree);
+extern tree build_duplicate_type (tree);
+
+/* In calls.c */
+
+/* Nonzero if this is a call to a function whose return value depends
+ solely on its arguments, has no side effects, and does not read
+ global memory. This corresponds to TREE_READONLY for function
+ decls. */
+#define ECF_CONST (1 << 0)
+/* Nonzero if this is a call to "pure" function (like const function,
+ but may read memory. This corresponds to DECL_PURE_P for function
+ decls. */
+#define ECF_PURE (1 << 1)
+/* Nonzero if this is ECF_CONST or ECF_PURE but cannot be proven to no
+ infinite loop. This corresponds to DECL_LOOPING_CONST_OR_PURE_P
+ for function decls.*/
+#define ECF_LOOPING_CONST_OR_PURE (1 << 2)
+/* Nonzero if this call will never return. */
+#define ECF_NORETURN (1 << 3)
+/* Nonzero if this is a call to malloc or a related function. */
+#define ECF_MALLOC (1 << 4)
+/* Nonzero if it is plausible that this is a call to alloca. */
+#define ECF_MAY_BE_ALLOCA (1 << 5)
+/* Nonzero if this is a call to a function that won't throw an exception. */
+#define ECF_NOTHROW (1 << 6)
+/* Nonzero if this is a call to setjmp or a related function. */
+#define ECF_RETURNS_TWICE (1 << 7)
+/* Nonzero if this call replaces the current stack frame. */
+#define ECF_SIBCALL (1 << 8)
+/* Function does not read or write memory (but may have side effects, so
+ it does not necessarily fit ECF_CONST). */
+#define ECF_NOVOPS (1 << 9)
+
+extern int flags_from_decl_or_type (const_tree);
+extern int call_expr_flags (const_tree);
+
+extern int setjmp_call_p (const_tree);
+extern bool gimple_alloca_call_p (const_gimple);
+extern bool alloca_call_p (const_tree);
+extern bool must_pass_in_stack_var_size (enum machine_mode, const_tree);
+extern bool must_pass_in_stack_var_size_or_pad (enum machine_mode, const_tree);
+extern tree block_ultimate_origin (const_tree);
+
+/* In attribs.c. */
+
+extern const struct attribute_spec *lookup_attribute_spec (tree);
+
+/* Process the attributes listed in ATTRIBUTES and install them in *NODE,
+ which is either a DECL (including a TYPE_DECL) or a TYPE. If a DECL,
+ it should be modified in place; if a TYPE, a copy should be created
+ unless ATTR_FLAG_TYPE_IN_PLACE is set in FLAGS. FLAGS gives further
+ information, in the form of a bitwise OR of flags in enum attribute_flags
+ from tree.h. Depending on these flags, some attributes may be
+ returned to be applied at a later stage (for example, to apply
+ a decl attribute to the declaration rather than to its type). */
+extern tree decl_attributes (tree *, tree, int);
+
+/* Return true if the given identifier tree is the name of a lock attribute
+ that takes arguments. */
+extern bool is_lock_attribute_with_args (tree);
+/* Extract and return all lock attributes from the given attribute list. */
+extern tree extract_lock_attributes (tree);
+
+/* In integrate.c */
+extern void set_decl_abstract_flags (tree, int);
+extern void set_decl_origin_self (tree);
+
+/* In stor-layout.c */
+extern void set_min_and_max_values_for_integral_type (tree, int, bool);
+extern void fixup_signed_type (tree);
+extern void internal_reference_types (void);
+extern unsigned int update_alignment_for_field (record_layout_info, tree,
+ unsigned int);
+/* varasm.c */
+extern void make_decl_rtl (tree);
+extern void make_decl_one_only (tree);
+extern int supports_one_only (void);
+extern void resolve_unique_section (tree, int, int);
+extern void mark_referenced (tree);
+extern void mark_decl_referenced (tree);
+extern void notice_global_symbol (tree);
+extern void set_user_assembler_name (tree, const char *);
+extern void process_pending_assemble_externals (void);
+extern void finish_aliases_1 (void);
+extern void finish_aliases_2 (void);
+extern tree emutls_decl (tree);
+
+/* In stmt.c */
+extern void expand_computed_goto (tree);
+extern bool parse_output_constraint (const char **, int, int, int,
+ bool *, bool *, bool *);
+extern bool parse_input_constraint (const char **, int, int, int, int,
+ const char * const *, bool *, bool *);
+extern void expand_asm_expr (tree);
+extern tree resolve_asm_operand_names (tree, tree, tree);
+extern void expand_case (tree);
+extern void expand_decl (tree);
+#ifdef HARD_CONST
+/* Silly ifdef to avoid having all includers depend on hard-reg-set.h. */
+extern tree tree_overlaps_hard_reg_set (tree, HARD_REG_SET *);
+#endif
+
+
+/* Interface of the DWARF2 unwind info support. */
+
+/* Generate a new label for the CFI info to refer to. */
+
+extern char *dwarf2out_cfi_label (bool);
+
+/* Entry point to update the canonical frame address (CFA). */
+
+extern void dwarf2out_def_cfa (const char *, unsigned, HOST_WIDE_INT);
+
+/* Add the CFI for saving a register window. */
+
+extern void dwarf2out_window_save (const char *);
+
+/* Add a CFI to update the running total of the size of arguments pushed
+ onto the stack. */
+
+extern void dwarf2out_args_size (const char *, HOST_WIDE_INT);
+
+/* Entry point for saving a register to the stack. */
+
+extern void dwarf2out_reg_save (const char *, unsigned, HOST_WIDE_INT);
+
+/* Entry point for saving the return address in the stack. */
+
+extern void dwarf2out_return_save (const char *, HOST_WIDE_INT);
+
+/* Entry point for saving the return address in a register. */
+
+extern void dwarf2out_return_reg (const char *, unsigned);
+
+/* Entry point for saving the first register into the second. */
+
+extern void dwarf2out_reg_save_reg (const char *, rtx, rtx);
+
+/* In tree-inline.c */
+
+/* The type of a set of already-visited pointers. Functions for creating
+ and manipulating it are declared in pointer-set.h */
+struct pointer_set_t;
+
+/* The type of a callback function for walking over tree structure. */
+
+typedef tree (*walk_tree_fn) (tree *, int *, void *);
+
+/* The type of a callback function that represents a custom walk_tree. */
+
+typedef tree (*walk_tree_lh) (tree *, int *, tree (*) (tree *, int *, void *),
+ void *, struct pointer_set_t*);
+
+extern tree walk_tree_1 (tree*, walk_tree_fn, void*, struct pointer_set_t*,
+ walk_tree_lh);
+extern tree walk_tree_without_duplicates_1 (tree*, walk_tree_fn, void*,
+ walk_tree_lh);
+#define walk_tree(a,b,c,d) \
+ walk_tree_1 (a, b, c, d, NULL)
+#define walk_tree_without_duplicates(a,b,c) \
+ walk_tree_without_duplicates_1 (a, b, c, NULL)
+
+/* Assign the RTX to declaration. */
+
+extern void set_decl_rtl (tree, rtx);
+extern void set_decl_incoming_rtl (tree, rtx, bool);
+
+/* Enum and arrays used for tree allocation stats.
+ Keep in sync with tree.c:tree_node_kind_names. */
+typedef enum
+{
+ d_kind,
+ t_kind,
+ b_kind,
+ s_kind,
+ r_kind,
+ e_kind,
+ c_kind,
+ id_kind,
+ perm_list_kind,
+ temp_list_kind,
+ vec_kind,
+ binfo_kind,
+ ssa_name_kind,
+ constr_kind,
+ x_kind,
+ lang_decl,
+ lang_type,
+ omp_clause_kind,
+ all_kinds
+} tree_node_kind;
+
+extern int tree_node_counts[];
+extern int tree_node_sizes[];
+
+/* True if we are in gimple form and the actions of the folders need to
+ be restricted. False if we are not in gimple form and folding is not
+ restricted to creating gimple expressions. */
+extern bool in_gimple_form;
+
+/* In tree-gimple.c. */
+extern tree get_base_address (tree t);
+
+/* In tree-vectorizer.c. */
+extern void vect_set_verbosity_level (const char *);
+
+/* In tree.c. */
+
+struct tree_map_base GTY(())
+{
+ tree from;
+};
+
+extern int tree_map_base_eq (const void *, const void *);
+extern unsigned int tree_map_base_hash (const void *);
+extern int tree_map_base_marked_p (const void *);
+
+/* Map from a tree to another tree. */
+
+struct tree_map GTY(())
+{
+ struct tree_map_base base;
+ unsigned int hash;
+ tree to;
+};
+
+#define tree_map_eq tree_map_base_eq
+extern unsigned int tree_map_hash (const void *);
+#define tree_map_marked_p tree_map_base_marked_p
+
+/* Map from a tree to an int. */
+
+struct tree_int_map GTY(())
+{
+ struct tree_map_base base;
+ unsigned int to;
+};
+
+#define tree_int_map_eq tree_map_base_eq
+#define tree_int_map_hash tree_map_base_hash
+#define tree_int_map_marked_p tree_map_base_marked_p
+
+/* Map from a tree to initialization/finalization priorities. */
+
+struct tree_priority_map GTY(())
+{
+ struct tree_map_base base;
+ priority_type init;
+ priority_type fini;
+};
+
+#define tree_priority_map_eq tree_map_base_eq
+#define tree_priority_map_hash tree_map_base_hash
+#define tree_priority_map_marked_p tree_map_base_marked_p
+
+/* In tree-cfg.c. */
+extern location_t min_discriminator_location;
+extern location_t map_discriminator_location (location_t);
+extern int get_discriminator_from_locus (location_t);
+
+/* In tree-ssa-address.c. */
+extern tree tree_mem_ref_addr (tree, tree);
+extern void copy_mem_ref_info (tree, tree);
+
+/* In tree-vrp.c */
+extern bool ssa_name_nonzero_p (const_tree);
+extern bool ssa_name_nonnegative_p (const_tree);
+
+/* In tree-object-size.c. */
+extern void init_object_sizes (void);
+extern void fini_object_sizes (void);
+extern unsigned HOST_WIDE_INT compute_builtin_object_size (tree, int);
+
+/* In expr.c. */
+extern unsigned HOST_WIDE_INT highest_pow2_factor (const_tree);
+
+/* In tree-inline.c. */
+
+void init_inline_once (void);
+
+/* In ipa-reference.c. Used for parsing attributes of asm code. */
+extern GTY(()) tree memory_identifier_string;
+
+/* Compute the number of operands in an expression node NODE. For
+ tcc_vl_exp nodes like CALL_EXPRs, this is stored in the node itself,
+ otherwise it is looked up from the node's code. */
+static inline int
+tree_operand_length (const_tree node)
+{
+ if (VL_EXP_CLASS_P (node))
+ return VL_EXP_OPERAND_LENGTH (node);
+ else
+ return TREE_CODE_LENGTH (TREE_CODE (node));
+}
+
+/* Abstract iterators for CALL_EXPRs. These static inline definitions
+ have to go towards the end of tree.h so that union tree_node is fully
+ defined by this point. */
+
+/* Structure containing iterator state. */
+typedef struct call_expr_arg_iterator_d GTY (())
+{
+ tree t; /* the call_expr */
+ int n; /* argument count */
+ int i; /* next argument index */
+} call_expr_arg_iterator;
+
+typedef struct const_call_expr_arg_iterator_d GTY (())
+{
+ const_tree t; /* the call_expr */
+ int n; /* argument count */
+ int i; /* next argument index */
+} const_call_expr_arg_iterator;
+
+/* Initialize the abstract argument list iterator object ITER with the
+ arguments from CALL_EXPR node EXP. */
+static inline void
+init_call_expr_arg_iterator (tree exp, call_expr_arg_iterator *iter)
+{
+ iter->t = exp;
+ iter->n = call_expr_nargs (exp);
+ iter->i = 0;
+}
+
+static inline void
+init_const_call_expr_arg_iterator (const_tree exp, const_call_expr_arg_iterator *iter)
+{
+ iter->t = exp;
+ iter->n = call_expr_nargs (exp);
+ iter->i = 0;
+}
+
+/* Return the next argument from abstract argument list iterator object ITER,
+ and advance its state. Return NULL_TREE if there are no more arguments. */
+static inline tree
+next_call_expr_arg (call_expr_arg_iterator *iter)
+{
+ tree result;
+ if (iter->i >= iter->n)
+ return NULL_TREE;
+ result = CALL_EXPR_ARG (iter->t, iter->i);
+ iter->i++;
+ return result;
+}
+
+static inline const_tree
+next_const_call_expr_arg (const_call_expr_arg_iterator *iter)
+{
+ const_tree result;
+ if (iter->i >= iter->n)
+ return NULL_TREE;
+ result = CALL_EXPR_ARG (iter->t, iter->i);
+ iter->i++;
+ return result;
+}
+
+/* Initialize the abstract argument list iterator object ITER, then advance
+ past and return the first argument. Useful in for expressions, e.g.
+ for (arg = first_call_expr_arg (exp, &iter); arg;
+ arg = next_call_expr_arg (&iter)) */
+static inline tree
+first_call_expr_arg (tree exp, call_expr_arg_iterator *iter)
+{
+ init_call_expr_arg_iterator (exp, iter);
+ return next_call_expr_arg (iter);
+}
+
+static inline const_tree
+first_const_call_expr_arg (const_tree exp, const_call_expr_arg_iterator *iter)
+{
+ init_const_call_expr_arg_iterator (exp, iter);
+ return next_const_call_expr_arg (iter);
+}
+
+/* Test whether there are more arguments in abstract argument list iterator
+ ITER, without changing its state. */
+static inline bool
+more_call_expr_args_p (const call_expr_arg_iterator *iter)
+{
+ return (iter->i < iter->n);
+}
+
+static inline bool
+more_const_call_expr_args_p (const const_call_expr_arg_iterator *iter)
+{
+ return (iter->i < iter->n);
+}
+
+/* Iterate through each argument ARG of CALL_EXPR CALL, using variable ITER
+ (of type call_expr_arg_iterator) to hold the iteration state. */
+#define FOR_EACH_CALL_EXPR_ARG(arg, iter, call) \
+ for ((arg) = first_call_expr_arg ((call), &(iter)); (arg); \
+ (arg) = next_call_expr_arg (&(iter)))
+
+#define FOR_EACH_CONST_CALL_EXPR_ARG(arg, iter, call) \
+ for ((arg) = first_const_call_expr_arg ((call), &(iter)); (arg); \
+ (arg) = next_const_call_expr_arg (&(iter)))
+
+#endif /* GCC_TREE_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/treestruct.def b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/treestruct.def
new file mode 100644
index 0000000..dc3e287
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/treestruct.def
@@ -0,0 +1,68 @@
+/* This file contains the definitions for the tree structure
+ enumeration used in GCC.
+
+Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+/* The format of this file is
+ DEFTREESTRUCT(enumeration value, printable name).
+ Each enumeration value should correspond with a single member of union
+ tree_node.
+ These enumerator values are used in order to distinguish members of union
+ tree_node for garbage collection purposes, as well as specifying what structures
+ contain what other structures in the tree_contains_struct array. */
+
+DEFTREESTRUCT(TS_BASE, "base")
+DEFTREESTRUCT(TS_COMMON, "common")
+DEFTREESTRUCT(TS_INT_CST, "integer cst")
+DEFTREESTRUCT(TS_REAL_CST, "real cst")
+DEFTREESTRUCT(TS_FIXED_CST, "fixed cst")
+DEFTREESTRUCT(TS_VECTOR, "vector")
+DEFTREESTRUCT(TS_STRING, "string")
+DEFTREESTRUCT(TS_COMPLEX, "complex")
+DEFTREESTRUCT(TS_IDENTIFIER, "identifier")
+DEFTREESTRUCT(TS_DECL_MINIMAL, "decl minimal")
+DEFTREESTRUCT(TS_DECL_COMMON, "decl common")
+DEFTREESTRUCT(TS_DECL_WRTL, "decl with RTL")
+DEFTREESTRUCT(TS_DECL_NON_COMMON, "decl non-common")
+DEFTREESTRUCT(TS_DECL_WITH_VIS, "decl with visibility")
+DEFTREESTRUCT(TS_FIELD_DECL, "field decl")
+DEFTREESTRUCT(TS_VAR_DECL, "var decl")
+DEFTREESTRUCT(TS_PARM_DECL, "parm decl")
+DEFTREESTRUCT(TS_LABEL_DECL, "label decl")
+DEFTREESTRUCT(TS_RESULT_DECL, "result decl")
+DEFTREESTRUCT(TS_CONST_DECL, "const decl")
+DEFTREESTRUCT(TS_TYPE_DECL, "label decl")
+DEFTREESTRUCT(TS_FUNCTION_DECL, "function decl")
+DEFTREESTRUCT(TS_TYPE, "type")
+DEFTREESTRUCT(TS_LIST, "list")
+DEFTREESTRUCT(TS_VEC, "vec")
+DEFTREESTRUCT(TS_EXP, "exp")
+DEFTREESTRUCT(TS_SSA_NAME, "ssa name")
+DEFTREESTRUCT(TS_PHI_NODE, "phi node")
+DEFTREESTRUCT(TS_BLOCK, "block")
+DEFTREESTRUCT(TS_BINFO, "binfo")
+DEFTREESTRUCT(TS_STATEMENT_LIST, "statement list")
+DEFTREESTRUCT(TS_GIMPLE_STATEMENT, "gimple statement")
+DEFTREESTRUCT(TS_CONSTRUCTOR, "constructor")
+DEFTREESTRUCT(TS_MEMORY_TAG, "memory tag")
+DEFTREESTRUCT(TS_OMP_CLAUSE, "omp clause")
+DEFTREESTRUCT(TS_MEMORY_PARTITION_TAG, "memory partition tag")
+DEFTREESTRUCT(TS_OPTIMIZATION, "optimization options")
+DEFTREESTRUCT(TS_TARGET_OPTION, "target options")
+
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/varray.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/varray.h
new file mode 100644
index 0000000..0081447
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/varray.h
@@ -0,0 +1,323 @@
+/* Virtual array support.
+ Copyright (C) 1998, 1999, 2000, 2002, 2003, 2004, 2007
+ Free Software Foundation, Inc.
+ Contributed by Cygnus Solutions.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_VARRAY_H
+#define GCC_VARRAY_H
+
+#ifndef HOST_WIDE_INT
+#include "machmode.h"
+#endif
+
+#ifndef GCC_SYSTEM_H
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#endif
+
+/* Enum indicating what the varray contains.
+ If this is changed, `element' in varray.c needs to be updated. */
+
+enum varray_data_enum {
+ VARRAY_DATA_C,
+ VARRAY_DATA_UC,
+ VARRAY_DATA_S,
+ VARRAY_DATA_US,
+ VARRAY_DATA_I,
+ VARRAY_DATA_U,
+ VARRAY_DATA_L,
+ VARRAY_DATA_UL,
+ VARRAY_DATA_HINT,
+ VARRAY_DATA_UHINT,
+ VARRAY_DATA_GENERIC,
+ VARRAY_DATA_GENERIC_NOGC,
+ VARRAY_DATA_CPTR,
+ VARRAY_DATA_RTX,
+ VARRAY_DATA_RTVEC,
+ VARRAY_DATA_TREE,
+ VARRAY_DATA_BITMAP,
+ VARRAY_DATA_REG,
+ VARRAY_DATA_BB,
+ VARRAY_DATA_TE,
+ VARRAY_DATA_EDGE,
+ VARRAY_DATA_TREE_PTR,
+ NUM_VARRAY_DATA
+};
+
+/* Union of various array types that are used. */
+typedef union varray_data_tag GTY (()) {
+ char GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_C"))) vdt_c[1];
+ unsigned char GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_UC"))) vdt_uc[1];
+ short GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_S"))) vdt_s[1];
+ unsigned short GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_US"))) vdt_us[1];
+ int GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_I"))) vdt_i[1];
+ unsigned int GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_U"))) vdt_u[1];
+ long GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_L"))) vdt_l[1];
+ unsigned long GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_UL"))) vdt_ul[1];
+ HOST_WIDE_INT GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_HINT"))) vdt_hint[1];
+ unsigned HOST_WIDE_INT GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_UHINT"))) vdt_uhint[1];
+ PTR GTY ((length ("%0.num_elements"), use_param,
+ tag ("VARRAY_DATA_GENERIC"))) vdt_generic[1];
+ PTR GTY ((length ("%0.num_elements"), skip (""),
+ tag ("VARRAY_DATA_GENERIC_NOGC"))) vdt_generic_nogc[1];
+ char *GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_CPTR"))) vdt_cptr[1];
+ rtx GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_RTX"))) vdt_rtx[1];
+ rtvec GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_RTVEC"))) vdt_rtvec[1];
+ tree GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_TREE"))) vdt_tree[1];
+ struct bitmap_head_def *GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_BITMAP"))) vdt_bitmap[1];
+ struct reg_info_def *GTY ((length ("%0.num_elements"), skip,
+ tag ("VARRAY_DATA_REG"))) vdt_reg[1];
+ struct basic_block_def *GTY ((length ("%0.num_elements"), skip,
+ tag ("VARRAY_DATA_BB"))) vdt_bb[1];
+ struct elt_list *GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_TE"))) vdt_te[1];
+ struct edge_def *GTY ((length ("%0.num_elements"),
+ tag ("VARRAY_DATA_EDGE"))) vdt_e[1];
+ tree *GTY ((length ("%0.num_elements"), skip (""),
+ tag ("VARRAY_DATA_TREE_PTR"))) vdt_tp[1];
+} varray_data;
+
+/* Virtual array of pointers header. */
+struct varray_head_tag GTY(()) {
+ size_t num_elements; /* Maximum element number allocated. */
+ size_t elements_used; /* The number of elements used, if
+ using VARRAY_PUSH/VARRAY_POP. */
+ enum varray_data_enum type; /* The kind of elements in the varray. */
+ const char *name; /* name of the varray for reporting errors */
+ varray_data GTY ((desc ("%0.type"))) data; /* The data elements follow,
+ must be last. */
+};
+typedef struct varray_head_tag *varray_type;
+
+/* Allocate a virtual array with NUM elements, each of which is SIZE bytes
+ long, named NAME. Array elements are zeroed. */
+extern varray_type varray_init (size_t, enum varray_data_enum, const char *);
+
+#define VARRAY_CHAR_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_C, name)
+
+#define VARRAY_UCHAR_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_UC, name)
+
+#define VARRAY_SHORT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_S, name)
+
+#define VARRAY_USHORT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_US, name)
+
+#define VARRAY_INT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_I, name)
+
+#define VARRAY_UINT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_U, name)
+
+#define VARRAY_LONG_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_L, name)
+
+#define VARRAY_ULONG_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_UL, name)
+
+#define VARRAY_WIDE_INT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_HINT, name)
+
+#define VARRAY_UWIDE_INT_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_UHINT, name)
+
+#define VARRAY_GENERIC_PTR_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_GENERIC, name)
+
+#define VARRAY_GENERIC_PTR_NOGC_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_GENERIC_NOGC, name)
+
+#define VARRAY_CHAR_PTR_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_CPTR, name)
+
+#define VARRAY_RTX_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_RTX, name)
+
+#define VARRAY_RTVEC_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_RTVEC, name)
+
+#define VARRAY_TREE_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_TREE, name)
+
+#define VARRAY_BITMAP_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_BITMAP, name)
+
+#define VARRAY_REG_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_REG, name)
+
+#define VARRAY_BB_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_BB, name)
+
+#define VARRAY_ELT_LIST_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_TE, name)
+
+#define VARRAY_EDGE_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_EDGE, name)
+
+#define VARRAY_TREE_PTR_INIT(va, num, name) \
+ va = varray_init (num, VARRAY_DATA_TREE_PTR, name)
+
+/* Free up memory allocated by the virtual array, but do not free any of the
+ elements involved. */
+#define VARRAY_FREE(vp) \
+ do { if (vp) { free (vp); vp = (varray_type) 0; } } while (0)
+
+/* Grow/shrink the virtual array VA to N elements. */
+extern varray_type varray_grow (varray_type, size_t);
+
+#define VARRAY_GROW(VA, N) ((VA) = varray_grow (VA, N))
+
+#define VARRAY_SIZE(VA) ((VA)->num_elements)
+
+#define VARRAY_ACTIVE_SIZE(VA) ((VA)->elements_used)
+#define VARRAY_POP_ALL(VA) ((VA)->elements_used = 0)
+
+#define VARRAY_CLEAR(VA) varray_clear(VA)
+
+extern void varray_clear (varray_type);
+extern void dump_varray_statistics (void);
+
+/* Check for VARRAY_xxx macros being in bound. */
+#if defined ENABLE_CHECKING && (GCC_VERSION >= 2007)
+extern void varray_check_failed (varray_type, size_t, const char *, int,
+ const char *) ATTRIBUTE_NORETURN;
+extern void varray_underflow (varray_type, const char *, int, const char *)
+ ATTRIBUTE_NORETURN;
+#define VARRAY_CHECK(VA, N, T) __extension__ \
+(*({ varray_type const _va = (VA); \
+ const size_t _n = (N); \
+ if (_n >= _va->num_elements) \
+ varray_check_failed (_va, _n, __FILE__, __LINE__, __FUNCTION__); \
+ &_va->data.T[_n]; }))
+
+#define VARRAY_POP(VA) do { \
+ varray_type const _va = (VA); \
+ if (_va->elements_used == 0) \
+ varray_underflow (_va, __FILE__, __LINE__, __FUNCTION__); \
+ else \
+ _va->elements_used--; \
+} while (0)
+
+#else
+#define VARRAY_CHECK(VA, N, T) ((VA)->data.T[N])
+/* Pop the top element of VA. */
+#define VARRAY_POP(VA) do { ((VA)->elements_used--); } while (0)
+#endif
+
+/* Push X onto VA. T is the name of the field in varray_data
+ corresponding to the type of X. */
+#define VARRAY_PUSH(VA, T, X) \
+ do \
+ { \
+ if ((VA)->elements_used >= (VA)->num_elements) \
+ VARRAY_GROW ((VA), 2 * (VA)->num_elements); \
+ (VA)->data.T[(VA)->elements_used++] = (X); \
+ } \
+ while (0)
+
+#define VARRAY_CHAR(VA, N) VARRAY_CHECK (VA, N, vdt_c)
+#define VARRAY_UCHAR(VA, N) VARRAY_CHECK (VA, N, vdt_uc)
+#define VARRAY_SHORT(VA, N) VARRAY_CHECK (VA, N, vdt_s)
+#define VARRAY_USHORT(VA, N) VARRAY_CHECK (VA, N, vdt_us)
+#define VARRAY_INT(VA, N) VARRAY_CHECK (VA, N, vdt_i)
+#define VARRAY_UINT(VA, N) VARRAY_CHECK (VA, N, vdt_u)
+#define VARRAY_LONG(VA, N) VARRAY_CHECK (VA, N, vdt_l)
+#define VARRAY_ULONG(VA, N) VARRAY_CHECK (VA, N, vdt_ul)
+#define VARRAY_WIDE_INT(VA, N) VARRAY_CHECK (VA, N, vdt_hint)
+#define VARRAY_UWIDE_INT(VA, N) VARRAY_CHECK (VA, N, vdt_uhint)
+#define VARRAY_GENERIC_PTR(VA,N) VARRAY_CHECK (VA, N, vdt_generic)
+#define VARRAY_GENERIC_PTR_NOGC(VA,N) VARRAY_CHECK (VA, N, vdt_generic_nogc)
+#define VARRAY_CHAR_PTR(VA,N) VARRAY_CHECK (VA, N, vdt_cptr)
+#define VARRAY_RTX(VA, N) VARRAY_CHECK (VA, N, vdt_rtx)
+#define VARRAY_RTVEC(VA, N) VARRAY_CHECK (VA, N, vdt_rtvec)
+#define VARRAY_TREE(VA, N) VARRAY_CHECK (VA, N, vdt_tree)
+#define VARRAY_BITMAP(VA, N) VARRAY_CHECK (VA, N, vdt_bitmap)
+#define VARRAY_REG(VA, N) VARRAY_CHECK (VA, N, vdt_reg)
+#define VARRAY_BB(VA, N) VARRAY_CHECK (VA, N, vdt_bb)
+#define VARRAY_ELT_LIST(VA, N) VARRAY_CHECK (VA, N, vdt_te)
+#define VARRAY_EDGE(VA, N) VARRAY_CHECK (VA, N, vdt_e)
+#define VARRAY_TREE_PTR(VA, N) VARRAY_CHECK (VA, N, vdt_tp)
+
+/* Push a new element on the end of VA, extending it if necessary. */
+#define VARRAY_PUSH_CHAR(VA, X) VARRAY_PUSH (VA, vdt_c, X)
+#define VARRAY_PUSH_UCHAR(VA, X) VARRAY_PUSH (VA, vdt_uc, X)
+#define VARRAY_PUSH_SHORT(VA, X) VARRAY_PUSH (VA, vdt_s, X)
+#define VARRAY_PUSH_USHORT(VA, X) VARRAY_PUSH (VA, vdt_us, X)
+#define VARRAY_PUSH_INT(VA, X) VARRAY_PUSH (VA, vdt_i, X)
+#define VARRAY_PUSH_UINT(VA, X) VARRAY_PUSH (VA, vdt_u, X)
+#define VARRAY_PUSH_LONG(VA, X) VARRAY_PUSH (VA, vdt_l, X)
+#define VARRAY_PUSH_ULONG(VA, X) VARRAY_PUSH (VA, vdt_ul, X)
+#define VARRAY_PUSH_WIDE_INT(VA, X) VARRAY_PUSH (VA, vdt_hint, X)
+#define VARRAY_PUSH_UWIDE_INT(VA, X) VARRAY_PUSH (VA, vdt_uhint, X)
+#define VARRAY_PUSH_GENERIC_PTR(VA, X) VARRAY_PUSH (VA, vdt_generic, X)
+#define VARRAY_PUSH_GENERIC_PTR_NOGC(VA, X) VARRAY_PUSH (VA, vdt_generic_nogc, X)
+#define VARRAY_PUSH_CHAR_PTR(VA, X) VARRAY_PUSH (VA, vdt_cptr, X)
+#define VARRAY_PUSH_RTX(VA, X) VARRAY_PUSH (VA, vdt_rtx, X)
+#define VARRAY_PUSH_RTVEC(VA, X) VARRAY_PUSH (VA, vdt_rtvec, X)
+#define VARRAY_PUSH_TREE(VA, X) VARRAY_PUSH (VA, vdt_tree, X)
+#define VARRAY_PUSH_BITMAP(VA, X) VARRAY_PUSH (VA, vdt_bitmap, X)
+#define VARRAY_PUSH_REG(VA, X) VARRAY_PUSH (VA, vdt_reg, X)
+#define VARRAY_PUSH_BB(VA, X) VARRAY_PUSH (VA, vdt_bb, X)
+#define VARRAY_PUSH_EDGE(VA, X) VARRAY_PUSH (VA, vdt_e, X)
+#define VARRAY_PUSH_TREE_PTR(VA, X) VARRAY_PUSH (VA, vdt_tp, X)
+
+/* Return the last element of VA. */
+#define VARRAY_TOP(VA, T) VARRAY_CHECK(VA, (VA)->elements_used - 1, T)
+
+#define VARRAY_TOP_CHAR(VA) VARRAY_TOP (VA, vdt_c)
+#define VARRAY_TOP_UCHAR(VA) VARRAY_TOP (VA, vdt_uc)
+#define VARRAY_TOP_SHORT(VA) VARRAY_TOP (VA, vdt_s)
+#define VARRAY_TOP_USHORT(VA) VARRAY_TOP (VA, vdt_us)
+#define VARRAY_TOP_INT(VA) VARRAY_TOP (VA, vdt_i)
+#define VARRAY_TOP_UINT(VA) VARRAY_TOP (VA, vdt_u)
+#define VARRAY_TOP_LONG(VA) VARRAY_TOP (VA, vdt_l)
+#define VARRAY_TOP_ULONG(VA) VARRAY_TOP (VA, vdt_ul)
+#define VARRAY_TOP_WIDE_INT(VA) VARRAY_TOP (VA, vdt_hint)
+#define VARRAY_TOP_UWIDE_INT(VA) VARRAY_TOP (VA, vdt_uhint)
+#define VARRAY_TOP_GENERIC_PTR(VA) VARRAY_TOP (VA, vdt_generic)
+#define VARRAY_TOP_GENERIC_PTR_NOGC(VA) VARRAY_TOP (VA, vdt_generic_nogc)
+#define VARRAY_TOP_CHAR_PTR(VA) VARRAY_TOP (VA, vdt_cptr)
+#define VARRAY_TOP_RTX(VA) VARRAY_TOP (VA, vdt_rtx)
+#define VARRAY_TOP_RTVEC(VA) VARRAY_TOP (VA, vdt_rtvec)
+#define VARRAY_TOP_TREE(VA) VARRAY_TOP (VA, vdt_tree)
+#define VARRAY_TOP_BITMAP(VA) VARRAY_TOP (VA, vdt_bitmap)
+#define VARRAY_TOP_REG(VA) VARRAY_TOP (VA, vdt_reg)
+#define VARRAY_TOP_BB(VA) VARRAY_TOP (VA, vdt_bb)
+#define VARRAY_TOP_EDGE(VA) VARRAY_TOP (VA, vdt_e)
+#define VARRAY_TOP_TREE_PTR(VA) VARRAY_TOP (VA, vdt_tp)
+
+#endif /* ! GCC_VARRAY_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vec.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vec.h
new file mode 100644
index 0000000..adbd16a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vec.h
@@ -0,0 +1,1198 @@
+/* Vector API for GNU compiler.
+ Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+ Contributed by Nathan Sidwell <nathan@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_VEC_H
+#define GCC_VEC_H
+
+/* The macros here implement a set of templated vector types and
+ associated interfaces. These templates are implemented with
+ macros, as we're not in C++ land. The interface functions are
+ typesafe and use static inline functions, sometimes backed by
+ out-of-line generic functions. The vectors are designed to
+ interoperate with the GTY machinery.
+
+ Because of the different behavior of structure objects, scalar
+ objects and of pointers, there are three flavors, one for each of
+ these variants. Both the structure object and pointer variants
+ pass pointers to objects around -- in the former case the pointers
+ are stored into the vector and in the latter case the pointers are
+ dereferenced and the objects copied into the vector. The scalar
+ object variant is suitable for int-like objects, and the vector
+ elements are returned by value.
+
+ There are both 'index' and 'iterate' accessors. The iterator
+ returns a boolean iteration condition and updates the iteration
+ variable passed by reference. Because the iterator will be
+ inlined, the address-of can be optimized away.
+
+ The vectors are implemented using the trailing array idiom, thus
+ they are not resizeable without changing the address of the vector
+ object itself. This means you cannot have variables or fields of
+ vector type -- always use a pointer to a vector. The one exception
+ is the final field of a structure, which could be a vector type.
+ You will have to use the embedded_size & embedded_init calls to
+ create such objects, and they will probably not be resizeable (so
+ don't use the 'safe' allocation variants). The trailing array
+ idiom is used (rather than a pointer to an array of data), because,
+ if we allow NULL to also represent an empty vector, empty vectors
+ occupy minimal space in the structure containing them.
+
+ Each operation that increases the number of active elements is
+ available in 'quick' and 'safe' variants. The former presumes that
+ there is sufficient allocated space for the operation to succeed
+ (it dies if there is not). The latter will reallocate the
+ vector, if needed. Reallocation causes an exponential increase in
+ vector size. If you know you will be adding N elements, it would
+ be more efficient to use the reserve operation before adding the
+ elements with the 'quick' operation. This will ensure there are at
+ least as many elements as you ask for, it will exponentially
+ increase if there are too few spare slots. If you want reserve a
+ specific number of slots, but do not want the exponential increase
+ (for instance, you know this is the last allocation), use the
+ reserve_exact operation. You can also create a vector of a
+ specific size from the get go.
+
+ You should prefer the push and pop operations, as they append and
+ remove from the end of the vector. If you need to remove several
+ items in one go, use the truncate operation. The insert and remove
+ operations allow you to change elements in the middle of the
+ vector. There are two remove operations, one which preserves the
+ element ordering 'ordered_remove', and one which does not
+ 'unordered_remove'. The latter function copies the end element
+ into the removed slot, rather than invoke a memmove operation. The
+ 'lower_bound' function will determine where to place an item in the
+ array using insert that will maintain sorted order.
+
+ When a vector type is defined, first a non-memory managed version
+ is created. You can then define either or both garbage collected
+ and heap allocated versions. The allocation mechanism is specified
+ when the type is defined, and is therefore part of the type. If
+ you need both gc'd and heap allocated versions, you still must have
+ *exactly* one definition of the common non-memory managed base vector.
+
+ If you need to directly manipulate a vector, then the 'address'
+ accessor will return the address of the start of the vector. Also
+ the 'space' predicate will tell you whether there is spare capacity
+ in the vector. You will not normally need to use these two functions.
+
+ Vector types are defined using a DEF_VEC_{O,P,I}(TYPEDEF) macro, to
+ get the non-memory allocation version, and then a
+ DEF_VEC_ALLOC_{O,P,I}(TYPEDEF,ALLOC) macro to get memory managed
+ vectors. Variables of vector type are declared using a
+ VEC(TYPEDEF,ALLOC) macro. The ALLOC argument specifies the
+ allocation strategy, and can be either 'gc' or 'heap' for garbage
+ collected and heap allocated respectively. It can be 'none' to get
+ a vector that must be explicitly allocated (for instance as a
+ trailing array of another structure). The characters O, P and I
+ indicate whether TYPEDEF is a pointer (P), object (O) or integral
+ (I) type. Be careful to pick the correct one, as you'll get an
+ awkward and inefficient API if you use the wrong one. There is a
+ check, which results in a compile-time warning, for the P and I
+ versions, but there is no check for the O versions, as that is not
+ possible in plain C. Due to the way GTY works, you must annotate
+ any structures you wish to insert or reference from a vector with a
+ GTY(()) tag. You need to do this even if you never declare the GC
+ allocated variants.
+
+ An example of their use would be,
+
+ DEF_VEC_P(tree); // non-managed tree vector.
+ DEF_VEC_ALLOC_P(tree,gc); // gc'd vector of tree pointers. This must
+ // appear at file scope.
+
+ struct my_struct {
+ VEC(tree,gc) *v; // A (pointer to) a vector of tree pointers.
+ };
+
+ struct my_struct *s;
+
+ if (VEC_length(tree,s->v)) { we have some contents }
+ VEC_safe_push(tree,gc,s->v,decl); // append some decl onto the end
+ for (ix = 0; VEC_iterate(tree,s->v,ix,elt); ix++)
+ { do something with elt }
+
+*/
+
+/* Macros to invoke API calls. A single macro works for both pointer
+ and object vectors, but the argument and return types might well be
+ different. In each macro, T is the typedef of the vector elements,
+ and A is the allocation strategy. The allocation strategy is only
+ present when it is required. Some of these macros pass the vector,
+ V, by reference (by taking its address), this is noted in the
+ descriptions. */
+
+/* Length of vector
+ unsigned VEC_T_length(const VEC(T) *v);
+
+ Return the number of active elements in V. V can be NULL, in which
+ case zero is returned. */
+
+#define VEC_length(T,V) (VEC_OP(T,base,length)(VEC_BASE(V)))
+
+
+/* Check if vector is empty
+ int VEC_T_empty(const VEC(T) *v);
+
+ Return nonzero if V is an empty vector (or V is NULL), zero otherwise. */
+
+#define VEC_empty(T,V) (VEC_length (T,V) == 0)
+
+
+/* Get the final element of the vector.
+ T VEC_T_last(VEC(T) *v); // Integer
+ T VEC_T_last(VEC(T) *v); // Pointer
+ T *VEC_T_last(VEC(T) *v); // Object
+
+ Return the final element. V must not be empty. */
+
+#define VEC_last(T,V) (VEC_OP(T,base,last)(VEC_BASE(V) VEC_CHECK_INFO))
+
+/* Index into vector
+ T VEC_T_index(VEC(T) *v, unsigned ix); // Integer
+ T VEC_T_index(VEC(T) *v, unsigned ix); // Pointer
+ T *VEC_T_index(VEC(T) *v, unsigned ix); // Object
+
+ Return the IX'th element. If IX must be in the domain of V. */
+
+#define VEC_index(T,V,I) (VEC_OP(T,base,index)(VEC_BASE(V),I VEC_CHECK_INFO))
+
+/* Iterate over vector
+ int VEC_T_iterate(VEC(T) *v, unsigned ix, T &ptr); // Integer
+ int VEC_T_iterate(VEC(T) *v, unsigned ix, T &ptr); // Pointer
+ int VEC_T_iterate(VEC(T) *v, unsigned ix, T *&ptr); // Object
+
+ Return iteration condition and update PTR to point to the IX'th
+ element. At the end of iteration, sets PTR to NULL. Use this to
+ iterate over the elements of a vector as follows,
+
+ for (ix = 0; VEC_iterate(T,v,ix,ptr); ix++)
+ continue; */
+
+#define VEC_iterate(T,V,I,P) (VEC_OP(T,base,iterate)(VEC_BASE(V),I,&(P)))
+
+/* Allocate new vector.
+ VEC(T,A) *VEC_T_A_alloc(int reserve);
+
+ Allocate a new vector with space for RESERVE objects. If RESERVE
+ is zero, NO vector is created. */
+
+#define VEC_alloc(T,A,N) (VEC_OP(T,A,alloc)(N MEM_STAT_INFO))
+
+/* Free a vector.
+ void VEC_T_A_free(VEC(T,A) *&);
+
+ Free a vector and set it to NULL. */
+
+#define VEC_free(T,A,V) (VEC_OP(T,A,free)(&V))
+
+/* Use these to determine the required size and initialization of a
+ vector embedded within another structure (as the final member).
+
+ size_t VEC_T_embedded_size(int reserve);
+ void VEC_T_embedded_init(VEC(T) *v, int reserve);
+
+ These allow the caller to perform the memory allocation. */
+
+#define VEC_embedded_size(T,N) (VEC_OP(T,base,embedded_size)(N))
+#define VEC_embedded_init(T,O,N) (VEC_OP(T,base,embedded_init)(VEC_BASE(O),N))
+
+/* Copy a vector.
+ VEC(T,A) *VEC_T_A_copy(VEC(T) *);
+
+ Copy the live elements of a vector into a new vector. The new and
+ old vectors need not be allocated by the same mechanism. */
+
+#define VEC_copy(T,A,V) (VEC_OP(T,A,copy)(VEC_BASE(V) MEM_STAT_INFO))
+
+/* Determine if a vector has additional capacity.
+
+ int VEC_T_space (VEC(T) *v,int reserve)
+
+ If V has space for RESERVE additional entries, return nonzero. You
+ usually only need to use this if you are doing your own vector
+ reallocation, for instance on an embedded vector. This returns
+ nonzero in exactly the same circumstances that VEC_T_reserve
+ will. */
+
+#define VEC_space(T,V,R) \
+ (VEC_OP(T,base,space)(VEC_BASE(V),R VEC_CHECK_INFO))
+
+/* Reserve space.
+ int VEC_T_A_reserve(VEC(T,A) *&v, int reserve);
+
+ Ensure that V has at least RESERVE slots available. This will
+ create additional headroom. Note this can cause V to be
+ reallocated. Returns nonzero iff reallocation actually
+ occurred. */
+
+#define VEC_reserve(T,A,V,R) \
+ (VEC_OP(T,A,reserve)(&(V),R VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Reserve space exactly.
+ int VEC_T_A_reserve_exact(VEC(T,A) *&v, int reserve);
+
+ Ensure that V has at least RESERVE slots available. This will not
+ create additional headroom. Note this can cause V to be
+ reallocated. Returns nonzero iff reallocation actually
+ occurred. */
+
+#define VEC_reserve_exact(T,A,V,R) \
+ (VEC_OP(T,A,reserve_exact)(&(V),R VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Push object with no reallocation
+ T *VEC_T_quick_push (VEC(T) *v, T obj); // Integer
+ T *VEC_T_quick_push (VEC(T) *v, T obj); // Pointer
+ T *VEC_T_quick_push (VEC(T) *v, T *obj); // Object
+
+ Push a new element onto the end, returns a pointer to the slot
+ filled in. For object vectors, the new value can be NULL, in which
+ case NO initialization is performed. There must
+ be sufficient space in the vector. */
+
+#define VEC_quick_push(T,V,O) \
+ (VEC_OP(T,base,quick_push)(VEC_BASE(V),O VEC_CHECK_INFO))
+
+/* Push object with reallocation
+ T *VEC_T_A_safe_push (VEC(T,A) *&v, T obj); // Integer
+ T *VEC_T_A_safe_push (VEC(T,A) *&v, T obj); // Pointer
+ T *VEC_T_A_safe_push (VEC(T,A) *&v, T *obj); // Object
+
+ Push a new element onto the end, returns a pointer to the slot
+ filled in. For object vectors, the new value can be NULL, in which
+ case NO initialization is performed. Reallocates V, if needed. */
+
+#define VEC_safe_push(T,A,V,O) \
+ (VEC_OP(T,A,safe_push)(&(V),O VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Pop element off end
+ T VEC_T_pop (VEC(T) *v); // Integer
+ T VEC_T_pop (VEC(T) *v); // Pointer
+ void VEC_T_pop (VEC(T) *v); // Object
+
+ Pop the last element off the end. Returns the element popped, for
+ pointer vectors. */
+
+#define VEC_pop(T,V) (VEC_OP(T,base,pop)(VEC_BASE(V) VEC_CHECK_INFO))
+
+/* Truncate to specific length
+ void VEC_T_truncate (VEC(T) *v, unsigned len);
+
+ Set the length as specified. The new length must be less than or
+ equal to the current length. This is an O(1) operation. */
+
+#define VEC_truncate(T,V,I) \
+ (VEC_OP(T,base,truncate)(VEC_BASE(V),I VEC_CHECK_INFO))
+
+/* Grow to a specific length.
+ void VEC_T_A_safe_grow (VEC(T,A) *&v, int len);
+
+ Grow the vector to a specific length. The LEN must be as
+ long or longer than the current length. The new elements are
+ uninitialized. */
+
+#define VEC_safe_grow(T,A,V,I) \
+ (VEC_OP(T,A,safe_grow)(&(V),I VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Grow to a specific length.
+ void VEC_T_A_safe_grow_cleared (VEC(T,A) *&v, int len);
+
+ Grow the vector to a specific length. The LEN must be as
+ long or longer than the current length. The new elements are
+ initialized to zero. */
+
+#define VEC_safe_grow_cleared(T,A,V,I) \
+ (VEC_OP(T,A,safe_grow_cleared)(&(V),I VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Replace element
+ T VEC_T_replace (VEC(T) *v, unsigned ix, T val); // Integer
+ T VEC_T_replace (VEC(T) *v, unsigned ix, T val); // Pointer
+ T *VEC_T_replace (VEC(T) *v, unsigned ix, T *val); // Object
+
+ Replace the IXth element of V with a new value, VAL. For pointer
+ vectors returns the original value. For object vectors returns a
+ pointer to the new value. For object vectors the new value can be
+ NULL, in which case no overwriting of the slot is actually
+ performed. */
+
+#define VEC_replace(T,V,I,O) \
+ (VEC_OP(T,base,replace)(VEC_BASE(V),I,O VEC_CHECK_INFO))
+
+/* Insert object with no reallocation
+ T *VEC_T_quick_insert (VEC(T) *v, unsigned ix, T val); // Integer
+ T *VEC_T_quick_insert (VEC(T) *v, unsigned ix, T val); // Pointer
+ T *VEC_T_quick_insert (VEC(T) *v, unsigned ix, T *val); // Object
+
+ Insert an element, VAL, at the IXth position of V. Return a pointer
+ to the slot created. For vectors of object, the new value can be
+ NULL, in which case no initialization of the inserted slot takes
+ place. There must be sufficient space. */
+
+#define VEC_quick_insert(T,V,I,O) \
+ (VEC_OP(T,base,quick_insert)(VEC_BASE(V),I,O VEC_CHECK_INFO))
+
+/* Insert object with reallocation
+ T *VEC_T_A_safe_insert (VEC(T,A) *&v, unsigned ix, T val); // Integer
+ T *VEC_T_A_safe_insert (VEC(T,A) *&v, unsigned ix, T val); // Pointer
+ T *VEC_T_A_safe_insert (VEC(T,A) *&v, unsigned ix, T *val); // Object
+
+ Insert an element, VAL, at the IXth position of V. Return a pointer
+ to the slot created. For vectors of object, the new value can be
+ NULL, in which case no initialization of the inserted slot takes
+ place. Reallocate V, if necessary. */
+
+#define VEC_safe_insert(T,A,V,I,O) \
+ (VEC_OP(T,A,safe_insert)(&(V),I,O VEC_CHECK_INFO MEM_STAT_INFO))
+
+/* Remove element retaining order
+ T VEC_T_ordered_remove (VEC(T) *v, unsigned ix); // Integer
+ T VEC_T_ordered_remove (VEC(T) *v, unsigned ix); // Pointer
+ void VEC_T_ordered_remove (VEC(T) *v, unsigned ix); // Object
+
+ Remove an element from the IXth position of V. Ordering of
+ remaining elements is preserved. For pointer vectors returns the
+ removed object. This is an O(N) operation due to a memmove. */
+
+#define VEC_ordered_remove(T,V,I) \
+ (VEC_OP(T,base,ordered_remove)(VEC_BASE(V),I VEC_CHECK_INFO))
+
+/* Remove element destroying order
+ T VEC_T_unordered_remove (VEC(T) *v, unsigned ix); // Integer
+ T VEC_T_unordered_remove (VEC(T) *v, unsigned ix); // Pointer
+ void VEC_T_unordered_remove (VEC(T) *v, unsigned ix); // Object
+
+ Remove an element from the IXth position of V. Ordering of
+ remaining elements is destroyed. For pointer vectors returns the
+ removed object. This is an O(1) operation. */
+
+#define VEC_unordered_remove(T,V,I) \
+ (VEC_OP(T,base,unordered_remove)(VEC_BASE(V),I VEC_CHECK_INFO))
+
+/* Remove a block of elements
+ void VEC_T_block_remove (VEC(T) *v, unsigned ix, unsigned len);
+
+ Remove LEN elements starting at the IXth. Ordering is retained.
+ This is an O(1) operation. */
+
+#define VEC_block_remove(T,V,I,L) \
+ (VEC_OP(T,base,block_remove)(VEC_BASE(V),I,L VEC_CHECK_INFO))
+
+/* Get the address of the array of elements
+ T *VEC_T_address (VEC(T) v)
+
+ If you need to directly manipulate the array (for instance, you
+ want to feed it to qsort), use this accessor. */
+
+#define VEC_address(T,V) (VEC_OP(T,base,address)(VEC_BASE(V)))
+
+/* Find the first index in the vector not less than the object.
+ unsigned VEC_T_lower_bound (VEC(T) *v, const T val,
+ bool (*lessthan) (const T, const T)); // Integer
+ unsigned VEC_T_lower_bound (VEC(T) *v, const T val,
+ bool (*lessthan) (const T, const T)); // Pointer
+ unsigned VEC_T_lower_bound (VEC(T) *v, const T *val,
+ bool (*lessthan) (const T*, const T*)); // Object
+
+ Find the first position in which VAL could be inserted without
+ changing the ordering of V. LESSTHAN is a function that returns
+ true if the first argument is strictly less than the second. */
+
+#define VEC_lower_bound(T,V,O,LT) \
+ (VEC_OP(T,base,lower_bound)(VEC_BASE(V),O,LT VEC_CHECK_INFO))
+
+/* Reallocate an array of elements with prefix. */
+extern void *vec_gc_p_reserve (void *, int MEM_STAT_DECL);
+extern void *vec_gc_p_reserve_exact (void *, int MEM_STAT_DECL);
+extern void *vec_gc_o_reserve (void *, int, size_t, size_t MEM_STAT_DECL);
+extern void *vec_gc_o_reserve_exact (void *, int, size_t, size_t
+ MEM_STAT_DECL);
+extern void ggc_free (void *);
+#define vec_gc_free(V) ggc_free (V)
+extern void *vec_heap_p_reserve (void *, int MEM_STAT_DECL);
+extern void *vec_heap_p_reserve_exact (void *, int MEM_STAT_DECL);
+extern void *vec_heap_o_reserve (void *, int, size_t, size_t MEM_STAT_DECL);
+extern void *vec_heap_o_reserve_exact (void *, int, size_t, size_t
+ MEM_STAT_DECL);
+extern void dump_vec_loc_statistics (void);
+#ifdef GATHER_STATISTICS
+void vec_heap_free (void *);
+#else
+#define vec_heap_free(V) free (V)
+#endif
+
+#if ENABLE_CHECKING
+#define VEC_CHECK_INFO ,__FILE__,__LINE__,__FUNCTION__
+#define VEC_CHECK_DECL ,const char *file_,unsigned line_,const char *function_
+#define VEC_CHECK_PASS ,file_,line_,function_
+
+#define VEC_ASSERT(EXPR,OP,T,A) \
+ (void)((EXPR) ? 0 : (VEC_ASSERT_FAIL(OP,VEC(T,A)), 0))
+
+extern void vec_assert_fail (const char *, const char * VEC_CHECK_DECL)
+ ATTRIBUTE_NORETURN;
+#define VEC_ASSERT_FAIL(OP,VEC) vec_assert_fail (OP,#VEC VEC_CHECK_PASS)
+#else
+#define VEC_CHECK_INFO
+#define VEC_CHECK_DECL
+#define VEC_CHECK_PASS
+#define VEC_ASSERT(EXPR,OP,T,A) (void)(EXPR)
+#endif
+
+/* Note: gengtype has hardwired knowledge of the expansions of the
+ VEC, DEF_VEC_*, and DEF_VEC_ALLOC_* macros. If you change the
+ expansions of these macros you may need to change gengtype too. */
+
+#define VEC(T,A) VEC_##T##_##A
+#define VEC_OP(T,A,OP) VEC_##T##_##A##_##OP
+
+/* Base of vector type, not user visible. */
+#define VEC_T(T,B) \
+typedef struct VEC(T,B) \
+{ \
+ unsigned num; \
+ unsigned alloc; \
+ T vec[1]; \
+} VEC(T,B)
+
+#define VEC_T_GTY(T,B) \
+typedef struct VEC(T,B) GTY(()) \
+{ \
+ unsigned num; \
+ unsigned alloc; \
+ T GTY ((length ("%h.num"))) vec[1]; \
+} VEC(T,B)
+
+/* Derived vector type, user visible. */
+#define VEC_TA_GTY(T,B,A,GTY) \
+typedef struct VEC(T,A) GTY \
+{ \
+ VEC(T,B) base; \
+} VEC(T,A)
+
+#define VEC_TA(T,B,A) \
+typedef struct VEC(T,A) \
+{ \
+ VEC(T,B) base; \
+} VEC(T,A)
+
+/* Convert to base type. */
+#define VEC_BASE(P) ((P) ? &(P)->base : 0)
+
+/* Vector of integer-like object. */
+#define DEF_VEC_I(T) \
+static inline void VEC_OP (T,must_be,integral_type) (void) \
+{ \
+ (void)~(T)0; \
+} \
+ \
+VEC_T(T,base); \
+VEC_TA(T,base,none); \
+DEF_VEC_FUNC_P(T) \
+struct vec_swallow_trailing_semi
+#define DEF_VEC_ALLOC_I(T,A) \
+VEC_TA(T,base,A); \
+DEF_VEC_ALLOC_FUNC_I(T,A) \
+struct vec_swallow_trailing_semi
+
+/* Vector of pointer to object. */
+#define DEF_VEC_P(T) \
+static inline void VEC_OP (T,must_be,pointer_type) (void) \
+{ \
+ (void)((T)1 == (void *)1); \
+} \
+ \
+VEC_T_GTY(T,base); \
+VEC_TA(T,base,none); \
+DEF_VEC_FUNC_P(T) \
+struct vec_swallow_trailing_semi
+#define DEF_VEC_ALLOC_P(T,A) \
+VEC_TA(T,base,A); \
+DEF_VEC_ALLOC_FUNC_P(T,A) \
+struct vec_swallow_trailing_semi
+
+#define DEF_VEC_FUNC_P(T) \
+static inline unsigned VEC_OP (T,base,length) (const VEC(T,base) *vec_) \
+{ \
+ return vec_ ? vec_->num : 0; \
+} \
+ \
+static inline T VEC_OP (T,base,last) \
+ (const VEC(T,base) *vec_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ && vec_->num, "last", T, base); \
+ \
+ return vec_->vec[vec_->num - 1]; \
+} \
+ \
+static inline T VEC_OP (T,base,index) \
+ (const VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ && ix_ < vec_->num, "index", T, base); \
+ \
+ return vec_->vec[ix_]; \
+} \
+ \
+static inline int VEC_OP (T,base,iterate) \
+ (const VEC(T,base) *vec_, unsigned ix_, T *ptr) \
+{ \
+ if (vec_ && ix_ < vec_->num) \
+ { \
+ *ptr = vec_->vec[ix_]; \
+ return 1; \
+ } \
+ else \
+ { \
+ *ptr = 0; \
+ return 0; \
+ } \
+} \
+ \
+static inline size_t VEC_OP (T,base,embedded_size) \
+ (int alloc_) \
+{ \
+ return offsetof (VEC(T,base),vec) + alloc_ * sizeof(T); \
+} \
+ \
+static inline void VEC_OP (T,base,embedded_init) \
+ (VEC(T,base) *vec_, int alloc_) \
+{ \
+ vec_->num = 0; \
+ vec_->alloc = alloc_; \
+} \
+ \
+static inline int VEC_OP (T,base,space) \
+ (VEC(T,base) *vec_, int alloc_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (alloc_ >= 0, "space", T, base); \
+ return vec_ ? vec_->alloc - vec_->num >= (unsigned)alloc_ : !alloc_; \
+} \
+ \
+static inline T *VEC_OP (T,base,quick_push) \
+ (VEC(T,base) *vec_, T obj_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (vec_->num < vec_->alloc, "push", T, base); \
+ slot_ = &vec_->vec[vec_->num++]; \
+ *slot_ = obj_; \
+ \
+ return slot_; \
+} \
+ \
+static inline T VEC_OP (T,base,pop) (VEC(T,base) *vec_ VEC_CHECK_DECL) \
+{ \
+ T obj_; \
+ \
+ VEC_ASSERT (vec_->num, "pop", T, base); \
+ obj_ = vec_->vec[--vec_->num]; \
+ \
+ return obj_; \
+} \
+ \
+static inline void VEC_OP (T,base,truncate) \
+ (VEC(T,base) *vec_, unsigned size_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ ? vec_->num >= size_ : !size_, "truncate", T, base); \
+ if (vec_) \
+ vec_->num = size_; \
+} \
+ \
+static inline T VEC_OP (T,base,replace) \
+ (VEC(T,base) *vec_, unsigned ix_, T obj_ VEC_CHECK_DECL) \
+{ \
+ T old_obj_; \
+ \
+ VEC_ASSERT (ix_ < vec_->num, "replace", T, base); \
+ old_obj_ = vec_->vec[ix_]; \
+ vec_->vec[ix_] = obj_; \
+ \
+ return old_obj_; \
+} \
+ \
+static inline T *VEC_OP (T,base,quick_insert) \
+ (VEC(T,base) *vec_, unsigned ix_, T obj_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (vec_->num < vec_->alloc, "insert", T, base); \
+ VEC_ASSERT (ix_ <= vec_->num, "insert", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ memmove (slot_ + 1, slot_, (vec_->num++ - ix_) * sizeof (T)); \
+ *slot_ = obj_; \
+ \
+ return slot_; \
+} \
+ \
+static inline T VEC_OP (T,base,ordered_remove) \
+ (VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ T obj_; \
+ \
+ VEC_ASSERT (ix_ < vec_->num, "remove", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ obj_ = *slot_; \
+ memmove (slot_, slot_ + 1, (--vec_->num - ix_) * sizeof (T)); \
+ \
+ return obj_; \
+} \
+ \
+static inline T VEC_OP (T,base,unordered_remove) \
+ (VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ T obj_; \
+ \
+ VEC_ASSERT (ix_ < vec_->num, "remove", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ obj_ = *slot_; \
+ *slot_ = vec_->vec[--vec_->num]; \
+ \
+ return obj_; \
+} \
+ \
+static inline void VEC_OP (T,base,block_remove) \
+ (VEC(T,base) *vec_, unsigned ix_, unsigned len_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (ix_ + len_ <= vec_->num, "block_remove", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ vec_->num -= len_; \
+ memmove (slot_, slot_ + len_, (vec_->num - ix_) * sizeof (T)); \
+} \
+ \
+static inline T *VEC_OP (T,base,address) \
+ (VEC(T,base) *vec_) \
+{ \
+ return vec_ ? vec_->vec : 0; \
+} \
+ \
+static inline unsigned VEC_OP (T,base,lower_bound) \
+ (VEC(T,base) *vec_, const T obj_, \
+ bool (*lessthan_)(const T, const T) VEC_CHECK_DECL) \
+{ \
+ unsigned int len_ = VEC_OP (T,base, length) (vec_); \
+ unsigned int half_, middle_; \
+ unsigned int first_ = 0; \
+ while (len_ > 0) \
+ { \
+ T middle_elem_; \
+ half_ = len_ >> 1; \
+ middle_ = first_; \
+ middle_ += half_; \
+ middle_elem_ = VEC_OP (T,base,index) (vec_, middle_ VEC_CHECK_PASS); \
+ if (lessthan_ (middle_elem_, obj_)) \
+ { \
+ first_ = middle_; \
+ ++first_; \
+ len_ = len_ - half_ - 1; \
+ } \
+ else \
+ len_ = half_; \
+ } \
+ return first_; \
+}
+
+#define DEF_VEC_ALLOC_FUNC_P(T,A) \
+static inline VEC(T,A) *VEC_OP (T,A,alloc) \
+ (int alloc_ MEM_STAT_DECL) \
+{ \
+ return (VEC(T,A) *) vec_##A##_p_reserve_exact (NULL, alloc_ \
+ PASS_MEM_STAT); \
+} \
+ \
+static inline void VEC_OP (T,A,free) \
+ (VEC(T,A) **vec_) \
+{ \
+ if (*vec_) \
+ vec_##A##_free (*vec_); \
+ *vec_ = NULL; \
+} \
+ \
+static inline VEC(T,A) *VEC_OP (T,A,copy) (VEC(T,base) *vec_ MEM_STAT_DECL) \
+{ \
+ size_t len_ = vec_ ? vec_->num : 0; \
+ VEC (T,A) *new_vec_ = NULL; \
+ \
+ if (len_) \
+ { \
+ new_vec_ = (VEC (T,A) *)(vec_##A##_p_reserve_exact \
+ (NULL, len_ PASS_MEM_STAT)); \
+ \
+ new_vec_->base.num = len_; \
+ memcpy (new_vec_->base.vec, vec_->vec, sizeof (T) * len_); \
+ } \
+ return new_vec_; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_p_reserve (*vec_, alloc_ PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve_exact) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_p_reserve_exact (*vec_, alloc_ \
+ PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_ASSERT (size_ >= 0 \
+ && VEC_OP(T,base,length) VEC_BASE(*vec_) <= (unsigned)size_, \
+ "grow", T, A); \
+ VEC_OP (T,A,reserve_exact) (vec_, \
+ size_ - (int)(*vec_ ? VEC_BASE(*vec_)->num : 0) \
+ VEC_CHECK_PASS PASS_MEM_STAT); \
+ VEC_BASE (*vec_)->num = size_; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow_cleared) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int oldsize = VEC_OP(T,base,length) VEC_BASE(*vec_); \
+ VEC_OP (T,A,safe_grow) (vec_, size_ VEC_CHECK_PASS PASS_MEM_STAT); \
+ memset (&(VEC_OP (T,base,address) VEC_BASE(*vec_))[oldsize], 0, \
+ sizeof (T) * (size_ - oldsize)); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_push) \
+ (VEC(T,A) **vec_, T obj_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_push) (VEC_BASE(*vec_), obj_ VEC_CHECK_PASS); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_insert) \
+ (VEC(T,A) **vec_, unsigned ix_, T obj_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_insert) (VEC_BASE(*vec_), ix_, obj_ \
+ VEC_CHECK_PASS); \
+}
+
+/* Vector of object. */
+#define DEF_VEC_O(T) \
+VEC_T_GTY(T,base); \
+VEC_TA(T,base,none); \
+DEF_VEC_FUNC_O(T) \
+struct vec_swallow_trailing_semi
+#define DEF_VEC_ALLOC_O(T,A) \
+VEC_TA(T,base,A); \
+DEF_VEC_ALLOC_FUNC_O(T,A) \
+struct vec_swallow_trailing_semi
+
+#define DEF_VEC_FUNC_O(T) \
+static inline unsigned VEC_OP (T,base,length) (const VEC(T,base) *vec_) \
+{ \
+ return vec_ ? vec_->num : 0; \
+} \
+ \
+static inline T *VEC_OP (T,base,last) (VEC(T,base) *vec_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ && vec_->num, "last", T, base); \
+ \
+ return &vec_->vec[vec_->num - 1]; \
+} \
+ \
+static inline T *VEC_OP (T,base,index) \
+ (VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ && ix_ < vec_->num, "index", T, base); \
+ \
+ return &vec_->vec[ix_]; \
+} \
+ \
+static inline int VEC_OP (T,base,iterate) \
+ (VEC(T,base) *vec_, unsigned ix_, T **ptr) \
+{ \
+ if (vec_ && ix_ < vec_->num) \
+ { \
+ *ptr = &vec_->vec[ix_]; \
+ return 1; \
+ } \
+ else \
+ { \
+ *ptr = 0; \
+ return 0; \
+ } \
+} \
+ \
+static inline size_t VEC_OP (T,base,embedded_size) \
+ (int alloc_) \
+{ \
+ return offsetof (VEC(T,base),vec) + alloc_ * sizeof(T); \
+} \
+ \
+static inline void VEC_OP (T,base,embedded_init) \
+ (VEC(T,base) *vec_, int alloc_) \
+{ \
+ vec_->num = 0; \
+ vec_->alloc = alloc_; \
+} \
+ \
+static inline int VEC_OP (T,base,space) \
+ (VEC(T,base) *vec_, int alloc_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (alloc_ >= 0, "space", T, base); \
+ return vec_ ? vec_->alloc - vec_->num >= (unsigned)alloc_ : !alloc_; \
+} \
+ \
+static inline T *VEC_OP (T,base,quick_push) \
+ (VEC(T,base) *vec_, const T *obj_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (vec_->num < vec_->alloc, "push", T, base); \
+ slot_ = &vec_->vec[vec_->num++]; \
+ if (obj_) \
+ *slot_ = *obj_; \
+ \
+ return slot_; \
+} \
+ \
+static inline void VEC_OP (T,base,pop) (VEC(T,base) *vec_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_->num, "pop", T, base); \
+ --vec_->num; \
+} \
+ \
+static inline void VEC_OP (T,base,truncate) \
+ (VEC(T,base) *vec_, unsigned size_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (vec_ ? vec_->num >= size_ : !size_, "truncate", T, base); \
+ if (vec_) \
+ vec_->num = size_; \
+} \
+ \
+static inline T *VEC_OP (T,base,replace) \
+ (VEC(T,base) *vec_, unsigned ix_, const T *obj_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (ix_ < vec_->num, "replace", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ if (obj_) \
+ *slot_ = *obj_; \
+ \
+ return slot_; \
+} \
+ \
+static inline T *VEC_OP (T,base,quick_insert) \
+ (VEC(T,base) *vec_, unsigned ix_, const T *obj_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (vec_->num < vec_->alloc, "insert", T, base); \
+ VEC_ASSERT (ix_ <= vec_->num, "insert", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ memmove (slot_ + 1, slot_, (vec_->num++ - ix_) * sizeof (T)); \
+ if (obj_) \
+ *slot_ = *obj_; \
+ \
+ return slot_; \
+} \
+ \
+static inline void VEC_OP (T,base,ordered_remove) \
+ (VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (ix_ < vec_->num, "remove", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ memmove (slot_, slot_ + 1, (--vec_->num - ix_) * sizeof (T)); \
+} \
+ \
+static inline void VEC_OP (T,base,unordered_remove) \
+ (VEC(T,base) *vec_, unsigned ix_ VEC_CHECK_DECL) \
+{ \
+ VEC_ASSERT (ix_ < vec_->num, "remove", T, base); \
+ vec_->vec[ix_] = vec_->vec[--vec_->num]; \
+} \
+ \
+static inline void VEC_OP (T,base,block_remove) \
+ (VEC(T,base) *vec_, unsigned ix_, unsigned len_ VEC_CHECK_DECL) \
+{ \
+ T *slot_; \
+ \
+ VEC_ASSERT (ix_ + len_ <= vec_->num, "block_remove", T, base); \
+ slot_ = &vec_->vec[ix_]; \
+ vec_->num -= len_; \
+ memmove (slot_, slot_ + len_, (vec_->num - ix_) * sizeof (T)); \
+} \
+ \
+static inline T *VEC_OP (T,base,address) \
+ (VEC(T,base) *vec_) \
+{ \
+ return vec_ ? vec_->vec : 0; \
+} \
+ \
+static inline unsigned VEC_OP (T,base,lower_bound) \
+ (VEC(T,base) *vec_, const T *obj_, \
+ bool (*lessthan_)(const T *, const T *) VEC_CHECK_DECL) \
+{ \
+ unsigned int len_ = VEC_OP (T, base, length) (vec_); \
+ unsigned int half_, middle_; \
+ unsigned int first_ = 0; \
+ while (len_ > 0) \
+ { \
+ T *middle_elem_; \
+ half_ = len_ >> 1; \
+ middle_ = first_; \
+ middle_ += half_; \
+ middle_elem_ = VEC_OP (T,base,index) (vec_, middle_ VEC_CHECK_PASS); \
+ if (lessthan_ (middle_elem_, obj_)) \
+ { \
+ first_ = middle_; \
+ ++first_; \
+ len_ = len_ - half_ - 1; \
+ } \
+ else \
+ len_ = half_; \
+ } \
+ return first_; \
+}
+
+#define DEF_VEC_ALLOC_FUNC_O(T,A) \
+static inline VEC(T,A) *VEC_OP (T,A,alloc) \
+ (int alloc_ MEM_STAT_DECL) \
+{ \
+ return (VEC(T,A) *) vec_##A##_o_reserve_exact (NULL, alloc_, \
+ offsetof (VEC(T,A),base.vec), \
+ sizeof (T) \
+ PASS_MEM_STAT); \
+} \
+ \
+static inline VEC(T,A) *VEC_OP (T,A,copy) (VEC(T,base) *vec_ MEM_STAT_DECL) \
+{ \
+ size_t len_ = vec_ ? vec_->num : 0; \
+ VEC (T,A) *new_vec_ = NULL; \
+ \
+ if (len_) \
+ { \
+ new_vec_ = (VEC (T,A) *)(vec_##A##_o_reserve_exact \
+ (NULL, len_, \
+ offsetof (VEC(T,A),base.vec), sizeof (T) \
+ PASS_MEM_STAT)); \
+ \
+ new_vec_->base.num = len_; \
+ memcpy (new_vec_->base.vec, vec_->vec, sizeof (T) * len_); \
+ } \
+ return new_vec_; \
+} \
+ \
+static inline void VEC_OP (T,A,free) \
+ (VEC(T,A) **vec_) \
+{ \
+ if (*vec_) \
+ vec_##A##_free (*vec_); \
+ *vec_ = NULL; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_o_reserve (*vec_, alloc_, \
+ offsetof (VEC(T,A),base.vec),\
+ sizeof (T) \
+ PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve_exact) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_o_reserve_exact \
+ (*vec_, alloc_, \
+ offsetof (VEC(T,A),base.vec), \
+ sizeof (T) PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_ASSERT (size_ >= 0 \
+ && VEC_OP(T,base,length) VEC_BASE(*vec_) <= (unsigned)size_, \
+ "grow", T, A); \
+ VEC_OP (T,A,reserve_exact) (vec_, \
+ size_ - (int)(*vec_ ? VEC_BASE(*vec_)->num : 0) \
+ VEC_CHECK_PASS PASS_MEM_STAT); \
+ VEC_BASE (*vec_)->num = size_; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow_cleared) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int oldsize = VEC_OP(T,base,length) VEC_BASE(*vec_); \
+ VEC_OP (T,A,safe_grow) (vec_, size_ VEC_CHECK_PASS PASS_MEM_STAT); \
+ memset (&(VEC_OP (T,base,address) VEC_BASE(*vec_))[oldsize], 0, \
+ sizeof (T) * (size_ - oldsize)); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_push) \
+ (VEC(T,A) **vec_, const T *obj_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_push) (VEC_BASE(*vec_), obj_ VEC_CHECK_PASS); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_insert) \
+ (VEC(T,A) **vec_, unsigned ix_, const T *obj_ \
+ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_insert) (VEC_BASE(*vec_), ix_, obj_ \
+ VEC_CHECK_PASS); \
+}
+
+#define DEF_VEC_ALLOC_FUNC_I(T,A) \
+static inline VEC(T,A) *VEC_OP (T,A,alloc) \
+ (int alloc_ MEM_STAT_DECL) \
+{ \
+ return (VEC(T,A) *) vec_##A##_o_reserve_exact \
+ (NULL, alloc_, offsetof (VEC(T,A),base.vec), \
+ sizeof (T) PASS_MEM_STAT); \
+} \
+ \
+static inline VEC(T,A) *VEC_OP (T,A,copy) (VEC(T,base) *vec_ MEM_STAT_DECL) \
+{ \
+ size_t len_ = vec_ ? vec_->num : 0; \
+ VEC (T,A) *new_vec_ = NULL; \
+ \
+ if (len_) \
+ { \
+ new_vec_ = (VEC (T,A) *)(vec_##A##_o_reserve_exact \
+ (NULL, len_, \
+ offsetof (VEC(T,A),base.vec), sizeof (T) \
+ PASS_MEM_STAT)); \
+ \
+ new_vec_->base.num = len_; \
+ memcpy (new_vec_->base.vec, vec_->vec, sizeof (T) * len_); \
+ } \
+ return new_vec_; \
+} \
+ \
+static inline void VEC_OP (T,A,free) \
+ (VEC(T,A) **vec_) \
+{ \
+ if (*vec_) \
+ vec_##A##_free (*vec_); \
+ *vec_ = NULL; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_o_reserve (*vec_, alloc_, \
+ offsetof (VEC(T,A),base.vec),\
+ sizeof (T) \
+ PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline int VEC_OP (T,A,reserve_exact) \
+ (VEC(T,A) **vec_, int alloc_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int extend = !VEC_OP (T,base,space) (VEC_BASE(*vec_), alloc_ \
+ VEC_CHECK_PASS); \
+ \
+ if (extend) \
+ *vec_ = (VEC(T,A) *) vec_##A##_o_reserve_exact \
+ (*vec_, alloc_, offsetof (VEC(T,A),base.vec), \
+ sizeof (T) PASS_MEM_STAT); \
+ \
+ return extend; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_ASSERT (size_ >= 0 \
+ && VEC_OP(T,base,length) VEC_BASE(*vec_) <= (unsigned)size_, \
+ "grow", T, A); \
+ VEC_OP (T,A,reserve_exact) (vec_, \
+ size_ - (int)(*vec_ ? VEC_BASE(*vec_)->num : 0) \
+ VEC_CHECK_PASS PASS_MEM_STAT); \
+ VEC_BASE (*vec_)->num = size_; \
+} \
+ \
+static inline void VEC_OP (T,A,safe_grow_cleared) \
+ (VEC(T,A) **vec_, int size_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ int oldsize = VEC_OP(T,base,length) VEC_BASE(*vec_); \
+ VEC_OP (T,A,safe_grow) (vec_, size_ VEC_CHECK_PASS PASS_MEM_STAT); \
+ memset (&(VEC_OP (T,base,address) VEC_BASE(*vec_))[oldsize], 0, \
+ sizeof (T) * (size_ - oldsize)); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_push) \
+ (VEC(T,A) **vec_, const T obj_ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_push) (VEC_BASE(*vec_), obj_ VEC_CHECK_PASS); \
+} \
+ \
+static inline T *VEC_OP (T,A,safe_insert) \
+ (VEC(T,A) **vec_, unsigned ix_, const T obj_ \
+ VEC_CHECK_DECL MEM_STAT_DECL) \
+{ \
+ VEC_OP (T,A,reserve) (vec_, 1 VEC_CHECK_PASS PASS_MEM_STAT); \
+ \
+ return VEC_OP (T,base,quick_insert) (VEC_BASE(*vec_), ix_, obj_ \
+ VEC_CHECK_PASS); \
+}
+
+#endif /* GCC_VEC_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vecprim.h b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vecprim.h
new file mode 100644
index 0000000..c546a2b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/vecprim.h
@@ -0,0 +1,32 @@
+/* VEC types for primitive types
+ Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_VECPRIM_H
+#define GCC_VECPRIM_H
+
+DEF_VEC_I(char);
+DEF_VEC_ALLOC_I(char,heap);
+
+DEF_VEC_I(int);
+DEF_VEC_ALLOC_I(int,heap);
+
+DEF_VEC_I(unsigned);
+DEF_VEC_ALLOC_I(unsigned,heap);
+
+#endif /* GCC_VECPRIM_H */
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o
new file mode 100644
index 0000000..fea15eb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbegin.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o
new file mode 100644
index 0000000..db18d05
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginS.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o
new file mode 100644
index 0000000..fea15eb
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtbeginT.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o
new file mode 100644
index 0000000..9872cce
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtend.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o
new file mode 100644
index 0000000..9872cce
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/crtendS.o
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a
new file mode 100644
index 0000000..bd1bbf8
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcc.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a
new file mode 100644
index 0000000..966ab8b
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/thumb/libgcov.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a
new file mode 100644
index 0000000..4394b58
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libarm-elf-linux-sim.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a
new file mode 100644
index 0000000..266935f
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la
new file mode 100755
index 0000000..0bff9f0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libbfd.la
@@ -0,0 +1,41 @@
+# libbfd.la - a libtool library file
+# Generated by ltmain.sh (GNU libtool) 2.2.6
+#
+# Please DO NOT delete this file!
+# It is necessary for linking the library.
+
+# The name that we can dlopen(3).
+dlname=''
+
+# Names of this library.
+library_names=''
+
+# The name of the static archive.
+old_library='libbfd.a'
+
+# Linker flags that can not go in dependency_libs.
+inherited_linker_flags=''
+
+# Libraries that this one depends upon.
+dependency_libs=' -lz'
+
+# Names of additional weak libraries provided by this library
+weak_library_names=''
+
+# Version information for libbfd.
+current=0
+age=0
+revision=0
+
+# Is this an already installed library?
+installed=yes
+
+# Should we warn about portability when linking against -modules?
+shouldnotlink=no
+
+# Files to dlopen/dlpreopen
+dlopen=''
+dlpreopen=''
+
+# Directory that this library needs to be installed in:
+libdir='/usr/local/lib'
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a
new file mode 100644
index 0000000..e86f5da
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libiberty.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a
new file mode 100644
index 0000000..251bbf2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/libintl.a
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1
new file mode 100755
index 0000000..eae101c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus
new file mode 100755
index 0000000..770bd18
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/cc1plus
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2
new file mode 100755
index 0000000..c0ddb0a
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/collect2
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh
new file mode 100755
index 0000000..e73aed9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixinc.sh
@@ -0,0 +1,498 @@
+#!/bin/sh
+#
+# Install modified versions of certain ANSI-incompatible system header
+# files which are fixed to work correctly with ANSI C and placed in a
+# directory that GCC will search.
+#
+# See README-fixinc for more information.
+#
+# fixincludes copyright (c) 1998, 1999, 2000, 2002, 2009
+# The Free Software Foundation, Inc.
+#
+# fixincludes is free software.
+#
+# You may redistribute it and/or modify it under the terms of the
+# GNU General Public License, as published by the Free Software
+# Foundation; either version 3, or (at your option) any later version.
+#
+# fixincludes is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with fixincludes; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+#
+# # # # # # # # # # # # # # # # # # # # #
+
+# Usage: fixinc.sh output-dir input-dir
+#
+# Directory in which to store the results.
+# Fail if no arg to specify a directory for the output.
+if [ "x$1" = "x" ]
+then
+ echo fixincludes: no output directory specified
+ exit 1
+fi
+
+LIB=${1}
+shift
+
+# Make sure it exists.
+if [ ! -d $LIB ]; then
+ mkdir $LIB || {
+ echo fixincludes: output dir '`'$LIB"' cannot be created"
+ exit 1
+ }
+else
+ ( cd $LIB && touch DONE && rm DONE ) || {
+ echo fixincludes: output dir '`'$LIB"' is an invalid directory"
+ exit 1
+ }
+fi
+
+if test -z "$VERBOSE"
+then
+ VERBOSE=2
+ export VERBOSE
+else
+ case "$VERBOSE" in
+ [0-9] ) : ;;
+ * ) VERBOSE=3 ;;
+ esac
+fi
+
+# Define what target system we're fixing.
+#
+if test -r ./Makefile; then
+ target_canonical="`sed -n -e 's,^target[ ]*=[ ]*\(.*\)$,\1,p' < Makefile`"
+fi
+
+# If not from the Makefile, then try config.guess
+#
+if test -z "${target_canonical}" ; then
+ if test -x ./config.guess ; then
+ target_canonical="`config.guess`" ; fi
+ test -z "${target_canonical}" && target_canonical=unknown
+fi
+export target_canonical
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# Define PWDCMD as a command to use to get the working dir
+# in the form that we want.
+PWDCMD=${PWDCMD-pwd}
+
+case "`$PWDCMD`" in
+//*)
+ # On an Apollo, discard everything before `/usr'.
+ PWDCMD="eval pwd | sed -e 's,.*/usr/,/usr/,'"
+ ;;
+esac
+
+# Original directory.
+ORIGDIR=`${PWDCMD}`
+export ORIGDIR
+FIXINCL=`${PWDCMD}`/fixincl
+if [ ! -x $FIXINCL ] ; then
+ echo "Cannot find fixincl" >&2
+ exit 1
+fi
+export FIXINCL
+
+# Make LIB absolute only if needed to avoid problems with the amd.
+case $LIB in
+/*)
+ ;;
+*)
+ cd $LIB; LIB=`${PWDCMD}`
+ ;;
+esac
+
+if test $VERBOSE -gt 0
+then echo Fixing headers into ${LIB} for ${target_canonical} target ; fi
+
+# Determine whether this system has symbolic links.
+if test -n "$DJDIR"; then
+ LINKS=false
+elif ln -s X $LIB/ShouldNotExist 2>/dev/null; then
+ rm -f $LIB/ShouldNotExist
+ LINKS=true
+elif ln -s X /tmp/ShouldNotExist 2>/dev/null; then
+ rm -f /tmp/ShouldNotExist
+ LINKS=true
+else
+ LINKS=false
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# In the file macro_list are listed all the predefined
+# macros that are not in the C89 reserved namespace (the reserved
+# namespace is all identifiers beginnning with two underscores or one
+# underscore followed by a capital letter). A regular expression to find
+# any of those macros in a header file is written to MN_NAME_PAT.
+#
+# Note dependency on ASCII. \012 = newline.
+# tr ' ' '\n' is, alas, not portable.
+
+if test -s ${MACRO_LIST}
+then
+ if test $VERBOSE -gt 0; then
+ echo "Forbidden identifiers: `tr '\012' ' ' < ${MACRO_LIST}`"
+ fi
+ MN_NAME_PAT="`sed 's/^/\\\\</; s/$/\\\\>/; $!s/$/|/' \
+ < ${MACRO_LIST} | tr -d '\012'`"
+ export MN_NAME_PAT
+else
+ if test $VERBOSE -gt 0
+ then echo "No forbidden identifiers defined by this target" ; fi
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# Search each input directory for broken header files.
+# This loop ends near the end of the file.
+#
+if test $# -eq 0
+then
+ INPUTLIST="/usr/include"
+else
+ INPUTLIST="$@"
+fi
+
+for INPUT in ${INPUTLIST} ; do
+
+cd ${ORIGDIR}
+
+# Make sure a directory exists before changing into it,
+# otherwise Solaris2 will fail-exit the script.
+#
+if [ ! -d ${INPUT} ]; then
+ continue
+fi
+cd ${INPUT}
+
+INPUT=`${PWDCMD}`
+export INPUT
+
+#
+# # # # # # # # # # # # # # # # # # # # #
+#
+if test $VERBOSE -gt 1
+then echo Finding directories and links to directories ; fi
+
+# Find all directories and all symlinks that point to directories.
+# Put the list in $all_dirs.
+# Each time we find a symlink, add it to newdirs
+# so that we do another find within the dir the link points to.
+# Note that $all_dirs may have duplicates in it;
+# later parts of this file are supposed to ignore them.
+dirs="."
+levels=2
+all_dirs=""
+search_dirs=""
+
+while [ -n "$dirs" ] && [ $levels -gt 0 ]
+do
+ levels=`expr $levels - 1`
+ newdirs=
+ for d in $dirs
+ do
+ if test $VERBOSE -gt 1
+ then echo " Searching $INPUT/$d" ; fi
+
+ # Find all directories under $d, relative to $d, excluding $d itself.
+ # (The /. is needed after $d in case $d is a symlink.)
+ all_dirs="$all_dirs `find $d/. -type d -print | \
+ sed -e '/\/\.$/d' -e 's@/./@/@g'`"
+ # Find all links to directories.
+ # Using `-exec test -d' in find fails on some systems,
+ # and trying to run test via sh fails on others,
+ # so this is the simplest alternative left.
+ # First find all the links, then test each one.
+ theselinks=
+ $LINKS && \
+ theselinks=`find $d/. -type l -print | sed -e 's@/./@/@g'`
+ for d1 in $theselinks --dummy--
+ do
+ # If the link points to a directory,
+ # add that dir to $newdirs
+ if [ -d $d1 ]
+ then
+ all_dirs="$all_dirs $d1"
+ if [ "`ls -ld $d1 | sed -n 's/.*-> //p'`" != "." ]
+ then
+ newdirs="$newdirs $d1"
+ search_dirs="$search_dirs $d1"
+ fi
+ fi
+ done
+ done
+
+ dirs="$newdirs"
+done
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+dirs=
+if test $VERBOSE -gt 2
+then echo "All directories (including links to directories):"
+ echo $all_dirs
+fi
+
+for file in $all_dirs; do
+ rm -rf $LIB/$file
+ if [ ! -d $LIB/$file ]
+ then mkdir $LIB/$file
+ fi
+done
+mkdir $LIB/root
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# treetops gets an alternating list
+# of old directories to copy
+# and the new directories to copy to.
+treetops=". ${LIB}"
+
+if $LINKS; then
+ if test $VERBOSE -gt 1
+ then echo 'Making symbolic directory links' ; fi
+ cwd=`${PWDCMD}`
+
+ for sym_link in $search_dirs; do
+ cd ${INPUT}
+ dest=`ls -ld ${sym_link} | sed -n 's/.*-> //p'`
+
+ # In case $dest is relative, get to ${sym_link}'s dir first.
+ #
+ cd ./`echo ${sym_link} | sed 's;/[^/]*$;;'`
+
+ # Check that the target directory exists.
+ # Redirections changed to avoid bug in sh on Ultrix.
+ #
+ (cd $dest) > /dev/null 2>&1
+ if [ $? = 0 ]; then
+ cd $dest
+
+ # full_dest_dir gets the dir that the link actually leads to.
+ #
+ full_dest_dir=`${PWDCMD}`
+
+ # Canonicalize ${INPUT} now to minimize the time an
+ # automounter has to change the result of ${PWDCMD}.
+ #
+ cinput=`cd ${INPUT}; ${PWDCMD}`
+
+ # If a link points to ., make a similar link to .
+ #
+ if [ ${full_dest_dir} = ${cinput} ]; then
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' . ': Making self link' ; fi
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s . ${LIB}/${sym_link} > /dev/null 2>&1
+
+ # If link leads back into ${INPUT},
+ # make a similar link here.
+ #
+ elif expr ${full_dest_dir} : "${cinput}/.*" > /dev/null; then
+ # Y gets the actual target dir name, relative to ${INPUT}.
+ y=`echo ${full_dest_dir} | sed -n "s&${cinput}/&&p"`
+ # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+ dots=`echo "${sym_link}" |
+ sed -e 's@^./@@' -e 's@/./@/@g' -e 's@[^/][^/]*@..@g' -e 's@..$@@'`
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' $dots$y ': Making local link' ; fi
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s $dots$y ${LIB}/${sym_link} > /dev/null 2>&1
+
+ else
+ # If the link is to a dir $target outside ${INPUT},
+ # repoint the link at ${INPUT}/root$target
+ # and process $target into ${INPUT}/root$target
+ # treat this directory as if it actually contained the files.
+ #
+ if test $VERBOSE -gt 2
+ then echo ${sym_link} '->' root${full_dest_dir} ': Making rooted link'
+ fi
+ if [ -d $LIB/root${full_dest_dir} ]
+ then true
+ else
+ dirname=root${full_dest_dir}/
+ dirmade=.
+ cd $LIB
+ while [ x$dirname != x ]; do
+ component=`echo $dirname | sed -e 's|/.*$||'`
+ mkdir $component >/dev/null 2>&1
+ cd $component
+ dirmade=$dirmade/$component
+ dirname=`echo $dirname | sed -e 's|[^/]*/||'`
+ done
+ fi
+
+ # Duplicate directory structure created in ${LIB}/${sym_link} in new
+ # root area.
+ #
+ for file2 in $all_dirs; do
+ case $file2 in
+ ${sym_link}/*)
+ dupdir=${LIB}/root${full_dest_dir}/`echo $file2 |
+ sed -n "s|^${sym_link}/||p"`
+ if test $VERBOSE -gt 2
+ then echo "Duplicating ${sym_link}'s ${dupdir}" ; fi
+ if [ -d ${dupdir} ]
+ then true
+ else
+ mkdir ${dupdir}
+ fi
+ ;;
+ *)
+ ;;
+ esac
+ done
+
+ # Get the path from ${LIB} to ${sym_link}, accounting for symlinks.
+ #
+ parent=`echo "${sym_link}" | sed -e 's@/[^/]*$@@'`
+ libabs=`cd ${LIB}; ${PWDCMD}`
+ file2=`cd ${LIB}; cd $parent; ${PWDCMD} | sed -e "s@^${libabs}@@"`
+
+ # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+ #
+ dots=`echo "$file2" | sed -e 's@/[^/]*@../@g'`
+ rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+ ln -s ${dots}root${full_dest_dir} ${LIB}/${sym_link} > /dev/null 2>&1
+ treetops="$treetops ${sym_link} ${LIB}/root${full_dest_dir}"
+ fi
+ fi
+ done
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+required=
+set x $treetops
+shift
+while [ $# != 0 ]; do
+ # $1 is an old directory to copy, and $2 is the new directory to copy to.
+ #
+ SRCDIR=`cd ${INPUT} ; cd $1 ; ${PWDCMD}`
+ export SRCDIR
+
+ FIND_BASE=$1
+ export FIND_BASE
+ shift
+
+ DESTDIR=`cd $1;${PWDCMD}`
+ export DESTDIR
+ shift
+
+ # The same dir can appear more than once in treetops.
+ # There's no need to scan it more than once.
+ #
+ if [ -f ${DESTDIR}/DONE ]
+ then continue ; fi
+
+ touch ${DESTDIR}/DONE
+ if test $VERBOSE -gt 1
+ then echo Fixing directory ${SRCDIR} into ${DESTDIR} ; fi
+
+ # Check files which are symlinks as well as those which are files.
+ #
+ cd ${INPUT}
+ required="$required `if $LINKS; then
+ find ${FIND_BASE}/. -name '*.h' \( -type f -o -type l \) -print
+ else
+ find ${FIND_BASE}/. -name '*.h' -type f -print
+ fi | \
+ sed -e 's;/\./;/;g' -e 's;//*;/;g' | \
+ ${FIXINCL}`"
+done
+
+## Make sure that any include files referenced using double quotes
+## exist in the fixed directory. This comes last since otherwise
+## we might end up deleting some of these files "because they don't
+## need any change."
+set x `echo $required`
+shift
+while [ $# != 0 ]; do
+ newreq=
+ while [ $# != 0 ]; do
+ # $1 is the directory to copy from,
+ # $2 is the unfixed file,
+ # $3 is the fixed file name.
+ #
+ cd ${INPUT}
+ cd $1
+ if [ -f $2 ] ; then
+ if [ -r $2 ] && [ ! -r $3 ]; then
+ cp $2 $3 >/dev/null 2>&1 || echo "Can't copy $2" >&2
+ chmod +w $3 2>/dev/null
+ chmod a+r $3 2>/dev/null
+ if test $VERBOSE -gt 2
+ then echo Copied $2 ; fi
+ for include in `egrep '^[ ]*#[ ]*include[ ]*"[^/]' $3 |
+ sed -e 's/^[ ]*#[ ]*include[ ]*"\([^"]*\)".*$/\1/'`
+ do
+ dir=`echo $2 | sed -e s'|/[^/]*$||'`
+ dir2=`echo $3 | sed -e s'|/[^/]*$||'`
+ newreq="$newreq $1 $dir/$include $dir2/$include"
+ done
+ fi
+ fi
+ shift; shift; shift
+ done
+ set x $newreq
+ shift
+done
+
+if test $VERBOSE -gt 2
+then echo 'Cleaning up DONE files.' ; fi
+cd $LIB
+# Look for files case-insensitively, for the benefit of
+# DOS/Windows filesystems.
+find . -name '[Dd][Oo][Nn][Ee]' -exec rm -f '{}' ';'
+
+if test $VERBOSE -gt 1
+then echo 'Cleaning up unneeded directories:' ; fi
+cd $LIB
+all_dirs=`find . -type d \! -name '.' -print | sort -r`
+for file in $all_dirs; do
+ if rmdir $LIB/$file > /dev/null
+ then
+ test $VERBOSE -gt 3 && echo " removed $file"
+ fi
+done 2> /dev/null
+
+# On systems which don't support symlinks, `find' may barf
+# if called with "-type l" predicate. So only use that if
+# we know we should look for symlinks.
+if $LINKS; then
+ test $VERBOSE -gt 2 && echo "Removing unused symlinks"
+
+ all_dirs=`find . -type l -print`
+ for file in $all_dirs
+ do
+ if test ! -d $file
+ then
+ rm -f $file
+ test $VERBOSE -gt 3 && echo " removed $file"
+ rmdir `dirname $file` > /dev/null && \
+ test $VERBOSE -gt 3 && \
+ echo " removed `dirname $file`"
+ fi
+ done 2> /dev/null
+fi
+
+if test $VERBOSE -gt 0
+then echo fixincludes is done ; fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# End of for INPUT directories
+#
+done
+#
+# # # # # # # # # # # # # # # # # # # # #
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl
new file mode 100755
index 0000000..544dbe6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/fixincl
Binary files differ
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders
new file mode 100755
index 0000000..030a1bf
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkheaders
@@ -0,0 +1,109 @@
+#!/bin/sh
+
+# Copyright (C) 2002, 2007, 2009 Free Software Foundation, Inc.
+
+#This file is part of GCC.
+
+#GCC is free software; you can redistribute it and/or modify it under
+#the terms of the GNU General Public License as published by the Free
+#Software Foundation; either version 3, or (at your option) any later
+#version.
+
+#GCC is distributed in the hope that it will be useful, but WITHOUT
+#ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+#FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+#for more details.
+
+#You should have received a copy of the GNU General Public License
+#along with GCC; see the file COPYING3. If not see
+#<http://www.gnu.org/licenses/>.
+
+# Basic information
+target=arm-unknown-linux-androideabi
+target_noncanonical=arm-linux-androideabi
+version=4.4.3
+
+VERBOSE=0
+while [ x$1 = x-v ] ; do
+ shift
+ VERBOSE=`expr $VERBOSE + 1`
+done
+export VERBOSE
+
+if [ x$1 = x--help ] ; then
+ echo "Usage: mkheaders [options] [prefix [isysroot]]"
+ echo "Options:"
+ echo " -v Print more output (may be repeated for even more output)"
+ echo " --help This help"
+ echo " --version Print version information"
+ exit 0
+fi
+
+if [ x$1 = x--version ] ; then
+ echo "mkheaders (GCC) version $version"
+ echo "Copyright 2002, 2007 Free Software Foundation, Inc."
+ echo "This program is free software; you may redistribute it under the"
+ echo "terms of the GNU General Public License. This program has"
+ echo "absolutely no warranty."
+ exit 0
+fi
+
+# Common prefix for installation directories.
+if [ x$1 != x ] ; then
+ prefix=$1
+ shift
+else
+ prefix=/usr/local
+fi
+
+# Allow for alternate isysroot in which to find headers
+if [ x$1 != x ] ; then
+ isysroot=$1
+ shift
+else
+ isysroot=
+fi
+
+# Directory in which to put host dependent programs and libraries
+exec_prefix=${prefix}
+# Directory in which to put the directories used by the compiler.
+libdir=${exec_prefix}/lib
+libexecdir=${exec_prefix}/libexec
+# Directory in which the compiler finds libraries, etc.
+libsubdir=${libdir}/gcc/${target_noncanonical}/${version}
+# Directory in which the compiler finds executables
+libexecsubdir=${libexecdir}/gcc/${target_noncanonical}/${version}
+
+itoolsdir=${libexecsubdir}/install-tools
+itoolsdatadir=${libsubdir}/install-tools
+incdir=${libsubdir}/include-fixed
+mkinstalldirs="/bin/sh ${itoolsdir}/mkinstalldirs"
+
+cd ${itoolsdir}
+rm -rf ${incdir}/*
+
+for ml in `cat ${itoolsdatadir}/fixinc_list`; do
+ sysroot_headers_suffix=`echo ${ml} | sed -e 's/;.*$//'`
+ multi_dir=`echo ${ml} | sed -e 's/^[^;]*;//'`
+ subincdir=${incdir}${multi_dir}
+ . ${itoolsdatadir}/mkheaders.conf
+ if [ x${STMP_FIXINC} != x ] ; then
+ TARGET_MACHINE="${target}" target_canonical="${target}" \
+ MACRO_LIST="${itoolsdatadir}/macro_list" \
+ /bin/sh ./fixinc.sh ${subincdir} \
+ ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
+ rm -f ${subincdir}/syslimits.h
+ if [ -f ${subincdir}/limits.h ]; then
+ mv ${subincdir}/limits.h ${subincdir}/syslimits.h
+ else
+ cp ${itoolsdatadir}/gsyslimits.h ${subincdir}/syslimits.h
+ fi
+ fi
+
+ cp ${itoolsdatadir}/include${multi_dir}/limits.h ${subincdir}
+
+ if [ x${STMP_FIXPROTO} != x ] ; then
+ export FIXPROTO_DEFINES mkinstalldirs
+ /bin/sh fixproto ${subincdir} ${subincdir} ${isysroot}${SYSTEM_HEADER_DIR} || exit 1
+ fi
+done
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs
new file mode 100755
index 0000000..259dbfc
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/libexec/gcc/arm-linux-androideabi/4.4.3/install-tools/mkinstalldirs
@@ -0,0 +1,158 @@
+#! /bin/sh
+# mkinstalldirs --- make directory hierarchy
+
+scriptversion=2005-06-29.22
+
+# Original author: Noah Friedman <friedman@prep.ai.mit.edu>
+# Created: 1993-05-16
+# Public domain.
+#
+# This file is maintained in Automake, please report
+# bugs to <bug-automake@gnu.org> or send patches to
+# <automake-patches@gnu.org>.
+
+errstatus=0
+dirmode=
+
+usage="\
+Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ...
+
+Create each directory DIR (with mode MODE, if specified), including all
+leading file name components.
+
+Report bugs to <bug-automake@gnu.org>."
+
+# process command line arguments
+while test $# -gt 0 ; do
+ case $1 in
+ -h | --help | --h*) # -h for help
+ echo "$usage"
+ exit $?
+ ;;
+ -m) # -m PERM arg
+ shift
+ test $# -eq 0 && { echo "$usage" 1>&2; exit 1; }
+ dirmode=$1
+ shift
+ ;;
+ --version)
+ echo "$0 $scriptversion"
+ exit $?
+ ;;
+ --) # stop option processing
+ shift
+ break
+ ;;
+ -*) # unknown option
+ echo "$usage" 1>&2
+ exit 1
+ ;;
+ *) # first non-opt arg
+ break
+ ;;
+ esac
+done
+
+for file
+do
+ if test -d "$file"; then
+ shift
+ else
+ break
+ fi
+done
+
+case $# in
+ 0) exit 0 ;;
+esac
+
+# Solaris 8's mkdir -p isn't thread-safe. If you mkdir -p a/b and
+# mkdir -p a/c at the same time, both will detect that a is missing,
+# one will create a, then the other will try to create a and die with
+# a "File exists" error. This is a problem when calling mkinstalldirs
+# from a parallel make. We use --version in the probe to restrict
+# ourselves to GNU mkdir, which is thread-safe.
+case $dirmode in
+ '')
+ if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then
+ echo "mkdir -p -- $*"
+ exec mkdir -p -- "$@"
+ else
+ # On NextStep and OpenStep, the `mkdir' command does not
+ # recognize any option. It will interpret all options as
+ # directories to create, and then abort because `.' already
+ # exists.
+ test -d ./-p && rmdir ./-p
+ test -d ./--version && rmdir ./--version
+ fi
+ ;;
+ *)
+ if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 &&
+ test ! -d ./--version; then
+ echo "mkdir -m $dirmode -p -- $*"
+ exec mkdir -m "$dirmode" -p -- "$@"
+ else
+ # Clean up after NextStep and OpenStep mkdir.
+ for d in ./-m ./-p ./--version "./$dirmode";
+ do
+ test -d $d && rmdir $d
+ done
+ fi
+ ;;
+esac
+
+for file
+do
+ case $file in
+ /*) pathcomp=/ ;;
+ *) pathcomp= ;;
+ esac
+ oIFS=$IFS
+ IFS=/
+ set fnord $file
+ shift
+ IFS=$oIFS
+
+ for d
+ do
+ test "x$d" = x && continue
+
+ pathcomp=$pathcomp$d
+ case $pathcomp in
+ -*) pathcomp=./$pathcomp ;;
+ esac
+
+ if test ! -d "$pathcomp"; then
+ echo "mkdir $pathcomp"
+
+ mkdir "$pathcomp" || lasterr=$?
+
+ if test ! -d "$pathcomp"; then
+ errstatus=$lasterr
+ else
+ if test ! -z "$dirmode"; then
+ echo "chmod $dirmode $pathcomp"
+ lasterr=
+ chmod "$dirmode" "$pathcomp" || lasterr=$?
+
+ if test ! -z "$lasterr"; then
+ errstatus=$lasterr
+ fi
+ fi
+ fi
+ fi
+
+ pathcomp=$pathcomp/
+ done
+done
+
+exit $errstatus
+
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1
new file mode 100644
index 0000000..f2cc8be
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-cpp.1
@@ -0,0 +1,971 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "CPP 1"
+.TH CPP 1 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+cpp \- The C Preprocessor
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+cpp [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-iquote\fR\fIdir\fR...]
+ [\fB\-W\fR\fIwarn\fR...]
+ [\fB\-M\fR|\fB\-MM\fR] [\fB\-MG\fR] [\fB\-MF\fR \fIfilename\fR]
+ [\fB\-MP\fR] [\fB\-MQ\fR \fItarget\fR...]
+ [\fB\-MT\fR \fItarget\fR...]
+ [\fB\-P\fR] [\fB\-fno\-working\-directory\fR]
+ [\fB\-x\fR \fIlanguage\fR] [\fB\-std=\fR\fIstandard\fR]
+ \fIinfile\fR \fIoutfile\fR
+.PP
+Only the most useful options are listed here; see below for the remainder.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The C preprocessor, often known as \fIcpp\fR, is a \fImacro processor\fR
+that is used automatically by the C compiler to transform your program
+before compilation. It is called a macro processor because it allows
+you to define \fImacros\fR, which are brief abbreviations for longer
+constructs.
+.PP
+The C preprocessor is intended to be used only with C, \*(C+, and
+Objective-C source code. In the past, it has been abused as a general
+text processor. It will choke on input which does not obey C's lexical
+rules. For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors. Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C\-family languages. If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+.PP
+Having said that, you can often get away with using cpp on things which
+are not C. Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution. \fB\-traditional\-cpp\fR
+mode preserves more white space, and is otherwise more permissive. Many
+of the problems can be avoided by writing C or \*(C+ style comments
+instead of native language comments, and keeping macros simple.
+.PP
+Wherever possible, you should use a preprocessor geared to the language
+you are writing in. Modern versions of the \s-1GNU\s0 assembler have macro
+facilities. Most high level programming languages have their own
+conditional compilation and inclusion mechanism. If all else fails,
+try a true general text processor, such as \s-1GNU\s0 M4.
+.PP
+C preprocessors vary in some details. This manual discusses the \s-1GNU\s0 C
+preprocessor, which provides a small superset of the features of \s-1ISO\s0
+Standard C. In its default mode, the \s-1GNU\s0 C preprocessor does not do a
+few things required by the standard. These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them. To get strict \s-1ISO\s0 Standard C,
+you should use the \fB\-std=c89\fR or \fB\-std=c99\fR options, depending
+on which version of the standard you want. To get all the mandatory
+diagnostics, you must also use \fB\-pedantic\fR.
+.PP
+This manual describes the behavior of the \s-1ISO\s0 preprocessor. To
+minimize gratuitous differences, where the \s-1ISO\s0 preprocessor's
+behavior does not conflict with traditional semantics, the
+traditional preprocessor should behave the same way. The various
+differences that do exist are detailed in the section \fBTraditional
+Mode\fR.
+.PP
+For clarity, unless noted otherwise, references to \fB\s-1CPP\s0\fR in this
+manual refer to \s-1GNU\s0 \s-1CPP\s0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The C preprocessor expects two file names as arguments, \fIinfile\fR and
+\&\fIoutfile\fR. The preprocessor reads \fIinfile\fR together with any
+other files it specifies with \fB#include\fR. All the output generated
+by the combined input files is written in \fIoutfile\fR.
+.PP
+Either \fIinfile\fR or \fIoutfile\fR may be \fB\-\fR, which as
+\&\fIinfile\fR means to read from standard input and as \fIoutfile\fR
+means to write to standard output. Also, if either file is omitted, it
+means the same as if \fB\-\fR had been specified for that file.
+.PP
+Unless otherwise noted, or the option ends in \fB=\fR, all options
+which take an argument may have that argument appear either immediately
+after the option, or with a space between option and argument:
+\&\fB\-Ifoo\fR and \fB\-I foo\fR have the same effect.
+.PP
+Many options have multi-letter names; therefore multiple single-letter
+options may \fInot\fR be grouped: \fB\-dM\fR is very different from
+\&\fB\-d\ \-M\fR.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+.Sp
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+\&
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+.Sp
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes the environment variables that affect how \s-1CPP\s0
+operates. You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-I\fR, and control dependency output with options like
+\&\fB\-M\fR. These take precedence over
+environment variables, which in turn take precedence over the
+configuration of \s-1GCC\s0.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIcpp\fR, \fIgcc\fR, and
+\&\fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
+1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation. A copy of
+the license is included in the
+man page \fIgfdl\fR\|(7).
+This manual contains no Invariant Sections. The Front-Cover Texts are
+(a) (see below), and the Back-Cover Texts are (b) (see below).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1
new file mode 100644
index 0000000..eb2e349
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-g++.1
@@ -0,0 +1,15806 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+ [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+ [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+ [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+ [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking. The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage. For example, the \fB\-c\fR option
+says not to run the linker. Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing. Some options
+control the preprocessor and others the compiler itself. Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly. If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands. Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments. For the most part, the order
+you use doesn't matter. Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified. Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SS "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type. Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-no\-canonical\-prefixes
+\&\-pipe \-pass\-exit\-codes
+\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]] \fB\-\-target\-help
+\&\-\-version \-wrapper@\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
+\&\-aux\-info\fR \fIfilename\fR
+\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
+\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
+\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
+\&\-fallow\-single\-precision \-fcond\-mismatch \-flax\-vector\-conversions
+\&\-fsigned\-bitfields \-fsigned\-char
+\&\-funsigned\-bitfields \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
+\&\-fconserve\-space \-ffriend\-injection
+\&\-fno\-elide\-constructors
+\&\-fno\-enforce\-eh\-specs
+\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
+\&\-fno\-implicit\-templates
+\&\-fno\-implicit\-inline\-templates
+\&\-fno\-implement\-inlines \-fms\-extensions
+\&\-fno\-nonansi\-builtins \-fno\-operator\-names
+\&\-fno\-optional\-diags \-fpermissive
+\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
+\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
+\&\-fvisibility\-ms\-compat
+\&\-Wabi \-Wctor\-dtor\-privacy
+\&\-Wnon\-virtual\-dtor \-Wreorder
+\&\-Weffc++ \-Wstrict\-null\-sentinel
+\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
+\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
+\&\fB\-fgnu\-runtime \-fnext\-runtime
+\&\-fno\-nil\-receivers
+\&\-fobjc\-call\-cxx\-cdtors
+\&\-fobjc\-direct\-dispatch
+\&\-fobjc\-exceptions
+\&\-fobjc\-gc
+\&\-freplace\-objc\-classes
+\&\-fzero\-link
+\&\-gen\-decls
+\&\-Wassign\-intercept
+\&\-Wno\-protocol \-Wselector
+\&\-Wstrict\-selector\-match
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
+\&\fB\-fdiagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
+\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Warray\-bounds
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align \-Wcast\-qual
+\&\-Wchar\-subscripts \-Wclobbered \-Wcomment
+\&\-Wconversion \-Wcoverage\-mismatch \-Wno\-deprecated
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization
+\&\-Wno\-div\-by\-zero \-Wempty\-body \-Wenum\-compare \-Wno\-endif\-labels
+\&\-Werror \-Werror=*
+\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral
+\&\-Wformat\-security \-Wformat\-y2k
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wignored\-qualifiers
+\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
+\&\-Winit\-self \-Winline
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations
+\&\-Wlogical\-op \-Wlong\-long
+\&\-Wmain \-Wmaybe\-uninitialized \-Wmissing\-braces \-Wmissing\-field\-initializers
+\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
+\&\-Wmissing\-noreturn \-Wno\-mudflap
+\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow \-Wconversion\-null
+\&\-Woverlength\-strings \-Wpacked \-Wpacked\-bitfield\-compat \-Wpadded
+\&\-Wparentheses \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format
+\&\-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
+\&\-Wreal\-conversion \-Wredundant\-decls
+\&\-Wreturn\-type \-Wripa\-opt\-mismatch \-Wself\-assign \-Wself\-assign\-non\-pod
+\&\-Wsequence\-point \-Wshadow \-Wshadow\-compatible\-local \-Wshadow\-local
+\&\-Wsign\-compare \-Wsign\-conversion \-Wstack\-protector
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
+\&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum \-Wsync\-nand
+\&\-Wsystem\-headers \-Wtrigraphs \-Wtype\-limits \-Wundef \-Wuninitialized
+\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
+\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
+\&\-Wunused\-value \-Wunused\-variable
+\&\-Wvariadic\-macros \-Wvla
+\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
+\&\-Wmissing\-parameter\-type \-Wmissing\-prototypes \-Wnested\-externs
+\&\-Wold\-style\-declaration \-Wold\-style\-definition
+\&\-Wstrict\-prototypes \-Wtraditional \-Wtraditional\-conversion
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
+\&\-fdump\-statistics
+\&\-fdump\-tree\-all
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
+\&\-fdump\-tree\-ch
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
+\&\-fdump\-tree\-sink
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
+\&\-fenable\-icf\-debug
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose
+\&\-ftest\-coverage \-ftime\-report \-fvar\-tracking
+\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
+\&\-ggdb \-gmlt \-gstabs \-gstabs+ \-gstrict\-dwarf \-gno\-strict\-dwarf
+\&\-gvms \-gxcoff \-gxcoff+
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]
+\&\fB\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
+\&\-print\-multi\-directory \-print\-multi\-lib
+\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix
+\&\-save\-temps \-time\fR
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves
+\&\-fcgraph\-section \-fcheck\-data\-deps
+\&\-fconserve\-stack \-fcprop\-registers \-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules \-fcx\-limited\-range
+\&\-fdata\-sections \-fdce \-fdce
+\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fdse \-fdse
+\&\-fearly\-inlining \-fexpensive\-optimizations \-ffast\-math
+\&\-ffinite\-math\-only \-ffloat\-store \-fforward\-propagate
+\&\-ffunction\-sections \-ffvpt \-ffvpt\-functions=\fR\fIffvptfunctions\fR \fB\-fgcse
+\&\-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg \-fipa\-pta
+\&\-fipa\-pure\-const \-fipa\-reference \-fipa\-struct\-reorg
+\&\-fipa\-type\-escape \-fira\-algorithm=\fR\fIalgorithm\fR
+\&\fB\-fira\-region=\fR\fIregion\fR \fB\-fira\-coalesce \-fno\-ira\-share\-save\-slots
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts
+\&\-floop\-block \-floop\-interchange \-floop\-strip\-mine
+\&\-fmerge\-all\-constants \-fmerge\-constants \-fmodulo\-sched
+\&\-fmodulo\-sched\-allow\-regmoves \-fmove\-loop\-invariants \-fmudflap
+\&\-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg \-fno\-default\-inline
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls
+\&\-fpeel\-loops \-fpredictive\-commoning \-fprefetch\-loop\-arrays
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate
+\&\-fprofile\-generate=\fR\fIpath\fR \fB\-fprofile\-generate\-sampling
+\&\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values
+\&\-fpmu\-profile\-generate=\fR\fIpmuoption\fR
+\&\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR
+\&\fB\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops
+\&\-fripa \-fripa\-disallow\-asm\-modules \-fripa\-disallow\-opt\-mismatch
+\&\-fripa\-no\-promote\-always\-inline\-func \-fripa\-verbose
+\&\-frounding\-math \-fsample\-profile \-fsample\-profile\-aggregate\-using
+\&\-fsample\-profile\-use\-entry \-fsched2\-use\-superblocks
+\&\-fsched2\-use\-traces \-fsched\-spec\-load \-fsched\-spec\-load\-dangerous
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB]
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors \-fsee
+\&\-fselective\-scheduling \-fselective\-scheduling2
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop
+\&\-ftree\-copyrename \-ftree\-dce
+\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-fre \-ftree\-loop\-im
+\&\-ftree\-loop\-distribution
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize
+\&\-ftree\-lr\-shrinking
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-reassoc
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb
+\&\-fwhole\-program \-frecord\-options\-in\-elf \-fuse\-ld
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
+\&\fB\-C \-dD \-dI \-dM \-dN
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
+\&\-idirafter\fR \fIdir\fR
+\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
+\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
+\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
+\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
+\&\-P \-fworking\-directory \-remap
+\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
+\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
+\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
+\&\-T\fR \fIscript\fR \fB\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
+\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
+.IP "\fITarget Options\fR" 4
+.IX Item "Target Options"
+\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB \-EL
+\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
+\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame \-mno\-apcs\-frame
+\&\-mabi=\fR\fIname\fR
+\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
+\&\-mapcs\-float \-mno\-apcs\-float
+\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
+\&\-msched\-prolog \-mno\-sched\-prolog
+\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
+\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
+\&\-mthumb\-interwork \-mno\-thumb\-interwork
+\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
+\&\fB\-mabort\-on\-noreturn
+\&\-mlong\-calls \-mno\-long\-calls
+\&\-msingle\-pic\-base \-mno\-single\-pic\-base
+\&\-mpic\-register=\fR\fIreg\fR
+\&\fB\-mnop\-fun\-dllimport
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
+\&\-mpoke\-function\-name
+\&\-mthumb \-marm
+\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
+\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
+\&\-mtp=\fR\fIname\fR
+\&\fB\-mword\-relocations
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-mno\-interrupts
+\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]
+\&\fB\-msim \-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
+\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
+\&\-mlow\-64k \-mno\-low64k \-mstack\-check\-l1 \-mid\-shared\-library
+\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
+\&\fB\-mleaf\-id\-shared\-library \-mno\-leaf\-id\-shared\-library
+\&\-msep\-data \-mno\-sep\-data \-mlong\-calls \-mno\-long\-calls
+\&\-mfast\-fp \-minline\-plt \-mmulticore \-mcorea \-mcoreb \-msdram
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
+\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
+\&\-mstack\-align \-mdata\-align \-mconst\-align
+\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
+\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
+\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
+\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
+\&\-client_name \-compatibility_version \-current_version
+\&\-dead_strip
+\&\-dependency\-file \-dylib_file \-dylinker_install_name
+\&\-dynamic \-dynamiclib \-exported_symbols_list
+\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
+\&\-force_flat_namespace \-headerpad_max_install_names
+\&\-iframework
+\&\-image_base \-init \-install_name \-keep_private_externs
+\&\-multi_module \-multiply_defined \-multiply_defined_unused
+\&\-noall_load \-no_dead_strip_inits_and_terms
+\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
+\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
+\&\-private_bundle \-read_only_relocs \-sectalign
+\&\-sectobjectsymbols \-whyload \-seg1addr
+\&\-sectcreate \-sectobjectsymbols \-sectorder
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
+\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
+\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
+\&\-single_module \-static \-sub_library \-sub_umbrella
+\&\-twolevel_namespace \-umbrella \-undefined
+\&\-unexported_symbols_list \-weak_reference_mismatches
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
+\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
+\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
+\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
+\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mbwx \-mmax \-mfix \-mcix
+\&\-mfloat\-vax \-mfloat\-ieee
+\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
+\&\-msmall\-text \-mlarge\-text
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
+\&\-mhard\-float \-msoft\-float
+\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
+\&\-mdouble \-mno\-double
+\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
+\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
+\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
+\&\-mlibrary\-pic \-macc\-4 \-macc\-8
+\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
+\&\-moptimize\-membar \-mno\-optimize\-membar
+\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
+\&\-mvliw\-branch \-mno\-vliw\-branch
+\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
+\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
+\&\-mTLS \-mtls
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR
+\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
+\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
+\&\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
+\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
+\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
+\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
+\&\-mno\-portable\-runtime \-mno\-soft\-float
+\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
+\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
+\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
+\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mfpmath=\fR\fIunit\fR
+\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
+\&\-mno\-fp\-ret\-in\-387 \-msoft\-float
+\&\-mno\-wide\-multiply \-mrtd \-malign\-double
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mrecip
+\&\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx
+\&\-maes \-mpclmul
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-msse5 \-mlwp
+\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
+\&\-minline\-stringops\-dynamically \-minline\-compares
+\&\-mstringop\-strategy=\fR\fIalg\fR \fB\-mpush\-args \-maccumulate\-outgoing\-args
+\&\-m128bit\-long\-double \-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
+\&\-mveclibabi=\fR\fItype\fR \fB\-mpc32 \-mpc64 \-mpc80 \-mstackrealign
+\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR
+\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
+\&\fB\-mfused\-madd \-mno\-fused\-madd \-msse2avx\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
+\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
+\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
+\&\-minline\-float\-divide\-max\-throughput
+\&\-minline\-int\-divide\-min\-latency
+\&\-minline\-int\-divide\-max\-throughput
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
+\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
+\&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
+\&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
+\&\-mno\-sched\-prefer\-non\-data\-spec\-insns
+\&\-mno\-sched\-prefer\-non\-control\-spec\-insns
+\&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r
+\&\-mdebug
+\&\-malign\-loops \-mno\-align\-loops
+\&\-missue\-rate=\fR\fInumber\fR
+\&\fB\-mbranch\-cost=\fR\fInumber\fR
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
+\&\fB\-msdata=\fR\fIsdata-type\fR
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR \fB\-mcpu=\fR\fIcpu\fR \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
+\&\-m68060 \-mcpu32 \-m5200 \-m5206e \-m528x \-m5307 \-m5407
+\&\-mcfv4e \-mbitfield \-mno\-bitfield \-mc68000 \-mc68020
+\&\-mnobitfield \-mrtd \-mno\-rtd \-mdiv \-mno\-div \-mshort
+\&\-mno\-short \-mhard\-float \-m68881 \-msoft\-float \-mpcrel
+\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
+\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
+\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
+\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
+\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
+\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
+\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
+\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2
+\&\-mips64 \-mips64r2
+\&\-mips16 \-mno\-mips16 \-mflip\-mips16
+\&\-minterlink\-mips16 \-mno\-interlink\-mips16
+\&\-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
+\&\-mshared \-mno\-shared \-mplt \-mno\-plt \-mxgot \-mno\-xgot
+\&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
+\&\-msingle\-float \-mdouble\-float \-mdsp \-mno\-dsp \-mdspr2 \-mno\-dspr2
+\&\-mfpu=\fR\fIfpu-type\fR
+\&\fB\-msmartmips \-mno\-smartmips
+\&\-mpaired\-single \-mno\-paired\-single \-mdmx \-mno\-mdmx
+\&\-mips3d \-mno\-mips3d \-mmt \-mno\-mt \-mllsc \-mno\-llsc
+\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
+\&\-G\fR\fInum\fR \fB\-mlocal\-sdata \-mno\-local\-sdata
+\&\-mextern\-sdata \-mno\-extern\-sdata \-mgpopt \-mno\-gopt
+\&\-membedded\-data \-mno\-embedded\-data
+\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
+\&\-mcode\-readable=\fR\fIsetting\fR
+\&\fB\-msplit\-addresses \-mno\-split\-addresses
+\&\-mexplicit\-relocs \-mno\-explicit\-relocs
+\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
+\&\-mdivide\-traps \-mdivide\-breaks
+\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
+\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
+\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
+\&\-mfix\-r10000 \-mno\-fix\-r10000 \-mfix\-vr4120 \-mno\-fix\-vr4120
+\&\-mfix\-vr4130 \-mno\-fix\-vr4130 \-mfix\-sb1 \-mno\-fix\-sb1
+\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
+\&\-mbranch\-cost=\fR\fInum\fR \fB\-mbranch\-likely \-mno\-branch\-likely
+\&\-mfp\-exceptions \-mno\-fp\-exceptions
+\&\-mvr4130\-align \-mno\-vr4130\-align\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
+\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
+\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
+\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug \-mno\-mult\-bug
+\&\-mam33 \-mno\-am33
+\&\-mam33\-2 \-mno\-am33\-2
+\&\-mreturn\-pointer\-on\-d0
+\&\-mno\-crt0 \-mrelax\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
+\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
+\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
+\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
+\&\-mbranch\-expensive \-mbranch\-cheap
+\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
+\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
+\&\-maltivec \-mno\-altivec
+\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
+\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
+\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mnew\-mnemonics \-mold\-mnemonics
+\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
+\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
+\&\-malign\-power \-malign\-natural
+\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu
+\&\-mstring \-mno\-string \-mupdate \-mno\-update
+\&\-mavoid\-indexed\-addresses \-mno\-avoid\-indexed\-addresses
+\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
+\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
+\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
+\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
+\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
+\&\fB\-mcall\-sysv \-mcall\-netbsd
+\&\-maix\-struct\-return \-msvr4\-struct\-return
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
+\&\-misel \-mno\-isel
+\&\-misel=yes \-misel=no
+\&\-mspe \-mno\-spe
+\&\-mspe=yes \-mspe=no
+\&\-mpaired
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode
+\&\-mvrsave \-mno\-vrsave
+\&\-mmulhw \-mno\-mulhw
+\&\-mdlmzb \-mno\-dlmzb
+\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
+\&\-mprototype \-mno\-prototype
+\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
+\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mhard\-float \-msoft\-float \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mlong\-double\-64 \-mlong\-double\-128
+\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
+\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
+\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
+\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
+\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel
+\&\-mnhwloop
+\&\-muls
+\&\-mmac
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
+\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
+\&\-m5\-64media \-m5\-64media\-nofpu
+\&\-m5\-32media \-m5\-32media\-nofpu
+\&\-m5\-compact \-m5\-compact\-nofpu
+\&\-mb \-ml \-mdalign \-mrelax
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
+\&\-mieee \-mbitops \-misize \-minline\-ic_invalidate \-mpadstruct \-mspace
+\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
+\&\-minvalid\-symbols\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mcmodel=\fR\fIcode-model\fR
+\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
+\&\-mfaster\-structs \-mno\-faster\-structs
+\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
+\&\-mhard\-quad\-float \-msoft\-quad\-float
+\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
+\&\-mstack\-bias \-mno\-stack\-bias
+\&\-munaligned\-doubles \-mno\-unaligned\-doubles
+\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc
+\&\-msafe\-dma \-munsafe\-dma
+\&\-mbranch\-hints
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain
+\&\-mfixed\-range=\fR\fIregister-range\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
+\&\-mprolog\-function \-mno\-prolog\-function \-mspace
+\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
+\&\fB\-mapp\-regs \-mno\-app\-regs
+\&\-mdisable\-callt \-mno\-disable\-callt
+\&\-mv850e1
+\&\-mv850e
+\&\-mv850 \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg \-mgnu \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp \-non\-static \-Bstatic \-Bdynamic
+\&\-Xbind\-lazy \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread \-mwin32 \-mwindows\fR
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16
+\&\-mfused\-madd \-mno\-fused\-madd
+\&\-mserialize\-volatile \-mno\-serialize\-volatile
+\&\-mtext\-section\-literals \-mno\-text\-section\-literals
+\&\-mtarget\-align \-mno\-target\-align
+\&\-mlongcalls \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
+\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
+\&\-fnon\-call\-exceptions \-funwind\-tables
+\&\-fasynchronous\-unwind\-tables
+\&\-finhibit\-size\-directive \-finstrument\-functions
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...
+\&\-fno\-common \-fno\-ident
+\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
+\&\-fno\-jump\-tables
+\&\-frecord\-gcc\-switches
+\&\-freg\-struct\-return \-fshort\-enums
+\&\-fshort\-double \-fshort\-wchar
+\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
+\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
+\&\fB\-fno\-stack\-limit \-fargument\-alias \-fargument\-noalias
+\&\-fargument\-noalias\-global \-fargument\-noalias\-anything
+\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
+\&\fB\-ftrapv \-fwrapv \-fbounds\-check
+\&\-fvisibility\fR
+.SS "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header.
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR. Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration). Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body). Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix). This option applies to all following input files until
+the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 8
+\& c c\-header c\-cpp\-output
+\& c++ c++\-header c++\-cpp\-output
+\& objective\-c objective\-c\-header objective\-c\-cpp\-output
+\& objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
+\& assembler assembler\-with\-cpp
+\& ada
+\& f77 f77\-cpp\-input f95 f95\-cpp\-input
+\& java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code. If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication. The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop. Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link. The linking
+stage simply is not done. The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble. The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper. The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR. This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation. Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and all command
+arguments are quoted. This is useful for shell scripts to capture the
+driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation. This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-combine\fR" 4
+.IX Item "-combine"
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
+language for which this is supported is C. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with \fB\-save\-temps\fR, the compiler will generate multiple
+pre-processed files
+(one for each source file), but only one (combined) \fI.o\fR or
+\&\fI.s\fR file.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept. If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool. For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers. These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options. Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed. This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display. One
+case where it does work however is when one of the classes is
+\&\fItarget\fR. So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line. Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed. Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\& % gcc \-Q \-mabi=2 \-\-help=target \-c
+\& The following options are target specific:
+\& \-mabi= 2
+\& \-mabort\-on\-noreturn [disabled]
+\& \-mapcs [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\& \-Q \-O2 \-\-help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\& gcc \-c \-Q \-O3 \-\-help=optimizers > /tmp/O3\-opts
+\& gcc \-c \-Q \-O2 \-\-help=optimizers > /tmp/O2\-opts
+\& diff /tmp/O2\-opts /tmp/O3\-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program. It takes a single
+comma separated list as an argument, which will be used to invoke
+the wrapper:
+.Sp
+.Vb 1
+\& gcc \-c t.c \-wrapper gdb,\-\-args
+.Ve
+.Sp
+This will invoke all subprograms of gcc under \*(L"gdb \-\-args\*(R",
+thus cc1 invocation will be \*(L"gdb \-\-args cc1 ...\*(R".
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler. The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SS "Compiling \*(C+ Programs"
+.IX Subsection "Compiling Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library. This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations. On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.SS "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c89\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using. It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR. Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously. For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used. Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard. This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc89\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu89\fR or \fBgnu++98\fR. By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it. For example,
+\&\fB\-std=c89\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected. The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu89 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.PD 0
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.4/c99status.html\fR> for more information. The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default. The name \fBgnu9x\fR is deprecated.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+ This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3. In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode. Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior). This option was first supported in
+\&\s-1GCC\s0 4.3. This option is not supported in C89 or gnu89 mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files. This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character). In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers. You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops. The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library. In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function. For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored. There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\& #define abs(n) _\|_builtin_abs ((n))
+\& #define strcpy(d, s) _\|_builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment. This implies
+\&\fB\-fbuiltin\fR. A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment. This
+implies \fB\-fno\-builtin\fR. A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>. This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling. This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option. The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling. The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler. They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments. The value of such an expression is void. This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types. This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for. This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR. Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.SS "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in. For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\& g++ \-g \-frepo \-O \-c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking. This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated. This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option. In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does. This saves space in the executable at the
+cost of not diagnosing duplicate definitions. If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\& template <class T> auto forward(T t) \-> decltype (realfn (t))
+\& {
+\& return realfn (t);
+\& }
+\&
+\& void f()
+\& {
+\& forward({1,2}); // call forward<std::initializer_list<int>>
+\& }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup. This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime. This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR. This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue. Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings. Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time. This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
+of the language, you can save some space by using this flag. Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth-n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17.
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal. When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available. This
+option exists only for testing, and should not be used by end-users;
+it will result in inferior code and has no benefits. This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories. (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+ Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C, and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code. There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities at this point include:
+.RS 4
+.IP "\(bu" 4
+Incorrect handling of tail-padding for bit-fields. G++ may attempt to
+pack data into the same byte as a base class. For example:
+.Sp
+.Vb 2
+\& struct A { virtual void f(); int f1 : 1; };
+\& struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of tail-padding for virtual bases. G++ does not use
+tail padding when laying out virtual bases. For example:
+.Sp
+.Vb 3
+\& struct A { virtual void f(); char c1; };
+\& struct B { B(); char c2; };
+\& struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union. For
+example:
+.Sp
+.Vb 1
+\& union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "\(bu" 4
+Empty classes can be placed at incorrect offsets. For example:
+.Sp
+.Vb 1
+\& struct A {};
+\&
+\& struct B {
+\& A a;
+\& virtual void f ();
+\& };
+\&
+\& struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero. G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "\(bu" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\& template <typename Q>
+\& void f(typename Q::X) {}
+\&
+\& template <template <typename> class Q>
+\& void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes. The known psABI changes at this
+point include:
+.IP "\(bu" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI. For example:
+.Sp
+.Vb 4
+\& union U {
+\& long double ld;
+\& int i;
+\& };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed. For instance:
+.Sp
+.Vb 5
+\& struct A {
+\& int i;
+\& int j;
+\& A(): j (0), i (1) { }
+\& };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect. This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "\(bu" 4
+Item 11: Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "\(bu" 4
+Item 12: Prefer initialization to assignment in constructors.
+.IP "\(bu" 4
+Item 14: Make destructors virtual in base classes.
+.IP "\(bu" 4
+Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "\(bu" 4
+Item 23: Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "\(bu" 4
+Item 6: Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "\(bu" 4
+Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer. But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template. Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function. (Section
+14.5.3). Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function. Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class. For example, in:
+.Sp
+.Vb 3
+\& struct A {
+\& virtual void f();
+\& };
+\&
+\& struct B: public A {
+\& void f(int);
+\& };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\& B* b;
+\& b\->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size. Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\& struct A {
+\& operator int ();
+\& A& operator = (int);
+\& };
+\&
+\& main ()
+\& {
+\& A a,b;
+\& a = b;
+\& }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.SS "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves. See
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\& gcc \-g \-fgnu\-runtime \-O \-c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime. This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime. This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (e.g.,
+\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
+is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
+to be used. Currently, this option is only available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
+thusly generated will only operate on instance variables declared in the
+current Objective-C class, and not those inherited from superclasses. It
+is the responsibility of the Objective-C runtime to invoke all such methods
+in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
+will be invoked by the runtime immediately after a new object
+instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
+be invoked immediately before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher. On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in Objective-C,
+similar to what is offered by \*(C+ and Java. This option is
+unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
+earlier.
+.Sp
+.Vb 10
+\& @try {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+\& @catch (AnObjCClass *exc) {
+\& ...
+\& @throw expr;
+\& ...
+\& @throw;
+\& ...
+\& }
+\& @catch (AnotherClass *exc) {
+\& ...
+\& }
+\& @catch (id allOthers) {
+\& ...
+\& }
+\& @finally {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+.Ve
+.Sp
+The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
+Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
+\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
+the object caught by the \f(CW@catch\fR will be rethrown.
+.Sp
+Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme. When an object is thrown, it will be caught
+by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
+analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
+\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
+any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
+clauses (if any).
+.Sp
+The \f(CW@finally\fR clause, if present, will be executed upon exit from the
+immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
+regardless of whether any exceptions are thrown, caught or rethrown
+inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
+of the \f(CW\*(C`finally\*(C'\fR clause in Java.
+.Sp
+There are several caveats to using the new exception mechanism:
+.RS 4
+.IP "\(bu" 4
+Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
+idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
+exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
+systems, due to additional functionality needed in the (NeXT) Objective-C
+runtime.
+.IP "\(bu" 4
+As mentioned above, the new exceptions do not support handling
+types other than Objective-C objects. Furthermore, when used from
+Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
+exceptions at this time. This means you cannot \f(CW@throw\fR an exception
+from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
+(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
+.RE
+.RS 4
+.Sp
+The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
+blocks for thread-safe execution:
+.Sp
+.Vb 3
+\& @synchronized (ObjCClass *guard) {
+\& ...
+\& }
+.Ve
+.Sp
+Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
+first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
+object by another thread. If it has, the current thread shall wait until
+the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
+the current thread will place its own lock on it, execute the code contained in
+the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
+making \f(CW\*(C`guard\*(C'\fR available to other threads).
+.Sp
+Unlike Java, Objective-C does not allow for entire methods to be marked
+\&\f(CW@synchronized\fR. Note that throwing exceptions out of
+\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
+to be unlocked properly.
+.RE
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead. This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself. Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained. This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class. The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation. The check is performed on the list of methods
+in the final stage of compilation. Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation. Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found. A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section. This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation. This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.SS "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...). The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported. Right now, only the \*(C+ front end can
+honor these options. However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode. Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines. This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode. Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fdiagnostics\-show\-option\fR" 4
+.IX Item "-fdiagnostics-show-option"
+This option instructs the diagnostic machinery to add text to each
+diagnostic emitted, which indicates which command line option directly
+controls that diagnostic, when such an option is known to the
+diagnostic machinery.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information. By default, this warning is enabled and is treated as an
+error. \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error. Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+.SS "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error. The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors. This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
+option to have each controllable warning amended with the option which
+controls it, to determine what to use with this option.
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations. Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR. This manual lists only one of the
+two forms, whichever is not the default. For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well. With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance. They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR. We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based. Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard. (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros. This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)
+\&\fB\-Wc++0x\-compat
+\&\-Wchar\-subscripts
+\&\-Wimplicit\-int
+\&\-Wimplicit\-function\-declaration
+\&\-Wcomment
+\&\-Wformat
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)
+\&\fB\-Wmaybe\-uninitialized
+\&\-Wmissing\-braces
+\&\-Wnonnull
+\&\-Wparentheses
+\&\-Wpointer\-sign
+\&\-Wreorder
+\&\-Wreturn\-type
+\&\-Wripa\-opt\-mismatch
+\&\-Wsequence\-point
+\&\-Wsign\-compare\fR (only in \*(C+)
+\&\fB\-Wstrict\-aliasing
+\&\-Wstrict\-overflow=1
+\&\-Wswitch
+\&\-Wtrigraphs
+\&\-Wuninitialized
+\&\-Wunknown\-pragmas
+\&\-Wunused\-function
+\&\-Wunused\-label
+\&\-Wunused\-value
+\&\-Wunused\-variable
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR. Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR. The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered
+\&\-Wempty\-body
+\&\-Wignored\-qualifiers
+\&\-Wmissing\-field\-initializers
+\&\-Wmissing\-parameter\-type\fR (C only)
+\&\fB\-Wold\-style\-declaration\fR (C only)
+\&\fB\-Woverride\-init
+\&\-Wsign\-compare
+\&\-Wtype\-limits
+\&\-Wuninitialized
+\&\-Wmaybe\-uninitialized
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) \fB \fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "\(bu" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "\(bu" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "\(bu" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "\(bu" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense. This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions. Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations. However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems. At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
+string came from untrusted input and contains \fB\f(CB%n\fB\fR. (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C, \*(C+, Objective-C, and Objective\-\*(C+ only)" 4
+.IX Item "-Wnonnull (C, , Objective-C, and Objective- only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\& int f()
+\& {
+\& int i = i;
+\& return i;
+\& }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR" 4
+.IX Item "-Wimplicit"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR. For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types. This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed. In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\& int a[2][2] = { 0, 1, 2, 3 };
+\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
+such a case:
+.Sp
+.Vb 7
+\& {
+\& if (a)
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose. When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified. To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would
+look like this:
+.Sp
+.Vb 9
+\& {
+\& if (a)
+\& {
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+\& }
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it. These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified. All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified. However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect. Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R". If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wself\-assign\fR" 4
+.IX Item "-Wself-assign"
+Warn about self-assignment and self-initialization. This warning is intended
+for detecting accidental self-assignment due to typos, and therefore does
+not warn on a statement that is semantically a self-assignment after
+constant folding. Here is an example of what will trigger a self-assign
+warning and what will not:
+.Sp
+.Vb 6
+\& void func()
+\& {
+\& int i = 2;
+\& int x = x; /* warn */
+\& float f = 5.0;
+\& double a[3];
+\&
+\& i = i + 0; /* not warn */
+\& f = f / 1; /* not warn */
+\& a[1] = a[1]; /* warn */
+\& i += 0; /* not warn */
+\& }
+.Ve
+.Sp
+In \*(C+ it will not warn on self-assignment of non-POD variables unless
+\&\fB\-Wself\-assign\-non\-pod\fR is also enabled.
+.IP "\fB\-Wself\-assign\-non\-pod\fR" 4
+.IX Item "-Wself-assign-non-pod"
+Warn about self-assignment of non-POD variables. This is a \*(C+\-specific
+warning and only effective when \fB\-Wself\-assign\fR is enabled.
+.Sp
+There are cases where self-assignment might be intentional. For example,
+a \*(C+ programmer might write code to test whether an overloaded
+\&\f(CW\*(C`operator=\*(C'\fR works when the same object is assigned to itself.
+One way to work around the self-assign warning in such cases when this flag
+is enabled is using the functional form \f(CW\*(C`object.operator=(object)\*(C'\fR
+instead of the assignment form \f(CW\*(C`object = object\*(C'\fR, as shown in the
+following example.
+.Sp
+.Vb 3
+\& void test_func()
+\& {
+\& MyType t;
+\&
+\& t.operator=(t); // not warn
+\& t = t; // warn
+\& }
+.Ve
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with a
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified. The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wripa\-opt\-mismatch\fR" 4
+.IX Item "-Wripa-opt-mismatch"
+When doing an \s-1FDO\s0 build with \fB\-fprofile\-use\fR and \fB\-fripa\fR,
+warn if importing an axuiliary module that was built with a different
+\&\s-1GCC\s0 command line during the profile-generate phase than the primary
+module.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used. These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+Note that a classic way to avoid \fB\-Wunused\-variable\fR warning is
+using \f(CW\*(C`x = x\*(C'\fR, but that does not work with \fB\-Wself\-assign\fR.
+Use \f(CW\*(C`(void) x\*(C'\fR or \f(CW\*(C`static_cast<void>(x)\*(C'\fR instead.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole. They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.IP "\fB\-Wmaybe\-uninitialized\fR" 4
+.IX Item "-Wmaybe-uninitialized"
+For an automatic variable, if there exists a path from the function
+entry to a use of the variable that is initialized, but there exist
+some other paths the variable is not initialized, the compiler will
+emit a warning if it can not prove the uninitialized paths do not
+happen at runtime. These warnings are made optional because \s-1GCC\s0 is
+not smart enough to see all the reasons why the code might be correct
+despite appearing to have an error. Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\& {
+\& int x;
+\& switch (y)
+\& {
+\& case 1: x = 1;
+\& break;
+\& case 2: x = 4;
+\& break;
+\& case 3: x = 5;
+\& }
+\& foo (x);
+\& }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
+warning, the user needs to provide a default case with \fIassert\fR\|(0) or
+similar code.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code. As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files. This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas. See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization. The warning does not catch all
+cases, but does attempt to catch the more common pitfalls. It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives. However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced. Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken. Warns about
+incomplete types. Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common punn+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur. Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization. Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur. Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem. To help focus on important issues, several
+warning levels are defined. No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid. For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR. This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified. For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \-O2 and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero. Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read. Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code. However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers. If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem). In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "\(bu" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "\(bu" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line. Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line. It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them. Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "\(bu" 4
+A function-like macro that appears without arguments.
+.IP "\(bu" 4
+The unary plus operator.
+.IP "\(bu" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
+constants.) Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "\(bu" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "\(bu" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "\(bu" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "\(bu" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type. This warning is only issued if
+the base of the constant is ten. I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "\(bu" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "\(bu" 4
+Initialization of automatic aggregates.
+.IP "\(bu" 4
+Identifier conflicts with labels. Traditional C lacks a separate
+namespace for labels.
+.IP "\(bu" 4
+Initialization of unions. If the initializer is zero, the warning is
+omitted. This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "\(bu" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa. The absence of these prototypes when compiling with traditional
+C would cause serious problems. This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "\(bu" 4
+Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype. This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block. This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable shadows another local variable, parameter or
+global variable or whenever a built-in function is shadowed.
+.IP "\fB\-Wshadow\-local\fR" 4
+.IX Item "-Wshadow-local"
+Warn when a local variable shadows another local variable or parameter.
+.IP "\fB\-Wshadow\-compatible\-local\fR" 4
+.IX Item "-Wshadow-compatible-local"
+Warn when a local variable shadows another local variable or parameter
+whose type is compatible with that of the shadowing variable. In \*(C+,
+type compatibility here means the type of the shadowing variable can be
+converted to that of the shadowed variable. The creation of this flag
+(in addition to \fB\-Wshadow\-local\fR) is based on the idea that when
+a local variable shadows another one of incompatible type, it is most
+likely intentional, not a bug or typo, as shown in the following example:
+.Sp
+.Vb 8
+\& for (SomeIterator i = SomeObj.begin(); i != SomeObj.end(); ++i)
+\& {
+\& for (int i = 0; i < N; ++i)
+\& {
+\& ...
+\& }
+\& ...
+\& }
+.Ve
+.Sp
+Since the two variable \f(CW\*(C`i\*(C'\fR in the example above have incompatible types,
+enabling only \fB\-Wshadow\-compatible\-local\fR will not emit a warning.
+Because their types are incompatible, if a programmer accidentally uses one
+in place of the other, type checking will catch that and emit an error or
+warning. So not warning (about shadowing) in this case will not lead to
+undetected bugs. Use of this flag instead of \fB\-Wshadow\-local\fR can
+possibly reduce the number of warnings triggered by intentional shadowing.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning. In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices. With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions. In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR. This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions. For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR. This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning. These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR. This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR. Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types; confusing overload resolution for user-defined conversions; and
+conversions that will never use a type conversion operator:
+conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a reference
+to them. Warnings about conversions between signed and unsigned
+integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wconversion\-null\fR" 4
+.IX Item "-Wconversion-null"
+Warn about peculiar, but valid, conversions from/to \f(CW\*(C`NULL\*(C'\fR.
+This includes converting \f(CW\*(C`NULL\*(C'\fR to non-pointer type and
+converting the boolean value \f(CW\*(C`false\*(C'\fR to \f(CW\*(C`NULL\*(C'\fR. This warning
+is also enabled by \fB\-Wconversion\fR and only effective in \*(C+.
+.IP "\fB\-Wreal\-conversion\fR" 4
+.IX Item "-Wreal-conversion"
+Warn for implicit type conversions from real (\f(CW\*(C`double\*(C'\fR or \f(CW\*(C`float\*(C'\fR)
+to integral values.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wenum-compare ( and Objective- only)"
+Warn about a comparison between values of different enum types. This
+warning is enabled by default.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called. (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc. This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined. This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types. (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration. This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used. A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\& void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration. This warning is issued even if the definition itself
+provides a prototype. The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files. In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing. For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-noreturn\fR" 4
+.IX Item "-Wmissing-noreturn"
+Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
+Note these are only possible candidates, not absolute ones. Care should
+be taken to manually verify functions actually do not ever return before
+adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
+bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
+hosted C environments.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes. Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type. I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
+possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters. However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same. To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports. The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers. That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR. You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit. For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\& struct foo {
+\& int x;
+\& char a, b, c, d;
+\& } _\|_attribute_\|_((packed));
+\& struct bar {
+\& char z;
+\& struct foo f;
+\& };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR. This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout. \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\& struct foo
+\& {
+\& char a:4;
+\& char b:8;
+\& } _\|_attribute_\|_ ((packed));
+.Ve
+.Sp
+This warning is enabled by default. Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure. Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Wunreachable\-code\fR" 4
+.IX Item "-Wunreachable-code"
+Warn if the compiler detects that code will never be executed.
+.Sp
+This option is intended to warn when the compiler detects that at
+least a whole line of source code will never be executed, because
+some condition is never satisfied or because it is after a
+procedure that never returns.
+.Sp
+It is possible for this option to produce a warning even though there
+are circumstances under which part of the affected line can be executed,
+so care should be taken when removing apparently-unreachable code.
+.Sp
+For instance, when a function is inlined, a warning may mean that the
+line is unreachable in only one inlined copy of the function.
+.Sp
+This option is not made part of \fB\-Wall\fR because in a debugging
+version of a program there is often substantial code which checks
+correct functioning of the program and is, hopefully, unreachable
+because the program does work. Another common use of unreachable
+code is to provide behavior which is selectable at compile-time.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function. For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function. Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined. In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.) This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-int-to-pointer-cast (C and Objective-C only)"
+Suppress warnings from casts to pointer type of an integer of a
+different size.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used. This is default. To inhibit
+the warning messages, use \fB\-Wno\-long\-long\fR. Flags
+\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
+only when \fB\-pedantic\fR flag is used.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile. The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled. This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively. Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C. It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active. It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard. Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
+C99, it was raised to 4095. \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.SS "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program. If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output. This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0. This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-2\fR" 4
+.IX Item "-gdwarf-2"
+Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
+supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
+option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
+version 3 is upward compatible with version 2, but may still cause
+problems for older debuggers.
+.IP "\fB\-gdwarf\-4\fR" 4
+.IX Item "-gdwarf-4"
+Produce debugging information in \s-1DWARF\s0 version 4 format (if that is
+supported). With this option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 4
+when they are useful, including the placement of most type information
+in separate comdat sections. The \s-1DWARF\s0 version 4 format is still a
+draft specification, and this option is currently experimental.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR. On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+This option currently disables only the output of discriminator information
+in line number tables when not using \s-1DWARF\s0 version 4.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information. The default level is 2.
+.Sp
+Level 0 produces no debug information at all. Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug. This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program. Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing. That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF2\s0.
+.IP "\fB\-gmlt\fR" 4
+.IX Item "-gmlt"
+Produce a minimal line table, with level 1 debugging information plus
+information about inlined functions and line numbers.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol. This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax
+[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files. Merging is
+not supported by all assemblers or linkers. Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time. Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented. During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns. When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file. In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking). See the documentation for those options for more details.
+.RS 4
+.IP "\(bu" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options. For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option. You do not need to profile
+every source file in a program.
+.IP "\(bu" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "\(bu" 4
+Run the program on a representative workload to generate the arc profile
+information. This may be repeated any number of times. You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated. Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "\(bu" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "\(bu" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed. When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage. Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data. Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upperbound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upperbound. \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upperbound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upperbound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upperbound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR. This is used for debugging the RTL-based passes of the
+compiler. The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file. \fIdumpname\fR is
+generated from the name of the output file, if explicitly specified
+and it is not an executable, otherwise it is the basename of the
+source file. These switches may have different effects when
+\&\fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR. Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery. This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling. This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers. This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dm\fR" 4
+.IX Item "-dm"
+Print statistics on memory usage, at the end of the run, to
+standard error.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used. The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+Dump debugging information during parsing, to standard error.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output. This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file. The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file. The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file. If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+.PD 0
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-ipa-switch-options"
+.PD
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR controls the details
+of the dump as described for the \fB\-fdump\-tree\fR options. The
+following dumps are possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file. The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file. If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them. The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump. Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored. The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node. Usually this is not meaningful as it
+changes according to the environment and source file. Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path. When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree. By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dump the call graph of the compilation unit to a file in \s-1VCG\s0 format. The file
+name is made by appending \fI.cgraph.vcg\fR to the respective dump file name.
+This is primarily useful with \fB\-fdump\-ipa\fR.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file. The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file. The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
+file name is made by appending \fI.vcg\fR to the source file name. Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0. You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers. The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file. The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function. The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0. The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after STORE-CCP. The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination. The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination. The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation. The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy-propagation. The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination. The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation. The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates. The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking. The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations. The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination. The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables. The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization. The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees. The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops. The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner-most, single-bb, single\-entry/exit loops. This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If \fIn\fR=3, alignment related information is added to the reports.
+If \fIn\fR=4, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control-flow).
+If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
+For \fIn\fR=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers. It is used to generate certain symbol names
+that have to be different in every compiled file. It is also used to
+place unique stamps in coverage data files and the object files that
+produce them. You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints. This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched\fR or \fI.sched2\fR
+respectively. However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info. For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file. Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.IP "\fB\-time\fR" 4
+.IX Item "-time"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence. For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done). The output looks like this:
+.Sp
+.Vb 2
+\& # cc1 0.12 0.01
+\& # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself. The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else. With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line. This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them. The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@} instead of the
+\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
+ease shell-processing.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR. You can do
+.Sp
+.Vb 1
+\& gcc \-nostdlib <files>... \`gcc \-print\-libgcc\-file\-name\`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation. This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options. If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else. (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit. Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared). More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.SS "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results. Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program. Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag. Only
+optimizations that have a flag are listed.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize. Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec
+\&\-fcprop\-registers
+\&\-fdce
+\&\-fdefer\-pop
+\&\-fdelayed\-branch
+\&\-fdse
+\&\-fguess\-branch\-probability
+\&\-fif\-conversion2
+\&\-fif\-conversion
+\&\-finline\-small\-functions
+\&\-fipa\-pure\-const
+\&\-fipa\-reference
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types
+\&\-ftree\-builtin\-call\-dce
+\&\-ftree\-ccp
+\&\-ftree\-ch
+\&\-ftree\-copyrename
+\&\-ftree\-dce
+\&\-ftree\-dominator\-opts
+\&\-ftree\-dse
+\&\-ftree\-fre
+\&\-ftree\-sra
+\&\-ftree\-ter
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps
+\&\-falign\-functions \-falign\-jumps
+\&\-falign\-loops \-falign\-labels
+\&\-fcaller\-saves
+\&\-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
+\&\-fdelete\-null\-pointer\-checks
+\&\-fexpensive\-optimizations
+\&\-fgcse \-fgcse\-lm
+\&\-findirect\-inlining
+\&\-foptimize\-sibling\-calls
+\&\-fpeephole2
+\&\-fregmove
+\&\-freorder\-blocks \-freorder\-functions
+\&\-frerun\-cse\-after\-loop
+\&\-fsched\-interblock \-fsched\-spec
+\&\-fschedule\-insns \-fschedule\-insns2
+\&\-fstrict\-aliasing \-fstrict\-overflow
+\&\-ftree\-switch\-conversion
+\&\-ftree\-pre
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more. \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR and \fB\-ftree\-vectorize\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results. This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size. It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
+\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
+\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags. Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use. You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations. They are either
+activated by \fB\-O\fR options or are related to ones that are. You
+can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only). Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns. For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0. The pass tries to combine two
+instructions and checks if the result can be simplified. If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O2\fR,
+\&\fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one. This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions. \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist. The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller). The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining. This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers. The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
+allows coarse control of this limit. \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size. In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers. This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C89. In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR. In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types. Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass. This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed. By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis. This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0. This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section. E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests. Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors. The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi-threaded. Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads. This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found. If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently. This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path. For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks. When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves. This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination. This pass will attempt to move
+stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite. This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
+resulting code may or may not perform better than without cross-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this. Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents. This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics. The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Use global dataflow analysis to identify and eliminate useless checks
+for null pointers. The compiler assumes that dereferencing a null
+pointer would have halted the program. If a pointer is checked after
+it has already been dereferenced, it cannot be null.
+.Sp
+In some environments, this assumption is not true, and programs can
+safely dereference null pointers. Use
+\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying. This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator. The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR. The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring. The second
+algorithm can be unimplemented for some architectures. If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator. The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR. The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-coalesce\fR" 4
+.IX Item "-fira-coalesce"
+Do optimistic register coalescing. This option might be profitable for
+architectures with big regular register files.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call. Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo-registers. Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be. Default value is 5. If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable. This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done. This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm. Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules. This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched2\-use\-traces\fR" 4
+.IX Item "-fsched2-use-traces"
+Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
+allocation and additionally perform code duplication in order to increase the
+size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
+trace formation.
+.Sp
+This mode should produce faster but significantly longer programs. Also
+without \fB\-fbranch\-probabilities\fR the traces constructed may not
+match the reality and hurt the performance. This only makes
+sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsee\fR" 4
+.IX Item "-fsee"
+Eliminate redundant sign extension instructions and move the non-redundant
+ones to optimal placement using lazy code motion (\s-1LCM\s0).
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls. Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage. The compiler will attempt to use less
+stack space, even if that makes the program slower. This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees. This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees. The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees. This pass eliminates unnecessary
+copy operations. This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality. This transformation is
+affective for programs containing arrays of structures. Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics). Require \fB\-fipa\-type\-escape\fR
+to provide the safety of this transformation. It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR and \fB\-combine\fR to be
+enabled. Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis. This option is experimental
+and does not affect generated code.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace a m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion on trees. This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array. This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free. This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal. This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees. A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads. In this case the earlier store can be deleted. This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees. This is beneficial since it increases
+effectiveness of code motion optimizations. It also saves one jump. This flag
+is enabled by default at \fB\-O\fR and higher. It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-lr\-shrinking\fR" 4
+.IX Item "-ftree-lr-shrinking"
+Enable live range shrinking optimization on trees. This optimization is used
+to help reducing register pressure.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform linear loop transformations on tree. This flag can improve cache
+performance and allow further loop optimizations to take place.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops. Interchanging two
+nested loops switches the inner and outer loops. For example, given a
+loop like:
+.Sp
+.Vb 5
+\& DO J = 1, M
+\& DO I = 1, N
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss. This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran. To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops. Strip mining
+splits a loop into two nested loops. The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip. For example, given a loop like:
+.Sp
+.Vb 3
+\& DO I = 1, N
+\& A(I) = A(I) + C
+\& ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO II = 1, N, 4
+\& DO I = II, min (II + 3, N)
+\& A(I) = A(I) + C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran. To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops. Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches. For example, given a loop like:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\& DO II = 1, N, 64
+\& DO JJ = 1, M, 64
+\& DO I = II, min (II + 63, N)
+\& DO J = JJ, min (JJ + 63, M)
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches. This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran. To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers. This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution. This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place. For example, the loop
+.Sp
+.Vb 4
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& ENDDO
+\& DO I = 1, N
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees. This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching. The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis. Later
+optimizations then may determine the number easily. Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered. The optimization is only
+profitable on multiprocessor machines, for loops that are CPU-intensive,
+rather than constrained e.g. by memory bandwidth. This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates. This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early. This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees. This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables. This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
+use/single def temporaries are replaced at their use location with their
+defining expression. This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees. When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed. This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees. This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated. This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks. This is
+enabled by default at \fB\-O2\fR and higher. Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration. This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect. However in cases the loop body is more complicated than
+a single basic block, this is not reliable. It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations. The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
+heuristics are based on the control flow graph. If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account. The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality. This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective. See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled. For C (and \*(C+), this activates
+optimizations based on the type of expressions. In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same. For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\& union a_union {
+\& int i;
+\& double d;
+\& };
+\&
+\& int f() {
+\& union a_union t;
+\& t.d = 3.0;
+\& return t.i;
+\& }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type-punning\*(R") is common. Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type. So, the code above will work as
+expected. However, this code might not:
+.Sp
+.Vb 7
+\& int f() {
+\& union a_union t;
+\& int* ip;
+\& t.d = 3.0;
+\& ip = &t.i;
+\& return *ip;
+\& }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\& int f() {
+\& double d = 3.0;
+\& return ((union a_union *) &d)\->i;
+\& }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled. For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen. This
+permits various optimizations. For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic. When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps. When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers. With \fB\-fwrapv\fR certain types of overflow are
+permitted. For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR. The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements. Output them in the same order that they appear in the
+input file. When this option is used, unreferenced static variables
+will not be removed. This option is intended to support existing code
+which relies on a particular ordering. For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR. When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register. This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents whole program being
+compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in a affect gets more aggressively optimized by interprocedural optimizers.
+While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of single file, in combination with option
+\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
+programs since the functions and variables become local for the whole combined
+compilation unit, not for the single source file itself.
+.Sp
+This option is not supported for Fortran programs.
+.IP "\fB\-fuse\-ld=gold\fR" 4
+.IX Item "-fuse-ld=gold"
+Use the \fBld.gold\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both\fR or \fB\-\-enable\-gold=both/ld\fR.
+.IP "\fB\-fuse\-ld=bfd\fR" 4
+.IX Item "-fuse-ld=bfd"
+Use the \fBld.bfd\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both/gold\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR
+thus the profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization. You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-generate\-sampling\fR" 4
+.IX Item "-fprofile-generate-sampling"
+Enable sampling for instrumented binaries. Instead of recording every event,
+record only every N\-th event, where N (the sampling rate) can be set either
+at compile time using
+\&\fB\-\-param profile\-generate\-sampling\-rate=\fR\fIvalue\fR, or
+at execution start time through environment variable \fB\s-1GCOV_SAMPLING_RATE\s0\fR.
+.Sp
+At this time sampling applies only to branch counters. A sampling rate of 100
+decreases instrumentated binary slowdown from up to 20x for heavily threaded
+applications down to around 2x. \fB\-fprofile\-correction\fR is always
+needed with sampling.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code. This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR. Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fpmu\-profile\-generate=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-generate=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling. This collects
+hardware counter data corresponding to \fIpmuoption\fR. Currently
+only \fIload-latency\fR and \fIbranch-mispredict\fR are supported
+using pfmon tool. You must use \fB\-fpmu\-profile\-generate\fR both
+when compiling and when linking your program. This \s-1PMU\s0 profile data
+may later be used by the compiler during optimizations as well can be
+displayed using coverage tool gcov. The params variable
+\&\*(L"pmu_profile_n_addresses\*(R" can be used to restrict \s-1PMU\s0 data collection
+to only this many addresses.
+.IP "\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-use=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling based
+optimizations. Currently only \fIload-latency\fR and
+\&\fIbranch-mispredict\fR are supported.
+.IP "\fB\-fcgraph\-section\fR" 4
+.IX Item "-fcgraph-section"
+Emit call graph edge profile counts in .note.callgraph.text sections. This is
+used in conjunction with \fB\-fprofile\-use\fR. A new .note.callgraph.text
+section is created for each function. This section lists every callee and the
+number of times it is called. The params variable
+\&\*(L"note-cgraph-section-edge-threshold\*(R" can be used to only list edges above a
+certain threshold.
+.IP "\fB\-fripa\fR" 4
+.IX Item "-fripa"
+Perform dynamic inter-procedural analysis. This is used in conjunction with
+the \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR options.
+During the \fB\-fprofile\-generate\fR phase, this flag turns on some additional
+instrumentation code that enables dynamic call-graph analysis.
+During the \fB\-fprofile\-use\fR phase, this flag enables cross-module
+optimizations such as inlining.
+.IP "\fB\-fripa\-disallow\-asm\-modules\fR" 4
+.IX Item "-fripa-disallow-asm-modules"
+During profile-gen, if this flag is enabled, and the module has asm statements,
+arrange so that a bit recording this information will be set in the profile
+feedback data file.
+During profile-use, if this flag is enabled, and the same bit in auxiliary
+module's profile feedback data is set, don't import this auxiliary module.
+If this is the primary module, don't export it.
+.IP "\fB\-fripa\-disallow\-opt\-mismatch\fR" 4
+.IX Item "-fripa-disallow-opt-mismatch"
+Don't import an auxiliary module, if the \s-1GCC\s0 command line options used for this
+auxiliary module during the profile-generate stage were different from those used
+for the primary module. Note that any mismatches in warning-related options are
+ignored for this comparison.
+.IP "\fB\-fripa\-verbose\fR" 4
+.IX Item "-fripa-verbose"
+Enable printing of verbose information about dynamic inter-procedural optimizations.
+This is used in conjunction with the \fB\-fripa\fR.
+.IP "\fB\-fripa\-no\-promote\-always\-inline\-func\fR" 4
+.IX Item "-fripa-no-promote-always-inline-func"
+Do not promote static functions with always inline attribute in \s-1LIPO\s0 compilation.
+.IP "\fB\-fsample\-profile\fR" 4
+.IX Item "-fsample-profile"
+.PD 0
+.IP "\fB\-fsample\-profile=\fR\fIpath\fR" 4
+.IX Item "-fsample-profile=path"
+.PD
+Enable profile feedback directed optimizations using profiles obtained
+via sampling, and optimizations generally profitable only with profile
+feedback available.
+.IP "\fB\-fsample\-profile\-use\-entry\fR" 4
+.IX Item "-fsample-profile-use-entry"
+Use the entry count to annotate the entry basic block. This will improve the
+profile precision for \s-1LBR\s0 based sampling.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fB\-fsample\-profile\-aggregate\-using=\fR\fImethod\fR" 4
+.IX Item "-fsample-profile-aggregate-using=method"
+Select the method for (average or maximum) for converting
+instruction-level profiles into basic block level profiles.
+.IP "\fB\-frecord\-options\-in\-elf\fR" 4
+.IX Item "-frecord-options-in-elf"
+Record the command line options in the .note elf section for sample \s-1FDO\s0 to
+do module grouping.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic. These options trade off between speed and
+correctness. All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
+x86 architecture. For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point. Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt. A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards. When used at link-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result. \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR. May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect. Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations. For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination. Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero. \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps. These traps include division by zero, overflow,
+underflow, inexact result and invalid operation. This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect. Setting this option may
+allow faster code if one relies on \*(L"non-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior. This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations. This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode. This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations. Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division. Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case. The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules. Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options. This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken. When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file. The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization. Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
+notes to instructions for their later usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-ffvpt\fR" 4
+.IX Item "-ffvpt"
+If combined with \fB\-fvpt and \-ffvpt_functions\fR, it instructs the
+compiler to add a code to gather information about math library calls.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of function calls
+using precalculated values of common inputs.
+.IP "\fB\-ffvpt\-functions=\fR\fIffvptfunctions\fR" 4
+.IX Item "-ffvpt-functions=ffvptfunctions"
+This options takes a comma separated list of math functions to be
+profiled/optimized by \fB\-ffvpt\fR. The special name \*(L"all\*(R" can be
+used to specify all supported math functions. Currently, exp, log,
+pow, and sqrt are supported.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations). This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback). It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections. The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space. Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so. When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks. This is done by adding a guard variable to functions with
+vulnerable objects. This includes functions that call alloca, and
+functions with buffers larger than 8 bytes. The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-stack\-protector\fR
+or \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR or
+\&\fB\-fstack\-protector\fR are found.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\& static int a, b, c;
+\& int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\& int foo (void)
+\& {
+\& register int *xr = &x;
+\& return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
+\& }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done. For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions. You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer. The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBsra-max-structure-size\fR" 4
+.IX Item "sra-max-structure-size"
+The maximum structure size, in bytes, at which the scalar replacement
+of aggregates (\s-1SRA\s0) optimization will perform block copies. The
+default value, 0, implies that \s-1GCC\s0 will select the most appropriate
+size itself.
+.IP "\fBsra-field-structure-ratio\fR" 4
+.IX Item "sra-field-structure-ratio"
+The threshold ratio (as a percentage) between instantiated fields and
+the complete structure size. We say that if the ratio of the number
+of bytes in instantiated fields to the number of bytes in the complete
+structure exceeds this parameter, then block copies are not used. The
+default is 75.
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program. This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-cost-outcome\fR" 4
+.IX Item "predictable-branch-cost-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block. Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them. This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched. The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping. The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto. To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible. Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored. The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot. If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching. Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information. Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time. This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization. If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-passes\fR" 4
+.IX Item "max-gcse-passes"
+The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over. Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining. This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 450.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated. To those functions, a different
+(potentially more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 450.
+.IP "\fBinline-limit-increase-with-profile\fR" 4
+.IX Item "inline-limit-increase-with-profile"
+When profile information is available, such as when compiling
+with \fB\-fprofile\-use\fR, the maximum function size
+limits \fB\-\-param max-inline-insns-single\fR
+and \fB\-\-param max-inline-insns-auto\fR are increased by this percentage
+amount. Profile information increases the selectivity and quality of the
+inlining decisions, so having a larger set of candidate functions available
+for inlining can improve performance.
+The default value is 100.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions. For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit. Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time. If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane. For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size. Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation. The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames. While inlining the algorithm is trying
+to not grow past this limit too much. Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression. This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents). The default value is
+10.
+.IP "\fBmin-count-fraction-for-inline-cold\fR" 4
+.IX Item "min-count-fraction-for-inline-cold"
+Generally cold callsites are not candidates for inlining. However, if
+the callee contains hot code then inlining can propagate useful
+context to this hot region. This parameter, given as a fraction of
+the global maximum count, specifies the minimum expected count in the
+callee called from a cold callsite for the callsite to be considered
+for inlining, where the expected count in the callee from a callsite is
+the maximum count of any basic block in the callee times the callsite
+count divided by the callee count.
+.IP "\fBinline-call-cost\fR" 4
+.IX Item "inline-call-cost"
+Specify cost of call instruction relative to simple arithmetics operations
+(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
+functions and at the same time increases size of leaf function that is believed to
+reduce function size by being inlined. In effect it increases amount of
+inlining for code having large abstraction penalty (many functions that just
+pass the arguments to other functions) and decrease inlining for code with low
+abstraction penalty. The default value is 12.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used. The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization. The default value is 0.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+.PD 0
+.IP "\fBmax-completely-peeled-insns-feedback\fR" 4
+.IX Item "max-completely-peeled-insns-feedback"
+.PD
+The maximum number of insns of a completely peeled loop.
+.Sp
+The \fBmax-completely-peeled-insns-feedback\fR is used only when profile
+feedback is available and the loop is hot. Because of the real profiles, this
+value may set to be larger for hot loops.
+.IP "\fBmax-once-peeled-insns\fR" 4
+.IX Item "max-once-peeled-insns"
+.PD 0
+.IP "\fBmax-once-peeled-insns-feedback\fR" 4
+.IX Item "max-once-peeled-insns-feedback"
+.PD
+The maximum number of insns of a peeled loop that rolls only once.
+The \fBmax-once-peeled-insns-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value
+may set to be larger for hot loops.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+.PD 0
+.IP "\fBmax-completely-peel-times-feedback\fR" 4
+.IX Item "max-completely-peel-times-feedback"
+.PD
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.Sp
+The \fBmax-completely-peel-times-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value may
+set to be larger for hot loops.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations. Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert. The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver. The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver. The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints. The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically. This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown. We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10. This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered. This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available. The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage. This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without. The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers. The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBmax-aliased-vops\fR" 4
+.IX Item "max-aliased-vops"
+Maximum number of virtual operands per function allowed to represent
+aliases before triggering the alias partitioning heuristic. Alias
+partitioning reduces compile times and memory consumption needed for
+aliasing at the expense of precision loss in alias information. The
+default value for this parameter is 100 for \-O1, 500 for \-O2 and 1000
+for \-O3.
+.Sp
+Notice that if a function contains more memory statements than the
+value of this parameter, it is not really possible to achieve this
+reduction. In this case, the compiler will use the number of memory
+statements as the value for \fBmax-aliased-vops\fR.
+.IP "\fBavg-aliased-vops\fR" 4
+.IX Item "avg-aliased-vops"
+Average number of virtual operands per statement allowed to represent
+aliases before triggering the alias partitioning heuristic. This
+works in conjunction with \fBmax-aliased-vops\fR. If a function
+contains more than \fBmax-aliased-vops\fR virtual operators, then
+memory symbols will be grouped into memory partitions until either the
+total number of virtual operators is below \fBmax-aliased-vops\fR
+or the average number of virtual operators per memory statement is
+below \fBavg-aliased-vops\fR. The default value for this parameter
+is 1 for \-O1 and \-O2, and 3 for \-O3.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used. Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity. This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage. The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used. Setting this parameter
+very large effectively disables garbage collection. Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination. Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler. The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler. The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling. The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations. The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling. It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling. This is the limit on the number of iterations
+through which the instruction may be pipelined. The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler. The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register. The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed. This sets the maximum
+value of a shared integer constant. The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio. The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis. The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes. The distance we prefetch ahead is proportional
+to this constant. Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop with an
+unknown trip count.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system. By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+. However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above. For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine. This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior. Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing. If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled. The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default. If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation. The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions. If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used. The
+algorithm do not use pseudo-register conflicts. The default value of
+the parameter is 2000.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops. Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them. The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBctrl-regpre\fR" 4
+.IX Item "ctrl-regpre"
+This is a switch to turn on live range shrinking optimization.
+.IP "\fBctrl-regpre-mode\fR" 4
+.IX Item "ctrl-regpre-mode"
+This is used as a control knob to enable different transformations in
+the live range shrinking phase. Values of 1, 2, and 4 are used to enable
+upward motion, downward motion, and tree reshaping transformations
+ respectively. The values can be bitwise ORed.
+.IP "\fBreg-pressure-min-bb-factor\fR" 4
+.IX Item "reg-pressure-min-bb-factor"
+A performance tuning knob to control register pressure. When the size
+(in the number of gimple statements) of a basic block in a loop is
+larger than the threshold specified by this parameter multiplied by the
+number of available registers, live range shrinking optimization is enabled.
+.IP "\fBreg-pressure-max-region\fR" 4
+.IX Item "reg-pressure-max-region"
+A parameter to control the maximal allowed region size for live range
+shrinking.
+.IP "\fBreg-pressure-min-tree\fR" 4
+.IX Item "reg-pressure-min-tree"
+The minimal size (number of leaves) of a tree to be reshaped in the Live
+Range Shrinking optimization.
+.IP "\fBmin-mcf-cancel-iters\fR" 4
+.IX Item "min-mcf-cancel-iters"
+The minimum number of iterations of negative cycle cancellation during
+\&\s-1MCF\s0 profile correction before early termination. This parameter is
+only useful when using \fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-mcf-high-confidence-cost-mult\fR" 4
+.IX Item "samplefdo-mcf-high-confidence-cost-mult"
+Multiply the cost used by \s-1MCF\s0 during profile correction by this factor
+for all input profile data that is determined to be high confidence.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-use-discrim\fR" 4
+.IX Item "samplefdo-use-discrim"
+When attributing samples to the \s-1CFG\s0, use discriminators to identify
+which \s-1CFG\s0 nodes correspond to which samples. This parameter is only
+useful when using \fB\-fsample\-profile\fR.
+.IP "\fBsamplefdo-large-block-thresh\fR" 4
+.IX Item "samplefdo-large-block-thresh"
+Consider a basic block large if it has more than this many gimple
+statements in it. If a block is large and has no profile samples
+attributed to it, it will be assigned a weight of 0 with high
+confidence. This parameter is only useful when using
+\&\fB\-fsample\-profile\fR.
+.IP "\fBmax-lipo-mem\fR" 4
+.IX Item "max-lipo-mem"
+When importing auxiliary modules during profile-use, check current
+memory consumption after parsing each auxiliary module. If it exceeds
+this limit (specified in kb), don't import any more auxiliary modules.
+Specifying a value of 0 means don't enforce this limit. This parameter
+is only useful when using \fB\-fprofile\-use\fR and \fB\-fripa\fR.
+.IP "\fBprofile-generate-sampling-rate\fR" 4
+.IX Item "profile-generate-sampling-rate"
+Set the sampling rate with \fB\-fprofile\-generate\-sampling\fR.
+.RE
+.RS 4
+.RE
+.SS "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor. If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas. However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor. You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+\&
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies. If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its filename. When
+\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
+loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0. It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location. The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters. For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them. See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\& Trigraph: ??( ??) ??< ??> ??= ??/ ??\*(Aq ??! ??\-
+\& Replacement: [ ] { } # \e ^ | ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.SS "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler. You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.SS "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file. They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library. (Object files are
+distinguished from libraries by the linker according to the file
+contents.) If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking. (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files. The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined. But if the file that is found is an
+ordinary object file, it is linked in the usual fashion. The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries. In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR or \fB\-pg\fR or \fB\-p\fR
+are found.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries. On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable. Not all systems support this option. For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version. The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries. In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default. Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default. This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object. Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script. This option is supported by most
+systems using the \s-1GNU\s0 linker. On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker. You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments. For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR. Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
+commas, it is split into multiple options at the commas. You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker. When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it. You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.SS "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files. This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories. However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that). If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored. The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker. They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor. In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed. If it is not found there, the two
+standard prefixes above are tried, and that is all. The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR. This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option. If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated. Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
+override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked. That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.SS "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
+\&\fI<machine>\-gcc\fR when cross-compiling, or
+\&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
+was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
+options that will switch to another cross-compiler or version.
+.IP "\fB\-b\fR \fImachine\fR" 4
+.IX Item "-b machine"
+The argument \fImachine\fR specifies the target machine for compilation.
+.Sp
+The value to use for \fImachine\fR is the same as was specified as the
+machine type when configuring \s-1GCC\s0 as a cross-compiler. For
+example, if a cross-compiler was configured with \fBconfigure
+arm-elf\fR, meaning to compile for an arm processor with elf binaries,
+then you would specify \fB\-b arm-elf\fR to run that cross compiler.
+Because there are other options beginning with \fB\-b\fR, the
+configuration must contain a hyphen, or \fB\-b\fR alone should be one
+argument followed by the configuration in the next argument.
+.IP "\fB\-V\fR \fIversion\fR" 4
+.IX Item "-V version"
+The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
+This is useful when multiple versions are installed. For example,
+\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
+.PP
+The \fB\-V\fR and \fB\-b\fR options work by running the
+\&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
+use them if you can just run that directly.
+.SS "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Earlier we discussed the standard option \fB\-b\fR which chooses among
+different installed compilers for completely different target
+machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
+.PP
+In addition, each of these target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none. A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode. This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the cpu to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics. This flag prevents code
+compiled for one cpu to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used. This option avoids
+generating these instructions. This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets. Without this option the two instruction sets cannot
+be reliably used inside one program. The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body. This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code. The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use. Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration. Note that
+the hard-float and soft-float ABIs are not link-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order. That is, a byte order of the form \fB32107654\fR. Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a8\fR, \fBcortex\-a9\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the cpu specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code. This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-d16\fR and
+\&\fBneon\fR. \fB\-mfp\fR and \fB\-mfpe\fR
+are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
+with older versions of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the \s-1COFF\s0
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls. The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls. The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive. Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function. The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations. This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co-processor. This option is not enabled by default, since the
+problem is only present in older Maverick implementations. The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue. The generated code is similar to this:
+.Sp
+.Vb 9
+\& t0
+\& .ascii "arm_poke_function_name", 0
+\& .align
+\& t1
+\& .word 0xff000000 + (t1 \- t0)
+\& arm_poke_function_name
+\& mov ip, sp
+\& stmfd sp!, {fp, ip, lr, pc}
+\& sub fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set. The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function. This allows these functions to be called from
+non-interworking code.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not. There is a small overhead in the cost
+of executing a function pointer if this option is enabled.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer. The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor. The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-msize\fR" 4
+.IX Item "-msize"
+Output instruction sizes to the asm file.
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
+.IP "\fB\-mno\-tablejump\fR" 4
+.IX Item "-mno-tablejump"
+Do not generate tablejump insns which sometimes increase code size.
+The option is now deprecated in favor of the equivalent
+\&\fB\-fno\-jump\-tables\fR
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer. This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
+and long long will be 4 bytes. Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor. Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor. Any workarounds available for the targeted silicon revision
+will be enabled. If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled. The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision. If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined. If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete. For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined. And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in. This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large. This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries. That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries. Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime. This has an effect on certain
+anomaly workarounds. For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions. The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies. This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code. This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model. The default is to
+arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code. Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library. Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch. The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory. The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR. This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used. For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode. The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable. This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch. Using this switch may require recompiling all
+other modules in a program, including system libraries. Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development. Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked. See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
+.IX Item "-allowable_client client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker. The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations. If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
+point standard. However, for full compliance, software assistance is
+required. This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option. Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting. The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode. Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode. A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect. The C library initializes this register for
+rounding towards plus infinity. Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise. This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision. This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision. The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision. The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant. You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions. If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader. Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros. Use of these macros does not allow
+optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions. This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register. This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR. With this option the data area
+is limited to just below 2GB. Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction. When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify. If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR. The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application. This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model. This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections. It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit. This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet. This option only has an effect when \s-1VLIW\s0 packing
+is enabled. It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code. It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code. Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library. This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library. This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default. When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode. This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine. Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner. This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers. If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes. This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers. This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries. This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine. The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker. Note this makes symbolic
+debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
+\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
+options are available under HP-UX and HI-UX.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
+building a shared library. It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld. The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links. It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences. This ensures that a call
+is always able to reach linker generated stubs. The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used. The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance. However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated. The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
+is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
+11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines. It also affects the operational behavior
+of the C library. Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl. There isn't an archive version of libdld.sl. Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic. On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case. The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under HP-UX. This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions. The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change. Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors. In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine. Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support. Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support. (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3dNOW!, enhanced 3dNOW!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR. The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR. The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise. Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips. See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387. Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective. For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once. This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR. Supported
+choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons. These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross-compilation. You must make your
+own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0. The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
+generating those instructions. This option is the default on FreeBSD,
+OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
+indicates that the target cpu will always have an \s-1FPU\s0 and so the
+instruction will not need emulation. As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible. So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section. This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning. This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR. You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments. By
+default, no registers are used to pass arguments, and at most 3
+registers can be used. You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries. This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values. You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries. This includes
+the system libraries and startup modules.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits. When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default. When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more. Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry. On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary. This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary. If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties. On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned. Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack. It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size. Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-msse5\fR" 4
+.IX Item "-msse5"
+.IP "\fB\-mno\-sse5\fR" 4
+.IX Item "-mno-sse5"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1SSE4A\s0, \s-1SSE5\s0, \s-1LWP\s0,
+\&\s-1ABM\s0 or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR. Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags. In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions. String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode. While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers. The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option. Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types. This is useful for high resolution counters that could be updated
+by multiple processors (or cores). This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005. \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments. These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library. Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing. \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention. Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0. The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows. On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0. You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default. In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue. This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2. The drawback is a notable
+increase in code size. This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR. Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations. This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary. This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-minline\-compares\fR" 4
+.IX Item "-minline-compares"
+This option enables \s-1GCC\s0 to inline calls to memcmp and strcmp. The
+inlined version does a byte-by-byte comparion using a repeat string
+operation prefix.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with. The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added. Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable automatic generation of fused floating point multiply-add instructions
+if the \s-1ISA\s0 supports such instructions. The \-mfused\-madd option is on by
+default. The fused multiply-add instructions have a different
+rounding behavior compared to executing a multiply followed by an add.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix. The option \fB\-mavx\fR turns this on by default.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code. The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
+Programs can be statically or dynamically linked. This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model. The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space. Small symbols are also placed there. Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB. Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target. This is the default for HP-UX.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target. This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register. The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers. This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section. This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value. This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self-relocatable. This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info. This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit. This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-mt\fR" 4
+.IX Item "-mt"
+.PD 0
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+.PD
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. It does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it. These are HP-UX specific flags.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits. These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ldc\fR" 4
+.IX Item "-msched-ldc"
+.PD 0
+.IP "\fB\-mno\-sched\-ldc\fR" 4
+.IX Item "-mno-sched-ldc"
+.PD
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-ldc\fR" 4
+.IX Item "-mno-sched-control-ldc"
+.PD 0
+.IP "\fB\-msched\-control\-ldc\fR" 4
+.IX Item "-msched-control-ldc"
+.PD
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
+.IX Item "-mno-sched-spec-verbose"
+.PD 0
+.IP "\fB\-msched\-spec\-verbose\fR" 4
+.IX Item "-msched-spec-verbose"
+.PD
+(Dis/En)able printing of the information about speculative motions.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O. You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation. These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers. Note that all modules in a program must
+be compiled with the same value for this option. Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R. This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area. Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections. The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops. This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache. The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture. Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR. ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target. The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR. The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51qe\fR : \fB51qe\fR" 4
+.IX Item "51qe : 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR. Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected. It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR. The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well. These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR. It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used. If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000. This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010. This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020. This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030. This is the default when the compiler is
+configured for 68030\-based systems. It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040. This is the default when the compiler is
+configured for 68040\-based systems. It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040. Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060. This is the default when the compiler is
+configured for 68060\-based systems. It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060. Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0. This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0. This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0. The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions. This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0. It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets. It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions. If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures. Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR). For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide. This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions. The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR. This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning. This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table. At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries. This code is
+larger and slower than code generated without this option. On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k. Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs. However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries. If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-nominmax\fR" 4
+.IX Item "-nominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction. (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation. Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much. The default
+value is 0x1000.
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR). Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option. The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above. In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR. Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations. The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR. By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions. This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump. \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide. You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR. This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers. For example, scalar
+floating-point values are returned in \fB\f(CB$f0\fB\fR only, not a
+\&\fB\f(CB$f0\fB\fR/\fB\f(CB$f1\fB\fR pair. The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries. This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker. However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects. Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations. This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR. For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR. The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k. Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs. If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions. When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs. You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively. \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR. It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+ This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0. This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes. \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C. \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR. You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section. If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition. If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option. However,
+you may wish to build a library that supports several different
+small data limits. You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR. \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR. For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data. This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections. This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so. This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections. This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators. This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction. Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code. The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0. They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions. \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR. At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch. It later aborts these instructions if the
+predicted outcome was wrong. However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads. As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted. If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data. See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted. \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround. It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\& void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively. \s-1GCC\s0 honors this
+restriction for functions it compiles itself. It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers. This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function. If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches). The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases. A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture. By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
+\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned. When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend. Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR. Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register. The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register. The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited. This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors. This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
+is the default.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors. Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses. This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory. This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0. This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive. This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive. This is the default.
+.IP "\fB\-msplit\fR" 4
+.IX Item "-msplit"
+Generate code for a system with split I&D.
+.IP "\fB\-mno\-split\fR" 4
+.IX Item "-mno-split"
+Generate code for a system without split I&D. This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax. This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR. Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type. Code
+generated with this option will run on any of the other \s-1AE\s0 types. The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type. This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0. Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register. Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used. However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code. These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type. The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations. This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support. This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other. However there is a
+large common subset of instructions supported by both. An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using. The default value of these options is
+determined when configuring \s-1GCC\s0. Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root. Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code. With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option. Unless you are building a cross-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
+\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
+\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBe300c2\fR, \fBe300c3\fR,
+\&\fBe500mc\fR, \fBec603e\fR, \fBG3\fR, \fBG4\fR, \fBG5\fR,
+\&\fBpower\fR, \fBpower2\fR, \fBpower3\fR, \fBpower4\fR,
+\&\fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR, \fBpower7\fR
+\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor. Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec \-mfprnd \-mhard\-float \-mmfcrf \-mmultiple
+\&\-mnew\-mnemonics \-mpopcntb \-mpower \-mpower2 \-mpowerpc64
+\&\-mpowerpc\-gpopt \-mpowerpc\-gfxopt \-msingle\-float \-mdouble\-float
+\&\-msimple\-fpu \-mstring \-mmulhw \-mdlmzb \-mmfpgpr\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities. If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mswdiv\fR" 4
+.IX Item "-mswdiv"
+.PD 0
+.IP "\fB\-mno\-swdiv\fR" 4
+.IX Item "-mno-swdiv"
+.PD
+Generate code to compute division as reciprocal estimate and iterative
+refinement, creating opportunities for increased throughput. This
+feature requires: optional PowerPC Graphics instruction set for single
+precision and \s-1FRE\s0 instruction for double precision, assuming divides
+cannot generate user-visible traps, and the domain values not include
+Infinities, denormals or zero denominator.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set. You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted. An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections. This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated. Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated. Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux). The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant. The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file. The \fB\-mfull\-toc\fR option is selected by
+default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program. \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0. However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
+or both of these options. Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead. This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space. You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs. Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double. Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization. Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
+application written to use message passing with special startup code to
+enable the application to run. The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location. The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit. Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions. These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves. These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location. These instructions are generated by default. If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary. This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating is used.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440 and 464 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440 and 464 processors. This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. If you
+use \fB\-mrelocatable\fR on any module, all objects linked together must
+be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. Modules
+compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
+compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
+with modules compiled with the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode. The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode. The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable. The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling. The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass. The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups. Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups. Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement. This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-solaris\fR" 4
+.IX Item "-mcall-solaris"
+On System V.4 and embedded PowerPC systems compile code for the Solaris
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped. Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments. With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area. The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option. The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section. Put small uninitialized global
+data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however. This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section. By default, \fInum\fR is 8. The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly. On these systems, long calls are unnecessary and
+generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
+addresses represent the callee and the \*(L"branch island\*(R". The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R". The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions. This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations. When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations. When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions. This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes. Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions. For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR. When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves. When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type. Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR. Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system. This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size. Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions which most probably cause
+a stack overflow. It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays. This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation. The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode. This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available. This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+Increase IEEE-compliance of floating-point code.
+At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
+When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
+comparisons of NANs / infinities incurs extra overhead in every
+floating point comparison, therefore the default is set to
+\&\fB\-ffinite\-math\-only\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write. This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed. Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse. This strategy allows
+cse and hoisting of the inverse calculation. Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends. inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR. This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode. The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap. This will generally generate better
+scheduled code, but is unsafe on current hardware. The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop. For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1. With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register. Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid. Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions. This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation. The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions. The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions. They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction. Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines. Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment. This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address. Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers. It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment. This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object. Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes. Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.Sp
+This option is only available on SunOS and Solaris.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
+\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\& v7: cypress
+\& v8: supersparc, hypersparc
+\& sparclite: f930, f934, sparclite86x
+\& sparclet: tsc701
+\& v9: ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture. This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips. With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular cpu implementation. Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register \f(CW%g4\fR points to the base of the data segment. Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references. This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+These switches are supported in addition to the above on Solaris:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations. By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation. \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed. Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change. Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory. With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches. A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits. With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance. \fIn\fR can be a value from 0 to 10. A
+smaller \fIn\fR will insert fewer nops. 10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR. Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint. A branch hint must
+be at least 8 instructions away from the branch it is effecting. \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting. By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function. The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers. The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible. At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler. This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1. The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E. The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e and v850e1 flavors of the v850 architecture. The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs). This option switches from the former to the latter. It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries. The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker. They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls. This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls. This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets. It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behaviour for Cygwin and MinGW targets.
+.IP "\fB\-mcygwin\fR" 4
+.IX Item "-mcygwin"
+This option is available for Cygwin targets. It specifies that
+the Cygwin internal interface is to be used for predefined
+preprocessor macros, C runtime libraries and related linker
+paths and options. For Cygwin targets this is the default behaviour.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mno\-cygwin\fR" 4
+.IX Item "-mno-cygwin"
+This option is available for Cygwin targets. It specifies that
+the MinGW internal interface is to be used instead of Cygwin's, by
+setting MinGW-related predefined macros and linker paths and default
+library options.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets. It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets. It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option. This has no effect if the
+floating-point option is not also enabled. Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations. This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR. Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools. The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file. This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size. With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references. This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density. The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions. If there are not enough preceding safe density
+instructions to align a target, no widening will be performed. The
+default is \fB\-mtarget\-align\fR. These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction. This
+translation typically occurs for calls to functions in other source
+files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR. This option should be used in
+programs where the call target can potentially be out of range. This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions. Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.SS "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
+one of the forms is listed\-\-\-the one which is not the default. You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range. This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation. This flag enables some optimizations
+and disables others. This option is enabled by default for the Java
+front-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling. Generates extra code needed to propagate
+exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution. If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it. However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+. You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere. Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions. It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine. The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers. This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target. If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler. In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target. This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory. This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable. This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text. This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine. Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0). The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system). If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table. This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR. The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR are found.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies. This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table. On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register. The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls. It may be allocated for temporaries or
+variables that do not live across a call. Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions. It may be allocated even for temporaries or variables that
+live across a call. Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes. When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions. Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site. (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\& void _\|_cyg_profile_func_enter (void *this_fn,
+\& void *call_site);
+\& void _\|_cyg_profile_func_exit (void *this_fn,
+\& void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions. The profiling calls will indicate where, conceptually, the
+inline function is entered and exited. This means that addressable
+versions of such functions must be available. If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size. If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided. (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done. This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR). If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented. The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys\*(C'\fR
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
+\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation. The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR). The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack. You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that. The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol. If the stack
+would grow beyond the value, a signal is raised. For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fargument\-alias\fR" 4
+.IX Item "-fargument-alias"
+.PD 0
+.IP "\fB\-fargument\-noalias\fR" 4
+.IX Item "-fargument-noalias"
+.IP "\fB\-fargument\-noalias\-global\fR" 4
+.IX Item "-fargument-noalias-global"
+.IP "\fB\-fargument\-noalias\-anything\fR" 4
+.IX Item "-fargument-noalias-anything"
+.PD
+Specify the possible relationships among parameters and between
+parameters and global data.
+.Sp
+\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
+alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
+each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
+alias each other and do not alias global storage.
+\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
+alias any other storage.
+.Sp
+Each language will automatically use whatever option is required by
+the language standard. You should not need to use these options yourself.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file. One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch. Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax. This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default ie; declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications. However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates. Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files. Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions. \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so. These locale categories can be set to any value supported by your
+installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification. \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable. If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler. No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files. For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler. One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work. On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against. Failing to supply the correct flags may lead
+to subtle defects. Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1
new file mode 100644
index 0000000..eb2e349
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcc.1
@@ -0,0 +1,15806 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+ [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+ [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+ [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+ [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+ [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+ [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking. The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage. For example, the \fB\-c\fR option
+says not to run the linker. Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing. Some options
+control the preprocessor and others the compiler itself. Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly. If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands. Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments. For the most part, the order
+you use doesn't matter. Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified. Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SS "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type. Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-no\-canonical\-prefixes
+\&\-pipe \-pass\-exit\-codes
+\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]] \fB\-\-target\-help
+\&\-\-version \-wrapper@\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
+\&\-aux\-info\fR \fIfilename\fR
+\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
+\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
+\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
+\&\-fallow\-single\-precision \-fcond\-mismatch \-flax\-vector\-conversions
+\&\-fsigned\-bitfields \-fsigned\-char
+\&\-funsigned\-bitfields \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
+\&\-fconserve\-space \-ffriend\-injection
+\&\-fno\-elide\-constructors
+\&\-fno\-enforce\-eh\-specs
+\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
+\&\-fno\-implicit\-templates
+\&\-fno\-implicit\-inline\-templates
+\&\-fno\-implement\-inlines \-fms\-extensions
+\&\-fno\-nonansi\-builtins \-fno\-operator\-names
+\&\-fno\-optional\-diags \-fpermissive
+\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
+\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
+\&\-fvisibility\-ms\-compat
+\&\-Wabi \-Wctor\-dtor\-privacy
+\&\-Wnon\-virtual\-dtor \-Wreorder
+\&\-Weffc++ \-Wstrict\-null\-sentinel
+\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
+\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
+\&\fB\-fgnu\-runtime \-fnext\-runtime
+\&\-fno\-nil\-receivers
+\&\-fobjc\-call\-cxx\-cdtors
+\&\-fobjc\-direct\-dispatch
+\&\-fobjc\-exceptions
+\&\-fobjc\-gc
+\&\-freplace\-objc\-classes
+\&\-fzero\-link
+\&\-gen\-decls
+\&\-Wassign\-intercept
+\&\-Wno\-protocol \-Wselector
+\&\-Wstrict\-selector\-match
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
+\&\fB\-fdiagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
+\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Warray\-bounds
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align \-Wcast\-qual
+\&\-Wchar\-subscripts \-Wclobbered \-Wcomment
+\&\-Wconversion \-Wcoverage\-mismatch \-Wno\-deprecated
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization
+\&\-Wno\-div\-by\-zero \-Wempty\-body \-Wenum\-compare \-Wno\-endif\-labels
+\&\-Werror \-Werror=*
+\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral
+\&\-Wformat\-security \-Wformat\-y2k
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wignored\-qualifiers
+\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
+\&\-Winit\-self \-Winline
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations
+\&\-Wlogical\-op \-Wlong\-long
+\&\-Wmain \-Wmaybe\-uninitialized \-Wmissing\-braces \-Wmissing\-field\-initializers
+\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
+\&\-Wmissing\-noreturn \-Wno\-mudflap
+\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow \-Wconversion\-null
+\&\-Woverlength\-strings \-Wpacked \-Wpacked\-bitfield\-compat \-Wpadded
+\&\-Wparentheses \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format
+\&\-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
+\&\-Wreal\-conversion \-Wredundant\-decls
+\&\-Wreturn\-type \-Wripa\-opt\-mismatch \-Wself\-assign \-Wself\-assign\-non\-pod
+\&\-Wsequence\-point \-Wshadow \-Wshadow\-compatible\-local \-Wshadow\-local
+\&\-Wsign\-compare \-Wsign\-conversion \-Wstack\-protector
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
+\&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum \-Wsync\-nand
+\&\-Wsystem\-headers \-Wtrigraphs \-Wtype\-limits \-Wundef \-Wuninitialized
+\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
+\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
+\&\-Wunused\-value \-Wunused\-variable
+\&\-Wvariadic\-macros \-Wvla
+\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
+\&\-Wmissing\-parameter\-type \-Wmissing\-prototypes \-Wnested\-externs
+\&\-Wold\-style\-declaration \-Wold\-style\-definition
+\&\-Wstrict\-prototypes \-Wtraditional \-Wtraditional\-conversion
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
+\&\-fdump\-statistics
+\&\-fdump\-tree\-all
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
+\&\-fdump\-tree\-ch
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
+\&\-fdump\-tree\-sink
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
+\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
+\&\-fenable\-icf\-debug
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose
+\&\-ftest\-coverage \-ftime\-report \-fvar\-tracking
+\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
+\&\-ggdb \-gmlt \-gstabs \-gstabs+ \-gstrict\-dwarf \-gno\-strict\-dwarf
+\&\-gvms \-gxcoff \-gxcoff+
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]
+\&\fB\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
+\&\-print\-multi\-directory \-print\-multi\-lib
+\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix
+\&\-save\-temps \-time\fR
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves
+\&\-fcgraph\-section \-fcheck\-data\-deps
+\&\-fconserve\-stack \-fcprop\-registers \-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules \-fcx\-limited\-range
+\&\-fdata\-sections \-fdce \-fdce
+\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fdse \-fdse
+\&\-fearly\-inlining \-fexpensive\-optimizations \-ffast\-math
+\&\-ffinite\-math\-only \-ffloat\-store \-fforward\-propagate
+\&\-ffunction\-sections \-ffvpt \-ffvpt\-functions=\fR\fIffvptfunctions\fR \fB\-fgcse
+\&\-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg \-fipa\-pta
+\&\-fipa\-pure\-const \-fipa\-reference \-fipa\-struct\-reorg
+\&\-fipa\-type\-escape \-fira\-algorithm=\fR\fIalgorithm\fR
+\&\fB\-fira\-region=\fR\fIregion\fR \fB\-fira\-coalesce \-fno\-ira\-share\-save\-slots
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts
+\&\-floop\-block \-floop\-interchange \-floop\-strip\-mine
+\&\-fmerge\-all\-constants \-fmerge\-constants \-fmodulo\-sched
+\&\-fmodulo\-sched\-allow\-regmoves \-fmove\-loop\-invariants \-fmudflap
+\&\-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg \-fno\-default\-inline
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls
+\&\-fpeel\-loops \-fpredictive\-commoning \-fprefetch\-loop\-arrays
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate
+\&\-fprofile\-generate=\fR\fIpath\fR \fB\-fprofile\-generate\-sampling
+\&\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values
+\&\-fpmu\-profile\-generate=\fR\fIpmuoption\fR
+\&\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR
+\&\fB\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops
+\&\-fripa \-fripa\-disallow\-asm\-modules \-fripa\-disallow\-opt\-mismatch
+\&\-fripa\-no\-promote\-always\-inline\-func \-fripa\-verbose
+\&\-frounding\-math \-fsample\-profile \-fsample\-profile\-aggregate\-using
+\&\-fsample\-profile\-use\-entry \-fsched2\-use\-superblocks
+\&\-fsched2\-use\-traces \-fsched\-spec\-load \-fsched\-spec\-load\-dangerous
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB]
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors \-fsee
+\&\-fselective\-scheduling \-fselective\-scheduling2
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop
+\&\-ftree\-copyrename \-ftree\-dce
+\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-fre \-ftree\-loop\-im
+\&\-ftree\-loop\-distribution
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize
+\&\-ftree\-lr\-shrinking
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-reassoc
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb
+\&\-fwhole\-program \-frecord\-options\-in\-elf \-fuse\-ld
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
+\&\fB\-C \-dD \-dI \-dM \-dN
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
+\&\-idirafter\fR \fIdir\fR
+\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
+\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
+\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
+\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
+\&\-P \-fworking\-directory \-remap
+\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
+\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
+\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
+\&\-T\fR \fIscript\fR \fB\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
+\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
+.IP "\fITarget Options\fR" 4
+.IX Item "Target Options"
+\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB \-EL
+\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
+\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame \-mno\-apcs\-frame
+\&\-mabi=\fR\fIname\fR
+\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
+\&\-mapcs\-float \-mno\-apcs\-float
+\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
+\&\-msched\-prolog \-mno\-sched\-prolog
+\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
+\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
+\&\-mthumb\-interwork \-mno\-thumb\-interwork
+\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
+\&\fB\-mabort\-on\-noreturn
+\&\-mlong\-calls \-mno\-long\-calls
+\&\-msingle\-pic\-base \-mno\-single\-pic\-base
+\&\-mpic\-register=\fR\fIreg\fR
+\&\fB\-mnop\-fun\-dllimport
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
+\&\-mpoke\-function\-name
+\&\-mthumb \-marm
+\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
+\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
+\&\-mtp=\fR\fIname\fR
+\&\fB\-mword\-relocations
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-mno\-interrupts
+\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]
+\&\fB\-msim \-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
+\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
+\&\-mlow\-64k \-mno\-low64k \-mstack\-check\-l1 \-mid\-shared\-library
+\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
+\&\fB\-mleaf\-id\-shared\-library \-mno\-leaf\-id\-shared\-library
+\&\-msep\-data \-mno\-sep\-data \-mlong\-calls \-mno\-long\-calls
+\&\-mfast\-fp \-minline\-plt \-mmulticore \-mcorea \-mcoreb \-msdram
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
+\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
+\&\-mstack\-align \-mdata\-align \-mconst\-align
+\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
+\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
+\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
+\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
+\&\-client_name \-compatibility_version \-current_version
+\&\-dead_strip
+\&\-dependency\-file \-dylib_file \-dylinker_install_name
+\&\-dynamic \-dynamiclib \-exported_symbols_list
+\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
+\&\-force_flat_namespace \-headerpad_max_install_names
+\&\-iframework
+\&\-image_base \-init \-install_name \-keep_private_externs
+\&\-multi_module \-multiply_defined \-multiply_defined_unused
+\&\-noall_load \-no_dead_strip_inits_and_terms
+\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
+\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
+\&\-private_bundle \-read_only_relocs \-sectalign
+\&\-sectobjectsymbols \-whyload \-seg1addr
+\&\-sectcreate \-sectobjectsymbols \-sectorder
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
+\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
+\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
+\&\-single_module \-static \-sub_library \-sub_umbrella
+\&\-twolevel_namespace \-umbrella \-undefined
+\&\-unexported_symbols_list \-weak_reference_mismatches
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
+\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
+\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
+\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
+\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mbwx \-mmax \-mfix \-mcix
+\&\-mfloat\-vax \-mfloat\-ieee
+\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
+\&\-msmall\-text \-mlarge\-text
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
+\&\-mhard\-float \-msoft\-float
+\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
+\&\-mdouble \-mno\-double
+\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
+\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
+\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
+\&\-mlibrary\-pic \-macc\-4 \-macc\-8
+\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
+\&\-moptimize\-membar \-mno\-optimize\-membar
+\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
+\&\-mvliw\-branch \-mno\-vliw\-branch
+\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
+\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
+\&\-mTLS \-mtls
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR
+\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
+\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
+\&\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
+\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
+\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
+\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
+\&\-mno\-portable\-runtime \-mno\-soft\-float
+\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
+\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
+\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
+\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mfpmath=\fR\fIunit\fR
+\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
+\&\-mno\-fp\-ret\-in\-387 \-msoft\-float
+\&\-mno\-wide\-multiply \-mrtd \-malign\-double
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mrecip
+\&\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx
+\&\-maes \-mpclmul
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-msse5 \-mlwp
+\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
+\&\-minline\-stringops\-dynamically \-minline\-compares
+\&\-mstringop\-strategy=\fR\fIalg\fR \fB\-mpush\-args \-maccumulate\-outgoing\-args
+\&\-m128bit\-long\-double \-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
+\&\-mveclibabi=\fR\fItype\fR \fB\-mpc32 \-mpc64 \-mpc80 \-mstackrealign
+\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR
+\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
+\&\fB\-mfused\-madd \-mno\-fused\-madd \-msse2avx\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
+\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
+\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
+\&\-minline\-float\-divide\-max\-throughput
+\&\-minline\-int\-divide\-min\-latency
+\&\-minline\-int\-divide\-max\-throughput
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
+\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
+\&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
+\&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
+\&\-mno\-sched\-prefer\-non\-data\-spec\-insns
+\&\-mno\-sched\-prefer\-non\-control\-spec\-insns
+\&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r
+\&\-mdebug
+\&\-malign\-loops \-mno\-align\-loops
+\&\-missue\-rate=\fR\fInumber\fR
+\&\fB\-mbranch\-cost=\fR\fInumber\fR
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
+\&\fB\-msdata=\fR\fIsdata-type\fR
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR \fB\-mcpu=\fR\fIcpu\fR \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
+\&\-m68060 \-mcpu32 \-m5200 \-m5206e \-m528x \-m5307 \-m5407
+\&\-mcfv4e \-mbitfield \-mno\-bitfield \-mc68000 \-mc68020
+\&\-mnobitfield \-mrtd \-mno\-rtd \-mdiv \-mno\-div \-mshort
+\&\-mno\-short \-mhard\-float \-m68881 \-msoft\-float \-mpcrel
+\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
+\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
+\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
+\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
+\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
+\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
+\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
+\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2
+\&\-mips64 \-mips64r2
+\&\-mips16 \-mno\-mips16 \-mflip\-mips16
+\&\-minterlink\-mips16 \-mno\-interlink\-mips16
+\&\-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
+\&\-mshared \-mno\-shared \-mplt \-mno\-plt \-mxgot \-mno\-xgot
+\&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
+\&\-msingle\-float \-mdouble\-float \-mdsp \-mno\-dsp \-mdspr2 \-mno\-dspr2
+\&\-mfpu=\fR\fIfpu-type\fR
+\&\fB\-msmartmips \-mno\-smartmips
+\&\-mpaired\-single \-mno\-paired\-single \-mdmx \-mno\-mdmx
+\&\-mips3d \-mno\-mips3d \-mmt \-mno\-mt \-mllsc \-mno\-llsc
+\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
+\&\-G\fR\fInum\fR \fB\-mlocal\-sdata \-mno\-local\-sdata
+\&\-mextern\-sdata \-mno\-extern\-sdata \-mgpopt \-mno\-gopt
+\&\-membedded\-data \-mno\-embedded\-data
+\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
+\&\-mcode\-readable=\fR\fIsetting\fR
+\&\fB\-msplit\-addresses \-mno\-split\-addresses
+\&\-mexplicit\-relocs \-mno\-explicit\-relocs
+\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
+\&\-mdivide\-traps \-mdivide\-breaks
+\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
+\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
+\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
+\&\-mfix\-r10000 \-mno\-fix\-r10000 \-mfix\-vr4120 \-mno\-fix\-vr4120
+\&\-mfix\-vr4130 \-mno\-fix\-vr4130 \-mfix\-sb1 \-mno\-fix\-sb1
+\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
+\&\-mbranch\-cost=\fR\fInum\fR \fB\-mbranch\-likely \-mno\-branch\-likely
+\&\-mfp\-exceptions \-mno\-fp\-exceptions
+\&\-mvr4130\-align \-mno\-vr4130\-align\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
+\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
+\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
+\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug \-mno\-mult\-bug
+\&\-mam33 \-mno\-am33
+\&\-mam33\-2 \-mno\-am33\-2
+\&\-mreturn\-pointer\-on\-d0
+\&\-mno\-crt0 \-mrelax\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
+\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
+\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
+\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
+\&\-mbranch\-expensive \-mbranch\-cheap
+\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
+\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
+\&\-maltivec \-mno\-altivec
+\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
+\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
+\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mnew\-mnemonics \-mold\-mnemonics
+\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
+\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
+\&\-malign\-power \-malign\-natural
+\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu
+\&\-mstring \-mno\-string \-mupdate \-mno\-update
+\&\-mavoid\-indexed\-addresses \-mno\-avoid\-indexed\-addresses
+\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
+\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
+\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
+\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
+\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
+\&\fB\-mcall\-sysv \-mcall\-netbsd
+\&\-maix\-struct\-return \-msvr4\-struct\-return
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
+\&\-misel \-mno\-isel
+\&\-misel=yes \-misel=no
+\&\-mspe \-mno\-spe
+\&\-mspe=yes \-mspe=no
+\&\-mpaired
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode
+\&\-mvrsave \-mno\-vrsave
+\&\-mmulhw \-mno\-mulhw
+\&\-mdlmzb \-mno\-dlmzb
+\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
+\&\-mprototype \-mno\-prototype
+\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
+\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
+\&\fB\-mhard\-float \-msoft\-float \-mhard\-dfp \-mno\-hard\-dfp
+\&\-mlong\-double\-64 \-mlong\-double\-128
+\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
+\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
+\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
+\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
+\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel
+\&\-mnhwloop
+\&\-muls
+\&\-mmac
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
+\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
+\&\-m5\-64media \-m5\-64media\-nofpu
+\&\-m5\-32media \-m5\-32media\-nofpu
+\&\-m5\-compact \-m5\-compact\-nofpu
+\&\-mb \-ml \-mdalign \-mrelax
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
+\&\-mieee \-mbitops \-misize \-minline\-ic_invalidate \-mpadstruct \-mspace
+\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
+\&\-minvalid\-symbols\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR
+\&\fB\-mcmodel=\fR\fIcode-model\fR
+\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
+\&\-mfaster\-structs \-mno\-faster\-structs
+\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
+\&\-mhard\-quad\-float \-msoft\-quad\-float
+\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
+\&\-mstack\-bias \-mno\-stack\-bias
+\&\-munaligned\-doubles \-mno\-unaligned\-doubles
+\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc
+\&\-msafe\-dma \-munsafe\-dma
+\&\-mbranch\-hints
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain
+\&\-mfixed\-range=\fR\fIregister-range\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
+\&\-mprolog\-function \-mno\-prolog\-function \-mspace
+\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
+\&\fB\-mapp\-regs \-mno\-app\-regs
+\&\-mdisable\-callt \-mno\-disable\-callt
+\&\-mv850e1
+\&\-mv850e
+\&\-mv850 \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg \-mgnu \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp \-non\-static \-Bstatic \-Bdynamic
+\&\-Xbind\-lazy \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread \-mwin32 \-mwindows\fR
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16
+\&\-mfused\-madd \-mno\-fused\-madd
+\&\-mserialize\-volatile \-mno\-serialize\-volatile
+\&\-mtext\-section\-literals \-mno\-text\-section\-literals
+\&\-mtarget\-align \-mno\-target\-align
+\&\-mlongcalls \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
+\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
+\&\-fnon\-call\-exceptions \-funwind\-tables
+\&\-fasynchronous\-unwind\-tables
+\&\-finhibit\-size\-directive \-finstrument\-functions
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...
+\&\-fno\-common \-fno\-ident
+\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
+\&\-fno\-jump\-tables
+\&\-frecord\-gcc\-switches
+\&\-freg\-struct\-return \-fshort\-enums
+\&\-fshort\-double \-fshort\-wchar
+\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
+\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
+\&\fB\-fno\-stack\-limit \-fargument\-alias \-fargument\-noalias
+\&\-fargument\-noalias\-global \-fargument\-noalias\-anything
+\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
+\&\fB\-ftrapv \-fwrapv \-fbounds\-check
+\&\-fvisibility\fR
+.SS "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header.
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR. Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration). Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body). Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix). This option applies to all following input files until
+the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 8
+\& c c\-header c\-cpp\-output
+\& c++ c++\-header c++\-cpp\-output
+\& objective\-c objective\-c\-header objective\-c\-cpp\-output
+\& objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
+\& assembler assembler\-with\-cpp
+\& ada
+\& f77 f77\-cpp\-input f95 f95\-cpp\-input
+\& java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code. If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication. The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop. Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link. The linking
+stage simply is not done. The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble. The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper. The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR. This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation. Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and all command
+arguments are quoted. This is useful for shell scripts to capture the
+driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation. This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-combine\fR" 4
+.IX Item "-combine"
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
+language for which this is supported is C. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with \fB\-save\-temps\fR, the compiler will generate multiple
+pre-processed files
+(one for each source file), but only one (combined) \fI.o\fR or
+\&\fI.s\fR file.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept. If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool. For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers. These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options. Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed. This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display. One
+case where it does work however is when one of the classes is
+\&\fItarget\fR. So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\& \-\-help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line. Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed. Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\& % gcc \-Q \-mabi=2 \-\-help=target \-c
+\& The following options are target specific:
+\& \-mabi= 2
+\& \-mabort\-on\-noreturn [disabled]
+\& \-mapcs [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\& \-Q \-O2 \-\-help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\& gcc \-c \-Q \-O3 \-\-help=optimizers > /tmp/O3\-opts
+\& gcc \-c \-Q \-O2 \-\-help=optimizers > /tmp/O2\-opts
+\& diff /tmp/O2\-opts /tmp/O3\-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program. It takes a single
+comma separated list as an argument, which will be used to invoke
+the wrapper:
+.Sp
+.Vb 1
+\& gcc \-c t.c \-wrapper gdb,\-\-args
+.Ve
+.Sp
+This will invoke all subprograms of gcc under \*(L"gdb \-\-args\*(R",
+thus cc1 invocation will be \*(L"gdb \-\-args cc1 ...\*(R".
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler. The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SS "Compiling \*(C+ Programs"
+.IX Subsection "Compiling Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library. This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations. On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.SS "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c89\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using. It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR. Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously. For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used. Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard. This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc89\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu89\fR or \fBgnu++98\fR. By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it. For example,
+\&\fB\-std=c89\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected. The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu89 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.PD 0
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.4/c99status.html\fR> for more information. The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default. The name \fBgnu9x\fR is deprecated.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+ This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3. In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode. Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior). This option was first supported in
+\&\s-1GCC\s0 4.3. This option is not supported in C89 or gnu89 mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files. This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character). In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers. You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops. The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library. In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function. For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored. There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\& #define abs(n) _\|_builtin_abs ((n))
+\& #define strcpy(d, s) _\|_builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment. This implies
+\&\fB\-fbuiltin\fR. A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment. This
+implies \fB\-fno\-builtin\fR. A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>. This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling. This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option. The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling. The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler. They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments. The value of such an expression is void. This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types. This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for. This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR. Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.SS "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in. For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\& g++ \-g \-frepo \-O \-c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking. This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated. This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option. In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does. This saves space in the executable at the
+cost of not diagnosing duplicate definitions. If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\& template <class T> auto forward(T t) \-> decltype (realfn (t))
+\& {
+\& return realfn (t);
+\& }
+\&
+\& void f()
+\& {
+\& forward({1,2}); // call forward<std::initializer_list<int>>
+\& }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup. This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime. This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR. This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue. Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings. Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time. This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
+of the language, you can save some space by using this flag. Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth-n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17.
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal. When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available. This
+option exists only for testing, and should not be used by end-users;
+it will result in inferior code and has no benefits. This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories. (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+ Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C, and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code. There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities at this point include:
+.RS 4
+.IP "\(bu" 4
+Incorrect handling of tail-padding for bit-fields. G++ may attempt to
+pack data into the same byte as a base class. For example:
+.Sp
+.Vb 2
+\& struct A { virtual void f(); int f1 : 1; };
+\& struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of tail-padding for virtual bases. G++ does not use
+tail padding when laying out virtual bases. For example:
+.Sp
+.Vb 3
+\& struct A { virtual void f(); char c1; };
+\& struct B { B(); char c2; };
+\& struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union. For
+example:
+.Sp
+.Vb 1
+\& union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "\(bu" 4
+Empty classes can be placed at incorrect offsets. For example:
+.Sp
+.Vb 1
+\& struct A {};
+\&
+\& struct B {
+\& A a;
+\& virtual void f ();
+\& };
+\&
+\& struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero. G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "\(bu" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\& template <typename Q>
+\& void f(typename Q::X) {}
+\&
+\& template <template <typename> class Q>
+\& void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes. The known psABI changes at this
+point include:
+.IP "\(bu" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI. For example:
+.Sp
+.Vb 4
+\& union U {
+\& long double ld;
+\& int i;
+\& };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed. For instance:
+.Sp
+.Vb 5
+\& struct A {
+\& int i;
+\& int j;
+\& A(): j (0), i (1) { }
+\& };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect. This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "\(bu" 4
+Item 11: Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "\(bu" 4
+Item 12: Prefer initialization to assignment in constructors.
+.IP "\(bu" 4
+Item 14: Make destructors virtual in base classes.
+.IP "\(bu" 4
+Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "\(bu" 4
+Item 23: Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "\(bu" 4
+Item 6: Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "\(bu" 4
+Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer. But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template. Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function. (Section
+14.5.3). Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function. Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class. For example, in:
+.Sp
+.Vb 3
+\& struct A {
+\& virtual void f();
+\& };
+\&
+\& struct B: public A {
+\& void f(int);
+\& };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\& B* b;
+\& b\->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size. Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\& struct A {
+\& operator int ();
+\& A& operator = (int);
+\& };
+\&
+\& main ()
+\& {
+\& A a,b;
+\& a = b;
+\& }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.SS "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves. See
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\& gcc \-g \-fgnu\-runtime \-O \-c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime. This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime. This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (e.g.,
+\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
+is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
+to be used. Currently, this option is only available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
+thusly generated will only operate on instance variables declared in the
+current Objective-C class, and not those inherited from superclasses. It
+is the responsibility of the Objective-C runtime to invoke all such methods
+in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
+will be invoked by the runtime immediately after a new object
+instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
+be invoked immediately before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher. On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in Objective-C,
+similar to what is offered by \*(C+ and Java. This option is
+unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
+earlier.
+.Sp
+.Vb 10
+\& @try {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+\& @catch (AnObjCClass *exc) {
+\& ...
+\& @throw expr;
+\& ...
+\& @throw;
+\& ...
+\& }
+\& @catch (AnotherClass *exc) {
+\& ...
+\& }
+\& @catch (id allOthers) {
+\& ...
+\& }
+\& @finally {
+\& ...
+\& @throw expr;
+\& ...
+\& }
+.Ve
+.Sp
+The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
+Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
+\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
+the object caught by the \f(CW@catch\fR will be rethrown.
+.Sp
+Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme. When an object is thrown, it will be caught
+by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
+analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
+\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
+any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
+clauses (if any).
+.Sp
+The \f(CW@finally\fR clause, if present, will be executed upon exit from the
+immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
+regardless of whether any exceptions are thrown, caught or rethrown
+inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
+of the \f(CW\*(C`finally\*(C'\fR clause in Java.
+.Sp
+There are several caveats to using the new exception mechanism:
+.RS 4
+.IP "\(bu" 4
+Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
+idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
+exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
+systems, due to additional functionality needed in the (NeXT) Objective-C
+runtime.
+.IP "\(bu" 4
+As mentioned above, the new exceptions do not support handling
+types other than Objective-C objects. Furthermore, when used from
+Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
+exceptions at this time. This means you cannot \f(CW@throw\fR an exception
+from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
+(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
+.RE
+.RS 4
+.Sp
+The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
+blocks for thread-safe execution:
+.Sp
+.Vb 3
+\& @synchronized (ObjCClass *guard) {
+\& ...
+\& }
+.Ve
+.Sp
+Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
+first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
+object by another thread. If it has, the current thread shall wait until
+the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
+the current thread will place its own lock on it, execute the code contained in
+the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
+making \f(CW\*(C`guard\*(C'\fR available to other threads).
+.Sp
+Unlike Java, Objective-C does not allow for entire methods to be marked
+\&\f(CW@synchronized\fR. Note that throwing exceptions out of
+\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
+to be unlocked properly.
+.RE
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead. This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself. Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained. This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class. The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation. The check is performed on the list of methods
+in the final stage of compilation. Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation. Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found. A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section. This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation. This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.SS "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...). The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported. Right now, only the \*(C+ front end can
+honor these options. However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode. Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines. This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode. Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fdiagnostics\-show\-option\fR" 4
+.IX Item "-fdiagnostics-show-option"
+This option instructs the diagnostic machinery to add text to each
+diagnostic emitted, which indicates which command line option directly
+controls that diagnostic, when such an option is known to the
+diagnostic machinery.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information. By default, this warning is enabled and is treated as an
+error. \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error. Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+.SS "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error. The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors. This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
+option to have each controllable warning amended with the option which
+controls it, to determine what to use with this option.
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations. Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR. This manual lists only one of the
+two forms, whichever is not the default. For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well. With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance. They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR. We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based. Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard. (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros. This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)
+\&\fB\-Wc++0x\-compat
+\&\-Wchar\-subscripts
+\&\-Wimplicit\-int
+\&\-Wimplicit\-function\-declaration
+\&\-Wcomment
+\&\-Wformat
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)
+\&\fB\-Wmaybe\-uninitialized
+\&\-Wmissing\-braces
+\&\-Wnonnull
+\&\-Wparentheses
+\&\-Wpointer\-sign
+\&\-Wreorder
+\&\-Wreturn\-type
+\&\-Wripa\-opt\-mismatch
+\&\-Wsequence\-point
+\&\-Wsign\-compare\fR (only in \*(C+)
+\&\fB\-Wstrict\-aliasing
+\&\-Wstrict\-overflow=1
+\&\-Wswitch
+\&\-Wtrigraphs
+\&\-Wuninitialized
+\&\-Wunknown\-pragmas
+\&\-Wunused\-function
+\&\-Wunused\-label
+\&\-Wunused\-value
+\&\-Wunused\-variable
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR. Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR. The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered
+\&\-Wempty\-body
+\&\-Wignored\-qualifiers
+\&\-Wmissing\-field\-initializers
+\&\-Wmissing\-parameter\-type\fR (C only)
+\&\fB\-Wold\-style\-declaration\fR (C only)
+\&\fB\-Woverride\-init
+\&\-Wsign\-compare
+\&\-Wtype\-limits
+\&\-Wuninitialized
+\&\-Wmaybe\-uninitialized
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) \fB \fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "\(bu" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "\(bu" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "\(bu" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "\(bu" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense. This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions. Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations. However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems. At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
+string came from untrusted input and contains \fB\f(CB%n\fB\fR. (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C, \*(C+, Objective-C, and Objective\-\*(C+ only)" 4
+.IX Item "-Wnonnull (C, , Objective-C, and Objective- only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\& int f()
+\& {
+\& int i = i;
+\& return i;
+\& }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR" 4
+.IX Item "-Wimplicit"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR. For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types. This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed. In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\& int a[2][2] = { 0, 1, 2, 3 };
+\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
+such a case:
+.Sp
+.Vb 7
+\& {
+\& if (a)
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose. When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified. To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would
+look like this:
+.Sp
+.Vb 9
+\& {
+\& if (a)
+\& {
+\& if (b)
+\& foo ();
+\& else
+\& bar ();
+\& }
+\& }
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it. These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified. All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified. However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect. Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R". If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wself\-assign\fR" 4
+.IX Item "-Wself-assign"
+Warn about self-assignment and self-initialization. This warning is intended
+for detecting accidental self-assignment due to typos, and therefore does
+not warn on a statement that is semantically a self-assignment after
+constant folding. Here is an example of what will trigger a self-assign
+warning and what will not:
+.Sp
+.Vb 6
+\& void func()
+\& {
+\& int i = 2;
+\& int x = x; /* warn */
+\& float f = 5.0;
+\& double a[3];
+\&
+\& i = i + 0; /* not warn */
+\& f = f / 1; /* not warn */
+\& a[1] = a[1]; /* warn */
+\& i += 0; /* not warn */
+\& }
+.Ve
+.Sp
+In \*(C+ it will not warn on self-assignment of non-POD variables unless
+\&\fB\-Wself\-assign\-non\-pod\fR is also enabled.
+.IP "\fB\-Wself\-assign\-non\-pod\fR" 4
+.IX Item "-Wself-assign-non-pod"
+Warn about self-assignment of non-POD variables. This is a \*(C+\-specific
+warning and only effective when \fB\-Wself\-assign\fR is enabled.
+.Sp
+There are cases where self-assignment might be intentional. For example,
+a \*(C+ programmer might write code to test whether an overloaded
+\&\f(CW\*(C`operator=\*(C'\fR works when the same object is assigned to itself.
+One way to work around the self-assign warning in such cases when this flag
+is enabled is using the functional form \f(CW\*(C`object.operator=(object)\*(C'\fR
+instead of the assignment form \f(CW\*(C`object = object\*(C'\fR, as shown in the
+following example.
+.Sp
+.Vb 3
+\& void test_func()
+\& {
+\& MyType t;
+\&
+\& t.operator=(t); // not warn
+\& t = t; // warn
+\& }
+.Ve
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with a
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified. The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wripa\-opt\-mismatch\fR" 4
+.IX Item "-Wripa-opt-mismatch"
+When doing an \s-1FDO\s0 build with \fB\-fprofile\-use\fR and \fB\-fripa\fR,
+warn if importing an axuiliary module that was built with a different
+\&\s-1GCC\s0 command line during the profile-generate phase than the primary
+module.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used. These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+Note that a classic way to avoid \fB\-Wunused\-variable\fR warning is
+using \f(CW\*(C`x = x\*(C'\fR, but that does not work with \fB\-Wself\-assign\fR.
+Use \f(CW\*(C`(void) x\*(C'\fR or \f(CW\*(C`static_cast<void>(x)\*(C'\fR instead.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole. They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.IP "\fB\-Wmaybe\-uninitialized\fR" 4
+.IX Item "-Wmaybe-uninitialized"
+For an automatic variable, if there exists a path from the function
+entry to a use of the variable that is initialized, but there exist
+some other paths the variable is not initialized, the compiler will
+emit a warning if it can not prove the uninitialized paths do not
+happen at runtime. These warnings are made optional because \s-1GCC\s0 is
+not smart enough to see all the reasons why the code might be correct
+despite appearing to have an error. Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\& {
+\& int x;
+\& switch (y)
+\& {
+\& case 1: x = 1;
+\& break;
+\& case 2: x = 4;
+\& break;
+\& case 3: x = 5;
+\& }
+\& foo (x);
+\& }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
+warning, the user needs to provide a default case with \fIassert\fR\|(0) or
+similar code.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code. As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files. This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas. See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization. The warning does not catch all
+cases, but does attempt to catch the more common pitfalls. It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives. However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced. Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken. Warns about
+incomplete types. Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common punn+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur. Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization. Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur. Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem. To help focus on important issues, several
+warning levels are defined. No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid. For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR. This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified. For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \-O2 and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero. Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read. Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code. However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers. If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem). In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "\(bu" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "\(bu" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line. Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line. It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them. Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "\(bu" 4
+A function-like macro that appears without arguments.
+.IP "\(bu" 4
+The unary plus operator.
+.IP "\(bu" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
+constants.) Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "\(bu" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "\(bu" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "\(bu" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "\(bu" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type. This warning is only issued if
+the base of the constant is ten. I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "\(bu" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "\(bu" 4
+Initialization of automatic aggregates.
+.IP "\(bu" 4
+Identifier conflicts with labels. Traditional C lacks a separate
+namespace for labels.
+.IP "\(bu" 4
+Initialization of unions. If the initializer is zero, the warning is
+omitted. This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "\(bu" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa. The absence of these prototypes when compiling with traditional
+C would cause serious problems. This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "\(bu" 4
+Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype. This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block. This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable shadows another local variable, parameter or
+global variable or whenever a built-in function is shadowed.
+.IP "\fB\-Wshadow\-local\fR" 4
+.IX Item "-Wshadow-local"
+Warn when a local variable shadows another local variable or parameter.
+.IP "\fB\-Wshadow\-compatible\-local\fR" 4
+.IX Item "-Wshadow-compatible-local"
+Warn when a local variable shadows another local variable or parameter
+whose type is compatible with that of the shadowing variable. In \*(C+,
+type compatibility here means the type of the shadowing variable can be
+converted to that of the shadowed variable. The creation of this flag
+(in addition to \fB\-Wshadow\-local\fR) is based on the idea that when
+a local variable shadows another one of incompatible type, it is most
+likely intentional, not a bug or typo, as shown in the following example:
+.Sp
+.Vb 8
+\& for (SomeIterator i = SomeObj.begin(); i != SomeObj.end(); ++i)
+\& {
+\& for (int i = 0; i < N; ++i)
+\& {
+\& ...
+\& }
+\& ...
+\& }
+.Ve
+.Sp
+Since the two variable \f(CW\*(C`i\*(C'\fR in the example above have incompatible types,
+enabling only \fB\-Wshadow\-compatible\-local\fR will not emit a warning.
+Because their types are incompatible, if a programmer accidentally uses one
+in place of the other, type checking will catch that and emit an error or
+warning. So not warning (about shadowing) in this case will not lead to
+undetected bugs. Use of this flag instead of \fB\-Wshadow\-local\fR can
+possibly reduce the number of warnings triggered by intentional shadowing.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning. In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices. With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions. In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR. This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions. For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR. This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning. These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR. This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR. Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types; confusing overload resolution for user-defined conversions; and
+conversions that will never use a type conversion operator:
+conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a reference
+to them. Warnings about conversions between signed and unsigned
+integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wconversion\-null\fR" 4
+.IX Item "-Wconversion-null"
+Warn about peculiar, but valid, conversions from/to \f(CW\*(C`NULL\*(C'\fR.
+This includes converting \f(CW\*(C`NULL\*(C'\fR to non-pointer type and
+converting the boolean value \f(CW\*(C`false\*(C'\fR to \f(CW\*(C`NULL\*(C'\fR. This warning
+is also enabled by \fB\-Wconversion\fR and only effective in \*(C+.
+.IP "\fB\-Wreal\-conversion\fR" 4
+.IX Item "-Wreal-conversion"
+Warn for implicit type conversions from real (\f(CW\*(C`double\*(C'\fR or \f(CW\*(C`float\*(C'\fR)
+to integral values.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement. This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wenum-compare ( and Objective- only)"
+Warn about a comparison between values of different enum types. This
+warning is enabled by default.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called. (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc. This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined. This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types. (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration. This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used. A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\& void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration. This warning is issued even if the definition itself
+provides a prototype. The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files. In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing. For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\& struct s { int f, g, h; };
+\& struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-noreturn\fR" 4
+.IX Item "-Wmissing-noreturn"
+Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
+Note these are only possible candidates, not absolute ones. Care should
+be taken to manually verify functions actually do not ever return before
+adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
+bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
+hosted C environments.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes. Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type. I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
+possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters. However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same. To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports. The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers. That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR. You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR. To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit. For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\& struct foo {
+\& int x;
+\& char a, b, c, d;
+\& } _\|_attribute_\|_((packed));
+\& struct bar {
+\& char z;
+\& struct foo f;
+\& };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR. This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout. \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\& struct foo
+\& {
+\& char a:4;
+\& char b:8;
+\& } _\|_attribute_\|_ ((packed));
+.Ve
+.Sp
+This warning is enabled by default. Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure. Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Wunreachable\-code\fR" 4
+.IX Item "-Wunreachable-code"
+Warn if the compiler detects that code will never be executed.
+.Sp
+This option is intended to warn when the compiler detects that at
+least a whole line of source code will never be executed, because
+some condition is never satisfied or because it is after a
+procedure that never returns.
+.Sp
+It is possible for this option to produce a warning even though there
+are circumstances under which part of the affected line can be executed,
+so care should be taken when removing apparently-unreachable code.
+.Sp
+For instance, when a function is inlined, a warning may mean that the
+line is unreachable in only one inlined copy of the function.
+.Sp
+This option is not made part of \fB\-Wall\fR because in a debugging
+version of a program there is often substantial code which checks
+correct functioning of the program and is, hopefully, unreachable
+because the program does work. Another common use of unreachable
+code is to provide behavior which is selectable at compile-time.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function. For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function. Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined. In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.) This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-int-to-pointer-cast (C and Objective-C only)"
+Suppress warnings from casts to pointer type of an integer of a
+different size.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used. This is default. To inhibit
+the warning messages, use \fB\-Wno\-long\-long\fR. Flags
+\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
+only when \fB\-pedantic\fR flag is used.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile. The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables. This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled. This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively. Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C. It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active. It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard. Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
+C99, it was raised to 4095. \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.SS "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program. If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output. This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0. This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-2\fR" 4
+.IX Item "-gdwarf-2"
+Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
+supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
+option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
+version 3 is upward compatible with version 2, but may still cause
+problems for older debuggers.
+.IP "\fB\-gdwarf\-4\fR" 4
+.IX Item "-gdwarf-4"
+Produce debugging information in \s-1DWARF\s0 version 4 format (if that is
+supported). With this option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 4
+when they are useful, including the placement of most type information
+in separate comdat sections. The \s-1DWARF\s0 version 4 format is still a
+draft specification, and this option is currently experimental.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR. On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+This option currently disables only the output of discriminator information
+in line number tables when not using \s-1DWARF\s0 version 4.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information. The default level is 2.
+.Sp
+Level 0 produces no debug information at all. Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug. This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program. Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing. That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF2\s0.
+.IP "\fB\-gmlt\fR" 4
+.IX Item "-gmlt"
+Produce a minimal line table, with level 1 debugging information plus
+information about inlined functions and line numbers.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol. This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax
+[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files. Merging is
+not supported by all assemblers or linkers. Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time. Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR. You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented. During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns. When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file. In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking). See the documentation for those options for more details.
+.RS 4
+.IP "\(bu" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options. For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option. You do not need to profile
+every source file in a program.
+.IP "\(bu" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "\(bu" 4
+Run the program on a representative workload to generate the arc profile
+information. This may be repeated any number of times. You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated. Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "\(bu" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "\(bu" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed. When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage. Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data. Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upperbound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upperbound. \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upperbound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upperbound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upperbound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR. This is used for debugging the RTL-based passes of the
+compiler. The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file. \fIdumpname\fR is
+generated from the name of the output file, if explicitly specified
+and it is not an executable, otherwise it is the basename of the
+source file. These switches may have different effects when
+\&\fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR. Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery. This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling. This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers. This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dm\fR" 4
+.IX Item "-dm"
+Print statistics on memory usage, at the end of the run, to
+standard error.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used. The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+Dump debugging information during parsing, to standard error.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output. This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file. The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file. The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file. If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+.PD 0
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-ipa-switch-options"
+.PD
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR controls the details
+of the dump as described for the \fB\-fdump\-tree\fR options. The
+following dumps are possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file. The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file. If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them. The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file. The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file. If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump. Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored. The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node. Usually this is not meaningful as it
+changes according to the environment and source file. Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path. When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree. By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dump the call graph of the compilation unit to a file in \s-1VCG\s0 format. The file
+name is made by appending \fI.cgraph.vcg\fR to the respective dump file name.
+This is primarily useful with \fB\-fdump\-ipa\fR.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file. The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file. The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
+file name is made by appending \fI.vcg\fR to the source file name. Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0. You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers. The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file. The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function. The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0. The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after STORE-CCP. The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination. The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination. The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation. The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy-propagation. The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination. The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation. The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates. The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking. The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations. The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination. The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables. The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization. The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees. The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops. The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner-most, single-bb, single\-entry/exit loops. This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If \fIn\fR=3, alignment related information is added to the reports.
+If \fIn\fR=4, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control-flow).
+If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
+For \fIn\fR=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers. It is used to generate certain symbol names
+that have to be different in every compiled file. It is also used to
+place unique stamps in coverage data files and the object files that
+produce them. You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints. This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched\fR or \fI.sched2\fR
+respectively. However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info. For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file. Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.IP "\fB\-time\fR" 4
+.IX Item "-time"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence. For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done). The output looks like this:
+.Sp
+.Vb 2
+\& # cc1 0.12 0.01
+\& # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself. The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else. With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line. This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them. The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@} instead of the
+\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
+ease shell-processing.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR. You can do
+.Sp
+.Vb 1
+\& gcc \-nostdlib <files>... \`gcc \-print\-libgcc\-file\-name\`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation. This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options. If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else. (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit. Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared). More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.SS "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results. Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program. Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag. Only
+optimizations that have a flag are listed.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize. Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec
+\&\-fcprop\-registers
+\&\-fdce
+\&\-fdefer\-pop
+\&\-fdelayed\-branch
+\&\-fdse
+\&\-fguess\-branch\-probability
+\&\-fif\-conversion2
+\&\-fif\-conversion
+\&\-finline\-small\-functions
+\&\-fipa\-pure\-const
+\&\-fipa\-reference
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types
+\&\-ftree\-builtin\-call\-dce
+\&\-ftree\-ccp
+\&\-ftree\-ch
+\&\-ftree\-copyrename
+\&\-ftree\-dce
+\&\-ftree\-dominator\-opts
+\&\-ftree\-dse
+\&\-ftree\-fre
+\&\-ftree\-sra
+\&\-ftree\-ter
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps
+\&\-falign\-functions \-falign\-jumps
+\&\-falign\-loops \-falign\-labels
+\&\-fcaller\-saves
+\&\-fcrossjumping
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
+\&\-fdelete\-null\-pointer\-checks
+\&\-fexpensive\-optimizations
+\&\-fgcse \-fgcse\-lm
+\&\-findirect\-inlining
+\&\-foptimize\-sibling\-calls
+\&\-fpeephole2
+\&\-fregmove
+\&\-freorder\-blocks \-freorder\-functions
+\&\-frerun\-cse\-after\-loop
+\&\-fsched\-interblock \-fsched\-spec
+\&\-fschedule\-insns \-fschedule\-insns2
+\&\-fstrict\-aliasing \-fstrict\-overflow
+\&\-ftree\-switch\-conversion
+\&\-ftree\-pre
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more. \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR and \fB\-ftree\-vectorize\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results. This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size. It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
+\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
+\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags. Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use. You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations. They are either
+activated by \fB\-O\fR options or are related to ones that are. You
+can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only). Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns. For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0. The pass tries to combine two
+instructions and checks if the result can be simplified. If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O2\fR,
+\&\fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one. This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions. \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist. The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller). The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining. This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers. The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
+allows coarse control of this limit. \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size. In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers. This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C89. In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR. In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types. Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass. This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed. By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis. This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0. This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section. E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests. Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors. The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi-threaded. Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads. This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found. If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently. This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path. For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks. When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves. This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination. This pass will attempt to move
+stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite. This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
+resulting code may or may not perform better than without cross-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this. Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents. This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics. The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Use global dataflow analysis to identify and eliminate useless checks
+for null pointers. The compiler assumes that dereferencing a null
+pointer would have halted the program. If a pointer is checked after
+it has already been dereferenced, it cannot be null.
+.Sp
+In some environments, this assumption is not true, and programs can
+safely dereference null pointers. Use
+\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying. This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator. The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR. The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring. The second
+algorithm can be unimplemented for some architectures. If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator. The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR. The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-coalesce\fR" 4
+.IX Item "-fira-coalesce"
+Do optimistic register coalescing. This option might be profitable for
+architectures with big regular register files.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call. Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo-registers. Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be. Default value is 5. If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable. This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done. This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions. This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions. This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm. Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules. This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched2\-use\-traces\fR" 4
+.IX Item "-fsched2-use-traces"
+Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
+allocation and additionally perform code duplication in order to increase the
+size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
+trace formation.
+.Sp
+This mode should produce faster but significantly longer programs. Also
+without \fB\-fbranch\-probabilities\fR the traces constructed may not
+match the reality and hurt the performance. This only makes
+sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsee\fR" 4
+.IX Item "-fsee"
+Eliminate redundant sign extension instructions and move the non-redundant
+ones to optimal placement using lazy code motion (\s-1LCM\s0).
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm. Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls. Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage. The compiler will attempt to use less
+stack space, even if that makes the program slower. This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees. This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees. The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees. This pass eliminates unnecessary
+copy operations. This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality. This transformation is
+affective for programs containing arrays of structures. Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics). Require \fB\-fipa\-type\-escape\fR
+to provide the safety of this transformation. It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR and \fB\-combine\fR to be
+enabled. Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis. This option is experimental
+and does not affect generated code.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace a m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion on trees. This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array. This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free. This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal. This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees. A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads. In this case the earlier store can be deleted. This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees. This is beneficial since it increases
+effectiveness of code motion optimizations. It also saves one jump. This flag
+is enabled by default at \fB\-O\fR and higher. It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-lr\-shrinking\fR" 4
+.IX Item "-ftree-lr-shrinking"
+Enable live range shrinking optimization on trees. This optimization is used
+to help reducing register pressure.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees. This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform linear loop transformations on tree. This flag can improve cache
+performance and allow further loop optimizations to take place.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops. Interchanging two
+nested loops switches the inner and outer loops. For example, given a
+loop like:
+.Sp
+.Vb 5
+\& DO J = 1, M
+\& DO I = 1, N
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = A(J, I) * C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss. This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran. To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops. Strip mining
+splits a loop into two nested loops. The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip. For example, given a loop like:
+.Sp
+.Vb 3
+\& DO I = 1, N
+\& A(I) = A(I) + C
+\& ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\& DO II = 1, N, 4
+\& DO I = II, min (II + 3, N)
+\& A(I) = A(I) + C
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran. To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops. Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches. For example, given a loop like:
+.Sp
+.Vb 5
+\& DO I = 1, N
+\& DO J = 1, M
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\& DO II = 1, N, 64
+\& DO JJ = 1, M, 64
+\& DO I = II, min (II + 63, N)
+\& DO J = JJ, min (JJ + 63, M)
+\& A(J, I) = B(I) + C(J)
+\& ENDDO
+\& ENDDO
+\& ENDDO
+\& ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches. This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran. To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers. This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution. This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place. For example, the loop
+.Sp
+.Vb 4
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\& DO I = 1, N
+\& A(I) = B(I) + C
+\& ENDDO
+\& DO I = 1, N
+\& D(I) = E(I) * F
+\& ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees. This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching. The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis. Later
+optimizations then may determine the number easily. Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered. The optimization is only
+profitable on multiprocessor machines, for loops that are CPU-intensive,
+rather than constrained e.g. by memory bandwidth. This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates. This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early. This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees. This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables. This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
+use/single def temporaries are replaced at their use location with their
+defining expression. This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees. When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed. This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees. This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated. This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks. This is
+enabled by default at \fB\-O2\fR and higher. Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration. This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect. However in cases the loop body is more complicated than
+a single basic block, this is not reliable. It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations. The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
+heuristics are based on the control flow graph. If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account. The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality. This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective. See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled. For C (and \*(C+), this activates
+optimizations based on the type of expressions. In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same. For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\& union a_union {
+\& int i;
+\& double d;
+\& };
+\&
+\& int f() {
+\& union a_union t;
+\& t.d = 3.0;
+\& return t.i;
+\& }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type-punning\*(R") is common. Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type. So, the code above will work as
+expected. However, this code might not:
+.Sp
+.Vb 7
+\& int f() {
+\& union a_union t;
+\& int* ip;
+\& t.d = 3.0;
+\& ip = &t.i;
+\& return *ip;
+\& }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\& int f() {
+\& double d = 3.0;
+\& return ((union a_union *) &d)\->i;
+\& }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled. For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen. This
+permits various optimizations. For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic. When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps. When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers. With \fB\-fwrapv\fR certain types of overflow are
+permitted. For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR. The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements. Output them in the same order that they appear in the
+input file. When this option is used, unreferenced static variables
+will not be removed. This option is intended to support existing code
+which relies on a particular ordering. For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR. When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register. This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents whole program being
+compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in a affect gets more aggressively optimized by interprocedural optimizers.
+While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of single file, in combination with option
+\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
+programs since the functions and variables become local for the whole combined
+compilation unit, not for the single source file itself.
+.Sp
+This option is not supported for Fortran programs.
+.IP "\fB\-fuse\-ld=gold\fR" 4
+.IX Item "-fuse-ld=gold"
+Use the \fBld.gold\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both\fR or \fB\-\-enable\-gold=both/ld\fR.
+.IP "\fB\-fuse\-ld=bfd\fR" 4
+.IX Item "-fuse-ld=bfd"
+Use the \fBld.bfd\fR linker instead of the default linker.
+This option is only necessary if \s-1GCC\s0 has been configured with
+\&\fB\-\-enable\-gold=both/gold\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR
+thus the profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization. You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-generate\-sampling\fR" 4
+.IX Item "-fprofile-generate-sampling"
+Enable sampling for instrumented binaries. Instead of recording every event,
+record only every N\-th event, where N (the sampling rate) can be set either
+at compile time using
+\&\fB\-\-param profile\-generate\-sampling\-rate=\fR\fIvalue\fR, or
+at execution start time through environment variable \fB\s-1GCOV_SAMPLING_RATE\s0\fR.
+.Sp
+At this time sampling applies only to branch counters. A sampling rate of 100
+decreases instrumentated binary slowdown from up to 20x for heavily threaded
+applications down to around 2x. \fB\-fprofile\-correction\fR is always
+needed with sampling.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code. This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR. Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fpmu\-profile\-generate=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-generate=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling. This collects
+hardware counter data corresponding to \fIpmuoption\fR. Currently
+only \fIload-latency\fR and \fIbranch-mispredict\fR are supported
+using pfmon tool. You must use \fB\-fpmu\-profile\-generate\fR both
+when compiling and when linking your program. This \s-1PMU\s0 profile data
+may later be used by the compiler during optimizations as well can be
+displayed using coverage tool gcov. The params variable
+\&\*(L"pmu_profile_n_addresses\*(R" can be used to restrict \s-1PMU\s0 data collection
+to only this many addresses.
+.IP "\fB\-fpmu\-profile\-use=\fR\fIpmuoption\fR" 4
+.IX Item "-fpmu-profile-use=pmuoption"
+Enable performance monitoring unit (\s-1PMU\s0) profiling based
+optimizations. Currently only \fIload-latency\fR and
+\&\fIbranch-mispredict\fR are supported.
+.IP "\fB\-fcgraph\-section\fR" 4
+.IX Item "-fcgraph-section"
+Emit call graph edge profile counts in .note.callgraph.text sections. This is
+used in conjunction with \fB\-fprofile\-use\fR. A new .note.callgraph.text
+section is created for each function. This section lists every callee and the
+number of times it is called. The params variable
+\&\*(L"note-cgraph-section-edge-threshold\*(R" can be used to only list edges above a
+certain threshold.
+.IP "\fB\-fripa\fR" 4
+.IX Item "-fripa"
+Perform dynamic inter-procedural analysis. This is used in conjunction with
+the \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR options.
+During the \fB\-fprofile\-generate\fR phase, this flag turns on some additional
+instrumentation code that enables dynamic call-graph analysis.
+During the \fB\-fprofile\-use\fR phase, this flag enables cross-module
+optimizations such as inlining.
+.IP "\fB\-fripa\-disallow\-asm\-modules\fR" 4
+.IX Item "-fripa-disallow-asm-modules"
+During profile-gen, if this flag is enabled, and the module has asm statements,
+arrange so that a bit recording this information will be set in the profile
+feedback data file.
+During profile-use, if this flag is enabled, and the same bit in auxiliary
+module's profile feedback data is set, don't import this auxiliary module.
+If this is the primary module, don't export it.
+.IP "\fB\-fripa\-disallow\-opt\-mismatch\fR" 4
+.IX Item "-fripa-disallow-opt-mismatch"
+Don't import an auxiliary module, if the \s-1GCC\s0 command line options used for this
+auxiliary module during the profile-generate stage were different from those used
+for the primary module. Note that any mismatches in warning-related options are
+ignored for this comparison.
+.IP "\fB\-fripa\-verbose\fR" 4
+.IX Item "-fripa-verbose"
+Enable printing of verbose information about dynamic inter-procedural optimizations.
+This is used in conjunction with the \fB\-fripa\fR.
+.IP "\fB\-fripa\-no\-promote\-always\-inline\-func\fR" 4
+.IX Item "-fripa-no-promote-always-inline-func"
+Do not promote static functions with always inline attribute in \s-1LIPO\s0 compilation.
+.IP "\fB\-fsample\-profile\fR" 4
+.IX Item "-fsample-profile"
+.PD 0
+.IP "\fB\-fsample\-profile=\fR\fIpath\fR" 4
+.IX Item "-fsample-profile=path"
+.PD
+Enable profile feedback directed optimizations using profiles obtained
+via sampling, and optimizations generally profitable only with profile
+feedback available.
+.IP "\fB\-fsample\-profile\-use\-entry\fR" 4
+.IX Item "-fsample-profile-use-entry"
+Use the entry count to annotate the entry basic block. This will improve the
+profile precision for \s-1LBR\s0 based sampling.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fB\-fsample\-profile\-aggregate\-using=\fR\fImethod\fR" 4
+.IX Item "-fsample-profile-aggregate-using=method"
+Select the method for (average or maximum) for converting
+instruction-level profiles into basic block level profiles.
+.IP "\fB\-frecord\-options\-in\-elf\fR" 4
+.IX Item "-frecord-options-in-elf"
+Record the command line options in the .note elf section for sample \s-1FDO\s0 to
+do module grouping.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic. These options trade off between speed and
+correctness. All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
+x86 architecture. For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point. Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt. A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards. When used at link-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result. \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR. May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect. Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations. For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination. Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero. \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps. These traps include division by zero, overflow,
+underflow, inexact result and invalid operation. This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect. Setting this option may
+allow faster code if one relies on \*(L"non-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior. This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations. This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode. This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations. Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division. Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case. The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules. Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options. This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken. When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file. The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization. Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
+notes to instructions for their later usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-ffvpt\fR" 4
+.IX Item "-ffvpt"
+If combined with \fB\-fvpt and \-ffvpt_functions\fR, it instructs the
+compiler to add a code to gather information about math library calls.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of function calls
+using precalculated values of common inputs.
+.IP "\fB\-ffvpt\-functions=\fR\fIffvptfunctions\fR" 4
+.IX Item "-ffvpt-functions=ffvptfunctions"
+This options takes a comma separated list of math functions to be
+profiled/optimized by \fB\-ffvpt\fR. The special name \*(L"all\*(R" can be
+used to specify all supported math functions. Currently, exp, log,
+pow, and sqrt are supported.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop. \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations). This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback). It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections. The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space. Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so. When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks. This is done by adding a guard variable to functions with
+vulnerable objects. This includes functions that call alloca, and
+functions with buffers larger than 8 bytes. The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-stack\-protector\fR
+or \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR or
+\&\fB\-fstack\-protector\fR are found.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\& static int a, b, c;
+\& int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\& int foo (void)
+\& {
+\& register int *xr = &x;
+\& return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
+\& }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done. For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions. You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer. The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBsra-max-structure-size\fR" 4
+.IX Item "sra-max-structure-size"
+The maximum structure size, in bytes, at which the scalar replacement
+of aggregates (\s-1SRA\s0) optimization will perform block copies. The
+default value, 0, implies that \s-1GCC\s0 will select the most appropriate
+size itself.
+.IP "\fBsra-field-structure-ratio\fR" 4
+.IX Item "sra-field-structure-ratio"
+The threshold ratio (as a percentage) between instantiated fields and
+the complete structure size. We say that if the ratio of the number
+of bytes in instantiated fields to the number of bytes in the complete
+structure exceeds this parameter, then block copies are not used. The
+default is 75.
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program. This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-cost-outcome\fR" 4
+.IX Item "predictable-branch-cost-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block. Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them. This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched. The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping. The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto. To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible. Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored. The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot. If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching. Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information. Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time. This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization. If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-passes\fR" 4
+.IX Item "max-gcse-passes"
+The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over. Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining. This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 450.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated. To those functions, a different
+(potentially more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 450.
+.IP "\fBinline-limit-increase-with-profile\fR" 4
+.IX Item "inline-limit-increase-with-profile"
+When profile information is available, such as when compiling
+with \fB\-fprofile\-use\fR, the maximum function size
+limits \fB\-\-param max-inline-insns-single\fR
+and \fB\-\-param max-inline-insns-auto\fR are increased by this percentage
+amount. Profile information increases the selectivity and quality of the
+inlining decisions, so having a larger set of candidate functions available
+for inlining can improve performance.
+The default value is 100.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions. For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit. Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time. If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane. For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size. Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation. The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames. While inlining the algorithm is trying
+to not grow past this limit too much. Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account. For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression. This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents). The default value is
+10.
+.IP "\fBmin-count-fraction-for-inline-cold\fR" 4
+.IX Item "min-count-fraction-for-inline-cold"
+Generally cold callsites are not candidates for inlining. However, if
+the callee contains hot code then inlining can propagate useful
+context to this hot region. This parameter, given as a fraction of
+the global maximum count, specifies the minimum expected count in the
+callee called from a cold callsite for the callsite to be considered
+for inlining, where the expected count in the callee from a callsite is
+the maximum count of any basic block in the callee times the callsite
+count divided by the callee count.
+.IP "\fBinline-call-cost\fR" 4
+.IX Item "inline-call-cost"
+Specify cost of call instruction relative to simple arithmetics operations
+(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
+functions and at the same time increases size of leaf function that is believed to
+reduce function size by being inlined. In effect it increases amount of
+inlining for code having large abstraction penalty (many functions that just
+pass the arguments to other functions) and decrease inlining for code with low
+abstraction penalty. The default value is 12.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used. The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization. The default value is 0.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+.PD 0
+.IP "\fBmax-completely-peeled-insns-feedback\fR" 4
+.IX Item "max-completely-peeled-insns-feedback"
+.PD
+The maximum number of insns of a completely peeled loop.
+.Sp
+The \fBmax-completely-peeled-insns-feedback\fR is used only when profile
+feedback is available and the loop is hot. Because of the real profiles, this
+value may set to be larger for hot loops.
+.IP "\fBmax-once-peeled-insns\fR" 4
+.IX Item "max-once-peeled-insns"
+.PD 0
+.IP "\fBmax-once-peeled-insns-feedback\fR" 4
+.IX Item "max-once-peeled-insns-feedback"
+.PD
+The maximum number of insns of a peeled loop that rolls only once.
+The \fBmax-once-peeled-insns-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value
+may set to be larger for hot loops.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+.PD 0
+.IP "\fBmax-completely-peel-times-feedback\fR" 4
+.IX Item "max-completely-peel-times-feedback"
+.PD
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.Sp
+The \fBmax-completely-peel-times-feedback\fR is used only when profile feedback
+is available and the loop is hot. Because of the real profiles, this value may
+set to be larger for hot loops.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations. Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert. The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver. The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver. The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints. The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer. See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically. This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown. We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10. This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered. This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available. The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage. This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without. The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers. The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBmax-aliased-vops\fR" 4
+.IX Item "max-aliased-vops"
+Maximum number of virtual operands per function allowed to represent
+aliases before triggering the alias partitioning heuristic. Alias
+partitioning reduces compile times and memory consumption needed for
+aliasing at the expense of precision loss in alias information. The
+default value for this parameter is 100 for \-O1, 500 for \-O2 and 1000
+for \-O3.
+.Sp
+Notice that if a function contains more memory statements than the
+value of this parameter, it is not really possible to achieve this
+reduction. In this case, the compiler will use the number of memory
+statements as the value for \fBmax-aliased-vops\fR.
+.IP "\fBavg-aliased-vops\fR" 4
+.IX Item "avg-aliased-vops"
+Average number of virtual operands per statement allowed to represent
+aliases before triggering the alias partitioning heuristic. This
+works in conjunction with \fBmax-aliased-vops\fR. If a function
+contains more than \fBmax-aliased-vops\fR virtual operators, then
+memory symbols will be grouped into memory partitions until either the
+total number of virtual operators is below \fBmax-aliased-vops\fR
+or the average number of virtual operators per memory statement is
+below \fBavg-aliased-vops\fR. The default value for this parameter
+is 1 for \-O1 and \-O2, and 3 for \-O3.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used. Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity. This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage. The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used. Setting this parameter
+very large effectively disables garbage collection. Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination. Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler. The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler. The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling. The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations. The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling. It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling. This is the limit on the number of iterations
+through which the instruction may be pipelined. The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler. The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register. The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed. This sets the maximum
+value of a shared integer constant. The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio. The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis. The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes. The distance we prefetch ahead is proportional
+to this constant. Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop with an
+unknown trip count.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system. By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+. However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above. For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine. This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior. Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing. If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled. The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default. If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation. The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions. If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used. The
+algorithm do not use pseudo-register conflicts. The default value of
+the parameter is 2000.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops. Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them. The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBctrl-regpre\fR" 4
+.IX Item "ctrl-regpre"
+This is a switch to turn on live range shrinking optimization.
+.IP "\fBctrl-regpre-mode\fR" 4
+.IX Item "ctrl-regpre-mode"
+This is used as a control knob to enable different transformations in
+the live range shrinking phase. Values of 1, 2, and 4 are used to enable
+upward motion, downward motion, and tree reshaping transformations
+ respectively. The values can be bitwise ORed.
+.IP "\fBreg-pressure-min-bb-factor\fR" 4
+.IX Item "reg-pressure-min-bb-factor"
+A performance tuning knob to control register pressure. When the size
+(in the number of gimple statements) of a basic block in a loop is
+larger than the threshold specified by this parameter multiplied by the
+number of available registers, live range shrinking optimization is enabled.
+.IP "\fBreg-pressure-max-region\fR" 4
+.IX Item "reg-pressure-max-region"
+A parameter to control the maximal allowed region size for live range
+shrinking.
+.IP "\fBreg-pressure-min-tree\fR" 4
+.IX Item "reg-pressure-min-tree"
+The minimal size (number of leaves) of a tree to be reshaped in the Live
+Range Shrinking optimization.
+.IP "\fBmin-mcf-cancel-iters\fR" 4
+.IX Item "min-mcf-cancel-iters"
+The minimum number of iterations of negative cycle cancellation during
+\&\s-1MCF\s0 profile correction before early termination. This parameter is
+only useful when using \fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-mcf-high-confidence-cost-mult\fR" 4
+.IX Item "samplefdo-mcf-high-confidence-cost-mult"
+Multiply the cost used by \s-1MCF\s0 during profile correction by this factor
+for all input profile data that is determined to be high confidence.
+This parameter is only useful when using \fB\-fsample\-profile\fR and
+\&\fB\-fprofile\-correction\fR.
+.IP "\fBsamplefdo-use-discrim\fR" 4
+.IX Item "samplefdo-use-discrim"
+When attributing samples to the \s-1CFG\s0, use discriminators to identify
+which \s-1CFG\s0 nodes correspond to which samples. This parameter is only
+useful when using \fB\-fsample\-profile\fR.
+.IP "\fBsamplefdo-large-block-thresh\fR" 4
+.IX Item "samplefdo-large-block-thresh"
+Consider a basic block large if it has more than this many gimple
+statements in it. If a block is large and has no profile samples
+attributed to it, it will be assigned a weight of 0 with high
+confidence. This parameter is only useful when using
+\&\fB\-fsample\-profile\fR.
+.IP "\fBmax-lipo-mem\fR" 4
+.IX Item "max-lipo-mem"
+When importing auxiliary modules during profile-use, check current
+memory consumption after parsing each auxiliary module. If it exceeds
+this limit (specified in kb), don't import any more auxiliary modules.
+Specifying a value of 0 means don't enforce this limit. This parameter
+is only useful when using \fB\-fprofile\-use\fR and \fB\-fripa\fR.
+.IP "\fBprofile-generate-sampling-rate\fR" 4
+.IX Item "profile-generate-sampling-rate"
+Set the sampling rate with \fB\-fprofile\-generate\-sampling\fR.
+.RE
+.RS 4
+.RE
+.SS "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor. If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas. However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor. You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive. In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line. All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros. The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories. If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled. To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused. A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\& #if defined the_macro_causing_the_warning
+\& #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\& #if FOO
+\& ...
+\& #else FOO
+\& ...
+\& #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs. This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors. Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers. These are normally unhelpful
+in finding bugs in your own code, therefore suppressed. If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard. Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file. The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed. If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline. The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output. This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to. If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error. The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing. These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\& test.o: test.c test.h
+\&
+\& test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation. By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix. The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify. If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\& $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\& $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given. If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies. If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its filename. When
+\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
+loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0. It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location. The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly. This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect. If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
+extensions for \*(C+ and assembly are also recognized. If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform. Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.PD
+The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999. Before
+publication, this was known as C9X.
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path. Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories. (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file. However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file. If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away. Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted. \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed. In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally. This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers. This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems. In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops. This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line. If the value is less than 1 or greater than 100, the option is
+ignored. The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0. If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
+or this command line option. Currently the command line option takes
+precedence if there's a conflict. \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes. \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats. This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics. This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space. Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored. If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\& touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing. Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments. This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters. For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them. See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\& Trigraph: ??( ??) ??< ??> ??= ??/ ??\*(Aq ??! ??\-
+\& Replacement: [ ] { } # \e ^ | ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the
+\&\fB#include\fR stack it is. Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
+preprocess as normal. With two dashes, exit immediately.
+.SS "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler. You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.SS "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file. They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library. (Object files are
+distinguished from libraries by the linker according to the file
+contents.) If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking. (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files. The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined. But if the file that is found is an
+ordinary object file, it is linked in the usual fashion. The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc. These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries. In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR or \fB\-pg\fR or \fB\-p\fR
+are found.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries. On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable. Not all systems support this option. For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version. The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries. In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default. Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default. This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object. Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script. This option is supported by most
+systems using the \s-1GNU\s0 linker. On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker. You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments. For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR. Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
+commas, it is split into multiple options at the commas. You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker. When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it. You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.SS "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files. This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories. However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that). If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored. The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker. They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor. In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed. If it is not found there, the two
+standard prefixes above are tried, and that is all. The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR. This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option. If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated. Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
+override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked. That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.SS "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
+\&\fI<machine>\-gcc\fR when cross-compiling, or
+\&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
+was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
+options that will switch to another cross-compiler or version.
+.IP "\fB\-b\fR \fImachine\fR" 4
+.IX Item "-b machine"
+The argument \fImachine\fR specifies the target machine for compilation.
+.Sp
+The value to use for \fImachine\fR is the same as was specified as the
+machine type when configuring \s-1GCC\s0 as a cross-compiler. For
+example, if a cross-compiler was configured with \fBconfigure
+arm-elf\fR, meaning to compile for an arm processor with elf binaries,
+then you would specify \fB\-b arm-elf\fR to run that cross compiler.
+Because there are other options beginning with \fB\-b\fR, the
+configuration must contain a hyphen, or \fB\-b\fR alone should be one
+argument followed by the configuration in the next argument.
+.IP "\fB\-V\fR \fIversion\fR" 4
+.IX Item "-V version"
+The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
+This is useful when multiple versions are installed. For example,
+\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
+.PP
+The \fB\-V\fR and \fB\-b\fR options work by running the
+\&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
+use them if you can just run that directly.
+.SS "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Earlier we discussed the standard option \fB\-b\fR which chooses among
+different installed compilers for completely different target
+machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
+.PP
+In addition, each of these target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none. A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode. This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the cpu to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics. This flag prevents code
+compiled for one cpu to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used. This option avoids
+generating these instructions. This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets. Without this option the two instruction sets cannot
+be reliably used inside one program. The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body. This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code. The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use. Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration. Note that
+the hard-float and soft-float ABIs are not link-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order. That is, a byte order of the form \fB32107654\fR. Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a8\fR, \fBcortex\-a9\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the cpu specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code. This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-d16\fR and
+\&\fBneon\fR. \fB\-mfp\fR and \fB\-mfpe\fR
+are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
+with older versions of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the \s-1COFF\s0
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls. The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls. The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive. Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function. The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations. This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co-processor. This option is not enabled by default, since the
+problem is only present in older Maverick implementations. The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue. The generated code is similar to this:
+.Sp
+.Vb 9
+\& t0
+\& .ascii "arm_poke_function_name", 0
+\& .align
+\& t1
+\& .word 0xff000000 + (t1 \- t0)
+\& arm_poke_function_name
+\& mov ip, sp
+\& stmfd sp!, {fp, ip, lr, pc}
+\& sub fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set. The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions. (A leaf function is one that does
+not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function. This allows these functions to be called from
+non-interworking code.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not. There is a small overhead in the cost
+of executing a function pointer if this option is enabled.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer. The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor. The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-msize\fR" 4
+.IX Item "-msize"
+Output instruction sizes to the asm file.
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
+.IP "\fB\-mno\-tablejump\fR" 4
+.IX Item "-mno-tablejump"
+Do not generate tablejump insns which sometimes increase code size.
+The option is now deprecated in favor of the equivalent
+\&\fB\-fno\-jump\-tables\fR
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer. This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
+and long long will be 4 bytes. Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor. Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor. Any workarounds available for the targeted silicon revision
+will be enabled. If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled. The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision. If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined. If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete. For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined. And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in. This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large. This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries. That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries. Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default. Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime. This has an effect on certain
+anomaly workarounds. For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions. The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies. This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code. This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model. The default is to
+arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code. Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library. Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch. The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory. The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR. This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used. For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode. The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable. This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch. Using this switch may require recompiling all
+other modules in a program, including system libraries. Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development. Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked. See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
+.IX Item "-allowable_client client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker. The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations. If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
+point standard. However, for full compliance, software assistance is
+required. This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option. Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting. The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode. Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode. A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect. The C library initializes this register for
+rounding towards plus infinity. Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise. This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision. This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision. The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision. The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant. You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions. If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader. Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros. Use of these macros does not allow
+optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions. This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register. This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR. With this option the data area
+is limited to just below 2GB. Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction. When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify. If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR. The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application. This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model. This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally. It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections. It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit. This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet. This option only has an effect when \s-1VLIW\s0 packing
+is enabled. It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code. It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code. Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library. This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library. This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform. This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default. When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode. This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture. The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine. Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner. This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers. If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes. This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers. This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries. This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine. The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker. Note this makes symbolic
+debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
+\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
+options are available under HP-UX and HI-UX.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
+building a shared library. It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld. The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links. It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences. This ensures that a call
+is always able to reach linker generated stubs. The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used. The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance. However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated. The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
+is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
+11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines. It also affects the operational behavior
+of the C library. Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl. There isn't an archive version of libdld.sl. Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic. On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case. The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under HP-UX. This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions. The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change. Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors. In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine. Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support. Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support. (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3dNOW!, enhanced 3dNOW!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR. The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR. The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise. Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips. See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387. Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective. For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once. This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR. Supported
+choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons. These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross-compilation. You must make your
+own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0. The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
+generating those instructions. This option is the default on FreeBSD,
+OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
+indicates that the target cpu will always have an \s-1FPU\s0 and so the
+instruction will not need emulation. As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible. So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section. This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning. This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR. You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments. By
+default, no registers are used to pass arguments, and at most 3
+registers can be used. You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries. This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values. You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries. This includes
+the system libraries and startup modules.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits. When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default. When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more. Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry. On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary. This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary. If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties. On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned. Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack. It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size. Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-msse5\fR" 4
+.IX Item "-msse5"
+.IP "\fB\-mno\-sse5\fR" 4
+.IX Item "-mno-sse5"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1SSE4A\s0, \s-1SSE5\s0, \s-1LWP\s0,
+\&\s-1ABM\s0 or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR. Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags. In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions. String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode. While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers. The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option. Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types. This is useful for high resolution counters that could be updated
+by multiple processors (or cores). This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005. \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments. These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library. Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing. \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention. Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0. The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows. On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0. You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default. In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue. This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2. The drawback is a notable
+increase in code size. This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR. Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations. This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary. This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-minline\-compares\fR" 4
+.IX Item "-minline-compares"
+This option enables \s-1GCC\s0 to inline calls to memcmp and strcmp. The
+inlined version does a byte-by-byte comparion using a repeat string
+operation prefix.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with. The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added. Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable automatic generation of fused floating point multiply-add instructions
+if the \s-1ISA\s0 supports such instructions. The \-mfused\-madd option is on by
+default. The fused multiply-add instructions have a different
+rounding behavior compared to executing a multiply followed by an add.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix. The option \fB\-mavx\fR turns this on by default.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code. The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
+Programs can be statically or dynamically linked. This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model. The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space. Small symbols are also placed there. Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB. Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target. This is the default for HP-UX.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target. This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register. The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers. This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section. This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value. This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self-relocatable. This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info. This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit. This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-mt\fR" 4
+.IX Item "-mt"
+.PD 0
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+.PD
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. It does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it. These are HP-UX specific flags.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits. These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ldc\fR" 4
+.IX Item "-msched-ldc"
+.PD 0
+.IP "\fB\-mno\-sched\-ldc\fR" 4
+.IX Item "-mno-sched-ldc"
+.PD
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-ldc\fR" 4
+.IX Item "-mno-sched-control-ldc"
+.PD 0
+.IP "\fB\-msched\-control\-ldc\fR" 4
+.IX Item "-msched-control-ldc"
+.PD
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
+.IX Item "-mno-sched-spec-verbose"
+.PD 0
+.IP "\fB\-msched\-spec\-verbose\fR" 4
+.IX Item "-msched-spec-verbose"
+.PD
+(Dis/En)able printing of the information about speculative motions.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator. This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O. You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation. These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers. Note that all modules in a program must
+be compiled with the same value for this option. Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R. This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area. Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections. The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops. This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache. The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture. Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR. ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target. The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR. The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51qe\fR : \fB51qe\fR" 4
+.IX Item "51qe : 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR. Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected. It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR. The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well. These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR. It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used. If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000. This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010. This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020. This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030. This is the default when the compiler is
+configured for 68030\-based systems. It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040. This is the default when the compiler is
+configured for 68040\-based systems. It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040. Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060. This is the default when the compiler is
+configured for 68060\-based systems. It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060. Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0. This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0. This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0. The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0. The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions. This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0. It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets. It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions. If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures. Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR). For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide. This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions. The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR. This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning. This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments. (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table. At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries. This code is
+larger and slower than code generated without this option. On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k. Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs. However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries. If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-nominmax\fR" 4
+.IX Item "-nominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction. (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation. Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much. The default
+value is 0x1000.
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR). Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option. The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above. In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR. Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations. The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR. By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions. This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump. \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide. You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR. This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers. For example, scalar
+floating-point values are returned in \fB\f(CB$f0\fB\fR only, not a
+\&\fB\f(CB$f0\fB\fR/\fB\f(CB$f1\fB\fR pair. The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries. This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker. However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects. Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations. This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR. For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR. The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k. Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\& relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs. If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions. When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs. You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively. \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR. It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+ This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+ This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0. This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes. \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C. \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR. You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section. If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition. If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option. However,
+you may wish to build a library that supports several different
+small data limits. You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR. \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR. For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data. This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections. This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so. This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections. This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators. This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction. Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code. The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0. They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions. \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR. At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch. It later aborts these instructions if the
+predicted outcome was wrong. However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads. As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted. If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data. See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted. \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround. It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\& void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively. \s-1GCC\s0 honors this
+restriction for functions it compiles itself. It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers. This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function. If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches). The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases. A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture. By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
+\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned. When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend. Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR. Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register. The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register. The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited. This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors. This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
+is the default.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors. Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses. This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory. This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0. This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive. This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive. This is the default.
+.IP "\fB\-msplit\fR" 4
+.IX Item "-msplit"
+Generate code for a system with split I&D.
+.IP "\fB\-mno\-split\fR" 4
+.IX Item "-mno-split"
+Generate code for a system without split I&D. This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax. This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR. Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type. Code
+generated with this option will run on any of the other \s-1AE\s0 types. The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type. This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0. Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register. Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used. However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code. These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type. The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations. This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support. This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other. However there is a
+large common subset of instructions supported by both. An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using. The default value of these options is
+determined when configuring \s-1GCC\s0. Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root. Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code. With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option. Unless you are building a cross-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
+\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
+\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBe300c2\fR, \fBe300c3\fR,
+\&\fBe500mc\fR, \fBec603e\fR, \fBG3\fR, \fBG4\fR, \fBG5\fR,
+\&\fBpower\fR, \fBpower2\fR, \fBpower3\fR, \fBpower4\fR,
+\&\fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR, \fBpower7\fR
+\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor. Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec \-mfprnd \-mhard\-float \-mmfcrf \-mmultiple
+\&\-mnew\-mnemonics \-mpopcntb \-mpower \-mpower2 \-mpowerpc64
+\&\-mpowerpc\-gpopt \-mpowerpc\-gfxopt \-msingle\-float \-mdouble\-float
+\&\-msimple\-fpu \-mstring \-mmulhw \-mdlmzb \-mmfpgpr\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities. If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mswdiv\fR" 4
+.IX Item "-mswdiv"
+.PD 0
+.IP "\fB\-mno\-swdiv\fR" 4
+.IX Item "-mno-swdiv"
+.PD
+Generate code to compute division as reciprocal estimate and iterative
+refinement, creating opportunities for increased throughput. This
+feature requires: optional PowerPC Graphics instruction set for single
+precision and \s-1FRE\s0 instruction for double precision, assuming divides
+cannot generate user-visible traps, and the domain values not include
+Infinities, denormals or zero denominator.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set. You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted. An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections. This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated. Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated. Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux). The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant. The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file. The \fB\-mfull\-toc\fR option is selected by
+default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program. \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0. However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
+or both of these options. Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead. This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space. You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs. Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double. Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization. Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
+application written to use message passing with special startup code to
+enable the application to run. The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location. The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit. Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions. These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves. These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location. These instructions are generated by default. If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary. This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating is used.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440 and 464 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440 and 464 processors. This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. If you
+use \fB\-mrelocatable\fR on any module, all objects linked together must
+be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. Modules
+compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
+compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
+with modules compiled with the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode. The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode. The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable. The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling. The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass. The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups. Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups. Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement. This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-solaris\fR" 4
+.IX Item "-mcall-solaris"
+On System V.4 and embedded PowerPC systems compile code for the Solaris
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped. Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments. With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area. The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option. The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section. Put small uninitialized global
+data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however. This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section. By default, \fInum\fR is 8. The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly. On these systems, long calls are unnecessary and
+generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
+addresses represent the callee and the \*(L"branch island\*(R". The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R". The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations. When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions. This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations. When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations. When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions. This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes. Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions. For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR. When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves. When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type. Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR. Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system. This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size. Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions which most probably cause
+a stack overflow. It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays. This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation. The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode. This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available. This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+Increase IEEE-compliance of floating-point code.
+At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
+When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
+comparisons of NANs / infinities incurs extra overhead in every
+floating point comparison, therefore the default is set to
+\&\fB\-ffinite\-math\-only\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write. This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed. Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse. This strategy allows
+cse and hoisting of the inverse calculation. Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends. inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR. This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode. The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap. This will generally generate better
+scheduled code, but is unsafe on current hardware. The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop. For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1. With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register. Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid. Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions. This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation. The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option. In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions. The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions. They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction. Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines. Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment. This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address. Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers. It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment. This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object. Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes. Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.Sp
+This option is only available on SunOS and Solaris.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
+\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\& v7: cypress
+\& v8: supersparc, hypersparc
+\& sparclite: f930, f934, sparclite86x
+\& sparclet: tsc701
+\& v9: ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture. This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips. With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular cpu implementation. Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode. It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register \f(CW%g4\fR points to the base of the data segment. Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references. This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+These switches are supported in addition to the above on Solaris:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations. By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation. \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed. Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change. Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory. With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches. A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits. With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance. \fIn\fR can be a value from 0 to 10. A
+smaller \fIn\fR will insert fewer nops. 10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR. Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint. A branch hint must
+be at least 8 instructions away from the branch it is effecting. \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting. By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function. The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers. The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible. At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler. This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1. The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E. The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e and v850e1 flavors of the v850 architecture. The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs). This option switches from the former to the latter. It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries. The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker. They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls. This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls. This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets. It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behaviour for Cygwin and MinGW targets.
+.IP "\fB\-mcygwin\fR" 4
+.IX Item "-mcygwin"
+This option is available for Cygwin targets. It specifies that
+the Cygwin internal interface is to be used for predefined
+preprocessor macros, C runtime libraries and related linker
+paths and options. For Cygwin targets this is the default behaviour.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mno\-cygwin\fR" 4
+.IX Item "-mno-cygwin"
+This option is available for Cygwin targets. It specifies that
+the MinGW internal interface is to be used instead of Cygwin's, by
+setting MinGW-related predefined macros and linker paths and default
+library options.
+This option is deprecated and will be removed in a future release.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets. It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets. It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets. It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option. This has no effect if the
+floating-point option is not also enabled. Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations. This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR. Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools. The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file. This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size. With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references. This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density. The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions. If there are not enough preceding safe density
+instructions to align a target, no widening will be performed. The
+default is \fB\-mtarget\-align\fR. These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction. This
+translation typically occurs for calls to functions in other source
+files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR. This option should be used in
+programs where the call target can potentially be out of range. This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions. Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.SS "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
+one of the forms is listed\-\-\-the one which is not the default. You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range. This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation. This flag enables some optimizations
+and disables others. This option is enabled by default for the Java
+front-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling. Generates extra code needed to propagate
+exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution. If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it. However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+. You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere. Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions. It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine. The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers. This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target. If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler. In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target. This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory. This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable. This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text. This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine. Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0). The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system). If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table. This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR. The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.Sp
+\&\s-1NOTE:\s0 When \-\-enable\-esp this option is enabled by default
+for C, \*(C+, ObjC, ObjC++, if neither \fB\-fno\-pie\fR or \fB\-fno\-PIE\fR
+or \fB\-fno\-pic\fR or \fB\-fno\-PIC\fR or \fB\-nostdlib\fR or
+\&\fB\-nostartfiles\fR or \fB\-shared\fR are found.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies. This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table. On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register. The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls. It may be allocated for temporaries or
+variables that do not live across a call. Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions. It may be allocated even for temporaries or variables that
+live across a call. Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes. When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions. Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site. (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\& void _\|_cyg_profile_func_enter (void *this_fn,
+\& void *call_site);
+\& void _\|_cyg_profile_func_exit (void *this_fn,
+\& void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions. The profiling calls will indicate where, conceptually, the
+inline function is entered and exited. This means that addressable
+versions of such functions must be available. If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size. If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided. (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done. This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR). If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented. The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys\*(C'\fR
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
+\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation. The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR). The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack. You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that. The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol. If the stack
+would grow beyond the value, a signal is raised. For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fargument\-alias\fR" 4
+.IX Item "-fargument-alias"
+.PD 0
+.IP "\fB\-fargument\-noalias\fR" 4
+.IX Item "-fargument-noalias"
+.IP "\fB\-fargument\-noalias\-global\fR" 4
+.IX Item "-fargument-noalias-global"
+.IP "\fB\-fargument\-noalias\-anything\fR" 4
+.IX Item "-fargument-noalias-anything"
+.PD
+Specify the possible relationships among parameters and between
+parameters and global data.
+.Sp
+\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
+alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
+each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
+alias each other and do not alias global storage.
+\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
+alias any other storage.
+.Sp
+Each language will automatically use whatever option is required by
+the language standard. You should not need to use these options yourself.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file. One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch. Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax. This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default ie; declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications. However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates. Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files. Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions. \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so. These locale categories can be set to any value supported by your
+installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification. \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable. If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler. No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files. For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler. One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line. This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated. Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory. Empty elements can appear at the
+beginning or end of a path. For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler. System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name. Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work. On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against. Failing to supply the correct flags may lead
+to subtle defects. Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1
new file mode 100644
index 0000000..e1d252e
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man1/arm-linux-androideabi-gcov.1
@@ -0,0 +1,653 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCOV 1"
+.TH GCOV 1 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcov \- coverage testing tool
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcov [\fB\-v\fR|\fB\-\-version\fR] [\fB\-h\fR|\fB\-\-help\fR]
+ [\fB\-a\fR|\fB\-\-all\-blocks\fR]
+ [\fB\-b\fR|\fB\-\-branch\-probabilities\fR]
+ [\fB\-c\fR|\fB\-\-branch\-counts\fR]
+ [\fB\-m\fR|\fB\-\-pmu\-profile\fR]
+ [\fB\-n\fR|\fB\-\-no\-output\fR]
+ [\fB\-l\fR|\fB\-\-long\-file\-names\fR]
+ [\fB\-p\fR|\fB\-\-preserve\-paths\fR]
+ [\fB\-q\fR|\fB\-\-pmu_profile\-path\fR]
+ [\fB\-f\fR|\fB\-\-function\-summaries\fR]
+ [\fB\-o\fR|\fB\-\-object\-directory\fR \fIdirectory|file\fR] \fIsourcefiles\fR
+ [\fB\-u\fR|\fB\-\-unconditional\-branches\fR]
+ [\fB\-i\fR|\fB\-\-intermediate\-format\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgcov\fR is a test coverage program. Use it in concert with \s-1GCC\s0
+to analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program. You can use
+\&\fBgcov\fR as a profiling tool to help discover where your
+optimization efforts will best affect your code. You can also use
+\&\fBgcov\fR along with the other profiling tool, \fBgprof\fR, to
+assess which parts of your code use the greatest amount of computing
+time.
+.PP
+Profiling tools help you analyze your code's performance. Using a
+profiler such as \fBgcov\fR or \fBgprof\fR, you can find out some
+basic performance statistics, such as:
+.IP "\(bu" 4
+how often each line of code executes
+.IP "\(bu" 4
+what lines of code are actually executed
+.IP "\(bu" 4
+how much computing time each section of code uses
+.PP
+Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+\&\fBgcov\fR helps you determine where to work on optimization.
+.PP
+Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite. Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+.PP
+You should compile your code without optimization if you plan to use
+\&\fBgcov\fR because the optimization, by combining some lines of code
+into one function, may not give you as much information as you need to
+look for `hot spots' where the code is using a great deal of computer
+time. Likewise, because \fBgcov\fR accumulates statistics by line (at
+the lowest resolution), it works best with a programming style that
+places only one statement on each line. If you use complicated macros
+that expand to loops or to other control structures, the statistics are
+less helpful\-\-\-they only report on the line where the macro call
+appears. If your complex macros behave like functions, you can replace
+them with inline functions to solve this problem.
+.PP
+\&\fBgcov\fR creates a logfile called \fI\fIsourcefile\fI.gcov\fR which
+indicates how many times each line of a source file \fI\fIsourcefile\fI.c\fR
+has executed. You can use these logfiles along with \fBgprof\fR to aid
+in fine-tuning the performance of your programs. \fBgprof\fR gives
+timing information you can use along with the information you get from
+\&\fBgcov\fR.
+.PP
+\&\fBgcov\fR works only on code compiled with \s-1GCC\s0. It is not
+compatible with any other profiling or test coverage mechanism.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display help about using \fBgcov\fR (on the standard output), and
+exit without doing any further processing.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the \fBgcov\fR version number (on the standard output),
+and exit without doing any further processing.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\-blocks\fR" 4
+.IX Item "--all-blocks"
+.PD
+Write individual execution counts for every basic block. Normally gcov
+outputs execution counts only for the main blocks of a line. With this
+option you can determine if blocks within a single line are not being
+executed.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-branch\-probabilities\fR" 4
+.IX Item "--branch-probabilities"
+.PD
+Write branch frequencies to the output file, and write branch summary
+info to the standard output. This option allows you to see how often
+each branch in your program was taken. Unconditional branches will not
+be shown, unless the \fB\-u\fR option is given.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-branch\-counts\fR" 4
+.IX Item "--branch-counts"
+.PD
+Write branch frequencies as the number of branches taken, rather than
+the percentage of branches taken.
+.IP "\fB\-m\fR" 4
+.IX Item "-m"
+.PD 0
+.IP "\fB\-\-pmu\-profile\fR" 4
+.IX Item "--pmu-profile"
+.PD
+Output the additional \s-1PMU\s0 profile information if available.
+.IP "\fB\-q\fR" 4
+.IX Item "-q"
+.PD 0
+.IP "\fB\-\-pmu_profile\-path\fR" 4
+.IX Item "--pmu_profile-path"
+.PD
+\&\s-1PMU\s0 profile path (default \fIpmuprofile.gcda\fR).
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-output\fR" 4
+.IX Item "--no-output"
+.PD
+Do not create the \fBgcov\fR output file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-long\-file\-names\fR" 4
+.IX Item "--long-file-names"
+.PD
+Create long file names for included source files. For example, if the
+header file \fIx.h\fR contains code, and was included in the file
+\&\fIa.c\fR, then running \fBgcov\fR on the file \fIa.c\fR will produce
+an output file called \fIa.c##x.h.gcov\fR instead of \fIx.h.gcov\fR.
+This can be useful if \fIx.h\fR is included in multiple source
+files. If you use the \fB\-p\fR option, both the including and
+included file names will be complete path names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-paths\fR" 4
+.IX Item "--preserve-paths"
+.PD
+Preserve complete path information in the names of generated
+\&\fI.gcov\fR files. Without this option, just the filename component is
+used. With this option, all directories are used, with \fB/\fR characters
+translated to \fB#\fR characters, \fI.\fR directory components
+removed and \fI..\fR
+components renamed to \fB^\fR. This is useful if sourcefiles are in several
+different directories. It also affects the \fB\-l\fR option.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-function\-summaries\fR" 4
+.IX Item "--function-summaries"
+.PD
+Output summaries for each function in addition to the file level summary.
+.IP "\fB\-o\fR \fIdirectory|file\fR" 4
+.IX Item "-o directory|file"
+.PD 0
+.IP "\fB\-\-object\-directory\fR \fIdirectory\fR" 4
+.IX Item "--object-directory directory"
+.IP "\fB\-\-object\-file\fR \fIfile\fR" 4
+.IX Item "--object-file file"
+.PD
+Specify either the directory containing the gcov data files, or the
+object path name. The \fI.gcno\fR, and
+\&\fI.gcda\fR data files are searched for using this option. If a directory
+is specified, the data files are in that directory and named after the
+source file name, without its extension. If a file is specified here,
+the data files are named after that file, without its extension. If this
+option is not supplied, it defaults to the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unconditional\-branches\fR" 4
+.IX Item "--unconditional-branches"
+.PD
+When branch probabilities are given, include those of unconditional branches.
+Unconditional branches are normally not interesting.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-intermediate\-format\fR" 4
+.IX Item "--intermediate-format"
+.PD
+Output gcov file in an intermediate text format that can be used by
+\&\fBlcov\fR or other applications. It will output a single *.gcov file per
+*gcda file. No source code required.
+.PP
+\&\fBgcov\fR should be run with the current directory the same as that
+when you invoked the compiler. Otherwise it will not be able to locate
+the source files. \fBgcov\fR produces files called
+\&\fI\fImangledname\fI.gcov\fR in the current directory. These contain
+the coverage information of the source file they correspond to.
+One \fI.gcov\fR file is produced for each source file containing code,
+which was compiled to produce the data files. The \fImangledname\fR part
+of the output file name is usually simply the source file name, but can
+be something more complicated if the \fB\-l\fR or \fB\-p\fR options are
+given. Refer to those options for details.
+.PP
+The \fI.gcov\fR files contain the \fB:\fR separated fields along with
+program source code. The format is
+.PP
+.Vb 1
+\& <execution_count>:<line_number>:<source line text>
+.Ve
+.PP
+Additional block information may succeed each line, when requested by
+command line option. The \fIexecution_count\fR is \fB\-\fR for lines
+containing no code and \fB#####\fR for lines which were never executed.
+Some lines of information at the start have \fIline_number\fR of zero.
+.PP
+The preamble lines are of the form
+.PP
+.Vb 1
+\& \-:0:<tag>:<value>
+.Ve
+.PP
+The ordering and number of these preamble lines will be augmented as
+\&\fBgcov\fR development progresses \-\-\- do not rely on them remaining
+unchanged. Use \fItag\fR to locate a particular preamble line.
+.PP
+The additional block information is of the form
+.PP
+.Vb 1
+\& <tag> <information>
+.Ve
+.PP
+The \fIinformation\fR is human readable, but designed to be simple
+enough for machine parsing too.
+.PP
+When printing percentages, 0% and 100% are only printed when the values
+are \fIexactly\fR 0% and 100% respectively. Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+.PP
+When using \fBgcov\fR, you must first compile your program with two
+special \s-1GCC\s0 options: \fB\-fprofile\-arcs \-ftest\-coverage\fR.
+This tells the compiler to generate additional information needed by
+gcov (basically a flow graph of the program) and also includes
+additional code in the object files for generating the extra profiling
+information needed by gcov. These additional files are placed in the
+directory where the object file is located.
+.PP
+Running the program will cause profile output to be generated. For each
+source file compiled with \fB\-fprofile\-arcs\fR, an accompanying
+\&\fI.gcda\fR file will be placed in the object file directory.
+.PP
+Running \fBgcov\fR with your program's source file names as arguments
+will now produce a listing of the code along with frequency of execution
+for each line. For example, if your program is called \fItmp.c\fR, this
+is what you see when you use the basic \fBgcov\fR facility:
+.PP
+.Vb 5
+\& $ gcc \-fprofile\-arcs \-ftest\-coverage tmp.c
+\& $ a.out
+\& $ gcov tmp.c
+\& 90.00% of 10 source lines executed in file tmp.c
+\& Creating tmp.c.gcov.
+.Ve
+.PP
+The file \fItmp.c.gcov\fR contains output from \fBgcov\fR.
+Here is a sample:
+.PP
+.Vb 10
+\& \-: 0:Source:tmp.c
+\& \-: 0:Graph:tmp.gcno
+\& \-: 0:Data:tmp.gcda
+\& \-: 0:Runs:1
+\& \-: 0:Programs:1
+\& \-: 1:#include <stdio.h>
+\& \-: 2:
+\& \-: 3:int main (void)
+\& 1: 4:{
+\& 1: 5: int i, total;
+\& \-: 6:
+\& 1: 7: total = 0;
+\& \-: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& 10: 10: total += i;
+\& \-: 11:
+\& 1: 12: if (total != 45)
+\& #####: 13: printf ("Failure\en");
+\& \-: 14: else
+\& 1: 15: printf ("Success\en");
+\& 1: 16: return 0;
+\& \-: 17:}
+.Ve
+.PP
+When you use the \fB\-a\fR option, you will get individual block
+counts, and the output looks like this:
+.PP
+.Vb 10
+\& \-: 0:Source:tmp.c
+\& \-: 0:Graph:tmp.gcno
+\& \-: 0:Data:tmp.gcda
+\& \-: 0:Runs:1
+\& \-: 0:Programs:1
+\& \-: 1:#include <stdio.h>
+\& \-: 2:
+\& \-: 3:int main (void)
+\& 1: 4:{
+\& 1: 4\-block 0
+\& 1: 5: int i, total;
+\& \-: 6:
+\& 1: 7: total = 0;
+\& \-: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& 11: 9\-block 0
+\& 10: 10: total += i;
+\& 10: 10\-block 0
+\& \-: 11:
+\& 1: 12: if (total != 45)
+\& 1: 12\-block 0
+\& #####: 13: printf ("Failure\en");
+\& $$$$$: 13\-block 0
+\& \-: 14: else
+\& 1: 15: printf ("Success\en");
+\& 1: 15\-block 0
+\& 1: 16: return 0;
+\& 1: 16\-block 0
+\& \-: 17:}
+.Ve
+.PP
+In this mode, each basic block is only shown on one line \*(-- the last
+line of the block. A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown
+to contain code, unless previous blocks end on those lines.
+The total execution count of a line is shown and subsequent lines show
+the execution counts for individual blocks that end on that line. After each
+block, the branch and call counts of the block will be shown, if the
+\&\fB\-b\fR option is given.
+.PP
+Because of the way \s-1GCC\s0 instruments calls, a call count can be shown
+after a line with no individual blocks.
+As you can see, line 13 contains a basic block that was not executed.
+.PP
+When you use the \fB\-b\fR option, your output looks like this:
+.PP
+.Vb 6
+\& $ gcov \-b tmp.c
+\& 90.00% of 10 source lines executed in file tmp.c
+\& 80.00% of 5 branches executed in file tmp.c
+\& 80.00% of 5 branches taken at least once in file tmp.c
+\& 50.00% of 2 calls executed in file tmp.c
+\& Creating tmp.c.gcov.
+.Ve
+.PP
+Here is a sample of a resulting \fItmp.c.gcov\fR file:
+.PP
+.Vb 10
+\& \-: 0:Source:tmp.c
+\& \-: 0:Graph:tmp.gcno
+\& \-: 0:Data:tmp.gcda
+\& \-: 0:Runs:1
+\& \-: 0:Programs:1
+\& \-: 1:#include <stdio.h>
+\& \-: 2:
+\& \-: 3:int main (void)
+\& function main called 1 returned 1 blocks executed 75%
+\& 1: 4:{
+\& 1: 5: int i, total;
+\& \-: 6:
+\& 1: 7: total = 0;
+\& \-: 8:
+\& 11: 9: for (i = 0; i < 10; i++)
+\& branch 0 taken 91% (fallthrough)
+\& branch 1 taken 9%
+\& 10: 10: total += i;
+\& \-: 11:
+\& 1: 12: if (total != 45)
+\& branch 0 taken 0% (fallthrough)
+\& branch 1 taken 100%
+\& #####: 13: printf ("Failure\en");
+\& call 0 never executed
+\& \-: 14: else
+\& 1: 15: printf ("Success\en");
+\& call 0 called 1 returned 100%
+\& 1: 16: return 0;
+\& \-: 17:}
+.Ve
+.PP
+For each function, a line is printed showing how many times the function
+is called, how many times it returns and what percentage of the
+function's blocks were executed.
+.PP
+For each basic block, a line is printed after the last line of the basic
+block describing the branch or call that ends the basic block. There can
+be multiple branches and calls listed for a single source line if there
+are multiple basic blocks that end on that line. In this case, the
+branches and calls are each given a number. There is no simple way to map
+these branches and calls back to source constructs. In general, though,
+the lowest numbered branch or call will correspond to the leftmost construct
+on the source line.
+.PP
+For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed. Otherwise, the
+message \*(L"never executed\*(R" is printed.
+.PP
+For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed. This will usually be
+100%, but may be less for functions that call \f(CW\*(C`exit\*(C'\fR or \f(CW\*(C`longjmp\*(C'\fR,
+and thus may not return every time they are called.
+.PP
+The execution counts are cumulative. If the example program were
+executed again without removing the \fI.gcda\fR file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s). This is potentially useful in
+several ways. For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+.PP
+The data in the \fI.gcda\fR files is saved immediately before the program
+exits. For each source file compiled with \fB\-fprofile\-arcs\fR, the
+profiling code first attempts to read in an existing \fI.gcda\fR file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file. It then adds in the
+new execution counts and finally writes the data to the file.
+.SS "Using \fBgcov\fP with \s-1GCC\s0 Optimization"
+.IX Subsection "Using gcov with GCC Optimization"
+If you plan to use \fBgcov\fR to help optimize your code, you must
+first compile your program with two special \s-1GCC\s0 options:
+\&\fB\-fprofile\-arcs \-ftest\-coverage\fR. Aside from that, you can use any
+other \s-1GCC\s0 options; but if you want to prove that every single line
+in your program was executed, you should not compile with optimization
+at the same time. On some machines the optimizer can eliminate some
+simple code lines by combining them with other lines. For example, code
+like this:
+.PP
+.Vb 4
+\& if (a != b)
+\& c = 1;
+\& else
+\& c = 0;
+.Ve
+.PP
+can be compiled into one instruction on some machines. In this case,
+there is no way for \fBgcov\fR to calculate separate execution counts
+for each line because there isn't separate code for each line. Hence
+the \fBgcov\fR output looks like this if you compiled the program with
+optimization:
+.PP
+.Vb 4
+\& 100: 12:if (a != b)
+\& 100: 13: c = 1;
+\& 100: 14:else
+\& 100: 15: c = 0;
+.Ve
+.PP
+The output shows that this block of code, combined by optimization,
+executed 100 times. In one sense this result is correct, because there
+was only one instruction representing all four of these lines. However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+.PP
+Inlineable functions can create unexpected line counts. Line counts are
+shown for the source code of the inlineable function, but what is shown
+depends on where the function is inlined, or if it is not inlined at all.
+.PP
+If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it. If
+\&\fIfileA.o\fR and \fIfileB.o\fR both contain out of line bodies of a
+particular inlineable function, they will also both contain coverage
+counts for that function. When \fIfileA.o\fR and \fIfileB.o\fR are
+linked together, the linker will, on many systems, select one of those
+out of line bodies for all calls to that function, and remove or ignore
+the other. Unfortunately, it will not remove the coverage counters for
+the unused function body. Hence when instrumented, all but one use of
+that function will show zero counts.
+.PP
+If the function is inlined in several places, the block structure in
+each location might not be the same. For instance, a condition might
+now be calculable at compile time in some instances. Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+2008 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below). A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\& A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\& You have freedom to copy and modify this GNU Manual, like GNU
+\& software. Copies published by the Free Software Foundation raise
+\& funds for GNU development.
+.Ve
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7
new file mode 100644
index 0000000..ce645e7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/fsf-funding.7
@@ -0,0 +1,184 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
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+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
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+.\" nothing in troff, for use with C<>.
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+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
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+. \" simple accents for nroff and troff
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+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
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+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "FSF-FUNDING 7"
+.TH FSF-FUNDING 7 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+fsf\-funding \- Funding Free Software
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "Funding Free Software"
+.IX Subsection "Funding Free Software"
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development. The most effective approach known is to encourage
+commercial redistributors to donate.
+.PP
+Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers\-\-\-the Free Software Foundation, and others.
+.PP
+The way to convince distributors to do this is to demand it and expect
+it from them. So when you compare distributors, judge them partly by
+how much they give to free software development. Show distributors
+they must compete to be the one who gives the most.
+.PP
+To make this approach work, you must insist on numbers that you can
+compare, such as, \*(L"We will donate ten dollars to the Frobnitz project
+for each disk sold.\*(R" Don't be satisfied with a vague promise, such as
+\&\*(L"A portion of the profits are donated,\*(R" since it doesn't give a basis
+for comparison.
+.PP
+Even a precise fraction \*(L"of the profits from this disk\*(R" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is \f(CW$50\fR, ten percent of the profit is probably
+less than a dollar; it might be a few cents, or nothing at all.
+.PP
+Some redistributors do development work themselves. This is useful too;
+but to keep everyone honest, you need to inquire how much they do, and
+what kind. Some kinds of development make much more long-term
+difference than others. For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much. Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new \s-1CPU\s0 to the \s-1GNU\s0 Compiler Collection contribute more;
+major new features or packages contribute the most.
+.PP
+By establishing the idea that supporting further development is \*(L"the
+proper thing to do\*(R" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1994 Free Software Foundation, Inc.
+Verbatim copying and redistribution of this section is permitted
+without royalty; alteration is not permitted.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7
new file mode 100644
index 0000000..3f7b5e0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gfdl.7
@@ -0,0 +1,583 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
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+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
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+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
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+. ds d- d\h'-1'\(ga
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+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GFDL 7"
+.TH GFDL 7 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gfdl \- GNU Free Documentation License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "\s-1GNU\s0 Free Documentation License"
+.IX Subsection "GNU Free Documentation License"
+.SS "Version 1.2, November 2002"
+.IX Subsection "Version 1.2, November 2002"
+.Vb 2
+\& Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+\& 51 Franklin Street, Fifth Floor, Boston, MA 02110\-1301, USA
+\&
+\& Everyone is permitted to copy and distribute verbatim copies
+\& of this license document, but changing it is not allowed.
+.Ve
+.IP "0." 4
+.IX Item "0."
+\&\s-1PREAMBLE\s0
+.Sp
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document \fIfree\fR in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+.Sp
+This License is a kind of \*(L"copyleft\*(R", which means that derivative
+works of the document must themselves be free in the same sense. It
+complements the \s-1GNU\s0 General Public License, which is a copyleft
+license designed for free software.
+.Sp
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does. But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book. We recommend this License
+principally for works whose purpose is instruction or reference.
+.IP "1." 4
+.IX Item "1."
+\&\s-1APPLICABILITY\s0 \s-1AND\s0 \s-1DEFINITIONS\s0
+.Sp
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License. Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein. The \*(L"Document\*(R", below,
+refers to any such manual or work. Any member of the public is a
+licensee, and is addressed as \*(L"you\*(R". You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+.Sp
+A \*(L"Modified Version\*(R" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+.Sp
+A \*(L"Secondary Section\*(R" is a named appendix or a front-matter section
+of the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall
+subject (or to related matters) and contains nothing that could fall
+directly within that overall subject. (Thus, if the Document is in
+part a textbook of mathematics, a Secondary Section may not explain
+any mathematics.) The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+.Sp
+The \*(L"Invariant Sections\*(R" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License. If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant. The Document may contain zero
+Invariant Sections. If the Document does not identify any Invariant
+Sections then there are none.
+.Sp
+The \*(L"Cover Texts\*(R" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License. A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+.Sp
+A \*(L"Transparent\*(R" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters. A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text. A copy that is not \*(L"Transparent\*(R" is called \*(L"Opaque\*(R".
+.Sp
+Examples of suitable formats for Transparent copies include plain
+\&\s-1ASCII\s0 without markup, Texinfo input format, LaTeX input
+format, \f(CW@acronym\fR{\s-1SGML\s0} or \f(CW@acronym\fR{\s-1XML\s0} using a publicly available
+\&\f(CW@acronym\fR{\s-1DTD\s0}, and standard-conforming simple \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} designed for human modification. Examples
+of transparent image formats include \f(CW@acronym\fR{\s-1PNG\s0}, \f(CW@acronym\fR{\s-1XCF\s0} and
+\&\f(CW@acronym\fR{\s-1JPG\s0}. Opaque formats include proprietary formats that can be
+read and edited only by proprietary word processors, \f(CW@acronym\fR{\s-1SGML\s0} or
+\&\f(CW@acronym\fR{\s-1XML\s0} for which the \f(CW@acronym\fR{\s-1DTD\s0} and/or processing tools are
+not generally available, and the machine-generated \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} produced by some word processors for
+output purposes only.
+.Sp
+The \*(L"Title Page\*(R" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page. For works in
+formats which do not have any title page as such, \*(L"Title Page\*(R" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+.Sp
+A section \*(L"Entitled \s-1XYZ\s0\*(R" means a named subunit of the Document whose
+title either is precisely \s-1XYZ\s0 or contains \s-1XYZ\s0 in parentheses following
+text that translates \s-1XYZ\s0 in another language. (Here \s-1XYZ\s0 stands for a
+specific section name mentioned below, such as \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", \*(L"Endorsements\*(R", or \*(L"History\*(R".) To \*(L"Preserve the Title\*(R"
+of such a section when you modify the Document means that it remains a
+section \*(L"Entitled \s-1XYZ\s0\*(R" according to this definition.
+.Sp
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document. These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+.IP "2." 4
+.IX Item "2."
+\&\s-1VERBATIM\s0 \s-1COPYING\s0
+.Sp
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License. You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute. However, you may accept
+compensation in exchange for copies. If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+.Sp
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+.IP "3." 4
+.IX Item "3."
+\&\s-1COPYING\s0 \s-1IN\s0 \s-1QUANTITY\s0
+.Sp
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover. Both covers must also clearly and legibly identify
+you as the publisher of these copies. The front cover must present
+the full title with all words of the title equally prominent and
+visible. You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+.Sp
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+.Sp
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+.Sp
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+.IP "4." 4
+.IX Item "4."
+\&\s-1MODIFICATIONS\s0
+.Sp
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it. In addition, you must do these things in the Modified Version:
+.RS 4
+.IP "A." 4
+.IX Item "A."
+Use in the Title Page (and on the covers, if any) a title distinct
+from that of the Document, and from those of previous versions
+(which should, if there were any, be listed in the History section
+of the Document). You may use the same title as a previous version
+if the original publisher of that version gives permission.
+.IP "B." 4
+.IX Item "B."
+List on the Title Page, as authors, one or more persons or entities
+responsible for authorship of the modifications in the Modified
+Version, together with at least five of the principal authors of the
+Document (all of its principal authors, if it has fewer than five),
+unless they release you from this requirement.
+.IP "C." 4
+.IX Item "C."
+State on the Title page the name of the publisher of the
+Modified Version, as the publisher.
+.IP "D." 4
+.IX Item "D."
+Preserve all the copyright notices of the Document.
+.IP "E." 4
+.IX Item "E."
+Add an appropriate copyright notice for your modifications
+adjacent to the other copyright notices.
+.IP "F." 4
+.IX Item "F."
+Include, immediately after the copyright notices, a license notice
+giving the public permission to use the Modified Version under the
+terms of this License, in the form shown in the Addendum below.
+.IP "G." 4
+.IX Item "G."
+Preserve in that license notice the full lists of Invariant Sections
+and required Cover Texts given in the Document's license notice.
+.IP "H." 4
+.IX Item "H."
+Include an unaltered copy of this License.
+.IP "I." 4
+.IX Item "I."
+Preserve the section Entitled \*(L"History\*(R", Preserve its Title, and add
+to it an item stating at least the title, year, new authors, and
+publisher of the Modified Version as given on the Title Page. If
+there is no section Entitled \*(L"History\*(R" in the Document, create one
+stating the title, year, authors, and publisher of the Document as
+given on its Title Page, then add an item describing the Modified
+Version as stated in the previous sentence.
+.IP "J." 4
+.IX Item "J."
+Preserve the network location, if any, given in the Document for
+public access to a Transparent copy of the Document, and likewise
+the network locations given in the Document for previous versions
+it was based on. These may be placed in the \*(L"History\*(R" section.
+You may omit a network location for a work that was published at
+least four years before the Document itself, or if the original
+publisher of the version it refers to gives permission.
+.IP "K." 4
+.IX Item "K."
+For any section Entitled \*(L"Acknowledgements\*(R" or \*(L"Dedications\*(R", Preserve
+the Title of the section, and preserve in the section all the
+substance and tone of each of the contributor acknowledgements and/or
+dedications given therein.
+.IP "L." 4
+.IX Item "L."
+Preserve all the Invariant Sections of the Document,
+unaltered in their text and in their titles. Section numbers
+or the equivalent are not considered part of the section titles.
+.IP "M." 4
+.IX Item "M."
+Delete any section Entitled \*(L"Endorsements\*(R". Such a section
+may not be included in the Modified Version.
+.IP "N." 4
+.IX Item "N."
+Do not retitle any existing section to be Entitled \*(L"Endorsements\*(R" or
+to conflict in title with any Invariant Section.
+.IP "O." 4
+.IX Item "O."
+Preserve any Warranty Disclaimers.
+.RE
+.RS 4
+.Sp
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant. To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+.Sp
+You may add a section Entitled \*(L"Endorsements\*(R", provided it contains
+nothing but endorsements of your Modified Version by various
+parties\-\-\-for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+.Sp
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version. Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity. If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+.Sp
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+.RE
+.IP "5." 4
+.IX Item "5."
+\&\s-1COMBINING\s0 \s-1DOCUMENTS\s0
+.Sp
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+.Sp
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy. If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+.Sp
+In the combination, you must combine any sections Entitled \*(L"History\*(R"
+in the various original documents, forming one section Entitled
+\&\*(L"History\*(R"; likewise combine any sections Entitled \*(L"Acknowledgements\*(R",
+and any sections Entitled \*(L"Dedications\*(R". You must delete all
+sections Entitled \*(L"Endorsements.\*(R"
+.IP "6." 4
+.IX Item "6."
+\&\s-1COLLECTIONS\s0 \s-1OF\s0 \s-1DOCUMENTS\s0
+.Sp
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+.Sp
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+.IP "7." 4
+.IX Item "7."
+\&\s-1AGGREGATION\s0 \s-1WITH\s0 \s-1INDEPENDENT\s0 \s-1WORKS\s0
+.Sp
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an \*(L"aggregate\*(R" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+.Sp
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+.IP "8." 4
+.IX Item "8."
+\&\s-1TRANSLATION\s0
+.Sp
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections. You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers. In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+.Sp
+If a section in the Document is Entitled \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", or \*(L"History\*(R", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+.IP "9." 4
+.IX Item "9."
+\&\s-1TERMINATION\s0
+.Sp
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License. Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License. However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+.IP "10." 4
+.IX Item "10."
+\&\s-1FUTURE\s0 \s-1REVISIONS\s0 \s-1OF\s0 \s-1THIS\s0 \s-1LICENSE\s0
+.Sp
+The Free Software Foundation may publish new, revised versions
+of the \s-1GNU\s0 Free Documentation License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns. See
+<\fBhttp://www.gnu.org/copyleft/\fR>.
+.Sp
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation. If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+.SS "\s-1ADDENDUM:\s0 How to use this License for your documents"
+.IX Subsection "ADDENDUM: How to use this License for your documents"
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+.PP
+.Vb 7
+\& Copyright (C) <year> <your name>.
+\& Permission is granted to copy, distribute and/or modify this document
+\& under the terms of the GNU Free Documentation License, Version 1.2
+\& or any later version published by the Free Software Foundation;
+\& with no Invariant Sections, no Front\-Cover Texts, and no Back\-Cover
+\& Texts. A copy of the license is included in the section entitled "GNU
+\& Free Documentation License".
+.Ve
+.PP
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the \*(L"with...Texts.\*(R" line with this:
+.PP
+.Vb 3
+\& with the Invariant Sections being <list their titles>, with
+\& the Front\-Cover Texts being <list>, and with the Back\-Cover Texts
+\& being <list>.
+.Ve
+.PP
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+.PP
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the \s-1GNU\s0 General Public License,
+to permit their use in free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+51 Franklin Street, Fifth Floor, Boston, \s-1MA\s0 02110\-1301, \s-1USA\s0
+.PP
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7
new file mode 100644
index 0000000..7a9f6f2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/man/man7/gpl.7
@@ -0,0 +1,841 @@
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+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
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+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
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+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPL 7"
+.TH GPL 7 " " "gcc-4.4.3" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gpl \- GNU General Public License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "\s-1GNU\s0 General Public License"
+.IX Subsection "GNU General Public License"
+.SS "Version 3, 29 June 2007"
+.IX Subsection "Version 3, 29 June 2007"
+.Vb 1
+\& Copyright (c) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+\&
+\& Everyone is permitted to copy and distribute verbatim copies of this
+\& license document, but changing it is not allowed.
+.Ve
+.SS "Preamble"
+.IX Subsection "Preamble"
+The \s-1GNU\s0 General Public License is a free, copyleft license for
+software and other kinds of works.
+.PP
+The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works. By contrast,
+the \s-1GNU\s0 General Public License is intended to guarantee your freedom
+to share and change all versions of a program\*(--to make sure it remains
+free software for all its users. We, the Free Software Foundation,
+use the \s-1GNU\s0 General Public License for most of our software; it
+applies also to any other work released this way by its authors. You
+can apply it to your programs, too.
+.PP
+When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+.PP
+To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights. Therefore, you
+have certain responsibilities if you distribute copies of the
+software, or if you modify it: responsibilities to respect the freedom
+of others.
+.PP
+For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received. You must make sure that they, too,
+receive or can get the source code. And you must show them these
+terms so they know their rights.
+.PP
+Developers that use the \s-1GNU\s0 \s-1GPL\s0 protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+.PP
+For the developers' and authors' protection, the \s-1GPL\s0 clearly explains
+that there is no warranty for this free software. For both users' and
+authors' sake, the \s-1GPL\s0 requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+.PP
+Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so. This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software. The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the \s-1GPL\s0 to prohibit the
+practice for those products. If such problems arise substantially in
+other domains, we stand ready to extend this provision to those
+domains in future versions of the \s-1GPL\s0, as needed to protect the
+freedom of users.
+.PP
+Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish
+to avoid the special danger that patents applied to a free program
+could make it effectively proprietary. To prevent this, the \s-1GPL\s0
+assures that patents cannot be used to render the program non-free.
+.PP
+The precise terms and conditions for copying, distribution and
+modification follow.
+.SS "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "TERMS AND CONDITIONS"
+.IP "0. Definitions." 4
+.IX Item "0. Definitions."
+\&\*(L"This License\*(R" refers to version 3 of the \s-1GNU\s0 General Public License.
+.Sp
+\&\*(L"Copyright\*(R" also means copyright-like laws that apply to other kinds
+of works, such as semiconductor masks.
+.Sp
+\&\*(L"The Program\*(R" refers to any copyrightable work licensed under this
+License. Each licensee is addressed as \*(L"you\*(R". \*(L"Licensees\*(R" and
+\&\*(L"recipients\*(R" may be individuals or organizations.
+.Sp
+To \*(L"modify\*(R" a work means to copy from or adapt all or part of the work
+in a fashion requiring copyright permission, other than the making of
+an exact copy. The resulting work is called a \*(L"modified version\*(R" of
+the earlier work or a work \*(L"based on\*(R" the earlier work.
+.Sp
+A \*(L"covered work\*(R" means either the unmodified Program or a work based
+on the Program.
+.Sp
+To \*(L"propagate\*(R" a work means to do anything with it that, without
+permission, would make you directly or secondarily liable for
+infringement under applicable copyright law, except executing it on a
+computer or modifying a private copy. Propagation includes copying,
+distribution (with or without modification), making available to the
+public, and in some countries other activities as well.
+.Sp
+To \*(L"convey\*(R" a work means any kind of propagation that enables other
+parties to make or receive copies. Mere interaction with a user
+through a computer network, with no transfer of a copy, is not
+conveying.
+.Sp
+An interactive user interface displays \*(L"Appropriate Legal Notices\*(R" to
+the extent that it includes a convenient and prominently visible
+feature that (1) displays an appropriate copyright notice, and (2)
+tells the user that there is no warranty for the work (except to the
+extent that warranties are provided), that licensees may convey the
+work under this License, and how to view a copy of this License. If
+the interface presents a list of user commands or options, such as a
+menu, a prominent item in the list meets this criterion.
+.IP "1. Source Code." 4
+.IX Item "1. Source Code."
+The \*(L"source code\*(R" for a work means the preferred form of the work for
+making modifications to it. \*(L"Object code\*(R" means any non-source form
+of a work.
+.Sp
+A \*(L"Standard Interface\*(R" means an interface that either is an official
+standard defined by a recognized standards body, or, in the case of
+interfaces specified for a particular programming language, one that
+is widely used among developers working in that language.
+.Sp
+The \*(L"System Libraries\*(R" of an executable work include anything, other
+than the work as a whole, that (a) is included in the normal form of
+packaging a Major Component, but which is not part of that Major
+Component, and (b) serves only to enable use of the work with that
+Major Component, or to implement a Standard Interface for which an
+implementation is available to the public in source code form. A
+\&\*(L"Major Component\*(R", in this context, means a major essential component
+(kernel, window system, and so on) of the specific operating system
+(if any) on which the executable work runs, or a compiler used to
+produce the work, or an object code interpreter used to run it.
+.Sp
+The \*(L"Corresponding Source\*(R" for a work in object code form means all
+the source code needed to generate, install, and (for an executable
+work) run the object code and to modify the work, including scripts to
+control those activities. However, it does not include the work's
+System Libraries, or general-purpose tools or generally available free
+programs which are used unmodified in performing those activities but
+which are not part of the work. For example, Corresponding Source
+includes interface definition files associated with source files for
+the work, and the source code for shared libraries and dynamically
+linked subprograms that the work is specifically designed to require,
+such as by intimate data communication or control flow between those
+subprograms and other parts of the work.
+.Sp
+The Corresponding Source need not include anything that users can
+regenerate automatically from other parts of the Corresponding Source.
+.Sp
+The Corresponding Source for a work in source code form is that same
+work.
+.IP "2. Basic Permissions." 4
+.IX Item "2. Basic Permissions."
+All rights granted under this License are granted for the term of
+copyright on the Program, and are irrevocable provided the stated
+conditions are met. This License explicitly affirms your unlimited
+permission to run the unmodified Program. The output from running a
+covered work is covered by this License only if the output, given its
+content, constitutes a covered work. This License acknowledges your
+rights of fair use or other equivalent, as provided by copyright law.
+.Sp
+You may make, run and propagate covered works that you do not convey,
+without conditions so long as your license otherwise remains in force.
+You may convey covered works to others for the sole purpose of having
+them make modifications exclusively for you, or provide you with
+facilities for running those works, provided that you comply with the
+terms of this License in conveying all material for which you do not
+control copyright. Those thus making or running the covered works for
+you must do so exclusively on your behalf, under your direction and
+control, on terms that prohibit them from making any copies of your
+copyrighted material outside their relationship with you.
+.Sp
+Conveying under any other circumstances is permitted solely under the
+conditions stated below. Sublicensing is not allowed; section 10
+makes it unnecessary.
+.IP "3. Protecting Users' Legal Rights From Anti-Circumvention Law." 4
+.IX Item "3. Protecting Users' Legal Rights From Anti-Circumvention Law."
+No covered work shall be deemed part of an effective technological
+measure under any applicable law fulfilling obligations under article
+11 of the \s-1WIPO\s0 copyright treaty adopted on 20 December 1996, or
+similar laws prohibiting or restricting circumvention of such
+measures.
+.Sp
+When you convey a covered work, you waive any legal power to forbid
+circumvention of technological measures to the extent such
+circumvention is effected by exercising rights under this License with
+respect to the covered work, and you disclaim any intention to limit
+operation or modification of the work as a means of enforcing, against
+the work's users, your or third parties' legal rights to forbid
+circumvention of technological measures.
+.IP "4. Conveying Verbatim Copies." 4
+.IX Item "4. Conveying Verbatim Copies."
+You may convey verbatim copies of the Program's source code as you
+receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice;
+keep intact all notices stating that this License and any
+non-permissive terms added in accord with section 7 apply to the code;
+keep intact all notices of the absence of any warranty; and give all
+recipients a copy of this License along with the Program.
+.Sp
+You may charge any price or no price for each copy that you convey,
+and you may offer support or warranty protection for a fee.
+.IP "5. Conveying Modified Source Versions." 4
+.IX Item "5. Conveying Modified Source Versions."
+You may convey a work based on the Program, or the modifications to
+produce it from the Program, in the form of source code under the
+terms of section 4, provided that you also meet all of these
+conditions:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+The work must carry prominent notices stating that you modified it,
+and giving a relevant date.
+.IP "b." 4
+.IX Item "b."
+The work must carry prominent notices stating that it is released
+under this License and any conditions added under section 7. This
+requirement modifies the requirement in section 4 to \*(L"keep intact all
+notices\*(R".
+.IP "c." 4
+.IX Item "c."
+You must license the entire work, as a whole, under this License to
+anyone who comes into possession of a copy. This License will
+therefore apply, along with any applicable section 7 additional terms,
+to the whole of the work, and all its parts, regardless of how they
+are packaged. This License gives no permission to license the work in
+any other way, but it does not invalidate such permission if you have
+separately received it.
+.IP "d." 4
+.IX Item "d."
+If the work has interactive user interfaces, each must display
+Appropriate Legal Notices; however, if the Program has interactive
+interfaces that do not display Appropriate Legal Notices, your work
+need not make them do so.
+.RE
+.RS 4
+.Sp
+A compilation of a covered work with other separate and independent
+works, which are not by their nature extensions of the covered work,
+and which are not combined with it such as to form a larger program,
+in or on a volume of a storage or distribution medium, is called an
+\&\*(L"aggregate\*(R" if the compilation and its resulting copyright are not
+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit. Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+.RE
+.IP "6. Conveying Non-Source Forms." 4
+.IX Item "6. Conveying Non-Source Forms."
+You may convey a covered work in object code form under the terms of
+sections 4 and 5, provided that you also convey the machine-readable
+Corresponding Source under the terms of this License, in one of these
+ways:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by the
+Corresponding Source fixed on a durable physical medium customarily
+used for software interchange.
+.IP "b." 4
+.IX Item "b."
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by a written
+offer, valid for at least three years and valid for as long as you
+offer spare parts or customer support for that product model, to give
+anyone who possesses the object code either (1) a copy of the
+Corresponding Source for all the software in the product that is
+covered by this License, on a durable physical medium customarily used
+for software interchange, for a price no more than your reasonable
+cost of physically performing this conveying of source, or (2) access
+to copy the Corresponding Source from a network server at no charge.
+.IP "c." 4
+.IX Item "c."
+Convey individual copies of the object code with a copy of the written
+offer to provide the Corresponding Source. This alternative is
+allowed only occasionally and noncommercially, and only if you
+received the object code with such an offer, in accord with subsection
+6b.
+.IP "d." 4
+.IX Item "d."
+Convey the object code by offering access from a designated place
+(gratis or for a charge), and offer equivalent access to the
+Corresponding Source in the same way through the same place at no
+further charge. You need not require recipients to copy the
+Corresponding Source along with the object code. If the place to copy
+the object code is a network server, the Corresponding Source may be
+on a different server (operated by you or a third party) that supports
+equivalent copying facilities, provided you maintain clear directions
+next to the object code saying where to find the Corresponding Source.
+Regardless of what server hosts the Corresponding Source, you remain
+obligated to ensure that it is available for as long as needed to
+satisfy these requirements.
+.IP "e." 4
+.IX Item "e."
+Convey the object code using peer-to-peer transmission, provided you
+inform other peers where the object code and Corresponding Source of
+the work are being offered to the general public at no charge under
+subsection 6d.
+.RE
+.RS 4
+.Sp
+A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+.Sp
+A \*(L"User Product\*(R" is either (1) a \*(L"consumer product\*(R", which means any
+tangible personal property which is normally used for personal,
+family, or household purposes, or (2) anything designed or sold for
+incorporation into a dwelling. In determining whether a product is a
+consumer product, doubtful cases shall be resolved in favor of
+coverage. For a particular product received by a particular user,
+\&\*(L"normally used\*(R" refers to a typical or common use of that class of
+product, regardless of the status of the particular user or of the way
+in which the particular user actually uses, or expects or is expected
+to use, the product. A product is a consumer product regardless of
+whether the product has substantial commercial, industrial or
+non-consumer uses, unless such uses represent the only significant
+mode of use of the product.
+.Sp
+\&\*(L"Installation Information\*(R" for a User Product means any methods,
+procedures, authorization keys, or other information required to
+install and execute modified versions of a covered work in that User
+Product from a modified version of its Corresponding Source. The
+information must suffice to ensure that the continued functioning of
+the modified object code is in no case prevented or interfered with
+solely because modification has been made.
+.Sp
+If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information. But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in \s-1ROM\s0).
+.Sp
+The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or
+updates for a work that has been modified or installed by the
+recipient, or for the User Product in which it has been modified or
+installed. Access to a network may be denied when the modification
+itself materially and adversely affects the operation of the network
+or violates the rules and protocols for communication across the
+network.
+.Sp
+Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+.RE
+.IP "7. Additional Terms." 4
+.IX Item "7. Additional Terms."
+\&\*(L"Additional permissions\*(R" are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law. If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+.Sp
+When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it. (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.) You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+.Sp
+Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders
+of that material) supplement the terms of this License with terms:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+Disclaiming warranty or limiting liability differently from the terms
+of sections 15 and 16 of this License; or
+.IP "b." 4
+.IX Item "b."
+Requiring preservation of specified reasonable legal notices or author
+attributions in that material or in the Appropriate Legal Notices
+displayed by works containing it; or
+.IP "c." 4
+.IX Item "c."
+Prohibiting misrepresentation of the origin of that material, or
+requiring that modified versions of such material be marked in
+reasonable ways as different from the original version; or
+.IP "d." 4
+.IX Item "d."
+Limiting the use for publicity purposes of names of licensors or
+authors of the material; or
+.IP "e." 4
+.IX Item "e."
+Declining to grant rights under trademark law for use of some trade
+names, trademarks, or service marks; or
+.IP "f." 4
+.IX Item "f."
+Requiring indemnification of licensors and authors of that material by
+anyone who conveys the material (or modified versions of it) with
+contractual assumptions of liability to the recipient, for any
+liability that these contractual assumptions directly impose on those
+licensors and authors.
+.RE
+.RS 4
+.Sp
+All other non-permissive additional terms are considered \*(L"further
+restrictions\*(R" within the meaning of section 10. If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term. If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+.Sp
+If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+.Sp
+Additional terms, permissive or non-permissive, may be stated in the
+form of a separately written license, or stated as exceptions; the
+above requirements apply either way.
+.RE
+.IP "8. Termination." 4
+.IX Item "8. Termination."
+You may not propagate or modify a covered work except as expressly
+provided under this License. Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+.Sp
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+.Sp
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+.Sp
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License. If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+.IP "9. Acceptance Not Required for Having Copies." 4
+.IX Item "9. Acceptance Not Required for Having Copies."
+You are not required to accept this License in order to receive or run
+a copy of the Program. Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance. However,
+nothing other than this License grants you permission to propagate or
+modify any covered work. These actions infringe copyright if you do
+not accept this License. Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+.IP "10. Automatic Licensing of Downstream Recipients." 4
+.IX Item "10. Automatic Licensing of Downstream Recipients."
+Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License. You are not responsible
+for enforcing compliance by third parties with this License.
+.Sp
+An \*(L"entity transaction\*(R" is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations. If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+.Sp
+You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License. For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+.IP "11. Patents." 4
+.IX Item "11. Patents."
+A \*(L"contributor\*(R" is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based. The
+work thus licensed is called the contributor's \*(L"contributor version\*(R".
+.Sp
+A contributor's \*(L"essential patent claims\*(R" are all patent claims owned
+or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version. For
+purposes of this definition, \*(L"control\*(R" includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
+this License.
+.Sp
+Each contributor grants you a non-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+.Sp
+In the following three paragraphs, a \*(L"patent license\*(R" is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement). To \*(L"grant\*(R" such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+.Sp
+If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients. \*(L"Knowingly relying\*(R" means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+.Sp
+If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+.Sp
+A patent license is \*(L"discriminatory\*(R" if it does not include within the
+scope of its coverage, prohibits the exercise of, or is conditioned on
+the non-exercise of one or more of the rights that are specifically
+granted under this License. You may not convey a covered work if you
+are a party to an arrangement with a third party that is in the
+business of distributing software, under which you make payment to the
+third party based on the extent of your activity of conveying the
+work, and under which the third party grants, to any of the parties
+who would receive the covered work from you, a discriminatory patent
+license (a) in connection with copies of the covered work conveyed by
+you (or copies made from those copies), or (b) primarily for and in
+connection with specific products or compilations that contain the
+covered work, unless you entered into that arrangement, or that patent
+license was granted, prior to 28 March 2007.
+.Sp
+Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+.IP "12. No Surrender of Others' Freedom." 4
+.IX Item "12. No Surrender of Others' Freedom."
+If conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot convey
+a covered work so as to satisfy simultaneously your obligations under
+this License and any other pertinent obligations, then as a
+consequence you may not convey it at all. For example, if you agree
+to terms that obligate you to collect a royalty for further conveying
+from those to whom you convey the Program, the only way you could
+satisfy both those terms and this License would be to refrain entirely
+from conveying the Program.
+.IP "13. Use with the \s-1GNU\s0 Affero General Public License." 4
+.IX Item "13. Use with the GNU Affero General Public License."
+Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the \s-1GNU\s0 Affero General Public License into a single
+combined work, and to convey the resulting work. The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the \s-1GNU\s0 Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.
+.IP "14. Revised Versions of this License." 4
+.IX Item "14. Revised Versions of this License."
+The Free Software Foundation may publish revised and/or new versions
+of the \s-1GNU\s0 General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+.Sp
+Each version is given a distinguishing version number. If the Program
+specifies that a certain numbered version of the \s-1GNU\s0 General Public
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that numbered version or
+of any later version published by the Free Software Foundation. If
+the Program does not specify a version number of the \s-1GNU\s0 General
+Public License, you may choose any version ever published by the Free
+Software Foundation.
+.Sp
+If the Program specifies that a proxy can decide which future versions
+of the \s-1GNU\s0 General Public License can be used, that proxy's public
+statement of acceptance of a version permanently authorizes you to
+choose that version for the Program.
+.Sp
+Later license versions may give you additional or different
+permissions. However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+.IP "15. Disclaimer of Warranty." 4
+.IX Item "15. Disclaimer of Warranty."
+\&\s-1THERE\s0 \s-1IS\s0 \s-1NO\s0 \s-1WARRANTY\s0 \s-1FOR\s0 \s-1THE\s0 \s-1PROGRAM\s0, \s-1TO\s0 \s-1THE\s0 \s-1EXTENT\s0 \s-1PERMITTED\s0 \s-1BY\s0
+\&\s-1APPLICABLE\s0 \s-1LAW\s0. \s-1EXCEPT\s0 \s-1WHEN\s0 \s-1OTHERWISE\s0 \s-1STATED\s0 \s-1IN\s0 \s-1WRITING\s0 \s-1THE\s0 \s-1COPYRIGHT\s0
+\&\s-1HOLDERS\s0 \s-1AND/OR\s0 \s-1OTHER\s0 \s-1PARTIES\s0 \s-1PROVIDE\s0 \s-1THE\s0 \s-1PROGRAM\s0 \*(L"\s-1AS\s0 \s-1IS\s0\*(R" \s-1WITHOUT\s0
+\&\s-1WARRANTY\s0 \s-1OF\s0 \s-1ANY\s0 \s-1KIND\s0, \s-1EITHER\s0 \s-1EXPRESSED\s0 \s-1OR\s0 \s-1IMPLIED\s0, \s-1INCLUDING\s0, \s-1BUT\s0 \s-1NOT\s0
+\&\s-1LIMITED\s0 \s-1TO\s0, \s-1THE\s0 \s-1IMPLIED\s0 \s-1WARRANTIES\s0 \s-1OF\s0 \s-1MERCHANTABILITY\s0 \s-1AND\s0 \s-1FITNESS\s0 \s-1FOR\s0
+A \s-1PARTICULAR\s0 \s-1PURPOSE\s0. \s-1THE\s0 \s-1ENTIRE\s0 \s-1RISK\s0 \s-1AS\s0 \s-1TO\s0 \s-1THE\s0 \s-1QUALITY\s0 \s-1AND\s0
+\&\s-1PERFORMANCE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1IS\s0 \s-1WITH\s0 \s-1YOU\s0. \s-1SHOULD\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1PROVE\s0
+\&\s-1DEFECTIVE\s0, \s-1YOU\s0 \s-1ASSUME\s0 \s-1THE\s0 \s-1COST\s0 \s-1OF\s0 \s-1ALL\s0 \s-1NECESSARY\s0 \s-1SERVICING\s0, \s-1REPAIR\s0 \s-1OR\s0
+\&\s-1CORRECTION\s0.
+.IP "16. Limitation of Liability." 4
+.IX Item "16. Limitation of Liability."
+\&\s-1IN\s0 \s-1NO\s0 \s-1EVENT\s0 \s-1UNLESS\s0 \s-1REQUIRED\s0 \s-1BY\s0 \s-1APPLICABLE\s0 \s-1LAW\s0 \s-1OR\s0 \s-1AGREED\s0 \s-1TO\s0 \s-1IN\s0 \s-1WRITING\s0
+\&\s-1WILL\s0 \s-1ANY\s0 \s-1COPYRIGHT\s0 \s-1HOLDER\s0, \s-1OR\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PARTY\s0 \s-1WHO\s0 \s-1MODIFIES\s0 \s-1AND/OR\s0
+\&\s-1CONVEYS\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1AS\s0 \s-1PERMITTED\s0 \s-1ABOVE\s0, \s-1BE\s0 \s-1LIABLE\s0 \s-1TO\s0 \s-1YOU\s0 \s-1FOR\s0 \s-1DAMAGES\s0,
+\&\s-1INCLUDING\s0 \s-1ANY\s0 \s-1GENERAL\s0, \s-1SPECIAL\s0, \s-1INCIDENTAL\s0 \s-1OR\s0 \s-1CONSEQUENTIAL\s0 \s-1DAMAGES\s0
+\&\s-1ARISING\s0 \s-1OUT\s0 \s-1OF\s0 \s-1THE\s0 \s-1USE\s0 \s-1OR\s0 \s-1INABILITY\s0 \s-1TO\s0 \s-1USE\s0 \s-1THE\s0 \s-1PROGRAM\s0 (\s-1INCLUDING\s0 \s-1BUT\s0
+\&\s-1NOT\s0 \s-1LIMITED\s0 \s-1TO\s0 \s-1LOSS\s0 \s-1OF\s0 \s-1DATA\s0 \s-1OR\s0 \s-1DATA\s0 \s-1BEING\s0 \s-1RENDERED\s0 \s-1INACCURATE\s0 \s-1OR\s0
+\&\s-1LOSSES\s0 \s-1SUSTAINED\s0 \s-1BY\s0 \s-1YOU\s0 \s-1OR\s0 \s-1THIRD\s0 \s-1PARTIES\s0 \s-1OR\s0 A \s-1FAILURE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0
+\&\s-1TO\s0 \s-1OPERATE\s0 \s-1WITH\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PROGRAMS\s0), \s-1EVEN\s0 \s-1IF\s0 \s-1SUCH\s0 \s-1HOLDER\s0 \s-1OR\s0 \s-1OTHER\s0
+\&\s-1PARTY\s0 \s-1HAS\s0 \s-1BEEN\s0 \s-1ADVISED\s0 \s-1OF\s0 \s-1THE\s0 \s-1POSSIBILITY\s0 \s-1OF\s0 \s-1SUCH\s0 \s-1DAMAGES\s0.
+.IP "17. Interpretation of Sections 15 and 16." 4
+.IX Item "17. Interpretation of Sections 15 and 16."
+If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+.SS "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "END OF TERMS AND CONDITIONS"
+.SS "How to Apply These Terms to Your New Programs"
+.IX Subsection "How to Apply These Terms to Your New Programs"
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+.PP
+To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the \*(L"copyright\*(R" line and a pointer to where the full notice is found.
+.PP
+.Vb 2
+\& <one line to give the program\*(Aqs name and a brief idea of what it does.>
+\& Copyright (C) <year> <name of author>
+\&
+\& This program is free software: you can redistribute it and/or modify
+\& it under the terms of the GNU General Public License as published by
+\& the Free Software Foundation, either version 3 of the License, or (at
+\& your option) any later version.
+\&
+\& This program is distributed in the hope that it will be useful, but
+\& WITHOUT ANY WARRANTY; without even the implied warranty of
+\& MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+\& General Public License for more details.
+\&
+\& You should have received a copy of the GNU General Public License
+\& along with this program. If not, see <http://www.gnu.org/licenses/>.
+.Ve
+.PP
+Also add information on how to contact you by electronic and paper mail.
+.PP
+If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+.PP
+.Vb 4
+\& <program> Copyright (C) <year> <name of author>
+\& This program comes with ABSOLUTELY NO WARRANTY; for details type "show w".
+\& This is free software, and you are welcome to redistribute it
+\& under certain conditions; type "show c" for details.
+.Ve
+.PP
+The hypothetical commands \fBshow w\fR and \fBshow c\fR should show
+the appropriate parts of the General Public License. Of course, your
+program's commands might be different; for a \s-1GUI\s0 interface, you would
+use an \*(L"about box\*(R".
+.PP
+You should also get your employer (if you work as a programmer) or school,
+if any, to sign a \*(L"copyright disclaimer\*(R" for the program, if necessary.
+For more information on this, and how to apply and follow the \s-1GNU\s0 \s-1GPL\s0, see
+<\fBhttp://www.gnu.org/licenses/\fR>.
+.PP
+The \s-1GNU\s0 General Public License does not permit incorporating your
+program into proprietary programs. If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library. If this is what you want to do, use
+the \s-1GNU\s0 Lesser General Public License instead of this License. But
+first, please read <\fBhttp://www.gnu.org/philosophy/why\-not\-lgpl.html\fR>.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2007 Free Software Foundation, Inc.
+.PP
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml
new file mode 100644
index 0000000..d2befa7
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/amd64-linux.xml
@@ -0,0 +1,314 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/x86/include/asm/unistd_64.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="read" number="0"/>
+ <syscall name="write" number="1"/>
+ <syscall name="open" number="2"/>
+ <syscall name="close" number="3"/>
+ <syscall name="stat" number="4"/>
+ <syscall name="fstat" number="5"/>
+ <syscall name="lstat" number="6"/>
+ <syscall name="poll" number="7"/>
+ <syscall name="lseek" number="8"/>
+ <syscall name="mmap" number="9"/>
+ <syscall name="mprotect" number="10"/>
+ <syscall name="munmap" number="11"/>
+ <syscall name="brk" number="12"/>
+ <syscall name="rt_sigaction" number="13"/>
+ <syscall name="rt_sigprocmask" number="14"/>
+ <syscall name="rt_sigreturn" number="15"/>
+ <syscall name="ioctl" number="16"/>
+ <syscall name="pread64" number="17"/>
+ <syscall name="pwrite64" number="18"/>
+ <syscall name="readv" number="19"/>
+ <syscall name="writev" number="20"/>
+ <syscall name="access" number="21"/>
+ <syscall name="pipe" number="22"/>
+ <syscall name="select" number="23"/>
+ <syscall name="sched_yield" number="24"/>
+ <syscall name="mremap" number="25"/>
+ <syscall name="msync" number="26"/>
+ <syscall name="mincore" number="27"/>
+ <syscall name="madvise" number="28"/>
+ <syscall name="shmget" number="29"/>
+ <syscall name="shmat" number="30"/>
+ <syscall name="shmctl" number="31"/>
+ <syscall name="dup" number="32"/>
+ <syscall name="dup2" number="33"/>
+ <syscall name="pause" number="34"/>
+ <syscall name="nanosleep" number="35"/>
+ <syscall name="getitimer" number="36"/>
+ <syscall name="alarm" number="37"/>
+ <syscall name="setitimer" number="38"/>
+ <syscall name="getpid" number="39"/>
+ <syscall name="sendfile" number="40"/>
+ <syscall name="socket" number="41"/>
+ <syscall name="connect" number="42"/>
+ <syscall name="accept" number="43"/>
+ <syscall name="sendto" number="44"/>
+ <syscall name="recvfrom" number="45"/>
+ <syscall name="sendmsg" number="46"/>
+ <syscall name="recvmsg" number="47"/>
+ <syscall name="shutdown" number="48"/>
+ <syscall name="bind" number="49"/>
+ <syscall name="listen" number="50"/>
+ <syscall name="getsockname" number="51"/>
+ <syscall name="getpeername" number="52"/>
+ <syscall name="socketpair" number="53"/>
+ <syscall name="setsockopt" number="54"/>
+ <syscall name="getsockopt" number="55"/>
+ <syscall name="clone" number="56"/>
+ <syscall name="fork" number="57"/>
+ <syscall name="vfork" number="58"/>
+ <syscall name="execve" number="59"/>
+ <syscall name="exit" number="60"/>
+ <syscall name="wait4" number="61"/>
+ <syscall name="kill" number="62"/>
+ <syscall name="uname" number="63"/>
+ <syscall name="semget" number="64"/>
+ <syscall name="semop" number="65"/>
+ <syscall name="semctl" number="66"/>
+ <syscall name="shmdt" number="67"/>
+ <syscall name="msgget" number="68"/>
+ <syscall name="msgsnd" number="69"/>
+ <syscall name="msgrcv" number="70"/>
+ <syscall name="msgctl" number="71"/>
+ <syscall name="fcntl" number="72"/>
+ <syscall name="flock" number="73"/>
+ <syscall name="fsync" number="74"/>
+ <syscall name="fdatasync" number="75"/>
+ <syscall name="truncate" number="76"/>
+ <syscall name="ftruncate" number="77"/>
+ <syscall name="getdents" number="78"/>
+ <syscall name="getcwd" number="79"/>
+ <syscall name="chdir" number="80"/>
+ <syscall name="fchdir" number="81"/>
+ <syscall name="rename" number="82"/>
+ <syscall name="mkdir" number="83"/>
+ <syscall name="rmdir" number="84"/>
+ <syscall name="creat" number="85"/>
+ <syscall name="link" number="86"/>
+ <syscall name="unlink" number="87"/>
+ <syscall name="symlink" number="88"/>
+ <syscall name="readlink" number="89"/>
+ <syscall name="chmod" number="90"/>
+ <syscall name="fchmod" number="91"/>
+ <syscall name="chown" number="92"/>
+ <syscall name="fchown" number="93"/>
+ <syscall name="lchown" number="94"/>
+ <syscall name="umask" number="95"/>
+ <syscall name="gettimeofday" number="96"/>
+ <syscall name="getrlimit" number="97"/>
+ <syscall name="getrusage" number="98"/>
+ <syscall name="sysinfo" number="99"/>
+ <syscall name="times" number="100"/>
+ <syscall name="ptrace" number="101"/>
+ <syscall name="getuid" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="getgid" number="104"/>
+ <syscall name="setuid" number="105"/>
+ <syscall name="setgid" number="106"/>
+ <syscall name="geteuid" number="107"/>
+ <syscall name="getegid" number="108"/>
+ <syscall name="setpgid" number="109"/>
+ <syscall name="getppid" number="110"/>
+ <syscall name="getpgrp" number="111"/>
+ <syscall name="setsid" number="112"/>
+ <syscall name="setreuid" number="113"/>
+ <syscall name="setregid" number="114"/>
+ <syscall name="getgroups" number="115"/>
+ <syscall name="setgroups" number="116"/>
+ <syscall name="setresuid" number="117"/>
+ <syscall name="getresuid" number="118"/>
+ <syscall name="setresgid" number="119"/>
+ <syscall name="getresgid" number="120"/>
+ <syscall name="getpgid" number="121"/>
+ <syscall name="setfsuid" number="122"/>
+ <syscall name="setfsgid" number="123"/>
+ <syscall name="getsid" number="124"/>
+ <syscall name="capget" number="125"/>
+ <syscall name="capset" number="126"/>
+ <syscall name="rt_sigpending" number="127"/>
+ <syscall name="rt_sigtimedwait" number="128"/>
+ <syscall name="rt_sigqueueinfo" number="129"/>
+ <syscall name="rt_sigsuspend" number="130"/>
+ <syscall name="sigaltstack" number="131"/>
+ <syscall name="utime" number="132"/>
+ <syscall name="mknod" number="133"/>
+ <syscall name="uselib" number="134"/>
+ <syscall name="personality" number="135"/>
+ <syscall name="ustat" number="136"/>
+ <syscall name="statfs" number="137"/>
+ <syscall name="fstatfs" number="138"/>
+ <syscall name="sysfs" number="139"/>
+ <syscall name="getpriority" number="140"/>
+ <syscall name="setpriority" number="141"/>
+ <syscall name="sched_setparam" number="142"/>
+ <syscall name="sched_getparam" number="143"/>
+ <syscall name="sched_setscheduler" number="144"/>
+ <syscall name="sched_getscheduler" number="145"/>
+ <syscall name="sched_get_priority_max" number="146"/>
+ <syscall name="sched_get_priority_min" number="147"/>
+ <syscall name="sched_rr_get_interval" number="148"/>
+ <syscall name="mlock" number="149"/>
+ <syscall name="munlock" number="150"/>
+ <syscall name="mlockall" number="151"/>
+ <syscall name="munlockall" number="152"/>
+ <syscall name="vhangup" number="153"/>
+ <syscall name="modify_ldt" number="154"/>
+ <syscall name="pivot_root" number="155"/>
+ <syscall name="_sysctl" number="156"/>
+ <syscall name="prctl" number="157"/>
+ <syscall name="arch_prctl" number="158"/>
+ <syscall name="adjtimex" number="159"/>
+ <syscall name="setrlimit" number="160"/>
+ <syscall name="chroot" number="161"/>
+ <syscall name="sync" number="162"/>
+ <syscall name="acct" number="163"/>
+ <syscall name="settimeofday" number="164"/>
+ <syscall name="mount" number="165"/>
+ <syscall name="umount2" number="166"/>
+ <syscall name="swapon" number="167"/>
+ <syscall name="swapoff" number="168"/>
+ <syscall name="reboot" number="169"/>
+ <syscall name="sethostname" number="170"/>
+ <syscall name="setdomainname" number="171"/>
+ <syscall name="iopl" number="172"/>
+ <syscall name="ioperm" number="173"/>
+ <syscall name="create_module" number="174"/>
+ <syscall name="init_module" number="175"/>
+ <syscall name="delete_module" number="176"/>
+ <syscall name="get_kernel_syms" number="177"/>
+ <syscall name="query_module" number="178"/>
+ <syscall name="quotactl" number="179"/>
+ <syscall name="nfsservctl" number="180"/>
+ <syscall name="getpmsg" number="181"/>
+ <syscall name="putpmsg" number="182"/>
+ <syscall name="afs_syscall" number="183"/>
+ <syscall name="tuxcall" number="184"/>
+ <syscall name="security" number="185"/>
+ <syscall name="gettid" number="186"/>
+ <syscall name="readahead" number="187"/>
+ <syscall name="setxattr" number="188"/>
+ <syscall name="lsetxattr" number="189"/>
+ <syscall name="fsetxattr" number="190"/>
+ <syscall name="getxattr" number="191"/>
+ <syscall name="lgetxattr" number="192"/>
+ <syscall name="fgetxattr" number="193"/>
+ <syscall name="listxattr" number="194"/>
+ <syscall name="llistxattr" number="195"/>
+ <syscall name="flistxattr" number="196"/>
+ <syscall name="removexattr" number="197"/>
+ <syscall name="lremovexattr" number="198"/>
+ <syscall name="fremovexattr" number="199"/>
+ <syscall name="tkill" number="200"/>
+ <syscall name="time" number="201"/>
+ <syscall name="futex" number="202"/>
+ <syscall name="sched_setaffinity" number="203"/>
+ <syscall name="sched_getaffinity" number="204"/>
+ <syscall name="set_thread_area" number="205"/>
+ <syscall name="io_setup" number="206"/>
+ <syscall name="io_destroy" number="207"/>
+ <syscall name="io_getevents" number="208"/>
+ <syscall name="io_submit" number="209"/>
+ <syscall name="io_cancel" number="210"/>
+ <syscall name="get_thread_area" number="211"/>
+ <syscall name="lookup_dcookie" number="212"/>
+ <syscall name="epoll_create" number="213"/>
+ <syscall name="epoll_ctl_old" number="214"/>
+ <syscall name="epoll_wait_old" number="215"/>
+ <syscall name="remap_file_pages" number="216"/>
+ <syscall name="getdents64" number="217"/>
+ <syscall name="set_tid_address" number="218"/>
+ <syscall name="restart_syscall" number="219"/>
+ <syscall name="semtimedop" number="220"/>
+ <syscall name="fadvise64" number="221"/>
+ <syscall name="timer_create" number="222"/>
+ <syscall name="timer_settime" number="223"/>
+ <syscall name="timer_gettime" number="224"/>
+ <syscall name="timer_getoverrun" number="225"/>
+ <syscall name="timer_delete" number="226"/>
+ <syscall name="clock_settime" number="227"/>
+ <syscall name="clock_gettime" number="228"/>
+ <syscall name="clock_getres" number="229"/>
+ <syscall name="clock_nanosleep" number="230"/>
+ <syscall name="exit_group" number="231"/>
+ <syscall name="epoll_wait" number="232"/>
+ <syscall name="epoll_ctl" number="233"/>
+ <syscall name="tgkill" number="234"/>
+ <syscall name="utimes" number="235"/>
+ <syscall name="vserver" number="236"/>
+ <syscall name="mbind" number="237"/>
+ <syscall name="set_mempolicy" number="238"/>
+ <syscall name="get_mempolicy" number="239"/>
+ <syscall name="mq_open" number="240"/>
+ <syscall name="mq_unlink" number="241"/>
+ <syscall name="mq_timedsend" number="242"/>
+ <syscall name="mq_timedreceive" number="243"/>
+ <syscall name="mq_notify" number="244"/>
+ <syscall name="mq_getsetattr" number="245"/>
+ <syscall name="kexec_load" number="246"/>
+ <syscall name="waitid" number="247"/>
+ <syscall name="add_key" number="248"/>
+ <syscall name="request_key" number="249"/>
+ <syscall name="keyctl" number="250"/>
+ <syscall name="ioprio_set" number="251"/>
+ <syscall name="ioprio_get" number="252"/>
+ <syscall name="inotify_init" number="253"/>
+ <syscall name="inotify_add_watch" number="254"/>
+ <syscall name="inotify_rm_watch" number="255"/>
+ <syscall name="migrate_pages" number="256"/>
+ <syscall name="openat" number="257"/>
+ <syscall name="mkdirat" number="258"/>
+ <syscall name="mknodat" number="259"/>
+ <syscall name="fchownat" number="260"/>
+ <syscall name="futimesat" number="261"/>
+ <syscall name="newfstatat" number="262"/>
+ <syscall name="unlinkat" number="263"/>
+ <syscall name="renameat" number="264"/>
+ <syscall name="linkat" number="265"/>
+ <syscall name="symlinkat" number="266"/>
+ <syscall name="readlinkat" number="267"/>
+ <syscall name="fchmodat" number="268"/>
+ <syscall name="faccessat" number="269"/>
+ <syscall name="pselect6" number="270"/>
+ <syscall name="ppoll" number="271"/>
+ <syscall name="unshare" number="272"/>
+ <syscall name="set_robust_list" number="273"/>
+ <syscall name="get_robust_list" number="274"/>
+ <syscall name="splice" number="275"/>
+ <syscall name="tee" number="276"/>
+ <syscall name="sync_file_range" number="277"/>
+ <syscall name="vmsplice" number="278"/>
+ <syscall name="move_pages" number="279"/>
+ <syscall name="utimensat" number="280"/>
+ <syscall name="epoll_pwait" number="281"/>
+ <syscall name="signalfd" number="282"/>
+ <syscall name="timerfd_create" number="283"/>
+ <syscall name="eventfd" number="284"/>
+ <syscall name="fallocate" number="285"/>
+ <syscall name="timerfd_settime" number="286"/>
+ <syscall name="timerfd_gettime" number="287"/>
+ <syscall name="accept4" number="288"/>
+ <syscall name="signalfd4" number="289"/>
+ <syscall name="eventfd2" number="290"/>
+ <syscall name="epoll_create1" number="291"/>
+ <syscall name="dup3" number="292"/>
+ <syscall name="pipe2" number="293"/>
+ <syscall name="inotify_init1" number="294"/>
+ <syscall name="preadv" number="295"/>
+ <syscall name="pwritev" number="296"/>
+</syscalls_info>
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd
new file mode 100644
index 0000000..865eba6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/gdb-syscalls.dtd
@@ -0,0 +1,14 @@
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- The root element of a syscall info is <syscalls-info>. -->
+
+<!ELEMENT syscalls-info (syscall*)>
+
+<!ELEMENT syscall EMPTY>
+<!ATTLIST syscall
+ name CDATA #REQUIRED
+ number CDATA #REQUIRED>
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml
new file mode 100644
index 0000000..c79ad9c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/i386-linux.xml
@@ -0,0 +1,340 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/x86/include/asm/unistd_32.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86old" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="vm86" number="166"/>
+ <syscall name="query_module" number="167"/>
+ <syscall name="poll" number="168"/>
+ <syscall name="nfsservctl" number="169"/>
+ <syscall name="setresgid" number="170"/>
+ <syscall name="getresgid" number="171"/>
+ <syscall name="prctl" number="172"/>
+ <syscall name="rt_sigreturn" number="173"/>
+ <syscall name="rt_sigaction" number="174"/>
+ <syscall name="rt_sigprocmask" number="175"/>
+ <syscall name="rt_sigpending" number="176"/>
+ <syscall name="rt_sigtimedwait" number="177"/>
+ <syscall name="rt_sigqueueinfo" number="178"/>
+ <syscall name="rt_sigsuspend" number="179"/>
+ <syscall name="pread64" number="180"/>
+ <syscall name="pwrite64" number="181"/>
+ <syscall name="chown" number="182"/>
+ <syscall name="getcwd" number="183"/>
+ <syscall name="capget" number="184"/>
+ <syscall name="capset" number="185"/>
+ <syscall name="sigaltstack" number="186"/>
+ <syscall name="sendfile" number="187"/>
+ <syscall name="getpmsg" number="188"/>
+ <syscall name="putpmsg" number="189"/>
+ <syscall name="vfork" number="190"/>
+ <syscall name="ugetrlimit" number="191"/>
+ <syscall name="mmap2" number="192"/>
+ <syscall name="truncate64" number="193"/>
+ <syscall name="ftruncate64" number="194"/>
+ <syscall name="stat64" number="195"/>
+ <syscall name="lstat64" number="196"/>
+ <syscall name="fstat64" number="197"/>
+ <syscall name="lchown32" number="198"/>
+ <syscall name="getuid32" number="199"/>
+ <syscall name="getgid32" number="200"/>
+ <syscall name="geteuid32" number="201"/>
+ <syscall name="getegid32" number="202"/>
+ <syscall name="setreuid32" number="203"/>
+ <syscall name="setregid32" number="204"/>
+ <syscall name="getgroups32" number="205"/>
+ <syscall name="setgroups32" number="206"/>
+ <syscall name="fchown32" number="207"/>
+ <syscall name="setresuid32" number="208"/>
+ <syscall name="getresuid32" number="209"/>
+ <syscall name="setresgid32" number="210"/>
+ <syscall name="getresgid32" number="211"/>
+ <syscall name="chown32" number="212"/>
+ <syscall name="setuid32" number="213"/>
+ <syscall name="setgid32" number="214"/>
+ <syscall name="setfsuid32" number="215"/>
+ <syscall name="setfsgid32" number="216"/>
+ <syscall name="pivot_root" number="217"/>
+ <syscall name="mincore" number="218"/>
+ <syscall name="madvise" number="219"/>
+ <syscall name="madvise1" number="220"/>
+ <syscall name="getdents64" number="221"/>
+ <syscall name="fcntl64" number="222"/>
+ <syscall name="gettid" number="224"/>
+ <syscall name="readahead" number="225"/>
+ <syscall name="setxattr" number="226"/>
+ <syscall name="lsetxattr" number="227"/>
+ <syscall name="fsetxattr" number="228"/>
+ <syscall name="getxattr" number="229"/>
+ <syscall name="lgetxattr" number="230"/>
+ <syscall name="fgetxattr" number="231"/>
+ <syscall name="listxattr" number="232"/>
+ <syscall name="llistxattr" number="233"/>
+ <syscall name="flistxattr" number="234"/>
+ <syscall name="removexattr" number="235"/>
+ <syscall name="lremovexattr" number="236"/>
+ <syscall name="fremovexattr" number="237"/>
+ <syscall name="tkill" number="238"/>
+ <syscall name="sendfile64" number="239"/>
+ <syscall name="futex" number="240"/>
+ <syscall name="sched_setaffinity" number="241"/>
+ <syscall name="sched_getaffinity" number="242"/>
+ <syscall name="set_thread_area" number="243"/>
+ <syscall name="get_thread_area" number="244"/>
+ <syscall name="io_setup" number="245"/>
+ <syscall name="io_destroy" number="246"/>
+ <syscall name="io_getevents" number="247"/>
+ <syscall name="io_submit" number="248"/>
+ <syscall name="io_cancel" number="249"/>
+ <syscall name="fadvise64" number="250"/>
+ <syscall name="exit_group" number="252"/>
+ <syscall name="lookup_dcookie" number="253"/>
+ <syscall name="epoll_create" number="254"/>
+ <syscall name="epoll_ctl" number="255"/>
+ <syscall name="epoll_wait" number="256"/>
+ <syscall name="remap_file_pages" number="257"/>
+ <syscall name="set_tid_address" number="258"/>
+ <syscall name="timer_create" number="259"/>
+ <syscall name="timer_settime" number="260"/>
+ <syscall name="timer_gettime" number="261"/>
+ <syscall name="timer_getoverrun" number="262"/>
+ <syscall name="timer_delete" number="263"/>
+ <syscall name="clock_settime" number="264"/>
+ <syscall name="clock_gettime" number="265"/>
+ <syscall name="clock_getres" number="266"/>
+ <syscall name="clock_nanosleep" number="267"/>
+ <syscall name="statfs64" number="268"/>
+ <syscall name="fstatfs64" number="269"/>
+ <syscall name="tgkill" number="270"/>
+ <syscall name="utimes" number="271"/>
+ <syscall name="fadvise64_64" number="272"/>
+ <syscall name="vserver" number="273"/>
+ <syscall name="mbind" number="274"/>
+ <syscall name="get_mempolicy" number="275"/>
+ <syscall name="set_mempolicy" number="276"/>
+ <syscall name="mq_open" number="277"/>
+ <syscall name="mq_unlink" number="278"/>
+ <syscall name="mq_timedsend" number="279"/>
+ <syscall name="mq_timedreceive" number="280"/>
+ <syscall name="mq_notify" number="281"/>
+ <syscall name="mq_getsetattr" number="282"/>
+ <syscall name="kexec_load" number="283"/>
+ <syscall name="waitid" number="284"/>
+ <syscall name="add_key" number="286"/>
+ <syscall name="request_key" number="287"/>
+ <syscall name="keyctl" number="288"/>
+ <syscall name="ioprio_set" number="289"/>
+ <syscall name="ioprio_get" number="290"/>
+ <syscall name="inotify_init" number="291"/>
+ <syscall name="inotify_add_watch" number="292"/>
+ <syscall name="inotify_rm_watch" number="293"/>
+ <syscall name="migrate_pages" number="294"/>
+ <syscall name="openat" number="295"/>
+ <syscall name="mkdirat" number="296"/>
+ <syscall name="mknodat" number="297"/>
+ <syscall name="fchownat" number="298"/>
+ <syscall name="futimesat" number="299"/>
+ <syscall name="fstatat64" number="300"/>
+ <syscall name="unlinkat" number="301"/>
+ <syscall name="renameat" number="302"/>
+ <syscall name="linkat" number="303"/>
+ <syscall name="symlinkat" number="304"/>
+ <syscall name="readlinkat" number="305"/>
+ <syscall name="fchmodat" number="306"/>
+ <syscall name="faccessat" number="307"/>
+ <syscall name="pselect6" number="308"/>
+ <syscall name="ppoll" number="309"/>
+ <syscall name="unshare" number="310"/>
+ <syscall name="set_robust_list" number="311"/>
+ <syscall name="get_robust_list" number="312"/>
+ <syscall name="splice" number="313"/>
+ <syscall name="sync_file_range" number="314"/>
+ <syscall name="tee" number="315"/>
+ <syscall name="vmsplice" number="316"/>
+ <syscall name="move_pages" number="317"/>
+ <syscall name="getcpu" number="318"/>
+ <syscall name="epoll_pwait" number="319"/>
+ <syscall name="utimensat" number="320"/>
+ <syscall name="signalfd" number="321"/>
+ <syscall name="timerfd_create" number="322"/>
+ <syscall name="eventfd" number="323"/>
+ <syscall name="fallocate" number="324"/>
+ <syscall name="timerfd_settime" number="325"/>
+</syscalls_info>
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml
new file mode 100644
index 0000000..876e0b6
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc-linux.xml
@@ -0,0 +1,310 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/powerpc/include/asm/unistd.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="query_module" number="166"/>
+ <syscall name="poll" number="167"/>
+ <syscall name="nfsservctl" number="168"/>
+ <syscall name="setresgid" number="169"/>
+ <syscall name="getresgid" number="170"/>
+ <syscall name="prctl" number="171"/>
+ <syscall name="rt_sigreturn" number="172"/>
+ <syscall name="rt_sigaction" number="173"/>
+ <syscall name="rt_sigprocmask" number="174"/>
+ <syscall name="rt_sigpending" number="175"/>
+ <syscall name="rt_sigtimedwait" number="176"/>
+ <syscall name="rt_sigqueueinfo" number="177"/>
+ <syscall name="rt_sigsuspend" number="178"/>
+ <syscall name="pread64" number="179"/>
+ <syscall name="pwrite64" number="180"/>
+ <syscall name="chown" number="181"/>
+ <syscall name="getcwd" number="182"/>
+ <syscall name="capget" number="183"/>
+ <syscall name="capset" number="184"/>
+ <syscall name="sigaltstack" number="185"/>
+ <syscall name="sendfile" number="186"/>
+ <syscall name="getpmsg" number="187"/>
+ <syscall name="putpmsg" number="188"/>
+ <syscall name="vfork" number="189"/>
+ <syscall name="ugetrlimit" number="190"/>
+ <syscall name="readahead" number="191"/>
+ <syscall name="mmap2" number="192"/>
+ <syscall name="truncate64" number="193"/>
+ <syscall name="ftruncate64" number="194"/>
+ <syscall name="stat64" number="195"/>
+ <syscall name="lstat64" number="196"/>
+ <syscall name="fstat64" number="197"/>
+ <syscall name="pciconfig_read" number="198"/>
+ <syscall name="pciconfig_write" number="199"/>
+ <syscall name="pciconfig_iobase" number="200"/>
+ <syscall name="multiplexer" number="201"/>
+ <syscall name="getdents64" number="202"/>
+ <syscall name="pivot_root" number="203"/>
+ <syscall name="fcntl64" number="204"/>
+ <syscall name="madvise" number="205"/>
+ <syscall name="mincore" number="206"/>
+ <syscall name="gettid" number="207"/>
+ <syscall name="tkill" number="208"/>
+ <syscall name="setxattr" number="209"/>
+ <syscall name="lsetxattr" number="210"/>
+ <syscall name="fsetxattr" number="211"/>
+ <syscall name="getxattr" number="212"/>
+ <syscall name="lgetxattr" number="213"/>
+ <syscall name="fgetxattr" number="214"/>
+ <syscall name="listxattr" number="215"/>
+ <syscall name="llistxattr" number="216"/>
+ <syscall name="flistxattr" number="217"/>
+ <syscall name="removexattr" number="218"/>
+ <syscall name="lremovexattr" number="219"/>
+ <syscall name="fremovexattr" number="220"/>
+ <syscall name="futex" number="221"/>
+ <syscall name="sched_setaffinity" number="222"/>
+ <syscall name="sched_getaffinity" number="223"/>
+ <syscall name="tuxcall" number="225"/>
+ <syscall name="sendfile64" number="226"/>
+ <syscall name="io_setup" number="227"/>
+ <syscall name="io_destroy" number="228"/>
+ <syscall name="io_getevents" number="229"/>
+ <syscall name="io_submit" number="230"/>
+ <syscall name="io_cancel" number="231"/>
+ <syscall name="set_tid_address" number="232"/>
+ <syscall name="fadvise64" number="233"/>
+ <syscall name="exit_group" number="234"/>
+ <syscall name="lookup_dcookie" number="235"/>
+ <syscall name="epoll_create" number="236"/>
+ <syscall name="epoll_ctl" number="237"/>
+ <syscall name="epoll_wait" number="238"/>
+ <syscall name="remap_file_pages" number="239"/>
+ <syscall name="timer_create" number="240"/>
+ <syscall name="timer_settime" number="241"/>
+ <syscall name="timer_gettime" number="242"/>
+ <syscall name="timer_getoverrun" number="243"/>
+ <syscall name="timer_delete" number="244"/>
+ <syscall name="clock_settime" number="245"/>
+ <syscall name="clock_gettime" number="246"/>
+ <syscall name="clock_getres" number="247"/>
+ <syscall name="clock_nanosleep" number="248"/>
+ <syscall name="swapcontext" number="249"/>
+ <syscall name="tgkill" number="250"/>
+ <syscall name="utimes" number="251"/>
+ <syscall name="statfs64" number="252"/>
+ <syscall name="fstatfs64" number="253"/>
+ <syscall name="fadvise64_64" number="254"/>
+ <syscall name="rtas" number="255"/>
+ <syscall name="sys_debug_setcontext" number="256"/>
+ <syscall name="mbind" number="259"/>
+ <syscall name="get_mempolicy" number="260"/>
+ <syscall name="set_mempolicy" number="261"/>
+ <syscall name="mq_open" number="262"/>
+ <syscall name="mq_unlink" number="263"/>
+ <syscall name="mq_timedsend" number="264"/>
+ <syscall name="mq_timedreceive" number="265"/>
+ <syscall name="mq_notify" number="266"/>
+ <syscall name="mq_getsetattr" number="267"/>
+ <syscall name="kexec_load" number="268"/>
+ <syscall name="add_key" number="269"/>
+ <syscall name="request_key" number="270"/>
+ <syscall name="keyctl" number="271"/>
+ <syscall name="waitid" number="272"/>
+ <syscall name="ioprio_set" number="273"/>
+ <syscall name="ioprio_get" number="274"/>
+ <syscall name="inotify_init" number="275"/>
+ <syscall name="inotify_add_watch" number="276"/>
+ <syscall name="inotify_rm_watch" number="277"/>
+ <syscall name="spu_run" number="278"/>
+ <syscall name="spu_create" number="279"/>
+ <syscall name="pselect6" number="280"/>
+ <syscall name="ppoll" number="281"/>
+ <syscall name="unshare" number="282"/>
+ <syscall name="openat" number="286"/>
+ <syscall name="mkdirat" number="287"/>
+ <syscall name="mknodat" number="288"/>
+ <syscall name="fchownat" number="289"/>
+ <syscall name="futimesat" number="290"/>
+ <syscall name="fstatat64" number="291"/>
+ <syscall name="unlinkat" number="292"/>
+ <syscall name="renameat" number="293"/>
+ <syscall name="linkat" number="294"/>
+ <syscall name="symlinkat" number="295"/>
+ <syscall name="readlinkat" number="296"/>
+ <syscall name="fchmodat" number="297"/>
+ <syscall name="faccessat" number="298"/>
+</syscalls_info>
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml
new file mode 100644
index 0000000..d81d065
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/gdb/syscalls/ppc64-linux.xml
@@ -0,0 +1,295 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-syscalls.dtd">
+
+<!-- This file was generated using the following file:
+
+ /usr/src/linux/arch/powerpc/include/asm/unistd.h
+
+ The file mentioned above belongs to the Linux Kernel. -->
+
+<syscalls_info>
+ <syscall name="restart_syscall" number="0"/>
+ <syscall name="exit" number="1"/>
+ <syscall name="fork" number="2"/>
+ <syscall name="read" number="3"/>
+ <syscall name="write" number="4"/>
+ <syscall name="open" number="5"/>
+ <syscall name="close" number="6"/>
+ <syscall name="waitpid" number="7"/>
+ <syscall name="creat" number="8"/>
+ <syscall name="link" number="9"/>
+ <syscall name="unlink" number="10"/>
+ <syscall name="execve" number="11"/>
+ <syscall name="chdir" number="12"/>
+ <syscall name="time" number="13"/>
+ <syscall name="mknod" number="14"/>
+ <syscall name="chmod" number="15"/>
+ <syscall name="lchown" number="16"/>
+ <syscall name="break" number="17"/>
+ <syscall name="oldstat" number="18"/>
+ <syscall name="lseek" number="19"/>
+ <syscall name="getpid" number="20"/>
+ <syscall name="mount" number="21"/>
+ <syscall name="umount" number="22"/>
+ <syscall name="setuid" number="23"/>
+ <syscall name="getuid" number="24"/>
+ <syscall name="stime" number="25"/>
+ <syscall name="ptrace" number="26"/>
+ <syscall name="alarm" number="27"/>
+ <syscall name="oldfstat" number="28"/>
+ <syscall name="pause" number="29"/>
+ <syscall name="utime" number="30"/>
+ <syscall name="stty" number="31"/>
+ <syscall name="gtty" number="32"/>
+ <syscall name="access" number="33"/>
+ <syscall name="nice" number="34"/>
+ <syscall name="ftime" number="35"/>
+ <syscall name="sync" number="36"/>
+ <syscall name="kill" number="37"/>
+ <syscall name="rename" number="38"/>
+ <syscall name="mkdir" number="39"/>
+ <syscall name="rmdir" number="40"/>
+ <syscall name="dup" number="41"/>
+ <syscall name="pipe" number="42"/>
+ <syscall name="times" number="43"/>
+ <syscall name="prof" number="44"/>
+ <syscall name="brk" number="45"/>
+ <syscall name="setgid" number="46"/>
+ <syscall name="getgid" number="47"/>
+ <syscall name="signal" number="48"/>
+ <syscall name="geteuid" number="49"/>
+ <syscall name="getegid" number="50"/>
+ <syscall name="acct" number="51"/>
+ <syscall name="umount2" number="52"/>
+ <syscall name="lock" number="53"/>
+ <syscall name="ioctl" number="54"/>
+ <syscall name="fcntl" number="55"/>
+ <syscall name="mpx" number="56"/>
+ <syscall name="setpgid" number="57"/>
+ <syscall name="ulimit" number="58"/>
+ <syscall name="oldolduname" number="59"/>
+ <syscall name="umask" number="60"/>
+ <syscall name="chroot" number="61"/>
+ <syscall name="ustat" number="62"/>
+ <syscall name="dup2" number="63"/>
+ <syscall name="getppid" number="64"/>
+ <syscall name="getpgrp" number="65"/>
+ <syscall name="setsid" number="66"/>
+ <syscall name="sigaction" number="67"/>
+ <syscall name="sgetmask" number="68"/>
+ <syscall name="ssetmask" number="69"/>
+ <syscall name="setreuid" number="70"/>
+ <syscall name="setregid" number="71"/>
+ <syscall name="sigsuspend" number="72"/>
+ <syscall name="sigpending" number="73"/>
+ <syscall name="sethostname" number="74"/>
+ <syscall name="setrlimit" number="75"/>
+ <syscall name="getrlimit" number="76"/>
+ <syscall name="getrusage" number="77"/>
+ <syscall name="gettimeofday" number="78"/>
+ <syscall name="settimeofday" number="79"/>
+ <syscall name="getgroups" number="80"/>
+ <syscall name="setgroups" number="81"/>
+ <syscall name="select" number="82"/>
+ <syscall name="symlink" number="83"/>
+ <syscall name="oldlstat" number="84"/>
+ <syscall name="readlink" number="85"/>
+ <syscall name="uselib" number="86"/>
+ <syscall name="swapon" number="87"/>
+ <syscall name="reboot" number="88"/>
+ <syscall name="readdir" number="89"/>
+ <syscall name="mmap" number="90"/>
+ <syscall name="munmap" number="91"/>
+ <syscall name="truncate" number="92"/>
+ <syscall name="ftruncate" number="93"/>
+ <syscall name="fchmod" number="94"/>
+ <syscall name="fchown" number="95"/>
+ <syscall name="getpriority" number="96"/>
+ <syscall name="setpriority" number="97"/>
+ <syscall name="profil" number="98"/>
+ <syscall name="statfs" number="99"/>
+ <syscall name="fstatfs" number="100"/>
+ <syscall name="ioperm" number="101"/>
+ <syscall name="socketcall" number="102"/>
+ <syscall name="syslog" number="103"/>
+ <syscall name="setitimer" number="104"/>
+ <syscall name="getitimer" number="105"/>
+ <syscall name="stat" number="106"/>
+ <syscall name="lstat" number="107"/>
+ <syscall name="fstat" number="108"/>
+ <syscall name="olduname" number="109"/>
+ <syscall name="iopl" number="110"/>
+ <syscall name="vhangup" number="111"/>
+ <syscall name="idle" number="112"/>
+ <syscall name="vm86" number="113"/>
+ <syscall name="wait4" number="114"/>
+ <syscall name="swapoff" number="115"/>
+ <syscall name="sysinfo" number="116"/>
+ <syscall name="ipc" number="117"/>
+ <syscall name="fsync" number="118"/>
+ <syscall name="sigreturn" number="119"/>
+ <syscall name="clone" number="120"/>
+ <syscall name="setdomainname" number="121"/>
+ <syscall name="uname" number="122"/>
+ <syscall name="modify_ldt" number="123"/>
+ <syscall name="adjtimex" number="124"/>
+ <syscall name="mprotect" number="125"/>
+ <syscall name="sigprocmask" number="126"/>
+ <syscall name="create_module" number="127"/>
+ <syscall name="init_module" number="128"/>
+ <syscall name="delete_module" number="129"/>
+ <syscall name="get_kernel_syms" number="130"/>
+ <syscall name="quotactl" number="131"/>
+ <syscall name="getpgid" number="132"/>
+ <syscall name="fchdir" number="133"/>
+ <syscall name="bdflush" number="134"/>
+ <syscall name="sysfs" number="135"/>
+ <syscall name="personality" number="136"/>
+ <syscall name="afs_syscall" number="137"/>
+ <syscall name="setfsuid" number="138"/>
+ <syscall name="setfsgid" number="139"/>
+ <syscall name="_llseek" number="140"/>
+ <syscall name="getdents" number="141"/>
+ <syscall name="_newselect" number="142"/>
+ <syscall name="flock" number="143"/>
+ <syscall name="msync" number="144"/>
+ <syscall name="readv" number="145"/>
+ <syscall name="writev" number="146"/>
+ <syscall name="getsid" number="147"/>
+ <syscall name="fdatasync" number="148"/>
+ <syscall name="_sysctl" number="149"/>
+ <syscall name="mlock" number="150"/>
+ <syscall name="munlock" number="151"/>
+ <syscall name="mlockall" number="152"/>
+ <syscall name="munlockall" number="153"/>
+ <syscall name="sched_setparam" number="154"/>
+ <syscall name="sched_getparam" number="155"/>
+ <syscall name="sched_setscheduler" number="156"/>
+ <syscall name="sched_getscheduler" number="157"/>
+ <syscall name="sched_yield" number="158"/>
+ <syscall name="sched_get_priority_max" number="159"/>
+ <syscall name="sched_get_priority_min" number="160"/>
+ <syscall name="sched_rr_get_interval" number="161"/>
+ <syscall name="nanosleep" number="162"/>
+ <syscall name="mremap" number="163"/>
+ <syscall name="setresuid" number="164"/>
+ <syscall name="getresuid" number="165"/>
+ <syscall name="query_module" number="166"/>
+ <syscall name="poll" number="167"/>
+ <syscall name="nfsservctl" number="168"/>
+ <syscall name="setresgid" number="169"/>
+ <syscall name="getresgid" number="170"/>
+ <syscall name="prctl" number="171"/>
+ <syscall name="rt_sigreturn" number="172"/>
+ <syscall name="rt_sigaction" number="173"/>
+ <syscall name="rt_sigprocmask" number="174"/>
+ <syscall name="rt_sigpending" number="175"/>
+ <syscall name="rt_sigtimedwait" number="176"/>
+ <syscall name="rt_sigqueueinfo" number="177"/>
+ <syscall name="rt_sigsuspend" number="178"/>
+ <syscall name="pread64" number="179"/>
+ <syscall name="pwrite64" number="180"/>
+ <syscall name="chown" number="181"/>
+ <syscall name="getcwd" number="182"/>
+ <syscall name="capget" number="183"/>
+ <syscall name="capset" number="184"/>
+ <syscall name="sigaltstack" number="185"/>
+ <syscall name="sendfile" number="186"/>
+ <syscall name="getpmsg" number="187"/>
+ <syscall name="putpmsg" number="188"/>
+ <syscall name="vfork" number="189"/>
+ <syscall name="ugetrlimit" number="190"/>
+ <syscall name="readahead" number="191"/>
+ <syscall name="pciconfig_read" number="198"/>
+ <syscall name="pciconfig_write" number="199"/>
+ <syscall name="pciconfig_iobase" number="200"/>
+ <syscall name="multiplexer" number="201"/>
+ <syscall name="getdents64" number="202"/>
+ <syscall name="pivot_root" number="203"/>
+ <syscall name="madvise" number="205"/>
+ <syscall name="mincore" number="206"/>
+ <syscall name="gettid" number="207"/>
+ <syscall name="tkill" number="208"/>
+ <syscall name="setxattr" number="209"/>
+ <syscall name="lsetxattr" number="210"/>
+ <syscall name="fsetxattr" number="211"/>
+ <syscall name="getxattr" number="212"/>
+ <syscall name="lgetxattr" number="213"/>
+ <syscall name="fgetxattr" number="214"/>
+ <syscall name="listxattr" number="215"/>
+ <syscall name="llistxattr" number="216"/>
+ <syscall name="flistxattr" number="217"/>
+ <syscall name="removexattr" number="218"/>
+ <syscall name="lremovexattr" number="219"/>
+ <syscall name="fremovexattr" number="220"/>
+ <syscall name="futex" number="221"/>
+ <syscall name="sched_setaffinity" number="222"/>
+ <syscall name="sched_getaffinity" number="223"/>
+ <syscall name="tuxcall" number="225"/>
+ <syscall name="io_setup" number="227"/>
+ <syscall name="io_destroy" number="228"/>
+ <syscall name="io_getevents" number="229"/>
+ <syscall name="io_submit" number="230"/>
+ <syscall name="io_cancel" number="231"/>
+ <syscall name="set_tid_address" number="232"/>
+ <syscall name="fadvise64" number="233"/>
+ <syscall name="exit_group" number="234"/>
+ <syscall name="lookup_dcookie" number="235"/>
+ <syscall name="epoll_create" number="236"/>
+ <syscall name="epoll_ctl" number="237"/>
+ <syscall name="epoll_wait" number="238"/>
+ <syscall name="remap_file_pages" number="239"/>
+ <syscall name="timer_create" number="240"/>
+ <syscall name="timer_settime" number="241"/>
+ <syscall name="timer_gettime" number="242"/>
+ <syscall name="timer_getoverrun" number="243"/>
+ <syscall name="timer_delete" number="244"/>
+ <syscall name="clock_settime" number="245"/>
+ <syscall name="clock_gettime" number="246"/>
+ <syscall name="clock_getres" number="247"/>
+ <syscall name="clock_nanosleep" number="248"/>
+ <syscall name="swapcontext" number="249"/>
+ <syscall name="tgkill" number="250"/>
+ <syscall name="utimes" number="251"/>
+ <syscall name="statfs64" number="252"/>
+ <syscall name="fstatfs64" number="253"/>
+ <syscall name="rtas" number="255"/>
+ <syscall name="sys_debug_setcontext" number="256"/>
+ <syscall name="mbind" number="259"/>
+ <syscall name="get_mempolicy" number="260"/>
+ <syscall name="set_mempolicy" number="261"/>
+ <syscall name="mq_open" number="262"/>
+ <syscall name="mq_unlink" number="263"/>
+ <syscall name="mq_timedsend" number="264"/>
+ <syscall name="mq_timedreceive" number="265"/>
+ <syscall name="mq_notify" number="266"/>
+ <syscall name="mq_getsetattr" number="267"/>
+ <syscall name="kexec_load" number="268"/>
+ <syscall name="add_key" number="269"/>
+ <syscall name="request_key" number="270"/>
+ <syscall name="keyctl" number="271"/>
+ <syscall name="waitid" number="272"/>
+ <syscall name="ioprio_set" number="273"/>
+ <syscall name="ioprio_get" number="274"/>
+ <syscall name="inotify_init" number="275"/>
+ <syscall name="inotify_add_watch" number="276"/>
+ <syscall name="inotify_rm_watch" number="277"/>
+ <syscall name="spu_run" number="278"/>
+ <syscall name="spu_create" number="279"/>
+ <syscall name="pselect6" number="280"/>
+ <syscall name="ppoll" number="281"/>
+ <syscall name="unshare" number="282"/>
+ <syscall name="unlinkat" number="286"/>
+ <syscall name="renameat" number="287"/>
+ <syscall name="linkat" number="288"/>
+ <syscall name="symlinkat" number="289"/>
+ <syscall name="readlinkat" number="290"/>
+ <syscall name="fchmodat" number="291"/>
+ <syscall name="faccessat" number="292"/>
+</syscalls_info>
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info
new file mode 100644
index 0000000..33657b0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/annotate.info
@@ -0,0 +1,1138 @@
+This is annotate.info, produced by makeinfo version 4.13 from
+/tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../gdb/gdb-7.1.x/gdb/doc/annotate.texinfo.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Annotate: (annotate). The obsolete annotation interface.
+END-INFO-DIR-ENTRY
+
+ Copyright (C) 1994, 1995, 2000, 2001, 2003, 2004, 2005, 2007, 2008,
+2009, 2010 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.1 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ This file documents GDB's obsolete annotations.
+
+ Copyright (C) 1994, 1995, 2000, 2001, 2003, 2004, 2005, 2007, 2008,
+2009, 2010 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.1 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: annotate.info, Node: Top, Next: Annotations Overview, Up: (dir)
+
+GDB Annotations
+***************
+
+This document describes the obsolete level two annotation interface
+implemented in older GDB versions.
+
+* Menu:
+
+* Annotations Overview:: What annotations are; the general syntax.
+* Limitations:: Limitations of the annotation interface.
+* Migrating to GDB/MI:: Migrating to GDB/MI
+* Server Prefix:: Issuing a command without affecting user state.
+* Value Annotations:: Values are marked as such.
+* Frame Annotations:: Stack frames are annotated.
+* Displays:: GDB can be told to display something periodically.
+* Prompting:: Annotations marking GDB's need for input.
+* Errors:: Annotations for error messages.
+* Breakpoint Info:: Information on breakpoints.
+* Invalidation:: Some annotations describe things now invalid.
+* Annotations for Running::
+ Whether the program is running, how it stopped, etc.
+* Source Annotations:: Annotations describing source code.
+* Multi-threaded Apps:: An annotation that reports multi-threadedness.
+
+* GNU Free Documentation License::
+
+
+File: annotate.info, Node: Annotations Overview, Next: Limitations, Prev: Top, Up: Top
+
+1 What is an Annotation?
+************************
+
+To produce obsolete level two annotations, start GDB with the
+`--annotate=2' option.
+
+ Annotations start with a newline character, two `control-z'
+characters, and the name of the annotation. If there is no additional
+information associated with this annotation, the name of the annotation
+is followed immediately by a newline. If there is additional
+information, the name of the annotation is followed by a space, the
+additional information, and a newline. The additional information
+cannot contain newline characters.
+
+ Any output not beginning with a newline and two `control-z'
+characters denotes literal output from GDB. Currently there is no need
+for GDB to output a newline followed by two `control-z' characters, but
+if there was such a need, the annotations could be extended with an
+`escape' annotation which means those three characters as output.
+
+ A simple example of starting up GDB with annotations is:
+
+ $ gdb --annotate=2
+ GNU GDB 5.0
+ Copyright 2000 Free Software Foundation, Inc.
+ GDB is free software, covered by the GNU General Public License,
+ and you are welcome to change it and/or distribute copies of it
+ under certain conditions.
+ Type "show copying" to see the conditions.
+ There is absolutely no warranty for GDB. Type "show warranty"
+ for details.
+ This GDB was configured as "sparc-sun-sunos4.1.3"
+
+ ^Z^Zpre-prompt
+ (gdb)
+ ^Z^Zprompt
+ quit
+
+ ^Z^Zpost-prompt
+ $
+
+ Here `quit' is input to GDB; the rest is output from GDB. The three
+lines beginning `^Z^Z' (where `^Z' denotes a `control-z' character) are
+annotations; the rest is output from GDB.
+
+
+File: annotate.info, Node: Limitations, Next: Migrating to GDB/MI, Prev: Annotations Overview, Up: Top
+
+2 Limitations of the Annotation Interface
+*****************************************
+
+The level two annotations mechanism is known to have a number of
+technical and architectural limitations. As a consequence, in 2001,
+with the release of GDB 5.1 and the addition of GDB/MI, the annotation
+interface was marked as deprecated.
+
+ This chapter discusses the known problems.
+
+2.1 Dependant on CLI output
+===========================
+
+The annotation interface works by interspersing markups with GDB normal
+command-line interpreter output. Unfortunately, this makes the
+annotation client dependant on not just the annotations, but also the
+CLI output. This is because the client is forced to assume that
+specific GDB commands provide specific information. Any change to
+GDB's CLI output modifies or removes that information and,
+consequently, likely breaks the client.
+
+ Since the GDB/MI output is independent of the CLI, it does not have
+this problem.
+
+2.2 Scalability
+===============
+
+The annotation interface relies on value annotations (*note Value
+Annotations::) and the display mechanism as a way of obtaining
+up-to-date value information. These mechanisms are not scalable.
+
+ In a graphical environment, where many values can be displayed
+simultaneously, a serious performance problem occurs when the client
+tries to first extract from GDB, and then re-display, all those values.
+The client should instead only request and update the values that
+changed.
+
+ The GDB/MI Variable Objects provide just that mechanism.
+
+2.3 Correctness
+===============
+
+The annotation interface assumes that a variable's value can only be
+changed when the target is running. This assumption is not correct. A
+single assignment to a single variable can result in the entire target,
+and all displayed values, needing an update.
+
+ The GDB/MI Variable Objects include a mechanism for efficiently
+reporting such changes.
+
+2.4 Reliability
+===============
+
+The GDB/MI interface includes a dedicated test directory
+(`gdb/gdb.mi'), and any addition or fix to GDB/MI must include
+testsuite changes.
+
+2.5 Maintainability
+===================
+
+The annotation mechanism was implemented by interspersing CLI print
+statements with various annotations. As a consequence, any CLI output
+change can alter the annotation output.
+
+ Since the GDB/MI output is independent of the CLI, and the GDB/MI is
+increasingly implemented independent of the CLI code, its long term
+maintenance is much easier.
+
+
+File: annotate.info, Node: Migrating to GDB/MI, Next: Server Prefix, Prev: Limitations, Up: Top
+
+3 Migrating to GDB/MI
+*********************
+
+By using the `interp mi' command, it is possible for annotation clients
+to invoke GDB/MI commands, and hence access the GDB/MI. By doing this,
+existing annotation clients have a migration path from this obsolete
+interface to GDB/MI.
+
+
+File: annotate.info, Node: Server Prefix, Next: Value Annotations, Prev: Migrating to GDB/MI, Up: Top
+
+4 The Server Prefix
+*******************
+
+To issue a command to GDB without affecting certain aspects of the
+state which is seen by users, prefix it with `server '. This means
+that this command will not affect the command history, nor will it
+affect GDB's notion of which command to repeat if <RET> is pressed on a
+line by itself.
+
+ The server prefix does not affect the recording of values into the
+value history; to print a value without recording it into the value
+history, use the `output' command instead of the `print' command.
+
+
+File: annotate.info, Node: Value Annotations, Next: Frame Annotations, Prev: Server Prefix, Up: Top
+
+5 Values
+********
+
+_Value Annotations have been removed. GDB/MI instead provides Variable
+Objects._
+
+ When a value is printed in various contexts, GDB uses annotations to
+delimit the value from the surrounding text.
+
+ If a value is printed using `print' and added to the value history,
+the annotation looks like
+
+ ^Z^Zvalue-history-begin HISTORY-NUMBER VALUE-FLAGS
+ HISTORY-STRING
+ ^Z^Zvalue-history-value
+ THE-VALUE
+ ^Z^Zvalue-history-end
+
+where HISTORY-NUMBER is the number it is getting in the value history,
+HISTORY-STRING is a string, such as `$5 = ', which introduces the value
+to the user, THE-VALUE is the output corresponding to the value itself,
+and VALUE-FLAGS is `*' for a value which can be dereferenced and `-'
+for a value which cannot.
+
+ If the value is not added to the value history (it is an invalid
+float or it is printed with the `output' command), the annotation is
+similar:
+
+ ^Z^Zvalue-begin VALUE-FLAGS
+ THE-VALUE
+ ^Z^Zvalue-end
+
+ When GDB prints an argument to a function (for example, in the output
+from the `backtrace' command), it annotates it as follows:
+
+ ^Z^Zarg-begin
+ ARGUMENT-NAME
+ ^Z^Zarg-name-end
+ SEPARATOR-STRING
+ ^Z^Zarg-value VALUE-FLAGS
+ THE-VALUE
+ ^Z^Zarg-end
+
+where ARGUMENT-NAME is the name of the argument, SEPARATOR-STRING is
+text which separates the name from the value for the user's benefit
+(such as `='), and VALUE-FLAGS and THE-VALUE have the same meanings as
+in a `value-history-begin' annotation.
+
+ When printing a structure, GDB annotates it as follows:
+
+ ^Z^Zfield-begin VALUE-FLAGS
+ FIELD-NAME
+ ^Z^Zfield-name-end
+ SEPARATOR-STRING
+ ^Z^Zfield-value
+ THE-VALUE
+ ^Z^Zfield-end
+
+where FIELD-NAME is the name of the field, SEPARATOR-STRING is text
+which separates the name from the value for the user's benefit (such as
+`='), and VALUE-FLAGS and THE-VALUE have the same meanings as in a
+`value-history-begin' annotation.
+
+ When printing an array, GDB annotates it as follows:
+
+ ^Z^Zarray-section-begin ARRAY-INDEX VALUE-FLAGS
+
+where ARRAY-INDEX is the index of the first element being annotated and
+VALUE-FLAGS has the same meaning as in a `value-history-begin'
+annotation. This is followed by any number of elements, where is
+element can be either a single element:
+
+ `,' WHITESPACE ; omitted for the first element
+ THE-VALUE
+ ^Z^Zelt
+
+ or a repeated element
+
+ `,' WHITESPACE ; omitted for the first element
+ THE-VALUE
+ ^Z^Zelt-rep NUMBER-OF-REPETITIONS
+ REPETITION-STRING
+ ^Z^Zelt-rep-end
+
+ In both cases, THE-VALUE is the output for the value of the element
+and WHITESPACE can contain spaces, tabs, and newlines. In the repeated
+case, NUMBER-OF-REPETITIONS is the number of consecutive array elements
+which contain that value, and REPETITION-STRING is a string which is
+designed to convey to the user that repetition is being depicted.
+
+ Once all the array elements have been output, the array annotation is
+ended with
+
+ ^Z^Zarray-section-end
+
+
+File: annotate.info, Node: Frame Annotations, Next: Displays, Prev: Value Annotations, Up: Top
+
+6 Frames
+********
+
+_Value Annotations have been removed. GDB/MI instead provides a number
+of frame commands._
+
+ _Frame annotations are no longer available. The GDB/MI provides
+`-stack-list-arguments', `-stack-list-locals', and `-stack-list-frames'
+commands._
+
+ Whenever GDB prints a frame, it annotates it. For example, this
+applies to frames printed when GDB stops, output from commands such as
+`backtrace' or `up', etc.
+
+ The frame annotation begins with
+
+ ^Z^Zframe-begin LEVEL ADDRESS
+ LEVEL-STRING
+
+where LEVEL is the number of the frame (0 is the innermost frame, and
+other frames have positive numbers), ADDRESS is the address of the code
+executing in that frame, and LEVEL-STRING is a string designed to
+convey the level to the user. ADDRESS is in the form `0x' followed by
+one or more lowercase hex digits (note that this does not depend on the
+language). The frame ends with
+
+ ^Z^Zframe-end
+
+ Between these annotations is the main body of the frame, which can
+consist of
+
+ * ^Z^Zfunction-call
+ FUNCTION-CALL-STRING
+
+ where FUNCTION-CALL-STRING is text designed to convey to the user
+ that this frame is associated with a function call made by GDB to a
+ function in the program being debugged.
+
+ * ^Z^Zsignal-handler-caller
+ SIGNAL-HANDLER-CALLER-STRING
+
+ where SIGNAL-HANDLER-CALLER-STRING is text designed to convey to
+ the user that this frame is associated with whatever mechanism is
+ used by this operating system to call a signal handler (it is the
+ frame which calls the signal handler, not the frame for the signal
+ handler itself).
+
+ * A normal frame.
+
+ This can optionally (depending on whether this is thought of as
+ interesting information for the user to see) begin with
+
+ ^Z^Zframe-address
+ ADDRESS
+ ^Z^Zframe-address-end
+ SEPARATOR-STRING
+
+ where ADDRESS is the address executing in the frame (the same
+ address as in the `frame-begin' annotation, but printed in a form
+ which is intended for user consumption--in particular, the syntax
+ varies depending on the language), and SEPARATOR-STRING is a string
+ intended to separate this address from what follows for the user's
+ benefit.
+
+ Then comes
+
+ ^Z^Zframe-function-name
+ FUNCTION-NAME
+ ^Z^Zframe-args
+ ARGUMENTS
+
+ where FUNCTION-NAME is the name of the function executing in the
+ frame, or `??' if not known, and ARGUMENTS are the arguments to
+ the frame, with parentheses around them (each argument is annotated
+ individually as well, *note Value Annotations::).
+
+ If source information is available, a reference to it is then
+ printed:
+
+ ^Z^Zframe-source-begin
+ SOURCE-INTRO-STRING
+ ^Z^Zframe-source-file
+ FILENAME
+ ^Z^Zframe-source-file-end
+ :
+ ^Z^Zframe-source-line
+ LINE-NUMBER
+ ^Z^Zframe-source-end
+
+ where SOURCE-INTRO-STRING separates for the user's benefit the
+ reference from the text which precedes it, FILENAME is the name of
+ the source file, and LINE-NUMBER is the line number within that
+ file (the first line is line 1).
+
+ If GDB prints some information about where the frame is from (which
+ library, which load segment, etc.; currently only done on the
+ RS/6000), it is annotated with
+
+ ^Z^Zframe-where
+ INFORMATION
+
+ Then, if source is to actually be displayed for this frame (for
+ example, this is not true for output from the `backtrace'
+ command), then a `source' annotation (*note Source Annotations::)
+ is displayed. Unlike most annotations, this is output instead of
+ the normal text which would be output, not in addition.
+
+
+File: annotate.info, Node: Displays, Next: Prompting, Prev: Frame Annotations, Up: Top
+
+7 Displays
+**********
+
+_Display Annotations have been removed. GDB/MI instead provides
+Variable Objects._
+
+ When GDB is told to display something using the `display' command,
+the results of the display are annotated:
+
+ ^Z^Zdisplay-begin
+ NUMBER
+ ^Z^Zdisplay-number-end
+ NUMBER-SEPARATOR
+ ^Z^Zdisplay-format
+ FORMAT
+ ^Z^Zdisplay-expression
+ EXPRESSION
+ ^Z^Zdisplay-expression-end
+ EXPRESSION-SEPARATOR
+ ^Z^Zdisplay-value
+ VALUE
+ ^Z^Zdisplay-end
+
+where NUMBER is the number of the display, NUMBER-SEPARATOR is intended
+to separate the number from what follows for the user, FORMAT includes
+information such as the size, format, or other information about how
+the value is being displayed, EXPRESSION is the expression being
+displayed, EXPRESSION-SEPARATOR is intended to separate the expression
+from the text that follows for the user, and VALUE is the actual value
+being displayed.
+
+
+File: annotate.info, Node: Prompting, Next: Errors, Prev: Displays, Up: Top
+
+8 Annotation for GDB Input
+**************************
+
+When GDB prompts for input, it annotates this fact so it is possible to
+know when to send output, when the output from a given command is over,
+etc.
+
+ Different kinds of input each have a different "input type". Each
+input type has three annotations: a `pre-' annotation, which denotes
+the beginning of any prompt which is being output, a plain annotation,
+which denotes the end of the prompt, and then a `post-' annotation
+which denotes the end of any echo which may (or may not) be associated
+with the input. For example, the `prompt' input type features the
+following annotations:
+
+ ^Z^Zpre-prompt
+ ^Z^Zprompt
+ ^Z^Zpost-prompt
+
+ The input types are
+
+`prompt'
+ When GDB is prompting for a command (the main GDB prompt).
+
+`commands'
+ When GDB prompts for a set of commands, like in the `commands'
+ command. The annotations are repeated for each command which is
+ input.
+
+`overload-choice'
+ When GDB wants the user to select between various overloaded
+ functions.
+
+`query'
+ When GDB wants the user to confirm a potentially dangerous
+ operation.
+
+`prompt-for-continue'
+ When GDB is asking the user to press return to continue. Note:
+ Don't expect this to work well; instead use `set height 0' to
+ disable prompting. This is because the counting of lines is buggy
+ in the presence of annotations.
+
+
+File: annotate.info, Node: Errors, Next: Breakpoint Info, Prev: Prompting, Up: Top
+
+9 Errors
+********
+
+ ^Z^Zquit
+
+ This annotation occurs right before GDB responds to an interrupt.
+
+ ^Z^Zerror
+
+ This annotation occurs right before GDB responds to an error.
+
+ Quit and error annotations indicate that any annotations which GDB
+was in the middle of may end abruptly. For example, if a
+`value-history-begin' annotation is followed by a `error', one cannot
+expect to receive the matching `value-history-end'. One cannot expect
+not to receive it either, however; an error annotation does not
+necessarily mean that GDB is immediately returning all the way to the
+top level.
+
+ A quit or error annotation may be preceded by
+
+ ^Z^Zerror-begin
+
+ Any output between that and the quit or error annotation is the error
+message.
+
+ Warning messages are not yet annotated.
+
+
+File: annotate.info, Node: Breakpoint Info, Next: Invalidation, Prev: Errors, Up: Top
+
+10 Information on Breakpoints
+*****************************
+
+_Breakpoint Annotations have been removed. GDB/MI instead provides
+breakpoint commands._
+
+ The output from the `info breakpoints' command is annotated as
+follows:
+
+ ^Z^Zbreakpoints-headers
+ HEADER-ENTRY
+ ^Z^Zbreakpoints-table
+
+where HEADER-ENTRY has the same syntax as an entry (see below) but
+instead of containing data, it contains strings which are intended to
+convey the meaning of each field to the user. This is followed by any
+number of entries. If a field does not apply for this entry, it is
+omitted. Fields may contain trailing whitespace. Each entry consists
+of:
+
+ ^Z^Zrecord
+ ^Z^Zfield 0
+ NUMBER
+ ^Z^Zfield 1
+ TYPE
+ ^Z^Zfield 2
+ DISPOSITION
+ ^Z^Zfield 3
+ ENABLE
+ ^Z^Zfield 4
+ ADDRESS
+ ^Z^Zfield 5
+ WHAT
+ ^Z^Zfield 6
+ FRAME
+ ^Z^Zfield 7
+ CONDITION
+ ^Z^Zfield 8
+ IGNORE-COUNT
+ ^Z^Zfield 9
+ COMMANDS
+
+ Note that ADDRESS is intended for user consumption--the syntax
+varies depending on the language.
+
+ The output ends with
+
+ ^Z^Zbreakpoints-table-end
+
+
+File: annotate.info, Node: Invalidation, Next: Annotations for Running, Prev: Breakpoint Info, Up: Top
+
+11 Invalidation Notices
+***********************
+
+The following annotations say that certain pieces of state may have
+changed.
+
+`^Z^Zframes-invalid'
+ The frames (for example, output from the `backtrace' command) may
+ have changed.
+
+`^Z^Zbreakpoints-invalid'
+ The breakpoints may have changed. For example, the user just
+ added or deleted a breakpoint.
+
+
+File: annotate.info, Node: Annotations for Running, Next: Source Annotations, Prev: Invalidation, Up: Top
+
+12 Running the Program
+**********************
+
+When the program starts executing due to a GDB command such as `step'
+or `continue',
+
+ ^Z^Zstarting
+
+ is output. When the program stops,
+
+ ^Z^Zstopped
+
+ is output. Before the `stopped' annotation, a variety of
+annotations describe how the program stopped.
+
+`^Z^Zexited EXIT-STATUS'
+ The program exited, and EXIT-STATUS is the exit status (zero for
+ successful exit, otherwise nonzero).
+
+`^Z^Zsignalled'
+ The program exited with a signal. After the `^Z^Zsignalled', the
+ annotation continues:
+
+ INTRO-TEXT
+ ^Z^Zsignal-name
+ NAME
+ ^Z^Zsignal-name-end
+ MIDDLE-TEXT
+ ^Z^Zsignal-string
+ STRING
+ ^Z^Zsignal-string-end
+ END-TEXT
+
+ where NAME is the name of the signal, such as `SIGILL' or
+ `SIGSEGV', and STRING is the explanation of the signal, such as
+ `Illegal Instruction' or `Segmentation fault'. INTRO-TEXT,
+ MIDDLE-TEXT, and END-TEXT are for the user's benefit and have no
+ particular format.
+
+`^Z^Zsignal'
+ The syntax of this annotation is just like `signalled', but GDB is
+ just saying that the program received the signal, not that it was
+ terminated with it.
+
+`^Z^Zbreakpoint NUMBER'
+ The program hit breakpoint number NUMBER.
+
+`^Z^Zwatchpoint NUMBER'
+ The program hit watchpoint number NUMBER.
+
+
+File: annotate.info, Node: Source Annotations, Next: Multi-threaded Apps, Prev: Annotations for Running, Up: Top
+
+13 Displaying Source
+********************
+
+The following annotation is used instead of displaying source code:
+
+ ^Z^Zsource FILENAME:LINE:CHARACTER:MIDDLE:ADDR
+
+ where FILENAME is an absolute file name indicating which source
+file, LINE is the line number within that file (where 1 is the first
+line in the file), CHARACTER is the character position within the file
+(where 0 is the first character in the file) (for most debug formats
+this will necessarily point to the beginning of a line), MIDDLE is
+`middle' if ADDR is in the middle of the line, or `beg' if ADDR is at
+the beginning of the line, and ADDR is the address in the target
+program associated with the source which is being displayed. ADDR is
+in the form `0x' followed by one or more lowercase hex digits (note
+that this does not depend on the language).
+
+
+File: annotate.info, Node: Multi-threaded Apps, Next: GNU Free Documentation License, Prev: Source Annotations, Up: Top
+
+14 Multi-threaded Applications
+******************************
+
+The following annotations report thread related changes of state.
+
+`^Z^Znew-thread'
+ This annotation is issued once for each thread that is created
+ apart from the main thread, which is not reported.
+
+`^Z^Zthread-changed'
+ The selected thread has changed. This may occur at the request of
+ the user with the `thread' command, or as a result of execution,
+ e.g., another thread hits a breakpoint.
+
+
+
+File: annotate.info, Node: GNU Free Documentation License, Prev: Multi-threaded Apps, Up: Top
+
+15 GNU Free Documentation License
+*********************************
+
+ Version 1.2, November 2002
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ 0. PREAMBLE
+
+ The purpose of this License is to make a manual, textbook, or other
+ functional and useful document "free" in the sense of freedom: to
+ assure everyone the effective freedom to copy and redistribute it,
+ with or without modifying it, either commercially or
+ noncommercially. Secondarily, this License preserves for the
+ author and publisher a way to get credit for their work, while not
+ being considered responsible for modifications made by others.
+
+ This License is a kind of "copyleft", which means that derivative
+ works of the document must themselves be free in the same sense.
+ It complements the GNU General Public License, which is a copyleft
+ license designed for free software.
+
+ We have designed this License in order to use it for manuals for
+ free software, because free software needs free documentation: a
+ free program should come with manuals providing the same freedoms
+ that the software does. But this License is not limited to
+ software manuals; it can be used for any textual work, regardless
+ of subject matter or whether it is published as a printed book.
+ We recommend this License principally for works whose purpose is
+ instruction or reference.
+
+ 1. APPLICABILITY AND DEFINITIONS
+
+ This License applies to any manual or other work, in any medium,
+ that contains a notice placed by the copyright holder saying it
+ can be distributed under the terms of this License. Such a notice
+ grants a world-wide, royalty-free license, unlimited in duration,
+ to use that work under the conditions stated herein. The
+ "Document", below, refers to any such manual or work. Any member
+ of the public is a licensee, and is addressed as "you". You
+ accept the license if you copy, modify or distribute the work in a
+ way requiring permission under copyright law.
+
+ A "Modified Version" of the Document means any work containing the
+ Document or a portion of it, either copied verbatim, or with
+ modifications and/or translated into another language.
+
+ A "Secondary Section" is a named appendix or a front-matter section
+ of the Document that deals exclusively with the relationship of the
+ publishers or authors of the Document to the Document's overall
+ subject (or to related matters) and contains nothing that could
+ fall directly within that overall subject. (Thus, if the Document
+ is in part a textbook of mathematics, a Secondary Section may not
+ explain any mathematics.) The relationship could be a matter of
+ historical connection with the subject or with related matters, or
+ of legal, commercial, philosophical, ethical or political position
+ regarding them.
+
+ The "Invariant Sections" are certain Secondary Sections whose
+ titles are designated, as being those of Invariant Sections, in
+ the notice that says that the Document is released under this
+ License. If a section does not fit the above definition of
+ Secondary then it is not allowed to be designated as Invariant.
+ The Document may contain zero Invariant Sections. If the Document
+ does not identify any Invariant Sections then there are none.
+
+ The "Cover Texts" are certain short passages of text that are
+ listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+ that says that the Document is released under this License. A
+ Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+ be at most 25 words.
+
+ A "Transparent" copy of the Document means a machine-readable copy,
+ represented in a format whose specification is available to the
+ general public, that is suitable for revising the document
+ straightforwardly with generic text editors or (for images
+ composed of pixels) generic paint programs or (for drawings) some
+ widely available drawing editor, and that is suitable for input to
+ text formatters or for automatic translation to a variety of
+ formats suitable for input to text formatters. A copy made in an
+ otherwise Transparent file format whose markup, or absence of
+ markup, has been arranged to thwart or discourage subsequent
+ modification by readers is not Transparent. An image format is
+ not Transparent if used for any substantial amount of text. A
+ copy that is not "Transparent" is called "Opaque".
+
+ Examples of suitable formats for Transparent copies include plain
+ ASCII without markup, Texinfo input format, LaTeX input format,
+ SGML or XML using a publicly available DTD, and
+ standard-conforming simple HTML, PostScript or PDF designed for
+ human modification. Examples of transparent image formats include
+ PNG, XCF and JPG. Opaque formats include proprietary formats that
+ can be read and edited only by proprietary word processors, SGML or
+ XML for which the DTD and/or processing tools are not generally
+ available, and the machine-generated HTML, PostScript or PDF
+ produced by some word processors for output purposes only.
+
+ The "Title Page" means, for a printed book, the title page itself,
+ plus such following pages as are needed to hold, legibly, the
+ material this License requires to appear in the title page. For
+ works in formats which do not have any title page as such, "Title
+ Page" means the text near the most prominent appearance of the
+ work's title, preceding the beginning of the body of the text.
+
+ A section "Entitled XYZ" means a named subunit of the Document
+ whose title either is precisely XYZ or contains XYZ in parentheses
+ following text that translates XYZ in another language. (Here XYZ
+ stands for a specific section name mentioned below, such as
+ "Acknowledgements", "Dedications", "Endorsements", or "History".)
+ To "Preserve the Title" of such a section when you modify the
+ Document means that it remains a section "Entitled XYZ" according
+ to this definition.
+
+ The Document may include Warranty Disclaimers next to the notice
+ which states that this License applies to the Document. These
+ Warranty Disclaimers are considered to be included by reference in
+ this License, but only as regards disclaiming warranties: any other
+ implication that these Warranty Disclaimers may have is void and
+ has no effect on the meaning of this License.
+
+ 2. VERBATIM COPYING
+
+ You may copy and distribute the Document in any medium, either
+ commercially or noncommercially, provided that this License, the
+ copyright notices, and the license notice saying this License
+ applies to the Document are reproduced in all copies, and that you
+ add no other conditions whatsoever to those of this License. You
+ may not use technical measures to obstruct or control the reading
+ or further copying of the copies you make or distribute. However,
+ you may accept compensation in exchange for copies. If you
+ distribute a large enough number of copies you must also follow
+ the conditions in section 3.
+
+ You may also lend copies, under the same conditions stated above,
+ and you may publicly display copies.
+
+ 3. COPYING IN QUANTITY
+
+ If you publish printed copies (or copies in media that commonly
+ have printed covers) of the Document, numbering more than 100, and
+ the Document's license notice requires Cover Texts, you must
+ enclose the copies in covers that carry, clearly and legibly, all
+ these Cover Texts: Front-Cover Texts on the front cover, and
+ Back-Cover Texts on the back cover. Both covers must also clearly
+ and legibly identify you as the publisher of these copies. The
+ front cover must present the full title with all words of the
+ title equally prominent and visible. You may add other material
+ on the covers in addition. Copying with changes limited to the
+ covers, as long as they preserve the title of the Document and
+ satisfy these conditions, can be treated as verbatim copying in
+ other respects.
+
+ If the required texts for either cover are too voluminous to fit
+ legibly, you should put the first ones listed (as many as fit
+ reasonably) on the actual cover, and continue the rest onto
+ adjacent pages.
+
+ If you publish or distribute Opaque copies of the Document
+ numbering more than 100, you must either include a
+ machine-readable Transparent copy along with each Opaque copy, or
+ state in or with each Opaque copy a computer-network location from
+ which the general network-using public has access to download
+ using public-standard network protocols a complete Transparent
+ copy of the Document, free of added material. If you use the
+ latter option, you must take reasonably prudent steps, when you
+ begin distribution of Opaque copies in quantity, to ensure that
+ this Transparent copy will remain thus accessible at the stated
+ location until at least one year after the last time you
+ distribute an Opaque copy (directly or through your agents or
+ retailers) of that edition to the public.
+
+ It is requested, but not required, that you contact the authors of
+ the Document well before redistributing any large number of
+ copies, to give them a chance to provide you with an updated
+ version of the Document.
+
+ 4. MODIFICATIONS
+
+ You may copy and distribute a Modified Version of the Document
+ under the conditions of sections 2 and 3 above, provided that you
+ release the Modified Version under precisely this License, with
+ the Modified Version filling the role of the Document, thus
+ licensing distribution and modification of the Modified Version to
+ whoever possesses a copy of it. In addition, you must do these
+ things in the Modified Version:
+
+ A. Use in the Title Page (and on the covers, if any) a title
+ distinct from that of the Document, and from those of
+ previous versions (which should, if there were any, be listed
+ in the History section of the Document). You may use the
+ same title as a previous version if the original publisher of
+ that version gives permission.
+
+ B. List on the Title Page, as authors, one or more persons or
+ entities responsible for authorship of the modifications in
+ the Modified Version, together with at least five of the
+ principal authors of the Document (all of its principal
+ authors, if it has fewer than five), unless they release you
+ from this requirement.
+
+ C. State on the Title page the name of the publisher of the
+ Modified Version, as the publisher.
+
+ D. Preserve all the copyright notices of the Document.
+
+ E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+
+ F. Include, immediately after the copyright notices, a license
+ notice giving the public permission to use the Modified
+ Version under the terms of this License, in the form shown in
+ the Addendum below.
+
+ G. Preserve in that license notice the full lists of Invariant
+ Sections and required Cover Texts given in the Document's
+ license notice.
+
+ H. Include an unaltered copy of this License.
+
+ I. Preserve the section Entitled "History", Preserve its Title,
+ and add to it an item stating at least the title, year, new
+ authors, and publisher of the Modified Version as given on
+ the Title Page. If there is no section Entitled "History" in
+ the Document, create one stating the title, year, authors,
+ and publisher of the Document as given on its Title Page,
+ then add an item describing the Modified Version as stated in
+ the previous sentence.
+
+ J. Preserve the network location, if any, given in the Document
+ for public access to a Transparent copy of the Document, and
+ likewise the network locations given in the Document for
+ previous versions it was based on. These may be placed in
+ the "History" section. You may omit a network location for a
+ work that was published at least four years before the
+ Document itself, or if the original publisher of the version
+ it refers to gives permission.
+
+ K. For any section Entitled "Acknowledgements" or "Dedications",
+ Preserve the Title of the section, and preserve in the
+ section all the substance and tone of each of the contributor
+ acknowledgements and/or dedications given therein.
+
+ L. Preserve all the Invariant Sections of the Document,
+ unaltered in their text and in their titles. Section numbers
+ or the equivalent are not considered part of the section
+ titles.
+
+ M. Delete any section Entitled "Endorsements". Such a section
+ may not be included in the Modified Version.
+
+ N. Do not retitle any existing section to be Entitled
+ "Endorsements" or to conflict in title with any Invariant
+ Section.
+
+ O. Preserve any Warranty Disclaimers.
+
+ If the Modified Version includes new front-matter sections or
+ appendices that qualify as Secondary Sections and contain no
+ material copied from the Document, you may at your option
+ designate some or all of these sections as invariant. To do this,
+ add their titles to the list of Invariant Sections in the Modified
+ Version's license notice. These titles must be distinct from any
+ other section titles.
+
+ You may add a section Entitled "Endorsements", provided it contains
+ nothing but endorsements of your Modified Version by various
+ parties--for example, statements of peer review or that the text
+ has been approved by an organization as the authoritative
+ definition of a standard.
+
+ You may add a passage of up to five words as a Front-Cover Text,
+ and a passage of up to 25 words as a Back-Cover Text, to the end
+ of the list of Cover Texts in the Modified Version. Only one
+ passage of Front-Cover Text and one of Back-Cover Text may be
+ added by (or through arrangements made by) any one entity. If the
+ Document already includes a cover text for the same cover,
+ previously added by you or by arrangement made by the same entity
+ you are acting on behalf of, you may not add another; but you may
+ replace the old one, on explicit permission from the previous
+ publisher that added the old one.
+
+ The author(s) and publisher(s) of the Document do not by this
+ License give permission to use their names for publicity for or to
+ assert or imply endorsement of any Modified Version.
+
+ 5. COMBINING DOCUMENTS
+
+ You may combine the Document with other documents released under
+ this License, under the terms defined in section 4 above for
+ modified versions, provided that you include in the combination
+ all of the Invariant Sections of all of the original documents,
+ unmodified, and list them all as Invariant Sections of your
+ combined work in its license notice, and that you preserve all
+ their Warranty Disclaimers.
+
+ The combined work need only contain one copy of this License, and
+ multiple identical Invariant Sections may be replaced with a single
+ copy. If there are multiple Invariant Sections with the same name
+ but different contents, make the title of each such section unique
+ by adding at the end of it, in parentheses, the name of the
+ original author or publisher of that section if known, or else a
+ unique number. Make the same adjustment to the section titles in
+ the list of Invariant Sections in the license notice of the
+ combined work.
+
+ In the combination, you must combine any sections Entitled
+ "History" in the various original documents, forming one section
+ Entitled "History"; likewise combine any sections Entitled
+ "Acknowledgements", and any sections Entitled "Dedications". You
+ must delete all sections Entitled "Endorsements."
+
+ 6. COLLECTIONS OF DOCUMENTS
+
+ You may make a collection consisting of the Document and other
+ documents released under this License, and replace the individual
+ copies of this License in the various documents with a single copy
+ that is included in the collection, provided that you follow the
+ rules of this License for verbatim copying of each of the
+ documents in all other respects.
+
+ You may extract a single document from such a collection, and
+ distribute it individually under this License, provided you insert
+ a copy of this License into the extracted document, and follow
+ this License in all other respects regarding verbatim copying of
+ that document.
+
+ 7. AGGREGATION WITH INDEPENDENT WORKS
+
+ A compilation of the Document or its derivatives with other
+ separate and independent documents or works, in or on a volume of
+ a storage or distribution medium, is called an "aggregate" if the
+ copyright resulting from the compilation is not used to limit the
+ legal rights of the compilation's users beyond what the individual
+ works permit. When the Document is included in an aggregate, this
+ License does not apply to the other works in the aggregate which
+ are not themselves derivative works of the Document.
+
+ If the Cover Text requirement of section 3 is applicable to these
+ copies of the Document, then if the Document is less than one half
+ of the entire aggregate, the Document's Cover Texts may be placed
+ on covers that bracket the Document within the aggregate, or the
+ electronic equivalent of covers if the Document is in electronic
+ form. Otherwise they must appear on printed covers that bracket
+ the whole aggregate.
+
+ 8. TRANSLATION
+
+ Translation is considered a kind of modification, so you may
+ distribute translations of the Document under the terms of section
+ 4. Replacing Invariant Sections with translations requires special
+ permission from their copyright holders, but you may include
+ translations of some or all Invariant Sections in addition to the
+ original versions of these Invariant Sections. You may include a
+ translation of this License, and all the license notices in the
+ Document, and any Warranty Disclaimers, provided that you also
+ include the original English version of this License and the
+ original versions of those notices and disclaimers. In case of a
+ disagreement between the translation and the original version of
+ this License or a notice or disclaimer, the original version will
+ prevail.
+
+ If a section in the Document is Entitled "Acknowledgements",
+ "Dedications", or "History", the requirement (section 4) to
+ Preserve its Title (section 1) will typically require changing the
+ actual title.
+
+ 9. TERMINATION
+
+ You may not copy, modify, sublicense, or distribute the Document
+ except as expressly provided for under this License. Any other
+ attempt to copy, modify, sublicense or distribute the Document is
+ void, and will automatically terminate your rights under this
+ License. However, parties who have received copies, or rights,
+ from you under this License will not have their licenses
+ terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+ The Free Software Foundation may publish new, revised versions of
+ the GNU Free Documentation License from time to time. Such new
+ versions will be similar in spirit to the present version, but may
+ differ in detail to address new problems or concerns. See
+ `http://www.gnu.org/copyleft/'.
+
+ Each version of the License is given a distinguishing version
+ number. If the Document specifies that a particular numbered
+ version of this License "or any later version" applies to it, you
+ have the option of following the terms and conditions either of
+ that specified version or of any later version that has been
+ published (not as a draft) by the Free Software Foundation. If
+ the Document does not specify a version number of this License,
+ you may choose any version ever published (not as a draft) by the
+ Free Software Foundation.
+
+15.1 ADDENDUM: How to use this License for your documents
+=========================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+ Copyright (C) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+ Texts. A copy of the license is included in the section entitled ``GNU
+ Free Documentation License''.
+
+ If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+ with the Invariant Sections being LIST THEIR TITLES, with
+ the Front-Cover Texts being LIST, and with the Back-Cover Texts
+ being LIST.
+
+ If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+ If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+
+Tag Table:
+Node: Top1368
+Node: Annotations Overview2538
+Node: Limitations4337
+Node: Migrating to GDB/MI6922
+Node: Server Prefix7305
+Node: Value Annotations7951
+Node: Frame Annotations11121
+Node: Displays15020
+Node: Prompting16051
+Node: Errors17554
+Node: Breakpoint Info18444
+Node: Invalidation19669
+Node: Annotations for Running20148
+Node: Source Annotations21661
+Node: Multi-threaded Apps22607
+Node: GNU Free Documentation License23216
+
+End Tag Table
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/as.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/as.info
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--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/dir
@@ -0,0 +1,59 @@
+This is the file .../info/dir, which contains the
+topmost node of the Info hierarchy, called (dir)Top.
+The first time you invoke Info you start off looking at this node.
+
+File: dir, Node: Top This is the top of the INFO tree
+
+ This (the Directory node) gives a menu of major topics.
+ Typing "q" exits, "?" lists all Info commands, "d" returns here,
+ "h" gives a primer for first-timers,
+ "mEmacs<Return>" visits the Emacs manual, etc.
+
+ In Emacs, you can click mouse button 2 on a menu item or cross reference
+ to select it.
+
+* Menu:
+
+Individual utilities
+* addr2line: (binutils)addr2line. Convert addresses to file and
+ line.
+* ar: (binutils)ar. Create, modify, and extract
+ from archives.
+* c++filt: (binutils)c++filt. Filter to demangle encoded C++
+ symbols.
+* cxxfilt: (binutils)c++filt. MS-DOS name for c++filt.
+* dlltool: (binutils)dlltool. Create files needed to build
+ and use DLLs.
+* nlmconv: (binutils)nlmconv. Converts object code into an
+ NLM.
+* nm: (binutils)nm. List symbols from object files.
+* objcopy: (binutils)objcopy. Copy and translate object
+ files.
+* objdump: (binutils)objdump. Display information from
+ object files.
+* ranlib: (binutils)ranlib. Generate index to archive
+ contents.
+* readelf: (binutils)readelf. Display the contents of ELF
+ format files.
+* size: (binutils)size. List section sizes and total
+ size.
+* strings: (binutils)strings. List printable strings from
+ files.
+* strip: (binutils)strip. Discard symbols.
+* windmc: (binutils)windmc. Generator for Windows message
+ resources.
+* windres: (binutils)windres. Manipulate Windows resources.
+
+Miscellaneous
+* As: (as). The GNU assembler.
+* Bfd: (bfd). The Binary File Descriptor library.
+* Gas: (as). The GNU assembler.
+* Ld: (ld). The GNU linker.
+* gprof: (gprof). Profiling your program's execution
+
+Software development
+* Annotate: (annotate). The obsolete annotation interface.
+* Binutils: (binutils). The GNU binary utilities.
+* Gdb: (gdb). The GNU debugger.
+* Gdb-Internals: (gdbint). The GNU debugger's internals.
+* Stabs: (stabs). The "stabs" debugging information format.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gdb.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gdb.info
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diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gprof.info b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/info/gprof.info
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@@ -0,0 +1,2469 @@
+This is gprof.info, produced by makeinfo version 4.8 from gprof.texi.
+
+START-INFO-DIR-ENTRY
+* gprof: (gprof). Profiling your program's execution
+END-INFO-DIR-ENTRY
+
+ This file documents the gprof profiler of the GNU system.
+
+ Copyright (C) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008,
+2009 Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: gprof.info, Node: Top, Next: Introduction, Up: (dir)
+
+Profiling a Program: Where Does It Spend Its Time?
+**************************************************
+
+This manual describes the GNU profiler, `gprof', and how you can use it
+to determine which parts of a program are taking most of the execution
+time. We assume that you know how to write, compile, and execute
+programs. GNU `gprof' was written by Jay Fenlason.
+
+ This manual is for `gprof' (GNU Binutils) version 2.20.
+
+ This document is distributed under the terms of the GNU Free
+Documentation License version 1.3. A copy of the license is included
+in the section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* Introduction:: What profiling means, and why it is useful.
+
+* Compiling:: How to compile your program for profiling.
+* Executing:: Executing your program to generate profile data
+* Invoking:: How to run `gprof', and its options
+
+* Output:: Interpreting `gprof''s output
+
+* Inaccuracy:: Potential problems you should be aware of
+* How do I?:: Answers to common questions
+* Incompatibilities:: (between GNU `gprof' and Unix `gprof'.)
+* Details:: Details of how profiling is done
+* GNU Free Documentation License:: GNU Free Documentation License
+
+
+File: gprof.info, Node: Introduction, Next: Compiling, Prev: Top, Up: Top
+
+1 Introduction to Profiling
+***************************
+
+Profiling allows you to learn where your program spent its time and
+which functions called which other functions while it was executing.
+This information can show you which pieces of your program are slower
+than you expected, and might be candidates for rewriting to make your
+program execute faster. It can also tell you which functions are being
+called more or less often than you expected. This may help you spot
+bugs that had otherwise been unnoticed.
+
+ Since the profiler uses information collected during the actual
+execution of your program, it can be used on programs that are too
+large or too complex to analyze by reading the source. However, how
+your program is run will affect the information that shows up in the
+profile data. If you don't use some feature of your program while it
+is being profiled, no profile information will be generated for that
+feature.
+
+ Profiling has several steps:
+
+ * You must compile and link your program with profiling enabled.
+ *Note Compiling a Program for Profiling: Compiling.
+
+ * You must execute your program to generate a profile data file.
+ *Note Executing the Program: Executing.
+
+ * You must run `gprof' to analyze the profile data. *Note `gprof'
+ Command Summary: Invoking.
+
+ The next three chapters explain these steps in greater detail.
+
+ Several forms of output are available from the analysis.
+
+ The "flat profile" shows how much time your program spent in each
+function, and how many times that function was called. If you simply
+want to know which functions burn most of the cycles, it is stated
+concisely here. *Note The Flat Profile: Flat Profile.
+
+ The "call graph" shows, for each function, which functions called
+it, which other functions it called, and how many times. There is also
+an estimate of how much time was spent in the subroutines of each
+function. This can suggest places where you might try to eliminate
+function calls that use a lot of time. *Note The Call Graph: Call
+Graph.
+
+ The "annotated source" listing is a copy of the program's source
+code, labeled with the number of times each line of the program was
+executed. *Note The Annotated Source Listing: Annotated Source.
+
+ To better understand how profiling works, you may wish to read a
+description of its implementation. *Note Implementation of Profiling:
+Implementation.
+
+
+File: gprof.info, Node: Compiling, Next: Executing, Prev: Introduction, Up: Top
+
+2 Compiling a Program for Profiling
+***********************************
+
+The first step in generating profile information for your program is to
+compile and link it with profiling enabled.
+
+ To compile a source file for profiling, specify the `-pg' option when
+you run the compiler. (This is in addition to the options you normally
+use.)
+
+ To link the program for profiling, if you use a compiler such as `cc'
+to do the linking, simply specify `-pg' in addition to your usual
+options. The same option, `-pg', alters either compilation or linking
+to do what is necessary for profiling. Here are examples:
+
+ cc -g -c myprog.c utils.c -pg
+ cc -o myprog myprog.o utils.o -pg
+
+ The `-pg' option also works with a command that both compiles and
+links:
+
+ cc -o myprog myprog.c utils.c -g -pg
+
+ Note: The `-pg' option must be part of your compilation options as
+well as your link options. If it is not then no call-graph data will
+be gathered and when you run `gprof' you will get an error message like
+this:
+
+ gprof: gmon.out file is missing call-graph data
+
+ If you add the `-Q' switch to suppress the printing of the call
+graph data you will still be able to see the time samples:
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls Ts/call Ts/call name
+ 44.12 0.07 0.07 zazLoop
+ 35.29 0.14 0.06 main
+ 20.59 0.17 0.04 bazMillion
+
+ If you run the linker `ld' directly instead of through a compiler
+such as `cc', you may have to specify a profiling startup file
+`gcrt0.o' as the first input file instead of the usual startup file
+`crt0.o'. In addition, you would probably want to specify the
+profiling C library, `libc_p.a', by writing `-lc_p' instead of the
+usual `-lc'. This is not absolutely necessary, but doing this gives
+you number-of-calls information for standard library functions such as
+`read' and `open'. For example:
+
+ ld -o myprog /lib/gcrt0.o myprog.o utils.o -lc_p
+
+ If you are running the program on a system which supports shared
+libraries you may run into problems with the profiling support code in
+a shared library being called before that library has been fully
+initialised. This is usually detected by the program encountering a
+segmentation fault as soon as it is run. The solution is to link
+against a static version of the library containing the profiling
+support code, which for `gcc' users can be done via the `-static' or
+`-static-libgcc' command line option. For example:
+
+ gcc -g -pg -static-libgcc myprog.c utils.c -o myprog
+
+ If you compile only some of the modules of the program with `-pg',
+you can still profile the program, but you won't get complete
+information about the modules that were compiled without `-pg'. The
+only information you get for the functions in those modules is the
+total time spent in them; there is no record of how many times they
+were called, or from where. This will not affect the flat profile
+(except that the `calls' field for the functions will be blank), but
+will greatly reduce the usefulness of the call graph.
+
+ If you wish to perform line-by-line profiling you should use the
+`gcov' tool instead of `gprof'. See that tool's manual or info pages
+for more details of how to do this.
+
+ Note, older versions of `gcc' produce line-by-line profiling
+information that works with `gprof' rather than `gcov' so there is
+still support for displaying this kind of information in `gprof'. *Note
+Line-by-line Profiling: Line-by-line.
+
+ It also worth noting that `gcc' implements a
+`-finstrument-functions' command line option which will insert calls to
+special user supplied instrumentation routines at the entry and exit of
+every function in their program. This can be used to implement an
+alternative profiling scheme.
+
+
+File: gprof.info, Node: Executing, Next: Invoking, Prev: Compiling, Up: Top
+
+3 Executing the Program
+***********************
+
+Once the program is compiled for profiling, you must run it in order to
+generate the information that `gprof' needs. Simply run the program as
+usual, using the normal arguments, file names, etc. The program should
+run normally, producing the same output as usual. It will, however, run
+somewhat slower than normal because of the time spent collecting and
+writing the profile data.
+
+ The way you run the program--the arguments and input that you give
+it--may have a dramatic effect on what the profile information shows.
+The profile data will describe the parts of the program that were
+activated for the particular input you use. For example, if the first
+command you give to your program is to quit, the profile data will show
+the time used in initialization and in cleanup, but not much else.
+
+ Your program will write the profile data into a file called
+`gmon.out' just before exiting. If there is already a file called
+`gmon.out', its contents are overwritten. There is currently no way to
+tell the program to write the profile data under a different name, but
+you can rename the file afterwards if you are concerned that it may be
+overwritten.
+
+ In order to write the `gmon.out' file properly, your program must
+exit normally: by returning from `main' or by calling `exit'. Calling
+the low-level function `_exit' does not write the profile data, and
+neither does abnormal termination due to an unhandled signal.
+
+ The `gmon.out' file is written in the program's _current working
+directory_ at the time it exits. This means that if your program calls
+`chdir', the `gmon.out' file will be left in the last directory your
+program `chdir''d to. If you don't have permission to write in this
+directory, the file is not written, and you will get an error message.
+
+ Older versions of the GNU profiling library may also write a file
+called `bb.out'. This file, if present, contains an human-readable
+listing of the basic-block execution counts. Unfortunately, the
+appearance of a human-readable `bb.out' means the basic-block counts
+didn't get written into `gmon.out'. The Perl script `bbconv.pl',
+included with the `gprof' source distribution, will convert a `bb.out'
+file into a format readable by `gprof'. Invoke it like this:
+
+ bbconv.pl < bb.out > BH-DATA
+
+ This translates the information in `bb.out' into a form that `gprof'
+can understand. But you still need to tell `gprof' about the existence
+of this translated information. To do that, include BB-DATA on the
+`gprof' command line, _along with `gmon.out'_, like this:
+
+ gprof OPTIONS EXECUTABLE-FILE gmon.out BB-DATA [YET-MORE-PROFILE-DATA-FILES...] [> OUTFILE]
+
+
+File: gprof.info, Node: Invoking, Next: Output, Prev: Executing, Up: Top
+
+4 `gprof' Command Summary
+*************************
+
+After you have a profile data file `gmon.out', you can run `gprof' to
+interpret the information in it. The `gprof' program prints a flat
+profile and a call graph on standard output. Typically you would
+redirect the output of `gprof' into a file with `>'.
+
+ You run `gprof' like this:
+
+ gprof OPTIONS [EXECUTABLE-FILE [PROFILE-DATA-FILES...]] [> OUTFILE]
+
+Here square-brackets indicate optional arguments.
+
+ If you omit the executable file name, the file `a.out' is used. If
+you give no profile data file name, the file `gmon.out' is used. If
+any file is not in the proper format, or if the profile data file does
+not appear to belong to the executable file, an error message is
+printed.
+
+ You can give more than one profile data file by entering all their
+names after the executable file name; then the statistics in all the
+data files are summed together.
+
+ The order of these options does not matter.
+
+* Menu:
+
+* Output Options:: Controlling `gprof''s output style
+* Analysis Options:: Controlling how `gprof' analyzes its data
+* Miscellaneous Options::
+* Deprecated Options:: Options you no longer need to use, but which
+ have been retained for compatibility
+* Symspecs:: Specifying functions to include or exclude
+
+
+File: gprof.info, Node: Output Options, Next: Analysis Options, Up: Invoking
+
+4.1 Output Options
+==================
+
+These options specify which of several output formats `gprof' should
+produce.
+
+ Many of these options take an optional "symspec" to specify
+functions to be included or excluded. These options can be specified
+multiple times, with different symspecs, to include or exclude sets of
+symbols. *Note Symspecs: Symspecs.
+
+ Specifying any of these options overrides the default (`-p -q'),
+which prints a flat profile and call graph analysis for all functions.
+
+`-A[SYMSPEC]'
+`--annotated-source[=SYMSPEC]'
+ The `-A' option causes `gprof' to print annotated source code. If
+ SYMSPEC is specified, print output only for matching symbols.
+ *Note The Annotated Source Listing: Annotated Source.
+
+`-b'
+`--brief'
+ If the `-b' option is given, `gprof' doesn't print the verbose
+ blurbs that try to explain the meaning of all of the fields in the
+ tables. This is useful if you intend to print out the output, or
+ are tired of seeing the blurbs.
+
+`-C[SYMSPEC]'
+`--exec-counts[=SYMSPEC]'
+ The `-C' option causes `gprof' to print a tally of functions and
+ the number of times each was called. If SYMSPEC is specified,
+ print tally only for matching symbols.
+
+ If the profile data file contains basic-block count records,
+ specifying the `-l' option, along with `-C', will cause basic-block
+ execution counts to be tallied and displayed.
+
+`-i'
+`--file-info'
+ The `-i' option causes `gprof' to display summary information
+ about the profile data file(s) and then exit. The number of
+ histogram, call graph, and basic-block count records is displayed.
+
+`-I DIRS'
+`--directory-path=DIRS'
+ The `-I' option specifies a list of search directories in which to
+ find source files. Environment variable GPROF_PATH can also be
+ used to convey this information. Used mostly for annotated source
+ output.
+
+`-J[SYMSPEC]'
+`--no-annotated-source[=SYMSPEC]'
+ The `-J' option causes `gprof' not to print annotated source code.
+ If SYMSPEC is specified, `gprof' prints annotated source, but
+ excludes matching symbols.
+
+`-L'
+`--print-path'
+ Normally, source filenames are printed with the path component
+ suppressed. The `-L' option causes `gprof' to print the full
+ pathname of source filenames, which is determined from symbolic
+ debugging information in the image file and is relative to the
+ directory in which the compiler was invoked.
+
+`-p[SYMSPEC]'
+`--flat-profile[=SYMSPEC]'
+ The `-p' option causes `gprof' to print a flat profile. If
+ SYMSPEC is specified, print flat profile only for matching symbols.
+ *Note The Flat Profile: Flat Profile.
+
+`-P[SYMSPEC]'
+`--no-flat-profile[=SYMSPEC]'
+ The `-P' option causes `gprof' to suppress printing a flat profile.
+ If SYMSPEC is specified, `gprof' prints a flat profile, but
+ excludes matching symbols.
+
+`-q[SYMSPEC]'
+`--graph[=SYMSPEC]'
+ The `-q' option causes `gprof' to print the call graph analysis.
+ If SYMSPEC is specified, print call graph only for matching symbols
+ and their children. *Note The Call Graph: Call Graph.
+
+`-Q[SYMSPEC]'
+`--no-graph[=SYMSPEC]'
+ The `-Q' option causes `gprof' to suppress printing the call graph.
+ If SYMSPEC is specified, `gprof' prints a call graph, but excludes
+ matching symbols.
+
+`-t'
+`--table-length=NUM'
+ The `-t' option causes the NUM most active source lines in each
+ source file to be listed when source annotation is enabled. The
+ default is 10.
+
+`-y'
+`--separate-files'
+ This option affects annotated source output only. Normally,
+ `gprof' prints annotated source files to standard-output. If this
+ option is specified, annotated source for a file named
+ `path/FILENAME' is generated in the file `FILENAME-ann'. If the
+ underlying file system would truncate `FILENAME-ann' so that it
+ overwrites the original `FILENAME', `gprof' generates annotated
+ source in the file `FILENAME.ann' instead (if the original file
+ name has an extension, that extension is _replaced_ with `.ann').
+
+`-Z[SYMSPEC]'
+`--no-exec-counts[=SYMSPEC]'
+ The `-Z' option causes `gprof' not to print a tally of functions
+ and the number of times each was called. If SYMSPEC is specified,
+ print tally, but exclude matching symbols.
+
+`-r'
+`--function-ordering'
+ The `--function-ordering' option causes `gprof' to print a
+ suggested function ordering for the program based on profiling
+ data. This option suggests an ordering which may improve paging,
+ tlb and cache behavior for the program on systems which support
+ arbitrary ordering of functions in an executable.
+
+ The exact details of how to force the linker to place functions in
+ a particular order is system dependent and out of the scope of this
+ manual.
+
+`-R MAP_FILE'
+`--file-ordering MAP_FILE'
+ The `--file-ordering' option causes `gprof' to print a suggested
+ .o link line ordering for the program based on profiling data.
+ This option suggests an ordering which may improve paging, tlb and
+ cache behavior for the program on systems which do not support
+ arbitrary ordering of functions in an executable.
+
+ Use of the `-a' argument is highly recommended with this option.
+
+ The MAP_FILE argument is a pathname to a file which provides
+ function name to object file mappings. The format of the file is
+ similar to the output of the program `nm'.
+
+ c-parse.o:00000000 T yyparse
+ c-parse.o:00000004 C yyerrflag
+ c-lang.o:00000000 T maybe_objc_method_name
+ c-lang.o:00000000 T print_lang_statistics
+ c-lang.o:00000000 T recognize_objc_keyword
+ c-decl.o:00000000 T print_lang_identifier
+ c-decl.o:00000000 T print_lang_type
+ ...
+
+ To create a MAP_FILE with GNU `nm', type a command like `nm
+ --extern-only --defined-only -v --print-file-name program-name'.
+
+`-T'
+`--traditional'
+ The `-T' option causes `gprof' to print its output in
+ "traditional" BSD style.
+
+`-w WIDTH'
+`--width=WIDTH'
+ Sets width of output lines to WIDTH. Currently only used when
+ printing the function index at the bottom of the call graph.
+
+`-x'
+`--all-lines'
+ This option affects annotated source output only. By default,
+ only the lines at the beginning of a basic-block are annotated.
+ If this option is specified, every line in a basic-block is
+ annotated by repeating the annotation for the first line. This
+ behavior is similar to `tcov''s `-a'.
+
+`--demangle[=STYLE]'
+`--no-demangle'
+ These options control whether C++ symbol names should be demangled
+ when printing output. The default is to demangle symbols. The
+ `--no-demangle' option may be used to turn off demangling.
+ Different compilers have different mangling styles. The optional
+ demangling style argument can be used to choose an appropriate
+ demangling style for your compiler.
+
+
+File: gprof.info, Node: Analysis Options, Next: Miscellaneous Options, Prev: Output Options, Up: Invoking
+
+4.2 Analysis Options
+====================
+
+`-a'
+`--no-static'
+ The `-a' option causes `gprof' to suppress the printing of
+ statically declared (private) functions. (These are functions
+ whose names are not listed as global, and which are not visible
+ outside the file/function/block where they were defined.) Time
+ spent in these functions, calls to/from them, etc., will all be
+ attributed to the function that was loaded directly before it in
+ the executable file. This option affects both the flat profile
+ and the call graph.
+
+`-c'
+`--static-call-graph'
+ The `-c' option causes the call graph of the program to be
+ augmented by a heuristic which examines the text space of the
+ object file and identifies function calls in the binary machine
+ code. Since normal call graph records are only generated when
+ functions are entered, this option identifies children that could
+ have been called, but never were. Calls to functions that were
+ not compiled with profiling enabled are also identified, but only
+ if symbol table entries are present for them. Calls to dynamic
+ library routines are typically _not_ found by this option.
+ Parents or children identified via this heuristic are indicated in
+ the call graph with call counts of `0'.
+
+`-D'
+`--ignore-non-functions'
+ The `-D' option causes `gprof' to ignore symbols which are not
+ known to be functions. This option will give more accurate
+ profile data on systems where it is supported (Solaris and HPUX for
+ example).
+
+`-k FROM/TO'
+ The `-k' option allows you to delete from the call graph any arcs
+ from symbols matching symspec FROM to those matching symspec TO.
+
+`-l'
+`--line'
+ The `-l' option enables line-by-line profiling, which causes
+ histogram hits to be charged to individual source code lines,
+ instead of functions. This feature only works with programs
+ compiled by older versions of the `gcc' compiler. Newer versions
+ of `gcc' are designed to work with the `gcov' tool instead.
+
+ If the program was compiled with basic-block counting enabled,
+ this option will also identify how many times each line of code
+ was executed. While line-by-line profiling can help isolate where
+ in a large function a program is spending its time, it also
+ significantly increases the running time of `gprof', and magnifies
+ statistical inaccuracies. *Note Statistical Sampling Error:
+ Sampling Error.
+
+`-m NUM'
+`--min-count=NUM'
+ This option affects execution count output only. Symbols that are
+ executed less than NUM times are suppressed.
+
+`-nSYMSPEC'
+`--time=SYMSPEC'
+ The `-n' option causes `gprof', in its call graph analysis, to
+ only propagate times for symbols matching SYMSPEC.
+
+`-NSYMSPEC'
+`--no-time=SYMSPEC'
+ The `-n' option causes `gprof', in its call graph analysis, not to
+ propagate times for symbols matching SYMSPEC.
+
+`-SFILENAME'
+`--external-symbol-table=FILENAME'
+ The `-S' option causes `gprof' to read an external symbol table
+ file, such as `/proc/kallsyms', rather than read the symbol table
+ from the given object file (the default is `a.out'). This is useful
+ for profiling kernel modules.
+
+`-z'
+`--display-unused-functions'
+ If you give the `-z' option, `gprof' will mention all functions in
+ the flat profile, even those that were never called, and that had
+ no time spent in them. This is useful in conjunction with the
+ `-c' option for discovering which routines were never called.
+
+
+
+File: gprof.info, Node: Miscellaneous Options, Next: Deprecated Options, Prev: Analysis Options, Up: Invoking
+
+4.3 Miscellaneous Options
+=========================
+
+`-d[NUM]'
+`--debug[=NUM]'
+ The `-d NUM' option specifies debugging options. If NUM is not
+ specified, enable all debugging. *Note Debugging `gprof':
+ Debugging.
+
+`-h'
+`--help'
+ The `-h' option prints command line usage.
+
+`-ONAME'
+`--file-format=NAME'
+ Selects the format of the profile data files. Recognized formats
+ are `auto' (the default), `bsd', `4.4bsd', `magic', and `prof'
+ (not yet supported).
+
+`-s'
+`--sum'
+ The `-s' option causes `gprof' to summarize the information in the
+ profile data files it read in, and write out a profile data file
+ called `gmon.sum', which contains all the information from the
+ profile data files that `gprof' read in. The file `gmon.sum' may
+ be one of the specified input files; the effect of this is to
+ merge the data in the other input files into `gmon.sum'.
+
+ Eventually you can run `gprof' again without `-s' to analyze the
+ cumulative data in the file `gmon.sum'.
+
+`-v'
+`--version'
+ The `-v' flag causes `gprof' to print the current version number,
+ and then exit.
+
+
+
+File: gprof.info, Node: Deprecated Options, Next: Symspecs, Prev: Miscellaneous Options, Up: Invoking
+
+4.4 Deprecated Options
+======================
+
+ These options have been replaced with newer versions that use
+ symspecs.
+
+`-e FUNCTION_NAME'
+ The `-e FUNCTION' option tells `gprof' to not print information
+ about the function FUNCTION_NAME (and its children...) in the call
+ graph. The function will still be listed as a child of any
+ functions that call it, but its index number will be shown as
+ `[not printed]'. More than one `-e' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-e' option.
+
+`-E FUNCTION_NAME'
+ The `-E FUNCTION' option works like the `-e' option, but time
+ spent in the function (and children who were not called from
+ anywhere else), will not be used to compute the
+ percentages-of-time for the call graph. More than one `-E' option
+ may be given; only one FUNCTION_NAME may be indicated with each
+ `-E' option.
+
+`-f FUNCTION_NAME'
+ The `-f FUNCTION' option causes `gprof' to limit the call graph to
+ the function FUNCTION_NAME and its children (and their
+ children...). More than one `-f' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-f' option.
+
+`-F FUNCTION_NAME'
+ The `-F FUNCTION' option works like the `-f' option, but only time
+ spent in the function and its children (and their children...)
+ will be used to determine total-time and percentages-of-time for
+ the call graph. More than one `-F' option may be given; only one
+ FUNCTION_NAME may be indicated with each `-F' option. The `-F'
+ option overrides the `-E' option.
+
+
+ Note that only one function can be specified with each `-e', `-E',
+`-f' or `-F' option. To specify more than one function, use multiple
+options. For example, this command:
+
+ gprof -e boring -f foo -f bar myprogram > gprof.output
+
+lists in the call graph all functions that were reached from either
+`foo' or `bar' and were not reachable from `boring'.
+
+
+File: gprof.info, Node: Symspecs, Prev: Deprecated Options, Up: Invoking
+
+4.5 Symspecs
+============
+
+Many of the output options allow functions to be included or excluded
+using "symspecs" (symbol specifications), which observe the following
+syntax:
+
+ filename_containing_a_dot
+ | funcname_not_containing_a_dot
+ | linenumber
+ | ( [ any_filename ] `:' ( any_funcname | linenumber ) )
+
+ Here are some sample symspecs:
+
+`main.c'
+ Selects everything in file `main.c'--the dot in the string tells
+ `gprof' to interpret the string as a filename, rather than as a
+ function name. To select a file whose name does not contain a
+ dot, a trailing colon should be specified. For example, `odd:' is
+ interpreted as the file named `odd'.
+
+`main'
+ Selects all functions named `main'.
+
+ Note that there may be multiple instances of the same function name
+ because some of the definitions may be local (i.e., static).
+ Unless a function name is unique in a program, you must use the
+ colon notation explained below to specify a function from a
+ specific source file.
+
+ Sometimes, function names contain dots. In such cases, it is
+ necessary to add a leading colon to the name. For example,
+ `:.mul' selects function `.mul'.
+
+ In some object file formats, symbols have a leading underscore.
+ `gprof' will normally not print these underscores. When you name a
+ symbol in a symspec, you should type it exactly as `gprof' prints
+ it in its output. For example, if the compiler produces a symbol
+ `_main' from your `main' function, `gprof' still prints it as
+ `main' in its output, so you should use `main' in symspecs.
+
+`main.c:main'
+ Selects function `main' in file `main.c'.
+
+`main.c:134'
+ Selects line 134 in file `main.c'.
+
+
+File: gprof.info, Node: Output, Next: Inaccuracy, Prev: Invoking, Up: Top
+
+5 Interpreting `gprof''s Output
+*******************************
+
+`gprof' can produce several different output styles, the most important
+of which are described below. The simplest output styles (file
+information, execution count, and function and file ordering) are not
+described here, but are documented with the respective options that
+trigger them. *Note Output Options: Output Options.
+
+* Menu:
+
+* Flat Profile:: The flat profile shows how much time was spent
+ executing directly in each function.
+* Call Graph:: The call graph shows which functions called which
+ others, and how much time each function used
+ when its subroutine calls are included.
+* Line-by-line:: `gprof' can analyze individual source code lines
+* Annotated Source:: The annotated source listing displays source code
+ labeled with execution counts
+
+
+File: gprof.info, Node: Flat Profile, Next: Call Graph, Up: Output
+
+5.1 The Flat Profile
+====================
+
+The "flat profile" shows the total amount of time your program spent
+executing each function. Unless the `-z' option is given, functions
+with no apparent time spent in them, and no apparent calls to them, are
+not mentioned. Note that if a function was not compiled for profiling,
+and didn't run long enough to show up on the program counter histogram,
+it will be indistinguishable from a function that was never called.
+
+ This is part of a flat profile for a small program:
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls ms/call ms/call name
+ 33.34 0.02 0.02 7208 0.00 0.00 open
+ 16.67 0.03 0.01 244 0.04 0.12 offtime
+ 16.67 0.04 0.01 8 1.25 1.25 memccpy
+ 16.67 0.05 0.01 7 1.43 1.43 write
+ 16.67 0.06 0.01 mcount
+ 0.00 0.06 0.00 236 0.00 0.00 tzset
+ 0.00 0.06 0.00 192 0.00 0.00 tolower
+ 0.00 0.06 0.00 47 0.00 0.00 strlen
+ 0.00 0.06 0.00 45 0.00 0.00 strchr
+ 0.00 0.06 0.00 1 0.00 50.00 main
+ 0.00 0.06 0.00 1 0.00 0.00 memcpy
+ 0.00 0.06 0.00 1 0.00 10.11 print
+ 0.00 0.06 0.00 1 0.00 0.00 profil
+ 0.00 0.06 0.00 1 0.00 50.00 report
+ ...
+
+The functions are sorted first by decreasing run-time spent in them,
+then by decreasing number of calls, then alphabetically by name. The
+functions `mcount' and `profil' are part of the profiling apparatus and
+appear in every flat profile; their time gives a measure of the amount
+of overhead due to profiling.
+
+ Just before the column headers, a statement appears indicating how
+much time each sample counted as. This "sampling period" estimates the
+margin of error in each of the time figures. A time figure that is not
+much larger than this is not reliable. In this example, each sample
+counted as 0.01 seconds, suggesting a 100 Hz sampling rate. The
+program's total execution time was 0.06 seconds, as indicated by the
+`cumulative seconds' field. Since each sample counted for 0.01
+seconds, this means only six samples were taken during the run. Two of
+the samples occurred while the program was in the `open' function, as
+indicated by the `self seconds' field. Each of the other four samples
+occurred one each in `offtime', `memccpy', `write', and `mcount'.
+Since only six samples were taken, none of these values can be regarded
+as particularly reliable. In another run, the `self seconds' field for
+`mcount' might well be `0.00' or `0.02'. *Note Statistical Sampling
+Error: Sampling Error, for a complete discussion.
+
+ The remaining functions in the listing (those whose `self seconds'
+field is `0.00') didn't appear in the histogram samples at all.
+However, the call graph indicated that they were called, so therefore
+they are listed, sorted in decreasing order by the `calls' field.
+Clearly some time was spent executing these functions, but the paucity
+of histogram samples prevents any determination of how much time each
+took.
+
+ Here is what the fields in each line mean:
+
+`% time'
+ This is the percentage of the total execution time your program
+ spent in this function. These should all add up to 100%.
+
+`cumulative seconds'
+ This is the cumulative total number of seconds the computer spent
+ executing this functions, plus the time spent in all the functions
+ above this one in this table.
+
+`self seconds'
+ This is the number of seconds accounted for by this function alone.
+ The flat profile listing is sorted first by this number.
+
+`calls'
+ This is the total number of times the function was called. If the
+ function was never called, or the number of times it was called
+ cannot be determined (probably because the function was not
+ compiled with profiling enabled), the "calls" field is blank.
+
+`self ms/call'
+ This represents the average number of milliseconds spent in this
+ function per call, if this function is profiled. Otherwise, this
+ field is blank for this function.
+
+`total ms/call'
+ This represents the average number of milliseconds spent in this
+ function and its descendants per call, if this function is
+ profiled. Otherwise, this field is blank for this function. This
+ is the only field in the flat profile that uses call graph
+ analysis.
+
+`name'
+ This is the name of the function. The flat profile is sorted by
+ this field alphabetically after the "self seconds" and "calls"
+ fields are sorted.
+
+
+File: gprof.info, Node: Call Graph, Next: Line-by-line, Prev: Flat Profile, Up: Output
+
+5.2 The Call Graph
+==================
+
+The "call graph" shows how much time was spent in each function and its
+children. From this information, you can find functions that, while
+they themselves may not have used much time, called other functions
+that did use unusual amounts of time.
+
+ Here is a sample call from a small program. This call came from the
+same `gprof' run as the flat profile example in the previous section.
+
+ granularity: each sample hit covers 2 byte(s) for 20.00% of 0.05 seconds
+
+ index % time self children called name
+ <spontaneous>
+ [1] 100.0 0.00 0.05 start [1]
+ 0.00 0.05 1/1 main [2]
+ 0.00 0.00 1/2 on_exit [28]
+ 0.00 0.00 1/1 exit [59]
+ -----------------------------------------------
+ 0.00 0.05 1/1 start [1]
+ [2] 100.0 0.00 0.05 1 main [2]
+ 0.00 0.05 1/1 report [3]
+ -----------------------------------------------
+ 0.00 0.05 1/1 main [2]
+ [3] 100.0 0.00 0.05 1 report [3]
+ 0.00 0.03 8/8 timelocal [6]
+ 0.00 0.01 1/1 print [9]
+ 0.00 0.01 9/9 fgets [12]
+ 0.00 0.00 12/34 strncmp <cycle 1> [40]
+ 0.00 0.00 8/8 lookup [20]
+ 0.00 0.00 1/1 fopen [21]
+ 0.00 0.00 8/8 chewtime [24]
+ 0.00 0.00 8/16 skipspace [44]
+ -----------------------------------------------
+ [4] 59.8 0.01 0.02 8+472 <cycle 2 as a whole> [4]
+ 0.01 0.02 244+260 offtime <cycle 2> [7]
+ 0.00 0.00 236+1 tzset <cycle 2> [26]
+ -----------------------------------------------
+
+ The lines full of dashes divide this table into "entries", one for
+each function. Each entry has one or more lines.
+
+ In each entry, the primary line is the one that starts with an index
+number in square brackets. The end of this line says which function
+the entry is for. The preceding lines in the entry describe the
+callers of this function and the following lines describe its
+subroutines (also called "children" when we speak of the call graph).
+
+ The entries are sorted by time spent in the function and its
+subroutines.
+
+ The internal profiling function `mcount' (*note The Flat Profile:
+Flat Profile.) is never mentioned in the call graph.
+
+* Menu:
+
+* Primary:: Details of the primary line's contents.
+* Callers:: Details of caller-lines' contents.
+* Subroutines:: Details of subroutine-lines' contents.
+* Cycles:: When there are cycles of recursion,
+ such as `a' calls `b' calls `a'...
+
+
+File: gprof.info, Node: Primary, Next: Callers, Up: Call Graph
+
+5.2.1 The Primary Line
+----------------------
+
+The "primary line" in a call graph entry is the line that describes the
+function which the entry is about and gives the overall statistics for
+this function.
+
+ For reference, we repeat the primary line from the entry for function
+`report' in our main example, together with the heading line that shows
+the names of the fields:
+
+ index % time self children called name
+ ...
+ [3] 100.0 0.00 0.05 1 report [3]
+
+ Here is what the fields in the primary line mean:
+
+`index'
+ Entries are numbered with consecutive integers. Each function
+ therefore has an index number, which appears at the beginning of
+ its primary line.
+
+ Each cross-reference to a function, as a caller or subroutine of
+ another, gives its index number as well as its name. The index
+ number guides you if you wish to look for the entry for that
+ function.
+
+`% time'
+ This is the percentage of the total time that was spent in this
+ function, including time spent in subroutines called from this
+ function.
+
+ The time spent in this function is counted again for the callers of
+ this function. Therefore, adding up these percentages is
+ meaningless.
+
+`self'
+ This is the total amount of time spent in this function. This
+ should be identical to the number printed in the `seconds' field
+ for this function in the flat profile.
+
+`children'
+ This is the total amount of time spent in the subroutine calls
+ made by this function. This should be equal to the sum of all the
+ `self' and `children' entries of the children listed directly
+ below this function.
+
+`called'
+ This is the number of times the function was called.
+
+ If the function called itself recursively, there are two numbers,
+ separated by a `+'. The first number counts non-recursive calls,
+ and the second counts recursive calls.
+
+ In the example above, the function `report' was called once from
+ `main'.
+
+`name'
+ This is the name of the current function. The index number is
+ repeated after it.
+
+ If the function is part of a cycle of recursion, the cycle number
+ is printed between the function's name and the index number (*note
+ How Mutually Recursive Functions Are Described: Cycles.). For
+ example, if function `gnurr' is part of cycle number one, and has
+ index number twelve, its primary line would be end like this:
+
+ gnurr <cycle 1> [12]
+
+
+File: gprof.info, Node: Callers, Next: Subroutines, Prev: Primary, Up: Call Graph
+
+5.2.2 Lines for a Function's Callers
+------------------------------------
+
+A function's entry has a line for each function it was called by.
+These lines' fields correspond to the fields of the primary line, but
+their meanings are different because of the difference in context.
+
+ For reference, we repeat two lines from the entry for the function
+`report', the primary line and one caller-line preceding it, together
+with the heading line that shows the names of the fields:
+
+ index % time self children called name
+ ...
+ 0.00 0.05 1/1 main [2]
+ [3] 100.0 0.00 0.05 1 report [3]
+
+ Here are the meanings of the fields in the caller-line for `report'
+called from `main':
+
+`self'
+ An estimate of the amount of time spent in `report' itself when it
+ was called from `main'.
+
+`children'
+ An estimate of the amount of time spent in subroutines of `report'
+ when `report' was called from `main'.
+
+ The sum of the `self' and `children' fields is an estimate of the
+ amount of time spent within calls to `report' from `main'.
+
+`called'
+ Two numbers: the number of times `report' was called from `main',
+ followed by the total number of non-recursive calls to `report'
+ from all its callers.
+
+`name and index number'
+ The name of the caller of `report' to which this line applies,
+ followed by the caller's index number.
+
+ Not all functions have entries in the call graph; some options to
+ `gprof' request the omission of certain functions. When a caller
+ has no entry of its own, it still has caller-lines in the entries
+ of the functions it calls.
+
+ If the caller is part of a recursion cycle, the cycle number is
+ printed between the name and the index number.
+
+ If the identity of the callers of a function cannot be determined, a
+dummy caller-line is printed which has `<spontaneous>' as the "caller's
+name" and all other fields blank. This can happen for signal handlers.
+
+
+File: gprof.info, Node: Subroutines, Next: Cycles, Prev: Callers, Up: Call Graph
+
+5.2.3 Lines for a Function's Subroutines
+----------------------------------------
+
+A function's entry has a line for each of its subroutines--in other
+words, a line for each other function that it called. These lines'
+fields correspond to the fields of the primary line, but their meanings
+are different because of the difference in context.
+
+ For reference, we repeat two lines from the entry for the function
+`main', the primary line and a line for a subroutine, together with the
+heading line that shows the names of the fields:
+
+ index % time self children called name
+ ...
+ [2] 100.0 0.00 0.05 1 main [2]
+ 0.00 0.05 1/1 report [3]
+
+ Here are the meanings of the fields in the subroutine-line for `main'
+calling `report':
+
+`self'
+ An estimate of the amount of time spent directly within `report'
+ when `report' was called from `main'.
+
+`children'
+ An estimate of the amount of time spent in subroutines of `report'
+ when `report' was called from `main'.
+
+ The sum of the `self' and `children' fields is an estimate of the
+ total time spent in calls to `report' from `main'.
+
+`called'
+ Two numbers, the number of calls to `report' from `main' followed
+ by the total number of non-recursive calls to `report'. This
+ ratio is used to determine how much of `report''s `self' and
+ `children' time gets credited to `main'. *Note Estimating
+ `children' Times: Assumptions.
+
+`name'
+ The name of the subroutine of `main' to which this line applies,
+ followed by the subroutine's index number.
+
+ If the caller is part of a recursion cycle, the cycle number is
+ printed between the name and the index number.
+
+
+File: gprof.info, Node: Cycles, Prev: Subroutines, Up: Call Graph
+
+5.2.4 How Mutually Recursive Functions Are Described
+----------------------------------------------------
+
+The graph may be complicated by the presence of "cycles of recursion"
+in the call graph. A cycle exists if a function calls another function
+that (directly or indirectly) calls (or appears to call) the original
+function. For example: if `a' calls `b', and `b' calls `a', then `a'
+and `b' form a cycle.
+
+ Whenever there are call paths both ways between a pair of functions,
+they belong to the same cycle. If `a' and `b' call each other and `b'
+and `c' call each other, all three make one cycle. Note that even if
+`b' only calls `a' if it was not called from `a', `gprof' cannot
+determine this, so `a' and `b' are still considered a cycle.
+
+ The cycles are numbered with consecutive integers. When a function
+belongs to a cycle, each time the function name appears in the call
+graph it is followed by `<cycle NUMBER>'.
+
+ The reason cycles matter is that they make the time values in the
+call graph paradoxical. The "time spent in children" of `a' should
+include the time spent in its subroutine `b' and in `b''s
+subroutines--but one of `b''s subroutines is `a'! How much of `a''s
+time should be included in the children of `a', when `a' is indirectly
+recursive?
+
+ The way `gprof' resolves this paradox is by creating a single entry
+for the cycle as a whole. The primary line of this entry describes the
+total time spent directly in the functions of the cycle. The
+"subroutines" of the cycle are the individual functions of the cycle,
+and all other functions that were called directly by them. The
+"callers" of the cycle are the functions, outside the cycle, that
+called functions in the cycle.
+
+ Here is an example portion of a call graph which shows a cycle
+containing functions `a' and `b'. The cycle was entered by a call to
+`a' from `main'; both `a' and `b' called `c'.
+
+ index % time self children called name
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
+ 1.02 0 3 b <cycle 1> [4]
+ 0.75 0 2 a <cycle 1> [5]
+ ----------------------------------------
+ 3 a <cycle 1> [5]
+ [4] 52.85 1.02 0 0 b <cycle 1> [4]
+ 2 a <cycle 1> [5]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ 2 b <cycle 1> [4]
+ [5] 38.86 0.75 0 1 a <cycle 1> [5]
+ 3 b <cycle 1> [4]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+
+(The entire call graph for this program contains in addition an entry
+for `main', which calls `a', and an entry for `c', with callers `a' and
+`b'.)
+
+ index % time self children called name
+ <spontaneous>
+ [1] 100.00 0 1.93 0 start [1]
+ 0.16 1.77 1/1 main [2]
+ ----------------------------------------
+ 0.16 1.77 1/1 start [1]
+ [2] 100.00 0.16 1.77 1 main [2]
+ 1.77 0 1/1 a <cycle 1> [5]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
+ 1.02 0 3 b <cycle 1> [4]
+ 0.75 0 2 a <cycle 1> [5]
+ 0 0 6/6 c [6]
+ ----------------------------------------
+ 3 a <cycle 1> [5]
+ [4] 52.85 1.02 0 0 b <cycle 1> [4]
+ 2 a <cycle 1> [5]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 1.77 0 1/1 main [2]
+ 2 b <cycle 1> [4]
+ [5] 38.86 0.75 0 1 a <cycle 1> [5]
+ 3 b <cycle 1> [4]
+ 0 0 3/6 c [6]
+ ----------------------------------------
+ 0 0 3/6 b <cycle 1> [4]
+ 0 0 3/6 a <cycle 1> [5]
+ [6] 0.00 0 0 6 c [6]
+ ----------------------------------------
+
+ The `self' field of the cycle's primary line is the total time spent
+in all the functions of the cycle. It equals the sum of the `self'
+fields for the individual functions in the cycle, found in the entry in
+the subroutine lines for these functions.
+
+ The `children' fields of the cycle's primary line and subroutine
+lines count only subroutines outside the cycle. Even though `a' calls
+`b', the time spent in those calls to `b' is not counted in `a''s
+`children' time. Thus, we do not encounter the problem of what to do
+when the time in those calls to `b' includes indirect recursive calls
+back to `a'.
+
+ The `children' field of a caller-line in the cycle's entry estimates
+the amount of time spent _in the whole cycle_, and its other
+subroutines, on the times when that caller called a function in the
+cycle.
+
+ The `called' field in the primary line for the cycle has two numbers:
+first, the number of times functions in the cycle were called by
+functions outside the cycle; second, the number of times they were
+called by functions in the cycle (including times when a function in
+the cycle calls itself). This is a generalization of the usual split
+into non-recursive and recursive calls.
+
+ The `called' field of a subroutine-line for a cycle member in the
+cycle's entry says how many time that function was called from
+functions in the cycle. The total of all these is the second number in
+the primary line's `called' field.
+
+ In the individual entry for a function in a cycle, the other
+functions in the same cycle can appear as subroutines and as callers.
+These lines show how many times each function in the cycle called or
+was called from each other function in the cycle. The `self' and
+`children' fields in these lines are blank because of the difficulty of
+defining meanings for them when recursion is going on.
+
+
+File: gprof.info, Node: Line-by-line, Next: Annotated Source, Prev: Call Graph, Up: Output
+
+5.3 Line-by-line Profiling
+==========================
+
+`gprof''s `-l' option causes the program to perform "line-by-line"
+profiling. In this mode, histogram samples are assigned not to
+functions, but to individual lines of source code. This only works
+with programs compiled with older versions of the `gcc' compiler.
+Newer versions of `gcc' use a different program - `gcov' - to display
+line-by-line profiling information.
+
+ With the older versions of `gcc' the program usually has to be
+compiled with a `-g' option, in addition to `-pg', in order to generate
+debugging symbols for tracking source code lines. Note, in much older
+versions of `gcc' the program had to be compiled with the `-a' command
+line option as well.
+
+ The flat profile is the most useful output table in line-by-line
+mode. The call graph isn't as useful as normal, since the current
+version of `gprof' does not propagate call graph arcs from source code
+lines to the enclosing function. The call graph does, however, show
+each line of code that called each function, along with a count.
+
+ Here is a section of `gprof''s output, without line-by-line
+profiling. Note that `ct_init' accounted for four histogram hits, and
+13327 calls to `init_block'.
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self self total
+ time seconds seconds calls us/call us/call name
+ 30.77 0.13 0.04 6335 6.31 6.31 ct_init
+
+
+ Call graph (explanation follows)
+
+
+ granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+ index % time self children called name
+
+ 0.00 0.00 1/13496 name_too_long
+ 0.00 0.00 40/13496 deflate
+ 0.00 0.00 128/13496 deflate_fast
+ 0.00 0.00 13327/13496 ct_init
+ [7] 0.0 0.00 0.00 13496 init_block
+
+ Now let's look at some of `gprof''s output from the same program run,
+this time with line-by-line profiling enabled. Note that `ct_init''s
+four histogram hits are broken down into four lines of source code--one
+hit occurred on each of lines 349, 351, 382 and 385. In the call graph,
+note how `ct_init''s 13327 calls to `init_block' are broken down into
+one call from line 396, 3071 calls from line 384, 3730 calls from line
+385, and 6525 calls from 387.
+
+ Flat profile:
+
+ Each sample counts as 0.01 seconds.
+ % cumulative self
+ time seconds seconds calls name
+ 7.69 0.10 0.01 ct_init (trees.c:349)
+ 7.69 0.11 0.01 ct_init (trees.c:351)
+ 7.69 0.12 0.01 ct_init (trees.c:382)
+ 7.69 0.13 0.01 ct_init (trees.c:385)
+
+
+ Call graph (explanation follows)
+
+
+ granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+ % time self children called name
+
+ 0.00 0.00 1/13496 name_too_long (gzip.c:1440)
+ 0.00 0.00 1/13496 deflate (deflate.c:763)
+ 0.00 0.00 1/13496 ct_init (trees.c:396)
+ 0.00 0.00 2/13496 deflate (deflate.c:727)
+ 0.00 0.00 4/13496 deflate (deflate.c:686)
+ 0.00 0.00 5/13496 deflate (deflate.c:675)
+ 0.00 0.00 12/13496 deflate (deflate.c:679)
+ 0.00 0.00 16/13496 deflate (deflate.c:730)
+ 0.00 0.00 128/13496 deflate_fast (deflate.c:654)
+ 0.00 0.00 3071/13496 ct_init (trees.c:384)
+ 0.00 0.00 3730/13496 ct_init (trees.c:385)
+ 0.00 0.00 6525/13496 ct_init (trees.c:387)
+ [6] 0.0 0.00 0.00 13496 init_block (trees.c:408)
+
+
+File: gprof.info, Node: Annotated Source, Prev: Line-by-line, Up: Output
+
+5.4 The Annotated Source Listing
+================================
+
+`gprof''s `-A' option triggers an annotated source listing, which lists
+the program's source code, each function labeled with the number of
+times it was called. You may also need to specify the `-I' option, if
+`gprof' can't find the source code files.
+
+ With older versions of `gcc' compiling with `gcc ... -g -pg -a'
+augments your program with basic-block counting code, in addition to
+function counting code. This enables `gprof' to determine how many
+times each line of code was executed. With newer versions of `gcc'
+support for displaying basic-block counts is provided by the `gcov'
+program.
+
+ For example, consider the following function, taken from gzip, with
+line numbers added:
+
+ 1 ulg updcrc(s, n)
+ 2 uch *s;
+ 3 unsigned n;
+ 4 {
+ 5 register ulg c;
+ 6
+ 7 static ulg crc = (ulg)0xffffffffL;
+ 8
+ 9 if (s == NULL) {
+ 10 c = 0xffffffffL;
+ 11 } else {
+ 12 c = crc;
+ 13 if (n) do {
+ 14 c = crc_32_tab[...];
+ 15 } while (--n);
+ 16 }
+ 17 crc = c;
+ 18 return c ^ 0xffffffffL;
+ 19 }
+
+ `updcrc' has at least five basic-blocks. One is the function
+itself. The `if' statement on line 9 generates two more basic-blocks,
+one for each branch of the `if'. A fourth basic-block results from the
+`if' on line 13, and the contents of the `do' loop form the fifth
+basic-block. The compiler may also generate additional basic-blocks to
+handle various special cases.
+
+ A program augmented for basic-block counting can be analyzed with
+`gprof -l -A'. The `-x' option is also helpful, to ensure that each
+line of code is labeled at least once. Here is `updcrc''s annotated
+source listing for a sample `gzip' run:
+
+ ulg updcrc(s, n)
+ uch *s;
+ unsigned n;
+ 2 ->{
+ register ulg c;
+
+ static ulg crc = (ulg)0xffffffffL;
+
+ 2 -> if (s == NULL) {
+ 1 -> c = 0xffffffffL;
+ 1 -> } else {
+ 1 -> c = crc;
+ 1 -> if (n) do {
+ 26312 -> c = crc_32_tab[...];
+ 26312,1,26311 -> } while (--n);
+ }
+ 2 -> crc = c;
+ 2 -> return c ^ 0xffffffffL;
+ 2 ->}
+
+ In this example, the function was called twice, passing once through
+each branch of the `if' statement. The body of the `do' loop was
+executed a total of 26312 times. Note how the `while' statement is
+annotated. It began execution 26312 times, once for each iteration
+through the loop. One of those times (the last time) it exited, while
+it branched back to the beginning of the loop 26311 times.
+
+
+File: gprof.info, Node: Inaccuracy, Next: How do I?, Prev: Output, Up: Top
+
+6 Inaccuracy of `gprof' Output
+******************************
+
+* Menu:
+
+* Sampling Error:: Statistical margins of error
+* Assumptions:: Estimating children times
+
+
+File: gprof.info, Node: Sampling Error, Next: Assumptions, Up: Inaccuracy
+
+6.1 Statistical Sampling Error
+==============================
+
+The run-time figures that `gprof' gives you are based on a sampling
+process, so they are subject to statistical inaccuracy. If a function
+runs only a small amount of time, so that on the average the sampling
+process ought to catch that function in the act only once, there is a
+pretty good chance it will actually find that function zero times, or
+twice.
+
+ By contrast, the number-of-calls and basic-block figures are derived
+by counting, not sampling. They are completely accurate and will not
+vary from run to run if your program is deterministic.
+
+ The "sampling period" that is printed at the beginning of the flat
+profile says how often samples are taken. The rule of thumb is that a
+run-time figure is accurate if it is considerably bigger than the
+sampling period.
+
+ The actual amount of error can be predicted. For N samples, the
+_expected_ error is the square-root of N. For example, if the sampling
+period is 0.01 seconds and `foo''s run-time is 1 second, N is 100
+samples (1 second/0.01 seconds), sqrt(N) is 10 samples, so the expected
+error in `foo''s run-time is 0.1 seconds (10*0.01 seconds), or ten
+percent of the observed value. Again, if the sampling period is 0.01
+seconds and `bar''s run-time is 100 seconds, N is 10000 samples,
+sqrt(N) is 100 samples, so the expected error in `bar''s run-time is 1
+second, or one percent of the observed value. It is likely to vary
+this much _on the average_ from one profiling run to the next.
+(_Sometimes_ it will vary more.)
+
+ This does not mean that a small run-time figure is devoid of
+information. If the program's _total_ run-time is large, a small
+run-time for one function does tell you that that function used an
+insignificant fraction of the whole program's time. Usually this means
+it is not worth optimizing.
+
+ One way to get more accuracy is to give your program more (but
+similar) input data so it will take longer. Another way is to combine
+the data from several runs, using the `-s' option of `gprof'. Here is
+how:
+
+ 1. Run your program once.
+
+ 2. Issue the command `mv gmon.out gmon.sum'.
+
+ 3. Run your program again, the same as before.
+
+ 4. Merge the new data in `gmon.out' into `gmon.sum' with this command:
+
+ gprof -s EXECUTABLE-FILE gmon.out gmon.sum
+
+ 5. Repeat the last two steps as often as you wish.
+
+ 6. Analyze the cumulative data using this command:
+
+ gprof EXECUTABLE-FILE gmon.sum > OUTPUT-FILE
+
+
+File: gprof.info, Node: Assumptions, Prev: Sampling Error, Up: Inaccuracy
+
+6.2 Estimating `children' Times
+===============================
+
+Some of the figures in the call graph are estimates--for example, the
+`children' time values and all the time figures in caller and
+subroutine lines.
+
+ There is no direct information about these measurements in the
+profile data itself. Instead, `gprof' estimates them by making an
+assumption about your program that might or might not be true.
+
+ The assumption made is that the average time spent in each call to
+any function `foo' is not correlated with who called `foo'. If `foo'
+used 5 seconds in all, and 2/5 of the calls to `foo' came from `a',
+then `foo' contributes 2 seconds to `a''s `children' time, by
+assumption.
+
+ This assumption is usually true enough, but for some programs it is
+far from true. Suppose that `foo' returns very quickly when its
+argument is zero; suppose that `a' always passes zero as an argument,
+while other callers of `foo' pass other arguments. In this program,
+all the time spent in `foo' is in the calls from callers other than `a'.
+But `gprof' has no way of knowing this; it will blindly and incorrectly
+charge 2 seconds of time in `foo' to the children of `a'.
+
+ We hope some day to put more complete data into `gmon.out', so that
+this assumption is no longer needed, if we can figure out how. For the
+novice, the estimated figures are usually more useful than misleading.
+
+
+File: gprof.info, Node: How do I?, Next: Incompatibilities, Prev: Inaccuracy, Up: Top
+
+7 Answers to Common Questions
+*****************************
+
+How can I get more exact information about hot spots in my program?
+ Looking at the per-line call counts only tells part of the story.
+ Because `gprof' can only report call times and counts by function,
+ the best way to get finer-grained information on where the program
+ is spending its time is to re-factor large functions into sequences
+ of calls to smaller ones. Beware however that this can introduce
+ artificial hot spots since compiling with `-pg' adds a significant
+ overhead to function calls. An alternative solution is to use a
+ non-intrusive profiler, e.g. oprofile.
+
+How do I find which lines in my program were executed the most times?
+ Use the `gcov' program.
+
+How do I find which lines in my program called a particular function?
+ Use `gprof -l' and lookup the function in the call graph. The
+ callers will be broken down by function and line number.
+
+How do I analyze a program that runs for less than a second?
+ Try using a shell script like this one:
+
+ for i in `seq 1 100`; do
+ fastprog
+ mv gmon.out gmon.out.$i
+ done
+
+ gprof -s fastprog gmon.out.*
+
+ gprof fastprog gmon.sum
+
+ If your program is completely deterministic, all the call counts
+ will be simple multiples of 100 (i.e., a function called once in
+ each run will appear with a call count of 100).
+
+
+
+File: gprof.info, Node: Incompatibilities, Next: Details, Prev: How do I?, Up: Top
+
+8 Incompatibilities with Unix `gprof'
+*************************************
+
+GNU `gprof' and Berkeley Unix `gprof' use the same data file
+`gmon.out', and provide essentially the same information. But there
+are a few differences.
+
+ * GNU `gprof' uses a new, generalized file format with support for
+ basic-block execution counts and non-realtime histograms. A magic
+ cookie and version number allows `gprof' to easily identify new
+ style files. Old BSD-style files can still be read. *Note
+ Profiling Data File Format: File Format.
+
+ * For a recursive function, Unix `gprof' lists the function as a
+ parent and as a child, with a `calls' field that lists the number
+ of recursive calls. GNU `gprof' omits these lines and puts the
+ number of recursive calls in the primary line.
+
+ * When a function is suppressed from the call graph with `-e', GNU
+ `gprof' still lists it as a subroutine of functions that call it.
+
+ * GNU `gprof' accepts the `-k' with its argument in the form
+ `from/to', instead of `from to'.
+
+ * In the annotated source listing, if there are multiple basic
+ blocks on the same line, GNU `gprof' prints all of their counts,
+ separated by commas.
+
+ * The blurbs, field widths, and output formats are different. GNU
+ `gprof' prints blurbs after the tables, so that you can see the
+ tables without skipping the blurbs.
+
+
+File: gprof.info, Node: Details, Next: GNU Free Documentation License, Prev: Incompatibilities, Up: Top
+
+9 Details of Profiling
+**********************
+
+* Menu:
+
+* Implementation:: How a program collects profiling information
+* File Format:: Format of `gmon.out' files
+* Internals:: `gprof''s internal operation
+* Debugging:: Using `gprof''s `-d' option
+
+
+File: gprof.info, Node: Implementation, Next: File Format, Up: Details
+
+9.1 Implementation of Profiling
+===============================
+
+Profiling works by changing how every function in your program is
+compiled so that when it is called, it will stash away some information
+about where it was called from. From this, the profiler can figure out
+what function called it, and can count how many times it was called.
+This change is made by the compiler when your program is compiled with
+the `-pg' option, which causes every function to call `mcount' (or
+`_mcount', or `__mcount', depending on the OS and compiler) as one of
+its first operations.
+
+ The `mcount' routine, included in the profiling library, is
+responsible for recording in an in-memory call graph table both its
+parent routine (the child) and its parent's parent. This is typically
+done by examining the stack frame to find both the address of the
+child, and the return address in the original parent. Since this is a
+very machine-dependent operation, `mcount' itself is typically a short
+assembly-language stub routine that extracts the required information,
+and then calls `__mcount_internal' (a normal C function) with two
+arguments--`frompc' and `selfpc'. `__mcount_internal' is responsible
+for maintaining the in-memory call graph, which records `frompc',
+`selfpc', and the number of times each of these call arcs was traversed.
+
+ GCC Version 2 provides a magical function
+(`__builtin_return_address'), which allows a generic `mcount' function
+to extract the required information from the stack frame. However, on
+some architectures, most notably the SPARC, using this builtin can be
+very computationally expensive, and an assembly language version of
+`mcount' is used for performance reasons.
+
+ Number-of-calls information for library routines is collected by
+using a special version of the C library. The programs in it are the
+same as in the usual C library, but they were compiled with `-pg'. If
+you link your program with `gcc ... -pg', it automatically uses the
+profiling version of the library.
+
+ Profiling also involves watching your program as it runs, and
+keeping a histogram of where the program counter happens to be every
+now and then. Typically the program counter is looked at around 100
+times per second of run time, but the exact frequency may vary from
+system to system.
+
+ This is done is one of two ways. Most UNIX-like operating systems
+provide a `profil()' system call, which registers a memory array with
+the kernel, along with a scale factor that determines how the program's
+address space maps into the array. Typical scaling values cause every
+2 to 8 bytes of address space to map into a single array slot. On
+every tick of the system clock (assuming the profiled program is
+running), the value of the program counter is examined and the
+corresponding slot in the memory array is incremented. Since this is
+done in the kernel, which had to interrupt the process anyway to handle
+the clock interrupt, very little additional system overhead is required.
+
+ However, some operating systems, most notably Linux 2.0 (and
+earlier), do not provide a `profil()' system call. On such a system,
+arrangements are made for the kernel to periodically deliver a signal
+to the process (typically via `setitimer()'), which then performs the
+same operation of examining the program counter and incrementing a slot
+in the memory array. Since this method requires a signal to be
+delivered to user space every time a sample is taken, it uses
+considerably more overhead than kernel-based profiling. Also, due to
+the added delay required to deliver the signal, this method is less
+accurate as well.
+
+ A special startup routine allocates memory for the histogram and
+either calls `profil()' or sets up a clock signal handler. This
+routine (`monstartup') can be invoked in several ways. On Linux
+systems, a special profiling startup file `gcrt0.o', which invokes
+`monstartup' before `main', is used instead of the default `crt0.o'.
+Use of this special startup file is one of the effects of using `gcc
+... -pg' to link. On SPARC systems, no special startup files are used.
+Rather, the `mcount' routine, when it is invoked for the first time
+(typically when `main' is called), calls `monstartup'.
+
+ If the compiler's `-a' option was used, basic-block counting is also
+enabled. Each object file is then compiled with a static array of
+counts, initially zero. In the executable code, every time a new
+basic-block begins (i.e., when an `if' statement appears), an extra
+instruction is inserted to increment the corresponding count in the
+array. At compile time, a paired array was constructed that recorded
+the starting address of each basic-block. Taken together, the two
+arrays record the starting address of every basic-block, along with the
+number of times it was executed.
+
+ The profiling library also includes a function (`mcleanup') which is
+typically registered using `atexit()' to be called as the program
+exits, and is responsible for writing the file `gmon.out'. Profiling
+is turned off, various headers are output, and the histogram is
+written, followed by the call-graph arcs and the basic-block counts.
+
+ The output from `gprof' gives no indication of parts of your program
+that are limited by I/O or swapping bandwidth. This is because samples
+of the program counter are taken at fixed intervals of the program's
+run time. Therefore, the time measurements in `gprof' output say
+nothing about time that your program was not running. For example, a
+part of the program that creates so much data that it cannot all fit in
+physical memory at once may run very slowly due to thrashing, but
+`gprof' will say it uses little time. On the other hand, sampling by
+run time has the advantage that the amount of load due to other users
+won't directly affect the output you get.
+
+
+File: gprof.info, Node: File Format, Next: Internals, Prev: Implementation, Up: Details
+
+9.2 Profiling Data File Format
+==============================
+
+The old BSD-derived file format used for profile data does not contain a
+magic cookie that allows to check whether a data file really is a
+`gprof' file. Furthermore, it does not provide a version number, thus
+rendering changes to the file format almost impossible. GNU `gprof'
+uses a new file format that provides these features. For backward
+compatibility, GNU `gprof' continues to support the old BSD-derived
+format, but not all features are supported with it. For example,
+basic-block execution counts cannot be accommodated by the old file
+format.
+
+ The new file format is defined in header file `gmon_out.h'. It
+consists of a header containing the magic cookie and a version number,
+as well as some spare bytes available for future extensions. All data
+in a profile data file is in the native format of the target for which
+the profile was collected. GNU `gprof' adapts automatically to the
+byte-order in use.
+
+ In the new file format, the header is followed by a sequence of
+records. Currently, there are three different record types: histogram
+records, call-graph arc records, and basic-block execution count
+records. Each file can contain any number of each record type. When
+reading a file, GNU `gprof' will ensure records of the same type are
+compatible with each other and compute the union of all records. For
+example, for basic-block execution counts, the union is simply the sum
+of all execution counts for each basic-block.
+
+9.2.1 Histogram Records
+-----------------------
+
+Histogram records consist of a header that is followed by an array of
+bins. The header contains the text-segment range that the histogram
+spans, the size of the histogram in bytes (unlike in the old BSD
+format, this does not include the size of the header), the rate of the
+profiling clock, and the physical dimension that the bin counts
+represent after being scaled by the profiling clock rate. The physical
+dimension is specified in two parts: a long name of up to 15 characters
+and a single character abbreviation. For example, a histogram
+representing real-time would specify the long name as "seconds" and the
+abbreviation as "s". This feature is useful for architectures that
+support performance monitor hardware (which, fortunately, is becoming
+increasingly common). For example, under DEC OSF/1, the "uprofile"
+command can be used to produce a histogram of, say, instruction cache
+misses. In this case, the dimension in the histogram header could be
+set to "i-cache misses" and the abbreviation could be set to "1"
+(because it is simply a count, not a physical dimension). Also, the
+profiling rate would have to be set to 1 in this case.
+
+ Histogram bins are 16-bit numbers and each bin represent an equal
+amount of text-space. For example, if the text-segment is one thousand
+bytes long and if there are ten bins in the histogram, each bin
+represents one hundred bytes.
+
+9.2.2 Call-Graph Records
+------------------------
+
+Call-graph records have a format that is identical to the one used in
+the BSD-derived file format. It consists of an arc in the call graph
+and a count indicating the number of times the arc was traversed during
+program execution. Arcs are specified by a pair of addresses: the
+first must be within caller's function and the second must be within
+the callee's function. When performing profiling at the function
+level, these addresses can point anywhere within the respective
+function. However, when profiling at the line-level, it is better if
+the addresses are as close to the call-site/entry-point as possible.
+This will ensure that the line-level call-graph is able to identify
+exactly which line of source code performed calls to a function.
+
+9.2.3 Basic-Block Execution Count Records
+-----------------------------------------
+
+Basic-block execution count records consist of a header followed by a
+sequence of address/count pairs. The header simply specifies the
+length of the sequence. In an address/count pair, the address
+identifies a basic-block and the count specifies the number of times
+that basic-block was executed. Any address within the basic-address can
+be used.
+
+
+File: gprof.info, Node: Internals, Next: Debugging, Prev: File Format, Up: Details
+
+9.3 `gprof''s Internal Operation
+================================
+
+Like most programs, `gprof' begins by processing its options. During
+this stage, it may building its symspec list (`sym_ids.c:sym_id_add'),
+if options are specified which use symspecs. `gprof' maintains a
+single linked list of symspecs, which will eventually get turned into
+12 symbol tables, organized into six include/exclude pairs--one pair
+each for the flat profile (INCL_FLAT/EXCL_FLAT), the call graph arcs
+(INCL_ARCS/EXCL_ARCS), printing in the call graph
+(INCL_GRAPH/EXCL_GRAPH), timing propagation in the call graph
+(INCL_TIME/EXCL_TIME), the annotated source listing
+(INCL_ANNO/EXCL_ANNO), and the execution count listing
+(INCL_EXEC/EXCL_EXEC).
+
+ After option processing, `gprof' finishes building the symspec list
+by adding all the symspecs in `default_excluded_list' to the exclude
+lists EXCL_TIME and EXCL_GRAPH, and if line-by-line profiling is
+specified, EXCL_FLAT as well. These default excludes are not added to
+EXCL_ANNO, EXCL_ARCS, and EXCL_EXEC.
+
+ Next, the BFD library is called to open the object file, verify that
+it is an object file, and read its symbol table (`core.c:core_init'),
+using `bfd_canonicalize_symtab' after mallocing an appropriately sized
+array of symbols. At this point, function mappings are read (if the
+`--file-ordering' option has been specified), and the core text space
+is read into memory (if the `-c' option was given).
+
+ `gprof''s own symbol table, an array of Sym structures, is now built.
+This is done in one of two ways, by one of two routines, depending on
+whether line-by-line profiling (`-l' option) has been enabled. For
+normal profiling, the BFD canonical symbol table is scanned. For
+line-by-line profiling, every text space address is examined, and a new
+symbol table entry gets created every time the line number changes. In
+either case, two passes are made through the symbol table--one to count
+the size of the symbol table required, and the other to actually read
+the symbols. In between the two passes, a single array of type `Sym'
+is created of the appropriate length. Finally,
+`symtab.c:symtab_finalize' is called to sort the symbol table and
+remove duplicate entries (entries with the same memory address).
+
+ The symbol table must be a contiguous array for two reasons. First,
+the `qsort' library function (which sorts an array) will be used to
+sort the symbol table. Also, the symbol lookup routine
+(`symtab.c:sym_lookup'), which finds symbols based on memory address,
+uses a binary search algorithm which requires the symbol table to be a
+sorted array. Function symbols are indicated with an `is_func' flag.
+Line number symbols have no special flags set. Additionally, a symbol
+can have an `is_static' flag to indicate that it is a local symbol.
+
+ With the symbol table read, the symspecs can now be translated into
+Syms (`sym_ids.c:sym_id_parse'). Remember that a single symspec can
+match multiple symbols. An array of symbol tables (`syms') is created,
+each entry of which is a symbol table of Syms to be included or
+excluded from a particular listing. The master symbol table and the
+symspecs are examined by nested loops, and every symbol that matches a
+symspec is inserted into the appropriate syms table. This is done
+twice, once to count the size of each required symbol table, and again
+to build the tables, which have been malloced between passes. From now
+on, to determine whether a symbol is on an include or exclude symspec
+list, `gprof' simply uses its standard symbol lookup routine on the
+appropriate table in the `syms' array.
+
+ Now the profile data file(s) themselves are read
+(`gmon_io.c:gmon_out_read'), first by checking for a new-style
+`gmon.out' header, then assuming this is an old-style BSD `gmon.out' if
+the magic number test failed.
+
+ New-style histogram records are read by `hist.c:hist_read_rec'. For
+the first histogram record, allocate a memory array to hold all the
+bins, and read them in. When multiple profile data files (or files
+with multiple histogram records) are read, the memory ranges of each
+pair of histogram records must be either equal, or non-overlapping.
+For each pair of histogram records, the resolution (memory region size
+divided by the number of bins) must be the same. The time unit must be
+the same for all histogram records. If the above containts are met, all
+histograms for the same memory range are merged.
+
+ As each call graph record is read (`call_graph.c:cg_read_rec'), the
+parent and child addresses are matched to symbol table entries, and a
+call graph arc is created by `cg_arcs.c:arc_add', unless the arc fails
+a symspec check against INCL_ARCS/EXCL_ARCS. As each arc is added, a
+linked list is maintained of the parent's child arcs, and of the child's
+parent arcs. Both the child's call count and the arc's call count are
+incremented by the record's call count.
+
+ Basic-block records are read (`basic_blocks.c:bb_read_rec'), but
+only if line-by-line profiling has been selected. Each basic-block
+address is matched to a corresponding line symbol in the symbol table,
+and an entry made in the symbol's bb_addr and bb_calls arrays. Again,
+if multiple basic-block records are present for the same address, the
+call counts are cumulative.
+
+ A gmon.sum file is dumped, if requested (`gmon_io.c:gmon_out_write').
+
+ If histograms were present in the data files, assign them to symbols
+(`hist.c:hist_assign_samples') by iterating over all the sample bins
+and assigning them to symbols. Since the symbol table is sorted in
+order of ascending memory addresses, we can simple follow along in the
+symbol table as we make our pass over the sample bins. This step
+includes a symspec check against INCL_FLAT/EXCL_FLAT. Depending on the
+histogram scale factor, a sample bin may span multiple symbols, in
+which case a fraction of the sample count is allocated to each symbol,
+proportional to the degree of overlap. This effect is rare for normal
+profiling, but overlaps are more common during line-by-line profiling,
+and can cause each of two adjacent lines to be credited with half a
+hit, for example.
+
+ If call graph data is present, `cg_arcs.c:cg_assemble' is called.
+First, if `-c' was specified, a machine-dependent routine (`find_call')
+scans through each symbol's machine code, looking for subroutine call
+instructions, and adding them to the call graph with a zero call count.
+A topological sort is performed by depth-first numbering all the
+symbols (`cg_dfn.c:cg_dfn'), so that children are always numbered less
+than their parents, then making a array of pointers into the symbol
+table and sorting it into numerical order, which is reverse topological
+order (children appear before parents). Cycles are also detected at
+this point, all members of which are assigned the same topological
+number. Two passes are now made through this sorted array of symbol
+pointers. The first pass, from end to beginning (parents to children),
+computes the fraction of child time to propagate to each parent and a
+print flag. The print flag reflects symspec handling of
+INCL_GRAPH/EXCL_GRAPH, with a parent's include or exclude (print or no
+print) property being propagated to its children, unless they
+themselves explicitly appear in INCL_GRAPH or EXCL_GRAPH. A second
+pass, from beginning to end (children to parents) actually propagates
+the timings along the call graph, subject to a check against
+INCL_TIME/EXCL_TIME. With the print flag, fractions, and timings now
+stored in the symbol structures, the topological sort array is now
+discarded, and a new array of pointers is assembled, this time sorted
+by propagated time.
+
+ Finally, print the various outputs the user requested, which is now
+fairly straightforward. The call graph (`cg_print.c:cg_print') and
+flat profile (`hist.c:hist_print') are regurgitations of values already
+computed. The annotated source listing
+(`basic_blocks.c:print_annotated_source') uses basic-block information,
+if present, to label each line of code with call counts, otherwise only
+the function call counts are presented.
+
+ The function ordering code is marginally well documented in the
+source code itself (`cg_print.c'). Basically, the functions with the
+most use and the most parents are placed first, followed by other
+functions with the most use, followed by lower use functions, followed
+by unused functions at the end.
+
+
+File: gprof.info, Node: Debugging, Prev: Internals, Up: Details
+
+9.4 Debugging `gprof'
+=====================
+
+If `gprof' was compiled with debugging enabled, the `-d' option
+triggers debugging output (to stdout) which can be helpful in
+understanding its operation. The debugging number specified is
+interpreted as a sum of the following options:
+
+2 - Topological sort
+ Monitor depth-first numbering of symbols during call graph analysis
+
+4 - Cycles
+ Shows symbols as they are identified as cycle heads
+
+16 - Tallying
+ As the call graph arcs are read, show each arc and how the total
+ calls to each function are tallied
+
+32 - Call graph arc sorting
+ Details sorting individual parents/children within each call graph
+ entry
+
+64 - Reading histogram and call graph records
+ Shows address ranges of histograms as they are read, and each call
+ graph arc
+
+128 - Symbol table
+ Reading, classifying, and sorting the symbol table from the object
+ file. For line-by-line profiling (`-l' option), also shows line
+ numbers being assigned to memory addresses.
+
+256 - Static call graph
+ Trace operation of `-c' option
+
+512 - Symbol table and arc table lookups
+ Detail operation of lookup routines
+
+1024 - Call graph propagation
+ Shows how function times are propagated along the call graph
+
+2048 - Basic-blocks
+ Shows basic-block records as they are read from profile data (only
+ meaningful with `-l' option)
+
+4096 - Symspecs
+ Shows symspec-to-symbol pattern matching operation
+
+8192 - Annotate source
+ Tracks operation of `-A' option
+
+
+File: gprof.info, Node: GNU Free Documentation License, Prev: Details, Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+ Version 1.3, 3 November 2008
+
+ Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+ `http://fsf.org/'
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ 0. PREAMBLE
+
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+End Tag Table
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@@ -0,0 +1,273 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "ADDR2LINE 1"
+.TH ADDR2LINE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+addr2line \- convert addresses into file names and line numbers.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+addr2line [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]]
+ [\fB\-e\fR \fIfilename\fR|\fB\-\-exe=\fR\fIfilename\fR]
+ [\fB\-f\fR|\fB\-\-functions\fR] [\fB\-s\fR|\fB\-\-basename\fR]
+ [\fB\-i\fR|\fB\-\-inlines\fR]
+ [\fB\-j\fR|\fB\-\-section=\fR\fIname\fR]
+ [\fB\-H\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [addr addr ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBaddr2line\fR translates addresses into file names and line numbers.
+Given an address in an executable or an offset in a section of a relocatable
+object, it uses the debugging information to figure out which file name and
+line number are associated with it.
+.PP
+The executable or relocatable object to use is specified with the \fB\-e\fR
+option. The default is the file \fIa.out\fR. The section in the relocatable
+object to use is specified with the \fB\-j\fR option.
+.PP
+\&\fBaddr2line\fR has two modes of operation.
+.PP
+In the first, hexadecimal addresses are specified on the command line,
+and \fBaddr2line\fR displays the file name and line number for each
+address.
+.PP
+In the second, \fBaddr2line\fR reads hexadecimal addresses from
+standard input, and prints the file name and line number for each
+address on standard output. In this mode, \fBaddr2line\fR may be used
+in a pipe to convert dynamically chosen addresses.
+.PP
+The format of the output is \fB\s-1FILENAME:LINENO\s0\fR. The file name and
+line number for each address is printed on a separate line. If the
+\&\fB\-f\fR option is used, then each \fB\s-1FILENAME:LINENO\s0\fR line is
+preceded by a \fB\s-1FUNCTIONNAME\s0\fR line which is the name of the function
+containing the address.
+.PP
+If the file name or function name can not be determined,
+\&\fBaddr2line\fR will print two question marks in their place. If the
+line number can not be determined, \fBaddr2line\fR will print 0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-exe=\fR\fIfilename\fR" 4
+.IX Item "--exe=filename"
+.PD
+Specify the name of the executable for which addresses should be
+translated. The default file is \fIa.out\fR.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-functions\fR" 4
+.IX Item "--functions"
+.PD
+Display function names as well as file and line number information.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-basenames\fR" 4
+.IX Item "--basenames"
+.PD
+Display only the base of each file name.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-inlines\fR" 4
+.IX Item "--inlines"
+.PD
+If the address belongs to a function that was inlined, the source
+information for all enclosing scopes back to the first non-inlined
+function will also be printed. For example, if \f(CW\*(C`main\*(C'\fR inlines
+\&\f(CW\*(C`callee1\*(C'\fR which inlines \f(CW\*(C`callee2\*(C'\fR, and address is from
+\&\f(CW\*(C`callee2\*(C'\fR, the source information for \f(CW\*(C`callee1\*(C'\fR and \f(CW\*(C`main\*(C'\fR
+will also be printed.
+.IP "\fB\-j\fR" 4
+.IX Item "-j"
+.PD 0
+.IP "\fB\-\-section\fR" 4
+.IX Item "--section"
+.PD
+Read offsets relative to the specified section instead of absolute addresses.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1
new file mode 100644
index 0000000..9fa94e1
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ar.1
@@ -0,0 +1,429 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AR 1"
+.TH AR 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ar \- create, modify, and extract from archives
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ar [\fB\-\-plugin\fR \fIname\fR] [\fB\-X32_64\fR] [\fB\-\fR]\fIp\fR[\fImod\fR [\fIrelpos\fR] [\fIcount\fR]] \fIarchive\fR [\fImember\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBar\fR program creates, modifies, and extracts from
+archives. An \fIarchive\fR is a single file holding a collection of
+other files in a structure that makes it possible to retrieve
+the original individual files (called \fImembers\fR of the archive).
+.PP
+The original files' contents, mode (permissions), timestamp, owner, and
+group are preserved in the archive, and can be restored on
+extraction.
+.PP
+\&\s-1GNU\s0 \fBar\fR can maintain archives whose members have names of any
+length; however, depending on how \fBar\fR is configured on your
+system, a limit on member-name length may be imposed for compatibility
+with archive formats maintained with other tools. If it exists, the
+limit is often 15 characters (typical of formats related to a.out) or 16
+characters (typical of formats related to coff).
+.PP
+\&\fBar\fR is considered a binary utility because archives of this sort
+are most often used as \fIlibraries\fR holding commonly needed
+subroutines.
+.PP
+\&\fBar\fR creates an index to the symbols defined in relocatable
+object modules in the archive when you specify the modifier \fBs\fR.
+Once created, this index is updated in the archive whenever \fBar\fR
+makes a change to its contents (save for the \fBq\fR update operation).
+An archive with such an index speeds up linking to the library, and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index
+table. If an archive lacks the table, another form of \fBar\fR called
+\&\fBranlib\fR can be used to add just the table.
+.PP
+\&\s-1GNU\s0 \fBar\fR can optionally create a \fIthin\fR archive,
+which contains a symbol index and references to the original copies
+of the member files of the archives. Such an archive is useful
+for building libraries for use within a local build, where the
+relocatable objects are expected to remain available, and copying the
+contents of each object would only waste time and space. Thin archives
+are also \fIflattened\fR, so that adding one or more archives to a
+thin archive will add the elements of the nested archive individually.
+The paths to the elements of the archive are stored relative to the
+archive itself.
+.PP
+\&\s-1GNU\s0 \fBar\fR is designed to be compatible with two different
+facilities. You can control its activity using command-line options,
+like the different varieties of \fBar\fR on Unix systems; or, if you
+specify the single command-line option \fB\-M\fR, you can control it
+with a script supplied via standard input, like the \s-1MRI\s0 \*(L"librarian\*(R"
+program.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+\&\s-1GNU\s0 \fBar\fR allows you to mix the operation code \fIp\fR and modifier
+flags \fImod\fR in any order, within the first command-line argument.
+.PP
+If you wish, you may begin the first command-line argument with a
+dash.
+.PP
+The \fIp\fR keyletter specifies what operation to execute; it may be
+any of the following, but you must specify only one of them:
+.IP "\fBd\fR" 4
+.IX Item "d"
+\&\fIDelete\fR modules from the archive. Specify the names of modules to
+be deleted as \fImember\fR...; the archive is untouched if you
+specify no files to delete.
+.Sp
+If you specify the \fBv\fR modifier, \fBar\fR lists each module
+as it is deleted.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Use this operation to \fImove\fR members in an archive.
+.Sp
+The ordering of members in an archive can make a difference in how
+programs are linked using the library, if a symbol is defined in more
+than one member.
+.Sp
+If no modifiers are used with \f(CW\*(C`m\*(C'\fR, any members you name in the
+\&\fImember\fR arguments are moved to the \fIend\fR of the archive;
+you can use the \fBa\fR, \fBb\fR, or \fBi\fR modifiers to move them to a
+specified place instead.
+.IP "\fBp\fR" 4
+.IX Item "p"
+\&\fIPrint\fR the specified members of the archive, to the standard
+output file. If the \fBv\fR modifier is specified, show the member
+name before copying its contents to standard output.
+.Sp
+If you specify no \fImember\fR arguments, all the files in the archive are
+printed.
+.IP "\fBq\fR" 4
+.IX Item "q"
+\&\fIQuick append\fR; Historically, add the files \fImember\fR... to the end of
+\&\fIarchive\fR, without checking for replacement.
+.Sp
+The modifiers \fBa\fR, \fBb\fR, and \fBi\fR do \fInot\fR affect this
+operation; new members are always placed at the end of the archive.
+.Sp
+The modifier \fBv\fR makes \fBar\fR list each file as it is appended.
+.Sp
+Since the point of this operation is speed, the archive's symbol table
+index is not updated, even if it already existed; you can use \fBar s\fR or
+\&\fBranlib\fR explicitly to update the symbol table index.
+.Sp
+However, too many different systems assume quick append rebuilds the
+index, so \s-1GNU\s0 \fBar\fR implements \fBq\fR as a synonym for \fBr\fR.
+.IP "\fBr\fR" 4
+.IX Item "r"
+Insert the files \fImember\fR... into \fIarchive\fR (with
+\&\fIreplacement\fR). This operation differs from \fBq\fR in that any
+previously existing members are deleted if their names match those being
+added.
+.Sp
+If one of the files named in \fImember\fR... does not exist, \fBar\fR
+displays an error message, and leaves undisturbed any existing members
+of the archive matching that name.
+.Sp
+By default, new members are added at the end of the file; but you may
+use one of the modifiers \fBa\fR, \fBb\fR, or \fBi\fR to request
+placement relative to some existing member.
+.Sp
+The modifier \fBv\fR used with this operation elicits a line of
+output for each file inserted, along with one of the letters \fBa\fR or
+\&\fBr\fR to indicate whether the file was appended (no old member
+deleted) or replaced.
+.IP "\fBt\fR" 4
+.IX Item "t"
+Display a \fItable\fR listing the contents of \fIarchive\fR, or those
+of the files listed in \fImember\fR... that are present in the
+archive. Normally only the member name is shown; if you also want to
+see the modes (permissions), timestamp, owner, group, and size, you can
+request that by also specifying the \fBv\fR modifier.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are listed.
+.Sp
+If there is more than one file with the same name (say, \fBfie\fR) in
+an archive (say \fBb.a\fR), \fBar t b.a fie\fR lists only the
+first instance; to see them all, you must ask for a complete
+listing\-\-\-in our example, \fBar t b.a\fR.
+.IP "\fBx\fR" 4
+.IX Item "x"
+\&\fIExtract\fR members (named \fImember\fR) from the archive. You can
+use the \fBv\fR modifier with this operation, to request that
+\&\fBar\fR list each name as it extracts it.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are extracted.
+.Sp
+Files cannot be extracted from a thin archive.
+.PP
+A number of modifiers (\fImod\fR) may immediately follow the \fIp\fR
+keyletter, to specify variations on an operation's behavior:
+.IP "\fBa\fR" 4
+.IX Item "a"
+Add new files \fIafter\fR an existing member of the
+archive. If you use the modifier \fBa\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification.
+.IP "\fBb\fR" 4
+.IX Item "b"
+Add new files \fIbefore\fR an existing member of the
+archive. If you use the modifier \fBb\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification. (same as \fBi\fR).
+.IP "\fBc\fR" 4
+.IX Item "c"
+\&\fICreate\fR the archive. The specified \fIarchive\fR is always
+created if it did not exist, when you request an update. But a warning is
+issued unless you specify in advance that you expect to create it, by
+using this modifier.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Operate in \fIdeterministic\fR mode. When adding files and the archive
+index use zero for UIDs, GIDs, timestamps, and use consistent file modes
+for all files. When this option is used, if \fBar\fR is used with
+identical options and identical input files, multiple runs will create
+identical output files regardless of the input files' owners, groups,
+file modes, or modification times.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Truncate names in the archive. \s-1GNU\s0 \fBar\fR will normally permit file
+names of any length. This will cause it to create archives which are
+not compatible with the native \fBar\fR program on some systems. If
+this is a concern, the \fBf\fR modifier may be used to truncate file
+names when putting them in the archive.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Insert new files \fIbefore\fR an existing member of the
+archive. If you use the modifier \fBi\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification. (same as \fBb\fR).
+.IP "\fBl\fR" 4
+.IX Item "l"
+This modifier is accepted but not used.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Uses the \fIcount\fR parameter. This is used if there are multiple
+entries in the archive with the same name. Extract or delete instance
+\&\fIcount\fR of the given name from the archive.
+.IP "\fBo\fR" 4
+.IX Item "o"
+Preserve the \fIoriginal\fR dates of members when extracting them. If
+you do not specify this modifier, files extracted from the archive
+are stamped with the time of extraction.
+.IP "\fBP\fR" 4
+.IX Item "P"
+Use the full path name when matching names in the archive. \s-1GNU\s0
+\&\fBar\fR can not create an archive with a full path name (such archives
+are not \s-1POSIX\s0 complaint), but other archive creators can. This option
+will cause \s-1GNU\s0 \fBar\fR to match file names using a complete path
+name, which can be convenient when extracting a single file from an
+archive created by another tool.
+.IP "\fBs\fR" 4
+.IX Item "s"
+Write an object-file index into the archive, or update an existing one,
+even if no other change is made to the archive. You may use this modifier
+flag either with any operation, or alone. Running \fBar s\fR on an
+archive is equivalent to running \fBranlib\fR on it.
+.IP "\fBS\fR" 4
+.IX Item "S"
+Do not generate an archive symbol table. This can speed up building a
+large library in several steps. The resulting archive can not be used
+with the linker. In order to build a symbol table, you must omit the
+\&\fBS\fR modifier on the last execution of \fBar\fR, or you must run
+\&\fBranlib\fR on the archive.
+.IP "\fBT\fR" 4
+.IX Item "T"
+Make the specified \fIarchive\fR a \fIthin\fR archive. If it already
+exists and is a regular archive, the existing members must be present
+in the same directory as \fIarchive\fR.
+.IP "\fBu\fR" 4
+.IX Item "u"
+Normally, \fBar r\fR... inserts all files
+listed into the archive. If you would like to insert \fIonly\fR those
+of the files you list that are newer than existing members of the same
+names, use this modifier. The \fBu\fR modifier is allowed only for the
+operation \fBr\fR (replace). In particular, the combination \fBqu\fR is
+not allowed, since checking the timestamps would lose any speed
+advantage from the operation \fBq\fR.
+.IP "\fBv\fR" 4
+.IX Item "v"
+This modifier requests the \fIverbose\fR version of an operation. Many
+operations display additional information, such as filenames processed,
+when the modifier \fBv\fR is appended.
+.IP "\fBV\fR" 4
+.IX Item "V"
+This modifier shows the version number of \fBar\fR.
+.PP
+\&\fBar\fR ignores an initial option spelt \fB\-X32_64\fR, for
+compatibility with \s-1AIX\s0. The behaviour produced by this option is the
+default for \s-1GNU\s0 \fBar\fR. \fBar\fR does not support any of the other
+\&\fB\-X\fR options; in particular, it does not support \fB\-X32\fR
+which is the default for \s-1AIX\s0 \fBar\fR.
+.PP
+The optional command line switch \fB\-\-plugin\fR \fIname\fR causes
+\&\fBar\fR to load the plugin called \fIname\fR which adds support
+for more file formats. This option is only available if the toolchain
+has been built with plugin support enabled.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1
new file mode 100644
index 0000000..389a1de
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-as.1
@@ -0,0 +1,1200 @@
+.\" Automatically generated by Pod::Man 2.22 (Pod::Simple 3.07)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AS 1"
+.TH AS 1 "2011-03-23" "binutils-2.20.1" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+AS \- the portable GNU assembler.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+as [\fB\-a\fR[\fBcdghlns\fR][=\fIfile\fR]] [\fB\-\-alternate\fR] [\fB\-D\fR]
+ [\fB\-\-debug\-prefix\-map\fR \fIold\fR=\fInew\fR]
+ [\fB\-\-defsym\fR \fIsym\fR=\fIval\fR] [\fB\-f\fR] [\fB\-g\fR] [\fB\-\-gstabs\fR]
+ [\fB\-\-gstabs+\fR] [\fB\-\-gdwarf\-2\fR] [\fB\-\-help\fR] [\fB\-I\fR \fIdir\fR] [\fB\-J\fR]
+ [\fB\-K\fR] [\fB\-L\fR] [\fB\-\-listing\-lhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-lhs\-width2\fR=\fI\s-1NUM\s0\fR] [\fB\-\-listing\-rhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-cont\-lines\fR=\fI\s-1NUM\s0\fR] [\fB\-\-keep\-locals\fR] [\fB\-o\fR
+ \fIobjfile\fR] [\fB\-R\fR] [\fB\-\-reduce\-memory\-overheads\fR] [\fB\-\-statistics\fR]
+ [\fB\-v\fR] [\fB\-version\fR] [\fB\-\-version\fR] [\fB\-W\fR] [\fB\-\-warn\fR]
+ [\fB\-\-fatal\-warnings\fR] [\fB\-w\fR] [\fB\-x\fR] [\fB\-Z\fR] [\fB@\fR\fI\s-1FILE\s0\fR]
+ [\fB\-\-target\-help\fR] [\fItarget-options\fR]
+ [\fB\-\-\fR|\fIfiles\fR ...]
+.PP
+\&\fITarget Alpha options:\fR
+ [\fB\-m\fR\fIcpu\fR]
+ [\fB\-mdebug\fR | \fB\-no\-mdebug\fR]
+ [\fB\-replace\fR | \fB\-noreplace\fR]
+ [\fB\-relax\fR] [\fB\-g\fR] [\fB\-G\fR\fIsize\fR]
+ [\fB\-F\fR] [\fB\-32addr\fR]
+.PP
+\&\fITarget \s-1ARC\s0 options:\fR
+ [\fB\-marc[5|6|7|8]\fR]
+ [\fB\-EB\fR|\fB\-EL\fR]
+.PP
+\&\fITarget \s-1ARM\s0 options:\fR
+ [\fB\-mcpu\fR=\fIprocessor\fR[+\fIextension\fR...]]
+ [\fB\-march\fR=\fIarchitecture\fR[+\fIextension\fR...]]
+ [\fB\-mfpu\fR=\fIfloating-point-format\fR]
+ [\fB\-mfloat\-abi\fR=\fIabi\fR]
+ [\fB\-meabi\fR=\fIver\fR]
+ [\fB\-mthumb\fR]
+ [\fB\-EB\fR|\fB\-EL\fR]
+ [\fB\-mapcs\-32\fR|\fB\-mapcs\-26\fR|\fB\-mapcs\-float\fR|
+ \fB\-mapcs\-reentrant\fR]
+ [\fB\-mthumb\-interwork\fR] [\fB\-k\fR]
+.PP
+\&\fITarget \s-1CRIS\s0 options:\fR
+ [\fB\-\-underscore\fR | \fB\-\-no\-underscore\fR]
+ [\fB\-\-pic\fR] [\fB\-N\fR]
+ [\fB\-\-emulation=criself\fR | \fB\-\-emulation=crisaout\fR]
+ [\fB\-\-march=v0_v10\fR | \fB\-\-march=v10\fR | \fB\-\-march=v32\fR | \fB\-\-march=common_v10_v32\fR]
+.PP
+\&\fITarget D10V options:\fR
+ [\fB\-O\fR]
+.PP
+\&\fITarget D30V options:\fR
+ [\fB\-O\fR|\fB\-n\fR|\fB\-N\fR]
+.PP
+\&\fITarget H8/300 options:\fR
+ [\-h\-tick\-hex]
+.PP
+\&\fITarget i386 options:\fR
+ [\fB\-\-32\fR|\fB\-\-64\fR] [\fB\-n\fR]
+ [\fB\-march\fR=\fI\s-1CPU\s0\fR[+\fI\s-1EXTENSION\s0\fR...]] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR]
+.PP
+\&\fITarget i960 options:\fR
+ [\fB\-ACA\fR|\fB\-ACA_A\fR|\fB\-ACB\fR|\fB\-ACC\fR|\fB\-AKA\fR|\fB\-AKB\fR|
+ \fB\-AKC\fR|\fB\-AMC\fR]
+ [\fB\-b\fR] [\fB\-no\-relax\fR]
+.PP
+\&\fITarget \s-1IA\-64\s0 options:\fR
+ [\fB\-mconstant\-gp\fR|\fB\-mauto\-pic\fR]
+ [\fB\-milp32\fR|\fB\-milp64\fR|\fB\-mlp64\fR|\fB\-mp64\fR]
+ [\fB\-mle\fR|\fBmbe\fR]
+ [\fB\-mtune=itanium1\fR|\fB\-mtune=itanium2\fR]
+ [\fB\-munwind\-check=warning\fR|\fB\-munwind\-check=error\fR]
+ [\fB\-mhint.b=ok\fR|\fB\-mhint.b=warning\fR|\fB\-mhint.b=error\fR]
+ [\fB\-x\fR|\fB\-xexplicit\fR] [\fB\-xauto\fR] [\fB\-xdebug\fR]
+.PP
+\&\fITarget \s-1IP2K\s0 options:\fR
+ [\fB\-mip2022\fR|\fB\-mip2022ext\fR]
+.PP
+\&\fITarget M32C options:\fR
+ [\fB\-m32c\fR|\fB\-m16c\fR] [\-relax] [\-h\-tick\-hex]
+.PP
+\&\fITarget M32R options:\fR
+ [\fB\-\-m32rx\fR|\fB\-\-[no\-]warn\-explicit\-parallel\-conflicts\fR|
+ \fB\-\-W[n]p\fR]
+.PP
+\&\fITarget M680X0 options:\fR
+ [\fB\-l\fR] [\fB\-m68000\fR|\fB\-m68010\fR|\fB\-m68020\fR|...]
+.PP
+\&\fITarget M68HC11 options:\fR
+ [\fB\-m68hc11\fR|\fB\-m68hc12\fR|\fB\-m68hcs12\fR]
+ [\fB\-mshort\fR|\fB\-mlong\fR]
+ [\fB\-mshort\-double\fR|\fB\-mlong\-double\fR]
+ [\fB\-\-force\-long\-branches\fR] [\fB\-\-short\-branches\fR]
+ [\fB\-\-strict\-direct\-mode\fR] [\fB\-\-print\-insn\-syntax\fR]
+ [\fB\-\-print\-opcodes\fR] [\fB\-\-generate\-example\fR]
+.PP
+\&\fITarget \s-1MCORE\s0 options:\fR
+ [\fB\-jsri2bsr\fR] [\fB\-sifilter\fR] [\fB\-relax\fR]
+ [\fB\-mcpu=[210|340]\fR]
+\&\fITarget \s-1MICROBLAZE\s0 options:\fR
+.PP
+\&\fITarget \s-1MIPS\s0 options:\fR
+ [\fB\-nocpp\fR] [\fB\-EL\fR] [\fB\-EB\fR] [\fB\-O\fR[\fIoptimization level\fR]]
+ [\fB\-g\fR[\fIdebug level\fR]] [\fB\-G\fR \fInum\fR] [\fB\-KPIC\fR] [\fB\-call_shared\fR]
+ [\fB\-non_shared\fR] [\fB\-xgot\fR [\fB\-mvxworks\-pic\fR]
+ [\fB\-mabi\fR=\fI\s-1ABI\s0\fR] [\fB\-32\fR] [\fB\-n32\fR] [\fB\-64\fR] [\fB\-mfp32\fR] [\fB\-mgp32\fR]
+ [\fB\-march\fR=\fI\s-1CPU\s0\fR] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR] [\fB\-mips1\fR] [\fB\-mips2\fR]
+ [\fB\-mips3\fR] [\fB\-mips4\fR] [\fB\-mips5\fR] [\fB\-mips32\fR] [\fB\-mips32r2\fR]
+ [\fB\-mips64\fR] [\fB\-mips64r2\fR]
+ [\fB\-construct\-floats\fR] [\fB\-no\-construct\-floats\fR]
+ [\fB\-trap\fR] [\fB\-no\-break\fR] [\fB\-break\fR] [\fB\-no\-trap\fR]
+ [\fB\-mfix7000\fR] [\fB\-mno\-fix7000\fR]
+ [\fB\-mips16\fR] [\fB\-no\-mips16\fR]
+ [\fB\-msmartmips\fR] [\fB\-mno\-smartmips\fR]
+ [\fB\-mips3d\fR] [\fB\-no\-mips3d\fR]
+ [\fB\-mdmx\fR] [\fB\-no\-mdmx\fR]
+ [\fB\-mdsp\fR] [\fB\-mno\-dsp\fR]
+ [\fB\-mdspr2\fR] [\fB\-mno\-dspr2\fR]
+ [\fB\-mmt\fR] [\fB\-mno\-mt\fR]
+ [\fB\-mdebug\fR] [\fB\-no\-mdebug\fR]
+ [\fB\-mpdr\fR] [\fB\-mno\-pdr\fR]
+.PP
+\&\fITarget \s-1MMIX\s0 options:\fR
+ [\fB\-\-fixed\-special\-register\-names\fR] [\fB\-\-globalize\-symbols\fR]
+ [\fB\-\-gnu\-syntax\fR] [\fB\-\-relax\fR] [\fB\-\-no\-predefined\-symbols\fR]
+ [\fB\-\-no\-expand\fR] [\fB\-\-no\-merge\-gregs\fR] [\fB\-x\fR]
+ [\fB\-\-linker\-allocated\-gregs\fR]
+.PP
+\&\fITarget \s-1PDP11\s0 options:\fR
+ [\fB\-mpic\fR|\fB\-mno\-pic\fR] [\fB\-mall\fR] [\fB\-mno\-extensions\fR]
+ [\fB\-m\fR\fIextension\fR|\fB\-mno\-\fR\fIextension\fR]
+ [\fB\-m\fR\fIcpu\fR] [\fB\-m\fR\fImachine\fR]
+.PP
+\&\fITarget picoJava options:\fR
+ [\fB\-mb\fR|\fB\-me\fR]
+.PP
+\&\fITarget PowerPC options:\fR
+ [\fB\-mpwrx\fR|\fB\-mpwr2\fR|\fB\-mpwr\fR|\fB\-m601\fR|\fB\-mppc\fR|\fB\-mppc32\fR|\fB\-m603\fR|\fB\-m604\fR|
+ \fB\-m403\fR|\fB\-m405\fR|\fB\-mppc64\fR|\fB\-m620\fR|\fB\-mppc64bridge\fR|\fB\-mbooke\fR]
+ [\fB\-mcom\fR|\fB\-many\fR|\fB\-maltivec\fR|\fB\-mvsx\fR] [\fB\-memb\fR]
+ [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+ [\fB\-mrelocatable\fR|\fB\-mrelocatable\-lib\fR]
+ [\fB\-mlittle\fR|\fB\-mlittle\-endian\fR|\fB\-mbig\fR|\fB\-mbig\-endian\fR]
+ [\fB\-msolaris\fR|\fB\-mno\-solaris\fR]
+.PP
+\&\fITarget s390 options:\fR
+ [\fB\-m31\fR|\fB\-m64\fR] [\fB\-mesa\fR|\fB\-mzarch\fR] [\fB\-march\fR=\fI\s-1CPU\s0\fR]
+ [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+ [\fB\-mwarn\-areg\-zero\fR]
+.PP
+\&\fITarget \s-1SCORE\s0 options:\fR
+ [\fB\-EB\fR][\fB\-EL\fR][\fB\-FIXDD\fR][\fB\-NWARN\fR]
+ [\fB\-SCORE5\fR][\fB\-SCORE5U\fR][\fB\-SCORE7\fR][\fB\-SCORE3\fR]
+ [\fB\-march=score7\fR][\fB\-march=score3\fR]
+ [\fB\-USE_R1\fR][\fB\-KPIC\fR][\fB\-O0\fR][\fB\-G\fR \fInum\fR][\fB\-V\fR]
+.PP
+\&\fITarget \s-1SPARC\s0 options:\fR
+ [\fB\-Av6\fR|\fB\-Av7\fR|\fB\-Av8\fR|\fB\-Asparclet\fR|\fB\-Asparclite\fR
+ \fB\-Av8plus\fR|\fB\-Av8plusa\fR|\fB\-Av9\fR|\fB\-Av9a\fR]
+ [\fB\-xarch=v8plus\fR|\fB\-xarch=v8plusa\fR] [\fB\-bump\fR]
+ [\fB\-32\fR|\fB\-64\fR]
+.PP
+\&\fITarget \s-1TIC54X\s0 options:\fR
+ [\fB\-mcpu=54[123589]\fR|\fB\-mcpu=54[56]lp\fR] [\fB\-mfar\-mode\fR|\fB\-mf\fR]
+ [\fB\-merrors\-to\-file\fR \fI<filename>\fR|\fB\-me\fR \fI<filename>\fR]
+.PP
+\&\fITarget Z80 options:\fR
+ [\fB\-z80\fR] [\fB\-r800\fR]
+ [ \fB\-ignore\-undocumented\-instructions\fR] [\fB\-Wnud\fR]
+ [ \fB\-ignore\-unportable\-instructions\fR] [\fB\-Wnup\fR]
+ [ \fB\-warn\-undocumented\-instructions\fR] [\fB\-Wud\fR]
+ [ \fB\-warn\-unportable\-instructions\fR] [\fB\-Wup\fR]
+ [ \fB\-forbid\-undocumented\-instructions\fR] [\fB\-Fud\fR]
+ [ \fB\-forbid\-unportable\-instructions\fR] [\fB\-Fup\fR]
+.PP
+\&\fITarget Xtensa options:\fR
+ [\fB\-\-[no\-]text\-section\-literals\fR] [\fB\-\-[no\-]absolute\-literals\fR]
+ [\fB\-\-[no\-]target\-align\fR] [\fB\-\-[no\-]longcalls\fR]
+ [\fB\-\-[no\-]transform\fR]
+ [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBas\fR is really a family of assemblers.
+If you use (or have used) the \s-1GNU\s0 assembler on one architecture, you
+should find a fairly similar environment when you use it on another
+architecture. Each version has much in common with the others,
+including object file formats, most assembler directives (often called
+\&\fIpseudo-ops\fR) and assembler syntax.
+.PP
+\&\fBas\fR is primarily intended to assemble the output of the
+\&\s-1GNU\s0 C compiler \f(CW\*(C`gcc\*(C'\fR for use by the linker
+\&\f(CW\*(C`ld\*(C'\fR. Nevertheless, we've tried to make \fBas\fR
+assemble correctly everything that other assemblers for the same
+machine would assemble.
+Any exceptions are documented explicitly.
+This doesn't mean \fBas\fR always uses the same syntax as another
+assembler for the same architecture; for example, we know of several
+incompatible versions of 680x0 assembly language syntax.
+.PP
+Each time you run \fBas\fR it assembles exactly one source
+program. The source program is made up of one or more files.
+(The standard input is also a file.)
+.PP
+You give \fBas\fR a command line that has zero or more input file
+names. The input files are read (from left file name to right). A
+command line argument (in any position) that has no special meaning
+is taken to be an input file name.
+.PP
+If you give \fBas\fR no file names it attempts to read one input file
+from the \fBas\fR standard input, which is normally your terminal. You
+may have to type \fBctl-D\fR to tell \fBas\fR there is no more program
+to assemble.
+.PP
+Use \fB\-\-\fR if you need to explicitly name the standard input file
+in your command line.
+.PP
+If the source is empty, \fBas\fR produces a small, empty object
+file.
+.PP
+\&\fBas\fR may write warnings and error messages to the standard error
+file (usually your terminal). This should not happen when a compiler
+runs \fBas\fR automatically. Warnings report an assumption made so
+that \fBas\fR could keep assembling a flawed program; errors report a
+grave problem that stops the assembly.
+.PP
+If you are invoking \fBas\fR via the \s-1GNU\s0 C compiler,
+you can use the \fB\-Wa\fR option to pass arguments through to the assembler.
+The assembler arguments must be separated from each other (and the \fB\-Wa\fR)
+by commas. For example:
+.PP
+.Vb 1
+\& gcc \-c \-g \-O \-Wa,\-alh,\-L file.c
+.Ve
+.PP
+This passes two options to the assembler: \fB\-alh\fR (emit a listing to
+standard output with high-level and assembly source) and \fB\-L\fR (retain
+local symbols in the symbol table).
+.PP
+Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
+command-line options are automatically passed to the assembler by the compiler.
+(You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see
+precisely what options it passes to each compilation pass, including the
+assembler.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a[cdghlmns]\fR" 4
+.IX Item "-a[cdghlmns]"
+Turn on listings, in any of a variety of ways:
+.RS 4
+.IP "\fB\-ac\fR" 4
+.IX Item "-ac"
+omit false conditionals
+.IP "\fB\-ad\fR" 4
+.IX Item "-ad"
+omit debugging directives
+.IP "\fB\-ag\fR" 4
+.IX Item "-ag"
+include general information, like as version and options passed
+.IP "\fB\-ah\fR" 4
+.IX Item "-ah"
+include high-level source
+.IP "\fB\-al\fR" 4
+.IX Item "-al"
+include assembly
+.IP "\fB\-am\fR" 4
+.IX Item "-am"
+include macro expansions
+.IP "\fB\-an\fR" 4
+.IX Item "-an"
+omit forms processing
+.IP "\fB\-as\fR" 4
+.IX Item "-as"
+include symbols
+.IP "\fB=file\fR" 4
+.IX Item "=file"
+set the name of the listing file
+.RE
+.RS 4
+.Sp
+You may combine these options; for example, use \fB\-aln\fR for assembly
+listing without forms processing. The \fB=file\fR option, if used, must be
+the last one. By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
+.RE
+.IP "\fB\-\-alternate\fR" 4
+.IX Item "--alternate"
+Begin in alternate macro mode.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+Ignored. This option is accepted for script compatibility with calls to
+other assemblers.
+.IP "\fB\-\-debug\-prefix\-map\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--debug-prefix-map old=new"
+When assembling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-\-defsym\fR \fIsym\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--defsym sym=value"
+Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
+\&\fIvalue\fR must be an integer constant. As in C, a leading \fB0x\fR
+indicates a hexadecimal value, and a leading \fB0\fR indicates an octal
+value. The value of the symbol can be overridden inside a source file via the
+use of a \f(CW\*(C`.set\*(C'\fR pseudo-op.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+\&\*(L"fast\*(R"\-\-\-skip whitespace and comment preprocessing (assume source is
+compiler output).
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-gen\-debug\fR" 4
+.IX Item "--gen-debug"
+.PD
+Generate debugging information for each assembler source line using whichever
+debug format is preferred by the target. This currently means either \s-1STABS\s0,
+\&\s-1ECOFF\s0 or \s-1DWARF2\s0.
+.IP "\fB\-\-gstabs\fR" 4
+.IX Item "--gstabs"
+Generate stabs debugging information for each assembler line. This
+may help debugging assembler code, if the debugger can handle it.
+.IP "\fB\-\-gstabs+\fR" 4
+.IX Item "--gstabs+"
+Generate stabs debugging information for each assembler line, with \s-1GNU\s0
+extensions that probably only gdb can handle, and that could make other
+debuggers crash or refuse to read your program. This
+may help debugging assembler code. Currently the only \s-1GNU\s0 extension is
+the location of the current working directory at assembling time.
+.IP "\fB\-\-gdwarf\-2\fR" 4
+.IX Item "--gdwarf-2"
+Generate \s-1DWARF2\s0 debugging information for each assembler line. This
+may help debugging assembler code, if the debugger can handle it. Note\-\-\-this
+option is only supported by some targets, not all of them.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command line options and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options and exit.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives.
+.IP "\fB\-J\fR" 4
+.IX Item "-J"
+Don't warn about signed overflow.
+.IP "\fB\-K\fR" 4
+.IX Item "-K"
+Issue warnings when difference tables altered for long displacements.
+.IP "\fB\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.IP "\fB\-\-keep\-locals\fR" 4
+.IX Item "--keep-locals"
+.PD
+Keep (in the symbol table) local symbols. These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.
+.IP "\fB\-\-listing\-lhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width=number"
+Set the maximum width, in words, of the output data column for an assembler
+listing to \fInumber\fR.
+.IP "\fB\-\-listing\-lhs\-width2=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width2=number"
+Set the maximum width, in words, of the output data column for continuation
+lines in an assembler listing to \fInumber\fR.
+.IP "\fB\-\-listing\-rhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-rhs-width=number"
+Set the maximum width of an input source line, as displayed in a listing, to
+\&\fInumber\fR bytes.
+.IP "\fB\-\-listing\-cont\-lines=\fR\fInumber\fR" 4
+.IX Item "--listing-cont-lines=number"
+Set the maximum number of lines printed in a listing for a single line of input
+to \fInumber\fR + 1.
+.IP "\fB\-o\fR \fIobjfile\fR" 4
+.IX Item "-o objfile"
+Name the object-file output from \fBas\fR \fIobjfile\fR.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+Fold the data section into the text section.
+.Sp
+Set the default size of \s-1GAS\s0's hash tables to a prime number close to
+\&\fInumber\fR. Increasing this value can reduce the length of time it takes the
+assembler to perform its tasks, at the expense of increasing the assembler's
+memory requirements. Similarly reducing this value can reduce the memory
+requirements at the expense of speed.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces \s-1GAS\s0's memory requirements, at the expense of making the
+assembly processes slower. Currently this switch is a synonym for
+\&\fB\-\-hash\-size=4051\fR, but in the future it may have other effects as well.
+.IP "\fB\-\-statistics\fR" 4
+.IX Item "--statistics"
+Print the maximum space (in bytes) and total time (in seconds) used by
+assembly.
+.IP "\fB\-\-strip\-local\-absolute\fR" 4
+.IX Item "--strip-local-absolute"
+Remove local absolute symbols from the outgoing symbol table.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD
+Print the \fBas\fR version.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the \fBas\fR version and exit.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-no\-warn\fR" 4
+.IX Item "--no-warn"
+.PD
+Suppress warning messages.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+Treat warnings as errors.
+.IP "\fB\-\-warn\fR" 4
+.IX Item "--warn"
+Don't suppress warning messages or treat them as errors.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Ignored.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+Ignored.
+.IP "\fB\-Z\fR" 4
+.IX Item "-Z"
+Generate an object file even after errors.
+.IP "\fB\-\- |\fR \fIfiles\fR \fB...\fR" 4
+.IX Item "-- | files ..."
+Standard input, or source files to assemble.
+.PP
+The following options are available when as is configured for
+an \s-1ARC\s0 processor.
+.IP "\fB\-marc[5|6|7|8]\fR" 4
+.IX Item "-marc[5|6|7|8]"
+This option selects the core processor variant.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.PP
+The following options are available when as is configured for the \s-1ARM\s0
+processor family.
+.IP "\fB\-mcpu=\fR\fIprocessor\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-mcpu=processor[+extension...]"
+Specify which \s-1ARM\s0 processor variant is the target.
+.IP "\fB\-march=\fR\fIarchitecture\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-march=architecture[+extension...]"
+Specify which \s-1ARM\s0 architecture variant is used by the target.
+.IP "\fB\-mfpu=\fR\fIfloating-point-format\fR" 4
+.IX Item "-mfpu=floating-point-format"
+Select which Floating Point architecture is the target.
+.IP "\fB\-mfloat\-abi=\fR\fIabi\fR" 4
+.IX Item "-mfloat-abi=abi"
+Select which floating point \s-1ABI\s0 is in use.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Enable Thumb only instruction decoding.
+.IP "\fB\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant\fR" 4
+.IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant"
+Select which procedure calling convention is in use.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Specify that the code has been generated with interworking between Thumb and
+\&\s-1ARM\s0 code in mind.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+Specify that \s-1PIC\s0 code has been generated.
+.PP
+See the info pages for documentation of the CRIS-specific options.
+.PP
+The following options are available when as is configured for
+a D10V processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.PP
+The following options are available when as is configured for a D30V
+processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+Warn when nops are generated.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+Warn when a nop after a 32\-bit multiply instruction is generated.
+.PP
+The following options are available when as is configured for the
+Intel 80960 processor.
+.IP "\fB\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\fR" 4
+.IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC"
+Specify which variant of the 960 architecture is the target.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+Add code to collect statistics about branches taken.
+.IP "\fB\-no\-relax\fR" 4
+.IX Item "-no-relax"
+Do not alter compare-and-branch instructions for long displacements;
+error if necessary.
+.PP
+The following options are available when as is configured for the
+Ubicom \s-1IP2K\s0 series.
+.IP "\fB\-mip2022ext\fR" 4
+.IX Item "-mip2022ext"
+Specifies that the extended \s-1IP2022\s0 instructions are allowed.
+.IP "\fB\-mip2022\fR" 4
+.IX Item "-mip2022"
+Restores the default behaviour, which restricts the permitted instructions to
+just the basic \s-1IP2022\s0 ones.
+.PP
+The following options are available when as is configured for the
+Renesas M32C and M16C processors.
+.IP "\fB\-m32c\fR" 4
+.IX Item "-m32c"
+Assemble M32C instructions.
+.IP "\fB\-m16c\fR" 4
+.IX Item "-m16c"
+Assemble M16C instructions (the default).
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Enable support for link-time relaxations.
+.IP "\fB\-h\-tick\-hex\fR" 4
+.IX Item "-h-tick-hex"
+Support H'00 style hex constants in addition to 0x00 style.
+.PP
+The following options are available when as is configured for the
+Renesas M32R (formerly Mitsubishi M32R) series.
+.IP "\fB\-\-m32rx\fR" 4
+.IX Item "--m32rx"
+Specify which processor in the M32R family is the target. The default
+is normally the M32R, but this option changes it to the M32RX.
+.IP "\fB\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\fR" 4
+.IX Item "--warn-explicit-parallel-conflicts or --Wp"
+Produce warning messages when questionable parallel constructs are
+encountered.
+.IP "\fB\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\fR" 4
+.IX Item "--no-warn-explicit-parallel-conflicts or --Wnp"
+Do not produce warning messages when questionable parallel constructs are
+encountered.
+.PP
+The following options are available when as is configured for the
+Motorola 68000 series.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+Shorten references to undefined symbols, to one word instead of two.
+.IP "\fB\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\fR" 4
+.IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030"
+.PD 0
+.IP "\fB| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\fR" 4
+.IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332"
+.IP "\fB| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\fR" 4
+.IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200"
+.PD
+Specify what processor in the 68000 family is the target. The default
+is normally the 68020, but this can be changed at configuration time.
+.IP "\fB\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\fR" 4
+.IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882"
+The target machine does (or does not) have a floating-point coprocessor.
+The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
+the basic 68000 is not compatible with the 68881, a combination of the
+two can be specified, since it's possible to do emulation of the
+coprocessor instructions with the main processor.
+.IP "\fB\-m68851 | \-mno\-68851\fR" 4
+.IX Item "-m68851 | -mno-68851"
+The target machine does (or does not) have a memory-management
+unit coprocessor. The default is to assume an \s-1MMU\s0 for 68020 and up.
+.PP
+For details about the \s-1PDP\-11\s0 machine dependent features options,
+see \fBPDP\-11\-Options\fR.
+.IP "\fB\-mpic | \-mno\-pic\fR" 4
+.IX Item "-mpic | -mno-pic"
+Generate position-independent (or position-dependent) code. The
+default is \fB\-mpic\fR.
+.IP "\fB\-mall\fR" 4
+.IX Item "-mall"
+.PD 0
+.IP "\fB\-mall\-extensions\fR" 4
+.IX Item "-mall-extensions"
+.PD
+Enable all instruction set extensions. This is the default.
+.IP "\fB\-mno\-extensions\fR" 4
+.IX Item "-mno-extensions"
+Disable all instruction set extensions.
+.IP "\fB\-m\fR\fIextension\fR \fB| \-mno\-\fR\fIextension\fR" 4
+.IX Item "-mextension | -mno-extension"
+Enable (or disable) a particular instruction set extension.
+.IP "\fB\-m\fR\fIcpu\fR" 4
+.IX Item "-mcpu"
+Enable the instruction set extensions supported by a particular \s-1CPU\s0, and
+disable all other extensions.
+.IP "\fB\-m\fR\fImachine\fR" 4
+.IX Item "-mmachine"
+Enable the instruction set extensions supported by a particular machine
+model, and disable all other extensions.
+.PP
+The following options are available when as is configured for
+a picoJava processor.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Generate \*(L"little endian\*(R" format output.
+.PP
+The following options are available when as is configured for the
+Motorola 68HC11 or 68HC12 series.
+.IP "\fB\-m68hc11 | \-m68hc12 | \-m68hcs12\fR" 4
+.IX Item "-m68hc11 | -m68hc12 | -m68hcs12"
+Specify what processor is the target. The default is
+defined by the configuration option when building the assembler.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Specify to use the 16\-bit integer \s-1ABI\s0.
+.IP "\fB\-mlong\fR" 4
+.IX Item "-mlong"
+Specify to use the 32\-bit integer \s-1ABI\s0.
+.IP "\fB\-mshort\-double\fR" 4
+.IX Item "-mshort-double"
+Specify to use the 32\-bit double \s-1ABI\s0.
+.IP "\fB\-mlong\-double\fR" 4
+.IX Item "-mlong-double"
+Specify to use the 64\-bit double \s-1ABI\s0.
+.IP "\fB\-\-force\-long\-branches\fR" 4
+.IX Item "--force-long-branches"
+Relative branches are turned into absolute ones. This concerns
+conditional branches, unconditional branches and branches to a
+sub routine.
+.IP "\fB\-S | \-\-short\-branches\fR" 4
+.IX Item "-S | --short-branches"
+Do not turn relative branches into absolute ones
+when the offset is out of range.
+.IP "\fB\-\-strict\-direct\-mode\fR" 4
+.IX Item "--strict-direct-mode"
+Do not turn the direct addressing mode into extended addressing mode
+when the instruction does not support direct addressing mode.
+.IP "\fB\-\-print\-insn\-syntax\fR" 4
+.IX Item "--print-insn-syntax"
+Print the syntax of instruction in case of error.
+.IP "\fB\-\-print\-opcodes\fR" 4
+.IX Item "--print-opcodes"
+print the list of instructions with syntax and then exit.
+.IP "\fB\-\-generate\-example\fR" 4
+.IX Item "--generate-example"
+print an example of instruction for each possible instruction and then exit.
+This option is only useful for testing \fBas\fR.
+.PP
+The following options are available when \fBas\fR is configured
+for the \s-1SPARC\s0 architecture:
+.IP "\fB\-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite\fR" 4
+.IX Item "-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite"
+.PD 0
+.IP "\fB\-Av8plus | \-Av8plusa | \-Av9 | \-Av9a\fR" 4
+.IX Item "-Av8plus | -Av8plusa | -Av9 | -Av9a"
+.PD
+Explicitly select a variant of the \s-1SPARC\s0 architecture.
+.Sp
+\&\fB\-Av8plus\fR and \fB\-Av8plusa\fR select a 32 bit environment.
+\&\fB\-Av9\fR and \fB\-Av9a\fR select a 64 bit environment.
+.Sp
+\&\fB\-Av8plusa\fR and \fB\-Av9a\fR enable the \s-1SPARC\s0 V9 instruction set with
+UltraSPARC extensions.
+.IP "\fB\-xarch=v8plus | \-xarch=v8plusa\fR" 4
+.IX Item "-xarch=v8plus | -xarch=v8plusa"
+For compatibility with the Solaris v9 assembler. These options are
+equivalent to \-Av8plus and \-Av8plusa, respectively.
+.IP "\fB\-bump\fR" 4
+.IX Item "-bump"
+Warn when the assembler switches to another architecture.
+.PP
+The following options are available when as is configured for the 'c54x
+architecture.
+.IP "\fB\-mfar\-mode\fR" 4
+.IX Item "-mfar-mode"
+Enable extended addressing mode. All addresses and relocations will assume
+extended addressing (usually 23 bits).
+.IP "\fB\-mcpu=\fR\fI\s-1CPU_VERSION\s0\fR" 4
+.IX Item "-mcpu=CPU_VERSION"
+Sets the \s-1CPU\s0 version being compiled for.
+.IP "\fB\-merrors\-to\-file\fR \fI\s-1FILENAME\s0\fR" 4
+.IX Item "-merrors-to-file FILENAME"
+Redirect error output to a file, for broken systems which don't support such
+behaviour in the shell.
+.PP
+The following options are available when as is configured for
+a \s-1MIPS\s0 processor.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+This option sets the largest size of an object that can be referenced
+implicitly with the \f(CW\*(C`gp\*(C'\fR register. It is only accepted for targets that
+use \s-1ECOFF\s0 format, such as a DECstation running Ultrix. The default value is 8.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate \*(L"little endian\*(R" format output.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+.PD 0
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+.IP "\fB\-mips5\fR" 4
+.IX Item "-mips5"
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+.PD
+Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level.
+\&\fB\-mips1\fR is an alias for \fB\-march=r3000\fR, \fB\-mips2\fR is an
+alias for \fB\-march=r6000\fR, \fB\-mips3\fR is an alias for
+\&\fB\-march=r4000\fR and \fB\-mips4\fR is an alias for \fB\-march=r8000\fR.
+\&\fB\-mips5\fR, \fB\-mips32\fR, \fB\-mips32r2\fR, \fB\-mips64\fR, and
+\&\fB\-mips64r2\fR
+correspond to generic
+\&\fB\s-1MIPS\s0 V\fR, \fB\s-1MIPS32\s0\fR, \fB\s-1MIPS32\s0 Release 2\fR, \fB\s-1MIPS64\s0\fR,
+and \fB\s-1MIPS64\s0 Release 2\fR
+\&\s-1ISA\s0 processors, respectively.
+.IP "\fB\-march=\fR\fI\s-1CPU\s0\fR" 4
+.IX Item "-march=CPU"
+Generate code for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mtune=\fR\fIcpu\fR" 4
+.IX Item "-mtune=cpu"
+Schedule and tune for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mfix7000\fR" 4
+.IX Item "-mfix7000"
+.PD 0
+.IP "\fB\-mno\-fix7000\fR" 4
+.IX Item "-mno-fix7000"
+.PD
+Cause nops to be inserted if the read of the destination register
+of an mfhi or mflo instruction occurs in the following two instructions.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-no\-mdebug\fR" 4
+.IX Item "-no-mdebug"
+.PD
+Cause stabs-style debugging output to go into an ECOFF-style .mdebug
+section instead of the standard \s-1ELF\s0 .stabs sections.
+.IP "\fB\-mpdr\fR" 4
+.IX Item "-mpdr"
+.PD 0
+.IP "\fB\-mno\-pdr\fR" 4
+.IX Item "-mno-pdr"
+.PD
+Control generation of \f(CW\*(C`.pdr\*(C'\fR sections.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+.PD 0
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+.PD
+The register sizes are normally inferred from the \s-1ISA\s0 and \s-1ABI\s0, but these
+flags force a certain group of registers to be treated as 32 bits wide at
+all times. \fB\-mgp32\fR controls the size of general-purpose registers
+and \fB\-mfp32\fR controls the size of floating-point registers.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-no\-mips16\fR" 4
+.IX Item "-no-mips16"
+.PD
+Generate code for the \s-1MIPS\s0 16 processor. This is equivalent to putting
+\&\f(CW\*(C`.set mips16\*(C'\fR at the start of the assembly file. \fB\-no\-mips16\fR
+turns off this option.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Enables the SmartMIPS extension to the \s-1MIPS32\s0 instruction set. This is
+equivalent to putting \f(CW\*(C`.set smartmips\*(C'\fR at the start of the assembly file.
+\&\fB\-mno\-smartmips\fR turns off this option.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-no\-mips3d\fR" 4
+.IX Item "-no-mips3d"
+.PD
+Generate code for the \s-1MIPS\-3D\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MIPS\-3D\s0 instructions.
+\&\fB\-no\-mips3d\fR turns off this option.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-no\-mdmx\fR" 4
+.IX Item "-no-mdmx"
+.PD
+Generate code for the \s-1MDMX\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MDMX\s0 instructions.
+\&\fB\-no\-mdmx\fR turns off this option.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Generate code for the \s-1DSP\s0 Release 1 Application Specific Extension.
+This tells the assembler to accept \s-1DSP\s0 Release 1 instructions.
+\&\fB\-mno\-dsp\fR turns off this option.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Generate code for the \s-1DSP\s0 Release 2 Application Specific Extension.
+This option implies \-mdsp.
+This tells the assembler to accept \s-1DSP\s0 Release 2 instructions.
+\&\fB\-mno\-dspr2\fR turns off this option.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Generate code for the \s-1MT\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MT\s0 instructions.
+\&\fB\-mno\-mt\fR turns off this option.
+.IP "\fB\-\-construct\-floats\fR" 4
+.IX Item "--construct-floats"
+.PD 0
+.IP "\fB\-\-no\-construct\-floats\fR" 4
+.IX Item "--no-construct-floats"
+.PD
+The \fB\-\-no\-construct\-floats\fR option disables the construction of
+double width floating point constants by loading the two halves of the
+value into the two single width floating point registers that make up
+the double width register. By default \fB\-\-construct\-floats\fR is
+selected, allowing construction of these floating point constants.
+.IP "\fB\-\-emulation=\fR\fIname\fR" 4
+.IX Item "--emulation=name"
+This option causes \fBas\fR to emulate \fBas\fR configured
+for some other target, in all respects, including output format (choosing
+between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate
+debugging information or store symbol table information, and default
+endianness. The available configuration names are: \fBmipsecoff\fR,
+\&\fBmipself\fR, \fBmipslecoff\fR, \fBmipsbecoff\fR, \fBmipslelf\fR,
+\&\fBmipsbelf\fR. The first two do not alter the default endianness from that
+of the primary target for which the assembler was configured; the others change
+the default to little\- or big-endian as indicated by the \fBb\fR or \fBl\fR
+in the name. Using \fB\-EB\fR or \fB\-EL\fR will override the endianness
+selection in any case.
+.Sp
+This option is currently supported only when the primary target
+\&\fBas\fR is configured for is a \s-1MIPS\s0 \s-1ELF\s0 or \s-1ECOFF\s0 target.
+Furthermore, the primary target or others specified with
+\&\fB\-\-enable\-targets=...\fR at configuration time must include support for
+the other format, if both are to be available. For example, the Irix 5
+configuration includes support for both.
+.Sp
+Eventually, this option will support more configurations, with more
+fine-grained control over the assembler's behavior, and will be supported for
+more processors.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+\&\fBas\fR ignores this option. It is accepted for compatibility with
+the native tools.
+.IP "\fB\-\-trap\fR" 4
+.IX Item "--trap"
+.PD 0
+.IP "\fB\-\-no\-trap\fR" 4
+.IX Item "--no-trap"
+.IP "\fB\-\-break\fR" 4
+.IX Item "--break"
+.IP "\fB\-\-no\-break\fR" 4
+.IX Item "--no-break"
+.PD
+Control how to deal with multiplication overflow and division by zero.
+\&\fB\-\-trap\fR or \fB\-\-no\-break\fR (which are synonyms) take a trap exception
+(and only work for Instruction Set Architecture level 2 and higher);
+\&\fB\-\-break\fR or \fB\-\-no\-trap\fR (also synonyms, and the default) take a
+break exception.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+When this option is used, \fBas\fR will issue a warning every
+time it generates a nop instruction from a macro.
+.PP
+The following options are available when as is configured for
+an MCore processor.
+.IP "\fB\-jsri2bsr\fR" 4
+.IX Item "-jsri2bsr"
+.PD 0
+.IP "\fB\-nojsri2bsr\fR" 4
+.IX Item "-nojsri2bsr"
+.PD
+Enable or disable the \s-1JSRI\s0 to \s-1BSR\s0 transformation. By default this is enabled.
+The command line option \fB\-nojsri2bsr\fR can be used to disable it.
+.IP "\fB\-sifilter\fR" 4
+.IX Item "-sifilter"
+.PD 0
+.IP "\fB\-nosifilter\fR" 4
+.IX Item "-nosifilter"
+.PD
+Enable or disable the silicon filter behaviour. By default this is disabled.
+The default can be overridden by the \fB\-sifilter\fR command line option.
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Alter jump instructions for long displacements.
+.IP "\fB\-mcpu=[210|340]\fR" 4
+.IX Item "-mcpu=[210|340]"
+Select the cpu type on the target hardware. This controls which instructions
+can be assembled.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Assemble for a big endian target.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Assemble for a little endian target.
+.PP
+See the info pages for documentation of the MMIX-specific options.
+.PP
+The following options are available when as is configured for the s390
+processor family.
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Select the word size, either 31/32 bits or 64 bits.
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD 0
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD
+Select the architecture mode, either the Enterprise System
+Architecture (esa) or the z/Architecture mode (zarch).
+.IP "\fB\-march=\fR\fIprocessor\fR" 4
+.IX Item "-march=processor"
+Specify which s390 processor variant is the target, \fBg6\fR, \fBg6\fR,
+\&\fBz900\fR, \fBz990\fR, \fBz9\-109\fR, \fBz9\-ec\fR, or \fBz10\fR.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+Allow or disallow symbolic names for registers.
+.IP "\fB\-mwarn\-areg\-zero\fR" 4
+.IX Item "-mwarn-areg-zero"
+Warn whenever the operand for a base or index register has been specified
+but evaluates to zero.
+.PP
+The following options are available when as is configured for
+an Xtensa processor.
+.IP "\fB\-\-text\-section\-literals | \-\-no\-text\-section\-literals\fR" 4
+.IX Item "--text-section-literals | --no-text-section-literals"
+With \fB\-\-text\-section\-literals\fR, literal pools are interspersed
+in the text section. The default is
+\&\fB\-\-no\-text\-section\-literals\fR, which places literals in a
+separate section in the output file. These options only affect literals
+referenced via PC-relative \f(CW\*(C`L32R\*(C'\fR instructions; literals for
+absolute mode \f(CW\*(C`L32R\*(C'\fR instructions are handled separately.
+.IP "\fB\-\-absolute\-literals | \-\-no\-absolute\-literals\fR" 4
+.IX Item "--absolute-literals | --no-absolute-literals"
+Indicate to the assembler whether \f(CW\*(C`L32R\*(C'\fR instructions use absolute
+or PC-relative addressing. The default is to assume absolute addressing
+if the Xtensa processor includes the absolute \f(CW\*(C`L32R\*(C'\fR addressing
+option. Otherwise, only the PC-relative \f(CW\*(C`L32R\*(C'\fR mode can be used.
+.IP "\fB\-\-target\-align | \-\-no\-target\-align\fR" 4
+.IX Item "--target-align | --no-target-align"
+Enable or disable automatic alignment to reduce branch penalties at the
+expense of some code density. The default is \fB\-\-target\-align\fR.
+.IP "\fB\-\-longcalls | \-\-no\-longcalls\fR" 4
+.IX Item "--longcalls | --no-longcalls"
+Enable or disable transformation of call instructions to allow calls
+across a greater range of addresses. The default is
+\&\fB\-\-no\-longcalls\fR.
+.IP "\fB\-\-transform | \-\-no\-transform\fR" 4
+.IX Item "--transform | --no-transform"
+Enable or disable all assembler transformations of Xtensa instructions.
+The default is \fB\-\-transform\fR;
+\&\fB\-\-no\-transform\fR should be used only in the rare cases when the
+instructions must be exactly as specified in the assembly source.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR" 4
+.IX Item "--rename-section oldname=newname"
+When generating output sections, rename the \fIoldname\fR section to
+\&\fInewname\fR.
+.PP
+The following options are available when as is configured for
+a Z80 family processor.
+.IP "\fB\-z80\fR" 4
+.IX Item "-z80"
+Assemble for Z80 processor.
+.IP "\fB\-r800\fR" 4
+.IX Item "-r800"
+Assemble for R800 processor.
+.IP "\fB\-ignore\-undocumented\-instructions\fR" 4
+.IX Item "-ignore-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wnud\fR" 4
+.IX Item "-Wnud"
+.PD
+Assemble undocumented Z80 instructions that also work on R800 without warning.
+.IP "\fB\-ignore\-unportable\-instructions\fR" 4
+.IX Item "-ignore-unportable-instructions"
+.PD 0
+.IP "\fB\-Wnup\fR" 4
+.IX Item "-Wnup"
+.PD
+Assemble all undocumented Z80 instructions without warning.
+.IP "\fB\-warn\-undocumented\-instructions\fR" 4
+.IX Item "-warn-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wud\fR" 4
+.IX Item "-Wud"
+.PD
+Issue a warning for undocumented Z80 instructions that also work on R800.
+.IP "\fB\-warn\-unportable\-instructions\fR" 4
+.IX Item "-warn-unportable-instructions"
+.PD 0
+.IP "\fB\-Wup\fR" 4
+.IX Item "-Wup"
+.PD
+Issue a warning for undocumented Z80 instructions that do not work on R800.
+.IP "\fB\-forbid\-undocumented\-instructions\fR" 4
+.IX Item "-forbid-undocumented-instructions"
+.PD 0
+.IP "\fB\-Fud\fR" 4
+.IX Item "-Fud"
+.PD
+Treat all undocumented instructions as errors.
+.IP "\fB\-forbid\-unportable\-instructions\fR" 4
+.IX Item "-forbid-unportable-instructions"
+.PD 0
+.IP "\fB\-Fup\fR" 4
+.IX Item "-Fup"
+.PD
+Treat undocumented Z80 instructions that do not work on R800 as errors.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1
new file mode 100644
index 0000000..76c7e0d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-c++filt.1
@@ -0,0 +1,345 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "C++FILT 1"
+.TH C++FILT 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+c++filt \- Demangle C++ and Java symbols.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+c++filt [\fB\-_\fR|\fB\-\-strip\-underscores\fR]
+ [\fB\-n\fR|\fB\-\-no\-strip\-underscores\fR]
+ [\fB\-p\fR|\fB\-\-no\-params\fR]
+ [\fB\-t\fR|\fB\-\-types\fR]
+ [\fB\-i\fR|\fB\-\-no\-verbose\fR]
+ [\fB\-s\fR \fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+ [\fB\-\-help\fR] [\fB\-\-version\fR] [\fIsymbol\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \*(C+ and Java languages provide function overloading, which means
+that you can write many functions with the same name, providing that
+each function takes parameters of different types. In order to be
+able to distinguish these similarly named functions \*(C+ and Java
+encode them into a low-level assembler name which uniquely identifies
+each different version. This process is known as \fImangling\fR. The
+\&\fBc++filt\fR
+[1]
+program does the inverse mapping: it decodes (\fIdemangles\fR) low-level
+names into user-level names so that they can be read.
+.PP
+Every alphanumeric word (consisting of letters, digits, underscores,
+dollars, or periods) seen in the input is a potential mangled name.
+If the name decodes into a \*(C+ name, the \*(C+ name replaces the
+low-level name in the output, otherwise the original word is output.
+In this way you can pass an entire assembler source file, containing
+mangled names, through \fBc++filt\fR and see the same source file
+containing demangled names.
+.PP
+You can also use \fBc++filt\fR to decipher individual symbols by
+passing them on the command line:
+.PP
+.Vb 1
+\& c++filt <symbol>
+.Ve
+.PP
+If no \fIsymbol\fR arguments are given, \fBc++filt\fR reads symbol
+names from the standard input instead. All the results are printed on
+the standard output. The difference between reading names from the
+command line versus reading names from the standard input is that
+command line arguments are expected to be just mangled names and no
+checking is performed to separate them from surrounding text. Thus
+for example:
+.PP
+.Vb 1
+\& c++filt \-n _Z1fv
+.Ve
+.PP
+will work and demangle the name to \*(L"f()\*(R" whereas:
+.PP
+.Vb 1
+\& c++filt \-n _Z1fv,
+.Ve
+.PP
+will not work. (Note the extra comma at the end of the mangled
+name which makes it invalid). This command however will work:
+.PP
+.Vb 1
+\& echo _Z1fv, | c++filt \-n
+.Ve
+.PP
+and will display \*(L"f(),\*(R", i.e., the demangled name followed by a
+trailing comma. This behaviour is because when the names are read
+from the standard input it is expected that they might be part of an
+assembler source file where there might be extra, extraneous
+characters trailing after a mangled name. For example:
+.PP
+.Vb 1
+\& .type _Z1fv, @function
+.Ve
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-_\fR" 4
+.IX Item "-_"
+.PD 0
+.IP "\fB\-\-strip\-underscores\fR" 4
+.IX Item "--strip-underscores"
+.PD
+On some systems, both the C and \*(C+ compilers put an underscore in front
+of every name. For example, the C name \f(CW\*(C`foo\*(C'\fR gets the low-level
+name \f(CW\*(C`_foo\*(C'\fR. This option removes the initial underscore. Whether
+\&\fBc++filt\fR removes the underscore by default is target dependent.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-strip\-underscores\fR" 4
+.IX Item "--no-strip-underscores"
+.PD
+Do not remove the initial underscore.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-params\fR" 4
+.IX Item "--no-params"
+.PD
+When demangling the name of a function, do not display the types of
+the function's parameters.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-types\fR" 4
+.IX Item "--types"
+.PD
+Attempt to demangle types as well as function names. This is disabled
+by default since mangled types are normally only used internally in
+the compiler, and they can be confused with non-mangled names. For example,
+a function called \*(L"a\*(R" treated as a mangled type name would be
+demangled to \*(L"signed char\*(R".
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-no\-verbose\fR" 4
+.IX Item "--no-verbose"
+.PD
+Do not include implementation details (if any) in the demangled
+output.
+.IP "\fB\-s\fR \fIformat\fR" 4
+.IX Item "-s format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+\&\fBc++filt\fR can decode various methods of mangling, used by
+different compilers. The argument to this option selects which
+method it uses:
+.RS 4
+.ie n .IP """auto""" 4
+.el .IP "\f(CWauto\fR" 4
+.IX Item "auto"
+Automatic selection based on executable (the default method)
+.ie n .IP """gnu""" 4
+.el .IP "\f(CWgnu\fR" 4
+.IX Item "gnu"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++)
+.ie n .IP """lucid""" 4
+.el .IP "\f(CWlucid\fR" 4
+.IX Item "lucid"
+the one used by the Lucid compiler (lcc)
+.ie n .IP """arm""" 4
+.el .IP "\f(CWarm\fR" 4
+.IX Item "arm"
+the one specified by the \*(C+ Annotated Reference Manual
+.ie n .IP """hp""" 4
+.el .IP "\f(CWhp\fR" 4
+.IX Item "hp"
+the one used by the \s-1HP\s0 compiler (aCC)
+.ie n .IP """edg""" 4
+.el .IP "\f(CWedg\fR" 4
+.IX Item "edg"
+the one used by the \s-1EDG\s0 compiler
+.ie n .IP """gnu\-v3""" 4
+.el .IP "\f(CWgnu\-v3\fR" 4
+.IX Item "gnu-v3"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++) with the V3 \s-1ABI\s0.
+.ie n .IP """java""" 4
+.el .IP "\f(CWjava\fR" 4
+.IX Item "java"
+the one used by the \s-1GNU\s0 Java compiler (gcj)
+.ie n .IP """gnat""" 4
+.el .IP "\f(CWgnat\fR" 4
+.IX Item "gnat"
+the one used by the \s-1GNU\s0 Ada compiler (\s-1GNAT\s0).
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the options to \fBc++filt\fR and exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the version number of \fBc++filt\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+MS-DOS does not allow \f(CW\*(C`+\*(C'\fR characters in file names, so on
+MS-DOS this program is named \fB\s-1CXXFILT\s0\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1
new file mode 100644
index 0000000..5d9dd27
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-dlltool.1
@@ -0,0 +1,529 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
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+.\" ========================================================================
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+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
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+.ft CW
+.nf
+.ne \\$1
+..
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+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
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+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
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+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
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+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
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+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
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+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "DLLTOOL 1"
+.TH DLLTOOL 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+dlltool \- Create files needed to build and use DLLs.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+dlltool [\fB\-d\fR|\fB\-\-input\-def\fR \fIdef-file-name\fR]
+ [\fB\-b\fR|\fB\-\-base\-file\fR \fIbase-file-name\fR]
+ [\fB\-e\fR|\fB\-\-output\-exp\fR \fIexports-file-name\fR]
+ [\fB\-z\fR|\fB\-\-output\-def\fR \fIdef-file-name\fR]
+ [\fB\-l\fR|\fB\-\-output\-lib\fR \fIlibrary-file-name\fR]
+ [\fB\-y\fR|\fB\-\-output\-delaylib\fR \fIlibrary-file-name\fR]
+ [\fB\-\-export\-all\-symbols\fR] [\fB\-\-no\-export\-all\-symbols\fR]
+ [\fB\-\-exclude\-symbols\fR \fIlist\fR]
+ [\fB\-\-no\-default\-excludes\fR]
+ [\fB\-S\fR|\fB\-\-as\fR \fIpath-to-assembler\fR] [\fB\-f\fR|\fB\-\-as\-flags\fR \fIoptions\fR]
+ [\fB\-D\fR|\fB\-\-dllname\fR \fIname\fR] [\fB\-m\fR|\fB\-\-machine\fR \fImachine\fR]
+ [\fB\-a\fR|\fB\-\-add\-indirect\fR]
+ [\fB\-U\fR|\fB\-\-add\-underscore\fR] [\fB\-\-add\-stdcall\-underscore\fR]
+ [\fB\-k\fR|\fB\-\-kill\-at\fR] [\fB\-A\fR|\fB\-\-add\-stdcall\-alias\fR]
+ [\fB\-p\fR|\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR]
+ [\fB\-x\fR|\fB\-\-no\-idata4\fR] [\fB\-c\fR|\fB\-\-no\-idata5\fR]
+ [\fB\-\-use\-nul\-prefixed\-import\-tables\fR]
+ [\fB\-I\fR|\fB\-\-identify\fR \fIlibrary-file-name\fR] [\fB\-\-identify\-strict\fR]
+ [\fB\-i\fR|\fB\-\-interwork\fR]
+ [\fB\-n\fR|\fB\-\-nodelete\fR] [\fB\-t\fR|\fB\-\-temp\-prefix\fR \fIprefix\fR]
+ [\fB\-v\fR|\fB\-\-verbose\fR]
+ [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [object\-file ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBdlltool\fR reads its inputs, which can come from the \fB\-d\fR and
+\&\fB\-b\fR options as well as object files specified on the command
+line. It then processes these inputs and if the \fB\-e\fR option has
+been specified it creates a exports file. If the \fB\-l\fR option
+has been specified it creates a library file and if the \fB\-z\fR option
+has been specified it creates a def file. Any or all of the \fB\-e\fR,
+\&\fB\-l\fR and \fB\-z\fR options can be present in one invocation of
+dlltool.
+.PP
+When creating a \s-1DLL\s0, along with the source for the \s-1DLL\s0, it is necessary
+to have three other files. \fBdlltool\fR can help with the creation of
+these files.
+.PP
+The first file is a \fI.def\fR file which specifies which functions are
+exported from the \s-1DLL\s0, which functions the \s-1DLL\s0 imports, and so on. This
+is a text file and can be created by hand, or \fBdlltool\fR can be used
+to create it using the \fB\-z\fR option. In this case \fBdlltool\fR
+will scan the object files specified on its command line looking for
+those functions which have been specially marked as being exported and
+put entries for them in the \fI.def\fR file it creates.
+.PP
+In order to mark a function as being exported from a \s-1DLL\s0, it needs to
+have an \fB\-export:<name_of_function>\fR entry in the \fB.drectve\fR
+section of the object file. This can be done in C by using the
+\&\fIasm()\fR operator:
+.PP
+.Vb 2
+\& asm (".section .drectve");
+\& asm (".ascii \e"\-export:my_func\e"");
+\&
+\& int my_func (void) { ... }
+.Ve
+.PP
+The second file needed for \s-1DLL\s0 creation is an exports file. This file
+is linked with the object files that make up the body of the \s-1DLL\s0 and it
+handles the interface between the \s-1DLL\s0 and the outside world. This is a
+binary file and it can be created by giving the \fB\-e\fR option to
+\&\fBdlltool\fR when it is creating or reading in a \fI.def\fR file.
+.PP
+The third file needed for \s-1DLL\s0 creation is the library file that programs
+will link with in order to access the functions in the \s-1DLL\s0 (an `import
+library'). This file can be created by giving the \fB\-l\fR option to
+dlltool when it is creating or reading in a \fI.def\fR file.
+.PP
+If the \fB\-y\fR option is specified, dlltool generates a delay-import
+library that can be used instead of the normal import library to allow
+a program to link to the dll only as soon as an imported function is
+called for the first time. The resulting executable will need to be
+linked to the static delayimp library containing _\|\fI_delayLoadHelper2()\fR,
+which in turn will import LoadLibraryA and GetProcAddress from kernel32.
+.PP
+\&\fBdlltool\fR builds the library file by hand, but it builds the
+exports file by creating temporary files containing assembler statements
+and then assembling these. The \fB\-S\fR command line option can be
+used to specify the path to the assembler that dlltool will use,
+and the \fB\-f\fR option can be used to pass specific flags to that
+assembler. The \fB\-n\fR can be used to prevent dlltool from deleting
+these temporary assembler files when it is done, and if \fB\-n\fR is
+specified twice then this will prevent dlltool from deleting the
+temporary object files it used to build the library.
+.PP
+Here is an example of creating a \s-1DLL\s0 from a source file \fBdll.c\fR and
+also creating a program (from an object file called \fBprogram.o\fR)
+that uses that \s-1DLL:\s0
+.PP
+.Vb 4
+\& gcc \-c dll.c
+\& dlltool \-e exports.o \-l dll.lib dll.o
+\& gcc dll.o exports.o \-o dll.dll
+\& gcc program.o dll.lib \-o program
+.Ve
+.PP
+\&\fBdlltool\fR may also be used to query an existing import library
+to determine the name of the \s-1DLL\s0 to which it is associated. See the
+description of the \fB\-I\fR or \fB\-\-identify\fR option.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-d\fR \fIfilename\fR" 4
+.IX Item "-d filename"
+.PD 0
+.IP "\fB\-\-input\-def\fR \fIfilename\fR" 4
+.IX Item "--input-def filename"
+.PD
+Specifies the name of a \fI.def\fR file to be read in and processed.
+.IP "\fB\-b\fR \fIfilename\fR" 4
+.IX Item "-b filename"
+.PD 0
+.IP "\fB\-\-base\-file\fR \fIfilename\fR" 4
+.IX Item "--base-file filename"
+.PD
+Specifies the name of a base file to be read in and processed. The
+contents of this file will be added to the relocation section in the
+exports file generated by dlltool.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-output\-exp\fR \fIfilename\fR" 4
+.IX Item "--output-exp filename"
+.PD
+Specifies the name of the export file to be created by dlltool.
+.IP "\fB\-z\fR \fIfilename\fR" 4
+.IX Item "-z filename"
+.PD 0
+.IP "\fB\-\-output\-def\fR \fIfilename\fR" 4
+.IX Item "--output-def filename"
+.PD
+Specifies the name of the \fI.def\fR file to be created by dlltool.
+.IP "\fB\-l\fR \fIfilename\fR" 4
+.IX Item "-l filename"
+.PD 0
+.IP "\fB\-\-output\-lib\fR \fIfilename\fR" 4
+.IX Item "--output-lib filename"
+.PD
+Specifies the name of the library file to be created by dlltool.
+.IP "\fB\-y\fR \fIfilename\fR" 4
+.IX Item "-y filename"
+.PD 0
+.IP "\fB\-\-output\-delaylib\fR \fIfilename\fR" 4
+.IX Item "--output-delaylib filename"
+.PD
+Specifies the name of the delay-import library file to be created by dlltool.
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+Treat all global and weak defined symbols found in the input object
+files as symbols to be exported. There is a small list of symbols which
+are not exported by default; see the \fB\-\-no\-default\-excludes\fR
+option. You may add to the list of symbols to not export by using the
+\&\fB\-\-exclude\-symbols\fR option.
+.IP "\fB\-\-no\-export\-all\-symbols\fR" 4
+.IX Item "--no-export-all-symbols"
+Only export symbols explicitly listed in an input \fI.def\fR file or in
+\&\fB.drectve\fR sections in the input object files. This is the default
+behaviour. The \fB.drectve\fR sections are created by \fBdllexport\fR
+attributes in the source code.
+.IP "\fB\-\-exclude\-symbols\fR \fIlist\fR" 4
+.IX Item "--exclude-symbols list"
+Do not export the symbols in \fIlist\fR. This is a list of symbol names
+separated by comma or colon characters. The symbol names should not
+contain a leading underscore. This is only meaningful when
+\&\fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-\-no\-default\-excludes\fR" 4
+.IX Item "--no-default-excludes"
+When \fB\-\-export\-all\-symbols\fR is used, it will by default avoid
+exporting certain special symbols. The current list of symbols to avoid
+exporting is \fBDllMain@12\fR, \fBDllEntryPoint@0\fR,
+\&\fBimpure_ptr\fR. You may use the \fB\-\-no\-default\-excludes\fR option
+to go ahead and export these special symbols. This is only meaningful
+when \fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-S\fR \fIpath\fR" 4
+.IX Item "-S path"
+.PD 0
+.IP "\fB\-\-as\fR \fIpath\fR" 4
+.IX Item "--as path"
+.PD
+Specifies the path, including the filename, of the assembler to be used
+to create the exports file.
+.IP "\fB\-f\fR \fIoptions\fR" 4
+.IX Item "-f options"
+.PD 0
+.IP "\fB\-\-as\-flags\fR \fIoptions\fR" 4
+.IX Item "--as-flags options"
+.PD
+Specifies any specific command line options to be passed to the
+assembler when building the exports file. This option will work even if
+the \fB\-S\fR option is not used. This option only takes one argument,
+and if it occurs more than once on the command line, then later
+occurrences will override earlier occurrences. So if it is necessary to
+pass multiple options to the assembler they should be enclosed in
+double quotes.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+.PD 0
+.IP "\fB\-\-dll\-name\fR \fIname\fR" 4
+.IX Item "--dll-name name"
+.PD
+Specifies the name to be stored in the \fI.def\fR file as the name of
+the \s-1DLL\s0 when the \fB\-e\fR option is used. If this option is not
+present, then the filename given to the \fB\-e\fR option will be
+used as the name of the \s-1DLL\s0.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-machine\fR \fImachine\fR" 4
+.IX Item "-machine machine"
+.PD
+Specifies the type of machine for which the library file should be
+built. \fBdlltool\fR has a built in default type, depending upon how
+it was created, but this option can be used to override that. This is
+normally only useful when creating DLLs for an \s-1ARM\s0 processor, when the
+contents of the \s-1DLL\s0 are actually encode using Thumb instructions.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-add\-indirect\fR" 4
+.IX Item "--add-indirect"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add a section which allows the exported functions to be
+referenced without using the import library. Whatever the hell that
+means!
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-add\-underscore\fR" 4
+.IX Item "--add-underscore"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of \fIall\fR exported symbols.
+.IP "\fB\-\-add\-stdcall\-underscore\fR" 4
+.IX Item "--add-stdcall-underscore"
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of exported \fIstdcall\fR
+functions. Variable names and non-stdcall function names are not modified.
+This option is useful when creating GNU-compatible import libs for third
+party DLLs that were built with MS-Windows tools.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+.PD 0
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should not append the string \fB@ <number>\fR. These numbers are
+called ordinal numbers and they represent another way of accessing the
+function in a \s-1DLL\s0, other than by name.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add aliases for stdcall symbols without \fB@ <number>\fR
+in addition to the symbols with \fB@ <number>\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR" 4
+.IX Item "--ext-prefix-alias prefix"
+.PD
+Causes \fBdlltool\fR to create external aliases for all \s-1DLL\s0
+imports with the specified prefix. The aliases are created for both
+external and import symbols with no leading underscore.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-no\-idata4\fR" 4
+.IX Item "--no-idata4"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata4\*(C'\fR section. This is for compatibility
+with certain operating systems.
+.IP "\fB\-\-use\-nul\-prefixed\-import\-tables\fR" 4
+.IX Item "--use-nul-prefixed-import-tables"
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should prefix the \f(CW\*(C`.idata4\*(C'\fR and \f(CW\*(C`.idata5\*(C'\fR by zero an
+element. This emulates old gnu import library generation of
+\&\f(CW\*(C`dlltool\*(C'\fR. By default this option is turned off.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-no\-idata5\fR" 4
+.IX Item "--no-idata5"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata5\*(C'\fR section. This is for compatibility
+with certain operating systems.
+.IP "\fB\-I\fR \fIfilename\fR" 4
+.IX Item "-I filename"
+.PD 0
+.IP "\fB\-\-identify\fR \fIfilename\fR" 4
+.IX Item "--identify filename"
+.PD
+Specifies that \fBdlltool\fR should inspect the import library
+indicated by \fIfilename\fR and report, on \f(CW\*(C`stdout\*(C'\fR, the name(s)
+of the associated \s-1DLL\s0(s). This can be performed in addition to any
+other operations indicated by the other options and arguments.
+\&\fBdlltool\fR fails if the import library does not exist or is not
+actually an import library. See also \fB\-\-identify\-strict\fR.
+.IP "\fB\-\-identify\-strict\fR" 4
+.IX Item "--identify-strict"
+Modifies the behavior of the \fB\-\-identify\fR option, such
+that an error is reported if \fIfilename\fR is associated with
+more than one \s-1DLL\s0.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-interwork\fR" 4
+.IX Item "--interwork"
+.PD
+Specifies that \fBdlltool\fR should mark the objects in the library
+file and exports file that it produces as supporting interworking
+between \s-1ARM\s0 and Thumb code.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nodelete\fR" 4
+.IX Item "--nodelete"
+.PD
+Makes \fBdlltool\fR preserve the temporary assembler files it used to
+create the exports file. If this option is repeated then dlltool will
+also preserve the temporary object files it uses to create the library
+file.
+.IP "\fB\-t\fR \fIprefix\fR" 4
+.IX Item "-t prefix"
+.PD 0
+.IP "\fB\-\-temp\-prefix\fR \fIprefix\fR" 4
+.IX Item "--temp-prefix prefix"
+.PD
+Makes \fBdlltool\fR use \fIprefix\fR when constructing the names of
+temporary assembler and object files. By default, the temp file prefix
+is generated from the pid.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Make dlltool describe what it is doing.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Displays dlltool's version number and then exits.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+The Info pages for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1
new file mode 100644
index 0000000..548b46d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdb.1
@@ -0,0 +1,381 @@
+.\" Copyright (C) 1991, 1999, 2010 Free Software Foundation, Inc.
+.\" See section COPYING for conditions for redistribution
+.\" $Id: gdb.1,v 1.4 1999/01/05 00:50:50 jsm Exp $
+.TH gdb 1 "22may2002" "GNU Tools" "GNU Tools"
+.SH NAME
+gdb \- The GNU Debugger
+.SH SYNOPSIS
+.na
+.TP
+.B gdb
+.RB "[\|" \-help "\|]"
+.RB "[\|" \-nx "\|]"
+.RB "[\|" \-q "\|]"
+.RB "[\|" \-batch "\|]"
+.RB "[\|" \-cd=\c
+.I dir\c
+\|]
+.RB "[\|" \-f "\|]"
+.RB "[\|" "\-b\ "\c
+.IR bps "\|]"
+.RB "[\|" "\-tty="\c
+.IR dev "\|]"
+.RB "[\|" "\-s "\c
+.I symfile\c
+\&\|]
+.RB "[\|" "\-e "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-se "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-c "\c
+.I core\c
+\&\|]
+.RB "[\|" "\-x "\c
+.I cmds\c
+\&\|]
+.RB "[\|" "\-d "\c
+.I dir\c
+\&\|]
+.RB "[\|" \c
+.I prog\c
+.RB "[\|" \c
+.IR core \||\| procID\c
+\&\|]\&\|]
+.ad b
+.SH DESCRIPTION
+The purpose of a debugger such as GDB is to allow you to see what is
+going on ``inside'' another program while it executes\(em\&or what another
+program was doing at the moment it crashed.
+
+GDB can do four main kinds of things (plus other things in support of
+these) to help you catch bugs in the act:
+
+.TP
+\ \ \ \(bu
+Start your program, specifying anything that might affect its behavior.
+
+.TP
+\ \ \ \(bu
+Make your program stop on specified conditions.
+
+.TP
+\ \ \ \(bu
+Examine what has happened, when your program has stopped.
+
+.TP
+\ \ \ \(bu
+Change things in your program, so you can experiment with correcting the
+effects of one bug and go on to learn about another.
+.PP
+
+You can use GDB to debug programs written in C, C++, and Modula-2.
+Fortran support will be added when a GNU Fortran compiler is ready.
+
+GDB is invoked with the shell command \c
+.B gdb\c
+\&. Once started, it reads
+commands from the terminal until you tell it to exit with the GDB
+command \c
+.B quit\c
+\&. You can get online help from \c
+.B gdb\c
+\& itself
+by using the command \c
+.B help\c
+\&.
+
+You can run \c
+.B gdb\c
+\& with no arguments or options; but the most
+usual way to start GDB is with one argument or two, specifying an
+executable program as the argument:
+.sp
+.br
+gdb\ program
+.br
+.sp
+
+You can also start with both an executable program and a core file specified:
+.sp
+.br
+gdb\ program\ core
+.br
+.sp
+
+You can, instead, specify a process ID as a second argument, if you want
+to debug a running process:
+.sp
+.br
+gdb\ program\ 1234
+.br
+.sp
+
+would attach GDB to process \c
+.B 1234\c
+\& (unless you also have a file
+named `\|\c
+.B 1234\c
+\&\|'; GDB does check for a core file first).
+
+Here are some of the most frequently needed GDB commands:
+.TP
+.B break \fR[\|\fIfile\fB:\fR\|]\fIfunction
+\&
+Set a breakpoint at \c
+.I function\c
+\& (in \c
+.I file\c
+\&).
+.TP
+.B run \fR[\|\fIarglist\fR\|]
+Start your program (with \c
+.I arglist\c
+\&, if specified).
+.TP
+.B bt
+Backtrace: display the program stack.
+.TP
+.BI print " expr"\c
+\&
+Display the value of an expression.
+.TP
+.B c
+Continue running your program (after stopping, e.g. at a breakpoint).
+.TP
+.B next
+Execute next program line (after stopping); step \c
+.I over\c
+\& any
+function calls in the line.
+.TP
+.B edit \fR[\|\fIfile\fB:\fR\|]\fIfunction
+look at the program line where it is presently stopped.
+.TP
+.B list \fR[\|\fIfile\fB:\fR\|]\fIfunction
+type the text of the program in the vicinity of where it is presently stopped.
+.TP
+.B step
+Execute next program line (after stopping); step \c
+.I into\c
+\& any
+function calls in the line.
+.TP
+.B help \fR[\|\fIname\fR\|]
+Show information about GDB command \c
+.I name\c
+\&, or general information
+about using GDB.
+.TP
+.B quit
+Exit from GDB.
+.PP
+For full details on GDB, see \c
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+\&, by Richard M. Stallman and Roland H. Pesch. The same text is available online
+as the \c
+.B gdb\c
+\& entry in the \c
+.B info\c
+\& program.
+.SH OPTIONS
+Any arguments other than options specify an executable
+file and core file (or process ID); that is, the first argument
+encountered with no
+associated option flag is equivalent to a `\|\c
+.B \-se\c
+\&\|' option, and the
+second, if any, is equivalent to a `\|\c
+.B \-c\c
+\&\|' option if it's the name of a file. Many options have
+both long and short forms; both are shown here. The long forms are also
+recognized if you truncate them, so long as enough of the option is
+present to be unambiguous. (If you prefer, you can flag option
+arguments with `\|\c
+.B +\c
+\&\|' rather than `\|\c
+.B \-\c
+\&\|', though we illustrate the
+more usual convention.)
+
+All the options and command line arguments you give are processed
+in sequential order. The order makes a difference when the
+`\|\c
+.B \-x\c
+\&\|' option is used.
+
+.TP
+.B \-help
+.TP
+.B \-h
+List all options, with brief explanations.
+
+.TP
+.BI "\-symbols=" "file"\c
+.TP
+.BI "\-s " "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\&.
+
+.TP
+.B \-write
+Enable writing into executable and core files.
+
+.TP
+.BI "\-exec=" "file"\c
+.TP
+.BI "\-e " "file"\c
+\&
+Use file \c
+.I file\c
+\& as the executable file to execute when
+appropriate, and for examining pure data in conjunction with a core
+dump.
+
+.TP
+.BI "\-se=" "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\& and use it as the executable
+file.
+
+.TP
+.BI "\-core=" "file"\c
+.TP
+.BI "\-c " "file"\c
+\&
+Use file \c
+.I file\c
+\& as a core dump to examine.
+
+.TP
+.BI "\-command=" "file"\c
+.TP
+.BI "\-x " "file"\c
+\&
+Execute GDB commands from file \c
+.I file\c
+\&.
+
+.TP
+.BI "\-directory=" "directory"\c
+.TP
+.BI "\-d " "directory"\c
+\&
+Add \c
+.I directory\c
+\& to the path to search for source files.
+.PP
+
+.TP
+.B \-nx
+.TP
+.B \-n
+Do not execute commands from any `\|\c
+.B .gdbinit\c
+\&\|' initialization files.
+Normally, the commands in these files are executed after all the
+command options and arguments have been processed.
+
+
+.TP
+.B \-quiet
+.TP
+.B \-q
+``Quiet''. Do not print the introductory and copyright messages. These
+messages are also suppressed in batch mode.
+
+.TP
+.B \-batch
+Run in batch mode. Exit with status \c
+.B 0\c
+\& after processing all the command
+files specified with `\|\c
+.B \-x\c
+\&\|' (and `\|\c
+.B .gdbinit\c
+\&\|', if not inhibited).
+Exit with nonzero status if an error occurs in executing the GDB
+commands in the command files.
+
+Batch mode may be useful for running GDB as a filter, for example to
+download and run a program on another computer; in order to make this
+more useful, the message
+.sp
+.br
+Program\ exited\ normally.
+.br
+.sp
+
+(which is ordinarily issued whenever a program running under GDB control
+terminates) is not issued when running in batch mode.
+
+.TP
+.BI "\-cd=" "directory"\c
+\&
+Run GDB using \c
+.I directory\c
+\& as its working directory,
+instead of the current directory.
+
+.TP
+.B \-fullname
+.TP
+.B \-f
+Emacs sets this option when it runs GDB as a subprocess. It tells GDB
+to output the full file name and line number in a standard,
+recognizable fashion each time a stack frame is displayed (which
+includes each time the program stops). This recognizable format looks
+like two `\|\c
+.B \032\c
+\&\|' characters, followed by the file name, line number
+and character position separated by colons, and a newline. The
+Emacs-to-GDB interface program uses the two `\|\c
+.B \032\c
+\&\|' characters as
+a signal to display the source code for the frame.
+
+.TP
+.BI "\-b " "bps"\c
+\&
+Set the line speed (baud rate or bits per second) of any serial
+interface used by GDB for remote debugging.
+
+.TP
+.BI "\-tty=" "device"\c
+\&
+Run using \c
+.I device\c
+\& for your program's standard input and output.
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch, July 1991.
+.SH COPYING
+Copyright (c) 1991, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+.PP
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided that the
+entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+.PP
+Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions, except that this permission notice may be included in
+translations approved by the Free Software Foundation instead of in
+the original English.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1
new file mode 100644
index 0000000..548b46d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gdbtui.1
@@ -0,0 +1,381 @@
+.\" Copyright (C) 1991, 1999, 2010 Free Software Foundation, Inc.
+.\" See section COPYING for conditions for redistribution
+.\" $Id: gdb.1,v 1.4 1999/01/05 00:50:50 jsm Exp $
+.TH gdb 1 "22may2002" "GNU Tools" "GNU Tools"
+.SH NAME
+gdb \- The GNU Debugger
+.SH SYNOPSIS
+.na
+.TP
+.B gdb
+.RB "[\|" \-help "\|]"
+.RB "[\|" \-nx "\|]"
+.RB "[\|" \-q "\|]"
+.RB "[\|" \-batch "\|]"
+.RB "[\|" \-cd=\c
+.I dir\c
+\|]
+.RB "[\|" \-f "\|]"
+.RB "[\|" "\-b\ "\c
+.IR bps "\|]"
+.RB "[\|" "\-tty="\c
+.IR dev "\|]"
+.RB "[\|" "\-s "\c
+.I symfile\c
+\&\|]
+.RB "[\|" "\-e "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-se "\c
+.I prog\c
+\&\|]
+.RB "[\|" "\-c "\c
+.I core\c
+\&\|]
+.RB "[\|" "\-x "\c
+.I cmds\c
+\&\|]
+.RB "[\|" "\-d "\c
+.I dir\c
+\&\|]
+.RB "[\|" \c
+.I prog\c
+.RB "[\|" \c
+.IR core \||\| procID\c
+\&\|]\&\|]
+.ad b
+.SH DESCRIPTION
+The purpose of a debugger such as GDB is to allow you to see what is
+going on ``inside'' another program while it executes\(em\&or what another
+program was doing at the moment it crashed.
+
+GDB can do four main kinds of things (plus other things in support of
+these) to help you catch bugs in the act:
+
+.TP
+\ \ \ \(bu
+Start your program, specifying anything that might affect its behavior.
+
+.TP
+\ \ \ \(bu
+Make your program stop on specified conditions.
+
+.TP
+\ \ \ \(bu
+Examine what has happened, when your program has stopped.
+
+.TP
+\ \ \ \(bu
+Change things in your program, so you can experiment with correcting the
+effects of one bug and go on to learn about another.
+.PP
+
+You can use GDB to debug programs written in C, C++, and Modula-2.
+Fortran support will be added when a GNU Fortran compiler is ready.
+
+GDB is invoked with the shell command \c
+.B gdb\c
+\&. Once started, it reads
+commands from the terminal until you tell it to exit with the GDB
+command \c
+.B quit\c
+\&. You can get online help from \c
+.B gdb\c
+\& itself
+by using the command \c
+.B help\c
+\&.
+
+You can run \c
+.B gdb\c
+\& with no arguments or options; but the most
+usual way to start GDB is with one argument or two, specifying an
+executable program as the argument:
+.sp
+.br
+gdb\ program
+.br
+.sp
+
+You can also start with both an executable program and a core file specified:
+.sp
+.br
+gdb\ program\ core
+.br
+.sp
+
+You can, instead, specify a process ID as a second argument, if you want
+to debug a running process:
+.sp
+.br
+gdb\ program\ 1234
+.br
+.sp
+
+would attach GDB to process \c
+.B 1234\c
+\& (unless you also have a file
+named `\|\c
+.B 1234\c
+\&\|'; GDB does check for a core file first).
+
+Here are some of the most frequently needed GDB commands:
+.TP
+.B break \fR[\|\fIfile\fB:\fR\|]\fIfunction
+\&
+Set a breakpoint at \c
+.I function\c
+\& (in \c
+.I file\c
+\&).
+.TP
+.B run \fR[\|\fIarglist\fR\|]
+Start your program (with \c
+.I arglist\c
+\&, if specified).
+.TP
+.B bt
+Backtrace: display the program stack.
+.TP
+.BI print " expr"\c
+\&
+Display the value of an expression.
+.TP
+.B c
+Continue running your program (after stopping, e.g. at a breakpoint).
+.TP
+.B next
+Execute next program line (after stopping); step \c
+.I over\c
+\& any
+function calls in the line.
+.TP
+.B edit \fR[\|\fIfile\fB:\fR\|]\fIfunction
+look at the program line where it is presently stopped.
+.TP
+.B list \fR[\|\fIfile\fB:\fR\|]\fIfunction
+type the text of the program in the vicinity of where it is presently stopped.
+.TP
+.B step
+Execute next program line (after stopping); step \c
+.I into\c
+\& any
+function calls in the line.
+.TP
+.B help \fR[\|\fIname\fR\|]
+Show information about GDB command \c
+.I name\c
+\&, or general information
+about using GDB.
+.TP
+.B quit
+Exit from GDB.
+.PP
+For full details on GDB, see \c
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+\&, by Richard M. Stallman and Roland H. Pesch. The same text is available online
+as the \c
+.B gdb\c
+\& entry in the \c
+.B info\c
+\& program.
+.SH OPTIONS
+Any arguments other than options specify an executable
+file and core file (or process ID); that is, the first argument
+encountered with no
+associated option flag is equivalent to a `\|\c
+.B \-se\c
+\&\|' option, and the
+second, if any, is equivalent to a `\|\c
+.B \-c\c
+\&\|' option if it's the name of a file. Many options have
+both long and short forms; both are shown here. The long forms are also
+recognized if you truncate them, so long as enough of the option is
+present to be unambiguous. (If you prefer, you can flag option
+arguments with `\|\c
+.B +\c
+\&\|' rather than `\|\c
+.B \-\c
+\&\|', though we illustrate the
+more usual convention.)
+
+All the options and command line arguments you give are processed
+in sequential order. The order makes a difference when the
+`\|\c
+.B \-x\c
+\&\|' option is used.
+
+.TP
+.B \-help
+.TP
+.B \-h
+List all options, with brief explanations.
+
+.TP
+.BI "\-symbols=" "file"\c
+.TP
+.BI "\-s " "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\&.
+
+.TP
+.B \-write
+Enable writing into executable and core files.
+
+.TP
+.BI "\-exec=" "file"\c
+.TP
+.BI "\-e " "file"\c
+\&
+Use file \c
+.I file\c
+\& as the executable file to execute when
+appropriate, and for examining pure data in conjunction with a core
+dump.
+
+.TP
+.BI "\-se=" "file"\c
+\&
+Read symbol table from file \c
+.I file\c
+\& and use it as the executable
+file.
+
+.TP
+.BI "\-core=" "file"\c
+.TP
+.BI "\-c " "file"\c
+\&
+Use file \c
+.I file\c
+\& as a core dump to examine.
+
+.TP
+.BI "\-command=" "file"\c
+.TP
+.BI "\-x " "file"\c
+\&
+Execute GDB commands from file \c
+.I file\c
+\&.
+
+.TP
+.BI "\-directory=" "directory"\c
+.TP
+.BI "\-d " "directory"\c
+\&
+Add \c
+.I directory\c
+\& to the path to search for source files.
+.PP
+
+.TP
+.B \-nx
+.TP
+.B \-n
+Do not execute commands from any `\|\c
+.B .gdbinit\c
+\&\|' initialization files.
+Normally, the commands in these files are executed after all the
+command options and arguments have been processed.
+
+
+.TP
+.B \-quiet
+.TP
+.B \-q
+``Quiet''. Do not print the introductory and copyright messages. These
+messages are also suppressed in batch mode.
+
+.TP
+.B \-batch
+Run in batch mode. Exit with status \c
+.B 0\c
+\& after processing all the command
+files specified with `\|\c
+.B \-x\c
+\&\|' (and `\|\c
+.B .gdbinit\c
+\&\|', if not inhibited).
+Exit with nonzero status if an error occurs in executing the GDB
+commands in the command files.
+
+Batch mode may be useful for running GDB as a filter, for example to
+download and run a program on another computer; in order to make this
+more useful, the message
+.sp
+.br
+Program\ exited\ normally.
+.br
+.sp
+
+(which is ordinarily issued whenever a program running under GDB control
+terminates) is not issued when running in batch mode.
+
+.TP
+.BI "\-cd=" "directory"\c
+\&
+Run GDB using \c
+.I directory\c
+\& as its working directory,
+instead of the current directory.
+
+.TP
+.B \-fullname
+.TP
+.B \-f
+Emacs sets this option when it runs GDB as a subprocess. It tells GDB
+to output the full file name and line number in a standard,
+recognizable fashion each time a stack frame is displayed (which
+includes each time the program stops). This recognizable format looks
+like two `\|\c
+.B \032\c
+\&\|' characters, followed by the file name, line number
+and character position separated by colons, and a newline. The
+Emacs-to-GDB interface program uses the two `\|\c
+.B \032\c
+\&\|' characters as
+a signal to display the source code for the frame.
+
+.TP
+.BI "\-b " "bps"\c
+\&
+Set the line speed (baud rate or bits per second) of any serial
+interface used by GDB for remote debugging.
+
+.TP
+.BI "\-tty=" "device"\c
+\&
+Run using \c
+.I device\c
+\& for your program's standard input and output.
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch, July 1991.
+.SH COPYING
+Copyright (c) 1991, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+.PP
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided that the
+entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+.PP
+Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions, except that this permission notice may be included in
+translations approved by the Free Software Foundation instead of in
+the original English.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1
new file mode 100644
index 0000000..536c6a2
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-gprof.1
@@ -0,0 +1,772 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPROF 1"
+.TH GPROF 1 "2009-10-16" "binutils-2.20" "GNU"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gprof \- display call graph profile data
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gprof [ \-[abcDhilLrsTvwxyz] ] [ \-[ACeEfFJnNOpPqQZ][\fIname\fR] ]
+ [ \-I \fIdirs\fR ] [ \-d[\fInum\fR] ] [ \-k \fIfrom/to\fR ]
+ [ \-m \fImin-count\fR ] [ \-R \fImap_file\fR ] [ \-t \fItable-length\fR ]
+ [ \-\-[no\-]annotated\-source[=\fIname\fR] ]
+ [ \-\-[no\-]exec\-counts[=\fIname\fR] ]
+ [ \-\-[no\-]flat\-profile[=\fIname\fR] ] [ \-\-[no\-]graph[=\fIname\fR] ]
+ [ \-\-[no\-]time=\fIname\fR] [ \-\-all\-lines ] [ \-\-brief ]
+ [ \-\-debug[=\fIlevel\fR] ] [ \-\-function\-ordering ]
+ [ \-\-file\-ordering \fImap_file\fR ] [ \-\-directory\-path=\fIdirs\fR ]
+ [ \-\-display\-unused\-functions ] [ \-\-file\-format=\fIname\fR ]
+ [ \-\-file\-info ] [ \-\-help ] [ \-\-line ] [ \-\-min\-count=\fIn\fR ]
+ [ \-\-no\-static ] [ \-\-print\-path ] [ \-\-separate\-files ]
+ [ \-\-static\-call\-graph ] [ \-\-sum ] [ \-\-table\-length=\fIlen\fR ]
+ [ \-\-traditional ] [ \-\-version ] [ \-\-width=\fIn\fR ]
+ [ \-\-ignore\-non\-functions ] [ \-\-demangle[=\fI\s-1STYLE\s0\fR] ]
+ [ \-\-no\-demangle ] [\-\-external\-symbol\-table=name]
+ [ \fIimage-file\fR ] [ \fIprofile-file\fR ... ]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`gprof\*(C'\fR produces an execution profile of C, Pascal, or Fortran77
+programs. The effect of called routines is incorporated in the profile
+of each caller. The profile data is taken from the call graph profile file
+(\fIgmon.out\fR default) which is created by programs
+that are compiled with the \fB\-pg\fR option of
+\&\f(CW\*(C`cc\*(C'\fR, \f(CW\*(C`pc\*(C'\fR, and \f(CW\*(C`f77\*(C'\fR.
+The \fB\-pg\fR option also links in versions of the library routines
+that are compiled for profiling. \f(CW\*(C`Gprof\*(C'\fR reads the given object
+file (the default is \f(CW\*(C`a.out\*(C'\fR) and establishes the relation between
+its symbol table and the call graph profile from \fIgmon.out\fR.
+If more than one profile file is specified, the \f(CW\*(C`gprof\*(C'\fR
+output shows the sum of the profile information in the given profile files.
+.PP
+\&\f(CW\*(C`Gprof\*(C'\fR calculates the amount of time spent in each routine.
+Next, these times are propagated along the edges of the call graph.
+Cycles are discovered, and calls into a cycle are made to share the time
+of the cycle.
+.PP
+Several forms of output are available from the analysis.
+.PP
+The \fIflat profile\fR shows how much time your program spent in each function,
+and how many times that function was called. If you simply want to know
+which functions burn most of the cycles, it is stated concisely here.
+.PP
+The \fIcall graph\fR shows, for each function, which functions called it, which
+other functions it called, and how many times. There is also an estimate
+of how much time was spent in the subroutines of each function. This can
+suggest places where you might try to eliminate function calls that use a
+lot of time.
+.PP
+The \fIannotated source\fR listing is a copy of the program's
+source code, labeled with the number of times each line of the
+program was executed.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+These options specify which of several output formats
+\&\f(CW\*(C`gprof\*(C'\fR should produce.
+.PP
+Many of these options take an optional \fIsymspec\fR to specify
+functions to be included or excluded. These options can be
+specified multiple times, with different symspecs, to include
+or exclude sets of symbols.
+.PP
+Specifying any of these options overrides the default (\fB\-p \-q\fR),
+which prints a flat profile and call graph analysis
+for all functions.
+.ie n .IP """\-A[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-A[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-A[symspec]"
+.PD 0
+.ie n .IP """\-\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--annotated-source[=symspec]"
+.PD
+The \fB\-A\fR option causes \f(CW\*(C`gprof\*(C'\fR to print annotated source code.
+If \fIsymspec\fR is specified, print output only for matching symbols.
+.ie n .IP """\-b""" 4
+.el .IP "\f(CW\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.ie n .IP """\-\-brief""" 4
+.el .IP "\f(CW\-\-brief\fR" 4
+.IX Item "--brief"
+.PD
+If the \fB\-b\fR option is given, \f(CW\*(C`gprof\*(C'\fR doesn't print the
+verbose blurbs that try to explain the meaning of all of the fields in
+the tables. This is useful if you intend to print out the output, or
+are tired of seeing the blurbs.
+.ie n .IP """\-C[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-C[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-C[symspec]"
+.PD 0
+.ie n .IP """\-\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--exec-counts[=symspec]"
+.PD
+The \fB\-C\fR option causes \f(CW\*(C`gprof\*(C'\fR to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally only for matching symbols.
+.Sp
+If the profile data file contains basic-block count records, specifying
+the \fB\-l\fR option, along with \fB\-C\fR, will cause basic-block
+execution counts to be tallied and displayed.
+.ie n .IP """\-i""" 4
+.el .IP "\f(CW\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.ie n .IP """\-\-file\-info""" 4
+.el .IP "\f(CW\-\-file\-info\fR" 4
+.IX Item "--file-info"
+.PD
+The \fB\-i\fR option causes \f(CW\*(C`gprof\*(C'\fR to display summary information
+about the profile data file(s) and then exit. The number of histogram,
+call graph, and basic-block count records is displayed.
+.ie n .IP """\-I \f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-I \f(CIdirs\f(CW\fR" 4
+.IX Item "-I dirs"
+.PD 0
+.ie n .IP """\-\-directory\-path=\f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-\-directory\-path=\f(CIdirs\f(CW\fR" 4
+.IX Item "--directory-path=dirs"
+.PD
+The \fB\-I\fR option specifies a list of search directories in
+which to find source files. Environment variable \fI\s-1GPROF_PATH\s0\fR
+can also be used to convey this information.
+Used mostly for annotated source output.
+.ie n .IP """\-J[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-J[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-J[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-annotated-source[=symspec]"
+.PD
+The \fB\-J\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print annotated source code.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints annotated source,
+but excludes matching symbols.
+.ie n .IP """\-L""" 4
+.el .IP "\f(CW\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.ie n .IP """\-\-print\-path""" 4
+.el .IP "\f(CW\-\-print\-path\fR" 4
+.IX Item "--print-path"
+.PD
+Normally, source filenames are printed with the path
+component suppressed. The \fB\-L\fR option causes \f(CW\*(C`gprof\*(C'\fR
+to print the full pathname of
+source filenames, which is determined
+from symbolic debugging information in the image file
+and is relative to the directory in which the compiler
+was invoked.
+.ie n .IP """\-p[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-p[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-p[symspec]"
+.PD 0
+.ie n .IP """\-\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--flat-profile[=symspec]"
+.PD
+The \fB\-p\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a flat profile.
+If \fIsymspec\fR is specified, print flat profile only for matching symbols.
+.ie n .IP """\-P[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-P[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-P[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-flat-profile[=symspec]"
+.PD
+The \fB\-P\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing a flat profile.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a flat profile,
+but excludes matching symbols.
+.ie n .IP """\-q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-q[symspec]"
+.PD 0
+.ie n .IP """\-\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--graph[=symspec]"
+.PD
+The \fB\-q\fR option causes \f(CW\*(C`gprof\*(C'\fR to print the call graph analysis.
+If \fIsymspec\fR is specified, print call graph only for matching symbols
+and their children.
+.ie n .IP """\-Q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Q[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-graph[=symspec]"
+.PD
+The \fB\-Q\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing the
+call graph.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a call graph,
+but excludes matching symbols.
+.ie n .IP """\-t""" 4
+.el .IP "\f(CW\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.ie n .IP """\-\-table\-length=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-table\-length=\f(CInum\f(CW\fR" 4
+.IX Item "--table-length=num"
+.PD
+The \fB\-t\fR option causes the \fInum\fR most active source lines in
+each source file to be listed when source annotation is enabled. The
+default is 10.
+.ie n .IP """\-y""" 4
+.el .IP "\f(CW\-y\fR" 4
+.IX Item "-y"
+.PD 0
+.ie n .IP """\-\-separate\-files""" 4
+.el .IP "\f(CW\-\-separate\-files\fR" 4
+.IX Item "--separate-files"
+.PD
+This option affects annotated source output only.
+Normally, \f(CW\*(C`gprof\*(C'\fR prints annotated source files
+to standard-output. If this option is specified,
+annotated source for a file named \fIpath/\fIfilename\fI\fR
+is generated in the file \fI\fIfilename\fI\-ann\fR. If the underlying
+file system would truncate \fI\fIfilename\fI\-ann\fR so that it
+overwrites the original \fI\fIfilename\fI\fR, \f(CW\*(C`gprof\*(C'\fR generates
+annotated source in the file \fI\fIfilename\fI.ann\fR instead (if the
+original file name has an extension, that extension is \fIreplaced\fR
+with \fI.ann\fR).
+.ie n .IP """\-Z[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Z[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Z[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-exec-counts[=symspec]"
+.PD
+The \fB\-Z\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally, but exclude matching symbols.
+.ie n .IP """\-r""" 4
+.el .IP "\f(CW\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.ie n .IP """\-\-function\-ordering""" 4
+.el .IP "\f(CW\-\-function\-ordering\fR" 4
+.IX Item "--function-ordering"
+.PD
+The \fB\-\-function\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested function ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which support arbitrary
+ordering of functions in an executable.
+.Sp
+The exact details of how to force the linker to place functions
+in a particular order is system dependent and out of the scope of this
+manual.
+.ie n .IP """\-R \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-R \f(CImap_file\f(CW\fR" 4
+.IX Item "-R map_file"
+.PD 0
+.ie n .IP """\-\-file\-ordering \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-\-file\-ordering \f(CImap_file\f(CW\fR" 4
+.IX Item "--file-ordering map_file"
+.PD
+The \fB\-\-file\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested .o link line ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which do not support arbitrary
+ordering of functions in an executable.
+.Sp
+Use of the \fB\-a\fR argument is highly recommended with this option.
+.Sp
+The \fImap_file\fR argument is a pathname to a file which provides
+function name to object file mappings. The format of the file is similar to
+the output of the program \f(CW\*(C`nm\*(C'\fR.
+.Sp
+.Vb 8
+\& c\-parse.o:00000000 T yyparse
+\& c\-parse.o:00000004 C yyerrflag
+\& c\-lang.o:00000000 T maybe_objc_method_name
+\& c\-lang.o:00000000 T print_lang_statistics
+\& c\-lang.o:00000000 T recognize_objc_keyword
+\& c\-decl.o:00000000 T print_lang_identifier
+\& c\-decl.o:00000000 T print_lang_type
+\& ...
+.Ve
+.Sp
+To create a \fImap_file\fR with \s-1GNU\s0 \f(CW\*(C`nm\*(C'\fR, type a command like
+\&\f(CW\*(C`nm \-\-extern\-only \-\-defined\-only \-v \-\-print\-file\-name program\-name\*(C'\fR.
+.ie n .IP """\-T""" 4
+.el .IP "\f(CW\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.ie n .IP """\-\-traditional""" 4
+.el .IP "\f(CW\-\-traditional\fR" 4
+.IX Item "--traditional"
+.PD
+The \fB\-T\fR option causes \f(CW\*(C`gprof\*(C'\fR to print its output in
+\&\*(L"traditional\*(R" \s-1BSD\s0 style.
+.ie n .IP """\-w \f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-w \f(CIwidth\f(CW\fR" 4
+.IX Item "-w width"
+.PD 0
+.ie n .IP """\-\-width=\f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-\-width=\f(CIwidth\f(CW\fR" 4
+.IX Item "--width=width"
+.PD
+Sets width of output lines to \fIwidth\fR.
+Currently only used when printing the function index at the bottom
+of the call graph.
+.ie n .IP """\-x""" 4
+.el .IP "\f(CW\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.ie n .IP """\-\-all\-lines""" 4
+.el .IP "\f(CW\-\-all\-lines\fR" 4
+.IX Item "--all-lines"
+.PD
+This option affects annotated source output only.
+By default, only the lines at the beginning of a basic-block
+are annotated. If this option is specified, every line in
+a basic-block is annotated by repeating the annotation for the
+first line. This behavior is similar to \f(CW\*(C`tcov\*(C'\fR's \fB\-a\fR.
+.ie n .IP """\-\-demangle[=\f(CIstyle\f(CW]""" 4
+.el .IP "\f(CW\-\-demangle[=\f(CIstyle\f(CW]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.ie n .IP """\-\-no\-demangle""" 4
+.el .IP "\f(CW\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether \*(C+ symbol names should be demangled when
+printing output. The default is to demangle symbols. The
+\&\f(CW\*(C`\-\-no\-demangle\*(C'\fR option may be used to turn off demangling. Different
+compilers have different mangling styles. The optional demangling style
+argument can be used to choose an appropriate demangling style for your
+compiler.
+.Sh "Analysis Options"
+.IX Subsection "Analysis Options"
+.ie n .IP """\-a""" 4
+.el .IP "\f(CW\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.ie n .IP """\-\-no\-static""" 4
+.el .IP "\f(CW\-\-no\-static\fR" 4
+.IX Item "--no-static"
+.PD
+The \fB\-a\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress the printing of
+statically declared (private) functions. (These are functions whose
+names are not listed as global, and which are not visible outside the
+file/function/block where they were defined.) Time spent in these
+functions, calls to/from them, etc., will all be attributed to the
+function that was loaded directly before it in the executable file.
+This option affects both the flat profile and the call graph.
+.ie n .IP """\-c""" 4
+.el .IP "\f(CW\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.ie n .IP """\-\-static\-call\-graph""" 4
+.el .IP "\f(CW\-\-static\-call\-graph\fR" 4
+.IX Item "--static-call-graph"
+.PD
+The \fB\-c\fR option causes the call graph of the program to be
+augmented by a heuristic which examines the text space of the object
+file and identifies function calls in the binary machine code.
+Since normal call graph records are only generated when functions are
+entered, this option identifies children that could have been called,
+but never were. Calls to functions that were not compiled with
+profiling enabled are also identified, but only if symbol table
+entries are present for them.
+Calls to dynamic library routines are typically \fInot\fR found
+by this option.
+Parents or children identified via this heuristic
+are indicated in the call graph with call counts of \fB0\fR.
+.ie n .IP """\-D""" 4
+.el .IP "\f(CW\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.ie n .IP """\-\-ignore\-non\-functions""" 4
+.el .IP "\f(CW\-\-ignore\-non\-functions\fR" 4
+.IX Item "--ignore-non-functions"
+.PD
+The \fB\-D\fR option causes \f(CW\*(C`gprof\*(C'\fR to ignore symbols which
+are not known to be functions. This option will give more accurate
+profile data on systems where it is supported (Solaris and \s-1HPUX\s0 for
+example).
+.ie n .IP """\-k \f(CIfrom\f(CW/\f(CIto\f(CW""" 4
+.el .IP "\f(CW\-k \f(CIfrom\f(CW/\f(CIto\f(CW\fR" 4
+.IX Item "-k from/to"
+The \fB\-k\fR option allows you to delete from the call graph any arcs from
+symbols matching symspec \fIfrom\fR to those matching symspec \fIto\fR.
+.ie n .IP """\-l""" 4
+.el .IP "\f(CW\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.ie n .IP """\-\-line""" 4
+.el .IP "\f(CW\-\-line\fR" 4
+.IX Item "--line"
+.PD
+The \fB\-l\fR option enables line-by-line profiling, which causes
+histogram hits to be charged to individual source code lines,
+instead of functions. This feature only works with programs compiled
+by older versions of the \f(CW\*(C`gcc\*(C'\fR compiler. Newer versions of
+\&\f(CW\*(C`gcc\*(C'\fR are designed to work with the \f(CW\*(C`gcov\*(C'\fR tool instead.
+.Sp
+If the program was compiled with basic-block counting enabled,
+this option will also identify how many times each line of
+code was executed.
+While line-by-line profiling can help isolate where in a large function
+a program is spending its time, it also significantly increases
+the running time of \f(CW\*(C`gprof\*(C'\fR, and magnifies statistical
+inaccuracies.
+.ie n .IP """\-m \f(CInum\f(CW""" 4
+.el .IP "\f(CW\-m \f(CInum\f(CW\fR" 4
+.IX Item "-m num"
+.PD 0
+.ie n .IP """\-\-min\-count=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-min\-count=\f(CInum\f(CW\fR" 4
+.IX Item "--min-count=num"
+.PD
+This option affects execution count output only.
+Symbols that are executed less than \fInum\fR times are suppressed.
+.ie n .IP """\-n\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-n\f(CIsymspec\f(CW\fR" 4
+.IX Item "-nsymspec"
+.PD 0
+.ie n .IP """\-\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+to only propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-N\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-N\f(CIsymspec\f(CW\fR" 4
+.IX Item "-Nsymspec"
+.PD 0
+.ie n .IP """\-\-no\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-no\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--no-time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+not to propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-S\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-S\f(CIfilename\f(CW\fR" 4
+.IX Item "-Sfilename"
+.PD 0
+.ie n .IP """\-\-external\-symbol\-table=\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-\-external\-symbol\-table=\f(CIfilename\f(CW\fR" 4
+.IX Item "--external-symbol-table=filename"
+.PD
+The \fB\-S\fR option causes \f(CW\*(C`gprof\*(C'\fR to read an external symbol table
+file, such as \fI/proc/kallsyms\fR, rather than read the symbol table
+from the given object file (the default is \f(CW\*(C`a.out\*(C'\fR). This is useful
+for profiling kernel modules.
+.ie n .IP """\-z""" 4
+.el .IP "\f(CW\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.ie n .IP """\-\-display\-unused\-functions""" 4
+.el .IP "\f(CW\-\-display\-unused\-functions\fR" 4
+.IX Item "--display-unused-functions"
+.PD
+If you give the \fB\-z\fR option, \f(CW\*(C`gprof\*(C'\fR will mention all
+functions in the flat profile, even those that were never called, and
+that had no time spent in them. This is useful in conjunction with the
+\&\fB\-c\fR option for discovering which routines were never called.
+.Sh "Miscellaneous Options"
+.IX Subsection "Miscellaneous Options"
+.ie n .IP """\-d[\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-d[\f(CInum\f(CW]\fR" 4
+.IX Item "-d[num]"
+.PD 0
+.ie n .IP """\-\-debug[=\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-\-debug[=\f(CInum\f(CW]\fR" 4
+.IX Item "--debug[=num]"
+.PD
+The \fB\-d\fR \fInum\fR option specifies debugging options.
+If \fInum\fR is not specified, enable all debugging.
+.ie n .IP """\-h""" 4
+.el .IP "\f(CW\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.ie n .IP """\-\-help""" 4
+.el .IP "\f(CW\-\-help\fR" 4
+.IX Item "--help"
+.PD
+The \fB\-h\fR option prints command line usage.
+.ie n .IP """\-O\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-O\f(CIname\f(CW\fR" 4
+.IX Item "-Oname"
+.PD 0
+.ie n .IP """\-\-file\-format=\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-\-file\-format=\f(CIname\f(CW\fR" 4
+.IX Item "--file-format=name"
+.PD
+Selects the format of the profile data files. Recognized formats are
+\&\fBauto\fR (the default), \fBbsd\fR, \fB4.4bsd\fR, \fBmagic\fR, and
+\&\fBprof\fR (not yet supported).
+.ie n .IP """\-s""" 4
+.el .IP "\f(CW\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.ie n .IP """\-\-sum""" 4
+.el .IP "\f(CW\-\-sum\fR" 4
+.IX Item "--sum"
+.PD
+The \fB\-s\fR option causes \f(CW\*(C`gprof\*(C'\fR to summarize the information
+in the profile data files it read in, and write out a profile data
+file called \fIgmon.sum\fR, which contains all the information from
+the profile data files that \f(CW\*(C`gprof\*(C'\fR read in. The file \fIgmon.sum\fR
+may be one of the specified input files; the effect of this is to
+merge the data in the other input files into \fIgmon.sum\fR.
+.Sp
+Eventually you can run \f(CW\*(C`gprof\*(C'\fR again without \fB\-s\fR to analyze the
+cumulative data in the file \fIgmon.sum\fR.
+.ie n .IP """\-v""" 4
+.el .IP "\f(CW\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.ie n .IP """\-\-version""" 4
+.el .IP "\f(CW\-\-version\fR" 4
+.IX Item "--version"
+.PD
+The \fB\-v\fR flag causes \f(CW\*(C`gprof\*(C'\fR to print the current version
+number, and then exit.
+.Sh "Deprecated Options"
+.IX Subsection "Deprecated Options"
+.RS 4
+These options have been replaced with newer versions that use symspecs.
+.Sp
+\&\f(CW\*(C`\-e \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-e\fR \fIfunction\fR option tells \f(CW\*(C`gprof\*(C'\fR to not print
+information about the function \fIfunction_name\fR (and its
+children...) in the call graph. The function will still be listed
+as a child of any functions that call it, but its index number will be
+shown as \fB[not printed]\fR. More than one \fB\-e\fR option may be
+given; only one \fIfunction_name\fR may be indicated with each \fB\-e\fR
+option.
+.Sp
+\&\f(CW\*(C`\-E \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \f(CW\*(C`\-E \f(CIfunction\f(CW\*(C'\fR option works like the \f(CW\*(C`\-e\*(C'\fR option, but
+time spent in the function (and children who were not called from
+anywhere else), will not be used to compute the percentages-of-time for
+the call graph. More than one \fB\-E\fR option may be given; only one
+\&\fIfunction_name\fR may be indicated with each \fB\-E\fR option.
+.Sp
+\&\f(CW\*(C`\-f \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-f\fR \fIfunction\fR option causes \f(CW\*(C`gprof\*(C'\fR to limit the
+call graph to the function \fIfunction_name\fR and its children (and
+their children...). More than one \fB\-f\fR option may be given;
+only one \fIfunction_name\fR may be indicated with each \fB\-f\fR
+option.
+.Sp
+\&\f(CW\*(C`\-F \f(CIfunction_name\f(CW\*(C'\fR
+.Sp
+The \fB\-F\fR \fIfunction\fR option works like the \f(CW\*(C`\-f\*(C'\fR option, but
+only time spent in the function and its children (and their
+children...) will be used to determine total-time and
+percentages-of-time for the call graph. More than one \fB\-F\fR option
+may be given; only one \fIfunction_name\fR may be indicated with each
+\&\fB\-F\fR option. The \fB\-F\fR option overrides the \fB\-E\fR option.
+.RE
+.SH "FILES"
+.IX Header "FILES"
+.ie n .IP """\f(CIa.out\f(CW""" 4
+.el .IP "\f(CW\f(CIa.out\f(CW\fR" 4
+.IX Item "a.out"
+the namelist and text space.
+.ie n .IP """\f(CIgmon.out\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.out\f(CW\fR" 4
+.IX Item "gmon.out"
+dynamic call graph and profile.
+.ie n .IP """\f(CIgmon.sum\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.sum\f(CW\fR" 4
+.IX Item "gmon.sum"
+summarized dynamic call graph and profile.
+.SH "BUGS"
+.IX Header "BUGS"
+The granularity of the sampling is shown, but remains
+statistical at best.
+We assume that the time for each execution of a function
+can be expressed by the total time for the function divided
+by the number of times the function is called.
+Thus the time propagated along the call graph arcs to the function's
+parents is directly proportional to the number of times that
+arc is traversed.
+.PP
+Parents that are not themselves profiled will have the time of
+their profiled children propagated to them, but they will appear
+to be spontaneously invoked in the call graph listing, and will
+not have their time propagated further.
+Similarly, signal catchers, even though profiled, will appear
+to be spontaneous (although for more obscure reasons).
+Any profiled children of signal catchers should have their times
+propagated properly, unless the signal catcher was invoked during
+the execution of the profiling routine, in which case all is lost.
+.PP
+The profiled program must call \f(CW\*(C`exit\*(C'\fR(2)
+or return normally for the profiling information to be saved
+in the \fIgmon.out\fR file.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fImonitor\fR\|(3), \fIprofil\fR\|(2), \fIcc\fR\|(1), \fIprof\fR\|(1), and the Info entry for \fIgprof\fR.
+.PP
+\&\*(L"An Execution Profiler for Modular Programs\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Software \- Practice and Experience,
+Vol. 13, pp. 671\-685, 1983.
+.PP
+\&\*(L"gprof: A Call Graph Execution Profiler\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Proceedings of the \s-1SIGPLAN\s0 '82 Symposium on Compiler Construction,
+\&\s-1SIGPLAN\s0 Notices, Vol. 17, No 6, pp. 120\-126, June 1982.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
+.SH "POD ERRORS"
+.IX Header "POD ERRORS"
+Hey! \fBThe above document had some coding errors, which are explained below:\fR
+.IP "Around line 539:" 4
+.IX Item "Around line 539:"
+You can't have =items (as at line 545) unless the first thing after the =over is an =item
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1
new file mode 100644
index 0000000..6086571
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ld.1
@@ -0,0 +1,2355 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "LD 1"
+.TH LD 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ld \- The GNU linker
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ld [\fBoptions\fR] \fIobjfile\fR ...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBld\fR combines a number of object and archive files, relocates
+their data and ties up symbol references. Usually the last step in
+compiling a program is to run \fBld\fR.
+.PP
+\&\fBld\fR accepts Linker Command Language files written in
+a superset of \s-1AT&T\s0's Link Editor Command Language syntax,
+to provide explicit and total control over the linking process.
+.PP
+This man page does not describe the command language; see the
+\&\fBld\fR entry in \f(CW\*(C`info\*(C'\fR for full details on the command
+language and on other aspects of the \s-1GNU\s0 linker.
+.PP
+This version of \fBld\fR uses the general purpose \s-1BFD\s0 libraries
+to operate on object files. This allows \fBld\fR to read, combine, and
+write object files in many different formats\-\-\-for example, \s-1COFF\s0 or
+\&\f(CW\*(C`a.out\*(C'\fR. Different formats may be linked together to produce any
+available kind of object file.
+.PP
+Aside from its flexibility, the \s-1GNU\s0 linker is more helpful than other
+linkers in providing diagnostic information. Many linkers abandon
+execution immediately upon encountering an error; whenever possible,
+\&\fBld\fR continues executing, allowing you to identify other errors
+(or, in some cases, to get an output file in spite of the error).
+.PP
+The \s-1GNU\s0 linker \fBld\fR is meant to cover a broad range of situations,
+and to be as compatible as possible with other linkers. As a result,
+you have many choices to control its behavior.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The linker supports a plethora of command-line options, but in actual
+practice few of them are used in any particular context.
+For instance, a frequent use of \fBld\fR is to link standard Unix
+object files on a standard, supported Unix system. On such a system, to
+link a file \f(CW\*(C`hello.o\*(C'\fR:
+.PP
+.Vb 1
+\& ld \-o <output> /lib/crt0.o hello.o \-lc
+.Ve
+.PP
+This tells \fBld\fR to produce a file called \fIoutput\fR as the
+result of linking the file \f(CW\*(C`/lib/crt0.o\*(C'\fR with \f(CW\*(C`hello.o\*(C'\fR and
+the library \f(CW\*(C`libc.a\*(C'\fR, which will come from the standard search
+directories. (See the discussion of the \fB\-l\fR option below.)
+.PP
+Some of the command-line options to \fBld\fR may be specified at any
+point in the command line. However, options which refer to files, such
+as \fB\-l\fR or \fB\-T\fR, cause the file to be read at the point at
+which the option appears in the command line, relative to the object
+files and other file options. Repeating non-file options with a
+different argument will either have no further effect, or override prior
+occurrences (those further to the left on the command line) of that
+option. Options which may be meaningfully specified more than once are
+noted in the descriptions below.
+.PP
+Non-option arguments are object files or archives which are to be linked
+together. They may follow, precede, or be mixed in with command-line
+options, except that an object file argument may not be placed between
+an option and its argument.
+.PP
+Usually the linker is invoked with at least one object file, but you can
+specify other forms of binary input files using \fB\-l\fR, \fB\-R\fR,
+and the script command language. If \fIno\fR binary input files at all
+are specified, the linker does not produce any output, and issues the
+message \fBNo input files\fR.
+.PP
+If the linker cannot recognize the format of an object file, it will
+assume that it is a linker script. A script specified in this way
+augments the main linker script used for the link (either the default
+linker script or the one specified by using \fB\-T\fR). This feature
+permits the linker to link against a file which appears to be an object
+or an archive, but actually merely defines some symbol values, or uses
+\&\f(CW\*(C`INPUT\*(C'\fR or \f(CW\*(C`GROUP\*(C'\fR to load other objects. Specifying a
+script in this way merely augments the main linker script, with the
+extra commands placed after the main script; use the \fB\-T\fR option
+to replace the default linker script entirely, but note the effect of
+the \f(CW\*(C`INSERT\*(C'\fR command.
+.PP
+For options whose names are a single letter,
+option arguments must either follow the option letter without intervening
+whitespace, or be given as separate arguments immediately following the
+option that requires them.
+.PP
+For options whose names are multiple letters, either one dash or two can
+precede the option name; for example, \fB\-trace\-symbol\fR and
+\&\fB\-\-trace\-symbol\fR are equivalent. Note\-\-\-there is one exception to
+this rule. Multiple letter options that start with a lower case 'o' can
+only be preceded by two dashes. This is to reduce confusion with the
+\&\fB\-o\fR option. So for example \fB\-omagic\fR sets the output file
+name to \fBmagic\fR whereas \fB\-\-omagic\fR sets the \s-1NMAGIC\s0 flag on the
+output.
+.PP
+Arguments to multiple-letter options must either be separated from the
+option name by an equals sign, or be given as separate arguments
+immediately following the option that requires them. For example,
+\&\fB\-\-trace\-symbol foo\fR and \fB\-\-trace\-symbol=foo\fR are equivalent.
+Unique abbreviations of the names of multiple-letter options are
+accepted.
+.PP
+Note\-\-\-if the linker is being invoked indirectly, via a compiler driver
+(e.g. \fBgcc\fR) then all the linker command line options should be
+prefixed by \fB\-Wl,\fR (or whatever is appropriate for the particular
+compiler driver) like this:
+.PP
+.Vb 1
+\& gcc \-Wl,\-\-start\-group foo.o bar.o \-Wl,\-\-end\-group
+.Ve
+.PP
+This is important, because otherwise the compiler driver program may
+silently drop the linker options, resulting in a bad link. Confusion
+may also arise when passing options that require values through a
+driver, as the use of a space between option and argument acts as
+a separator, and causes the driver to pass only the option to the linker
+and the argument to the compiler. In this case, it is simplest to use
+the joined forms of both single\- and multiple-letter options, such as:
+.PP
+.Vb 1
+\& gcc foo.o bar.o \-Wl,\-eENTRY \-Wl,\-Map=a.map
+.Ve
+.PP
+Here is a table of the generic command line switches accepted by the \s-1GNU\s0
+linker:
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a\fR \fIkeyword\fR" 4
+.IX Item "-a keyword"
+This option is supported for \s-1HP/UX\s0 compatibility. The \fIkeyword\fR
+argument must be one of the strings \fBarchive\fR, \fBshared\fR, or
+\&\fBdefault\fR. \fB\-aarchive\fR is functionally equivalent to
+\&\fB\-Bstatic\fR, and the other two keywords are functionally equivalent
+to \fB\-Bdynamic\fR. This option may be used any number of times.
+.IP "\fB\-A\fR \fIarchitecture\fR" 4
+.IX Item "-A architecture"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fIarchitecture\fR" 4
+.IX Item "--architecture=architecture"
+.PD
+In the current release of \fBld\fR, this option is useful only for the
+Intel 960 family of architectures. In that \fBld\fR configuration, the
+\&\fIarchitecture\fR argument identifies the particular architecture in
+the 960 family, enabling some safeguards and modifying the
+archive-library search path.
+.Sp
+Future releases of \fBld\fR may support similar functionality for
+other architecture families.
+.IP "\fB\-b\fR \fIinput-format\fR" 4
+.IX Item "-b input-format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIinput-format\fR" 4
+.IX Item "--format=input-format"
+.PD
+\&\fBld\fR may be configured to support more than one kind of object
+file. If your \fBld\fR is configured this way, you can use the
+\&\fB\-b\fR option to specify the binary format for input object files
+that follow this option on the command line. Even when \fBld\fR is
+configured to support alternative object formats, you don't usually need
+to specify this, as \fBld\fR should be configured to expect as a
+default input format the most usual format on each machine.
+\&\fIinput-format\fR is a text string, the name of a particular format
+supported by the \s-1BFD\s0 libraries. (You can list the available binary
+formats with \fBobjdump \-i\fR.)
+.Sp
+You may want to use this option if you are linking files with an unusual
+binary format. You can also use \fB\-b\fR to switch formats explicitly (when
+linking object files of different formats), by including
+\&\fB\-b\fR \fIinput-format\fR before each group of object files in a
+particular format.
+.Sp
+The default format is taken from the environment variable
+\&\f(CW\*(C`GNUTARGET\*(C'\fR.
+.Sp
+You can also define the input format from a script, using the command
+\&\f(CW\*(C`TARGET\*(C'\fR;
+.IP "\fB\-c\fR \fIMRI-commandfile\fR" 4
+.IX Item "-c MRI-commandfile"
+.PD 0
+.IP "\fB\-\-mri\-script=\fR\fIMRI-commandfile\fR" 4
+.IX Item "--mri-script=MRI-commandfile"
+.PD
+For compatibility with linkers produced by \s-1MRI\s0, \fBld\fR accepts script
+files written in an alternate, restricted command language, described in
+the \s-1MRI\s0 Compatible Script Files section of \s-1GNU\s0 ld documentation.
+Introduce \s-1MRI\s0 script files with
+the option \fB\-c\fR; use the \fB\-T\fR option to run linker
+scripts written in the general-purpose \fBld\fR scripting language.
+If \fIMRI-cmdfile\fR does not exist, \fBld\fR looks for it in the directories
+specified by any \fB\-L\fR options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-dc\fR" 4
+.IX Item "-dc"
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+.PD
+These three options are equivalent; multiple forms are supported for
+compatibility with other linkers. They assign space to common symbols
+even if a relocatable output file is specified (with \fB\-r\fR). The
+script command \f(CW\*(C`FORCE_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.IP "\fB\-e\fR \fIentry\fR" 4
+.IX Item "-e entry"
+.PD 0
+.IP "\fB\-\-entry=\fR\fIentry\fR" 4
+.IX Item "--entry=entry"
+.PD
+Use \fIentry\fR as the explicit symbol for beginning execution of your
+program, rather than the default entry point. If there is no symbol
+named \fIentry\fR, the linker will try to parse \fIentry\fR as a number,
+and use that as the entry address (the number will be interpreted in
+base 10; you may use a leading \fB0x\fR for base 16, or a leading
+\&\fB0\fR for base 8).
+.IP "\fB\-\-exclude\-libs\fR \fIlib\fR\fB,\fR\fIlib\fR\fB,...\fR" 4
+.IX Item "--exclude-libs lib,lib,..."
+Specifies a list of archive libraries from which symbols should not be automatically
+exported. The library names may be delimited by commas or colons. Specifying
+\&\f(CW\*(C`\-\-exclude\-libs ALL\*(C'\fR excludes symbols in all archive libraries from
+automatic export. This option is available only for the i386 \s-1PE\s0 targeted
+port of the linker and for \s-1ELF\s0 targeted ports. For i386 \s-1PE\s0, symbols
+explicitly listed in a .def file are still exported, regardless of this
+option. For \s-1ELF\s0 targeted ports, symbols affected by this option will
+be treated as hidden.
+.IP "\fB\-\-exclude\-modules\-for\-implib\fR \fImodule\fR\fB,\fR\fImodule\fR\fB,...\fR" 4
+.IX Item "--exclude-modules-for-implib module,module,..."
+Specifies a list of object files or archive members, from which symbols
+should not be automatically exported, but which should be copied wholesale
+into the import library being generated during the link. The module names
+may be delimited by commas or colons, and must match exactly the filenames
+used by \fBld\fR to open the files; for archive members, this is simply
+the member name, but for object files the name listed must include and
+match precisely any path used to specify the input file on the linker's
+command-line. This option is available only for the i386 \s-1PE\s0 targeted port
+of the linker. Symbols explicitly listed in a .def file are still exported,
+regardless of this option.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD 0
+.IP "\fB\-\-export\-dynamic\fR" 4
+.IX Item "--export-dynamic"
+.IP "\fB\-\-no\-export\-dynamic\fR" 4
+.IX Item "--no-export-dynamic"
+.PD
+When creating a dynamically linked executable, using the \fB\-E\fR
+option or the \fB\-\-export\-dynamic\fR option causes the linker to add
+all symbols to the dynamic symbol table. The dynamic symbol table is the
+set of symbols which are visible from dynamic objects at run time.
+.Sp
+If you do not use either of these options (or use the
+\&\fB\-\-no\-export\-dynamic\fR option to restore the default behavior), the
+dynamic symbol table will normally contain only those symbols which are
+referenced by some dynamic object mentioned in the link.
+.Sp
+If you use \f(CW\*(C`dlopen\*(C'\fR to load a dynamic object which needs to refer
+back to the symbols defined by the program, rather than some other
+dynamic object, then you will probably need to use this option when
+linking the program itself.
+.Sp
+You can also use the dynamic list to control what symbols should
+be added to the dynamic symbol table if the output format supports it.
+See the description of \fB\-\-dynamic\-list\fR.
+.Sp
+Note that this option is specific to \s-1ELF\s0 targeted ports. \s-1PE\s0 targets
+support a similar function to export all symbols from a \s-1DLL\s0 or \s-1EXE\s0; see
+the description of \fB\-\-export\-all\-symbols\fR below.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Link big-endian objects. This affects the default output format.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Link little-endian objects. This affects the default output format.
+.IP "\fB\-f\fR \fIname\fR" 4
+.IX Item "-f name"
+.PD 0
+.IP "\fB\-\-auxiliary=\fR\fIname\fR" 4
+.IX Item "--auxiliary=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_AUXILIARY\s0 field
+to the specified name. This tells the dynamic linker that the symbol
+table of the shared object should be used as an auxiliary filter on the
+symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_AUXILIARY\s0 field. If
+the dynamic linker resolves any symbols from the filter object, it will
+first check whether there is a definition in the shared object
+\&\fIname\fR. If there is one, it will be used instead of the definition
+in the filter object. The shared object \fIname\fR need not exist.
+Thus the shared object \fIname\fR may be used to provide an alternative
+implementation of certain functions, perhaps for debugging or for
+machine specific performance.
+.Sp
+This option may be specified more than once. The \s-1DT_AUXILIARY\s0 entries
+will be created in the order in which they appear on the command line.
+.IP "\fB\-F\fR \fIname\fR" 4
+.IX Item "-F name"
+.PD 0
+.IP "\fB\-\-filter=\fR\fIname\fR" 4
+.IX Item "--filter=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_FILTER\s0 field to
+the specified name. This tells the dynamic linker that the symbol table
+of the shared object which is being created should be used as a filter
+on the symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_FILTER\s0 field. The
+dynamic linker will resolve symbols according to the symbol table of the
+filter object as usual, but it will actually link to the definitions
+found in the shared object \fIname\fR. Thus the filter object can be
+used to select a subset of the symbols provided by the object
+\&\fIname\fR.
+.Sp
+Some older linkers used the \fB\-F\fR option throughout a compilation
+toolchain for specifying object-file format for both input and output
+object files.
+The \s-1GNU\s0 linker uses other mechanisms for this purpose: the
+\&\fB\-b\fR, \fB\-\-format\fR, \fB\-\-oformat\fR options, the
+\&\f(CW\*(C`TARGET\*(C'\fR command in linker scripts, and the \f(CW\*(C`GNUTARGET\*(C'\fR
+environment variable.
+The \s-1GNU\s0 linker will ignore the \fB\-F\fR option when not
+creating an \s-1ELF\s0 shared object.
+.IP "\fB\-fini=\fR\fIname\fR" 4
+.IX Item "-fini=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is unloaded, by setting \s-1DT_FINI\s0 to the
+address of the function. By default, the linker uses \f(CW\*(C`_fini\*(C'\fR as
+the function to call.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Ignored. Provided for compatibility with other tools.
+.IP "\fB\-G\fR \fIvalue\fR" 4
+.IX Item "-G value"
+.PD 0
+.IP "\fB\-\-gpsize=\fR\fIvalue\fR" 4
+.IX Item "--gpsize=value"
+.PD
+Set the maximum size of objects to be optimized using the \s-1GP\s0 register to
+\&\fIsize\fR. This is only meaningful for object file formats such as
+\&\s-1MIPS\s0 \s-1ECOFF\s0 which supports putting large and small objects into different
+sections. This is ignored for other object file formats.
+.IP "\fB\-h\fR \fIname\fR" 4
+.IX Item "-h name"
+.PD 0
+.IP "\fB\-soname=\fR\fIname\fR" 4
+.IX Item "-soname=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_SONAME\s0 field to
+the specified name. When an executable is linked with a shared object
+which has a \s-1DT_SONAME\s0 field, then when the executable is run the dynamic
+linker will attempt to load the shared object specified by the \s-1DT_SONAME\s0
+field rather than the using the file name given to the linker.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+Perform an incremental link (same as option \fB\-r\fR).
+.IP "\fB\-init=\fR\fIname\fR" 4
+.IX Item "-init=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is loaded, by setting \s-1DT_INIT\s0 to the address
+of the function. By default, the linker uses \f(CW\*(C`_init\*(C'\fR as the
+function to call.
+.IP "\fB\-l\fR \fInamespec\fR" 4
+.IX Item "-l namespec"
+.PD 0
+.IP "\fB\-\-library=\fR\fInamespec\fR" 4
+.IX Item "--library=namespec"
+.PD
+Add the archive or object file specified by \fInamespec\fR to the
+list of files to link. This option may be used any number of times.
+If \fInamespec\fR is of the form \fI:\fIfilename\fI\fR, \fBld\fR
+will search the library path for a file called \fIfilename\fR, otherwise it
+will search the library path for a file called \fIlib\fInamespec\fI.a\fR.
+.Sp
+On systems which support shared libraries, \fBld\fR may also search for
+files other than \fIlib\fInamespec\fI.a\fR. Specifically, on \s-1ELF\s0
+and SunOS systems, \fBld\fR will search a directory for a library
+called \fIlib\fInamespec\fI.so\fR before searching for one called
+\&\fIlib\fInamespec\fI.a\fR. (By convention, a \f(CW\*(C`.so\*(C'\fR extension
+indicates a shared library.) Note that this behavior does not apply
+to \fI:\fIfilename\fI\fR, which always specifies a file called
+\&\fIfilename\fR.
+.Sp
+The linker will search an archive only once, at the location where it is
+specified on the command line. If the archive defines a symbol which
+was undefined in some object which appeared before the archive on the
+command line, the linker will include the appropriate file(s) from the
+archive. However, an undefined symbol in an object appearing later on
+the command line will not cause the linker to search the archive again.
+.Sp
+See the \fB\-(\fR option for a way to force the linker to search
+archives multiple times.
+.Sp
+You may list the same archive multiple times on the command line.
+.Sp
+This type of archive searching is standard for Unix linkers. However,
+if you are using \fBld\fR on \s-1AIX\s0, note that it is different from the
+behaviour of the \s-1AIX\s0 linker.
+.IP "\fB\-L\fR \fIsearchdir\fR" 4
+.IX Item "-L searchdir"
+.PD 0
+.IP "\fB\-\-library\-path=\fR\fIsearchdir\fR" 4
+.IX Item "--library-path=searchdir"
+.PD
+Add path \fIsearchdir\fR to the list of paths that \fBld\fR will search
+for archive libraries and \fBld\fR control scripts. You may use this
+option any number of times. The directories are searched in the order
+in which they are specified on the command line. Directories specified
+on the command line are searched before the default directories. All
+\&\fB\-L\fR options apply to all \fB\-l\fR options, regardless of the
+order in which the options appear. \fB\-L\fR options do not affect
+how \fBld\fR searches for a linker script unless \fB\-T\fR
+option is specified.
+.Sp
+If \fIsearchdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the \fIsysroot prefix\fR, a path specified when the linker is configured.
+.Sp
+The default set of paths searched (without being specified with
+\&\fB\-L\fR) depends on which emulation mode \fBld\fR is using, and in
+some cases also on how it was configured.
+.Sp
+The paths can also be specified in a link script with the
+\&\f(CW\*(C`SEARCH_DIR\*(C'\fR command. Directories specified this way are searched
+at the point in which the linker script appears in the command line.
+.IP "\fB\-m\fR \fIemulation\fR" 4
+.IX Item "-m emulation"
+Emulate the \fIemulation\fR linker. You can list the available
+emulations with the \fB\-\-verbose\fR or \fB\-V\fR options.
+.Sp
+If the \fB\-m\fR option is not used, the emulation is taken from the
+\&\f(CW\*(C`LDEMULATION\*(C'\fR environment variable, if that is defined.
+.Sp
+Otherwise, the default emulation depends upon how the linker was
+configured.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+.PD 0
+.IP "\fB\-\-print\-map\fR" 4
+.IX Item "--print-map"
+.PD
+Print a link map to the standard output. A link map provides
+information about the link, including the following:
+.RS 4
+.IP "\(bu" 4
+Where object files are mapped into memory.
+.IP "\(bu" 4
+How common symbols are allocated.
+.IP "\(bu" 4
+All archive members included in the link, with a mention of the symbol
+which caused the archive member to be brought in.
+.IP "\(bu" 4
+The values assigned to symbols.
+.Sp
+Note \- symbols whose values are computed by an expression which
+involves a reference to a previous value of the same symbol may not
+have correct result displayed in the link map. This is because the
+linker discards intermediate results and only retains the final value
+of an expression. Under such circumstances the linker will display
+the final value enclosed by square brackets. Thus for example a
+linker script containing:
+.Sp
+.Vb 3
+\& foo = 1
+\& foo = foo * 4
+\& foo = foo + 8
+.Ve
+.Sp
+will produce the following output in the link map if the \fB\-M\fR
+option is used:
+.Sp
+.Vb 3
+\& 0x00000001 foo = 0x1
+\& [0x0000000c] foo = (foo * 0x4)
+\& [0x0000000c] foo = (foo + 0x8)
+.Ve
+.Sp
+See \fBExpressions\fR for more information about expressions in linker
+scripts.
+.RE
+.RS 4
+.RE
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nmagic\fR" 4
+.IX Item "--nmagic"
+.PD
+Turn off page alignment of sections, and mark the output as
+\&\f(CW\*(C`NMAGIC\*(C'\fR if possible.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+.PD 0
+.IP "\fB\-\-omagic\fR" 4
+.IX Item "--omagic"
+.PD
+Set the text and data sections to be readable and writable. Also, do
+not page-align the data segment, and disable linking against shared
+libraries. If the output format supports Unix style magic numbers,
+mark the output as \f(CW\*(C`OMAGIC\*(C'\fR. Note: Although a writable text section
+is allowed for PE-COFF targets, it does not conform to the format
+specification published by Microsoft.
+.IP "\fB\-\-no\-omagic\fR" 4
+.IX Item "--no-omagic"
+This option negates most of the effects of the \fB\-N\fR option. It
+sets the text section to be read-only, and forces the data segment to
+be page-aligned. Note \- this option does not enable linking against
+shared libraries. Use \fB\-Bdynamic\fR for this.
+.IP "\fB\-o\fR \fIoutput\fR" 4
+.IX Item "-o output"
+.PD 0
+.IP "\fB\-\-output=\fR\fIoutput\fR" 4
+.IX Item "--output=output"
+.PD
+Use \fIoutput\fR as the name for the program produced by \fBld\fR; if this
+option is not specified, the name \fIa.out\fR is used by default. The
+script command \f(CW\*(C`OUTPUT\*(C'\fR can also specify the output file name.
+.IP "\fB\-O\fR \fIlevel\fR" 4
+.IX Item "-O level"
+If \fIlevel\fR is a numeric values greater than zero \fBld\fR optimizes
+the output. This might take significantly longer and therefore probably
+should only be enabled for the final binary. At the moment this
+option only affects \s-1ELF\s0 shared library generation. Future releases of
+the linker may make more use of this option. Also currently there is
+no difference in the linker's behaviour for different non-zero values
+of this option. Again this may change with future releases.
+.IP "\fB\-q\fR" 4
+.IX Item "-q"
+.PD 0
+.IP "\fB\-\-emit\-relocs\fR" 4
+.IX Item "--emit-relocs"
+.PD
+Leave relocation sections and contents in fully linked executables.
+Post link analysis and optimization tools may need this information in
+order to perform correct modifications of executables. This results
+in larger executables.
+.Sp
+This option is currently only supported on \s-1ELF\s0 platforms.
+.IP "\fB\-\-force\-dynamic\fR" 4
+.IX Item "--force-dynamic"
+Force the output file to have dynamic sections. This option is specific
+to VxWorks targets.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocatable\fR" 4
+.IX Item "--relocatable"
+.PD
+Generate relocatable output\-\-\-i.e., generate an output file that can in
+turn serve as input to \fBld\fR. This is often called \fIpartial
+linking\fR. As a side effect, in environments that support standard Unix
+magic numbers, this option also sets the output file's magic number to
+\&\f(CW\*(C`OMAGIC\*(C'\fR.
+If this option is not specified, an absolute file is produced. When
+linking \*(C+ programs, this option \fIwill not\fR resolve references to
+constructors; to do that, use \fB\-Ur\fR.
+.Sp
+When an input file does not have the same format as the output file,
+partial linking is only supported if that input file does not contain any
+relocations. Different output formats can have further restrictions; for
+example some \f(CW\*(C`a.out\*(C'\fR\-based formats do not support partial linking
+with input files in other formats at all.
+.Sp
+This option does the same thing as \fB\-i\fR.
+.IP "\fB\-R\fR \fIfilename\fR" 4
+.IX Item "-R filename"
+.PD 0
+.IP "\fB\-\-just\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--just-symbols=filename"
+.PD
+Read symbol names and their addresses from \fIfilename\fR, but do not
+relocate it or include it in the output. This allows your output file
+to refer symbolically to absolute locations of memory defined in other
+programs. You may use this option more than once.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Omit all symbol information from the output file.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Omit debugger symbol information (but not all symbols) from the output file.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-trace\fR" 4
+.IX Item "--trace"
+.PD
+Print the names of the input files as \fBld\fR processes them.
+.IP "\fB\-T\fR \fIscriptfile\fR" 4
+.IX Item "-T scriptfile"
+.PD 0
+.IP "\fB\-\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the linker script. This script replaces
+\&\fBld\fR's default linker script (rather than adding to it), so
+\&\fIcommandfile\fR must specify everything necessary to describe the
+output file. If \fIscriptfile\fR does not exist in
+the current directory, \f(CW\*(C`ld\*(C'\fR looks for it in the directories
+specified by any preceding \fB\-L\fR options. Multiple \fB\-T\fR
+options accumulate.
+.IP "\fB\-dT\fR \fIscriptfile\fR" 4
+.IX Item "-dT scriptfile"
+.PD 0
+.IP "\fB\-\-default\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--default-script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the default linker script.
+.Sp
+This option is similar to the \fB\-\-script\fR option except that
+processing of the script is delayed until after the rest of the
+command line has been processed. This allows options placed after the
+\&\fB\-\-default\-script\fR option on the command line to affect the
+behaviour of the linker script, which can be important when the linker
+command line cannot be directly controlled by the user. (eg because
+the command line is being constructed by another tool, such as
+\&\fBgcc\fR).
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+.PD 0
+.IP "\fB\-\-undefined=\fR\fIsymbol\fR" 4
+.IX Item "--undefined=symbol"
+.PD
+Force \fIsymbol\fR to be entered in the output file as an undefined
+symbol. Doing this may, for example, trigger linking of additional
+modules from standard libraries. \fB\-u\fR may be repeated with
+different option arguments to enter additional undefined symbols. This
+option is equivalent to the \f(CW\*(C`EXTERN\*(C'\fR linker script command.
+.IP "\fB\-Ur\fR" 4
+.IX Item "-Ur"
+For anything other than \*(C+ programs, this option is equivalent to
+\&\fB\-r\fR: it generates relocatable output\-\-\-i.e., an output file that can in
+turn serve as input to \fBld\fR. When linking \*(C+ programs, \fB\-Ur\fR
+\&\fIdoes\fR resolve references to constructors, unlike \fB\-r\fR.
+It does not work to use \fB\-Ur\fR on files that were themselves linked
+with \fB\-Ur\fR; once the constructor table has been built, it cannot
+be added to. Use \fB\-Ur\fR only for the last partial link, and
+\&\fB\-r\fR for the others.
+.IP "\fB\-\-unique[=\fR\fI\s-1SECTION\s0\fR\fB]\fR" 4
+.IX Item "--unique[=SECTION]"
+Creates a separate output section for every input section matching
+\&\fI\s-1SECTION\s0\fR, or if the optional wildcard \fI\s-1SECTION\s0\fR argument is
+missing, for every orphan input section. An orphan section is one not
+specifically mentioned in a linker script. You may use this option
+multiple times on the command line; It prevents the normal merging of
+input sections with the same name, overriding output section assignments
+in a linker script.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD
+Display the version number for \fBld\fR. The \fB\-V\fR option also
+lists the supported emulations.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Delete all local symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Delete all temporary local symbols. (These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.)
+.IP "\fB\-y\fR \fIsymbol\fR" 4
+.IX Item "-y symbol"
+.PD 0
+.IP "\fB\-\-trace\-symbol=\fR\fIsymbol\fR" 4
+.IX Item "--trace-symbol=symbol"
+.PD
+Print the name of each linked file in which \fIsymbol\fR appears. This
+option may be given any number of times. On many systems it is necessary
+to prepend an underscore.
+.Sp
+This option is useful when you have an undefined symbol in your link but
+don't know where the reference is coming from.
+.IP "\fB\-Y\fR \fIpath\fR" 4
+.IX Item "-Y path"
+Add \fIpath\fR to the default library search path. This option exists
+for Solaris compatibility.
+.IP "\fB\-z\fR \fIkeyword\fR" 4
+.IX Item "-z keyword"
+The recognized keywords are:
+.RS 4
+.IP "\fBcombreloc\fR" 4
+.IX Item "combreloc"
+Combines multiple reloc sections and sorts them to make dynamic symbol
+lookup caching possible.
+.IP "\fBdefs\fR" 4
+.IX Item "defs"
+Disallows undefined symbols in object files. Undefined symbols in
+shared libraries are still allowed.
+.IP "\fBexecstack\fR" 4
+.IX Item "execstack"
+Marks the object as requiring executable stack.
+.IP "\fBinitfirst\fR" 4
+.IX Item "initfirst"
+This option is only meaningful when building a shared object.
+It marks the object so that its runtime initialization will occur
+before the runtime initialization of any other objects brought into
+the process at the same time. Similarly the runtime finalization of
+the object will occur after the runtime finalization of any other
+objects.
+.IP "\fBinterpose\fR" 4
+.IX Item "interpose"
+Marks the object that its symbol table interposes before all symbols
+but the primary executable.
+.IP "\fBlazy\fR" 4
+.IX Item "lazy"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to defer function call resolution to the point when
+the function is called (lazy binding), rather than at load time.
+Lazy binding is the default.
+.IP "\fBloadfltr\fR" 4
+.IX Item "loadfltr"
+Marks the object that its filters be processed immediately at
+runtime.
+.IP "\fBmuldefs\fR" 4
+.IX Item "muldefs"
+Allows multiple definitions.
+.IP "\fBnocombreloc\fR" 4
+.IX Item "nocombreloc"
+Disables multiple reloc sections combining.
+.IP "\fBnocopyreloc\fR" 4
+.IX Item "nocopyreloc"
+Disables production of copy relocs.
+.IP "\fBnodefaultlib\fR" 4
+.IX Item "nodefaultlib"
+Marks the object that the search for dependencies of this object will
+ignore any default library search paths.
+.IP "\fBnodelete\fR" 4
+.IX Item "nodelete"
+Marks the object shouldn't be unloaded at runtime.
+.IP "\fBnodlopen\fR" 4
+.IX Item "nodlopen"
+Marks the object not available to \f(CW\*(C`dlopen\*(C'\fR.
+.IP "\fBnodump\fR" 4
+.IX Item "nodump"
+Marks the object can not be dumped by \f(CW\*(C`dldump\*(C'\fR.
+.IP "\fBnoexecstack\fR" 4
+.IX Item "noexecstack"
+Marks the object as not requiring executable stack.
+.IP "\fBnorelro\fR" 4
+.IX Item "norelro"
+Don't create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBnow\fR" 4
+.IX Item "now"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to resolve all symbols when the program is started, or
+when the shared library is linked to using dlopen, instead of
+deferring function call resolution to the point when the function is
+first called.
+.IP "\fBorigin\fR" 4
+.IX Item "origin"
+Marks the object may contain \f(CW$ORIGIN\fR.
+.IP "\fBrelro\fR" 4
+.IX Item "relro"
+Create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBmax\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "max-page-size=value"
+Set the emulation maximum page size to \fIvalue\fR.
+.IP "\fBcommon\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "common-page-size=value"
+Set the emulation common page size to \fIvalue\fR.
+.RE
+.RS 4
+.Sp
+Other keywords are ignored for Solaris compatibility.
+.RE
+.IP "\fB\-(\fR \fIarchives\fR \fB\-)\fR" 4
+.IX Item "-( archives -)"
+.PD 0
+.IP "\fB\-\-start\-group\fR \fIarchives\fR \fB\-\-end\-group\fR" 4
+.IX Item "--start-group archives --end-group"
+.PD
+The \fIarchives\fR should be a list of archive files. They may be
+either explicit file names, or \fB\-l\fR options.
+.Sp
+The specified archives are searched repeatedly until no new undefined
+references are created. Normally, an archive is searched only once in
+the order that it is specified on the command line. If a symbol in that
+archive is needed to resolve an undefined symbol referred to by an
+object in an archive that appears later on the command line, the linker
+would not be able to resolve that reference. By grouping the archives,
+they all be searched repeatedly until all possible references are
+resolved.
+.Sp
+Using this option has a significant performance cost. It is best to use
+it only when there are unavoidable circular references between two or
+more archives.
+.IP "\fB\-\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--accept-unknown-input-arch"
+.PD 0
+.IP "\fB\-\-no\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--no-accept-unknown-input-arch"
+.PD
+Tells the linker to accept input files whose architecture cannot be
+recognised. The assumption is that the user knows what they are doing
+and deliberately wants to link in these unknown input files. This was
+the default behaviour of the linker, before release 2.14. The default
+behaviour from release 2.14 onwards is to reject such input files, and
+so the \fB\-\-accept\-unknown\-input\-arch\fR option has been added to
+restore the old behaviour.
+.IP "\fB\-\-as\-needed\fR" 4
+.IX Item "--as-needed"
+.PD 0
+.IP "\fB\-\-no\-as\-needed\fR" 4
+.IX Item "--no-as-needed"
+.PD
+This option affects \s-1ELF\s0 \s-1DT_NEEDED\s0 tags for dynamic libraries mentioned
+on the command line after the \fB\-\-as\-needed\fR option. Normally,
+the linker will add a \s-1DT_NEEDED\s0 tag for each dynamic library mentioned
+on the command line, regardless of whether the library is actually
+needed. \fB\-\-as\-needed\fR causes a \s-1DT_NEEDED\s0 tag to only be emitted
+for a library that satisfies a symbol reference from regular objects
+which is undefined at the point that the library was linked, or, if
+the library is not found in the \s-1DT_NEEDED\s0 lists of other libraries
+linked up to that point, a reference from another dynamic library.
+\&\fB\-\-no\-as\-needed\fR restores the default behaviour.
+.IP "\fB\-\-add\-needed\fR" 4
+.IX Item "--add-needed"
+.PD 0
+.IP "\fB\-\-no\-add\-needed\fR" 4
+.IX Item "--no-add-needed"
+.PD
+This option affects the treatment of dynamic libraries from \s-1ELF\s0
+\&\s-1DT_NEEDED\s0 tags in dynamic libraries mentioned on the command line after
+the \fB\-\-no\-add\-needed\fR option. Normally, the linker will add
+a \s-1DT_NEEDED\s0 tag for each dynamic library from \s-1DT_NEEDED\s0 tags.
+\&\fB\-\-no\-add\-needed\fR causes \s-1DT_NEEDED\s0 tags will never be emitted
+for those libraries from \s-1DT_NEEDED\s0 tags. \fB\-\-add\-needed\fR restores
+the default behaviour.
+.IP "\fB\-assert\fR \fIkeyword\fR" 4
+.IX Item "-assert keyword"
+This option is ignored for SunOS compatibility.
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD 0
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+.IP "\fB\-call_shared\fR" 4
+.IX Item "-call_shared"
+.PD
+Link against dynamic libraries. This is only meaningful on platforms
+for which shared libraries are supported. This option is normally the
+default on such platforms. The different variants of this option are
+for compatibility with various systems. You may use this option
+multiple times on the command line: it affects library searching for
+\&\fB\-l\fR options which follow it.
+.IP "\fB\-Bgroup\fR" 4
+.IX Item "-Bgroup"
+Set the \f(CW\*(C`DF_1_GROUP\*(C'\fR flag in the \f(CW\*(C`DT_FLAGS_1\*(C'\fR entry in the dynamic
+section. This causes the runtime linker to handle lookups in this
+object and its dependencies to be performed only inside the group.
+\&\fB\-\-unresolved\-symbols=report\-all\fR is implied. This option is
+only meaningful on \s-1ELF\s0 platforms which support shared libraries.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-dn\fR" 4
+.IX Item "-dn"
+.IP "\fB\-non_shared\fR" 4
+.IX Item "-non_shared"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.PD
+Do not link against shared libraries. This is only meaningful on
+platforms for which shared libraries are supported. The different
+variants of this option are for compatibility with various systems. You
+may use this option multiple times on the command line: it affects
+library searching for \fB\-l\fR options which follow it. This
+option also implies \fB\-\-unresolved\-symbols=report\-all\fR. This
+option can be used with \fB\-shared\fR. Doing so means that a
+shared library is being created but that all of the library's external
+references must be resolved by pulling in entries from static
+libraries.
+.IP "\fB\-Bsymbolic\fR" 4
+.IX Item "-Bsymbolic"
+When creating a shared library, bind references to global symbols to the
+definition within the shared library, if any. Normally, it is possible
+for a program linked against a shared library to override the definition
+within the shared library. This option is only meaningful on \s-1ELF\s0
+platforms which support shared libraries.
+.IP "\fB\-Bsymbolic\-functions\fR" 4
+.IX Item "-Bsymbolic-functions"
+When creating a shared library, bind references to global function
+symbols to the definition within the shared library, if any.
+This option is only meaningful on \s-1ELF\s0 platforms which support shared
+libraries.
+.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4
+.IX Item "--dynamic-list=dynamic-list-file"
+Specify the name of a dynamic list file to the linker. This is
+typically used when creating shared libraries to specify a list of
+global symbols whose references shouldn't be bound to the definition
+within the shared library, or creating dynamically linked executables
+to specify a list of symbols which should be added to the symbol table
+in the executable. This option is only meaningful on \s-1ELF\s0 platforms
+which support shared libraries.
+.Sp
+The format of the dynamic list is the same as the version node without
+scope and node name. See \fB\s-1VERSION\s0\fR for more information.
+.IP "\fB\-\-dynamic\-list\-data\fR" 4
+.IX Item "--dynamic-list-data"
+Include all global data symbols to the dynamic list.
+.IP "\fB\-\-dynamic\-list\-cpp\-new\fR" 4
+.IX Item "--dynamic-list-cpp-new"
+Provide the builtin dynamic list for \*(C+ operator new and delete. It
+is mainly useful for building shared libstdc++.
+.IP "\fB\-\-dynamic\-list\-cpp\-typeinfo\fR" 4
+.IX Item "--dynamic-list-cpp-typeinfo"
+Provide the builtin dynamic list for \*(C+ runtime type identification.
+.IP "\fB\-\-check\-sections\fR" 4
+.IX Item "--check-sections"
+.PD 0
+.IP "\fB\-\-no\-check\-sections\fR" 4
+.IX Item "--no-check-sections"
+.PD
+Asks the linker \fInot\fR to check section addresses after they have
+been assigned to see if there are any overlaps. Normally the linker will
+perform this check, and if it finds any overlaps it will produce
+suitable error messages. The linker does know about, and does make
+allowances for sections in overlays. The default behaviour can be
+restored by using the command line switch \fB\-\-check\-sections\fR.
+Section overlap is not usually checked for relocatable links. You can
+force checking in that case by using the \fB\-\-check\-sections\fR
+option.
+.IP "\fB\-\-cref\fR" 4
+.IX Item "--cref"
+Output a cross reference table. If a linker map file is being
+generated, the cross reference table is printed to the map file.
+Otherwise, it is printed on the standard output.
+.Sp
+The format of the table is intentionally simple, so that it may be
+easily processed by a script if necessary. The symbols are printed out,
+sorted by name. For each symbol, a list of file names is given. If the
+symbol is defined, the first file listed is the location of the
+definition. The remaining files contain references to the symbol.
+.IP "\fB\-\-no\-define\-common\fR" 4
+.IX Item "--no-define-common"
+This option inhibits the assignment of addresses to common symbols.
+The script command \f(CW\*(C`INHIBIT_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.Sp
+The \fB\-\-no\-define\-common\fR option allows decoupling
+the decision to assign addresses to Common symbols from the choice
+of the output file type; otherwise a non-Relocatable output type
+forces assigning addresses to Common symbols.
+Using \fB\-\-no\-define\-common\fR allows Common symbols that are referenced
+from a shared library to be assigned addresses only in the main program.
+This eliminates the unused duplicate space in the shared library,
+and also prevents any possible confusion over resolving to the wrong
+duplicate when there are many dynamic modules with specialized search
+paths for runtime symbol resolution.
+.IP "\fB\-\-defsym=\fR\fIsymbol\fR\fB=\fR\fIexpression\fR" 4
+.IX Item "--defsym=symbol=expression"
+Create a global symbol in the output file, containing the absolute
+address given by \fIexpression\fR. You may use this option as many
+times as necessary to define multiple symbols in the command line. A
+limited form of arithmetic is supported for the \fIexpression\fR in this
+context: you may give a hexadecimal constant or the name of an existing
+symbol, or use \f(CW\*(C`+\*(C'\fR and \f(CW\*(C`\-\*(C'\fR to add or subtract hexadecimal
+constants or symbols. If you need more elaborate expressions, consider
+using the linker command language from a script. \fINote:\fR there should be no white
+space between \fIsymbol\fR, the equals sign ("\fB=\fR"), and
+\&\fIexpression\fR.
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether to demangle symbol names in error messages
+and other output. When the linker is told to demangle, it tries to
+present symbol names in a readable fashion: it strips leading
+underscores if they are used by the object file format, and converts \*(C+
+mangled symbol names into user readable names. Different compilers have
+different mangling styles. The optional demangling style argument can be used
+to choose an appropriate demangling style for your compiler. The linker will
+demangle by default unless the environment variable \fB\s-1COLLECT_NO_DEMANGLE\s0\fR
+is set. These options may be used to override the default.
+.IP "\fB\-I\fR\fIfile\fR" 4
+.IX Item "-Ifile"
+.PD 0
+.IP "\fB\-\-dynamic\-linker=\fR\fIfile\fR" 4
+.IX Item "--dynamic-linker=file"
+.PD
+Set the name of the dynamic linker. This is only meaningful when
+generating dynamically linked \s-1ELF\s0 executables. The default dynamic
+linker is normally correct; don't use this unless you know what you are
+doing.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+.PD 0
+.IP "\fB\-\-no\-fatal\-warnings\fR" 4
+.IX Item "--no-fatal-warnings"
+.PD
+Treat all warnings as errors. The default behaviour can be restored
+with the option \fB\-\-no\-fatal\-warnings\fR.
+.IP "\fB\-\-force\-exe\-suffix\fR" 4
+.IX Item "--force-exe-suffix"
+Make sure that an output file has a .exe suffix.
+.Sp
+If a successfully built fully linked output file does not have a
+\&\f(CW\*(C`.exe\*(C'\fR or \f(CW\*(C`.dll\*(C'\fR suffix, this option forces the linker to copy
+the output file to one of the same name with a \f(CW\*(C`.exe\*(C'\fR suffix. This
+option is useful when using unmodified Unix makefiles on a Microsoft
+Windows host, since some versions of Windows won't run an image unless
+it ends in a \f(CW\*(C`.exe\*(C'\fR suffix.
+.IP "\fB\-\-gc\-sections\fR" 4
+.IX Item "--gc-sections"
+.PD 0
+.IP "\fB\-\-no\-gc\-sections\fR" 4
+.IX Item "--no-gc-sections"
+.PD
+Enable garbage collection of unused input sections. It is ignored on
+targets that do not support this option. The default behaviour (of not
+performing this garbage collection) can be restored by specifying
+\&\fB\-\-no\-gc\-sections\fR on the command line.
+.Sp
+\&\fB\-\-gc\-sections\fR decides which input sections are used by
+examining symbols and relocations. The section containing the entry
+symbol and all sections containing symbols undefined on the
+command-line will be kept, as will sections containing symbols
+referenced by dynamic objects. Note that when building shared
+libraries, the linker must assume that any visible symbol is
+referenced. Once this initial set of sections has been determined,
+the linker recursively marks as used any section referenced by their
+relocations. See \fB\-\-entry\fR and \fB\-\-undefined\fR.
+.Sp
+This option can be set when doing a partial link (enabled with option
+\&\fB\-r\fR). In this case the root of symbols kept must be explicitely
+specified either by an \fB\-\-entry\fR or \fB\-\-undefined\fR option or by
+a \f(CW\*(C`ENTRY\*(C'\fR command in the linker script.
+.IP "\fB\-\-print\-gc\-sections\fR" 4
+.IX Item "--print-gc-sections"
+.PD 0
+.IP "\fB\-\-no\-print\-gc\-sections\fR" 4
+.IX Item "--no-print-gc-sections"
+.PD
+List all sections removed by garbage collection. The listing is
+printed on stderr. This option is only effective if garbage
+collection has been enabled via the \fB\-\-gc\-sections\fR) option. The
+default behaviour (of not listing the sections that are removed) can
+be restored by specifying \fB\-\-no\-print\-gc\-sections\fR on the command
+line.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command-line options on the standard output and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options on the standard output and exit.
+.IP "\fB\-Map=\fR\fImapfile\fR" 4
+.IX Item "-Map=mapfile"
+Print a link map to the file \fImapfile\fR. See the description of the
+\&\fB\-M\fR option, above.
+.IP "\fB\-\-no\-keep\-memory\fR" 4
+.IX Item "--no-keep-memory"
+\&\fBld\fR normally optimizes for speed over memory usage by caching the
+symbol tables of input files in memory. This option tells \fBld\fR to
+instead optimize for memory usage, by rereading the symbol tables as
+necessary. This may be required if \fBld\fR runs out of memory space
+while linking a large executable.
+.IP "\fB\-\-no\-undefined\fR" 4
+.IX Item "--no-undefined"
+.PD 0
+.IP "\fB\-z defs\fR" 4
+.IX Item "-z defs"
+.PD
+Report unresolved symbol references from regular object files. This
+is done even if the linker is creating a non-symbolic shared library.
+The switch \fB\-\-[no\-]allow\-shlib\-undefined\fR controls the
+behaviour for reporting unresolved references found in shared
+libraries being linked in.
+.IP "\fB\-\-allow\-multiple\-definition\fR" 4
+.IX Item "--allow-multiple-definition"
+.PD 0
+.IP "\fB\-z muldefs\fR" 4
+.IX Item "-z muldefs"
+.PD
+Normally when a symbol is defined multiple times, the linker will
+report a fatal error. These options allow multiple definitions and the
+first definition will be used.
+.IP "\fB\-\-allow\-shlib\-undefined\fR" 4
+.IX Item "--allow-shlib-undefined"
+.PD 0
+.IP "\fB\-\-no\-allow\-shlib\-undefined\fR" 4
+.IX Item "--no-allow-shlib-undefined"
+.PD
+Allows or disallows undefined symbols in shared libraries.
+This switch is similar to \fB\-\-no\-undefined\fR except that it
+determines the behaviour when the undefined symbols are in a
+shared library rather than a regular object file. It does not affect
+how undefined symbols in regular object files are handled.
+.Sp
+The default behaviour is to report errors for any undefined symbols
+referenced in shared libraries if the linker is being used to create
+an executable, but to allow them if the linker is being used to create
+a shared library.
+.Sp
+The reasons for allowing undefined symbol references in shared
+libraries specified at link time are that:
+.RS 4
+.IP "\(bu" 4
+A shared library specified at link time may not be the same as the one
+that is available at load time, so the symbol might actually be
+resolvable at load time.
+.IP "\(bu" 4
+There are some operating systems, eg BeOS and \s-1HPPA\s0, where undefined
+symbols in shared libraries are normal.
+.Sp
+The BeOS kernel for example patches shared libraries at load time to
+select whichever function is most appropriate for the current
+architecture. This is used, for example, to dynamically select an
+appropriate memset function.
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-no\-undefined\-version\fR" 4
+.IX Item "--no-undefined-version"
+Normally when a symbol has an undefined version, the linker will ignore
+it. This option disallows symbols with undefined version and a fatal error
+will be issued instead.
+.IP "\fB\-\-default\-symver\fR" 4
+.IX Item "--default-symver"
+Create and use a default symbol version (the soname) for unversioned
+exported symbols.
+.IP "\fB\-\-default\-imported\-symver\fR" 4
+.IX Item "--default-imported-symver"
+Create and use a default symbol version (the soname) for unversioned
+imported symbols.
+.IP "\fB\-\-no\-warn\-mismatch\fR" 4
+.IX Item "--no-warn-mismatch"
+Normally \fBld\fR will give an error if you try to link together input
+files that are mismatched for some reason, perhaps because they have
+been compiled for different processors or for different endiannesses.
+This option tells \fBld\fR that it should silently permit such possible
+errors. This option should only be used with care, in cases when you
+have taken some special action that ensures that the linker errors are
+inappropriate.
+.IP "\fB\-\-no\-warn\-search\-mismatch\fR" 4
+.IX Item "--no-warn-search-mismatch"
+Normally \fBld\fR will give a warning if it finds an incompatible
+library during a library search. This option silences the warning.
+.IP "\fB\-\-no\-whole\-archive\fR" 4
+.IX Item "--no-whole-archive"
+Turn off the effect of the \fB\-\-whole\-archive\fR option for subsequent
+archive files.
+.IP "\fB\-\-noinhibit\-exec\fR" 4
+.IX Item "--noinhibit-exec"
+Retain the executable output file whenever it is still usable.
+Normally, the linker will not produce an output file if it encounters
+errors during the link process; it exits without writing an output file
+when it issues any error whatsoever.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Only search library directories explicitly specified on the
+command line. Library directories specified in linker scripts
+(including linker scripts specified on the command line) are ignored.
+.IP "\fB\-\-oformat=\fR\fIoutput-format\fR" 4
+.IX Item "--oformat=output-format"
+\&\fBld\fR may be configured to support more than one kind of object
+file. If your \fBld\fR is configured this way, you can use the
+\&\fB\-\-oformat\fR option to specify the binary format for the output
+object file. Even when \fBld\fR is configured to support alternative
+object formats, you don't usually need to specify this, as \fBld\fR
+should be configured to produce as a default output format the most
+usual format on each machine. \fIoutput-format\fR is a text string, the
+name of a particular format supported by the \s-1BFD\s0 libraries. (You can
+list the available binary formats with \fBobjdump \-i\fR.) The script
+command \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR can also specify the output format, but
+this option overrides it.
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+.PD 0
+.IP "\fB\-\-pic\-executable\fR" 4
+.IX Item "--pic-executable"
+.PD
+Create a position independent executable. This is currently only supported on
+\&\s-1ELF\s0 platforms. Position independent executables are similar to shared
+libraries in that they are relocated by the dynamic linker to the virtual
+address the \s-1OS\s0 chooses for them (which can vary between invocations). Like
+normal dynamically linked executables they can be executed and symbols
+defined in the executable cannot be overridden by shared libraries.
+.IP "\fB\-qmagic\fR" 4
+.IX Item "-qmagic"
+This option is ignored for Linux compatibility.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+This option is ignored for \s-1SVR4\s0 compatibility.
+.IP "\fB\-\-relax\fR" 4
+.IX Item "--relax"
+An option with machine dependent effects.
+This option is only supported on a few targets.
+.Sp
+On some platforms, the \fB\-\-relax\fR option performs global
+optimizations that become possible when the linker resolves addressing
+in the program, such as relaxing address modes and synthesizing new
+instructions in the output object file.
+.Sp
+On some platforms these link time global optimizations may make symbolic
+debugging of the resulting executable impossible.
+This is known to be
+the case for the Matsushita \s-1MN10200\s0 and \s-1MN10300\s0 family of processors.
+.Sp
+On platforms where this is not supported, \fB\-\-relax\fR is accepted,
+but ignored.
+.IP "\fB\-\-retain\-symbols\-file=\fR\fIfilename\fR" 4
+.IX Item "--retain-symbols-file=filename"
+Retain \fIonly\fR the symbols listed in the file \fIfilename\fR,
+discarding all others. \fIfilename\fR is simply a flat file, with one
+symbol name per line. This option is especially useful in environments
+(such as VxWorks)
+where a large global symbol table is accumulated gradually, to conserve
+run-time memory.
+.Sp
+\&\fB\-\-retain\-symbols\-file\fR does \fInot\fR discard undefined symbols,
+or symbols needed for relocations.
+.Sp
+You may only specify \fB\-\-retain\-symbols\-file\fR once in the command
+line. It overrides \fB\-s\fR and \fB\-S\fR.
+.IP "\fB\-rpath=\fR\fIdir\fR" 4
+.IX Item "-rpath=dir"
+Add a directory to the runtime library search path. This is used when
+linking an \s-1ELF\s0 executable with shared objects. All \fB\-rpath\fR
+arguments are concatenated and passed to the runtime linker, which uses
+them to locate shared objects at runtime. The \fB\-rpath\fR option is
+also used when locating shared objects which are needed by shared
+objects explicitly included in the link; see the description of the
+\&\fB\-rpath\-link\fR option. If \fB\-rpath\fR is not used when linking an
+\&\s-1ELF\s0 executable, the contents of the environment variable
+\&\f(CW\*(C`LD_RUN_PATH\*(C'\fR will be used if it is defined.
+.Sp
+The \fB\-rpath\fR option may also be used on SunOS. By default, on
+SunOS, the linker will form a runtime search patch out of all the
+\&\fB\-L\fR options it is given. If a \fB\-rpath\fR option is used, the
+runtime search path will be formed exclusively using the \fB\-rpath\fR
+options, ignoring the \fB\-L\fR options. This can be useful when using
+gcc, which adds many \fB\-L\fR options which may be on \s-1NFS\s0 mounted
+file systems.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-rpath\-link=\fR\fIdir\fR" 4
+.IX Item "-rpath-link=dir"
+When using \s-1ELF\s0 or SunOS, one shared library may require another. This
+happens when an \f(CW\*(C`ld \-shared\*(C'\fR link includes a shared library as one
+of the input files.
+.Sp
+When the linker encounters such a dependency when doing a non-shared,
+non-relocatable link, it will automatically try to locate the required
+shared library and include it in the link, if it is not included
+explicitly. In such a case, the \fB\-rpath\-link\fR option
+specifies the first set of directories to search. The
+\&\fB\-rpath\-link\fR option may specify a sequence of directory names
+either by specifying a list of names separated by colons, or by
+appearing multiple times.
+.Sp
+This option should be used with caution as it overrides the search path
+that may have been hard compiled into a shared library. In such a case it
+is possible to use unintentionally a different search path than the
+runtime linker would do.
+.Sp
+The linker uses the following search paths to locate required shared
+libraries:
+.RS 4
+.IP "1." 4
+Any directories specified by \fB\-rpath\-link\fR options.
+.IP "2." 4
+Any directories specified by \fB\-rpath\fR options. The difference
+between \fB\-rpath\fR and \fB\-rpath\-link\fR is that directories
+specified by \fB\-rpath\fR options are included in the executable and
+used at runtime, whereas the \fB\-rpath\-link\fR option is only effective
+at link time. Searching \fB\-rpath\fR in this way is only supported
+by native linkers and cross linkers which have been configured with
+the \fB\-\-with\-sysroot\fR option.
+.IP "3." 4
+On an \s-1ELF\s0 system, for native linkers, if the \fB\-rpath\fR and
+\&\fB\-rpath\-link\fR options were not used, search the contents of the
+environment variable \f(CW\*(C`LD_RUN_PATH\*(C'\fR.
+.IP "4." 4
+On SunOS, if the \fB\-rpath\fR option was not used, search any
+directories specified using \fB\-L\fR options.
+.IP "5." 4
+For a native linker, the search the contents of the environment
+variable \f(CW\*(C`LD_LIBRARY_PATH\*(C'\fR.
+.IP "6." 4
+For a native \s-1ELF\s0 linker, the directories in \f(CW\*(C`DT_RUNPATH\*(C'\fR or
+\&\f(CW\*(C`DT_RPATH\*(C'\fR of a shared library are searched for shared
+libraries needed by it. The \f(CW\*(C`DT_RPATH\*(C'\fR entries are ignored if
+\&\f(CW\*(C`DT_RUNPATH\*(C'\fR entries exist.
+.IP "7." 4
+The default directories, normally \fI/lib\fR and \fI/usr/lib\fR.
+.IP "8." 4
+For a native linker on an \s-1ELF\s0 system, if the file \fI/etc/ld.so.conf\fR
+exists, the list of directories found in that file.
+.RE
+.RS 4
+.Sp
+If the required shared library is not found, the linker will issue a
+warning and continue with the link.
+.RE
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+.PD 0
+.IP "\fB\-Bshareable\fR" 4
+.IX Item "-Bshareable"
+.PD
+Create a shared library. This is currently only supported on \s-1ELF\s0, \s-1XCOFF\s0
+and SunOS platforms. On SunOS, the linker will automatically create a
+shared library if the \fB\-e\fR option is not used and there are
+undefined symbols in the link.
+.IP "\fB\-\-sort\-common\fR" 4
+.IX Item "--sort-common"
+.PD 0
+.IP "\fB\-\-sort\-common=ascending\fR" 4
+.IX Item "--sort-common=ascending"
+.IP "\fB\-\-sort\-common=descending\fR" 4
+.IX Item "--sort-common=descending"
+.PD
+This option tells \fBld\fR to sort the common symbols by alignment in
+ascending or descending order when it places them in the appropriate output
+sections. The symbol alignments considered are sixteen-byte or larger,
+eight-byte, four-byte, two-byte, and one-byte. This is to prevent gaps
+between symbols due to alignment constraints. If no sorting order is
+specified, then descending order is assumed.
+.IP "\fB\-\-sort\-section=name\fR" 4
+.IX Item "--sort-section=name"
+This option will apply \f(CW\*(C`SORT_BY_NAME\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-sort\-section=alignment\fR" 4
+.IX Item "--sort-section=alignment"
+This option will apply \f(CW\*(C`SORT_BY_ALIGNMENT\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-split\-by\-file[=\fR\fIsize\fR\fB]\fR" 4
+.IX Item "--split-by-file[=size]"
+Similar to \fB\-\-split\-by\-reloc\fR but creates a new output section for
+each input file when \fIsize\fR is reached. \fIsize\fR defaults to a
+size of 1 if not given.
+.IP "\fB\-\-split\-by\-reloc[=\fR\fIcount\fR\fB]\fR" 4
+.IX Item "--split-by-reloc[=count]"
+Tries to creates extra sections in the output file so that no single
+output section in the file contains more than \fIcount\fR relocations.
+This is useful when generating huge relocatable files for downloading into
+certain real time kernels with the \s-1COFF\s0 object file format; since \s-1COFF\s0
+cannot represent more than 65535 relocations in a single section. Note
+that this will fail to work with object file formats which do not
+support arbitrary sections. The linker will not split up individual
+input sections for redistribution, so if a single input section contains
+more than \fIcount\fR relocations one output section will contain that
+many relocations. \fIcount\fR defaults to a value of 32768.
+.IP "\fB\-\-stats\fR" 4
+.IX Item "--stats"
+Compute and display statistics about the operation of the linker, such
+as execution time and memory usage.
+.IP "\fB\-\-sysroot=\fR\fIdirectory\fR" 4
+.IX Item "--sysroot=directory"
+Use \fIdirectory\fR as the location of the sysroot, overriding the
+configure-time default. This option is only supported by linkers
+that were configured using \fB\-\-with\-sysroot\fR.
+.IP "\fB\-\-traditional\-format\fR" 4
+.IX Item "--traditional-format"
+For some targets, the output of \fBld\fR is different in some ways from
+the output of some existing linker. This switch requests \fBld\fR to
+use the traditional format instead.
+.Sp
+For example, on SunOS, \fBld\fR combines duplicate entries in the
+symbol string table. This can reduce the size of an output file with
+full debugging information by over 30 percent. Unfortunately, the SunOS
+\&\f(CW\*(C`dbx\*(C'\fR program can not read the resulting program (\f(CW\*(C`gdb\*(C'\fR has no
+trouble). The \fB\-\-traditional\-format\fR switch tells \fBld\fR to not
+combine duplicate entries.
+.IP "\fB\-\-section\-start=\fR\fIsectionname\fR\fB=\fR\fIorg\fR" 4
+.IX Item "--section-start=sectionname=org"
+Locate a section in the output file at the absolute
+address given by \fIorg\fR. You may use this option as many
+times as necessary to locate multiple sections in the command
+line.
+\&\fIorg\fR must be a single hexadecimal integer;
+for compatibility with other linkers, you may omit the leading
+\&\fB0x\fR usually associated with hexadecimal values. \fINote:\fR there
+should be no white space between \fIsectionname\fR, the equals
+sign ("\fB=\fR"), and \fIorg\fR.
+.IP "\fB\-Tbss=\fR\fIorg\fR" 4
+.IX Item "-Tbss=org"
+.PD 0
+.IP "\fB\-Tdata=\fR\fIorg\fR" 4
+.IX Item "-Tdata=org"
+.IP "\fB\-Ttext=\fR\fIorg\fR" 4
+.IX Item "-Ttext=org"
+.PD
+Same as \fB\-\-section\-start\fR, with \f(CW\*(C`.bss\*(C'\fR, \f(CW\*(C`.data\*(C'\fR or
+\&\f(CW\*(C`.text\*(C'\fR as the \fIsectionname\fR.
+.IP "\fB\-Ttext\-segment=\fR\fIorg\fR" 4
+.IX Item "-Ttext-segment=org"
+When creating an \s-1ELF\s0 executable or shared object, it will set the address
+of the first byte of the text segment.
+.IP "\fB\-\-unresolved\-symbols=\fR\fImethod\fR" 4
+.IX Item "--unresolved-symbols=method"
+Determine how to handle unresolved symbols. There are four possible
+values for \fBmethod\fR:
+.RS 4
+.IP "\fBignore-all\fR" 4
+.IX Item "ignore-all"
+Do not report any unresolved symbols.
+.IP "\fBreport-all\fR" 4
+.IX Item "report-all"
+Report all unresolved symbols. This is the default.
+.IP "\fBignore-in-object-files\fR" 4
+.IX Item "ignore-in-object-files"
+Report unresolved symbols that are contained in shared libraries, but
+ignore them if they come from regular object files.
+.IP "\fBignore-in-shared-libs\fR" 4
+.IX Item "ignore-in-shared-libs"
+Report unresolved symbols that come from regular object files, but
+ignore them if they come from shared libraries. This can be useful
+when creating a dynamic binary and it is known that all the shared
+libraries that it should be referencing are included on the linker's
+command line.
+.RE
+.RS 4
+.Sp
+The behaviour for shared libraries on their own can also be controlled
+by the \fB\-\-[no\-]allow\-shlib\-undefined\fR option.
+.Sp
+Normally the linker will generate an error message for each reported
+unresolved symbol but the option \fB\-\-warn\-unresolved\-symbols\fR
+can change this to a warning.
+.RE
+.IP "\fB\-\-dll\-verbose\fR" 4
+.IX Item "--dll-verbose"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Display the version number for \fBld\fR and list the linker emulations
+supported. Display which input files can and cannot be opened. Display
+the linker script being used by the linker.
+.IP "\fB\-\-version\-script=\fR\fIversion-scriptfile\fR" 4
+.IX Item "--version-script=version-scriptfile"
+Specify the name of a version script to the linker. This is typically
+used when creating shared libraries to specify additional information
+about the version hierarchy for the library being created. This option
+is only fully supported on \s-1ELF\s0 platforms which support shared libraries;
+see \fB\s-1VERSION\s0\fR. It is partially supported on \s-1PE\s0 platforms, which can
+use version scripts to filter symbol visibility in auto-export mode: any
+symbols marked \fBlocal\fR in the version script will not be exported.
+.IP "\fB\-\-warn\-common\fR" 4
+.IX Item "--warn-common"
+Warn when a common symbol is combined with another common symbol or with
+a symbol definition. Unix linkers allow this somewhat sloppy practise,
+but linkers on some other operating systems do not. This option allows
+you to find potential problems from combining global symbols.
+Unfortunately, some C libraries use this practise, so you may get some
+warnings about symbols in the libraries as well as in your programs.
+.Sp
+There are three kinds of global symbols, illustrated here by C examples:
+.RS 4
+.IP "\fBint i = 1;\fR" 4
+.IX Item "int i = 1;"
+A definition, which goes in the initialized data section of the output
+file.
+.IP "\fBextern int i;\fR" 4
+.IX Item "extern int i;"
+An undefined reference, which does not allocate space.
+There must be either a definition or a common symbol for the
+variable somewhere.
+.IP "\fBint i;\fR" 4
+.IX Item "int i;"
+A common symbol. If there are only (one or more) common symbols for a
+variable, it goes in the uninitialized data area of the output file.
+The linker merges multiple common symbols for the same variable into a
+single symbol. If they are of different sizes, it picks the largest
+size. The linker turns a common symbol into a declaration, if there is
+a definition of the same variable.
+.RE
+.RS 4
+.Sp
+The \fB\-\-warn\-common\fR option can produce five kinds of warnings.
+Each warning consists of a pair of lines: the first describes the symbol
+just encountered, and the second describes the previous symbol
+encountered with the same name. One or both of the two symbols will be
+a common symbol.
+.IP "1." 4
+Turning a common symbol into a reference, because there is already a
+definition for the symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overridden by definition
+\& <file>(<section>): warning: defined here
+.Ve
+.IP "2." 4
+Turning a common symbol into a reference, because a later definition for
+the symbol is encountered. This is the same as the previous case,
+except that the symbols are encountered in a different order.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: definition of \`<symbol>\*(Aq
+\& overriding common
+\& <file>(<section>): warning: common is here
+.Ve
+.IP "3." 4
+Merging a common symbol with a previous same-sized common symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: multiple common
+\& of \`<symbol>\*(Aq
+\& <file>(<section>): warning: previous common is here
+.Ve
+.IP "4." 4
+Merging a common symbol with a previous larger common symbol.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overridden by larger common
+\& <file>(<section>): warning: larger common is here
+.Ve
+.IP "5." 4
+Merging a common symbol with a previous smaller common symbol. This is
+the same as the previous case, except that the symbols are
+encountered in a different order.
+.Sp
+.Vb 3
+\& <file>(<section>): warning: common of \`<symbol>\*(Aq
+\& overriding smaller common
+\& <file>(<section>): warning: smaller common is here
+.Ve
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-warn\-constructors\fR" 4
+.IX Item "--warn-constructors"
+Warn if any global constructors are used. This is only useful for a few
+object file formats. For formats like \s-1COFF\s0 or \s-1ELF\s0, the linker can not
+detect the use of global constructors.
+.IP "\fB\-\-warn\-multiple\-gp\fR" 4
+.IX Item "--warn-multiple-gp"
+Warn if multiple global pointer values are required in the output file.
+This is only meaningful for certain processors, such as the Alpha.
+Specifically, some processors put large-valued constants in a special
+section. A special register (the global pointer) points into the middle
+of this section, so that constants can be loaded efficiently via a
+base-register relative addressing mode. Since the offset in
+base-register relative mode is fixed and relatively small (e.g., 16
+bits), this limits the maximum size of the constant pool. Thus, in
+large programs, it is often necessary to use multiple global pointer
+values in order to be able to address all possible constants. This
+option causes a warning to be issued whenever this case occurs.
+.IP "\fB\-\-warn\-once\fR" 4
+.IX Item "--warn-once"
+Only warn once for each undefined symbol, rather than once per module
+which refers to it.
+.IP "\fB\-\-warn\-section\-align\fR" 4
+.IX Item "--warn-section-align"
+Warn if the address of an output section is changed because of
+alignment. Typically, the alignment will be set by an input section.
+The address will only be changed if it not explicitly specified; that
+is, if the \f(CW\*(C`SECTIONS\*(C'\fR command does not specify a start address for
+the section.
+.IP "\fB\-\-warn\-shared\-textrel\fR" 4
+.IX Item "--warn-shared-textrel"
+Warn if the linker adds a \s-1DT_TEXTREL\s0 to a shared object.
+.IP "\fB\-\-warn\-alternate\-em\fR" 4
+.IX Item "--warn-alternate-em"
+Warn if an object has alternate \s-1ELF\s0 machine code.
+.IP "\fB\-\-warn\-unresolved\-symbols\fR" 4
+.IX Item "--warn-unresolved-symbols"
+If the linker is going to report an unresolved symbol (see the option
+\&\fB\-\-unresolved\-symbols\fR) it will normally generate an error.
+This option makes it generate a warning instead.
+.IP "\fB\-\-error\-unresolved\-symbols\fR" 4
+.IX Item "--error-unresolved-symbols"
+This restores the linker's default behaviour of generating errors when
+it is reporting unresolved symbols.
+.IP "\fB\-\-whole\-archive\fR" 4
+.IX Item "--whole-archive"
+For each archive mentioned on the command line after the
+\&\fB\-\-whole\-archive\fR option, include every object file in the archive
+in the link, rather than searching the archive for the required object
+files. This is normally used to turn an archive file into a shared
+library, forcing every object to be included in the resulting shared
+library. This option may be used more than once.
+.Sp
+Two notes when using this option from gcc: First, gcc doesn't know
+about this option, so you have to use \fB\-Wl,\-whole\-archive\fR.
+Second, don't forget to use \fB\-Wl,\-no\-whole\-archive\fR after your
+list of archives, because gcc will add its own list of archives to
+your link and you may not want this flag to affect those as well.
+.IP "\fB\-\-wrap=\fR\fIsymbol\fR" 4
+.IX Item "--wrap=symbol"
+Use a wrapper function for \fIsymbol\fR. Any undefined reference to
+\&\fIsymbol\fR will be resolved to \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. Any
+undefined reference to \f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR will be resolved to
+\&\fIsymbol\fR.
+.Sp
+This can be used to provide a wrapper for a system function. The
+wrapper function should be called \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. If it
+wishes to call the system function, it should call
+\&\f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR.
+.Sp
+Here is a trivial example:
+.Sp
+.Vb 6
+\& void *
+\& _\|_wrap_malloc (size_t c)
+\& {
+\& printf ("malloc called with %zu\en", c);
+\& return _\|_real_malloc (c);
+\& }
+.Ve
+.Sp
+If you link other code with this file using \fB\-\-wrap malloc\fR, then
+all calls to \f(CW\*(C`malloc\*(C'\fR will call the function \f(CW\*(C`_\|_wrap_malloc\*(C'\fR
+instead. The call to \f(CW\*(C`_\|_real_malloc\*(C'\fR in \f(CW\*(C`_\|_wrap_malloc\*(C'\fR will
+call the real \f(CW\*(C`malloc\*(C'\fR function.
+.Sp
+You may wish to provide a \f(CW\*(C`_\|_real_malloc\*(C'\fR function as well, so that
+links without the \fB\-\-wrap\fR option will succeed. If you do this,
+you should not put the definition of \f(CW\*(C`_\|_real_malloc\*(C'\fR in the same
+file as \f(CW\*(C`_\|_wrap_malloc\*(C'\fR; if you do, the assembler may resolve the
+call before the linker has a chance to wrap it to \f(CW\*(C`malloc\*(C'\fR.
+.IP "\fB\-\-eh\-frame\-hdr\fR" 4
+.IX Item "--eh-frame-hdr"
+Request creation of \f(CW\*(C`.eh_frame_hdr\*(C'\fR section and \s-1ELF\s0
+\&\f(CW\*(C`PT_GNU_EH_FRAME\*(C'\fR segment header.
+.IP "\fB\-\-enable\-new\-dtags\fR" 4
+.IX Item "--enable-new-dtags"
+.PD 0
+.IP "\fB\-\-disable\-new\-dtags\fR" 4
+.IX Item "--disable-new-dtags"
+.PD
+This linker can create the new dynamic tags in \s-1ELF\s0. But the older \s-1ELF\s0
+systems may not understand them. If you specify
+\&\fB\-\-enable\-new\-dtags\fR, the dynamic tags will be created as needed.
+If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
+created. By default, the new dynamic tags are not created. Note that
+those options are only available for \s-1ELF\s0 systems.
+.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4
+.IX Item "--hash-size=number"
+Set the default size of the linker's hash tables to a prime number
+close to \fInumber\fR. Increasing this value can reduce the length of
+time it takes the linker to perform its tasks, at the expense of
+increasing the linker's memory requirements. Similarly reducing this
+value can reduce the memory requirements at the expense of speed.
+.IP "\fB\-\-hash\-style=\fR\fIstyle\fR" 4
+.IX Item "--hash-style=style"
+Set the type of linker's hash table(s). \fIstyle\fR can be either
+\&\f(CW\*(C`sysv\*(C'\fR for classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR section, \f(CW\*(C`gnu\*(C'\fR for
+new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR section or \f(CW\*(C`both\*(C'\fR for both
+the classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR and new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR
+hash tables. The default is \f(CW\*(C`sysv\*(C'\fR.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces memory requirements at ld runtime, at the expense of
+linking speed. This was introduced to select the old O(n^2) algorithm
+for link map file generation, rather than the new O(n) algorithm which uses
+about 40% more memory for symbol storage.
+.Sp
+Another effect of the switch is to set the default hash table size to
+1021, which again saves memory at the cost of lengthening the linker's
+run time. This is not done however if the \fB\-\-hash\-size\fR switch
+has been used.
+.Sp
+The \fB\-\-reduce\-memory\-overheads\fR switch may be also be used to
+enable other tradeoffs in future versions of the linker.
+.IP "\fB\-\-build\-id\fR" 4
+.IX Item "--build-id"
+.PD 0
+.IP "\fB\-\-build\-id=\fR\fIstyle\fR" 4
+.IX Item "--build-id=style"
+.PD
+Request creation of \f(CW\*(C`.note.gnu.build\-id\*(C'\fR \s-1ELF\s0 note section.
+The contents of the note are unique bits identifying this linked
+file. \fIstyle\fR can be \f(CW\*(C`uuid\*(C'\fR to use 128 random bits,
+\&\f(CW\*(C`sha1\*(C'\fR to use a 160\-bit \s-1SHA1\s0 hash on the normative
+parts of the output contents, \f(CW\*(C`md5\*(C'\fR to use a 128\-bit
+\&\s-1MD5\s0 hash on the normative parts of the output contents, or
+\&\f(CW\*(C`0x\f(CIhexstring\f(CW\*(C'\fR to use a chosen bit string specified as
+an even number of hexadecimal digits (\f(CW\*(C`\-\*(C'\fR and \f(CW\*(C`:\*(C'\fR
+characters between digit pairs are ignored). If \fIstyle\fR is
+omitted, \f(CW\*(C`sha1\*(C'\fR is used.
+.Sp
+The \f(CW\*(C`md5\*(C'\fR and \f(CW\*(C`sha1\*(C'\fR styles produces an identifier
+that is always the same in an identical output file, but will be
+unique among all nonidentical output files. It is not intended
+to be compared as a checksum for the file's contents. A linked
+file may be changed later by other tools, but the build \s-1ID\s0 bit
+string identifying the original linked file does not change.
+.Sp
+Passing \f(CW\*(C`none\*(C'\fR for \fIstyle\fR disables the setting from any
+\&\f(CW\*(C`\-\-build\-id\*(C'\fR options earlier on the command line.
+.PP
+The i386 \s-1PE\s0 linker supports the \fB\-shared\fR option, which causes
+the output to be a dynamically linked library (\s-1DLL\s0) instead of a
+normal executable. You should name the output \f(CW\*(C`*.dll\*(C'\fR when you
+use this option. In addition, the linker fully supports the standard
+\&\f(CW\*(C`*.def\*(C'\fR files, which may be specified on the linker command line
+like an object file (in fact, it should precede archives it exports
+symbols from, to ensure that they get linked in, just like a normal
+object file).
+.PP
+In addition to the options common to all targets, the i386 \s-1PE\s0 linker
+support additional command line options that are specific to the i386
+\&\s-1PE\s0 target. Options that take values may be separated from their
+values by either a space or an equals sign.
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+If given, symbols with a stdcall suffix (@\fInn\fR) will be exported
+as-is and also with the suffix stripped.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-base\-file\fR \fIfile\fR" 4
+.IX Item "--base-file file"
+Use \fIfile\fR as the name of a file in which to save the base
+addresses of all the relocations needed for generating DLLs with
+\&\fIdlltool\fR.
+[This is an i386 \s-1PE\s0 specific option]
+.IP "\fB\-\-dll\fR" 4
+.IX Item "--dll"
+Create a \s-1DLL\s0 instead of a regular executable. You may also use
+\&\fB\-shared\fR or specify a \f(CW\*(C`LIBRARY\*(C'\fR in a given \f(CW\*(C`.def\*(C'\fR
+file.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-long\-section\-names\fR" 4
+.IX Item "--enable-long-section-names"
+.PD 0
+.IP "\fB\-\-disable\-long\-section\-names\fR" 4
+.IX Item "--disable-long-section-names"
+.PD
+The \s-1PE\s0 variants of the Coff object format add an extension that permits
+the use of section names longer than eight characters, the normal limit
+for Coff. By default, these names are only allowed in object files, as
+fully-linked executable images do not carry the Coff string table required
+to support the longer names. As a \s-1GNU\s0 extension, it is possible to
+allow their use in executable images as well, or to (probably pointlessly!)
+disallow it in object files, by using these two options. Executable images
+generated with these long section names are slightly non-standard, carrying
+as they do a string table, and may generate confusing output when examined
+with non-GNU PE-aware tools, such as file viewers and dumpers. However,
+\&\s-1GDB\s0 relies on the use of \s-1PE\s0 long section names to find Dwarf\-2 debug
+information sections in an executable image at runtime, and so if neither
+option is specified on the command-line, \fBld\fR will enable long
+section names, overriding the default and technically correct behaviour,
+when it finds the presence of debug information while linking an executable
+image and not stripping symbols.
+[This option is valid for all \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-enable\-stdcall\-fixup\fR" 4
+.IX Item "--enable-stdcall-fixup"
+.PD 0
+.IP "\fB\-\-disable\-stdcall\-fixup\fR" 4
+.IX Item "--disable-stdcall-fixup"
+.PD
+If the link finds a symbol that it cannot resolve, it will attempt to
+do \*(L"fuzzy linking\*(R" by looking for another defined symbol that differs
+only in the format of the symbol name (cdecl vs stdcall) and will
+resolve that symbol by linking to the match. For example, the
+undefined symbol \f(CW\*(C`_foo\*(C'\fR might be linked to the function
+\&\f(CW\*(C`_foo@12\*(C'\fR, or the undefined symbol \f(CW\*(C`_bar@16\*(C'\fR might be linked
+to the function \f(CW\*(C`_bar\*(C'\fR. When the linker does this, it prints a
+warning, since it normally should have failed to link, but sometimes
+import libraries generated from third-party dlls may need this feature
+to be usable. If you specify \fB\-\-enable\-stdcall\-fixup\fR, this
+feature is fully enabled and warnings are not printed. If you specify
+\&\fB\-\-disable\-stdcall\-fixup\fR, this feature is disabled and such
+mismatches are considered to be errors.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+If given, all global symbols in the objects used to build a \s-1DLL\s0 will
+be exported by the \s-1DLL\s0. Note that this is the default if there
+otherwise wouldn't be any exported symbols. When symbols are
+explicitly exported via \s-1DEF\s0 files or implicitly exported via function
+attributes, the default is to not export anything else unless this
+option is given. Note that the symbols \f(CW\*(C`DllMain@12\*(C'\fR,
+\&\f(CW\*(C`DllEntryPoint@0\*(C'\fR, \f(CW\*(C`DllMainCRTStartup@12\*(C'\fR, and
+\&\f(CW\*(C`impure_ptr\*(C'\fR will not be automatically
+exported. Also, symbols imported from other DLLs will not be
+re-exported, nor will symbols specifying the \s-1DLL\s0's internal layout
+such as those beginning with \f(CW\*(C`_head_\*(C'\fR or ending with
+\&\f(CW\*(C`_iname\*(C'\fR. In addition, no symbols from \f(CW\*(C`libgcc\*(C'\fR,
+\&\f(CW\*(C`libstd++\*(C'\fR, \f(CW\*(C`libmingw32\*(C'\fR, or \f(CW\*(C`crtX.o\*(C'\fR will be exported.
+Symbols whose names begin with \f(CW\*(C`_\|_rtti_\*(C'\fR or \f(CW\*(C`_\|_builtin_\*(C'\fR will
+not be exported, to help with \*(C+ DLLs. Finally, there is an
+extensive list of cygwin-private symbols that are not exported
+(obviously, this applies on when building DLLs for cygwin targets).
+These cygwin-excludes are: \f(CW\*(C`_cygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_cygwin_crt0_common@8\*(C'\fR, \f(CW\*(C`_cygwin_noncygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_fmode\*(C'\fR, \f(CW\*(C`_impure_ptr\*(C'\fR, \f(CW\*(C`cygwin_attach_dll\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain0\*(C'\fR, \f(CW\*(C`cygwin_premain1\*(C'\fR, \f(CW\*(C`cygwin_premain2\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain3\*(C'\fR, and \f(CW\*(C`environ\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-exclude\-symbols\fR \fIsymbol\fR\fB,\fR\fIsymbol\fR\fB,...\fR" 4
+.IX Item "--exclude-symbols symbol,symbol,..."
+Specifies a list of symbols which should not be automatically
+exported. The symbol names may be delimited by commas or colons.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-file\-alignment\fR" 4
+.IX Item "--file-alignment"
+Specify the file alignment. Sections in the file will always begin at
+file offsets which are multiples of this number. This defaults to
+512.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program. The default is 1Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll. This is
+the lowest memory location that will be used when your program or dll
+is loaded. To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls. The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+If given, the stdcall suffixes (@\fInn\fR) will be stripped from
+symbols before they are exported.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-large\-address\-aware\fR" 4
+.IX Item "--large-address-aware"
+If given, the appropriate bit in the \*(L"Characteristics\*(R" field of the \s-1COFF\s0
+header is set to indicate that this executable supports virtual addresses
+greater than 2 gigabytes. This should be used in conjunction with the /3GB
+or /USERVA=\fIvalue\fR megabytes switch in the \*(L"[operating systems]\*(R"
+section of the \s-1BOOT\s0.INI. Otherwise, this bit has no effect.
+[This option is specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-major\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--major-image-version value"
+Sets the major number of the \*(L"image version\*(R". Defaults to 1.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--major-os-version value"
+Sets the major number of the \*(L"os version\*(R". Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--major-subsystem-version value"
+Sets the major number of the \*(L"subsystem version\*(R". Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-image-version value"
+Sets the minor number of the \*(L"image version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-os-version value"
+Sets the minor number of the \*(L"os version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-subsystem-version value"
+Sets the minor number of the \*(L"subsystem version\*(R". Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-output\-def\fR \fIfile\fR" 4
+.IX Item "--output-def file"
+The linker will create the file \fIfile\fR which will contain a \s-1DEF\s0
+file corresponding to the \s-1DLL\s0 the linker is generating. This \s-1DEF\s0 file
+(which should be called \f(CW\*(C`*.def\*(C'\fR) may be used to create an import
+library with \f(CW\*(C`dlltool\*(C'\fR or may be used as a reference to
+automatically or implicitly exported symbols.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-out\-implib\fR \fIfile\fR" 4
+.IX Item "--out-implib file"
+The linker will create the file \fIfile\fR which will contain an
+import lib corresponding to the \s-1DLL\s0 the linker is generating. This
+import lib (which should be called \f(CW\*(C`*.dll.a\*(C'\fR or \f(CW\*(C`*.a\*(C'\fR
+may be used to link clients against the generated \s-1DLL\s0; this behaviour
+makes it possible to skip a separate \f(CW\*(C`dlltool\*(C'\fR import library
+creation step.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-image\-base\fR" 4
+.IX Item "--enable-auto-image-base"
+Automatically choose the image base for DLLs, unless one is specified
+using the \f(CW\*(C`\-\-image\-base\*(C'\fR argument. By using a hash generated
+from the dllname to create unique image bases for each \s-1DLL\s0, in-memory
+collisions and relocations which can delay program execution are
+avoided.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-image\-base\fR" 4
+.IX Item "--disable-auto-image-base"
+Do not automatically generate a unique image base. If there is no
+user-specified image base (\f(CW\*(C`\-\-image\-base\*(C'\fR) then use the platform
+default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-dll\-search\-prefix\fR \fIstring\fR" 4
+.IX Item "--dll-search-prefix string"
+When linking dynamically to a dll without an import library,
+search for \f(CW\*(C`<string><basename>.dll\*(C'\fR in preference to
+\&\f(CW\*(C`lib<basename>.dll\*(C'\fR. This behaviour allows easy distinction
+between DLLs built for the various \*(L"subplatforms\*(R": native, cygwin,
+uwin, pw, etc. For instance, cygwin DLLs typically use
+\&\f(CW\*(C`\-\-dll\-search\-prefix=cyg\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-import\fR" 4
+.IX Item "--enable-auto-import"
+Do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to \f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for
+\&\s-1DATA\s0 imports from DLLs, and create the necessary thunking symbols when
+building the import libraries with those \s-1DATA\s0 exports. Note: Use of the
+\&'auto\-import' extension will cause the text section of the image file
+to be made writable. This does not conform to the PE-COFF format
+specification published by Microsoft.
+.Sp
+Note \- use of the 'auto\-import' extension will also cause read only
+data which would normally be placed into the .rdata section to be
+placed into the .data section instead. This is in order to work
+around a problem with consts that is described here:
+http://www.cygwin.com/ml/cygwin/2004\-09/msg01101.html
+.Sp
+Using 'auto\-import' generally will 'just work' \*(-- but sometimes you may
+see this message:
+.Sp
+"variable '<var>' can't be auto-imported. Please read the
+documentation for ld's \f(CW\*(C`\-\-enable\-auto\-import\*(C'\fR for details."
+.Sp
+This message occurs when some (sub)expression accesses an address
+ultimately given by the sum of two constants (Win32 import tables only
+allow one). Instances where this may occur include accesses to member
+fields of struct variables imported from a \s-1DLL\s0, as well as using a
+constant index into an array variable imported from a \s-1DLL\s0. Any
+multiword variable (arrays, structs, long long, etc) may trigger
+this error condition. However, regardless of the exact data type
+of the offending exported variable, ld will always detect it, issue
+the warning, and exit.
+.Sp
+There are several ways to address this difficulty, regardless of the
+data type of the exported variable:
+.Sp
+One way is to use \-\-enable\-runtime\-pseudo\-reloc switch. This leaves the task
+of adjusting references in your client code for runtime environment, so
+this method works only when runtime environment supports this feature.
+.Sp
+A second solution is to force one of the 'constants' to be a variable \*(--
+that is, unknown and un-optimizable at compile time. For arrays,
+there are two possibilities: a) make the indexee (the array's address)
+a variable, or b) make the 'constant' index a variable. Thus:
+.Sp
+.Vb 3
+\& extern type extern_array[];
+\& extern_array[1] \-\->
+\& { volatile type *t=extern_array; t[1] }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\& extern type extern_array[];
+\& extern_array[1] \-\->
+\& { volatile int t=1; extern_array[t] }
+.Ve
+.Sp
+For structs (and most other multiword data types) the only option
+is to make the struct itself (or the long long, or the ...) variable:
+.Sp
+.Vb 3
+\& extern struct s extern_struct;
+\& extern_struct.field \-\->
+\& { volatile struct s *t=&extern_struct; t\->field }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\& extern long long extern_ll;
+\& extern_ll \-\->
+\& { volatile long long * local_ll=&extern_ll; *local_ll }
+.Ve
+.Sp
+A third method of dealing with this difficulty is to abandon
+\&'auto\-import' for the offending symbol and mark it with
+\&\f(CW\*(C`_\|_declspec(dllimport)\*(C'\fR. However, in practise that
+requires using compile-time #defines to indicate whether you are
+building a \s-1DLL\s0, building client code that will link to the \s-1DLL\s0, or
+merely building/linking to a static library. In making the choice
+between the various methods of resolving the 'direct address with
+constant offset' problem, you should consider typical real-world usage:
+.Sp
+Original:
+.Sp
+.Vb 7
+\& \-\-foo.h
+\& extern int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& printf("%d\en",arr[1]);
+\& }
+.Ve
+.Sp
+Solution 1:
+.Sp
+.Vb 9
+\& \-\-foo.h
+\& extern int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& /* This workaround is for win32 and cygwin; do not "optimize" */
+\& volatile int *parr = arr;
+\& printf("%d\en",parr[1]);
+\& }
+.Ve
+.Sp
+Solution 2:
+.Sp
+.Vb 10
+\& \-\-foo.h
+\& /* Note: auto\-export is assumed (no _\|_declspec(dllexport)) */
+\& #if (defined(_WIN32) || defined(_\|_CYGWIN_\|_)) && \e
+\& !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
+\& #define FOO_IMPORT _\|_declspec(dllimport)
+\& #else
+\& #define FOO_IMPORT
+\& #endif
+\& extern FOO_IMPORT int arr[];
+\& \-\-foo.c
+\& #include "foo.h"
+\& void main(int argc, char **argv){
+\& printf("%d\en",arr[1]);
+\& }
+.Ve
+.Sp
+A fourth way to avoid this problem is to re-code your
+library to use a functional interface rather than a data interface
+for the offending variables (e.g. \fIset_foo()\fR and \fIget_foo()\fR accessor
+functions).
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-import\fR" 4
+.IX Item "--disable-auto-import"
+Do not attempt to do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to
+\&\f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for \s-1DATA\s0 imports from DLLs.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--enable-runtime-pseudo-reloc"
+If your code contains expressions described in \-\-enable\-auto\-import section,
+that is, \s-1DATA\s0 imports from \s-1DLL\s0 with non-zero offset, this switch will create
+a vector of 'runtime pseudo relocations' which can be used by runtime
+environment to adjust references to such data in your client code.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--disable-runtime-pseudo-reloc"
+Do not create pseudo relocations for non-zero offset \s-1DATA\s0 imports from
+DLLs. This is the default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-extra\-pe\-debug\fR" 4
+.IX Item "--enable-extra-pe-debug"
+Show additional debug info related to auto-import symbol thunking.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-section\-alignment\fR" 4
+.IX Item "--section-alignment"
+Sets the section alignment. Sections in memory will always begin at
+addresses which are a multiple of this number. Defaults to 0x1000.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program. The default is 2Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute. The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
+the subsystem version also. Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.Sp
+The following options set flags in the \f(CW\*(C`DllCharacteristics\*(C'\fR field
+of the \s-1PE\s0 file header:
+[These options are specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-dynamicbase\fR" 4
+.IX Item "--dynamicbase"
+The image base address may be relocated using address space layout
+randomization (\s-1ASLR\s0). This feature was introduced with \s-1MS\s0 Windows
+Vista for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-forceinteg\fR" 4
+.IX Item "--forceinteg"
+Code integrity checks are enforced.
+.IP "\fB\-\-nxcompat\fR" 4
+.IX Item "--nxcompat"
+The image is compatible with the Data Execution Prevention.
+This feature was introduced with \s-1MS\s0 Windows \s-1XP\s0 \s-1SP2\s0 for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-no\-isolation\fR" 4
+.IX Item "--no-isolation"
+Although the image understands isolation, do not isolate the image.
+.IP "\fB\-\-no\-seh\fR" 4
+.IX Item "--no-seh"
+The image does not use \s-1SEH\s0. No \s-1SE\s0 handler may be called from
+this image.
+.IP "\fB\-\-no\-bind\fR" 4
+.IX Item "--no-bind"
+Do not bind this image.
+.IP "\fB\-\-wdmdriver\fR" 4
+.IX Item "--wdmdriver"
+The driver uses the \s-1MS\s0 Windows Driver Model.
+.IP "\fB\-\-tsaware\fR" 4
+.IX Item "--tsaware"
+The image is Terminal Server aware.
+.PP
+The 68HC11 and 68HC12 linkers support specific options to control the
+memory bank switching mapping and trampoline code generation.
+.IP "\fB\-\-no\-trampoline\fR" 4
+.IX Item "--no-trampoline"
+This option disables the generation of trampoline. By default a trampoline
+is generated for each far function which is called using a \f(CW\*(C`jsr\*(C'\fR
+instruction (this happens when a pointer to a far function is taken).
+.IP "\fB\-\-bank\-window\fR \fIname\fR" 4
+.IX Item "--bank-window name"
+This option indicates to the linker the name of the memory region in
+the \fB\s-1MEMORY\s0\fR specification that describes the memory bank window.
+The definition of such region is then used by the linker to compute
+paging and addresses within the memory window.
+.PP
+The following options are supported to control handling of \s-1GOT\s0 generation
+when linking for 68K targets.
+.IP "\fB\-\-got=\fR\fItype\fR" 4
+.IX Item "--got=type"
+This option tells the linker which \s-1GOT\s0 generation scheme to use.
+\&\fItype\fR should be one of \fBsingle\fR, \fBnegative\fR,
+\&\fBmultigot\fR or \fBtarget\fR. For more information refer to the
+Info entry for \fIld\fR.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+You can change the behaviour of \fBld\fR with the environment variables
+\&\f(CW\*(C`GNUTARGET\*(C'\fR,
+\&\f(CW\*(C`LDEMULATION\*(C'\fR and \f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR.
+.PP
+\&\f(CW\*(C`GNUTARGET\*(C'\fR determines the input-file object format if you don't
+use \fB\-b\fR (or its synonym \fB\-\-format\fR). Its value should be one
+of the \s-1BFD\s0 names for an input format. If there is no
+\&\f(CW\*(C`GNUTARGET\*(C'\fR in the environment, \fBld\fR uses the natural format
+of the target. If \f(CW\*(C`GNUTARGET\*(C'\fR is set to \f(CW\*(C`default\*(C'\fR then \s-1BFD\s0
+attempts to discover the input format by examining binary input files;
+this method often succeeds, but there are potential ambiguities, since
+there is no method of ensuring that the magic number used to specify
+object-file formats is unique. However, the configuration procedure for
+\&\s-1BFD\s0 on each system places the conventional format for that system first
+in the search-list, so ambiguities are resolved in favor of convention.
+.PP
+\&\f(CW\*(C`LDEMULATION\*(C'\fR determines the default emulation if you don't use the
+\&\fB\-m\fR option. The emulation can affect various aspects of linker
+behaviour, particularly the default linker script. You can list the
+available emulations with the \fB\-\-verbose\fR or \fB\-V\fR options. If
+the \fB\-m\fR option is not used, and the \f(CW\*(C`LDEMULATION\*(C'\fR environment
+variable is not defined, the default emulation depends upon how the
+linker was configured.
+.PP
+Normally, the linker will default to demangling symbols. However, if
+\&\f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR is set in the environment, then it will
+default to not demangling symbols. This environment variable is used in
+a similar fashion by the \f(CW\*(C`gcc\*(C'\fR linker wrapper program. The default
+may be overridden by the \fB\-\-demangle\fR and \fB\-\-no\-demangle\fR
+options.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjcopy\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1) and
+the Info entries for \fIbinutils\fR and
+\&\fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1
new file mode 100644
index 0000000..e01a0ca
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nlmconv.1
@@ -0,0 +1,251 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NLMCONV 1"
+.TH NLMCONV 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nlmconv \- converts object code into an NLM.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nlmconv [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-T\fR \fIheaderfile\fR|\fB\-\-header\-file=\fR\fIheaderfile\fR]
+ [\fB\-d\fR|\fB\-\-debug\fR] [\fB\-l\fR \fIlinker\fR|\fB\-\-linker=\fR\fIlinker\fR]
+ [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ \fIinfile\fR \fIoutfile\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBnlmconv\fR converts the relocatable \fBi386\fR object file
+\&\fIinfile\fR into the NetWare Loadable Module \fIoutfile\fR, optionally
+reading \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions
+on writing the \s-1NLM\s0 command file language used in header files, see the
+\&\fBlinkers\fR section, \fB\s-1NLMLINK\s0\fR in particular, of the \fI\s-1NLM\s0
+Development and Tools Overview\fR, which is part of the \s-1NLM\s0 Software
+Developer's Kit (\*(L"\s-1NLM\s0 \s-1SDK\s0\*(R"), available from Novell, Inc.
+\&\fBnlmconv\fR uses the \s-1GNU\s0 Binary File Descriptor library to read
+\&\fIinfile\fR;
+.PP
+\&\fBnlmconv\fR can perform a link step. In other words, you can list
+more than one object file for input if you list them in the definitions
+file (rather than simply specifying one input file on the command line).
+In this case, \fBnlmconv\fR calls the linker for you.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Object format of the input file. \fBnlmconv\fR can usually determine
+the format of a given file (so no default is necessary).
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Object format of the output file. \fBnlmconv\fR infers the output
+format based on the input format, e.g. for a \fBi386\fR input file the
+output format is \fBnlm32\-i386\fR.
+.IP "\fB\-T\fR \fIheaderfile\fR" 4
+.IX Item "-T headerfile"
+.PD 0
+.IP "\fB\-\-header\-file=\fR\fIheaderfile\fR" 4
+.IX Item "--header-file=headerfile"
+.PD
+Reads \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions on
+writing the \s-1NLM\s0 command file language used in header files, see see the
+\&\fBlinkers\fR section, of the \fI\s-1NLM\s0 Development and Tools
+Overview\fR, which is part of the \s-1NLM\s0 Software Developer's Kit, available
+from Novell, Inc.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-debug\fR" 4
+.IX Item "--debug"
+.PD
+Displays (on standard error) the linker command line used by \fBnlmconv\fR.
+.IP "\fB\-l\fR \fIlinker\fR" 4
+.IX Item "-l linker"
+.PD 0
+.IP "\fB\-\-linker=\fR\fIlinker\fR" 4
+.IX Item "--linker=linker"
+.PD
+Use \fIlinker\fR for any linking. \fIlinker\fR can be an absolute or a
+relative pathname.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBnlmconv\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1
new file mode 100644
index 0000000..edee811
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-nm.1
@@ -0,0 +1,523 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NM 1"
+.TH NM 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nm \- list symbols from object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nm [\fB\-a\fR|\fB\-\-debug\-syms\fR]
+ [\fB\-g\fR|\fB\-\-extern\-only\fR][\fB\-\-plugin\fR \fIname\fR]
+ [\fB\-B\fR] [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]] [\fB\-D\fR|\fB\-\-dynamic\fR]
+ [\fB\-S\fR|\fB\-\-print\-size\fR] [\fB\-s\fR|\fB\-\-print\-armap\fR]
+ [\fB\-A\fR|\fB\-o\fR|\fB\-\-print\-file\-name\fR][\fB\-\-special\-syms\fR]
+ [\fB\-n\fR|\fB\-v\fR|\fB\-\-numeric\-sort\fR] [\fB\-p\fR|\fB\-\-no\-sort\fR]
+ [\fB\-r\fR|\fB\-\-reverse\-sort\fR] [\fB\-\-size\-sort\fR] [\fB\-u\fR|\fB\-\-undefined\-only\fR]
+ [\fB\-t\fR \fIradix\fR|\fB\-\-radix=\fR\fIradix\fR] [\fB\-P\fR|\fB\-\-portability\fR]
+ [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-f\fR\fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+ [\fB\-\-defined\-only\fR] [\fB\-l\fR|\fB\-\-line\-numbers\fR] [\fB\-\-no\-demangle\fR]
+ [\fB\-V\fR|\fB\-\-version\fR] [\fB\-X 32_64\fR] [\fB\-\-help\fR] [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBnm\fR lists the symbols from object files \fIobjfile\fR....
+If no object files are listed as arguments, \fBnm\fR assumes the file
+\&\fIa.out\fR.
+.PP
+For each symbol, \fBnm\fR shows:
+.IP "\(bu" 4
+The symbol value, in the radix selected by options (see below), or
+hexadecimal by default.
+.IP "\(bu" 4
+The symbol type. At least the following types are used; others are, as
+well, depending on the object file format. If lowercase, the symbol is
+local; if uppercase, the symbol is global (external).
+.RS 4
+.ie n .IP """A""" 4
+.el .IP "\f(CWA\fR" 4
+.IX Item "A"
+The symbol's value is absolute, and will not be changed by further
+linking.
+.ie n .IP """B""" 4
+.el .IP "\f(CWB\fR" 4
+.IX Item "B"
+.PD 0
+.ie n .IP """b""" 4
+.el .IP "\f(CWb\fR" 4
+.IX Item "b"
+.PD
+The symbol is in the uninitialized data section (known as \s-1BSS\s0).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol is common. Common symbols are uninitialized data. When
+linking, multiple common symbols may appear with the same name. If the
+symbol is defined anywhere, the common symbols are treated as undefined
+references.
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD 0
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD
+The symbol is in the initialized data section.
+.ie n .IP """G""" 4
+.el .IP "\f(CWG\fR" 4
+.IX Item "G"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.PD
+The symbol is in an initialized data section for small objects. Some
+object file formats permit more efficient access to small data objects,
+such as a global int variable as opposed to a large global array.
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+For \s-1PE\s0 format files this indicates that the symbol is in a section
+specific to the implementation of DLLs. For \s-1ELF\s0 format files this
+indicates that the symbol is an indirect function. This is a \s-1GNU\s0
+extension to the standard set of \s-1ELF\s0 symbol types. It indicates a
+symbol which if referenced by a relocation does not evaluate to its
+address, but instead must be invoked at runtime. The runtime
+execution will then return the value to be used in the relocation.
+.ie n .IP """N""" 4
+.el .IP "\f(CWN\fR" 4
+.IX Item "N"
+The symbol is a debugging symbol.
+.ie n .IP """p""" 4
+.el .IP "\f(CWp\fR" 4
+.IX Item "p"
+The symbols is in a stack unwind section.
+.ie n .IP """R""" 4
+.el .IP "\f(CWR\fR" 4
+.IX Item "R"
+.PD 0
+.ie n .IP """r""" 4
+.el .IP "\f(CWr\fR" 4
+.IX Item "r"
+.PD
+The symbol is in a read only data section.
+.ie n .IP """S""" 4
+.el .IP "\f(CWS\fR" 4
+.IX Item "S"
+.PD 0
+.ie n .IP """s""" 4
+.el .IP "\f(CWs\fR" 4
+.IX Item "s"
+.PD
+The symbol is in an uninitialized data section for small objects.
+.ie n .IP """T""" 4
+.el .IP "\f(CWT\fR" 4
+.IX Item "T"
+.PD 0
+.ie n .IP """t""" 4
+.el .IP "\f(CWt\fR" 4
+.IX Item "t"
+.PD
+The symbol is in the text (code) section.
+.ie n .IP """U""" 4
+.el .IP "\f(CWU\fR" 4
+.IX Item "U"
+The symbol is undefined.
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+The symbol is a unique global symbol. This is a \s-1GNU\s0 extension to the
+standard set of \s-1ELF\s0 symbol bindings. For such a symbol the dynamic linker
+will make sure that in the entire process there is just one symbol with
+this name and type in use.
+.ie n .IP """V""" 4
+.el .IP "\f(CWV\fR" 4
+.IX Item "V"
+.PD 0
+.ie n .IP """v""" 4
+.el .IP "\f(CWv\fR" 4
+.IX Item "v"
+.PD
+The symbol is a weak object. When a weak defined symbol is linked with
+a normal defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the weak symbol becomes zero with no error. On some
+systems, uppercase indicates that a default value has been specified.
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+.PD 0
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+.PD
+The symbol is a weak symbol that has not been specifically tagged as a
+weak object symbol. When a weak defined symbol is linked with a normal
+defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the symbol is determined in a system-specific manner without
+error. On some systems, uppercase indicates that a default value has been
+specified.
+.ie n .IP """\-""" 4
+.el .IP "\f(CW\-\fR" 4
+.IX Item "-"
+The symbol is a stabs symbol in an a.out object file. In this case, the
+next values printed are the stabs other field, the stabs desc field, and
+the stab type. Stabs symbols are used to hold debugging information.
+.ie n .IP """?""" 4
+.el .IP "\f(CW?\fR" 4
+.IX Item "?"
+The symbol type is unknown, or object file format specific.
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+The symbol name.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Precede each symbol by the name of the input file (or archive member)
+in which it was found, rather than identifying the input file once only,
+before all of its symbols.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-debug\-syms\fR" 4
+.IX Item "--debug-syms"
+.PD
+Display all symbols, even debugger-only symbols; normally these are not
+listed.
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+The same as \fB\-\-format=bsd\fR (for compatibility with the \s-1MIPS\s0 \fBnm\fR).
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+Do not demangle low-level symbol names. This is the default.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Display the dynamic symbols rather than the normal symbols. This is
+only meaningful for dynamic objects, such as certain types of shared
+libraries.
+.IP "\fB\-f\fR \fIformat\fR" 4
+.IX Item "-f format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+Use the output format \fIformat\fR, which can be \f(CW\*(C`bsd\*(C'\fR,
+\&\f(CW\*(C`sysv\*(C'\fR, or \f(CW\*(C`posix\*(C'\fR. The default is \f(CW\*(C`bsd\*(C'\fR.
+Only the first character of \fIformat\fR is significant; it can be
+either upper or lower case.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-extern\-only\fR" 4
+.IX Item "--extern-only"
+.PD
+Display only external symbols.
+.IP "\fB\-\-plugin\fR \fIname\fR" 4
+.IX Item "--plugin name"
+Load the plugin called \fIname\fR to add support for extra target
+types. This option is only available if the toolchain has been built
+with plugin support enabled.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+For each symbol, use debugging information to try to find a filename and
+line number. For a defined symbol, look for the line number of the
+address of the symbol. For an undefined symbol, look for the line
+number of a relocation entry which refers to the symbol. If line number
+information can be found, print it after the other symbol information.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.IP "\fB\-\-numeric\-sort\fR" 4
+.IX Item "--numeric-sort"
+.PD
+Sort symbols numerically by their addresses, rather than alphabetically
+by their names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-sort\fR" 4
+.IX Item "--no-sort"
+.PD
+Do not bother to sort the symbols in any order; print them in the order
+encountered.
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+.PD 0
+.IP "\fB\-\-portability\fR" 4
+.IX Item "--portability"
+.PD
+Use the \s-1POSIX\s0.2 standard output format instead of the default format.
+Equivalent to \fB\-f posix\fR.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-print\-size\fR" 4
+.IX Item "--print-size"
+.PD
+Print both value and size of defined symbols for the \f(CW\*(C`bsd\*(C'\fR output style.
+This option has no effect for object formats that do not record symbol
+sizes, unless \fB\-\-size\-sort\fR is also used in which case a
+calculated size is displayed.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-print\-armap\fR" 4
+.IX Item "--print-armap"
+.PD
+When listing symbols from archive members, include the index: a mapping
+(stored in the archive by \fBar\fR or \fBranlib\fR) of which modules
+contain definitions for which names.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reverse\-sort\fR" 4
+.IX Item "--reverse-sort"
+.PD
+Reverse the order of the sort (whether numeric or alphabetic); let the
+last come first.
+.IP "\fB\-\-size\-sort\fR" 4
+.IX Item "--size-sort"
+Sort symbols by size. The size is computed as the difference between
+the value of the symbol and the value of the symbol with the next higher
+value. If the \f(CW\*(C`bsd\*(C'\fR output format is used the size of the symbol
+is printed, rather than the value, and \fB\-S\fR must be used in order
+both size and value to be printed.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+Display symbols which have a target-specific special meaning. These
+symbols are usually used by the target for some special processing and
+are not normally helpful when included included in the normal symbol
+lists. For example for \s-1ARM\s0 targets this option would skip the mapping
+symbols used to mark transitions between \s-1ARM\s0 code, \s-1THUMB\s0 code and
+data.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Use \fIradix\fR as the radix for printing the symbol values. It must be
+\&\fBd\fR for decimal, \fBo\fR for octal, or \fBx\fR for hexadecimal.
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify an object code format other than your system's default format.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-undefined\-only\fR" 4
+.IX Item "--undefined-only"
+.PD
+Display only undefined symbols (those external to each object file).
+.IP "\fB\-\-defined\-only\fR" 4
+.IX Item "--defined-only"
+Display only defined symbols for each object file.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBnm\fR and exit.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+This option is ignored for compatibility with the \s-1AIX\s0 version of
+\&\fBnm\fR. It takes one parameter which must be the string
+\&\fB32_64\fR. The default mode of \s-1AIX\s0 \fBnm\fR corresponds
+to \fB\-X 32\fR, which is not supported by \s-1GNU\s0 \fBnm\fR.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBnm\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1
new file mode 100644
index 0000000..cc041c0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objcopy.1
@@ -0,0 +1,935 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJCOPY 1"
+.TH OBJCOPY 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+objcopy \- copy and translate object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objcopy [\fB\-F\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-B\fR \fIbfdarch\fR|\fB\-\-binary\-architecture=\fR\fIbfdarch\fR]
+ [\fB\-S\fR|\fB\-\-strip\-all\fR]
+ [\fB\-g\fR|\fB\-\-strip\-debug\fR]
+ [\fB\-K\fR \fIsymbolname\fR|\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-N\fR \fIsymbolname\fR|\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-G\fR \fIsymbolname\fR|\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-localize\-hidden\fR]
+ [\fB\-L\fR \fIsymbolname\fR|\fB\-\-localize\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-W\fR \fIsymbolname\fR|\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-w\fR|\fB\-\-wildcard\fR]
+ [\fB\-x\fR|\fB\-\-discard\-all\fR]
+ [\fB\-X\fR|\fB\-\-discard\-locals\fR]
+ [\fB\-b\fR \fIbyte\fR|\fB\-\-byte=\fR\fIbyte\fR]
+ [\fB\-i\fR \fIinterleave\fR|\fB\-\-interleave=\fR\fIinterleave\fR]
+ [\fB\-j\fR \fIsectionname\fR|\fB\-\-only\-section=\fR\fIsectionname\fR]
+ [\fB\-R\fR \fIsectionname\fR|\fB\-\-remove\-section=\fR\fIsectionname\fR]
+ [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+ [\fB\-\-debugging\fR]
+ [\fB\-\-gap\-fill=\fR\fIval\fR]
+ [\fB\-\-pad\-to=\fR\fIaddress\fR]
+ [\fB\-\-set\-start=\fR\fIval\fR]
+ [\fB\-\-adjust\-start=\fR\fIincr\fR]
+ [\fB\-\-change\-addresses=\fR\fIincr\fR]
+ [\fB\-\-change\-section\-address\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-section\-lma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-section\-vma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+ [\fB\-\-change\-warnings\fR] [\fB\-\-no\-change\-warnings\fR]
+ [\fB\-\-set\-section\-flags\fR \fIsection\fR=\fIflags\fR]
+ [\fB\-\-add\-section\fR \fIsectionname\fR=\fIfilename\fR]
+ [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR[,\fIflags\fR]]
+ [\fB\-\-long\-section\-names\fR {enable,disable,keep}]
+ [\fB\-\-change\-leading\-char\fR] [\fB\-\-remove\-leading\-char\fR]
+ [\fB\-\-reverse\-bytes=\fR\fInum\fR]
+ [\fB\-\-srec\-len=\fR\fIival\fR] [\fB\-\-srec\-forceS3\fR]
+ [\fB\-\-redefine\-sym\fR \fIold\fR=\fInew\fR]
+ [\fB\-\-redefine\-syms=\fR\fIfilename\fR]
+ [\fB\-\-weaken\fR]
+ [\fB\-\-keep\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-strip\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-localize\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-globalize\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-weaken\-symbols=\fR\fIfilename\fR]
+ [\fB\-\-alt\-machine\-code=\fR\fIindex\fR]
+ [\fB\-\-prefix\-symbols=\fR\fIstring\fR]
+ [\fB\-\-prefix\-sections=\fR\fIstring\fR]
+ [\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR]
+ [\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR]
+ [\fB\-\-keep\-file\-symbols\fR]
+ [\fB\-\-only\-keep\-debug\fR]
+ [\fB\-\-extract\-symbol\fR]
+ [\fB\-\-writable\-text\fR]
+ [\fB\-\-readonly\-text\fR]
+ [\fB\-\-pure\fR]
+ [\fB\-\-impure\fR]
+ [\fB\-\-file\-alignment=\fR\fInum\fR]
+ [\fB\-\-heap=\fR\fIsize\fR]
+ [\fB\-\-image\-base=\fR\fIaddress\fR]
+ [\fB\-\-section\-alignment=\fR\fInum\fR]
+ [\fB\-\-stack=\fR\fIsize\fR]
+ [\fB\-\-subsystem=\fR\fIwhich\fR:\fImajor\fR.\fIminor\fR]
+ [\fB\-v\fR|\fB\-\-verbose\fR]
+ [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-\-help\fR] [\fB\-\-info\fR]
+ \fIinfile\fR [\fIoutfile\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBobjcopy\fR utility copies the contents of an object
+file to another. \fBobjcopy\fR uses the \s-1GNU\s0 \s-1BFD\s0 Library to
+read and write the object files. It can write the destination object
+file in a format different from that of the source object file. The
+exact behavior of \fBobjcopy\fR is controlled by command-line options.
+Note that \fBobjcopy\fR should be able to copy a fully linked file
+between any two formats. However, copying a relocatable object file
+between any two formats may not work as expected.
+.PP
+\&\fBobjcopy\fR creates temporary files to do its translations and
+deletes them afterward. \fBobjcopy\fR uses \s-1BFD\s0 to do all its
+translation work; it has access to all the formats described in \s-1BFD\s0
+and thus is able to recognize most formats without being told
+explicitly.
+.PP
+\&\fBobjcopy\fR can be used to generate S\-records by using an output
+target of \fBsrec\fR (e.g., use \fB\-O srec\fR).
+.PP
+\&\fBobjcopy\fR can be used to generate a raw binary file by using an
+output target of \fBbinary\fR (e.g., use \fB\-O binary\fR). When
+\&\fBobjcopy\fR generates a raw binary file, it will essentially produce
+a memory dump of the contents of the input object file. All symbols and
+relocation information will be discarded. The memory dump will start at
+the load address of the lowest section copied into the output file.
+.PP
+When generating an S\-record or a raw binary file, it may be helpful to
+use \fB\-S\fR to remove sections containing debugging information. In
+some cases \fB\-R\fR will be useful to remove sections which contain
+information that is not needed by the binary file.
+.PP
+Note\-\-\-\fBobjcopy\fR is not able to change the endianness of its input
+files. If the input format has an endianness (some formats do not),
+\&\fBobjcopy\fR can only copy the inputs into file formats that have the
+same endianness or which have no endianness (e.g., \fBsrec\fR).
+(However, see the \fB\-\-reverse\-bytes\fR option.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fIinfile\fR" 4
+.IX Item "infile"
+.PD 0
+.IP "\fIoutfile\fR" 4
+.IX Item "outfile"
+.PD
+The input and output files, respectively.
+If you do not specify \fIoutfile\fR, \fBobjcopy\fR creates a
+temporary file and destructively renames the result with
+the name of \fIinfile\fR.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Consider the source file's object format to be \fIbfdname\fR, rather than
+attempting to deduce it.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Write the output file using the object format \fIbfdname\fR.
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Use \fIbfdname\fR as the object format for both the input and the output
+file; i.e., simply transfer data from source to destination with no
+translation.
+.IP "\fB\-B\fR \fIbfdarch\fR" 4
+.IX Item "-B bfdarch"
+.PD 0
+.IP "\fB\-\-binary\-architecture=\fR\fIbfdarch\fR" 4
+.IX Item "--binary-architecture=bfdarch"
+.PD
+Useful when transforming a raw binary input file into an object file.
+In this case the output architecture can be set to \fIbfdarch\fR. This
+option will be ignored if the input file has a known \fIbfdarch\fR. You
+can access this binary data inside a program by referencing the special
+symbols that are created by the conversion process. These symbols are
+called _binary_\fIobjfile\fR_start, _binary_\fIobjfile\fR_end and
+_binary_\fIobjfile\fR_size. e.g. you can transform a picture file into
+an object file and then access it in your code using these symbols.
+.IP "\fB\-j\fR \fIsectionname\fR" 4
+.IX Item "-j sectionname"
+.PD 0
+.IP "\fB\-\-only\-section=\fR\fIsectionname\fR" 4
+.IX Item "--only-section=sectionname"
+.PD
+Copy only the named section from the input file to the output file.
+This option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file. This
+option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Do not copy relocation and symbol information from the source file.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Do not copy debugging symbols or sections from the source file.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Strip all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped. This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Do not copy symbol \fIsymbolname\fR from the source file. This option
+may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-unneeded-symbol=symbolname"
+Do not copy symbol \fIsymbolname\fR from the source file unless it is needed
+by a relocation. This option may be given more than once.
+.IP "\fB\-G\fR \fIsymbolname\fR" 4
+.IX Item "-G symbolname"
+.PD 0
+.IP "\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-global-symbol=symbolname"
+.PD
+Keep only symbol \fIsymbolname\fR global. Make all other symbols local
+to the file, so that they are not visible externally. This option may
+be given more than once.
+.IP "\fB\-\-localize\-hidden\fR" 4
+.IX Item "--localize-hidden"
+In an \s-1ELF\s0 object, mark all symbols that have hidden or internal visibility
+as local. This option applies on top of symbol-specific localization options
+such as \fB\-L\fR.
+.IP "\fB\-L\fR \fIsymbolname\fR" 4
+.IX Item "-L symbolname"
+.PD 0
+.IP "\fB\-\-localize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--localize-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR local to the file, so that it is not
+visible externally. This option may be given more than once.
+.IP "\fB\-W\fR \fIsymbolname\fR" 4
+.IX Item "-W symbolname"
+.PD 0
+.IP "\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--weaken-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR weak. This option may be given more than once.
+.IP "\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--globalize-symbol=symbolname"
+Give symbol \fIsymbolname\fR global scoping so that it is visible
+outside of the file in which it is defined. This option may be given
+more than once.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options. The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name. If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\& \-w \-W !foo \-W fo*
+.Ve
+.Sp
+would cause objcopy to weaken all symbols that start with \*(L"fo\*(R"
+except for the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Do not copy non-global symbols from the source file.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Do not copy compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-b\fR \fIbyte\fR" 4
+.IX Item "-b byte"
+.PD 0
+.IP "\fB\-\-byte=\fR\fIbyte\fR" 4
+.IX Item "--byte=byte"
+.PD
+Keep only every \fIbyte\fRth byte of the input file (header data is not
+affected). \fIbyte\fR can be in the range from 0 to \fIinterleave\fR\-1,
+where \fIinterleave\fR is given by the \fB\-i\fR or \fB\-\-interleave\fR
+option, or the default of 4. This option is useful for creating files
+to program \s-1ROM\s0. It is typically used with an \f(CW\*(C`srec\*(C'\fR output
+target.
+.IP "\fB\-i\fR \fIinterleave\fR" 4
+.IX Item "-i interleave"
+.PD 0
+.IP "\fB\-\-interleave=\fR\fIinterleave\fR" 4
+.IX Item "--interleave=interleave"
+.PD
+Only copy one out of every \fIinterleave\fR bytes. Select which byte to
+copy with the \fB\-b\fR or \fB\-\-byte\fR option. The default is 4.
+\&\fBobjcopy\fR ignores this option if you do not specify either \fB\-b\fR or
+\&\fB\-\-byte\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Set the access and modification dates of the output file to be the same
+as those of the input file.
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+Convert debugging information, if possible. This is not the default
+because only certain debugging formats are supported, and the
+conversion process can be time consuming.
+.IP "\fB\-\-gap\-fill\fR \fIval\fR" 4
+.IX Item "--gap-fill val"
+Fill gaps between sections with \fIval\fR. This operation applies to
+the \fIload address\fR (\s-1LMA\s0) of the sections. It is done by increasing
+the size of the section with the lower address, and filling in the extra
+space created with \fIval\fR.
+.IP "\fB\-\-pad\-to\fR \fIaddress\fR" 4
+.IX Item "--pad-to address"
+Pad the output file up to the load address \fIaddress\fR. This is
+done by increasing the size of the last section. The extra space is
+filled in with the value specified by \fB\-\-gap\-fill\fR (default zero).
+.IP "\fB\-\-set\-start\fR \fIval\fR" 4
+.IX Item "--set-start val"
+Set the start address of the new file to \fIval\fR. Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-start\fR \fIincr\fR" 4
+.IX Item "--change-start incr"
+.PD 0
+.IP "\fB\-\-adjust\-start\fR \fIincr\fR" 4
+.IX Item "--adjust-start incr"
+.PD
+Change the start address by adding \fIincr\fR. Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-addresses\fR \fIincr\fR" 4
+.IX Item "--change-addresses incr"
+.PD 0
+.IP "\fB\-\-adjust\-vma\fR \fIincr\fR" 4
+.IX Item "--adjust-vma incr"
+.PD
+Change the \s-1VMA\s0 and \s-1LMA\s0 addresses of all sections, as well as the start
+address, by adding \fIincr\fR. Some object file formats do not permit
+section addresses to be changed arbitrarily. Note that this does not
+relocate the sections; if the program expects sections to be loaded at a
+certain address, and this option is used to change the sections such
+that they are loaded at a different address, the program may fail.
+.IP "\fB\-\-change\-section\-address\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-address section{=,+,-}val"
+.PD 0
+.IP "\fB\-\-adjust\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--adjust-section-vma section{=,+,-}val"
+.PD
+Set or change both the \s-1VMA\s0 address and the \s-1LMA\s0 address of the named
+\&\fIsection\fR. If \fB=\fR is used, the section address is set to
+\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the
+section address. See the comments under \fB\-\-change\-addresses\fR,
+above. If \fIsection\fR does not exist in the input file, a warning will
+be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-lma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-lma section{=,+,-}val"
+Set or change the \s-1LMA\s0 address of the named \fIsection\fR. The \s-1LMA\s0
+address is the address where the section will be loaded into memory at
+program load time. Normally this is the same as the \s-1VMA\s0 address, which
+is the address of the section at program run time, but on some systems,
+especially those where a program is held in \s-1ROM\s0, the two can be
+different. If \fB=\fR is used, the section address is set to
+\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the
+section address. See the comments under \fB\-\-change\-addresses\fR,
+above. If \fIsection\fR does not exist in the input file, a warning
+will be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-vma section{=,+,-}val"
+Set or change the \s-1VMA\s0 address of the named \fIsection\fR. The \s-1VMA\s0
+address is the address where the section will be located once the
+program has started executing. Normally this is the same as the \s-1LMA\s0
+address, which is the address where the section will be loaded into
+memory, but on some systems, especially those where a program is held in
+\&\s-1ROM\s0, the two can be different. If \fB=\fR is used, the section address
+is set to \fIval\fR. Otherwise, \fIval\fR is added to or subtracted
+from the section address. See the comments under
+\&\fB\-\-change\-addresses\fR, above. If \fIsection\fR does not exist in
+the input file, a warning will be issued, unless
+\&\fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-warnings\fR" 4
+.IX Item "--change-warnings"
+.PD 0
+.IP "\fB\-\-adjust\-warnings\fR" 4
+.IX Item "--adjust-warnings"
+.PD
+If \fB\-\-change\-section\-address\fR or \fB\-\-change\-section\-lma\fR or
+\&\fB\-\-change\-section\-vma\fR is used, and the named section does not
+exist, issue a warning. This is the default.
+.IP "\fB\-\-no\-change\-warnings\fR" 4
+.IX Item "--no-change-warnings"
+.PD 0
+.IP "\fB\-\-no\-adjust\-warnings\fR" 4
+.IX Item "--no-adjust-warnings"
+.PD
+Do not issue a warning if \fB\-\-change\-section\-address\fR or
+\&\fB\-\-adjust\-section\-lma\fR or \fB\-\-adjust\-section\-vma\fR is used, even
+if the named section does not exist.
+.IP "\fB\-\-set\-section\-flags\fR \fIsection\fR\fB=\fR\fIflags\fR" 4
+.IX Item "--set-section-flags section=flags"
+Set the flags for the named section. The \fIflags\fR argument is a
+comma separated string of flag names. The recognized names are
+\&\fBalloc\fR, \fBcontents\fR, \fBload\fR, \fBnoload\fR,
+\&\fBreadonly\fR, \fBcode\fR, \fBdata\fR, \fBrom\fR, \fBshare\fR, and
+\&\fBdebug\fR. You can set the \fBcontents\fR flag for a section which
+does not have contents, but it is not meaningful to clear the
+\&\fBcontents\fR flag of a section which does have contents\*(--just remove
+the section instead. Not all flags are meaningful for all object file
+formats.
+.IP "\fB\-\-add\-section\fR \fIsectionname\fR\fB=\fR\fIfilename\fR" 4
+.IX Item "--add-section sectionname=filename"
+Add a new section named \fIsectionname\fR while copying the file. The
+contents of the new section are taken from the file \fIfilename\fR. The
+size of the section will be the size of the file. This option only
+works on file formats which can support sections with arbitrary names.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR\fB[,\fR\fIflags\fR\fB]\fR" 4
+.IX Item "--rename-section oldname=newname[,flags]"
+Rename a section from \fIoldname\fR to \fInewname\fR, optionally
+changing the section's flags to \fIflags\fR in the process. This has
+the advantage over usng a linker script to perform the rename in that
+the output stays as an object file and does not become a linked
+executable.
+.Sp
+This option is particularly helpful when the input format is binary,
+since this will always create a section called .data. If for example,
+you wanted instead to create a section called .rodata containing binary
+data you could use the following command line to achieve it:
+.Sp
+.Vb 3
+\& objcopy \-I binary \-O <output_format> \-B <architecture> \e
+\& \-\-rename\-section .data=.rodata,alloc,load,readonly,data,contents \e
+\& <input_binary_file> <output_object_file>
+.Ve
+.IP "\fB\-\-long\-section\-names {enable,disable,keep}\fR" 4
+.IX Item "--long-section-names {enable,disable,keep}"
+Controls the handling of long section names when processing \f(CW\*(C`COFF\*(C'\fR
+and \f(CW\*(C`PE\-COFF\*(C'\fR object formats. The default behaviour, \fBkeep\fR,
+is to preserve long section names if any are present in the input file.
+The \fBenable\fR and \fBdisable\fR options forcibly enable or disable
+the use of long section names in the output object; when \fBdisable\fR
+is in effect, any long section names in the input object will be truncated.
+The \fBenable\fR option will only emit long section names if any are
+present in the inputs; this is mostly the same as \fBkeep\fR, but it
+is left undefined whether the \fBenable\fR option might force the
+creation of an empty string table in the output file.
+.IP "\fB\-\-change\-leading\-char\fR" 4
+.IX Item "--change-leading-char"
+Some object file formats use special characters at the start of
+symbols. The most common such character is underscore, which compilers
+often add before every symbol. This option tells \fBobjcopy\fR to
+change the leading character of every symbol when it converts between
+object file formats. If the object file formats use the same leading
+character, this option has no effect. Otherwise, it will add a
+character, or remove a character, or change a character, as
+appropriate.
+.IP "\fB\-\-remove\-leading\-char\fR" 4
+.IX Item "--remove-leading-char"
+If the first character of a global symbol is a special symbol leading
+character used by the object file format, remove the character. The
+most common symbol leading character is underscore. This option will
+remove a leading underscore from all global symbols. This can be useful
+if you want to link together objects of different file formats with
+different conventions for symbol names. This is different from
+\&\fB\-\-change\-leading\-char\fR because it always changes the symbol name
+when appropriate, regardless of the object file format of the output
+file.
+.IP "\fB\-\-reverse\-bytes=\fR\fInum\fR" 4
+.IX Item "--reverse-bytes=num"
+Reverse the bytes in a section with output contents. A section length must
+be evenly divisible by the value given in order for the swap to be able to
+take place. Reversing takes place before the interleaving is performed.
+.Sp
+This option is used typically in generating \s-1ROM\s0 images for problematic
+target systems. For example, on some target boards, the 32\-bit words
+fetched from 8\-bit ROMs are re-assembled in little-endian byte order
+regardless of the \s-1CPU\s0 byte order. Depending on the programming model, the
+endianness of the \s-1ROM\s0 may need to be modified.
+.Sp
+Consider a simple file with a section containing the following eight
+bytes: \f(CW12345678\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=2\fR for the above example, the bytes in the
+output file would be ordered \f(CW21436587\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=4\fR for the above example, the bytes in the
+output file would be ordered \f(CW43218765\fR.
+.Sp
+By using \fB\-\-reverse\-bytes=2\fR for the above example, followed by
+\&\fB\-\-reverse\-bytes=4\fR on the output file, the bytes in the second
+output file would be ordered \f(CW34127856\fR.
+.IP "\fB\-\-srec\-len=\fR\fIival\fR" 4
+.IX Item "--srec-len=ival"
+Meaningful only for srec output. Set the maximum length of the Srecords
+being produced to \fIival\fR. This length covers both address, data and
+crc fields.
+.IP "\fB\-\-srec\-forceS3\fR" 4
+.IX Item "--srec-forceS3"
+Meaningful only for srec output. Avoid generation of S1/S2 records,
+creating S3\-only record format.
+.IP "\fB\-\-redefine\-sym\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--redefine-sym old=new"
+Change the name of a symbol \fIold\fR, to \fInew\fR. This can be useful
+when one is trying link two things together for which you have no
+source, and there are name collisions.
+.IP "\fB\-\-redefine\-syms=\fR\fIfilename\fR" 4
+.IX Item "--redefine-syms=filename"
+Apply \fB\-\-redefine\-sym\fR to each symbol pair "\fIold\fR \fInew\fR"
+listed in the file \fIfilename\fR. \fIfilename\fR is simply a flat file,
+with one symbol pair per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-weaken\fR" 4
+.IX Item "--weaken"
+Change all global symbols in the file to be weak. This can be useful
+when building an object which will be linked against other objects using
+the \fB\-R\fR option to the linker. This option is only effective when
+using an object file format which supports weak symbols.
+.IP "\fB\-\-keep\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-symbols=filename"
+Apply \fB\-\-keep\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-symbols=filename"
+Apply \fB\-\-strip\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-unneeded-symbols=filename"
+Apply \fB\-\-strip\-unneeded\-symbol\fR option to each symbol listed in
+the file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
+symbol name per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-global-symbols=filename"
+Apply \fB\-\-keep\-global\-symbol\fR option to each symbol listed in the
+file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
+symbol name per line. Line comments may be introduced by the hash
+character. This option may be given more than once.
+.IP "\fB\-\-localize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--localize-symbols=filename"
+Apply \fB\-\-localize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-globalize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--globalize-symbols=filename"
+Apply \fB\-\-globalize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-weaken\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--weaken-symbols=filename"
+Apply \fB\-\-weaken\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
+name per line. Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-alt\-machine\-code=\fR\fIindex\fR" 4
+.IX Item "--alt-machine-code=index"
+If the output architecture has alternate machine codes, use the
+\&\fIindex\fRth code instead of the default one. This is useful in case
+a machine is assigned an official code and the tool-chain adopts the
+new code, but other applications still depend on the original code
+being used. For \s-1ELF\s0 based architectures if the \fIindex\fR
+alternative does not exist then the value is treated as an absolute
+number to be stored in the e_machine field of the \s-1ELF\s0 header.
+.IP "\fB\-\-writable\-text\fR" 4
+.IX Item "--writable-text"
+Mark the output text as writable. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-readonly\-text\fR" 4
+.IX Item "--readonly-text"
+Make the output text write protected. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-pure\fR" 4
+.IX Item "--pure"
+Mark the output file as demand paged. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-impure\fR" 4
+.IX Item "--impure"
+Mark the output file as impure. This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-prefix\-symbols=\fR\fIstring\fR" 4
+.IX Item "--prefix-symbols=string"
+Prefix all symbols in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-sections=string"
+Prefix all section names in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-alloc-sections=string"
+Prefix all the names of all allocated sections in the output file with
+\&\fIstring\fR.
+.IP "\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR" 4
+.IX Item "--add-gnu-debuglink=path-to-file"
+Creates a .gnu_debuglink section which contains a reference to \fIpath-to-file\fR
+and adds it to the output file.
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required. The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal. Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal. Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional. You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to foo.full>"
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run objcopy --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable. It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files. It
+does not make sense to use it on object files where the debugging
+information may be incomplete. Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-\-file\-alignment\fR \fInum\fR" 4
+.IX Item "--file-alignment num"
+Specify the file alignment. Sections in the file will always begin at
+file offsets which are multiples of this number. This defaults to
+512.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll. This is
+the lowest memory location that will be used when your program or dll
+is loaded. To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls. The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-section\-alignment\fR \fInum\fR" 4
+.IX Item "--section-alignment num"
+Sets the section alignment. Sections in memory will always begin at
+addresses which are a multiple of this number. Defaults to 0x1000.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute. The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, \f(CW\*(C`efi\-app\*(C'\fR, \f(CW\*(C`efi\-bsd\*(C'\fR,
+\&\f(CW\*(C`efi\-rtd\*(C'\fR, \f(CW\*(C`sal\-rtd\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
+the subsystem version also. Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-extract\-symbol\fR" 4
+.IX Item "--extract-symbol"
+Keep the file's section flags and symbols but remove all section data.
+Specifically, the option:
+.RS 4
+.IP "*<removes the contents of all sections;>" 4
+.IX Item "*<removes the contents of all sections;>"
+.PD 0
+.IP "*<sets the size of every section to zero; and>" 4
+.IX Item "*<sets the size of every section to zero; and>"
+.IP "*<sets the file's start address to zero.>" 4
+.IX Item "*<sets the file's start address to zero.>"
+.RE
+.RS 4
+.PD
+.Sp
+This option is used to build a \fI.sym\fR file for a VxWorks kernel.
+It can also be a useful way of reducing the size of a \fB\-\-just\-symbols\fR
+linker input file.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBobjcopy\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified. In the case of
+archives, \fBobjcopy \-V\fR lists all members of the archive.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBobjcopy\fR.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIld\fR\|(1), \fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1
new file mode 100644
index 0000000..3c0298d
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-objdump.1
@@ -0,0 +1,803 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJDUMP 1"
+.TH OBJDUMP 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+objdump \- display information from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objdump [\fB\-a\fR|\fB\-\-archive\-headers\fR]
+ [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR] ]
+ [\fB\-d\fR|\fB\-\-disassemble\fR]
+ [\fB\-D\fR|\fB\-\-disassemble\-all\fR]
+ [\fB\-z\fR|\fB\-\-disassemble\-zeroes\fR]
+ [\fB\-EB\fR|\fB\-EL\fR|\fB\-\-endian=\fR{big | little }]
+ [\fB\-f\fR|\fB\-\-file\-headers\fR]
+ [\fB\-F\fR|\fB\-\-file\-offsets\fR]
+ [\fB\-\-file\-start\-context\fR]
+ [\fB\-g\fR|\fB\-\-debugging\fR]
+ [\fB\-e\fR|\fB\-\-debugging\-tags\fR]
+ [\fB\-h\fR|\fB\-\-section\-headers\fR|\fB\-\-headers\fR]
+ [\fB\-i\fR|\fB\-\-info\fR]
+ [\fB\-j\fR \fIsection\fR|\fB\-\-section=\fR\fIsection\fR]
+ [\fB\-l\fR|\fB\-\-line\-numbers\fR]
+ [\fB\-S\fR|\fB\-\-source\fR]
+ [\fB\-m\fR \fImachine\fR|\fB\-\-architecture=\fR\fImachine\fR]
+ [\fB\-M\fR \fIoptions\fR|\fB\-\-disassembler\-options=\fR\fIoptions\fR]
+ [\fB\-p\fR|\fB\-\-private\-headers\fR]
+ [\fB\-r\fR|\fB\-\-reloc\fR]
+ [\fB\-R\fR|\fB\-\-dynamic\-reloc\fR]
+ [\fB\-s\fR|\fB\-\-full\-contents\fR]
+ [\fB\-W[lLiaprmfFsoR]\fR|
+ \fB\-\-dwarf\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+ [\fB\-G\fR|\fB\-\-stabs\fR]
+ [\fB\-t\fR|\fB\-\-syms\fR]
+ [\fB\-T\fR|\fB\-\-dynamic\-syms\fR]
+ [\fB\-x\fR|\fB\-\-all\-headers\fR]
+ [\fB\-w\fR|\fB\-\-wide\fR]
+ [\fB\-\-start\-address=\fR\fIaddress\fR]
+ [\fB\-\-stop\-address=\fR\fIaddress\fR]
+ [\fB\-\-prefix\-addresses\fR]
+ [\fB\-\-[no\-]show\-raw\-insn\fR]
+ [\fB\-\-adjust\-vma=\fR\fIoffset\fR]
+ [\fB\-\-special\-syms\fR]
+ [\fB\-\-prefix=\fR\fIprefix\fR]
+ [\fB\-\-prefix\-strip=\fR\fIlevel\fR]
+ [\fB\-\-insn\-width=\fR\fIwidth\fR]
+ [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-H\fR|\fB\-\-help\fR]
+ \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBobjdump\fR displays information about one or more object files.
+The options control what particular information to display. This
+information is mostly useful to programmers who are working on the
+compilation tools, as opposed to programmers who just want their
+program to compile and work.
+.PP
+\&\fIobjfile\fR... are the object files to be examined. When you
+specify archives, \fBobjdump\fR shows information on each of the member
+object files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent. At least one option from the list
+\&\fB\-a,\-d,\-D,\-e,\-f,\-g,\-G,\-h,\-H,\-p,\-r,\-R,\-s,\-S,\-t,\-T,\-V,\-x\fR must be given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-archive\-header\fR" 4
+.IX Item "--archive-header"
+.PD
+If any of the \fIobjfile\fR files are archives, display the archive
+header information (in a format similar to \fBls \-l\fR). Besides the
+information you could list with \fBar tv\fR, \fBobjdump \-a\fR shows
+the object file format of each archive member.
+.IP "\fB\-\-adjust\-vma=\fR\fIoffset\fR" 4
+.IX Item "--adjust-vma=offset"
+When dumping information, first add \fIoffset\fR to all the section
+addresses. This is useful if the section addresses do not correspond to
+the symbol table, which can happen when putting sections at particular
+addresses when using a format which can not represent section addresses,
+such as a.out.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR. This option may not be necessary; \fIobjdump\fR can
+automatically recognize many formats.
+.Sp
+For example,
+.Sp
+.Vb 1
+\& objdump \-b oasys \-m vax \-h fu.o
+.Ve
+.Sp
+displays summary information from the section headers (\fB\-h\fR) of
+\&\fIfu.o\fR, which is explicitly identified (\fB\-m\fR) as a \s-1VAX\s0 object
+file in the format produced by Oasys compilers. You can list the
+formats available with the \fB\-i\fR option.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+.PD
+Display debugging information. This attempts to parse \s-1STABS\s0 and \s-1IEEE\s0
+debugging format information stored in the file and print it out using
+a C like syntax. If neither of these formats are found this option
+falls back on the \fB\-W\fR option to print any \s-1DWARF\s0 information in
+the file.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-debugging\-tags\fR" 4
+.IX Item "--debugging-tags"
+.PD
+Like \fB\-g\fR, but the information is generated in a format compatible
+with ctags tool.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-disassemble\fR" 4
+.IX Item "--disassemble"
+.PD
+Display the assembler mnemonics for the machine instructions from
+\&\fIobjfile\fR. This option only disassembles those sections which are
+expected to contain instructions.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-disassemble\-all\fR" 4
+.IX Item "--disassemble-all"
+.PD
+Like \fB\-d\fR, but disassemble the contents of all sections, not just
+those expected to contain instructions.
+.Sp
+If the target is an \s-1ARM\s0 architecture this switch also has the effect
+of forcing the disassembler to decode pieces of data found in code
+sections as if they were instructions.
+.IP "\fB\-\-prefix\-addresses\fR" 4
+.IX Item "--prefix-addresses"
+When disassembling, print the complete address on each line. This is
+the older disassembly format.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+.PD 0
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+.IP "\fB\-\-endian={big|little}\fR" 4
+.IX Item "--endian={big|little}"
+.PD
+Specify the endianness of the object files. This only affects
+disassembly. This can be useful when disassembling a file format which
+does not describe endianness information, such as S\-records.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-file\-headers\fR" 4
+.IX Item "--file-headers"
+.PD
+Display summary information from the overall header of
+each of the \fIobjfile\fR files.
+.IP "\fB\-F\fR" 4
+.IX Item "-F"
+.PD 0
+.IP "\fB\-\-file\-offsets\fR" 4
+.IX Item "--file-offsets"
+.PD
+When disassembling sections, whenever a symbol is displayed, also
+display the file offset of the region of data that is about to be
+dumped. If zeroes are being skipped, then when disassembly resumes,
+tell the user how many zeroes were skipped and the file offset of the
+location from where the disassembly resumes. When dumping sections,
+display the file offset of the location from where the dump starts.
+.IP "\fB\-\-file\-start\-context\fR" 4
+.IX Item "--file-start-context"
+Specify that when displaying interlisted source code/disassembly
+(assumes \fB\-S\fR) from a file that has not yet been displayed, extend the
+context to the start of the file.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display summary information from the section headers of the
+object file.
+.Sp
+File segments may be relocated to nonstandard addresses, for example by
+using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to
+\&\fBld\fR. However, some object file formats, such as a.out, do not
+store the starting address of the file segments. In those situations,
+although \fBld\fR relocates the sections correctly, using \fBobjdump
+\&\-h\fR to list the file section headers cannot show the correct addresses.
+Instead, it shows the usual addresses, which are implicit for the
+target.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Print a summary of the options to \fBobjdump\fR and exit.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+.PD
+Display a list showing all architectures and object formats available
+for specification with \fB\-b\fR or \fB\-m\fR.
+.IP "\fB\-j\fR \fIname\fR" 4
+.IX Item "-j name"
+.PD 0
+.IP "\fB\-\-section=\fR\fIname\fR" 4
+.IX Item "--section=name"
+.PD
+Display information only for section \fIname\fR.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+Label the display (using debugging information) with the filename and
+source line numbers corresponding to the object code or relocs shown.
+Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fImachine\fR" 4
+.IX Item "--architecture=machine"
+.PD
+Specify the architecture to use when disassembling object files. This
+can be useful when disassembling object files which do not describe
+architecture information, such as S\-records. You can list the available
+architectures with the \fB\-i\fR option.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch has an
+additional effect. It restricts the disassembly to only those
+instructions supported by the architecture specified by \fImachine\fR.
+If it is necessary to use this switch because the input file does not
+contain any architecture information, but it is also desired to
+disassemble all the instructions use \fB\-marm\fR.
+.IP "\fB\-M\fR \fIoptions\fR" 4
+.IX Item "-M options"
+.PD 0
+.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4
+.IX Item "--disassembler-options=options"
+.PD
+Pass target specific information to the disassembler. Only supported on
+some targets. If it is necessary to specify more than one
+disassembler option then multiple \fB\-M\fR options can be used or
+can be placed together into a comma separated list.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch can be used to
+select which register name set is used during disassembler. Specifying
+\&\fB\-M reg-names-std\fR (the default) will select the register names as
+used in \s-1ARM\s0's instruction set documentation, but with register 13 called
+\&'sp', register 14 called 'lr' and register 15 called 'pc'. Specifying
+\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0
+Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will
+just use \fBr\fR followed by the register number.
+.Sp
+There are also two variants on the \s-1APCS\s0 register naming scheme enabled
+by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which
+use the ARM/Thumb Procedure Call Standard naming conventions. (Either
+with the normal register names or the special register names).
+.Sp
+This option can also be used for \s-1ARM\s0 architectures to force the
+disassembler to interpret all instructions as Thumb instructions by
+using the switch \fB\-\-disassembler\-options=force\-thumb\fR. This can be
+useful when attempting to disassemble thumb code produced by other
+compilers.
+.Sp
+For the x86, some of the options duplicate functions of the \fB\-m\fR
+switch, but allow finer grained control. Multiple selections from the
+following may be specified as a comma separated string.
+\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for
+the given architecture. \fBintel\fR and \fBatt\fR select between
+intel syntax mode and \s-1AT&T\s0 syntax mode.
+\&\fBintel-mnemonic\fR and \fBatt-mnemonic\fR select between
+intel mnemonic mode and \s-1AT&T\s0 mnemonic mode. \fBintel-mnemonic\fR
+implies \fBintel\fR and \fBatt-mnemonic\fR implies \fBatt\fR.
+\&\fBaddr64\fR, \fBaddr32\fR,
+\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default
+address size and operand size. These four options will be overridden if
+\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the
+option string. Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode,
+instructs the disassembler to print a mnemonic suffix even when the
+suffix could be inferred by the operands.
+.Sp
+For PowerPC, \fBbooke\fR controls the disassembly of BookE
+instructions. \fB32\fR and \fB64\fR select PowerPC and
+PowerPC64 disassembly, respectively. \fBe300\fR selects
+disassembly for the e300 family. \fB440\fR selects disassembly for
+the PowerPC 440. \fBppcps\fR selects disassembly for the paired
+single instructions of the \s-1PPC750CL\s0.
+.Sp
+For \s-1MIPS\s0, this option controls the printing of instruction mnemonic
+names and register names in disassembled instructions. Multiple
+selections from the following may be specified as a comma separated
+string, and invalid options are ignored:
+.RS 4
+.ie n .IP """no\-aliases""" 4
+.el .IP "\f(CWno\-aliases\fR" 4
+.IX Item "no-aliases"
+Print the 'raw' instruction mnemonic instead of some pseudo
+instruction mnemonic. I.e., print 'daddu' or 'or' instead of 'move',
+\&'sll' instead of 'nop', etc.
+.ie n .IP """gpr\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWgpr\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "gpr-names=ABI"
+Print \s-1GPR\s0 (general-purpose register) names as appropriate
+for the specified \s-1ABI\s0. By default, \s-1GPR\s0 names are selected according to
+the \s-1ABI\s0 of the binary being disassembled.
+.ie n .IP """fpr\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWfpr\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "fpr-names=ABI"
+Print \s-1FPR\s0 (floating-point register) names as
+appropriate for the specified \s-1ABI\s0. By default, \s-1FPR\s0 numbers are printed
+rather than names.
+.ie n .IP """cp0\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWcp0\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "cp0-names=ARCH"
+Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR. By default, \s-1CP0\s0 register names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """hwr\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWhwr\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "hwr-names=ARCH"
+Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR. By default, \s-1HWR\s0 names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """reg\-names=\f(CIABI\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CIABI\f(CW\fR" 4
+.IX Item "reg-names=ABI"
+Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0.
+.ie n .IP """reg\-names=\f(CIARCH\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CIARCH\f(CW\fR" 4
+.IX Item "reg-names=ARCH"
+Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names)
+as appropriate for the selected \s-1CPU\s0 or architecture.
+.RE
+.RS 4
+.Sp
+For any of the options listed above, \fI\s-1ABI\s0\fR or
+\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed
+rather than names, for the selected types of registers.
+You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using
+the \fB\-\-help\fR option.
+.Sp
+For \s-1VAX\s0, you can specify function entry addresses with \fB\-M
+entry:0xf00ba\fR. You can use this multiple times to properly
+disassemble \s-1VAX\s0 binary files that don't contain symbol tables (like
+\&\s-1ROM\s0 dumps). In these cases, the function entry mask would otherwise
+be decoded as \s-1VAX\s0 instructions, which would probably lead the rest
+of the function being wrongly disassembled.
+.RE
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-private\-headers\fR" 4
+.IX Item "--private-headers"
+.PD
+Print information that is specific to the object file format. The exact
+information printed depends upon the object file format. For some
+object file formats, no additional information is printed.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reloc\fR" 4
+.IX Item "--reloc"
+.PD
+Print the relocation entries of the file. If used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+.PD 0
+.IP "\fB\-\-dynamic\-reloc\fR" 4
+.IX Item "--dynamic-reloc"
+.PD
+Print the dynamic relocation entries of the file. This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries. As for \fB\-r\fR, if used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-full\-contents\fR" 4
+.IX Item "--full-contents"
+.PD
+Display the full contents of any sections requested. By default all
+non-empty sections are displayed.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-source\fR" 4
+.IX Item "--source"
+.PD
+Display source code intermixed with disassembly, if possible. Implies
+\&\fB\-d\fR.
+.IP "\fB\-\-prefix=\fR\fIprefix\fR" 4
+.IX Item "--prefix=prefix"
+Specify \fIprefix\fR to add to the absolute paths when used with
+\&\fB\-S\fR.
+.IP "\fB\-\-prefix\-strip=\fR\fIlevel\fR" 4
+.IX Item "--prefix-strip=level"
+Indicate how many initial directory names to strip off the hardwired
+absolute paths. It has no effect without \fB\-\-prefix=\fR\fIprefix\fR.
+.IP "\fB\-\-show\-raw\-insn\fR" 4
+.IX Item "--show-raw-insn"
+When disassembling instructions, print the instruction in hex as well as
+in symbolic form. This is the default except when
+\&\fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-no\-show\-raw\-insn\fR" 4
+.IX Item "--no-show-raw-insn"
+When disassembling instructions, do not print the instruction bytes.
+This is the default when \fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-insn\-width=\fR\fIwidth\fR" 4
+.IX Item "--insn-width=width"
+Display \fIwidth\fR bytes on a single line when disassembling
+instructions.
+.IP "\fB\-W[lLiaprmfFsoR]\fR" 4
+.IX Item "-W[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present. If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+.PD 0
+.IP "\fB\-\-stabs\fR" 4
+.IX Item "--stabs"
+.PD
+Display the full contents of any sections requested. Display the
+contents of the .stab and .stab.index and .stab.excl sections from an
+\&\s-1ELF\s0 file. This is only useful on systems (such as Solaris 2.0) in which
+\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0
+section. In most other file formats, debugging symbol-table entries are
+interleaved with linkage symbols, and are visible in the \fB\-\-syms\fR
+output.
+.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4
+.IX Item "--start-address=address"
+Start displaying data at the specified address. This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4
+.IX Item "--stop-address=address"
+Stop displaying data at the specified address. This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Print the symbol table entries of the file.
+This is similar to the information provided by the \fBnm\fR program,
+although the display format is different. The format of the output
+depends upon the format of the file being dumped, but there are two main
+types. One looks like this:
+.Sp
+.Vb 2
+\& [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss
+\& [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred
+.Ve
+.Sp
+where the number inside the square brackets is the number of the entry
+in the symbol table, the \fIsec\fR number is the section number, the
+\&\fIfl\fR value are the symbol's flag bits, the \fIty\fR number is the
+symbol's type, the \fIscl\fR number is the symbol's storage class and
+the \fInx\fR value is the number of auxilary entries associated with
+the symbol. The last two fields are the symbol's value and its name.
+.Sp
+The other common output format, usually seen with \s-1ELF\s0 based files,
+looks like this:
+.Sp
+.Vb 2
+\& 00000000 l d .bss 00000000 .bss
+\& 00000000 g .text 00000000 fred
+.Ve
+.Sp
+Here the first number is the symbol's value (sometimes refered to as
+its address). The next field is actually a set of characters and
+spaces indicating the flag bits that are set on the symbol. These
+characters are described below. Next is the section with which the
+symbol is associated or \fI*ABS*\fR if the section is absolute (ie
+not connected with any section), or \fI*UND*\fR if the section is
+referenced in the file being dumped, but not defined there.
+.Sp
+After the section name comes another field, a number, which for common
+symbols is the alignment and for other symbol is the size. Finally
+the symbol's name is displayed.
+.Sp
+The flag characters are divided into 7 groups as follows:
+.RS 4
+.ie n .IP """l""" 4
+.el .IP "\f(CWl\fR" 4
+.IX Item "l"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+.ie n .IP """!""" 4
+.el .IP "\f(CW!\fR" 4
+.IX Item "!"
+.PD
+The symbol is a local (l), global (g), unique global (u), neither
+global nor local (a space) or both global and local (!). A
+symbol can be neither local or global for a variety of reasons, e.g.,
+because it is used for debugging, but it is probably an indication of
+a bug if it is ever both local and global. Unique global symbols are
+a \s-1GNU\s0 extension to the standard set of \s-1ELF\s0 symbol bindings. For such
+a symbol the dynamic linker will make sure that in the entire process
+there is just one symbol with this name and type in use.
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+The symbol is weak (w) or strong (a space).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol denotes a constructor (C) or an ordinary symbol (a space).
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+The symbol is a warning (W) or a normal symbol (a space). A warning
+symbol's name is a message to be displayed if the symbol following the
+warning symbol is ever referenced.
+.ie n .IP """I""" 4
+.el .IP "\f(CWI\fR" 4
+.IX Item "I"
+.PD 0
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+.PD
+The symbol is an indirect reference to another symbol (I), a function
+to be evaluated during reloc processing (i) or a normal symbol (a
+space).
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD 0
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD
+The symbol is a debugging symbol (d) or a dynamic symbol (D) or a
+normal symbol (a space).
+.ie n .IP """F""" 4
+.el .IP "\f(CWF\fR" 4
+.IX Item "F"
+.PD 0
+.ie n .IP """f""" 4
+.el .IP "\f(CWf\fR" 4
+.IX Item "f"
+.ie n .IP """O""" 4
+.el .IP "\f(CWO\fR" 4
+.IX Item "O"
+.PD
+The symbol is the name of a function (F) or a file (f) or an object
+(O) or just a normal symbol (a space).
+.RE
+.RS 4
+.RE
+.IP "\fB\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.IP "\fB\-\-dynamic\-syms\fR" 4
+.IX Item "--dynamic-syms"
+.PD
+Print the dynamic symbol table entries of the file. This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries. This is similar to the information provided by the \fBnm\fR
+program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+When displaying symbols include those which the target considers to be
+special in some way and which would not normally be of interest to the
+user.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the version number of \fBobjdump\fR and exit.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-all\-headers\fR" 4
+.IX Item "--all-headers"
+.PD
+Display all available header information, including the symbol table and
+relocation entries. Using \fB\-x\fR is equivalent to specifying all of
+\&\fB\-a \-f \-h \-p \-r \-t\fR.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Format some lines for output devices that have more than 80 columns.
+Also do not truncate symbol names when they are displayed.
+.IP "\fB\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.IP "\fB\-\-disassemble\-zeroes\fR" 4
+.IX Item "--disassemble-zeroes"
+.PD
+Normally the disassembly output will skip blocks of zeroes. This
+option directs the disassembler to disassemble those blocks, just like
+any other data.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1
new file mode 100644
index 0000000..a72019c
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-ranlib.1
@@ -0,0 +1,199 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "RANLIB 1"
+.TH RANLIB 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ranlib \- generate index to archive.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ranlib [\fB\-vVt\fR] \fIarchive\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBranlib\fR generates an index to the contents of an archive and
+stores it in the archive. The index lists each symbol defined by a
+member of an archive that is a relocatable object file.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index.
+.PP
+An archive with such an index speeds up linking to the library and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+The \s-1GNU\s0 \fBranlib\fR program is another form of \s-1GNU\s0 \fBar\fR; running
+\&\fBranlib\fR is completely equivalent to executing \fBar \-s\fR.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBranlib\fR.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+Update the timestamp of the symbol map of an archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1
new file mode 100644
index 0000000..07132ee
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-readelf.1
@@ -0,0 +1,420 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "READELF 1"
+.TH READELF 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+readelf \- Displays information about ELF files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+readelf [\fB\-a\fR|\fB\-\-all\fR]
+ [\fB\-h\fR|\fB\-\-file\-header\fR]
+ [\fB\-l\fR|\fB\-\-program\-headers\fR|\fB\-\-segments\fR]
+ [\fB\-S\fR|\fB\-\-section\-headers\fR|\fB\-\-sections\fR]
+ [\fB\-g\fR|\fB\-\-section\-groups\fR]
+ [\fB\-t\fR|\fB\-\-section\-details\fR]
+ [\fB\-e\fR|\fB\-\-headers\fR]
+ [\fB\-s\fR|\fB\-\-syms\fR|\fB\-\-symbols\fR]
+ [\fB\-n\fR|\fB\-\-notes\fR]
+ [\fB\-r\fR|\fB\-\-relocs\fR]
+ [\fB\-u\fR|\fB\-\-unwind\fR]
+ [\fB\-d\fR|\fB\-\-dynamic\fR]
+ [\fB\-V\fR|\fB\-\-version\-info\fR]
+ [\fB\-A\fR|\fB\-\-arch\-specific\fR]
+ [\fB\-D\fR|\fB\-\-use\-dynamic\fR]
+ [\fB\-x\fR <number or name>|\fB\-\-hex\-dump=\fR<number or name>]
+ [\fB\-p\fR <number or name>|\fB\-\-string\-dump=\fR<number or name>]
+ [\fB\-R\fR <number or name>|\fB\-\-relocated\-dump=\fR<number or name>]
+ [\fB\-c\fR|\fB\-\-archive\-index\fR]
+ [\fB\-w[lLiaprmfFsoR]\fR|
+ \fB\-\-debug\-dump\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+ [\fB\-I\fR|\fB\-histogram\fR]
+ [\fB\-v\fR|\fB\-\-version\fR]
+ [\fB\-W\fR|\fB\-\-wide\fR]
+ [\fB\-H\fR|\fB\-\-help\fR]
+ \fIelffile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBreadelf\fR displays information about one or more \s-1ELF\s0 format object
+files. The options control what particular information to display.
+.PP
+\&\fIelffile\fR... are the object files to be examined. 32\-bit and
+64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files.
+.PP
+This program performs a similar function to \fBobjdump\fR but it
+goes into more detail and it exists independently of the \s-1BFD\s0
+library, so if there is a bug in \s-1BFD\s0 then readelf will not be
+affected.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent. At least one option besides \fB\-v\fR or \fB\-H\fR must be
+given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.PD
+Equivalent to specifying \fB\-\-file\-header\fR,
+\&\fB\-\-program\-headers\fR, \fB\-\-sections\fR, \fB\-\-symbols\fR,
+\&\fB\-\-relocs\fR, \fB\-\-dynamic\fR, \fB\-\-notes\fR and
+\&\fB\-\-version\-info\fR.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-file\-header\fR" 4
+.IX Item "--file-header"
+.PD
+Displays the information contained in the \s-1ELF\s0 header at the start of the
+file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-program\-headers\fR" 4
+.IX Item "--program-headers"
+.IP "\fB\-\-segments\fR" 4
+.IX Item "--segments"
+.PD
+Displays the information contained in the file's segment headers, if it
+has any.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-sections\fR" 4
+.IX Item "--sections"
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.PD
+Displays the information contained in the file's section headers, if it
+has any.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-section\-groups\fR" 4
+.IX Item "--section-groups"
+.PD
+Displays the information contained in the file's section groups, if it
+has any.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-section\-details\fR" 4
+.IX Item "--section-details"
+.PD
+Displays the detailed section information. Implies \fB\-S\fR.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-symbols\fR" 4
+.IX Item "--symbols"
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Displays the entries in symbol table section of the file, if it has one.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display all the headers in the file. Equivalent to \fB\-h \-l \-S\fR.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-notes\fR" 4
+.IX Item "--notes"
+.PD
+Displays the contents of the \s-1NOTE\s0 segments and/or sections, if any.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocs\fR" 4
+.IX Item "--relocs"
+.PD
+Displays the contents of the file's relocation section, if it has one.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unwind\fR" 4
+.IX Item "--unwind"
+.PD
+Displays the contents of the file's unwind section, if it has one. Only
+the unwind sections for \s-1IA64\s0 \s-1ELF\s0 files are currently supported.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Displays the contents of the file's dynamic section, if it has one.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\-info\fR" 4
+.IX Item "--version-info"
+.PD
+Displays the contents of the version sections in the file, it they
+exist.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-arch\-specific\fR" 4
+.IX Item "--arch-specific"
+.PD
+Displays architecture-specific information in the file, if there
+is any.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-use\-dynamic\fR" 4
+.IX Item "--use-dynamic"
+.PD
+When displaying symbols, this option makes \fBreadelf\fR use the
+symbol table in the file's dynamic section, rather than the one in the
+symbols section.
+.IP "\fB\-x <number or name>\fR" 4
+.IX Item "-x <number or name>"
+.PD 0
+.IP "\fB\-\-hex\-dump=<number or name>\fR" 4
+.IX Item "--hex-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal bytes.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-R <number or name>\fR" 4
+.IX Item "-R <number or name>"
+.PD 0
+.IP "\fB\-\-relocated\-dump=<number or name>\fR" 4
+.IX Item "--relocated-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal
+bytes. A number identifies a particular section by index in the
+section table; any other string identifies all sections with that name
+in the object file. The contents of the section will be relocated
+before they are displayed.
+.IP "\fB\-p <number or name>\fR" 4
+.IX Item "-p <number or name>"
+.PD 0
+.IP "\fB\-\-string\-dump=<number or name>\fR" 4
+.IX Item "--string-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as printable strings.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-archive\-index\fR" 4
+.IX Item "--archive-index"
+.PD
+Displays the file symbol index infomation contained in the header part
+of binary archives. Performs the same function as the \fBt\fR
+command to \fBar\fR, but without using the \s-1BFD\s0 library.
+.IP "\fB\-w[lLiaprmfFsoR]\fR" 4
+.IX Item "-w[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-debug\-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present. If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.Sp
+Note: the \fB=decodedline\fR option will display the interpreted
+contents of a .debug_line section whereas the \fB=rawline\fR option
+dumps the contents in a raw format.
+.IP "\fB\-I\fR" 4
+.IX Item "-I"
+.PD 0
+.IP "\fB\-\-histogram\fR" 4
+.IX Item "--histogram"
+.PD
+Display a histogram of bucket list lengths when displaying the contents
+of the symbol tables.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of readelf.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Don't break output lines to fit into 80 columns. By default
+\&\fBreadelf\fR breaks section header and segment listing lines for
+64\-bit \s-1ELF\s0 files, so that they fit into 80 columns. This option causes
+\&\fBreadelf\fR to print each section header resp. each segment one a
+single line, which is far more readable on terminals wider than 80 columns.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display the command line options understood by \fBreadelf\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1
new file mode 100644
index 0000000..8bd0423
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-run.1
@@ -0,0 +1,475 @@
+.\" Copyright (c) 1993, 2004, 2010 Free Software Foundation
+.\" See section COPYING for conditions for redistribution
+.TH run 1 "13oct1993" "GNU Tools" "GNU Tools"
+.de BP
+.sp
+.ti -.2i
+\(**
+..
+
+.SH NAME
+run\(em\&Simulator front-end
+
+.SH SYNOPSIS
+.hy 0
+.na
+.TP
+.B run
+.RB "[\|" \-v "\|]"
+." .RB "[\|" \-t "\|]"
+.RB "[\|" \-p
+.IR freq "\|]"
+.RB "[\|" \-m
+.IR memory "\|]"
+.RB "[\|" \--sysroot
+.IR filepath "\|]"
+.I program
+.ad b
+.hy 1
+.SH DESCRIPTION
+
+Use `\|\c
+.BI run " program"\c
+\&\|' to execute a binary by interpreting machine instructions on your
+host computer.
+
+.B run
+is the same emulator used by GDB's `\|\c
+.B target sim\c
+\&\|' command. You can run it directly by executing
+.B run
+if you just want to see your program execute, and do not need any
+debugger functionality. You can also use
+.B run
+to generate profiling information for analysis with
+.BR gprof .
+
+.SH OPTIONS
+
+.TP
+.B \-v
+Verbose output. Display the name of the program to run before
+execution; after execution, display the number of instructions
+executed, the number of machine cycles emulated, the number of
+pipeline stalls, the real time taken, the emulated execution time
+taken, and a summary of how much profiling information was generated.
+."
+." .TP
+." .B \-t
+." `trace', calls a sim_trace routine that does nothing.
+
+.TP
+.BI \-p " freq"
+Generate profile information (for use with
+.B gprof\c
+\&).
+.I freq
+is the profiling frequency. Write the profiling information to a file called
+.BR gmon.out .
+
+.TP
+.BI \-m " memory"
+Set the memory size for the emulated machine to two to the power
+.IR memory .
+The default value is 19, emulating a board with 524288 bytes of memory.
+
+.TP
+.BI \--sysroot " filepath"
+Prepend
+.IR filepath
+to all simulator system calls that pass absolute file paths.
+Change working directory to
+.IR filepath
+at program start. Not all simulators support this option; those
+that don't, will ignore it.
+
+.PP
+
+.SH "SEE ALSO"
+.RB "`\|" gprof "\|'"
+entry in
+.B info\c
+\&;
+.RB "`\|" gdb "\|'"
+entry in
+.B info\c
+\&;
+.I
+Using GDB: A Guide to the GNU Source-Level Debugger\c
+, Richard M. Stallman and Roland H. Pesch.
+
+.SH COPYING
+Copyright (c) 1993, 2000 Free Software Foundation, Inc.
+.PP
+This document is distributed under the terms of the GNU Free
+Documentation License, version 1.1. That license is described in the
+sources for this manual page, but it is not displayed here in order to
+make this manual more consise. Copies of this license can also be
+obtained from: http://www.gnu.org/copyleft/.
+
+\" GNU Free Documentation License
+\" Version 1.1, March 2000
+
+\" Copyright (C) 2000 Free Software Foundation, Inc.
+\" 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+\" Everyone is permitted to copy and distribute verbatim
+\" copies of this license document, but changing it is
+\" not allowed.
+\" .PP
+\" 0. PREAMBLE
+\" .PP
+\" The purpose of this License is to make a manual, textbook, or other
+\" written document "free" in the sense of freedom: to assure everyone
+\" the effective freedom to copy and redistribute it, with or without
+\" modifying it, either commercially or noncommercially. Secondarily,
+\" this License preserves for the author and publisher a way to get
+\" credit for their work, while not being considered responsible for
+\" modifications made by others.
+\" .PP
+\" This License is a kind of "copyleft", which means that derivative
+\" works of the document must themselves be free in the same sense. It
+\" complements the GNU General Public License, which is a copyleft
+\" license designed for free software.
+\" .PP
+\" We have designed this License in order to use it for manuals for free
+\" software, because free software needs free documentation: a free
+\" program should come with manuals providing the same freedoms that the
+\" software does. But this License is not limited to software manuals;
+\" it can be used for any textual work, regardless of subject matter or
+\" whether it is published as a printed book. We recommend this License
+\" principally for works whose purpose is instruction or reference.
+\" .PP
+\" 1. APPLICABILITY AND DEFINITIONS
+\" .PP
+\" This License applies to any manual or other work that contains a
+\" notice placed by the copyright holder saying it can be distributed
+\" under the terms of this License. The "Document", below, refers to any
+\" such manual or work. Any member of the public is a licensee, and is
+\" addressed as "you".
+\" .PP
+\" A "Modified Version" of the Document means any work containing the
+\" Document or a portion of it, either copied verbatim, or with
+\" modifications and/or translated into another language.
+\" .PP
+\" A "Secondary Section" is a named appendix or a front-matter section of
+\" the Document that deals exclusively with the relationship of the
+\" publishers or authors of the Document to the Document's overall subject
+\" (or to related matters) and contains nothing that could fall directly
+\" within that overall subject. (For example, if the Document is in part a
+\" textbook of mathematics, a Secondary Section may not explain any
+\" mathematics.) The relationship could be a matter of historical
+\" connection with the subject or with related matters, or of legal,
+\" commercial, philosophical, ethical or political position regarding
+\" them.
+\" .PP
+\" The "Invariant Sections" are certain Secondary Sections whose titles
+\" are designated, as being those of Invariant Sections, in the notice
+\" that says that the Document is released under this License.
+\" .PP
+\" The "Cover Texts" are certain short passages of text that are listed,
+\" as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+\" the Document is released under this License.
+\" .PP
+\" A "Transparent" copy of the Document means a machine-readable copy,
+\" represented in a format whose specification is available to the
+\" general public, whose contents can be viewed and edited directly and
+\" straightforwardly with generic text editors or (for images composed of
+\" pixels) generic paint programs or (for drawings) some widely available
+\" drawing editor, and that is suitable for input to text formatters or
+\" for automatic translation to a variety of formats suitable for input
+\" to text formatters. A copy made in an otherwise Transparent file
+\" format whose markup has been designed to thwart or discourage
+\" subsequent modification by readers is not Transparent. A copy that is
+\" not "Transparent" is called "Opaque".
+\" .PP
+\" Examples of suitable formats for Transparent copies include plain
+\" ASCII without markup, Texinfo input format, LaTeX input format, SGML
+\" or XML using a publicly available DTD, and standard-conforming simple
+\" HTML designed for human modification. Opaque formats include
+\" PostScript, PDF, proprietary formats that can be read and edited only
+\" by proprietary word processors, SGML or XML for which the DTD and/or
+\" processing tools are not generally available, and the
+\" machine-generated HTML produced by some word processors for output
+\" purposes only.
+\" .PP
+\" The "Title Page" means, for a printed book, the title page itself,
+\" plus such following pages as are needed to hold, legibly, the material
+\" this License requires to appear in the title page. For works in
+\" formats which do not have any title page as such, "Title Page" means
+\" the text near the most prominent appearance of the work's title,
+\" preceding the beginning of the body of the text.
+\" .PP
+\" 2. VERBATIM COPYING
+\" .PP
+\" You may copy and distribute the Document in any medium, either
+\" commercially or noncommercially, provided that this License, the
+\" copyright notices, and the license notice saying this License applies
+\" to the Document are reproduced in all copies, and that you add no other
+\" conditions whatsoever to those of this License. You may not use
+\" technical measures to obstruct or control the reading or further
+\" copying of the copies you make or distribute. However, you may accept
+\" compensation in exchange for copies. If you distribute a large enough
+\" number of copies you must also follow the conditions in section 3.
+\" .PP
+\" You may also lend copies, under the same conditions stated above, and
+\" you may publicly display copies.
+\" .PP
+\" 3. COPYING IN QUANTITY
+\" .PP
+\" If you publish printed copies of the Document numbering more than 100,
+\" and the Document's license notice requires Cover Texts, you must enclose
+\" the copies in covers that carry, clearly and legibly, all these Cover
+\" Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+\" the back cover. Both covers must also clearly and legibly identify
+\" you as the publisher of these copies. The front cover must present
+\" the full title with all words of the title equally prominent and
+\" visible. You may add other material on the covers in addition.
+\" Copying with changes limited to the covers, as long as they preserve
+\" the title of the Document and satisfy these conditions, can be treated
+\" as verbatim copying in other respects.
+\" .PP
+\" If the required texts for either cover are too voluminous to fit
+\" legibly, you should put the first ones listed (as many as fit
+\" reasonably) on the actual cover, and continue the rest onto adjacent
+\" pages.
+\" .PP
+\" If you publish or distribute Opaque copies of the Document numbering
+\" more than 100, you must either include a machine-readable Transparent
+\" copy along with each Opaque copy, or state in or with each Opaque copy
+\" a publicly-accessible computer-network location containing a complete
+\" Transparent copy of the Document, free of added material, which the
+\" general network-using public has access to download anonymously at no
+\" charge using public-standard network protocols. If you use the latter
+\" option, you must take reasonably prudent steps, when you begin
+\" distribution of Opaque copies in quantity, to ensure that this
+\" Transparent copy will remain thus accessible at the stated location
+\" until at least one year after the last time you distribute an Opaque
+\" copy (directly or through your agents or retailers) of that edition to
+\" the public.
+\" .PP
+\" It is requested, but not required, that you contact the authors of the
+\" Document well before redistributing any large number of copies, to give
+\" them a chance to provide you with an updated version of the Document.
+\" .PP
+\" 4. MODIFICATIONS
+\" .PP
+\" You may copy and distribute a Modified Version of the Document under
+\" the conditions of sections 2 and 3 above, provided that you release
+\" the Modified Version under precisely this License, with the Modified
+\" Version filling the role of the Document, thus licensing distribution
+\" and modification of the Modified Version to whoever possesses a copy
+\" of it. In addition, you must do these things in the Modified Version:
+\" .PP
+\" A. Use in the Title Page (and on the covers, if any) a title distinct
+\" from that of the Document, and from those of previous versions
+\" (which should, if there were any, be listed in the History section
+\" of the Document). You may use the same title as a previous version
+\" if the original publisher of that version gives permission.
+\" .PP
+\" B. List on the Title Page, as authors, one or more persons or entities
+\" responsible for authorship of the modifications in the Modified
+\" Version, together with at least five of the principal authors of the
+\" Document (all of its principal authors, if it has less than five).
+\" .PP
+\" C. State on the Title page the name of the publisher of the
+\" Modified Version, as the publisher.
+\" .PP
+\" D. Preserve all the copyright notices of the Document.
+\" .PP
+\" E. Add an appropriate copyright notice for your modifications
+\" adjacent to the other copyright notices.
+\" .PP
+\" F. Include, immediately after the copyright notices, a license notice
+\" giving the public permission to use the Modified Version under the
+\" terms of this License, in the form shown in the Addendum below.
+\" Preserve in that license notice the full lists of Invariant Sections
+\" and required Cover Texts given in the Document's license notice.
+\" .PP
+\" H. Include an unaltered copy of this License.
+\" .PP
+\" I. Preserve the section entitled "History", and its title, and add to
+\" it an item stating at least the title, year, new authors, and
+\" publisher of the Modified Version as given on the Title Page. If
+\" there is no section entitled "History" in the Document, create one
+\" stating the title, year, authors, and publisher of the Document as
+\" given on its Title Page, then add an item describing the Modified
+\" Version as stated in the previous sentence.
+\" .PP
+\" J. Preserve the network location, if any, given in the Document for
+\" public access to a Transparent copy of the Document, and likewise
+\" the network locations given in the Document for previous versions
+\" it was based on. These may be placed in the "History" section.
+\" You may omit a network location for a work that was published at
+\" least four years before the Document itself, or if the original
+\" publisher of the version it refers to gives permission.
+\" .PP
+\" K. In any section entitled "Acknowledgements" or "Dedications",
+\" preserve the section's title, and preserve in the section all the
+\" substance and tone of each of the contributor acknowledgements
+\" and/or dedications given therein.
+\" .PP
+\" L. Preserve all the Invariant Sections of the Document,
+\" unaltered in their text and in their titles. Section numbers
+\" or the equivalent are not considered part of the section titles.
+\" .PP
+\" M. Delete any section entitled "Endorsements". Such a section
+\" may not be included in the Modified Version.
+\" .PP
+\" N. Do not retitle any existing section as "Endorsements"
+\" or to conflict in title with any Invariant Section.
+\" .PP
+\" If the Modified Version includes new front-matter sections or
+\" appendices that qualify as Secondary Sections and contain no material
+\" copied from the Document, you may at your option designate some or all
+\" of these sections as invariant. To do this, add their titles to the
+\" list of Invariant Sections in the Modified Version's license notice.
+\" These titles must be distinct from any other section titles.
+\" .PP
+\" You may add a section entitled "Endorsements", provided it contains
+\" nothing but endorsements of your Modified Version by various
+\" parties--for example, statements of peer review or that the text has
+\" been approved by an organization as the authoritative definition of a
+\" standard.
+\" .PP
+\" You may add a passage of up to five words as a Front-Cover Text, and a
+\" passage of up to 25 words as a Back-Cover Text, to the end of the list
+\" of Cover Texts in the Modified Version. Only one passage of
+\" Front-Cover Text and one of Back-Cover Text may be added by (or
+\" through arrangements made by) any one entity. If the Document already
+\" includes a cover text for the same cover, previously added by you or
+\" by arrangement made by the same entity you are acting on behalf of,
+\" you may not add another; but you may replace the old one, on explicit
+\" permission from the previous publisher that added the old one.
+\" .PP
+\" The author(s) and publisher(s) of the Document do not by this License
+\" give permission to use their names for publicity for or to assert or
+\" imply endorsement of any Modified Version.
+\" .PP
+
+\" 5. COMBINING DOCUMENTS
+\" .PP
+\" You may combine the Document with other documents released under this
+\" License, under the terms defined in section 4 above for modified
+\" versions, provided that you include in the combination all of the
+\" Invariant Sections of all of the original documents, unmodified, and
+\" list them all as Invariant Sections of your combined work in its
+\" license notice.
+\" .PP
+\" The combined work need only contain one copy of this License, and
+\" multiple identical Invariant Sections may be replaced with a single
+\" copy. If there are multiple Invariant Sections with the same name but
+\" different contents, make the title of each such section unique by
+\" adding at the end of it, in parentheses, the name of the original
+\" author or publisher of that section if known, or else a unique number.
+\" Make the same adjustment to the section titles in the list of
+\" Invariant Sections in the license notice of the combined work.
+\" .PP
+\" In the combination, you must combine any sections entitled "History"
+\" in the various original documents, forming one section entitled
+\" "History"; likewise combine any sections entitled "Acknowledgements",
+\" and any sections entitled "Dedications". You must delete all sections
+\" entitled "Endorsements."
+\" .PP
+
+\" 6. COLLECTIONS OF DOCUMENTS
+\" .PP
+\" You may make a collection consisting of the Document and other documents
+\" released under this License, and replace the individual copies of this
+\" License in the various documents with a single copy that is included in
+\" the collection, provided that you follow the rules of this License for
+\" verbatim copying of each of the documents in all other respects.
+\" .PP
+\" You may extract a single document from such a collection, and distribute
+\" it individually under this License, provided you insert a copy of this
+\" License into the extracted document, and follow this License in all
+\" other respects regarding verbatim copying of that document.
+\" .PP
+
+\" 7. AGGREGATION WITH INDEPENDENT WORKS
+\" .PP
+\" A compilation of the Document or its derivatives with other separate
+\" and independent documents or works, in or on a volume of a storage or
+\" distribution medium, does not as a whole count as a Modified Version
+\" of the Document, provided no compilation copyright is claimed for the
+\" compilation. Such a compilation is called an "aggregate", and this
+\" License does not apply to the other self-contained works thus compiled
+\" with the Document, on account of their being thus compiled, if they
+\" are not themselves derivative works of the Document.
+\" .PP
+\" If the Cover Text requirement of section 3 is applicable to these
+\" copies of the Document, then if the Document is less than one quarter
+\" of the entire aggregate, the Document's Cover Texts may be placed on
+\" covers that surround only the Document within the aggregate.
+\" Otherwise they must appear on covers around the whole aggregate.
+\" .PP
+
+\" 8. TRANSLATION
+\" .PP
+\" Translation is considered a kind of modification, so you may
+\" distribute translations of the Document under the terms of section 4.
+\" Replacing Invariant Sections with translations requires special
+\" permission from their copyright holders, but you may include
+\" translations of some or all Invariant Sections in addition to the
+\" original versions of these Invariant Sections. You may include a
+\" translation of this License provided that you also include the
+\" original English version of this License. In case of a disagreement
+\" between the translation and the original English version of this
+\" License, the original English version will prevail.
+\" .PP
+
+\" 9. TERMINATION
+\" .PP
+\" You may not copy, modify, sublicense, or distribute the Document except
+\" as expressly provided for under this License. Any other attempt to
+\" copy, modify, sublicense or distribute the Document is void, and will
+\" automatically terminate your rights under this License. However,
+\" parties who have received copies, or rights, from you under this
+\" License will not have their licenses terminated so long as such
+\" parties remain in full compliance.
+\" .PP
+
+\" 10. FUTURE REVISIONS OF THIS LICENSE
+\" .PP
+\" The Free Software Foundation may publish new, revised versions
+\" of the GNU Free Documentation License from time to time. Such new
+\" versions will be similar in spirit to the present version, but may
+\" differ in detail to address new problems or concerns. See
+\" http://www.gnu.org/copyleft/.
+\" .PP
+\" Each version of the License is given a distinguishing version number.
+\" If the Document specifies that a particular numbered version of this
+\" License "or any later version" applies to it, you have the option of
+\" following the terms and conditions either of that specified version or
+\" of any later version that has been published (not as a draft) by the
+\" Free Software Foundation. If the Document does not specify a version
+\" number of this License, you may choose any version ever published (not
+\" as a draft) by the Free Software Foundation.
+\" .PP
+
+\" ADDENDUM: How to use this License for your documents
+\" .PP
+\" To use this License in a document you have written, include a copy of
+\" the License in the document and put the following copyright and
+\" license notices just after the title page:
+\" .PP
+\" Copyright (c) YEAR YOUR NAME.
+\" Permission is granted to copy, distribute and/or
+\" modify this document under the terms of the GNU
+\" Free Documentation License, Version 1.1 or any later
+\" version published by the Free Software Foundation;
+\" with the Invariant Sections being LIST THEIR TITLES,
+\" with the Front-Cover Texts being LIST, and with the
+\" Back-Cover Texts being LIST. A copy of the license
+\" is included in the section entitled "GNU Free
+\" Documentation License".
+\" .PP
+\" If you have no Invariant Sections, write "with no Invariant Sections"
+\" instead of saying which ones are invariant. If you have no
+\" Front-Cover Texts, write "no Front-Cover Texts" instead of
+\" "Front-Cover Texts being LIST"; likewise for Back-Cover Texts.
+\" .PP
+\" If your document contains nontrivial examples of program code, we
+\" recommend releasing these examples in parallel under your choice of
+\" free software license, such as the GNU General Public License,
+\" to permit their use in free software.
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1
new file mode 100644
index 0000000..a76bebe
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-size.1
@@ -0,0 +1,275 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "SIZE 1"
+.TH SIZE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+size \- list section sizes and total size.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+size [\fB\-A\fR|\fB\-B\fR|\fB\-\-format=\fR\fIcompatibility\fR]
+ [\fB\-\-help\fR]
+ [\fB\-d\fR|\fB\-o\fR|\fB\-x\fR|\fB\-\-radix=\fR\fInumber\fR]
+ [\fB\-\-common\fR]
+ [\fB\-t\fR|\fB\-\-totals\fR]
+ [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBsize\fR utility lists the section sizes\-\-\-and the total
+size\-\-\-for each of the object or archive files \fIobjfile\fR in its
+argument list. By default, one line of output is generated for each
+object file or each module in an archive.
+.PP
+\&\fIobjfile\fR... are the object files to be examined.
+If none are specified, the file \f(CW\*(C`a.out\*(C'\fR will be used.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+.IP "\fB\-\-format=\fR\fIcompatibility\fR" 4
+.IX Item "--format=compatibility"
+.PD
+Using one of these options, you can choose whether the output from \s-1GNU\s0
+\&\fBsize\fR resembles output from System V \fBsize\fR (using \fB\-A\fR,
+or \fB\-\-format=sysv\fR), or Berkeley \fBsize\fR (using \fB\-B\fR, or
+\&\fB\-\-format=berkeley\fR). The default is the one-line format similar to
+Berkeley's.
+.Sp
+Here is an example of the Berkeley (default) format of output from
+\&\fBsize\fR:
+.Sp
+.Vb 4
+\& $ size \-\-format=Berkeley ranlib size
+\& text data bss dec hex filename
+\& 294880 81920 11592 388392 5ed28 ranlib
+\& 294880 81920 11888 388688 5ee50 size
+.Ve
+.Sp
+This is the same data, but displayed closer to System V conventions:
+.Sp
+.Vb 7
+\& $ size \-\-format=SysV ranlib size
+\& ranlib :
+\& section size addr
+\& .text 294880 8192
+\& .data 81920 303104
+\& .bss 11592 385024
+\& Total 388392
+\&
+\&
+\& size :
+\& section size addr
+\& .text 294880 8192
+\& .data 81920 303104
+\& .bss 11888 385024
+\& Total 388688
+.Ve
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of acceptable arguments and options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.IP "\fB\-\-radix=\fR\fInumber\fR" 4
+.IX Item "--radix=number"
+.PD
+Using one of these options, you can control whether the size of each
+section is given in decimal (\fB\-d\fR, or \fB\-\-radix=10\fR); octal
+(\fB\-o\fR, or \fB\-\-radix=8\fR); or hexadecimal (\fB\-x\fR, or
+\&\fB\-\-radix=16\fR). In \fB\-\-radix=\fR\fInumber\fR, only the three
+values (8, 10, 16) are supported. The total size is always given in two
+radices; decimal and hexadecimal for \fB\-d\fR or \fB\-x\fR output, or
+octal and hexadecimal if you're using \fB\-o\fR.
+.IP "\fB\-\-common\fR" 4
+.IX Item "--common"
+Print total size of common symbols in each file. When using Berkeley
+format these are included in the bss size.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-totals\fR" 4
+.IX Item "--totals"
+.PD
+Show totals of all objects listed (Berkeley format listing mode only).
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify that the object-code format for \fIobjfile\fR is
+\&\fIbfdname\fR. This option may not be necessary; \fBsize\fR can
+automatically recognize many formats.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of \fBsize\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1
new file mode 100644
index 0000000..0904a40
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strings.1
@@ -0,0 +1,264 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRINGS 1"
+.TH STRINGS 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+strings \- print the strings of printable characters in files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strings [\fB\-afovV\fR] [\fB\-\fR\fImin-len\fR]
+ [\fB\-n\fR \fImin-len\fR] [\fB\-\-bytes=\fR\fImin-len\fR]
+ [\fB\-t\fR \fIradix\fR] [\fB\-\-radix=\fR\fIradix\fR]
+ [\fB\-e\fR \fIencoding\fR] [\fB\-\-encoding=\fR\fIencoding\fR]
+ [\fB\-\fR] [\fB\-\-all\fR] [\fB\-\-print\-file\-name\fR]
+ [\fB\-T\fR \fIbfdname\fR] [\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-\-help\fR] [\fB\-\-version\fR] \fIfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+For each \fIfile\fR given, \s-1GNU\s0 \fBstrings\fR prints the printable
+character sequences that are at least 4 characters long (or the number
+given with the options below) and are followed by an unprintable
+character. By default, it only prints the strings from the initialized
+and loaded sections of object files; for other types of files, it prints
+the strings from the whole file.
+.PP
+\&\fBstrings\fR is mainly useful for determining the contents of non-text
+files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.IP "\fB\-\fR" 4
+.IX Item "-"
+.PD
+Do not scan only the initialized and loaded sections of object files;
+scan the whole files.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Print the name of the file before each string.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the program usage on the standard output and exit.
+.IP "\fB\-\fR\fImin-len\fR" 4
+.IX Item "-min-len"
+.PD 0
+.IP "\fB\-n\fR \fImin-len\fR" 4
+.IX Item "-n min-len"
+.IP "\fB\-\-bytes=\fR\fImin-len\fR" 4
+.IX Item "--bytes=min-len"
+.PD
+Print sequences of characters that are at least \fImin-len\fR characters
+long, instead of the default 4.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+Like \fB\-t o\fR. Some other versions of \fBstrings\fR have \fB\-o\fR
+act like \fB\-t d\fR instead. Since we can not be compatible with both
+ways, we simply chose one.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Print the offset within the file before each string. The single
+character argument specifies the radix of the offset\-\-\-\fBo\fR for
+octal, \fBx\fR for hexadecimal, or \fBd\fR for decimal.
+.IP "\fB\-e\fR \fIencoding\fR" 4
+.IX Item "-e encoding"
+.PD 0
+.IP "\fB\-\-encoding=\fR\fIencoding\fR" 4
+.IX Item "--encoding=encoding"
+.PD
+Select the character encoding of the strings that are to be found.
+Possible values for \fIencoding\fR are: \fBs\fR = single\-7\-bit\-byte
+characters (\s-1ASCII\s0, \s-1ISO\s0 8859, etc., default), \fBS\fR =
+single\-8\-bit\-byte characters, \fBb\fR = 16\-bit bigendian, \fBl\fR =
+16\-bit littleendian, \fBB\fR = 32\-bit bigendian, \fBL\fR = 32\-bit
+littleendian. Useful for finding wide character strings. (\fBl\fR
+and \fBb\fR apply to, for example, Unicode \s-1UTF\-16/UCS\-2\s0 encodings).
+.IP "\fB\-T\fR \fIbfdname\fR" 4
+.IX Item "-T bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify an object code format other than your system's default format.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the program version number on the standard output and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), \fIreadelf\fR\|(1)
+and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1
new file mode 100644
index 0000000..fba09c4
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-strip.1
@@ -0,0 +1,399 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRIP 1"
+.TH STRIP 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+strip \- Discard symbols from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strip [\fB\-F\fR \fIbfdname\fR |\fB\-\-target=\fR\fIbfdname\fR]
+ [\fB\-I\fR \fIbfdname\fR |\fB\-\-input\-target=\fR\fIbfdname\fR]
+ [\fB\-O\fR \fIbfdname\fR |\fB\-\-output\-target=\fR\fIbfdname\fR]
+ [\fB\-s\fR|\fB\-\-strip\-all\fR]
+ [\fB\-S\fR|\fB\-g\fR|\fB\-d\fR|\fB\-\-strip\-debug\fR]
+ [\fB\-K\fR \fIsymbolname\fR |\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-N\fR \fIsymbolname\fR |\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+ [\fB\-w\fR|\fB\-\-wildcard\fR]
+ [\fB\-x\fR|\fB\-\-discard\-all\fR] [\fB\-X\fR |\fB\-\-discard\-locals\fR]
+ [\fB\-R\fR \fIsectionname\fR |\fB\-\-remove\-section=\fR\fIsectionname\fR]
+ [\fB\-o\fR \fIfile\fR] [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+ [\fB\-\-keep\-file\-symbols\fR]
+ [\fB\-\-only\-keep\-debug\fR]
+ [\fB\-v\fR |\fB\-\-verbose\fR] [\fB\-V\fR|\fB\-\-version\fR]
+ [\fB\-\-help\fR] [\fB\-\-info\fR]
+ \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBstrip\fR discards all symbols from object files
+\&\fIobjfile\fR. The list of object files may include archives.
+At least one object file must be given.
+.PP
+\&\fBstrip\fR modifies the files named in its argument,
+rather than writing modified copies under different names.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR, and rewrite it in the same format.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBstrip\fR and exit.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Replace \fIobjfile\fR with a file in the output format \fIbfdname\fR.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file. This
+option may be given more than once. Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Remove all symbols.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Remove debugging symbols only.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Remove all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped. This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Remove symbol \fIsymbolname\fR from the source file. This option may be
+given more than once, and may be combined with strip options other than
+\&\fB\-K\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Put the stripped output in \fIfile\fR, rather than replacing the
+existing file. When this argument is used, only one \fIobjfile\fR
+argument may be specified.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Preserve the access and modification dates of the file.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options. The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name. If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\& \-w \-K !foo \-K fo*
+.Ve
+.Sp
+would cause strip to only keep symbols that start with the letters
+\&\*(L"fo\*(R", but to discard the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Remove non-global symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Remove compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required. The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal. Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal. Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional. You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to foo.full>"
+.ie n .IP "1.<Run ""strip \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWstrip \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run strip --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable. It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files. It
+does not make sense to use it on object files where the debugging
+information may be incomplete. Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number for \fBstrip\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified. In the case of
+archives, \fBstrip \-v\fR lists all members of the archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1
new file mode 100644
index 0000000..46cadd9
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windmc.1
@@ -0,0 +1,359 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDMC 1"
+.TH WINDMC 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+windmc \- generates Windows message resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindmc\fR reads message definitions from an input file (.mc) and
+translate them into a set of output files. The output files may be of
+four kinds:
+.ie n .IP """h""" 4
+.el .IP "\f(CWh\fR" 4
+.IX Item "h"
+A C header file containing the message definitions.
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A resource file compilable by the \fBwindres\fR tool.
+.ie n .IP """bin""" 4
+.el .IP "\f(CWbin\fR" 4
+.IX Item "bin"
+One or more binary files containing the resource data for a specific
+message language.
+.ie n .IP """dbg""" 4
+.el .IP "\f(CWdbg\fR" 4
+.IX Item "dbg"
+A C include file that maps message id's to their symbolic name.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindmc\fR converts from the \f(CW\*(C`mc\*(C'\fR format to the \f(CW\*(C`bin\*(C'\fR
+format, \f(CW\*(C`rc\*(C'\fR, \f(CW\*(C`h\*(C'\fR, and optional \f(CW\*(C`dbg\*(C'\fR it is acting like the
+Windows Message Compiler.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-ascii_in\fR" 4
+.IX Item "--ascii_in"
+.PD
+Specifies that the input file specified is \s-1ANSI\s0. This is the default
+behaviour.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-ascii_out\fR" 4
+.IX Item "--ascii_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR files should be in \s-1ANSI\s0
+format.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-binprefix\fR" 4
+.IX Item "--binprefix"
+.PD
+Specifies that \f(CW\*(C`bin\*(C'\fR filenames should have to be prefixed by the
+basename of the source file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-customflag\fR" 4
+.IX Item "--customflag"
+.PD
+Sets the customer bit in all message id's.
+.IP "\fB\-C\fR \fIcodepage\fR" 4
+.IX Item "-C codepage"
+.PD 0
+.IP "\fB\-\-codepage_in\fR \fIcodepage\fR" 4
+.IX Item "--codepage_in codepage"
+.PD
+Sets the default codepage to be used to convert input file to \s-1UTF16\s0. The
+default is ocdepage 1252.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-decimal_values\fR" 4
+.IX Item "--decimal_values"
+.PD
+Outputs the constants in the header file in decimal. Default is using
+hexadecimal output.
+.IP "\fB\-e\fR \fIext\fR" 4
+.IX Item "-e ext"
+.PD 0
+.IP "\fB\-\-extension\fR \fIext\fR" 4
+.IX Item "--extension ext"
+.PD
+The extension for the header file. The default is .h extension.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a bin file as output. This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets. Normally \fBwindmc\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-h\fR \fIpath\fR" 4
+.IX Item "-h path"
+.PD 0
+.IP "\fB\-\-headerdir\fR \fIpath\fR" 4
+.IX Item "--headerdir path"
+.PD
+The target directory of the generated header file. The default is the
+current directory.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-m\fR \fIcharacters\fR" 4
+.IX Item "-m characters"
+.PD 0
+.IP "\fB\-\-maxlength\fR \fIcharacters\fR" 4
+.IX Item "--maxlength characters"
+.PD
+Instructs \fBwindmc\fR to generate a warning if the length
+of any message exceeds the number specified.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nullterminate\fR" 4
+.IX Item "--nullterminate"
+.PD
+Terminate message text in \f(CW\*(C`bin\*(C'\fR files by zero. By default they are
+terminated by \s-1CR/LF\s0.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.PD 0
+.IP "\fB\-\-hresult_use\fR" 4
+.IX Item "--hresult_use"
+.PD
+Not yet implemented. Instructs \f(CW\*(C`windmc\*(C'\fR to generate an \s-1OLE2\s0 header
+file, using \s-1HRESULT\s0 definitions. Status codes are used if the flag is not
+specified.
+.IP "\fB\-O\fR \fIcodepage\fR" 4
+.IX Item "-O codepage"
+.PD 0
+.IP "\fB\-\-codepage_out\fR \fIcodepage\fR" 4
+.IX Item "--codepage_out codepage"
+.PD
+Sets the default codepage to be used to output text files. The default
+is ocdepage 1252.
+.IP "\fB\-r\fR \fIpath\fR" 4
+.IX Item "-r path"
+.PD 0
+.IP "\fB\-\-rcdir\fR \fIpath\fR" 4
+.IX Item "--rcdir path"
+.PD
+The target directory for the generated \f(CW\*(C`rc\*(C'\fR script and the generated
+\&\f(CW\*(C`bin\*(C'\fR files that the resource compiler script includes. The default
+is the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unicode_in\fR" 4
+.IX Item "--unicode_in"
+.PD
+Specifies that the input file is \s-1UTF16\s0.
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-unicode_out\fR" 4
+.IX Item "--unicode_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR file should be in \s-1UTF16\s0
+format. This is the default behaviour.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Enable verbose mode.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindmc\fR.
+.IP "\fB\-x\fR \fIpath\fR" 4
+.IX Item "-x path"
+.PD 0
+.IP "\fB\-\-xdgb\fR \fIpath\fR" 4
+.IX Item "--xdgb path"
+.PD
+The path of the \f(CW\*(C`dbg\*(C'\fR C include file that maps message id's to the
+symbolic name. No such file is generated without specifying the switch.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1 b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1
new file mode 100644
index 0000000..20694e0
--- /dev/null
+++ b/linux-x86/toolchain/arm-linux-androideabi-4.4.x/share/man/man1/arm-linux-androideabi-windres.1
@@ -0,0 +1,362 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.el \{\
+. de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDRES 1"
+.TH WINDRES 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+windres \- manipulate Windows resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+windmc [options] input-file
+windres [options] [input\-file] [output\-file]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindres\fR reads resources from an input file and copies them into
+an output file. Either file may be in one of three formats:
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A text format read by the Resource Compiler.
+.ie n .IP """res""" 4
+.el .IP "\f(CWres\fR" 4
+.IX Item "res"
+A binary format generated by the Resource Compiler.
+.ie n .IP """coff""" 4
+.el .IP "\f(CWcoff\fR" 4
+.IX Item "coff"
+A \s-1COFF\s0 object or executable.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindres\fR converts from the \f(CW\*(C`rc\*(C'\fR format to the \f(CW\*(C`res\*(C'\fR
+format, it is acting like the Windows Resource Compiler. When
+\&\fBwindres\fR converts from the \f(CW\*(C`res\*(C'\fR format to the \f(CW\*(C`coff\*(C'\fR
+format, it is acting like the Windows \f(CW\*(C`CVTRES\*(C'\fR program.
+.PP
+When \fBwindres\fR generates an \f(CW\*(C`rc\*(C'\fR file, the output is similar
+but not identical to the format expected for the input. When an input
+\&\f(CW\*(C`rc\*(C'\fR file refers to an external filename, an output \f(CW\*(C`rc\*(C'\fR file
+will instead include the file contents.
+.PP
+If the input or output format is not specified, \fBwindres\fR will
+guess based on the file name, or, for the input file, the file contents.
+A file with an extension of \fI.rc\fR will be treated as an \f(CW\*(C`rc\*(C'\fR
+file, a file with an extension of \fI.res\fR will be treated as a
+\&\f(CW\*(C`res\*(C'\fR file, and a file with an extension of \fI.o\fR or
+\&\fI.exe\fR will be treated as a \f(CW\*(C`coff\*(C'\fR file.
+.PP
+If no output file is specified, \fBwindres\fR will print the resources
+in \f(CW\*(C`rc\*(C'\fR format to standard output.
+.PP
+The normal use is for you to write an \f(CW\*(C`rc\*(C'\fR file, use \fBwindres\fR
+to convert it to a \s-1COFF\s0 object file, and then link the \s-1COFF\s0 file into
+your application. This will make the resources described in the
+\&\f(CW\*(C`rc\*(C'\fR file available to Windows.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-i\fR \fIfilename\fR" 4
+.IX Item "-i filename"
+.PD 0
+.IP "\fB\-\-input\fR \fIfilename\fR" 4
+.IX Item "--input filename"
+.PD
+The name of the input file. If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument as the input file
+name. If there are no non-option arguments, then \fBwindres\fR will
+read from standard input. \fBwindres\fR can not read a \s-1COFF\s0 file from
+standard input.
+.IP "\fB\-o\fR \fIfilename\fR" 4
+.IX Item "-o filename"
+.PD 0
+.IP "\fB\-\-output\fR \fIfilename\fR" 4
+.IX Item "--output filename"
+.PD
+The name of the output file. If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument, after any used
+for the input file name, as the output file name. If there is no
+non-option argument, then \fBwindres\fR will write to standard output.
+\&\fBwindres\fR can not write a \s-1COFF\s0 file to standard output. Note,
+for compatibility with \fBrc\fR the option \fB\-fo\fR is also
+accepted, but its use is not recommended.
+.IP "\fB\-J\fR \fIformat\fR" 4
+.IX Item "-J format"
+.PD 0
+.IP "\fB\-\-input\-format\fR \fIformat\fR" 4
+.IX Item "--input-format format"
+.PD
+The input format to read. \fIformat\fR may be \fBres\fR, \fBrc\fR, or
+\&\fBcoff\fR. If no input format is specified, \fBwindres\fR will
+guess, as described above.
+.IP "\fB\-O\fR \fIformat\fR" 4
+.IX Item "-O format"
+.PD 0
+.IP "\fB\-\-output\-format\fR \fIformat\fR" 4
+.IX Item "--output-format format"
+.PD
+The output format to generate. \fIformat\fR may be \fBres\fR,
+\&\fBrc\fR, or \fBcoff\fR. If no output format is specified,
+\&\fBwindres\fR will guess, as described above.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a \s-1COFF\s0 file as input or output. This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets. Normally \fBwindres\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-\-preprocessor\fR \fIprogram\fR" 4
+.IX Item "--preprocessor program"
+When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through the C
+preprocessor first. This option may be used to specify the preprocessor
+to use, including any leading arguments. The default preprocessor
+argument is \f(CW\*(C`gcc \-E \-xc\-header \-DRC_INVOKED\*(C'\fR.
+.IP "\fB\-I\fR \fIdirectory\fR" 4
+.IX Item "-I directory"
+.PD 0
+.IP "\fB\-\-include\-dir\fR \fIdirectory\fR" 4
+.IX Item "--include-dir directory"
+.PD
+Specify an include directory to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fBwindres\fR will pass this to the preprocessor as an \fB\-I\fR
+option. \fBwindres\fR will also search this directory when looking for
+files named in the \f(CW\*(C`rc\*(C'\fR file. If the argument passed to this command
+matches any of the supported \fIformats\fR (as described in the \fB\-J\fR
+option), it will issue a deprecation warning, and behave just like the
+\&\fB\-J\fR option. New programs should not use this behaviour. If a
+directory happens to match a \fIformat\fR, simple prefix it with \fB./\fR
+to disable the backward compatibility.
+.IP "\fB\-D\fR \fItarget\fR" 4
+.IX Item "-D target"
+.PD 0
+.IP "\fB\-\-define\fR \fIsym\fR\fB[=\fR\fIval\fR\fB]\fR" 4
+.IX Item "--define sym[=val]"
+.PD
+Specify a \fB\-D\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-U\fR \fItarget\fR" 4
+.IX Item "-U target"
+.PD 0
+.IP "\fB\-\-undefine\fR \fIsym\fR" 4
+.IX Item "--undefine sym"
+.PD
+Specify a \fB\-U\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+Ignored for compatibility with rc.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Enable verbose mode. This tells you what the preprocessor is if you
+didn't specify one.
+.IP "\fB\-c\fR \fIval\fR" 4
+.IX Item "-c val"
+.PD 0
+.IP "\fB\-\-codepage\fR \fIval\fR" 4
+.IX Item "--codepage val"
+.PD
+Specify the default codepage to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal prefixed by \fB0x\fR or decimal
+codepage code. The valid range is from zero up to 0xffff, but the
+validity of the codepage is host and configuration dependent.
+.IP "\fB\-l\fR \fIval\fR" 4
+.IX Item "-l val"
+.PD 0
+.IP "\fB\-\-language\fR \fIval\fR" 4
+.IX Item "--language val"
+.PD
+Specify the default language to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal language code. The low eight bits are
+the language, and the high eight bits are the sublanguage.
+.IP "\fB\-\-use\-temp\-file\fR" 4
+.IX Item "--use-temp-file"
+Use a temporary file to instead of using popen to read the output of
+the preprocessor. Use this option if the popen implementation is buggy
+on the host (eg., certain non-English language versions of Windows 95 and
+Windows 98 are known to have buggy popen where the output will instead
+go the console).
+.IP "\fB\-\-no\-use\-temp\-file\fR" 4
+.IX Item "--no-use-temp-file"
+Use popen, not a temporary file, to read the output of the preprocessor.
+This is the default behaviour.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindres\fR.
+.IP "\fB\-\-yydebug\fR" 4
+.IX Item "--yydebug"
+If \fBwindres\fR is compiled with \f(CW\*(C`YYDEBUG\*(C'\fR defined as \f(CW1\fR,
+this will turn on parser debugging.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR. The options read are
+inserted in place of the original @\fIfile\fR option. If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace. A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes. Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash. The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts. A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING b/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING
new file mode 100644
index 0000000..623b625
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING
@@ -0,0 +1,340 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING.LIB b/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING.LIB
new file mode 100644
index 0000000..2d2d780
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/COPYING.LIB
@@ -0,0 +1,510 @@
+
+ GNU LESSER GENERAL PUBLIC LICENSE
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+
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+ Yoyodyne, Inc., hereby disclaims all copyright interest in the
+ library `Frob' (a library for tweaking knobs) written by James
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+
+ <signature of Ty Coon>, 1 April 1990
+ Ty Coon, President of Vice
+
+That's all there is to it!
+
+
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-addr2line b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-addr2line
new file mode 100755
index 0000000..314a838
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-addr2line
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ar b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ar
new file mode 100755
index 0000000..0a808b3
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ar
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-as b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-as
new file mode 100755
index 0000000..5cc05ba
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-as
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++
new file mode 100755
index 0000000..aee157e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++filt b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++filt
new file mode 100755
index 0000000..91ad82e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-c++filt
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-cpp b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-cpp
new file mode 100755
index 0000000..0ecfc73
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-cpp
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-g++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-g++
new file mode 100755
index 0000000..aee157e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-g++
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc
new file mode 100755
index 0000000..d4476bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc-4.4.3 b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc-4.4.3
new file mode 100755
index 0000000..d4476bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcc-4.4.3
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcov b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcov
new file mode 100755
index 0000000..8bb95ce
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gcov
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdb b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdb
new file mode 100755
index 0000000..70fb910
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdb
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdbtui b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdbtui
new file mode 100755
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--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gdbtui
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gprof b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gprof
new file mode 100755
index 0000000..622aa5b
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-gprof
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ld b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ld
new file mode 100755
index 0000000..2b5227e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ld
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-nm b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-nm
new file mode 100755
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--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-nm
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objcopy b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objcopy
new file mode 100755
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--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objcopy
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objdump b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objdump
new file mode 100755
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--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-objdump
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ranlib b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ranlib
new file mode 100755
index 0000000..def720a
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-ranlib
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-readelf b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-readelf
new file mode 100755
index 0000000..0307d35
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-readelf
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-size b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-size
new file mode 100755
index 0000000..b9ccd9e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-size
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strings b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strings
new file mode 100755
index 0000000..b7202d3
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strings
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strip b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strip
new file mode 100755
index 0000000..c22116b
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/bin/i686-android-linux-strip
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/build-toolchain.sh b/linux-x86/toolchain/i686-android-linux-4.4.3/build-toolchain.sh
new file mode 100755
index 0000000..e61172a
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/build-toolchain.sh
@@ -0,0 +1,209 @@
+#!/bin/sh
+#
+# This script is used to rebuild the x86 toolchain Linux
+# (i686-android-linux-4.4.3) completely from scratch.
+#
+# CURRENTLY UNTESTED ON OSX!!
+#
+# You need to have a recent AOSP workspace, and have ANDROID_BUILD_TOP
+# point to it. Usually, this variable is defined in your environment after
+# you call "lunch <product>-<variant>"
+#
+
+PRODUCT_NAME=full_x86
+ARCH=x86
+GCC_VERSION=4.4.3
+TOOLCHAIN_INSTALL_NAME=i686-android-linux-$GCC_VERSION
+TOOLCHAIN_BIN_PREFIX=i686-android-linux-
+TOOLCHAIN_BUILD_NAME=$ARCH-$GCC_VERSION
+PLATFORM=android-9
+
+MPFR_VERSION=2.4.1
+GDB_VERSION=6.6
+BINUTILS_VERSION=2.20.1
+
+GIT_DATE=20110303
+
+HOST_OS=`uname -s`
+case "$HOST_OS" in
+ Darwin)
+ HOST_OS=darwin
+ HOST_TAG=darwin-x86
+ BUILD_NUM_CPUS=$(sysctl -n hw.ncpu)
+ ;;
+ Linux)
+ # note that building 32-bit binaries on x86_64 is handled later
+ HOST_OS=linux
+ HOST_TAG=linux-x86
+ BUILD_NUM_CPUS=$(grep -c processor /proc/cpuinfo)
+ ;;
+ *)
+ echo "ERROR: Unsupported OS: $HOST_OS"
+ exit 1
+esac
+
+PREBUILT_INSTALL_DIR=prebuilt/$HOST_TAG/toolchain/$TOOLCHAIN_INSTALL_NAME
+#PREBUILT_INSTALL_DIR=/tmp/zoo
+
+PREBUILT_GDB_DIR=prebuilt/android-$ARCH/gdbserver
+
+# If
+if [ -z "$ANDROID_BUILD_TOP" ]; then
+ if [ ! -f build/envsetup.sh ]; then
+ echo "Please run this script from the top of a valid AOSP platform source tree"
+ echo "or define ANDROID_BUILD_TOP in your environment to point to it. Note that"
+ echo "this variable is typically defined by running 'lunch <name>' too."
+ exit 1
+ fi
+ ANDROID_BUILD_TOP=.
+fi
+
+# Today's date, ISO format, only used to determine the temporary directory.
+TODAY=`date '+%Y%m%d'`
+
+VERBOSE_FLAG=
+: ${V:=0}
+if [ "$V" -gt 0 ]; then
+ VERBOSE_FLAG="--verbose"
+fi
+
+# A few useful functions
+#
+fail_panic ()
+{
+ if [ $? != 0 ]; then
+ echo "PANIC: $@"
+ exit 1
+ fi
+}
+
+run ()
+{
+ echo "### $@"
+ $@
+}
+
+# Compute the number of parallel build jobs
+#
+JOBS=$(( $BUILD_NUM_CPUS * 2 ))
+
+# Temporary directory where we're going to store every intermediate file.
+#
+# Normally, none of the generated executables should embed/use this path
+# but select something complex to avoid problems if this is not the case
+#
+TMPDIR=/tmp/$TOOLCHAIN_INSTALL_NAME-$TODAY
+mkdir -p $TMPDIR
+fail_panic "Can't create temporary directory: $TMPDIR"
+
+# System libraries needed to bootstrap the toolchain
+SYSTEM_LIBS="libc libm libdl libstdc++"
+
+# Where to download the toolchain sources from android.git.kernel.org
+TOOLCHAIN_SRC_DIR=$TMPDIR/toolchain-sources
+
+# Where to build the toolchain binaries
+TOOLCHAIN_BUILD_DIR=$TMPDIR/toolchain-build
+
+# Directory where we will copy the content of development/ndk
+# and update it with the freshest libraries from the system.
+DEVELOPMENT_DIR=$TMPDIR/devel
+
+# Where to place the installed binaries (NDK installation-like)
+TOOLCHAIN_INSTALL_DIR=$TMPDIR/ndk-install
+
+build_system_libraries ()
+{
+ echo "Building $PRODUCT_NAME system libraries: $SYSTEM_LIBS"
+ cd $ANDROID_BUILD_TOP &&
+ make $SYSTEM_LIBS -j$JOBS
+ fail_panic "Could not build $PRODUCT_NAME system libraries!"
+}
+
+download_toolchain_sources ()
+{
+ # We don't use ndk/build/tools/download-toolchain-sources.sh here
+ # because it removes all .info files, which breaks the ToT source
+ # build as of 2011-03-03
+ #
+ echo "Download toolchain patches to: $TOOLCHAIN_SRC_DIR"
+ GIT_PREFIX=git://android.git.kernel.org/toolchain
+ for PROJECT in build binutils gcc gdb mpfr gmp gold; do
+ PROJECT_DIR="$TOOLCHAIN_SRC_DIR/$PROJECT"
+ PROJECT_GIT="$GIT_PREFIX/$PROJECT.git"
+ echo "$PROJECT: Cleaning"
+ rm -rf $PROJECT_DIR
+ echo "$PROJECT: Downloading sources from: $PROJECT_GIT"
+ (git clone $PROJECT_GIT $PROJECT_DIR) > /dev/null 2>&1
+ fail_panic "$PROJECT: Could not git clone!!"
+ if [ -n "$GIT_DATE" ] ; then
+ echo "$PROJECT: Switching to sources for date '$GIT_DATE'"
+ (cd $PROJECT_DIR &&
+ REVISION=`git rev-list -n 1 --until="$GIT_DATE" HEAD` &&
+ run git checkout $REVISION) > /dev/null 2>&1
+ fail_panic "$PROJECT: Could not checkout?"
+ fi
+ done
+ fail_panic "Could not download toolchain sources!"
+}
+
+build_development_dir ()
+{
+ echo "Copy development/ndk to: $DEVELOPMENT_DIR"
+ rm -rf $DEVELOPMENT_DIR
+ cp -rf $ANDROID_BUILD_TOP/development/ndk $DEVELOPMENT_DIR
+ fail_panic "Could not copy development/ndk!"
+}
+
+build_sysroot ()
+{
+ echo "Generate platform files into: $TOOLCHAIN_INSTALL_DIR"
+ ndk/build/tools/build-platforms.sh \
+ --abi=$ARCH --no-symlinks --no-samples \
+ --src-dir=$DEVELOPMENT_DIR \
+ --dst-dir=$TOOLCHAIN_INSTALL_DIR
+ fail_panic "Could not generate build sysroot"
+
+ echo "Copying system files into: $TOOLCHAIN_INSTALL_DIR/sysroot"
+ cp -r $TOOLCHAIN_INSTALL_DIR/platforms/$PLATFORM/arch-$ARCH $TOOLCHAIN_INSTALL_DIR/sysroot
+ fail_panic "Could not copy files to: $TOOLCHAIN_INSTALL_DIR/sysroot"
+
+ rm -rf $TOOLCHAIN_INSTALL_DIR/sysroot/usr/lib
+}
+
+build_gcc ()
+{
+ echo "Building $TOOLCHAIN_INSTALL_NAME now (this can be long)."
+ mkdir -p $TOOLCHAIN_BUILD_DIR && rm -rf $TOOLCHAIN_BUILD_DIR/*
+ run ndk/build/tools/build-gcc.sh \
+ --sysroot=$TOOLCHAIN_INSTALL_DIR/sysroot \
+ --build-out=$TOOLCHAIN_BUILD_DIR \
+ --mpfr-version=$MPFR_VERSION \
+ --gdb-version=$GDB_VERSION \
+ --binutils-version=$BINUTILS_VERSION \
+ "$TOOLCHAIN_SRC_DIR" "$TOOLCHAIN_INSTALL_DIR" $TOOLCHAIN_BUILD_NAME
+
+ fail_panic "Could not build compiler!"
+}
+
+install_gcc ()
+{
+ echo "Installing toolchain to $PREBUILT_INSTALL_DIR"
+ SRCDIR=$TOOLCHAIN_INSTALL_DIR/toolchains/$TOOLCHAIN_BUILD_NAME/prebuilt/$HOST_TAG
+ mkdir -p $PREBUILT_INSTALL_DIR &&
+ rm -rf $PREBUILT_INSTALL_DIR/* &&
+ (cd $SRCDIR && tar cf - --exclude=sysroot *) | tar xf - -C $PREBUILT_INSTALL_DIR
+ fail_panic "Can't install!"
+ # Copy toolchain license files too
+ # Plus this script as well!
+ cp ndk/build/tools/toolchain-licenses/* $PREBUILT_INSTALL_DIR &&
+ cp $0 $PREBUILT_INSTALL_DIR
+}
+
+download_toolchain_sources
+build_development_dir
+build_sysroot
+build_gcc
+install_gcc
+
+echo "Done!"
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ar b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ar
new file mode 100755
index 0000000..0a808b3
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ar
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/as b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/as
new file mode 100755
index 0000000..5cc05ba
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/as
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/c++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/c++
new file mode 100755
index 0000000..aee157e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/c++
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/g++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/g++
new file mode 100755
index 0000000..aee157e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/g++
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/gcc b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/gcc
new file mode 100755
index 0000000..d4476bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/gcc
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ld b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ld
new file mode 100755
index 0000000..2b5227e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ld
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/nm b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/nm
new file mode 100755
index 0000000..8ba7f08
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/nm
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objcopy b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objcopy
new file mode 100755
index 0000000..64681f6
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objcopy
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objdump b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objdump
new file mode 100755
index 0000000..8af6393
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/objdump
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ranlib b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ranlib
new file mode 100755
index 0000000..def720a
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/ranlib
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/strip b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/strip
new file mode 100755
index 0000000..c22116b
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/bin/strip
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.x b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.x
new file mode 100644
index 0000000..f2cad1a
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.x
@@ -0,0 +1,190 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386",
+ "elf32-i386")
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+SEARCH_DIR("=/usr/local/lib"); SEARCH_DIR("=/lib"); SEARCH_DIR("=/usr/lib");
+SECTIONS
+{
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+ PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x08048000)); . = SEGMENT_START("text-segment", 0x08048000) + SIZEOF_HEADERS;
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+ *(.rel.iplt)
+ PROVIDE_HIDDEN (__rel_iplt_end = .);
+ }
+ .init :
+ {
+ KEEP (*(.init))
+ } =0x90909090
+ .plt : { *(.plt) *(.iplt) }
+ .text :
+ {
+ *(.text.unlikely .text.*_unlikely)
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+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
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+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
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+ {
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+ KEEP (*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ }
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+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
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+ KEEP (*(.fini_array))
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+ PROVIDE_HIDDEN (__fini_array_end = .);
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+ actually link against crtbegin.o; the
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+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ }
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+ {
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*crtbegin?.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
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+ . = DATA_SEGMENT_RELRO_END (12, .);
+ .got.plt : { *(.got.plt) *(.igot.plt) }
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+ {
+ *(.data .data.* .gnu.linkonce.d.*)
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+ _edata = .; PROVIDE (edata = .);
+ __bss_start = .;
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+ *(COMMON)
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+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections.
+ FIXME: Why do we need it? When there is no .bss section, we don't
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+ . = ALIGN(. != 0 ? 32 / 8 : 1);
+ }
+ . = ALIGN(32 / 8);
+ . = ALIGN(32 / 8);
+ _end = .; PROVIDE (end = .);
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xbn b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xbn
new file mode 100644
index 0000000..549f8b5
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xbn
@@ -0,0 +1,188 @@
+/* Script for -N: mix text and data on same page; don't align data */
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+ "elf32-i386")
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+SEARCH_DIR("=/usr/local/lib"); SEARCH_DIR("=/lib"); SEARCH_DIR("=/usr/lib");
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x08048000)); . = SEGMENT_START("text-segment", 0x08048000) + SIZEOF_HEADERS;
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+ {
+ KEEP (*(.init))
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+ PROVIDE_HIDDEN (__init_array_start = .);
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new file mode 100644
index 0000000..f5ea529
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xc
@@ -0,0 +1,193 @@
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new file mode 100644
index 0000000..74adb13
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xd
@@ -0,0 +1,190 @@
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xdc b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xdc
new file mode 100644
index 0000000..2d91da7
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xdc
@@ -0,0 +1,193 @@
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new file mode 100644
index 0000000..5e338bf
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xdw
@@ -0,0 +1,192 @@
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xn b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xn
new file mode 100644
index 0000000..48cb7d4
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xn
@@ -0,0 +1,190 @@
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xr b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xr
new file mode 100644
index 0000000..b47e74b
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xr
@@ -0,0 +1,137 @@
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new file mode 100644
index 0000000..0eca052
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xs
@@ -0,0 +1,181 @@
+/* Script for ld --shared: link shared library */
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+ "elf32-i386")
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsc b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsc
new file mode 100644
index 0000000..2597f43
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsc
@@ -0,0 +1,184 @@
+/* Script for --shared -z combreloc: shared library, combine & sort relocs */
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+ "elf32-i386")
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+ENTRY(_start)
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsw b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsw
new file mode 100644
index 0000000..c329019
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xsw
@@ -0,0 +1,183 @@
+/* Script for --shared -z combreloc -z now -z relro: shared library, combine & sort relocs */
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+ENTRY(_start)
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xu b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xu
new file mode 100644
index 0000000..15efc4c
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xu
@@ -0,0 +1,138 @@
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xw b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xw
new file mode 100644
index 0000000..aedc0a0
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/elf_i386.xw
@@ -0,0 +1,192 @@
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+ENTRY(_start)
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.x b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.x
new file mode 100644
index 0000000..2f85627
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.x
@@ -0,0 +1,46 @@
+/* Default linker script, for normal executables */
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+ "a.out-i386-linux")
+OUTPUT_ARCH(i386)
+PROVIDE (__stack = 0);
+SECTIONS
+{
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+ __edata = .;
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+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xbn b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xbn
new file mode 100644
index 0000000..91b1e91
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xbn
@@ -0,0 +1,46 @@
+/* Script for -N: mix text and data on same page; don't align data */
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+OUTPUT_ARCH(i386)
+PROVIDE (__stack = 0);
+SECTIONS
+{
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diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xn b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xn
new file mode 100644
index 0000000..6185656
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xn
@@ -0,0 +1,46 @@
+/* Script for -n: mix text and data on same page */
+OUTPUT_FORMAT("a.out-i386-linux", "a.out-i386-linux",
+ "a.out-i386-linux")
+OUTPUT_ARCH(i386)
+PROVIDE (__stack = 0);
+SECTIONS
+{
+ . = 0;
+ .text :
+ {
+ CREATE_OBJECT_SYMBOLS
+ *(.text)
+ /* The next six sections are for SunOS dynamic linking. The order
+ is important. */
+ *(.dynrel)
+ *(.hash)
+ *(.dynsym)
+ *(.dynstr)
+ *(.rules)
+ *(.need)
+ _etext = .;
+ __etext = .;
+ }
+ . = ALIGN(0x1000);
+ .data :
+ {
+ /* The first three sections are for SunOS dynamic linking. */
+ *(.dynamic)
+ *(.got)
+ *(.plt)
+ *(.data)
+ *(.linux-dynamic) /* For Linux dynamic linking. */
+ CONSTRUCTORS
+ _edata = .;
+ __edata = .;
+ }
+ .bss :
+ {
+ __bss_start = .;
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _end = . ;
+ __end = . ;
+ }
+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xr b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xr
new file mode 100644
index 0000000..8a33f28
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xr
@@ -0,0 +1,37 @@
+/* Script for ld -r: link without relocation */
+OUTPUT_FORMAT("a.out-i386-linux", "a.out-i386-linux",
+ "a.out-i386-linux")
+OUTPUT_ARCH(i386)
+SECTIONS
+{
+ .text :
+ {
+ CREATE_OBJECT_SYMBOLS
+ *(.text)
+ /* The next six sections are for SunOS dynamic linking. The order
+ is important. */
+ *(.dynrel)
+ *(.hash)
+ *(.dynsym)
+ *(.dynstr)
+ *(.rules)
+ *(.need)
+ }
+ .data :
+ {
+ /* The first three sections are for SunOS dynamic linking. */
+ *(.dynamic)
+ *(.got)
+ *(.plt)
+ *(.data)
+ *(.linux-dynamic) /* For Linux dynamic linking. */
+ }
+ .bss :
+ {
+ ;
+ *(.bss)
+ *(COMMON)
+ ;
+ ;
+ }
+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xu b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xu
new file mode 100644
index 0000000..6847100
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/i686-android-linux/lib/ldscripts/i386linux.xu
@@ -0,0 +1,38 @@
+/* Script for ld -Ur: link w/out relocation, do create constructors */
+OUTPUT_FORMAT("a.out-i386-linux", "a.out-i386-linux",
+ "a.out-i386-linux")
+OUTPUT_ARCH(i386)
+SECTIONS
+{
+ .text :
+ {
+ CREATE_OBJECT_SYMBOLS
+ *(.text)
+ /* The next six sections are for SunOS dynamic linking. The order
+ is important. */
+ *(.dynrel)
+ *(.hash)
+ *(.dynsym)
+ *(.dynstr)
+ *(.rules)
+ *(.need)
+ }
+ .data :
+ {
+ /* The first three sections are for SunOS dynamic linking. */
+ *(.dynamic)
+ *(.got)
+ *(.plt)
+ *(.data)
+ *(.linux-dynamic) /* For Linux dynamic linking. */
+ CONSTRUCTORS
+ }
+ .bss :
+ {
+ ;
+ *(.bss)
+ *(COMMON)
+ ;
+ ;
+ }
+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbegin.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbegin.o
new file mode 100644
index 0000000..7af4e36
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbegin.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginS.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginS.o
new file mode 100644
index 0000000..0e3faea
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginS.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginT.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginT.o
new file mode 100644
index 0000000..7af4e36
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtbeginT.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtend.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtend.o
new file mode 100644
index 0000000..31646bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtend.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtendS.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtendS.o
new file mode 100644
index 0000000..31646bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtendS.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtfastmath.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtfastmath.o
new file mode 100644
index 0000000..8eb79ca
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtfastmath.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec32.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec32.o
new file mode 100644
index 0000000..99299bc
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec32.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec64.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec64.o
new file mode 100644
index 0000000..bef49c9
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec64.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec80.o b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec80.o
new file mode 100644
index 0000000..13c944d
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/crtprec80.o
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/README b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/README
new file mode 100644
index 0000000..7086a77
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process. They are
+system-specific, and will not work on any other kind of system. They
+are also not part of GCC. The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix. As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/limits.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/limits.h
new file mode 100644
index 0000000..30e08a7
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/limits.h
@@ -0,0 +1,125 @@
+/* This administrivia gets added to the beginning of limits.h
+ if the system has its own version of limits.h. */
+
+/* We use _GCC_LIMITS_H_ because we want this not to match
+ any macros that the system's limits.h uses for its own purposes. */
+#ifndef _GCC_LIMITS_H_ /* Terminated in limity.h. */
+#define _GCC_LIMITS_H_
+
+#ifndef _LIBC_LIMITS_H_
+/* Use "..." so that we find syslimits.h only in this same directory. */
+#include "syslimits.h"
+#endif
+#ifndef _LIMITS_H___
+#define _LIMITS_H___
+
+/* Number of bits in a `char'. */
+#undef CHAR_BIT
+#define CHAR_BIT __CHAR_BIT__
+
+/* Maximum length of a multibyte character. */
+#ifndef MB_LEN_MAX
+#define MB_LEN_MAX 1
+#endif
+
+/* Minimum and maximum values a `signed char' can hold. */
+#undef SCHAR_MIN
+#define SCHAR_MIN (-SCHAR_MAX - 1)
+#undef SCHAR_MAX
+#define SCHAR_MAX __SCHAR_MAX__
+
+/* Maximum value an `unsigned char' can hold. (Minimum is 0). */
+#undef UCHAR_MAX
+#if __SCHAR_MAX__ == __INT_MAX__
+# define UCHAR_MAX (SCHAR_MAX * 2U + 1U)
+#else
+# define UCHAR_MAX (SCHAR_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `char' can hold. */
+#ifdef __CHAR_UNSIGNED__
+# undef CHAR_MIN
+# if __SCHAR_MAX__ == __INT_MAX__
+# define CHAR_MIN 0U
+# else
+# define CHAR_MIN 0
+# endif
+# undef CHAR_MAX
+# define CHAR_MAX UCHAR_MAX
+#else
+# undef CHAR_MIN
+# define CHAR_MIN SCHAR_MIN
+# undef CHAR_MAX
+# define CHAR_MAX SCHAR_MAX
+#endif
+
+/* Minimum and maximum values a `signed short int' can hold. */
+#undef SHRT_MIN
+#define SHRT_MIN (-SHRT_MAX - 1)
+#undef SHRT_MAX
+#define SHRT_MAX __SHRT_MAX__
+
+/* Maximum value an `unsigned short int' can hold. (Minimum is 0). */
+#undef USHRT_MAX
+#if __SHRT_MAX__ == __INT_MAX__
+# define USHRT_MAX (SHRT_MAX * 2U + 1U)
+#else
+# define USHRT_MAX (SHRT_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `signed int' can hold. */
+#undef INT_MIN
+#define INT_MIN (-INT_MAX - 1)
+#undef INT_MAX
+#define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold. (Minimum is 0). */
+#undef UINT_MAX
+#define UINT_MAX (INT_MAX * 2U + 1U)
+
+/* Minimum and maximum values a `signed long int' can hold.
+ (Same as `int'). */
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX - 1L)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1UL)
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LLONG_MIN
+# define LLONG_MIN (-LLONG_MAX - 1LL)
+# undef LLONG_MAX
+# define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULLONG_MAX
+# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+#endif
+
+#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold. */
+# undef LONG_LONG_MIN
+# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL)
+# undef LONG_LONG_MAX
+# define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */
+# undef ULONG_LONG_MAX
+# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL)
+#endif
+
+#endif /* _LIMITS_H___ */
+/* This administrivia gets added to the end of limits.h
+ if the system has its own version of limits.h. */
+
+#else /* not _GCC_LIMITS_H_ */
+
+#ifdef _GCC_NEXT_LIMITS_H
+#include_next <limits.h> /* recurse down to the real one */
+#endif
+
+#endif /* not _GCC_LIMITS_H_ */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/linux/a.out.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/linux/a.out.h
new file mode 100644
index 0000000..3592ba2
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/linux/a.out.h
@@ -0,0 +1,229 @@
+/* DO NOT EDIT THIS FILE.
+
+ It has been auto-edited by fixincludes from:
+
+ "/tmp/i686-android-linux-4.4.3-20110303/ndk-install/toolchains/x86-4.4.3/prebuilt/linux-x86/sysroot/usr/include/linux/a.out.h"
+
+ This had to be done to correct non-standard usages in the
+ original, manufacturer supplied header file. */
+
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __A_OUT_GNU_H__
+#define __A_OUT_GNU_H__
+
+#define __GNU_EXEC_MACROS__
+
+#ifndef __STRUCT_EXEC_OVERRIDE__
+
+#include <asm/a.out.h>
+
+#endif
+
+enum machine_type {
+#ifdef M_OLDSUN2
+ M__OLDSUN2 = M_OLDSUN2,
+#else
+ M_OLDSUN2 = 0,
+#endif
+#ifdef M_68010
+ M__68010 = M_68010,
+#else
+ M_68010 = 1,
+#endif
+#ifdef M_68020
+ M__68020 = M_68020,
+#else
+ M_68020 = 2,
+#endif
+#ifdef M_SPARC
+ M__SPARC = M_SPARC,
+#else
+ M_SPARC = 3,
+#endif
+
+ M_386 = 100,
+ M_MIPS1 = 151,
+ M_MIPS2 = 152
+};
+
+#ifndef N_MAGIC
+#define N_MAGIC(exec) ((exec).a_info & 0xffff)
+#endif
+#define N_MACHTYPE(exec) ((enum machine_type)(((exec).a_info >> 16) & 0xff))
+#define N_FLAGS(exec) (((exec).a_info >> 24) & 0xff)
+#define N_SET_INFO(exec, magic, type, flags) ((exec).a_info = ((magic) & 0xffff) | (((int)(type) & 0xff) << 16) | (((flags) & 0xff) << 24))
+#define N_SET_MAGIC(exec, magic) ((exec).a_info = (((exec).a_info & 0xffff0000) | ((magic) & 0xffff)))
+
+#define N_SET_MACHTYPE(exec, machtype) ((exec).a_info = ((exec).a_info&0xff00ffff) | ((((int)(machtype))&0xff) << 16))
+
+#define N_SET_FLAGS(exec, flags) ((exec).a_info = ((exec).a_info&0x00ffffff) | (((flags) & 0xff) << 24))
+
+#define OMAGIC 0407
+
+#define NMAGIC 0410
+
+#define ZMAGIC 0413
+
+#define QMAGIC 0314
+
+#define CMAGIC 0421
+
+#ifndef N_BADMAG
+#define N_BADMAG(x) (N_MAGIC(x) != OMAGIC && N_MAGIC(x) != NMAGIC && N_MAGIC(x) != ZMAGIC && N_MAGIC(x) != QMAGIC)
+#endif
+
+#define _N_HDROFF(x) (1024 - sizeof (struct exec))
+
+#ifndef N_TXTOFF
+#define N_TXTOFF(x) (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec)))
+#endif
+
+#ifndef N_DATOFF
+#define N_DATOFF(x) (N_TXTOFF(x) + (x).a_text)
+#endif
+
+#ifndef N_TRELOFF
+#define N_TRELOFF(x) (N_DATOFF(x) + (x).a_data)
+#endif
+
+#ifndef N_DRELOFF
+#define N_DRELOFF(x) (N_TRELOFF(x) + N_TRSIZE(x))
+#endif
+
+#ifndef N_SYMOFF
+#define N_SYMOFF(x) (N_DRELOFF(x) + N_DRSIZE(x))
+#endif
+
+#ifndef N_STROFF
+#define N_STROFF(x) (N_SYMOFF(x) + N_SYMSIZE(x))
+#endif
+
+#ifndef N_TXTADDR
+#define N_TXTADDR(x) (N_MAGIC(x) == QMAGIC ? PAGE_SIZE : 0)
+#endif
+
+#if defined(vax) || defined(hp300) || defined(pyr)
+#define SEGMENT_SIZE page_size
+#endif
+#ifdef sony
+#define SEGMENT_SIZE 0x2000
+#endif
+#ifdef is68k
+#define SEGMENT_SIZE 0x20000
+#endif
+#if defined(m68k) && defined(PORTAR)
+#define PAGE_SIZE 0x400
+#define SEGMENT_SIZE PAGE_SIZE
+#endif
+
+#ifdef __linux__
+#include <asm/page.h>
+#if defined(__i386__) || defined(__mc68000__)
+#define SEGMENT_SIZE 1024
+#else
+#ifndef SEGMENT_SIZE
+#define SEGMENT_SIZE PAGE_SIZE
+#endif
+#endif
+#endif
+
+#define _N_SEGMENT_ROUND(x) ALIGN(x, SEGMENT_SIZE)
+
+#define _N_TXTENDADDR(x) (N_TXTADDR(x)+(x).a_text)
+
+#ifndef N_DATADDR
+#define N_DATADDR(x) (N_MAGIC(x)==OMAGIC? (_N_TXTENDADDR(x)) : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x))))
+#endif
+
+#ifndef N_BSSADDR
+#define N_BSSADDR(x) (N_DATADDR(x) + (x).a_data)
+#endif
+
+#ifndef N_NLIST_DECLARED
+struct nlist {
+ union {
+ char *n_name;
+ struct nlist *n_next;
+ long n_strx;
+ } n_un;
+ unsigned char n_type;
+ char n_other;
+ short n_desc;
+ unsigned long n_value;
+};
+#endif
+
+#ifndef N_UNDF
+#define N_UNDF 0
+#endif
+#ifndef N_ABS
+#define N_ABS 2
+#endif
+#ifndef N_TEXT
+#define N_TEXT 4
+#endif
+#ifndef N_DATA
+#define N_DATA 6
+#endif
+#ifndef N_BSS
+#define N_BSS 8
+#endif
+#ifndef N_FN
+#define N_FN 15
+#endif
+
+#ifndef N_EXT
+#define N_EXT 1
+#endif
+#ifndef N_TYPE
+#define N_TYPE 036
+#endif
+#ifndef N_STAB
+#define N_STAB 0340
+#endif
+
+#define N_INDR 0xa
+
+#define N_SETA 0x14
+#define N_SETT 0x16
+#define N_SETD 0x18
+#define N_SETB 0x1A
+
+#define N_SETV 0x1C
+
+#ifndef N_RELOCATION_INFO_DECLARED
+
+struct relocation_info
+{
+
+ int r_address;
+
+ unsigned int r_symbolnum:24;
+
+ unsigned int r_pcrel:1;
+
+ unsigned int r_length:2;
+
+ unsigned int r_extern:1;
+
+#ifdef NS32K
+ unsigned r_bsr:1;
+ unsigned r_disp:1;
+ unsigned r_pad:2;
+#else
+ unsigned int r_pad:4;
+#endif
+};
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/stdio.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/stdio.h
new file mode 100644
index 0000000..425852b
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/stdio.h
@@ -0,0 +1,462 @@
+/* DO NOT EDIT THIS FILE.
+
+ It has been auto-edited by fixincludes from:
+
+ "/tmp/i686-android-linux-4.4.3-20110303/ndk-install/toolchains/x86-4.4.3/prebuilt/linux-x86/sysroot/usr/include/stdio.h"
+
+ This had to be done to correct non-standard usages in the
+ original, manufacturer supplied header file. */
+
+/* $OpenBSD: stdio.h,v 1.35 2006/01/13 18:10:09 miod Exp $ */
+/* $NetBSD: stdio.h,v 1.18 1996/04/25 18:29:21 jtc Exp $ */
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)stdio.h 5.17 (Berkeley) 6/3/91
+ */
+
+#ifndef _STDIO_H_
+#define _STDIO_H_
+
+#include <sys/cdefs.h>
+#include <sys/_types.h>
+
+/* __gnuc_va_list and size_t must be defined by stdio.h according to Posix */
+#define __need___va_list
+#include <stdarg.h>
+
+/* note that this forces stddef.h to *only* define size_t */
+#define __need_size_t
+#include <stddef.h>
+
+#include <stddef.h>
+
+#if __BSD_VISIBLE || __POSIX_VISIBLE || __XPG_VISIBLE
+#include <sys/types.h> /* XXX should be removed */
+#endif
+
+#ifndef _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED_
+typedef unsigned long size_t;
+#endif
+
+#ifndef _OFF_T_DEFINED_
+#define _OFF_T_DEFINED_
+typedef long off_t;
+#endif
+
+#ifndef NULL
+#ifdef __GNUG__
+#define NULL __null
+#else
+#define NULL 0L
+#endif
+#endif
+
+#define _FSTDIO /* Define for new stdio with functions. */
+
+typedef off_t fpos_t; /* stdio file position type */
+
+/*
+ * NB: to fit things in six character monocase externals, the stdio
+ * code uses the prefix `__s' for stdio objects, typically followed
+ * by a three-character attempt at a mnemonic.
+ */
+
+/* stdio buffers */
+struct __sbuf {
+ unsigned char *_base;
+ int _size;
+};
+
+/*
+ * stdio state variables.
+ *
+ * The following always hold:
+ *
+ * if (_flags&(__SLBF|__SWR)) == (__SLBF|__SWR),
+ * _lbfsize is -_bf._size, else _lbfsize is 0
+ * if _flags&__SRD, _w is 0
+ * if _flags&__SWR, _r is 0
+ *
+ * This ensures that the getc and putc macros (or inline functions) never
+ * try to write or read from a file that is in `read' or `write' mode.
+ * (Moreover, they can, and do, automatically switch from read mode to
+ * write mode, and back, on "r+" and "w+" files.)
+ *
+ * _lbfsize is used only to make the inline line-buffered output stream
+ * code as compact as possible.
+ *
+ * _ub, _up, and _ur are used when ungetc() pushes back more characters
+ * than fit in the current _bf, or when ungetc() pushes back a character
+ * that does not match the previous one in _bf. When this happens,
+ * _ub._base becomes non-nil (i.e., a stream has ungetc() data iff
+ * _ub._base!=NULL) and _up and _ur save the current values of _p and _r.
+ *
+ * NOTE: if you change this structure, you also need to update the
+ * std() initializer in findfp.c.
+ */
+typedef struct __sFILE {
+ unsigned char *_p; /* current position in (some) buffer */
+ int _r; /* read space left for getc() */
+ int _w; /* write space left for putc() */
+ short _flags; /* flags, below; this FILE is free if 0 */
+ short _file; /* fileno, if Unix descriptor, else -1 */
+ struct __sbuf _bf; /* the buffer (at least 1 byte, if !NULL) */
+ int _lbfsize; /* 0 or -_bf._size, for inline putc */
+
+ /* operations */
+ void *_cookie; /* cookie passed to io functions */
+ int (*_close)(void *);
+ int (*_read)(void *, char *, int);
+ fpos_t (*_seek)(void *, fpos_t, int);
+ int (*_write)(void *, const char *, int);
+
+ /* extension data, to avoid further ABI breakage */
+ struct __sbuf _ext;
+ /* data for long sequences of ungetc() */
+ unsigned char *_up; /* saved _p when _p is doing ungetc data */
+ int _ur; /* saved _r when _r is counting ungetc data */
+
+ /* tricks to meet minimum requirements even when malloc() fails */
+ unsigned char _ubuf[3]; /* guarantee an ungetc() buffer */
+ unsigned char _nbuf[1]; /* guarantee a getc() buffer */
+
+ /* separate buffer for fgetln() when line crosses buffer boundary */
+ struct __sbuf _lb; /* buffer for fgetln() */
+
+ /* Unix stdio files get aligned to block boundaries on fseek() */
+ int _blksize; /* stat.st_blksize (may be != _bf._size) */
+ fpos_t _offset; /* current lseek offset */
+} FILE;
+
+__BEGIN_DECLS
+extern FILE __sF[];
+__END_DECLS
+
+#define __SLBF 0x0001 /* line buffered */
+#define __SNBF 0x0002 /* unbuffered */
+#define __SRD 0x0004 /* OK to read */
+#define __SWR 0x0008 /* OK to write */
+ /* RD and WR are never simultaneously asserted */
+#define __SRW 0x0010 /* open for reading & writing */
+#define __SEOF 0x0020 /* found EOF */
+#define __SERR 0x0040 /* found error */
+#define __SMBF 0x0080 /* _buf is from malloc */
+#define __SAPP 0x0100 /* fdopen()ed in append mode */
+#define __SSTR 0x0200 /* this is an sprintf/snprintf string */
+#define __SOPT 0x0400 /* do fseek() optimisation */
+#define __SNPT 0x0800 /* do not do fseek() optimisation */
+#define __SOFF 0x1000 /* set iff _offset is in fact correct */
+#define __SMOD 0x2000 /* true => fgetln modified _p text */
+#define __SALC 0x4000 /* allocate string space dynamically */
+
+/*
+ * The following three definitions are for ANSI C, which took them
+ * from System V, which brilliantly took internal interface macros and
+ * made them official arguments to setvbuf(), without renaming them.
+ * Hence, these ugly _IOxxx names are *supposed* to appear in user code.
+ *
+ * Although numbered as their counterparts above, the implementation
+ * does not rely on this.
+ */
+#define _IOFBF 0 /* setvbuf should set fully buffered */
+#define _IOLBF 1 /* setvbuf should set line buffered */
+#define _IONBF 2 /* setvbuf should set unbuffered */
+
+#define BUFSIZ 1024 /* size of buffer used by setbuf */
+
+#define EOF (-1)
+
+/*
+ * FOPEN_MAX is a minimum maximum, and should be the number of descriptors
+ * that the kernel can provide without allocation of a resource that can
+ * fail without the process sleeping. Do not use this for anything.
+ */
+#define FOPEN_MAX 20 /* must be <= OPEN_MAX <sys/syslimits.h> */
+#define FILENAME_MAX 1024 /* must be <= PATH_MAX <sys/syslimits.h> */
+
+/* System V/ANSI C; this is the wrong way to do this, do *not* use these. */
+#if __BSD_VISIBLE || __XPG_VISIBLE
+#define P_tmpdir "/tmp/"
+#endif
+#define L_tmpnam 1024 /* XXX must be == PATH_MAX */
+#define TMP_MAX 308915776
+
+#ifndef SEEK_SET
+#define SEEK_SET 0 /* set file offset to offset */
+#endif
+#ifndef SEEK_CUR
+#define SEEK_CUR 1 /* set file offset to current plus offset */
+#endif
+#ifndef SEEK_END
+#define SEEK_END 2 /* set file offset to EOF plus offset */
+#endif
+
+#define stdin (&__sF[0])
+#define stdout (&__sF[1])
+#define stderr (&__sF[2])
+
+/*
+ * Functions defined in ANSI C standard.
+ */
+__BEGIN_DECLS
+void clearerr(FILE *);
+int fclose(FILE *);
+int feof(FILE *);
+int ferror(FILE *);
+int fflush(FILE *);
+int fgetc(FILE *);
+int fgetpos(FILE *, fpos_t *);
+char *fgets(char *, int, FILE *);
+FILE *fopen(const char *, const char *);
+int fprintf(FILE *, const char *, ...);
+int fputc(int, FILE *);
+int fputs(const char *, FILE *);
+size_t fread(void *, size_t, size_t, FILE *);
+FILE *freopen(const char *, const char *, FILE *);
+int fscanf(FILE *, const char *, ...);
+int fseek(FILE *, long, int);
+int fseeko(FILE *, off_t, int);
+int fsetpos(FILE *, const fpos_t *);
+long ftell(FILE *);
+off_t ftello(FILE *);
+size_t fwrite(const void *, size_t, size_t, FILE *);
+int getc(FILE *);
+int getchar(void);
+char *gets(char *);
+#if __BSD_VISIBLE && !defined(__SYS_ERRLIST)
+#define __SYS_ERRLIST
+
+extern int sys_nerr; /* perror(3) external variables */
+extern char *sys_errlist[];
+#endif
+void perror(const char *);
+int printf(const char *, ...);
+int putc(int, FILE *);
+int putchar(int);
+int puts(const char *);
+int remove(const char *);
+int rename(const char *, const char *);
+void rewind(FILE *);
+int scanf(const char *, ...);
+void setbuf(FILE *, char *);
+int setvbuf(FILE *, char *, int, size_t);
+int sprintf(char *, const char *, ...);
+int sscanf(const char *, const char *, ...);
+FILE *tmpfile(void);
+char *tmpnam(char *);
+int ungetc(int, FILE *);
+int vfprintf(FILE *, const char *, __gnuc_va_list);
+int vprintf(const char *, __gnuc_va_list);
+int vsprintf(char *, const char *, __gnuc_va_list);
+
+#if __ISO_C_VISIBLE >= 1999 || __BSD_VISIBLE
+int snprintf(char *, size_t, const char *, ...)
+ __attribute__((__format__ (printf, 3, 4)))
+ __attribute__((__nonnull__ (3)));
+int vfscanf(FILE *, const char *, __gnuc_va_list)
+ __attribute__((__format__ (scanf, 2, 0)))
+ __attribute__((__nonnull__ (2)));
+int vscanf(const char *, __gnuc_va_list)
+ __attribute__((__format__ (scanf, 1, 0)))
+ __attribute__((__nonnull__ (1)));
+int vsnprintf(char *, size_t, const char *, __gnuc_va_list)
+ __attribute__((__format__ (printf, 3, 0)))
+ __attribute__((__nonnull__ (3)));
+int vsscanf(const char *, const char *, __gnuc_va_list)
+ __attribute__((__format__ (scanf, 2, 0)))
+ __attribute__((__nonnull__ (2)));
+#endif /* __ISO_C_VISIBLE >= 1999 || __BSD_VISIBLE */
+
+__END_DECLS
+
+
+/*
+ * Functions defined in POSIX 1003.1.
+ */
+#if __BSD_VISIBLE || __POSIX_VISIBLE || __XPG_VISIBLE
+#define L_ctermid 1024 /* size for ctermid(); PATH_MAX */
+#define L_cuserid 9 /* size for cuserid(); UT_NAMESIZE + 1 */
+
+__BEGIN_DECLS
+#if 0 /* MISSING FROM BIONIC */
+char *ctermid(char *);
+char *cuserid(char *);
+#endif /* MISSING */
+FILE *fdopen(int, const char *);
+int fileno(FILE *);
+
+#if (__POSIX_VISIBLE >= 199209)
+int pclose(FILE *);
+FILE *popen(const char *, const char *);
+#endif
+
+#if __POSIX_VISIBLE >= 199506
+void flockfile(FILE *);
+int ftrylockfile(FILE *);
+void funlockfile(FILE *);
+
+/*
+ * These are normally used through macros as defined below, but POSIX
+ * requires functions as well.
+ */
+int getc_unlocked(FILE *);
+int getchar_unlocked(void);
+int putc_unlocked(int, FILE *);
+int putchar_unlocked(int);
+#endif /* __POSIX_VISIBLE >= 199506 */
+
+#if __XPG_VISIBLE
+char *tempnam(const char *, const char *);
+#endif
+__END_DECLS
+
+#endif /* __BSD_VISIBLE || __POSIX_VISIBLE || __XPG_VISIBLE */
+
+/*
+ * Routines that are purely local.
+ */
+#if __BSD_VISIBLE
+__BEGIN_DECLS
+int asprintf(char **, const char *, ...)
+ __attribute__((__format__ (printf, 2, 3)))
+ __attribute__((__nonnull__ (2)));
+char *fgetln(FILE *, size_t *);
+int fpurge(FILE *);
+int getw(FILE *);
+int putw(int, FILE *);
+void setbuffer(FILE *, char *, int);
+int setlinebuf(FILE *);
+int vasprintf(char **, const char *, __gnuc_va_list)
+ __attribute__((__format__ (printf, 2, 0)))
+ __attribute__((__nonnull__ (2)));
+__END_DECLS
+
+/*
+ * Stdio function-access interface.
+ */
+__BEGIN_DECLS
+FILE *funopen(const void *,
+ int (*)(void *, char *, int),
+ int (*)(void *, const char *, int),
+ fpos_t (*)(void *, fpos_t, int),
+ int (*)(void *));
+__END_DECLS
+#define fropen(cookie, fn) funopen(cookie, fn, 0, 0, 0)
+#define fwopen(cookie, fn) funopen(cookie, 0, fn, 0, 0)
+#endif /* __BSD_VISIBLE */
+
+/*
+ * Functions internal to the implementation.
+ */
+__BEGIN_DECLS
+int __srget(FILE *);
+int __swbuf(int, FILE *);
+__END_DECLS
+
+/*
+ * The __sfoo macros are here so that we can
+ * define function versions in the C library.
+ */
+#define __sgetc(p) (--(p)->_r < 0 ? __srget(p) : (int)(*(p)->_p++))
+#if defined(__GNUC__)
+static __inline int __sputc(int _c, FILE *_p) {
+ if (--_p->_w >= 0 || (_p->_w >= _p->_lbfsize && (char)_c != '\n'))
+ return (*_p->_p++ = _c);
+ else
+ return (__swbuf(_c, _p));
+}
+#else
+/*
+ * This has been tuned to generate reasonable code on the vax using pcc.
+ */
+#define __sputc(c, p) \
+ (--(p)->_w < 0 ? \
+ (p)->_w >= (p)->_lbfsize ? \
+ (*(p)->_p = (c)), *(p)->_p != '\n' ? \
+ (int)*(p)->_p++ : \
+ __swbuf('\n', p) : \
+ __swbuf((int)(c), p) : \
+ (*(p)->_p = (c), (int)*(p)->_p++))
+#endif
+
+#define __sfeof(p) (((p)->_flags & __SEOF) != 0)
+#define __sferror(p) (((p)->_flags & __SERR) != 0)
+#define __sclearerr(p) ((void)((p)->_flags &= ~(__SERR|__SEOF)))
+#define __sfileno(p) ((p)->_file)
+
+#define feof(p) __sfeof(p)
+#define ferror(p) __sferror(p)
+
+#ifndef _POSIX_THREADS
+#define clearerr(p) __sclearerr(p)
+#endif
+
+#if __POSIX_VISIBLE
+#define fileno(p) __sfileno(p)
+#endif
+
+#ifndef lint
+#ifndef _POSIX_THREADS
+#define getc(fp) __sgetc(fp)
+#endif /* _POSIX_THREADS */
+#define getc_unlocked(fp) __sgetc(fp)
+/*
+ * The macro implementations of putc and putc_unlocked are not
+ * fully POSIX compliant; they do not set errno on failure
+ */
+#if __BSD_VISIBLE
+#ifndef _POSIX_THREADS
+#define putc(x, fp) __sputc(x, fp)
+#endif /* _POSIX_THREADS */
+#define putc_unlocked(x, fp) __sputc(x, fp)
+#endif /* __BSD_VISIBLE */
+#endif /* lint */
+
+#define getchar() getc(stdin)
+#define putchar(x) putc(x, stdout)
+#define getchar_unlocked() getc_unlocked(stdin)
+#define putchar_unlocked(c) putc_unlocked(c, stdout)
+
+#ifdef _GNU_SOURCE
+/*
+ * glibc defines dprintf(int, const char*, ...), which is poorly named
+ * and likely to conflict with locally defined debugging printfs
+ * fdprintf is a better name, and some programs that use fdprintf use a
+ * #define fdprintf dprintf for compatibility
+ */
+int fdprintf(int, const char*, ...);
+int vfdprintf(int, const char*, __gnuc_va_list);
+#endif /* _GNU_SOURCE */
+
+#endif /* _STDIO_H_ */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/sys/types.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/sys/types.h
new file mode 100644
index 0000000..1a2ccf7
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/sys/types.h
@@ -0,0 +1,140 @@
+/* DO NOT EDIT THIS FILE.
+
+ It has been auto-edited by fixincludes from:
+
+ "/tmp/i686-android-linux-4.4.3-20110303/ndk-install/toolchains/x86-4.4.3/prebuilt/linux-x86/sysroot/usr/include/sys/types.h"
+
+ This had to be done to correct non-standard usages in the
+ original, manufacturer supplied header file. */
+
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef _SYS_TYPES_H_
+#define _SYS_TYPES_H_
+
+#define __need_size_t
+#define __need_ptrdiff_t
+#include <stddef.h>
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+#include <linux/posix_types.h>
+#include <asm/types.h>
+#include <linux/types.h>
+#include <machine/kernel.h>
+
+typedef __u32 __kernel_dev_t;
+
+/* be careful with __kernel_gid_t and __kernel_uid_t
+ * these are defined as 16-bit for legacy reason, but
+ * the kernel uses 32-bits instead.
+ *
+ * 32-bit valuea are required for Android, so use
+ * __kernel_uid32_t and __kernel_gid32_t
+ */
+
+typedef __kernel_blkcnt_t blkcnt_t;
+typedef __kernel_blksize_t blksize_t;
+typedef __kernel_clock_t clock_t;
+typedef __kernel_clockid_t clockid_t;
+typedef __kernel_dev_t dev_t;
+typedef __kernel_fsblkcnt_t fsblkcnt_t;
+typedef __kernel_fsfilcnt_t fsfilcnt_t;
+typedef __kernel_gid32_t gid_t;
+typedef __kernel_id_t id_t;
+typedef __kernel_ino_t ino_t;
+typedef __kernel_key_t key_t;
+typedef __kernel_mode_t mode_t;
+typedef __kernel_nlink_t nlink_t;
+#ifndef _OFF_T_DEFINED_
+#define _OFF_T_DEFINED_
+typedef __kernel_off_t off_t;
+#endif
+typedef __kernel_loff_t loff_t;
+typedef loff_t off64_t; /* GLibc-specific */
+
+typedef __kernel_pid_t pid_t;
+
+/* while POSIX wants these in <sys/types.h>, we
+ * declare then in <pthread.h> instead */
+#if 0
+typedef .... pthread_attr_t;
+typedef .... pthread_cond_t;
+typedef .... pthread_condattr_t;
+typedef .... pthread_key_t;
+typedef .... pthread_mutex_t;
+typedef .... pthread_once_t;
+typedef .... pthread_rwlock_t;
+typedef .... pthread_rwlock_attr_t;
+typedef .... pthread_t;
+#endif
+
+#ifndef _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED_
+#if !defined(_GCC_SIZE_T)
+#define _GCC_SIZE_T
+typedef __SIZE_TYPE__ size_t;
+#endif
+
+#endif
+
+/* size_t is defined by the GCC-specific <stddef.h> */
+#ifndef _SSIZE_T_DEFINED_
+#define _SSIZE_T_DEFINED_
+typedef long int ssize_t;
+#endif
+
+typedef __kernel_suseconds_t suseconds_t;
+typedef __kernel_time_t time_t;
+typedef __kernel_uid32_t uid_t;
+typedef signed long useconds_t;
+
+typedef __kernel_daddr_t daddr_t;
+typedef __kernel_timer_t timer_t;
+typedef __kernel_mqd_t mqd_t;
+
+typedef __kernel_caddr_t caddr_t;
+typedef unsigned int uint_t;
+typedef unsigned int uint;
+
+/* for some applications */
+#include <sys/sysmacros.h>
+
+#ifdef __BSD_VISIBLE
+typedef unsigned char u_char;
+typedef unsigned short u_short;
+typedef unsigned int u_int;
+typedef unsigned long u_long;
+
+typedef uint32_t u_int32_t;
+typedef uint16_t u_int16_t;
+typedef uint8_t u_int8_t;
+typedef uint64_t u_int64_t;
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/syslimits.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/syslimits.h
new file mode 100644
index 0000000..a362802
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include-fixed/syslimits.h
@@ -0,0 +1,8 @@
+/* syslimits.h stands for the system's own limits.h file.
+ If we can use it ok unmodified, then we install this text.
+ If fixincludes fixes it, then the fixed version is installed
+ instead of this text. */
+
+#define _GCC_NEXT_LIMITS_H /* tell gcc's limits.h to recurse */
+#include_next <limits.h>
+#undef _GCC_NEXT_LIMITS_H
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/ammintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/ammintrin.h
new file mode 100644
index 0000000..3647b31
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/ammintrin.h
@@ -0,0 +1,88 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the AMD Programmers
+ Manual Update, version 2.x */
+
+#ifndef _AMMINTRIN_H_INCLUDED
+#define _AMMINTRIN_H_INCLUDED
+
+#ifndef __SSE4A__
+# error "SSE4A instruction set not enabled"
+#else
+
+/* We need definitions from the SSE3, SSE2 and SSE header files*/
+#include <pmmintrin.h>
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_sd (double * __P, __m128d __Y)
+{
+ __builtin_ia32_movntsd (__P, (__v2df) __Y);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_ss (float * __P, __m128 __Y)
+{
+ __builtin_ia32_movntss (__P, (__v4sf) __Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_si64 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_extrq ((__v2di) __X, (__v16qi) __Y);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extracti_si64 (__m128i __X, unsigned const int __I, unsigned const int __L)
+{
+ return (__m128i) __builtin_ia32_extrqi ((__v2di) __X, __I, __L);
+}
+#else
+#define _mm_extracti_si64(X, I, L) \
+ ((__m128i) __builtin_ia32_extrqi ((__v2di)(__m128i)(X), \
+ (unsigned int)(I), (unsigned int)(L)))
+#endif
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_si64 (__m128i __X,__m128i __Y)
+{
+ return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_inserti_si64(__m128i __X, __m128i __Y, unsigned const int __I, unsigned const int __L)
+{
+ return (__m128i) __builtin_ia32_insertqi ((__v2di)__X, (__v2di)__Y, __I, __L);
+}
+#else
+#define _mm_inserti_si64(X, Y, I, L) \
+ ((__m128i) __builtin_ia32_insertqi ((__v2di)(__m128i)(X), \
+ (__v2di)(__m128i)(Y), \
+ (unsigned int)(I), (unsigned int)(L)))
+#endif
+
+#endif /* __SSE4A__ */
+
+#endif /* _AMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/avxintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/avxintrin.h
new file mode 100644
index 0000000..26925fd
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/avxintrin.h
@@ -0,0 +1,1426 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 11.0. */
+
+#ifndef _IMMINTRIN_H_INCLUDED
+# error "Never use <avxintrin.h> directly; include <immintrin.h> instead."
+#endif
+
+/* Internal data types for implementing the intrinsics. */
+typedef double __v4df __attribute__ ((__vector_size__ (32)));
+typedef float __v8sf __attribute__ ((__vector_size__ (32)));
+typedef long long __v4di __attribute__ ((__vector_size__ (32)));
+typedef int __v8si __attribute__ ((__vector_size__ (32)));
+typedef short __v16hi __attribute__ ((__vector_size__ (32)));
+typedef char __v32qi __attribute__ ((__vector_size__ (32)));
+
+/* The Intel API is flexible enough that we must allow aliasing with other
+ vector types, and their scalar components. */
+typedef float __m256 __attribute__ ((__vector_size__ (32),
+ __may_alias__));
+typedef long long __m256i __attribute__ ((__vector_size__ (32),
+ __may_alias__));
+typedef double __m256d __attribute__ ((__vector_size__ (32),
+ __may_alias__));
+
+/* Compare predicates for scalar and packed compare intrinsics. */
+
+/* Equal (ordered, non-signaling) */
+#define _CMP_EQ_OQ 0x00
+/* Less-than (ordered, signaling) */
+#define _CMP_LT_OS 0x01
+/* Less-than-or-equal (ordered, signaling) */
+#define _CMP_LE_OS 0x02
+/* Unordered (non-signaling) */
+#define _CMP_UNORD_Q 0x03
+/* Not-equal (unordered, non-signaling) */
+#define _CMP_NEQ_UQ 0x04
+/* Not-less-than (unordered, signaling) */
+#define _CMP_NLT_US 0x05
+/* Not-less-than-or-equal (unordered, signaling) */
+#define _CMP_NLE_US 0x06
+/* Ordered (nonsignaling) */
+#define _CMP_ORD_Q 0x07
+/* Equal (unordered, non-signaling) */
+#define _CMP_EQ_UQ 0x08
+/* Not-greater-than-or-equal (unordered, signaling) */
+#define _CMP_NGE_US 0x09
+/* Not-greater-than (unordered, signaling) */
+#define _CMP_NGT_US 0x0a
+/* False (ordered, non-signaling) */
+#define _CMP_FALSE_OQ 0x0b
+/* Not-equal (ordered, non-signaling) */
+#define _CMP_NEQ_OQ 0x0c
+/* Greater-than-or-equal (ordered, signaling) */
+#define _CMP_GE_OS 0x0d
+/* Greater-than (ordered, signaling) */
+#define _CMP_GT_OS 0x0e
+/* True (unordered, non-signaling) */
+#define _CMP_TRUE_UQ 0x0f
+/* Equal (ordered, signaling) */
+#define _CMP_EQ_OS 0x10
+/* Less-than (ordered, non-signaling) */
+#define _CMP_LT_OQ 0x11
+/* Less-than-or-equal (ordered, non-signaling) */
+#define _CMP_LE_OQ 0x12
+/* Unordered (signaling) */
+#define _CMP_UNORD_S 0x13
+/* Not-equal (unordered, signaling) */
+#define _CMP_NEQ_US 0x14
+/* Not-less-than (unordered, non-signaling) */
+#define _CMP_NLT_UQ 0x15
+/* Not-less-than-or-equal (unordered, non-signaling) */
+#define _CMP_NLE_UQ 0x16
+/* Ordered (signaling) */
+#define _CMP_ORD_S 0x17
+/* Equal (unordered, signaling) */
+#define _CMP_EQ_US 0x18
+/* Not-greater-than-or-equal (unordered, non-signaling) */
+#define _CMP_NGE_UQ 0x19
+/* Not-greater-than (unordered, non-signaling) */
+#define _CMP_NGT_UQ 0x1a
+/* False (ordered, signaling) */
+#define _CMP_FALSE_OS 0x1b
+/* Not-equal (ordered, signaling) */
+#define _CMP_NEQ_OS 0x1c
+/* Greater-than-or-equal (ordered, non-signaling) */
+#define _CMP_GE_OQ 0x1d
+/* Greater-than (ordered, non-signaling) */
+#define _CMP_GT_OQ 0x1e
+/* True (unordered, signaling) */
+#define _CMP_TRUE_US 0x1f
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_add_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_addpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_add_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_addps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_addsub_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_addsubpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_addsub_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_addsubps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_and_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_andpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_and_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_andps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_andnot_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_andnpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_andnot_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_andnps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+/* Double/single precision floating point blend instructions - select
+ data from 2 sources using constant/variable mask. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_blend_pd (__m256d __X, __m256d __Y, const int __M)
+{
+ return (__m256d) __builtin_ia32_blendpd256 ((__v4df)__X,
+ (__v4df)__Y,
+ __M);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_blend_ps (__m256 __X, __m256 __Y, const int __M)
+{
+ return (__m256) __builtin_ia32_blendps256 ((__v8sf)__X,
+ (__v8sf)__Y,
+ __M);
+}
+#else
+#define _mm256_blend_pd(X, Y, M) \
+ ((__m256d) __builtin_ia32_blendpd256 ((__v4df)(__m256d)(X), \
+ (__v4df)(__m256d)(Y), (int)(M)))
+
+#define _mm256_blend_ps(X, Y, M) \
+ ((__m256) __builtin_ia32_blendps256 ((__v8sf)(__m256)(X), \
+ (__v8sf)(__m256)(Y), (int)(M)))
+#endif
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_blendv_pd (__m256d __X, __m256d __Y, __m256d __M)
+{
+ return (__m256d) __builtin_ia32_blendvpd256 ((__v4df)__X,
+ (__v4df)__Y,
+ (__v4df)__M);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_blendv_ps (__m256 __X, __m256 __Y, __m256 __M)
+{
+ return (__m256) __builtin_ia32_blendvps256 ((__v8sf)__X,
+ (__v8sf)__Y,
+ (__v8sf)__M);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_div_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_divpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_div_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_divps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+/* Dot product instructions with mask-defined summing and zeroing parts
+ of result. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_dp_ps (__m256 __X, __m256 __Y, const int __M)
+{
+ return (__m256) __builtin_ia32_dpps256 ((__v8sf)__X,
+ (__v8sf)__Y,
+ __M);
+}
+#else
+#define _mm256_dp_ps(X, Y, M) \
+ ((__m256) __builtin_ia32_dpps256 ((__v8sf)(__m256)(X), \
+ (__v8sf)(__m256)(Y), (int)(M)))
+#endif
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_hadd_pd (__m256d __X, __m256d __Y)
+{
+ return (__m256d) __builtin_ia32_haddpd256 ((__v4df)__X, (__v4df)__Y);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_hadd_ps (__m256 __X, __m256 __Y)
+{
+ return (__m256) __builtin_ia32_haddps256 ((__v8sf)__X, (__v8sf)__Y);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_hsub_pd (__m256d __X, __m256d __Y)
+{
+ return (__m256d) __builtin_ia32_hsubpd256 ((__v4df)__X, (__v4df)__Y);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_hsub_ps (__m256 __X, __m256 __Y)
+{
+ return (__m256) __builtin_ia32_hsubps256 ((__v8sf)__X, (__v8sf)__Y);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_max_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_maxpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_max_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_maxps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_min_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_minpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_min_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_minps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mul_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_mulpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mul_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_mulps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_or_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_orpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_or_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_orps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_shuffle_pd (__m256d __A, __m256d __B, const int __mask)
+{
+ return (__m256d) __builtin_ia32_shufpd256 ((__v4df)__A, (__v4df)__B,
+ __mask);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_shuffle_ps (__m256 __A, __m256 __B, const int __mask)
+{
+ return (__m256) __builtin_ia32_shufps256 ((__v8sf)__A, (__v8sf)__B,
+ __mask);
+}
+#else
+#define _mm256_shuffle_pd(A, B, N) \
+ ((__m256d)__builtin_ia32_shufpd256 ((__v4df)(__m256d)(A), \
+ (__v4df)(__m256d)(B), (int)(N)))
+
+#define _mm256_shuffle_ps(A, B, N) \
+ ((__m256) __builtin_ia32_shufps256 ((__v8sf)(__m256)(A), \
+ (__v8sf)(__m256)(B), (int)(N)))
+#endif
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sub_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_subpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sub_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_subps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_xor_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_xorpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_xor_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_xorps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmp_pd (__m128d __X, __m128d __Y, const int __P)
+{
+ return (__m128d) __builtin_ia32_cmppd ((__v2df)__X, (__v2df)__Y, __P);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmp_ps (__m128 __X, __m128 __Y, const int __P)
+{
+ return (__m128) __builtin_ia32_cmpps ((__v4sf)__X, (__v4sf)__Y, __P);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmp_pd (__m256d __X, __m256d __Y, const int __P)
+{
+ return (__m256d) __builtin_ia32_cmppd256 ((__v4df)__X, (__v4df)__Y,
+ __P);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmp_ps (__m256 __X, __m256 __Y, const int __P)
+{
+ return (__m256) __builtin_ia32_cmpps256 ((__v8sf)__X, (__v8sf)__Y,
+ __P);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmp_sd (__m128d __X, __m128d __Y, const int __P)
+{
+ return (__m128d) __builtin_ia32_cmpsd ((__v2df)__X, (__v2df)__Y, __P);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmp_ss (__m128 __X, __m128 __Y, const int __P)
+{
+ return (__m128) __builtin_ia32_cmpss ((__v4sf)__X, (__v4sf)__Y, __P);
+}
+#else
+#define _mm_cmp_pd(X, Y, P) \
+ ((__m128d) __builtin_ia32_cmppd ((__v2df)(__m128d)(X), \
+ (__v2df)(__m128d)(Y), (int)(P)))
+
+#define _mm_cmp_ps(X, Y, P) \
+ ((__m128) __builtin_ia32_cmpps ((__v4sf)(__m128)(X), \
+ (__v4sf)(__m128)(Y), (int)(P)))
+
+#define _mm256_cmp_pd(X, Y, P) \
+ ((__m256d) __builtin_ia32_cmppd256 ((__v4df)(__m256d)(X), \
+ (__v4df)(__m256d)(Y), (int)(P)))
+
+#define _mm256_cmp_ps(X, Y, P) \
+ ((__m256) __builtin_ia32_cmpps256 ((__v8sf)(__m256)(X), \
+ (__v8sf)(__m256)(Y), (int)(P)))
+
+#define _mm_cmp_sd(X, Y, P) \
+ ((__m128d) __builtin_ia32_cmpsd ((__v2df)(__m128d)(X), \
+ (__v2df)(__m128d)(Y), (int)(P)))
+
+#define _mm_cmp_ss(X, Y, P) \
+ ((__m128) __builtin_ia32_cmpss ((__v4sf)(__m128)(X), \
+ (__v4sf)(__m128)(Y), (int)(P)))
+#endif
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtepi32_pd (__m128i __A)
+{
+ return (__m256d)__builtin_ia32_cvtdq2pd256 ((__v4si) __A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtepi32_ps (__m256i __A)
+{
+ return (__m256)__builtin_ia32_cvtdq2ps256 ((__v8si) __A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtpd_ps (__m256d __A)
+{
+ return (__m128)__builtin_ia32_cvtpd2ps256 ((__v4df) __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtps_epi32 (__m256 __A)
+{
+ return (__m256i)__builtin_ia32_cvtps2dq256 ((__v8sf) __A);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtps_pd (__m128 __A)
+{
+ return (__m256d)__builtin_ia32_cvtps2pd256 ((__v4sf) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvttpd_epi32 (__m256d __A)
+{
+ return (__m128i)__builtin_ia32_cvttpd2dq256 ((__v4df) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtpd_epi32 (__m256d __A)
+{
+ return (__m128i)__builtin_ia32_cvtpd2dq256 ((__v4df) __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvttps_epi32 (__m256 __A)
+{
+ return (__m256i)__builtin_ia32_cvttps2dq256 ((__v8sf) __A);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extractf128_pd (__m256d __X, const int __N)
+{
+ return (__m128d) __builtin_ia32_vextractf128_pd256 ((__v4df)__X, __N);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extractf128_ps (__m256 __X, const int __N)
+{
+ return (__m128) __builtin_ia32_vextractf128_ps256 ((__v8sf)__X, __N);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extractf128_si256 (__m256i __X, const int __N)
+{
+ return (__m128i) __builtin_ia32_vextractf128_si256 ((__v8si)__X, __N);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extract_epi32 (__m256i __X, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 2);
+ return _mm_extract_epi32 (__Y, __N % 4);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extract_epi16 (__m256i __X, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 3);
+ return _mm_extract_epi16 (__Y, __N % 8);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extract_epi8 (__m256i __X, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 4);
+ return _mm_extract_epi8 (__Y, __N % 16);
+}
+
+#ifdef __x86_64__
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_extract_epi64 (__m256i __X, const int __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 1);
+ return _mm_extract_epi64 (__Y, __N % 2);
+}
+#endif
+#else
+#define _mm256_extractf128_pd(X, N) \
+ ((__m128d) __builtin_ia32_vextractf128_pd256 ((__v4df)(__m256d)(X), \
+ (int)(N)))
+
+#define _mm256_extractf128_ps(X, N) \
+ ((__m128) __builtin_ia32_vextractf128_ps256 ((__v8sf)(__m256)(X), \
+ (int)(N)))
+
+#define _mm256_extractf128_si256(X, N) \
+ ((__m128i) __builtin_ia32_vextractf128_si256 ((__v8si)(__m256i)(X), \
+ (int)(N)))
+
+#define _mm256_extract_epi32(X, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 2); \
+ _mm_extract_epi32 (__Y, (N) % 4); \
+ }))
+
+#define _mm256_extract_epi16(X, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 3); \
+ _mm_extract_epi16 (__Y, (N) % 8); \
+ }))
+
+#define _mm256_extract_epi8(X, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 4); \
+ _mm_extract_epi8 (__Y, (N) % 16); \
+ }))
+
+#ifdef __x86_64__
+#define _mm256_extract_epi64(X, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 1); \
+ _mm_extract_epi64 (__Y, (N) % 2); \
+ }))
+#endif
+#endif
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_zeroall (void)
+{
+ __builtin_ia32_vzeroall ();
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_zeroupper (void)
+{
+ __builtin_ia32_vzeroupper ();
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_permutevar_pd (__m128d __A, __m128i __C)
+{
+ return (__m128d) __builtin_ia32_vpermilvarpd ((__v2df)__A,
+ (__v2di)__C);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permutevar_pd (__m256d __A, __m256i __C)
+{
+ return (__m256d) __builtin_ia32_vpermilvarpd256 ((__v4df)__A,
+ (__v4di)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_permutevar_ps (__m128 __A, __m128i __C)
+{
+ return (__m128) __builtin_ia32_vpermilvarps ((__v4sf)__A,
+ (__v4si)__C);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permutevar_ps (__m256 __A, __m256i __C)
+{
+ return (__m256) __builtin_ia32_vpermilvarps256 ((__v8sf)__A,
+ (__v8si)__C);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_permute_pd (__m128d __X, const int __C)
+{
+ return (__m128d) __builtin_ia32_vpermilpd ((__v2df)__X, __C);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permute_pd (__m256d __X, const int __C)
+{
+ return (__m256d) __builtin_ia32_vpermilpd256 ((__v4df)__X, __C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_permute_ps (__m128 __X, const int __C)
+{
+ return (__m128) __builtin_ia32_vpermilps ((__v4sf)__X, __C);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permute_ps (__m256 __X, const int __C)
+{
+ return (__m256) __builtin_ia32_vpermilps256 ((__v8sf)__X, __C);
+}
+#else
+#define _mm_permute_pd(X, C) \
+ ((__m128d) __builtin_ia32_vpermilpd ((__v2df)(__m128d)(X), (int)(C)))
+
+#define _mm256_permute_pd(X, C) \
+ ((__m256d) __builtin_ia32_vpermilpd256 ((__v4df)(__m256d)(X), (int)(C)))
+
+#define _mm_permute_ps(X, C) \
+ ((__m128) __builtin_ia32_vpermilps ((__v4sf)(__m128)(X), (int)(C)))
+
+#define _mm256_permute_ps(X, C) \
+ ((__m256) __builtin_ia32_vpermilps256 ((__v8sf)(__m256)(X), (int)(C)))
+#endif
+
+#ifdef __OPTIMIZE__
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permute2f128_pd (__m256d __X, __m256d __Y, const int __C)
+{
+ return (__m256d) __builtin_ia32_vperm2f128_pd256 ((__v4df)__X,
+ (__v4df)__Y,
+ __C);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permute2f128_ps (__m256 __X, __m256 __Y, const int __C)
+{
+ return (__m256) __builtin_ia32_vperm2f128_ps256 ((__v8sf)__X,
+ (__v8sf)__Y,
+ __C);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_permute2f128_si256 (__m256i __X, __m256i __Y, const int __C)
+{
+ return (__m256i) __builtin_ia32_vperm2f128_si256 ((__v8si)__X,
+ (__v8si)__Y,
+ __C);
+}
+#else
+#define _mm256_permute2f128_pd(X, Y, C) \
+ ((__m256d) __builtin_ia32_vperm2f128_pd256 ((__v4df)(__m256d)(X), \
+ (__v4df)(__m256d)(Y), \
+ (int)(C)))
+
+#define _mm256_permute2f128_ps(X, Y, C) \
+ ((__m256) __builtin_ia32_vperm2f128_ps256 ((__v8sf)(__m256)(X), \
+ (__v8sf)(__m256)(Y), \
+ (int)(C)))
+
+#define _mm256_permute2f128_si256(X, Y, C) \
+ ((__m256i) __builtin_ia32_vperm2f128_si256 ((__v8si)(__m256i)(X), \
+ (__v8si)(__m256i)(Y), \
+ (int)(C)))
+#endif
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_broadcast_ss (float const *__X)
+{
+ return (__m128) __builtin_ia32_vbroadcastss (__X);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_broadcast_sd (double const *__X)
+{
+ return (__m256d) __builtin_ia32_vbroadcastsd256 (__X);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_broadcast_ss (float const *__X)
+{
+ return (__m256) __builtin_ia32_vbroadcastss256 (__X);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_broadcast_pd (__m128d const *__X)
+{
+ return (__m256d) __builtin_ia32_vbroadcastf128_pd256 (__X);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_broadcast_ps (__m128 const *__X)
+{
+ return (__m256) __builtin_ia32_vbroadcastf128_ps256 (__X);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insertf128_pd (__m256d __X, __m128d __Y, const int __O)
+{
+ return (__m256d) __builtin_ia32_vinsertf128_pd256 ((__v4df)__X,
+ (__v2df)__Y,
+ __O);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insertf128_ps (__m256 __X, __m128 __Y, const int __O)
+{
+ return (__m256) __builtin_ia32_vinsertf128_ps256 ((__v8sf)__X,
+ (__v4sf)__Y,
+ __O);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insertf128_si256 (__m256i __X, __m128i __Y, const int __O)
+{
+ return (__m256i) __builtin_ia32_vinsertf128_si256 ((__v8si)__X,
+ (__v4si)__Y,
+ __O);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insert_epi32 (__m256i __X, int __D, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 2);
+ __Y = _mm_insert_epi16 (__Y, __D, __N % 4);
+ return _mm256_insertf128_si256 (__X, __Y, __N >> 2);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insert_epi16 (__m256i __X, int __D, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 3);
+ __Y = _mm_insert_epi16 (__Y, __D, __N % 8);
+ return _mm256_insertf128_si256 (__X, __Y, __N >> 3);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insert_epi8 (__m256i __X, int __D, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 4);
+ __Y = _mm_insert_epi8 (__Y, __D, __N % 16);
+ return _mm256_insertf128_si256 (__X, __Y, __N >> 4);
+}
+
+#ifdef __x86_64__
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_insert_epi64 (__m256i __X, int __D, int const __N)
+{
+ __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 1);
+ __Y = _mm_insert_epi16 (__Y, __D, __N % 2);
+ return _mm256_insertf128_si256 (__X, __Y, __N >> 1);
+}
+#endif
+#else
+#define _mm256_insertf128_pd(X, Y, O) \
+ ((__m256d) __builtin_ia32_vinsertf128_pd256 ((__v4df)(__m256d)(X), \
+ (__v2df)(__m128d)(Y), \
+ (int)(O)))
+
+#define _mm256_insertf128_ps(X, Y, O) \
+ ((__m256) __builtin_ia32_vinsertf128_ps256 ((__v8sf)(__m256)(X), \
+ (__v4sf)(__m128)(Y), \
+ (int)(O)))
+
+#define _mm256_insertf128_si256(X, Y, O) \
+ ((__m256i) __builtin_ia32_vinsertf128_si256 ((__v8si)(__m256i)(X), \
+ (__v4si)(__m128i)(Y), \
+ (int)(O)))
+
+#define _mm256_insert_epi32(X, D, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 2); \
+ __Y = _mm_insert_epi32 (__Y, (D), (N) % 4); \
+ _mm256_insertf128_si256 ((X), __Y, (N) >> 2); \
+ }))
+
+#define _mm256_insert_epi16(X, D, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 3); \
+ __Y = _mm_insert_epi16 (__Y, (D), (N) % 8); \
+ _mm256_insertf128_si256 ((X), __Y, (N) >> 3); \
+ }))
+
+#define _mm256_insert_epi8(X, D, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 4); \
+ __Y = _mm_insert_epi8 (__Y, (D), (N) % 16); \
+ _mm256_insertf128_si256 ((X), __Y, (N) >> 4); \
+ }))
+
+#ifdef __x86_64__
+#define _mm256_insert_epi64(X, D, N) \
+ (__extension__ \
+ ({ \
+ __m128i __Y = _mm256_extractf128_si256 ((X), (N) >> 1); \
+ __Y = _mm_insert_epi64 (__Y, (D), (N) % 2); \
+ _mm256_insertf128_si256 ((X), __Y, (N) >> 1); \
+ }))
+#endif
+#endif
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_load_pd (double const *__P)
+{
+ return *(__m256d *)__P;
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_store_pd (double *__P, __m256d __A)
+{
+ *(__m256d *)__P = __A;
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_load_ps (float const *__P)
+{
+ return *(__m256 *)__P;
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_store_ps (float *__P, __m256 __A)
+{
+ *(__m256 *)__P = __A;
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_loadu_pd (double const *__P)
+{
+ return (__m256d) __builtin_ia32_loadupd256 (__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_storeu_pd (double *__P, __m256d __A)
+{
+ __builtin_ia32_storeupd256 (__P, (__v4df)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_loadu_ps (float const *__P)
+{
+ return (__m256) __builtin_ia32_loadups256 (__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_storeu_ps (float *__P, __m256 __A)
+{
+ __builtin_ia32_storeups256 (__P, (__v8sf)__A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_load_si256 (__m256i const *__P)
+{
+ return *__P;
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_store_si256 (__m256i *__P, __m256i __A)
+{
+ *__P = __A;
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_loadu_si256 (__m256i const *__P)
+{
+ return (__m256i) __builtin_ia32_loaddqu256 ((char const *)__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_storeu_si256 (__m256i *__P, __m256i __A)
+{
+ __builtin_ia32_storedqu256 ((char *)__P, (__v32qi)__A);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskload_pd (double const *__P, __m128d __M)
+{
+ return (__m128d) __builtin_ia32_maskloadpd ((const __v2df *)__P,
+ (__v2df)__M);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskstore_pd (double *__P, __m128d __M, __m128d __A)
+{
+ __builtin_ia32_maskstorepd ((__v2df *)__P, (__v2df)__M, (__v2df)__A);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskload_pd (double const *__P, __m256d __M)
+{
+ return (__m256d) __builtin_ia32_maskloadpd256 ((const __v4df *)__P,
+ (__v4df)__M);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskstore_pd (double *__P, __m256d __M, __m256d __A)
+{
+ __builtin_ia32_maskstorepd256 ((__v4df *)__P, (__v4df)__M, (__v4df)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskload_ps (float const *__P, __m128 __M)
+{
+ return (__m128) __builtin_ia32_maskloadps ((const __v4sf *)__P,
+ (__v4sf)__M);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskstore_ps (float *__P, __m128 __M, __m128 __A)
+{
+ __builtin_ia32_maskstoreps ((__v4sf *)__P, (__v4sf)__M, (__v4sf)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskload_ps (float const *__P, __m256 __M)
+{
+ return (__m256) __builtin_ia32_maskloadps256 ((const __v8sf *)__P,
+ (__v8sf)__M);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskstore_ps (float *__P, __m256 __M, __m256 __A)
+{
+ __builtin_ia32_maskstoreps256 ((__v8sf *)__P, (__v8sf)__M, (__v8sf)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_movehdup_ps (__m256 __X)
+{
+ return (__m256) __builtin_ia32_movshdup256 ((__v8sf)__X);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_moveldup_ps (__m256 __X)
+{
+ return (__m256) __builtin_ia32_movsldup256 ((__v8sf)__X);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_movedup_pd (__m256d __X)
+{
+ return (__m256d) __builtin_ia32_movddup256 ((__v4df)__X);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_lddqu_si256 (__m256i const *__P)
+{
+ return (__m256i) __builtin_ia32_lddqu256 ((char const *)__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_stream_si256 (__m256i *__A, __m256i __B)
+{
+ __builtin_ia32_movntdq256 ((__v4di *)__A, (__v4di)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_stream_pd (double *__A, __m256d __B)
+{
+ __builtin_ia32_movntpd256 (__A, (__v4df)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_stream_ps (float *__P, __m256 __A)
+{
+ __builtin_ia32_movntps256 (__P, (__v8sf)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_rcp_ps (__m256 __A)
+{
+ return (__m256) __builtin_ia32_rcpps256 ((__v8sf)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_rsqrt_ps (__m256 __A)
+{
+ return (__m256) __builtin_ia32_rsqrtps256 ((__v8sf)__A);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sqrt_pd (__m256d __A)
+{
+ return (__m256d) __builtin_ia32_sqrtpd256 ((__v4df)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sqrt_ps (__m256 __A)
+{
+ return (__m256) __builtin_ia32_sqrtps256 ((__v8sf)__A);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_round_pd (__m256d __V, const int __M)
+{
+ return (__m256d) __builtin_ia32_roundpd256 ((__v4df)__V, __M);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_round_ps (__m256 __V, const int __M)
+{
+ return (__m256) __builtin_ia32_roundps256 ((__v8sf)__V, __M);
+}
+#else
+#define _mm256_round_pd(V, M) \
+ ((__m256d) __builtin_ia32_roundpd256 ((__v4df)(__m256d)(V), (int)(M)))
+
+#define _mm256_round_ps(V, M) \
+ ((__m256) __builtin_ia32_roundps256 ((__v8sf)(__m256)(V), (int)(M)))
+#endif
+
+#define _mm256_ceil_pd(V) _mm256_round_pd ((V), _MM_FROUND_CEIL)
+#define _mm256_floor_pd(V) _mm256_round_pd ((V), _MM_FROUND_FLOOR)
+#define _mm256_ceil_ps(V) _mm256_round_ps ((V), _MM_FROUND_CEIL)
+#define _mm256_floor_ps(V) _mm256_round_ps ((V), _MM_FROUND_FLOOR)
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_unpackhi_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_unpckhpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_unpacklo_pd (__m256d __A, __m256d __B)
+{
+ return (__m256d) __builtin_ia32_unpcklpd256 ((__v4df)__A, (__v4df)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_unpackhi_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_unpckhps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_unpacklo_ps (__m256 __A, __m256 __B)
+{
+ return (__m256) __builtin_ia32_unpcklps256 ((__v8sf)__A, (__v8sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testz_pd (__m128d __M, __m128d __V)
+{
+ return __builtin_ia32_vtestzpd ((__v2df)__M, (__v2df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testc_pd (__m128d __M, __m128d __V)
+{
+ return __builtin_ia32_vtestcpd ((__v2df)__M, (__v2df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testnzc_pd (__m128d __M, __m128d __V)
+{
+ return __builtin_ia32_vtestnzcpd ((__v2df)__M, (__v2df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testz_ps (__m128 __M, __m128 __V)
+{
+ return __builtin_ia32_vtestzps ((__v4sf)__M, (__v4sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testc_ps (__m128 __M, __m128 __V)
+{
+ return __builtin_ia32_vtestcps ((__v4sf)__M, (__v4sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testnzc_ps (__m128 __M, __m128 __V)
+{
+ return __builtin_ia32_vtestnzcps ((__v4sf)__M, (__v4sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testz_pd (__m256d __M, __m256d __V)
+{
+ return __builtin_ia32_vtestzpd256 ((__v4df)__M, (__v4df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testc_pd (__m256d __M, __m256d __V)
+{
+ return __builtin_ia32_vtestcpd256 ((__v4df)__M, (__v4df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testnzc_pd (__m256d __M, __m256d __V)
+{
+ return __builtin_ia32_vtestnzcpd256 ((__v4df)__M, (__v4df)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testz_ps (__m256 __M, __m256 __V)
+{
+ return __builtin_ia32_vtestzps256 ((__v8sf)__M, (__v8sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testc_ps (__m256 __M, __m256 __V)
+{
+ return __builtin_ia32_vtestcps256 ((__v8sf)__M, (__v8sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testnzc_ps (__m256 __M, __m256 __V)
+{
+ return __builtin_ia32_vtestnzcps256 ((__v8sf)__M, (__v8sf)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testz_si256 (__m256i __M, __m256i __V)
+{
+ return __builtin_ia32_ptestz256 ((__v4di)__M, (__v4di)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testc_si256 (__m256i __M, __m256i __V)
+{
+ return __builtin_ia32_ptestc256 ((__v4di)__M, (__v4di)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_testnzc_si256 (__m256i __M, __m256i __V)
+{
+ return __builtin_ia32_ptestnzc256 ((__v4di)__M, (__v4di)__V);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_movemask_pd (__m256d __A)
+{
+ return __builtin_ia32_movmskpd256 ((__v4df)__A);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_movemask_ps (__m256 __A)
+{
+ return __builtin_ia32_movmskps256 ((__v8sf)__A);
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setzero_pd (void)
+{
+ return __extension__ (__m256d){ 0.0, 0.0, 0.0, 0.0 };
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setzero_ps (void)
+{
+ return __extension__ (__m256){ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0 };
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setzero_si256 (void)
+{
+ return __extension__ (__m256i)(__v4di){ 0, 0, 0, 0 };
+}
+
+/* Create the vector [A B C D]. */
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_pd (double __A, double __B, double __C, double __D)
+{
+ return __extension__ (__m256d){ __D, __C, __B, __A };
+}
+
+/* Create the vector [A B C D E F G H]. */
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_ps (float __A, float __B, float __C, float __D,
+ float __E, float __F, float __G, float __H)
+{
+ return __extension__ (__m256){ __H, __G, __F, __E,
+ __D, __C, __B, __A };
+}
+
+/* Create the vector [A B C D E F G H]. */
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_epi32 (int __A, int __B, int __C, int __D,
+ int __E, int __F, int __G, int __H)
+{
+ return __extension__ (__m256i)(__v8si){ __H, __G, __F, __E,
+ __D, __C, __B, __A };
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_epi16 (short __q15, short __q14, short __q13, short __q12,
+ short __q11, short __q10, short __q09, short __q08,
+ short __q07, short __q06, short __q05, short __q04,
+ short __q03, short __q02, short __q01, short __q00)
+{
+ return __extension__ (__m256i)(__v16hi){
+ __q00, __q01, __q02, __q03, __q04, __q05, __q06, __q07,
+ __q08, __q09, __q10, __q11, __q12, __q13, __q14, __q15
+ };
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_epi8 (char __q31, char __q30, char __q29, char __q28,
+ char __q27, char __q26, char __q25, char __q24,
+ char __q23, char __q22, char __q21, char __q20,
+ char __q19, char __q18, char __q17, char __q16,
+ char __q15, char __q14, char __q13, char __q12,
+ char __q11, char __q10, char __q09, char __q08,
+ char __q07, char __q06, char __q05, char __q04,
+ char __q03, char __q02, char __q01, char __q00)
+{
+ return __extension__ (__m256i)(__v32qi){
+ __q00, __q01, __q02, __q03, __q04, __q05, __q06, __q07,
+ __q08, __q09, __q10, __q11, __q12, __q13, __q14, __q15,
+ __q16, __q17, __q18, __q19, __q20, __q21, __q22, __q23,
+ __q24, __q25, __q26, __q27, __q28, __q29, __q30, __q31
+ };
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set_epi64x (long long __A, long long __B, long long __C,
+ long long __D)
+{
+ return __extension__ (__m256i)(__v4di){ __D, __C, __B, __A };
+}
+
+/* Create a vector with all elements equal to A. */
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_pd (double __A)
+{
+ return __extension__ (__m256d){ __A, __A, __A, __A };
+}
+
+/* Create a vector with all elements equal to A. */
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_ps (float __A)
+{
+ return __extension__ (__m256){ __A, __A, __A, __A,
+ __A, __A, __A, __A };
+}
+
+/* Create a vector with all elements equal to A. */
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_epi32 (int __A)
+{
+ return __extension__ (__m256i)(__v8si){ __A, __A, __A, __A,
+ __A, __A, __A, __A };
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_epi16 (short __A)
+{
+ return _mm256_set_epi16 (__A, __A, __A, __A, __A, __A, __A, __A,
+ __A, __A, __A, __A, __A, __A, __A, __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_epi8 (char __A)
+{
+ return _mm256_set_epi8 (__A, __A, __A, __A, __A, __A, __A, __A,
+ __A, __A, __A, __A, __A, __A, __A, __A,
+ __A, __A, __A, __A, __A, __A, __A, __A,
+ __A, __A, __A, __A, __A, __A, __A, __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_set1_epi64x (long long __A)
+{
+ return __extension__ (__m256i)(__v4di){ __A, __A, __A, __A };
+}
+
+/* Create vectors of elements in the reversed order from the
+ _mm256_set_XXX functions. */
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_pd (double __A, double __B, double __C, double __D)
+{
+ return _mm256_set_pd (__D, __C, __B, __A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_ps (float __A, float __B, float __C, float __D,
+ float __E, float __F, float __G, float __H)
+{
+ return _mm256_set_ps (__H, __G, __F, __E, __D, __C, __B, __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_epi32 (int __A, int __B, int __C, int __D,
+ int __E, int __F, int __G, int __H)
+{
+ return _mm256_set_epi32 (__H, __G, __F, __E, __D, __C, __B, __A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_epi16 (short __q15, short __q14, short __q13, short __q12,
+ short __q11, short __q10, short __q09, short __q08,
+ short __q07, short __q06, short __q05, short __q04,
+ short __q03, short __q02, short __q01, short __q00)
+{
+ return _mm256_set_epi16 (__q00, __q01, __q02, __q03,
+ __q04, __q05, __q06, __q07,
+ __q08, __q09, __q10, __q11,
+ __q12, __q13, __q14, __q15);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_epi8 (char __q31, char __q30, char __q29, char __q28,
+ char __q27, char __q26, char __q25, char __q24,
+ char __q23, char __q22, char __q21, char __q20,
+ char __q19, char __q18, char __q17, char __q16,
+ char __q15, char __q14, char __q13, char __q12,
+ char __q11, char __q10, char __q09, char __q08,
+ char __q07, char __q06, char __q05, char __q04,
+ char __q03, char __q02, char __q01, char __q00)
+{
+ return _mm256_set_epi8 (__q00, __q01, __q02, __q03,
+ __q04, __q05, __q06, __q07,
+ __q08, __q09, __q10, __q11,
+ __q12, __q13, __q14, __q15,
+ __q16, __q17, __q18, __q19,
+ __q20, __q21, __q22, __q23,
+ __q24, __q25, __q26, __q27,
+ __q28, __q29, __q30, __q31);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_setr_epi64x (long long __A, long long __B, long long __C,
+ long long __D)
+{
+ return _mm256_set_epi64x (__D, __C, __B, __A);
+}
+
+/* Casts between various SP, DP, INT vector types. Note that these do no
+ conversion of values, they just change the type. */
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castpd_ps (__m256d __A)
+{
+ return (__m256) __A;
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castpd_si256 (__m256d __A)
+{
+ return (__m256i) __A;
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castps_pd (__m256 __A)
+{
+ return (__m256d) __A;
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castps_si256(__m256 __A)
+{
+ return (__m256i) __A;
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castsi256_ps (__m256i __A)
+{
+ return (__m256) __A;
+}
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castsi256_pd (__m256i __A)
+{
+ return (__m256d) __A;
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castpd256_pd128 (__m256d __A)
+{
+ return (__m128d) __builtin_ia32_pd_pd256 ((__v4df)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castps256_ps128 (__m256 __A)
+{
+ return (__m128) __builtin_ia32_ps_ps256 ((__v8sf)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castsi256_si128 (__m256i __A)
+{
+ return (__m128i) __builtin_ia32_si_si256 ((__v8si)__A);
+}
+
+/* When cast is done from a 128 to 256-bit type, the low 128 bits of
+ the 256-bit result contain source parameter value and the upper 128
+ bits of the result are undefined. Those intrinsics shouldn't
+ generate any extra moves. */
+
+extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castpd128_pd256 (__m128d __A)
+{
+ return (__m256d) __builtin_ia32_pd256_pd ((__v2df)__A);
+}
+
+extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castps128_ps256 (__m128 __A)
+{
+ return (__m256) __builtin_ia32_ps256_ps ((__v4sf)__A);
+}
+
+extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_castsi128_si256 (__m128i __A)
+{
+ return (__m256i) __builtin_ia32_si256_si ((__v4si)__A);
+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/bmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/bmmintrin.h
new file mode 100644
index 0000000..e92768c
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/bmmintrin.h
@@ -0,0 +1,1261 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _BMMINTRIN_H_INCLUDED
+#define _BMMINTRIN_H_INCLUDED
+
+#ifndef __SSE5__
+# error "SSE5 instruction set not enabled"
+#else
+
+/* We need definitions from the SSE4A, SSE3, SSE2 and SSE header files. */
+#include <ammintrin.h>
+#include <mmintrin-common.h>
+
+/* Floating point multiply/add type instructions */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fmaddps ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_pd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fmaddpd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_ss(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fmaddss ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_sd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fmaddsd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_msub_ps(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fmsubps ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_msub_pd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fmsubpd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_msub_ss(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fmsubss ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_msub_sd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fmsubsd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fnmaddps ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fnmaddpd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fnmaddss ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fnmaddsd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fnmsubps ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fnmsubpd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C)
+{
+ return (__m128) __builtin_ia32_fnmsubss ((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C)
+{
+ return (__m128d) __builtin_ia32_fnmsubsd ((__v2df)__A, (__v2df)__B, (__v2df)__C);
+}
+
+/* Integer multiply/add intructions. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacssww ((__v8hi)__A,(__v8hi)__B, (__v8hi)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacsww ((__v8hi)__A, (__v8hi)__B, (__v8hi)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccsd_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacsswd ((__v8hi)__A, (__v8hi)__B, (__v4si)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccd_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacswd ((__v8hi)__A, (__v8hi)__B, (__v4si)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccs_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacssdd ((__v4si)__A, (__v4si)__B, (__v4si)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macc_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacsdd ((__v4si)__A, (__v4si)__B, (__v4si)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccslo_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacssdql ((__v4si)__A, (__v4si)__B, (__v2di)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macclo_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacsdql ((__v4si)__A, (__v4si)__B, (__v2di)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maccshi_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacssdqh ((__v4si)__A, (__v4si)__B, (__v2di)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_macchi_epi32(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmacsdqh ((__v4si)__A, (__v4si)__B, (__v2di)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maddsd_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmadcsswd ((__v8hi)__A,(__v8hi)__B,(__v4si)__C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maddd_epi16(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pmadcswd ((__v8hi)__A,(__v8hi)__B,(__v4si)__C);
+}
+
+/* Packed Integer Horizontal Add and Subtract */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddw_epi8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddbw ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddd_epi8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddbd ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epi8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddbq ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddd_epi16(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddwd ((__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epi16(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddwq ((__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epi32(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phadddq ((__v4si)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddw_epu8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddubw ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddd_epu8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddubd ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epu8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddubq ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddd_epu16(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phadduwd ((__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epu16(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phadduwq ((__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_haddq_epu32(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phaddudq ((__v4si)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsubw_epi8(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phsubbw ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsubd_epi16(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phsubwd ((__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsubq_epi32(__m128i __A)
+{
+ return (__m128i) __builtin_ia32_phsubdq ((__v4si)__A);
+}
+
+/* Vector conditional move and permute */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pcmov (__A, __B, __C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_perm_epi8(__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_pperm ((__v16qi)__A, (__v16qi)__B, (__v16qi)__C);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_perm_ps(__m128 __A, __m128 __B, __m128i __C)
+{
+ return (__m128) __builtin_ia32_permps ((__m128)__A, (__m128)__B, (__v16qi)__C);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_perm_pd(__m128d __A, __m128d __B, __m128i __C)
+{
+ return (__m128d) __builtin_ia32_permpd ((__m128d)__A, (__m128d)__B, (__v16qi)__C);
+}
+
+/* Packed Integer Rotates and Shifts */
+
+/* Rotates - Non-Immediate form */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rot_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_protb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rot_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_protw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rot_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_protd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rot_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_protq ((__v2di)__A, (__v2di)__B);
+}
+
+
+/* Rotates - Immediate form */
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_roti_epi8(__m128i __A, const int __B)
+{
+ return (__m128i) __builtin_ia32_protbi ((__v16qi)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_roti_epi16(__m128i __A, const int __B)
+{
+ return (__m128i) __builtin_ia32_protwi ((__v8hi)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_roti_epi32(__m128i __A, const int __B)
+{
+ return (__m128i) __builtin_ia32_protdi ((__v4si)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_roti_epi64(__m128i __A, const int __B)
+{
+ return (__m128i) __builtin_ia32_protqi ((__v2di)__A, __B);
+}
+#else
+#define _mm_roti_epi8(A, N) \
+ ((__m128i) __builtin_ia32_protbi ((__v16qi)(__m128i)(A), (int)(N)))
+#define _mm_roti_epi16(A, N) \
+ ((__m128i) __builtin_ia32_protwi ((__v8hi)(__m128i)(A), (int)(N)))
+#define _mm_roti_epi32(A, N) \
+ ((__m128i) __builtin_ia32_protdi ((__v4si)(__m128i)(A), (int)(N)))
+#define _mm_roti_epi64(A, N) \
+ ((__m128i) __builtin_ia32_protqi ((__v2di)(__m128i)(A), (int)(N)))
+#endif
+
+/* pshl */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shl_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshlb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shl_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshlw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shl_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshld ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shl_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshlq ((__v2di)__A, (__v2di)__B);
+}
+
+/* psha */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sha_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshab ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sha_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshaw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sha_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshad ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sha_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pshaq ((__v2di)__A, (__v2di)__B);
+}
+
+/* Compare and Predicate Generation */
+
+/* com (floating point, packed single) */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comeqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comltps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comleps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comunord_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunordps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comuneqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnlt_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunltps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnle_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunleps ((__v4sf)__A, (__v4sf)__B);
+}
+
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comord_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comordps ((__v4sf)__A, (__v4sf)__B);
+}
+
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comueq_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comueqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnge_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comungeps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comngt_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comungtps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comfalseps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comoneq_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comneqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comgeps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comgtps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_ps(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comtrueps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* com (floating point, packed double) */
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comeqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comltpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comlepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comunord_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunordpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comuneqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnlt_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunltpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnle_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunlepd ((__v2df)__A, (__v2df)__B);
+}
+
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comord_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comordpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comueq_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comueqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnge_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comungepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comngt_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comungtpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comfalsepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comoneq_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comneqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comgepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comgtpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_pd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comtruepd ((__v2df)__A, (__v2df)__B);
+}
+
+/* com (floating point, scalar single) */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comeqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comltss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comless ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comunord_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunordss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comuneqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnlt_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunltss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnle_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comunless ((__v4sf)__A, (__v4sf)__B);
+}
+
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comord_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comordss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comueq_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comueqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnge_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comungess ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comngt_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comungtss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comfalsess ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comoneq_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comneqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comgess ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comgtss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_ss(__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_comtruess ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* com (floating point, scalar double) */
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comeqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comltsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comlesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comunord_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunordsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comuneqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnlt_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunltsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnle_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comunlesd ((__v2df)__A, (__v2df)__B);
+}
+
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comord_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comordsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comueq_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comueqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comnge_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comungesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comngt_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comungtsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comfalsesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comoneq_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comneqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comgesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comgtsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_sd(__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_comtruesd ((__v2df)__A, (__v2df)__B);
+}
+
+
+/*pcom (integer, unsinged bytes) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltub ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleub ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtub ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeub ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomequb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomnequb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseub ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epu8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueub ((__v16qi)__A, (__v16qi)__B);
+}
+
+/*pcom (integer, unsinged words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomequw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomnequw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epu16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueuw ((__v8hi)__A, (__v8hi)__B);
+}
+
+/*pcom (integer, unsinged double words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltud ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleud ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtud ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeud ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomequd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomnequd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseud ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epu32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueud ((__v4si)__A, (__v4si)__B);
+}
+
+/*pcom (integer, unsinged quad words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltuq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleuq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtuq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeuq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomequq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomnequq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseuq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epu64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueuq ((__v2di)__A, (__v2di)__B);
+}
+
+/*pcom (integer, signed bytes) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomeqb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomneqb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseb ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epi8(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueb ((__v16qi)__A, (__v16qi)__B);
+}
+
+/*pcom (integer, signed words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomlew ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgew ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomeqw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomneqw ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalsew ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epi16(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtruew ((__v8hi)__A, (__v8hi)__B);
+}
+
+/*pcom (integer, signed double words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomled ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomged ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomeqd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomneqd ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalsed ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epi32(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrued ((__v4si)__A, (__v4si)__B);
+}
+
+/*pcom (integer, signed quad words) */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comlt_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomltq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comle_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomleq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comgt_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgtq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comge_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomgeq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comeq_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomeqq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comneq_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomneqq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comfalse_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomfalseq ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comtrue_epi64(__m128i __A, __m128i __B)
+{
+ return (__m128i) __builtin_ia32_pcomtrueq ((__v2di)__A, (__v2di)__B);
+}
+
+/* FRCZ */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_frcz_ps (__m128 __A)
+{
+ return (__m128) __builtin_ia32_frczps ((__v4sf)__A);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_frcz_pd (__m128d __A)
+{
+ return (__m128d) __builtin_ia32_frczpd ((__v2df)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_frcz_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_frczss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_frcz_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_frczsd ((__v2df)__A, (__v2df)__B);
+}
+
+#endif /* __SSE5__ */
+
+#endif /* _BMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cpuid.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cpuid.h
new file mode 100644
index 0000000..003c202
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cpuid.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+/* %ecx */
+#define bit_SSE3 (1 << 0)
+#define bit_PCLMUL (1 << 1)
+#define bit_SSSE3 (1 << 9)
+#define bit_FMA (1 << 12)
+#define bit_CMPXCHG16B (1 << 13)
+#define bit_SSE4_1 (1 << 19)
+#define bit_SSE4_2 (1 << 20)
+#define bit_MOVBE (1 << 22)
+#define bit_POPCNT (1 << 23)
+#define bit_AES (1 << 25)
+#define bit_XSAVE (1 << 26)
+#define bit_OSXSAVE (1 << 27)
+#define bit_AVX (1 << 28)
+
+/* %edx */
+#define bit_CMPXCHG8B (1 << 8)
+#define bit_CMOV (1 << 15)
+#define bit_MMX (1 << 23)
+#define bit_FXSAVE (1 << 24)
+#define bit_SSE (1 << 25)
+#define bit_SSE2 (1 << 26)
+
+/* Extended Features */
+/* %ecx */
+#define bit_LAHF_LM (1 << 0)
+#define bit_LWP (1 << 15)
+#define bit_SSE4a (1 << 6)
+#define bit_SSE5 (1 << 11)
+
+/* %edx */
+#define bit_LM (1 << 29)
+#define bit_3DNOWP (1 << 30)
+#define bit_3DNOW (1 << 31)
+
+
+#if defined(__i386__) && defined(__PIC__)
+/* %ebx may be the PIC register. */
+#if __GNUC__ >= 3
+#define __cpuid(level, a, b, c, d) \
+ __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \
+ "cpuid\n\t" \
+ "xchg{l}\t{%%}ebx, %1\n\t" \
+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+ : "0" (level))
+
+#define __cpuid_count(level, count, a, b, c, d) \
+ __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \
+ "cpuid\n\t" \
+ "xchg{l}\t{%%}ebx, %1\n\t" \
+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+ : "0" (level), "2" (count))
+#else
+/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
+ nor alternatives in i386 code. */
+#define __cpuid(level, a, b, c, d) \
+ __asm__ ("xchgl\t%%ebx, %1\n\t" \
+ "cpuid\n\t" \
+ "xchgl\t%%ebx, %1\n\t" \
+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+ : "0" (level))
+
+#define __cpuid_count(level, count, a, b, c, d) \
+ __asm__ ("xchgl\t%%ebx, %1\n\t" \
+ "cpuid\n\t" \
+ "xchgl\t%%ebx, %1\n\t" \
+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+ : "0" (level), "2" (count))
+#endif
+#else
+#define __cpuid(level, a, b, c, d) \
+ __asm__ ("cpuid\n\t" \
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
+ : "0" (level))
+
+#define __cpuid_count(level, count, a, b, c, d) \
+ __asm__ ("cpuid\n\t" \
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
+ : "0" (level), "2" (count))
+#endif
+
+/* Return highest supported input value for cpuid instruction. ext can
+ be either 0x0 or 0x8000000 to return highest supported value for
+ basic or extended cpuid information. Function returns 0 if cpuid
+ is not supported or whatever cpuid returns in eax register. If sig
+ pointer is non-null, then first four bytes of the signature
+ (as found in ebx register) are returned in location pointed by sig. */
+
+static __inline unsigned int
+__get_cpuid_max (unsigned int __ext, unsigned int *__sig)
+{
+ unsigned int __eax, __ebx, __ecx, __edx;
+
+#ifndef __x86_64__
+#if __GNUC__ >= 3
+ /* See if we can use cpuid. On AMD64 we always can. */
+ __asm__ ("pushf{l|d}\n\t"
+ "pushf{l|d}\n\t"
+ "pop{l}\t%0\n\t"
+ "mov{l}\t{%0, %1|%1, %0}\n\t"
+ "xor{l}\t{%2, %0|%0, %2}\n\t"
+ "push{l}\t%0\n\t"
+ "popf{l|d}\n\t"
+ "pushf{l|d}\n\t"
+ "pop{l}\t%0\n\t"
+ "popf{l|d}\n\t"
+ : "=&r" (__eax), "=&r" (__ebx)
+ : "i" (0x00200000));
+#else
+/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
+ nor alternatives in i386 code. */
+ __asm__ ("pushfl\n\t"
+ "pushfl\n\t"
+ "popl\t%0\n\t"
+ "movl\t%0, %1\n\t"
+ "xorl\t%2, %0\n\t"
+ "pushl\t%0\n\t"
+ "popfl\n\t"
+ "pushfl\n\t"
+ "popl\t%0\n\t"
+ "popfl\n\t"
+ : "=&r" (__eax), "=&r" (__ebx)
+ : "i" (0x00200000));
+#endif
+
+ if (!((__eax ^ __ebx) & 0x00200000))
+ return 0;
+#endif
+
+ /* Host supports cpuid. Return highest supported cpuid input value. */
+ __cpuid (__ext, __eax, __ebx, __ecx, __edx);
+
+ if (__sig)
+ *__sig = __ebx;
+
+ return __eax;
+}
+
+/* Return cpuid data for requested cpuid level, as found in returned
+ eax, ebx, ecx and edx registers. The function checks if cpuid is
+ supported and returns 1 for valid cpuid information or 0 for
+ unsupported cpuid level. All pointers are required to be non-null. */
+
+static __inline int
+__get_cpuid (unsigned int __level,
+ unsigned int *__eax, unsigned int *__ebx,
+ unsigned int *__ecx, unsigned int *__edx)
+{
+ unsigned int __ext = __level & 0x80000000;
+
+ if (__get_cpuid_max (__ext, 0) < __level)
+ return 0;
+
+ __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx);
+ return 1;
+}
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cross-stdarg.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cross-stdarg.h
new file mode 100644
index 0000000..7139ffa
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/cross-stdarg.h
@@ -0,0 +1,73 @@
+/* Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef __CROSS_STDARG_H_INCLUDED
+#define __CROSS_STDARG_H_INCLUDED
+
+/* Make sure that for non x64 targets cross builtins are defined. */
+#ifndef __x86_64__
+/* Call abi ms_abi. */
+#define __builtin_ms_va_list __builtin_va_list
+#define __builtin_ms_va_copy __builtin_va_copy
+#define __builtin_ms_va_start __builtin_va_start
+#define __builtin_ms_va_end __builtin_va_end
+
+/* Call abi sysv_abi. */
+#define __builtin_sysv_va_list __builtin_va_list
+#define __builtin_sysv_va_copy __builtin_va_copy
+#define __builtin_sysv_va_start __builtin_va_start
+#define __builtin_sysv_va_end __builtin_va_end
+#endif
+
+#define __ms_va_copy(__d,__s) __builtin_ms_va_copy(__d,__s)
+#define __ms_va_start(__v,__l) __builtin_ms_va_start(__v,__l)
+#define __ms_va_arg(__v,__l) __builtin_va_arg(__v,__l)
+#define __ms_va_end(__v) __builtin_ms_va_end(__v)
+
+#define __sysv_va_copy(__d,__s) __builtin_sysv_va_copy(__d,__s)
+#define __sysv_va_start(__v,__l) __builtin_sysv_va_start(__v,__l)
+#define __sysv_va_arg(__v,__l) __builtin_va_arg(__v,__l)
+#define __sysv_va_end(__v) __builtin_sysv_va_end(__v)
+
+#ifndef __GNUC_SYSV_VA_LIST
+#define __GNUC_SYSV_VA_LIST
+ typedef __builtin_sysv_va_list __gnuc_sysv_va_list;
+#endif
+
+#ifndef _SYSV_VA_LIST_DEFINED
+#define _SYSV_VA_LIST_DEFINED
+ typedef __gnuc_sysv_va_list sysv_va_list;
+#endif
+
+#ifndef __GNUC_MS_VA_LIST
+#define __GNUC_MS_VA_LIST
+ typedef __builtin_ms_va_list __gnuc_ms_va_list;
+#endif
+
+#ifndef _MS_VA_LIST_DEFINED
+#define _MS_VA_LIST_DEFINED
+ typedef __gnuc_ms_va_list ms_va_list;
+#endif
+
+#endif /* __CROSS_STDARG_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/emmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/emmintrin.h
new file mode 100644
index 0000000..9467fe0
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/emmintrin.h
@@ -0,0 +1,1513 @@
+/* Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 9.0. */
+
+#ifndef _EMMINTRIN_H_INCLUDED
+#define _EMMINTRIN_H_INCLUDED
+
+#ifndef __SSE2__
+# error "SSE2 instruction set not enabled"
+#else
+
+/* We need definitions from the SSE header files*/
+#include <xmmintrin.h>
+
+/* SSE2 */
+typedef double __v2df __attribute__ ((__vector_size__ (16)));
+typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+typedef int __v4si __attribute__ ((__vector_size__ (16)));
+typedef short __v8hi __attribute__ ((__vector_size__ (16)));
+typedef char __v16qi __attribute__ ((__vector_size__ (16)));
+
+/* The Intel API is flexible enough that we must allow aliasing with other
+ vector types, and their scalar components. */
+typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
+
+/* Create a selector for use with the SHUFPD instruction. */
+#define _MM_SHUFFLE2(fp1,fp0) \
+ (((fp1) << 1) | (fp0))
+
+/* Create a vector with element 0 as F and the rest zero. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_sd (double __F)
+{
+ return __extension__ (__m128d){ __F, 0.0 };
+}
+
+/* Create a vector with both elements equal to F. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_pd (double __F)
+{
+ return __extension__ (__m128d){ __F, __F };
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pd1 (double __F)
+{
+ return _mm_set1_pd (__F);
+}
+
+/* Create a vector with the lower value X and upper value W. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pd (double __W, double __X)
+{
+ return __extension__ (__m128d){ __X, __W };
+}
+
+/* Create a vector with the lower value W and upper value X. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_pd (double __W, double __X)
+{
+ return __extension__ (__m128d){ __W, __X };
+}
+
+/* Create a vector of zeros. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setzero_pd (void)
+{
+ return __extension__ (__m128d){ 0.0, 0.0 };
+}
+
+/* Sets the low DPFP value of A from the low value of B. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_move_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_movsd ((__v2df)__A, (__v2df)__B);
+}
+
+/* Load two DPFP values from P. The address must be 16-byte aligned. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_pd (double const *__P)
+{
+ return *(__m128d *)__P;
+}
+
+/* Load two DPFP values from P. The address need not be 16-byte aligned. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadu_pd (double const *__P)
+{
+ return __builtin_ia32_loadupd (__P);
+}
+
+/* Create a vector with all two elements equal to *P. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load1_pd (double const *__P)
+{
+ return _mm_set1_pd (*__P);
+}
+
+/* Create a vector with element 0 as *P and the rest zero. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_sd (double const *__P)
+{
+ return _mm_set_sd (*__P);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_pd1 (double const *__P)
+{
+ return _mm_load1_pd (__P);
+}
+
+/* Load two DPFP values in reverse order. The address must be aligned. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadr_pd (double const *__P)
+{
+ __m128d __tmp = _mm_load_pd (__P);
+ return __builtin_ia32_shufpd (__tmp, __tmp, _MM_SHUFFLE2 (0,1));
+}
+
+/* Store two DPFP values. The address must be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_pd (double *__P, __m128d __A)
+{
+ *(__m128d *)__P = __A;
+}
+
+/* Store two DPFP values. The address need not be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storeu_pd (double *__P, __m128d __A)
+{
+ __builtin_ia32_storeupd (__P, __A);
+}
+
+/* Stores the lower DPFP value. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_sd (double *__P, __m128d __A)
+{
+ *__P = __builtin_ia32_vec_ext_v2df (__A, 0);
+}
+
+extern __inline double __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsd_f64 (__m128d __A)
+{
+ return __builtin_ia32_vec_ext_v2df (__A, 0);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storel_pd (double *__P, __m128d __A)
+{
+ _mm_store_sd (__P, __A);
+}
+
+/* Stores the upper DPFP value. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storeh_pd (double *__P, __m128d __A)
+{
+ *__P = __builtin_ia32_vec_ext_v2df (__A, 1);
+}
+
+/* Store the lower DPFP value across two words.
+ The address must be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store1_pd (double *__P, __m128d __A)
+{
+ _mm_store_pd (__P, __builtin_ia32_shufpd (__A, __A, _MM_SHUFFLE2 (0,0)));
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_pd1 (double *__P, __m128d __A)
+{
+ _mm_store1_pd (__P, __A);
+}
+
+/* Store two DPFP values in reverse order. The address must be aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storer_pd (double *__P, __m128d __A)
+{
+ _mm_store_pd (__P, __builtin_ia32_shufpd (__A, __A, _MM_SHUFFLE2 (0,1)));
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi128_si32 (__m128i __A)
+{
+ return __builtin_ia32_vec_ext_v4si ((__v4si)__A, 0);
+}
+
+#ifdef __x86_64__
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi128_si64 (__m128i __A)
+{
+ return __builtin_ia32_vec_ext_v2di ((__v2di)__A, 0);
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi128_si64x (__m128i __A)
+{
+ return __builtin_ia32_vec_ext_v2di ((__v2di)__A, 0);
+}
+#endif
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_addpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_addsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_subpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_subsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_mulpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_mulsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_div_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_divpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_div_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_divsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sqrt_pd (__m128d __A)
+{
+ return (__m128d)__builtin_ia32_sqrtpd ((__v2df)__A);
+}
+
+/* Return pair {sqrt (A[0), B[1]}. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sqrt_sd (__m128d __A, __m128d __B)
+{
+ __v2df __tmp = __builtin_ia32_movsd ((__v2df)__A, (__v2df)__B);
+ return (__m128d)__builtin_ia32_sqrtsd ((__v2df)__tmp);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_minpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_minsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_maxpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_maxsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_and_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_andpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_andnot_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_andnpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_or_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_orpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_xor_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_xorpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpeqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpltpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmplepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpgtpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpgepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpneqpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnlt_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpnltpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnle_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpnlepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpngt_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpngtpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnge_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpngepd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpord_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpordpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpunord_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpunordpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpeqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpltsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmplesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_movsd ((__v2df) __A,
+ (__v2df)
+ __builtin_ia32_cmpltsd ((__v2df) __B,
+ (__v2df)
+ __A));
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_movsd ((__v2df) __A,
+ (__v2df)
+ __builtin_ia32_cmplesd ((__v2df) __B,
+ (__v2df)
+ __A));
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpneqsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnlt_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpnltsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnle_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpnlesd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpngt_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_movsd ((__v2df) __A,
+ (__v2df)
+ __builtin_ia32_cmpnltsd ((__v2df) __B,
+ (__v2df)
+ __A));
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnge_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d) __builtin_ia32_movsd ((__v2df) __A,
+ (__v2df)
+ __builtin_ia32_cmpnlesd ((__v2df) __B,
+ (__v2df)
+ __A));
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpord_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpordsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpunord_sd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_cmpunordsd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comieq_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdeq ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comilt_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdlt ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comile_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdle ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comigt_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdgt ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comige_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdge ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comineq_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_comisdneq ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomieq_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdeq ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomilt_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdlt ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomile_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdle ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomigt_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdgt ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomige_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdge ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomineq_sd (__m128d __A, __m128d __B)
+{
+ return __builtin_ia32_ucomisdneq ((__v2df)__A, (__v2df)__B);
+}
+
+/* Create a vector of Qi, where i is the element number. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_epi64x (long long __q1, long long __q0)
+{
+ return __extension__ (__m128i)(__v2di){ __q0, __q1 };
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_epi64 (__m64 __q1, __m64 __q0)
+{
+ return _mm_set_epi64x ((long long)__q1, (long long)__q0);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_epi32 (int __q3, int __q2, int __q1, int __q0)
+{
+ return __extension__ (__m128i)(__v4si){ __q0, __q1, __q2, __q3 };
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_epi16 (short __q7, short __q6, short __q5, short __q4,
+ short __q3, short __q2, short __q1, short __q0)
+{
+ return __extension__ (__m128i)(__v8hi){
+ __q0, __q1, __q2, __q3, __q4, __q5, __q6, __q7 };
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_epi8 (char __q15, char __q14, char __q13, char __q12,
+ char __q11, char __q10, char __q09, char __q08,
+ char __q07, char __q06, char __q05, char __q04,
+ char __q03, char __q02, char __q01, char __q00)
+{
+ return __extension__ (__m128i)(__v16qi){
+ __q00, __q01, __q02, __q03, __q04, __q05, __q06, __q07,
+ __q08, __q09, __q10, __q11, __q12, __q13, __q14, __q15
+ };
+}
+
+/* Set all of the elements of the vector to A. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_epi64x (long long __A)
+{
+ return _mm_set_epi64x (__A, __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_epi64 (__m64 __A)
+{
+ return _mm_set_epi64 (__A, __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_epi32 (int __A)
+{
+ return _mm_set_epi32 (__A, __A, __A, __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_epi16 (short __A)
+{
+ return _mm_set_epi16 (__A, __A, __A, __A, __A, __A, __A, __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_epi8 (char __A)
+{
+ return _mm_set_epi8 (__A, __A, __A, __A, __A, __A, __A, __A,
+ __A, __A, __A, __A, __A, __A, __A, __A);
+}
+
+/* Create a vector of Qi, where i is the element number.
+ The parameter order is reversed from the _mm_set_epi* functions. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_epi64 (__m64 __q0, __m64 __q1)
+{
+ return _mm_set_epi64 (__q1, __q0);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_epi32 (int __q0, int __q1, int __q2, int __q3)
+{
+ return _mm_set_epi32 (__q3, __q2, __q1, __q0);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_epi16 (short __q0, short __q1, short __q2, short __q3,
+ short __q4, short __q5, short __q6, short __q7)
+{
+ return _mm_set_epi16 (__q7, __q6, __q5, __q4, __q3, __q2, __q1, __q0);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_epi8 (char __q00, char __q01, char __q02, char __q03,
+ char __q04, char __q05, char __q06, char __q07,
+ char __q08, char __q09, char __q10, char __q11,
+ char __q12, char __q13, char __q14, char __q15)
+{
+ return _mm_set_epi8 (__q15, __q14, __q13, __q12, __q11, __q10, __q09, __q08,
+ __q07, __q06, __q05, __q04, __q03, __q02, __q01, __q00);
+}
+
+/* Create a vector with element 0 as *P and the rest zero. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_si128 (__m128i const *__P)
+{
+ return *__P;
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadu_si128 (__m128i const *__P)
+{
+ return (__m128i) __builtin_ia32_loaddqu ((char const *)__P);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadl_epi64 (__m128i const *__P)
+{
+ return _mm_set_epi64 ((__m64)0LL, *(__m64 *)__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_si128 (__m128i *__P, __m128i __B)
+{
+ *__P = __B;
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storeu_si128 (__m128i *__P, __m128i __B)
+{
+ __builtin_ia32_storedqu ((char *)__P, (__v16qi)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storel_epi64 (__m128i *__P, __m128i __B)
+{
+ *(long long *)__P = __builtin_ia32_vec_ext_v2di ((__v2di)__B, 0);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movepi64_pi64 (__m128i __B)
+{
+ return (__m64) __builtin_ia32_vec_ext_v2di ((__v2di)__B, 0);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movpi64_epi64 (__m64 __A)
+{
+ return _mm_set_epi64 ((__m64)0LL, __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_move_epi64 (__m128i __A)
+{
+ return (__m128i)__builtin_ia32_movq128 ((__v2di) __A);
+}
+
+/* Create a vector of zeros. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setzero_si128 (void)
+{
+ return __extension__ (__m128i)(__v4si){ 0, 0, 0, 0 };
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi32_pd (__m128i __A)
+{
+ return (__m128d)__builtin_ia32_cvtdq2pd ((__v4si) __A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi32_ps (__m128i __A)
+{
+ return (__m128)__builtin_ia32_cvtdq2ps ((__v4si) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpd_epi32 (__m128d __A)
+{
+ return (__m128i)__builtin_ia32_cvtpd2dq ((__v2df) __A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpd_pi32 (__m128d __A)
+{
+ return (__m64)__builtin_ia32_cvtpd2pi ((__v2df) __A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpd_ps (__m128d __A)
+{
+ return (__m128)__builtin_ia32_cvtpd2ps ((__v2df) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttpd_epi32 (__m128d __A)
+{
+ return (__m128i)__builtin_ia32_cvttpd2dq ((__v2df) __A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttpd_pi32 (__m128d __A)
+{
+ return (__m64)__builtin_ia32_cvttpd2pi ((__v2df) __A);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpi32_pd (__m64 __A)
+{
+ return (__m128d)__builtin_ia32_cvtpi2pd ((__v2si) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtps_epi32 (__m128 __A)
+{
+ return (__m128i)__builtin_ia32_cvtps2dq ((__v4sf) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttps_epi32 (__m128 __A)
+{
+ return (__m128i)__builtin_ia32_cvttps2dq ((__v4sf) __A);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtps_pd (__m128 __A)
+{
+ return (__m128d)__builtin_ia32_cvtps2pd ((__v4sf) __A);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsd_si32 (__m128d __A)
+{
+ return __builtin_ia32_cvtsd2si ((__v2df) __A);
+}
+
+#ifdef __x86_64__
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsd_si64 (__m128d __A)
+{
+ return __builtin_ia32_cvtsd2si64 ((__v2df) __A);
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsd_si64x (__m128d __A)
+{
+ return __builtin_ia32_cvtsd2si64 ((__v2df) __A);
+}
+#endif
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttsd_si32 (__m128d __A)
+{
+ return __builtin_ia32_cvttsd2si ((__v2df) __A);
+}
+
+#ifdef __x86_64__
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttsd_si64 (__m128d __A)
+{
+ return __builtin_ia32_cvttsd2si64 ((__v2df) __A);
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttsd_si64x (__m128d __A)
+{
+ return __builtin_ia32_cvttsd2si64 ((__v2df) __A);
+}
+#endif
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsd_ss (__m128 __A, __m128d __B)
+{
+ return (__m128)__builtin_ia32_cvtsd2ss ((__v4sf) __A, (__v2df) __B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi32_sd (__m128d __A, int __B)
+{
+ return (__m128d)__builtin_ia32_cvtsi2sd ((__v2df) __A, __B);
+}
+
+#ifdef __x86_64__
+/* Intel intrinsic. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_sd (__m128d __A, long long __B)
+{
+ return (__m128d)__builtin_ia32_cvtsi642sd ((__v2df) __A, __B);
+}
+
+/* Microsoft intrinsic. */
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64x_sd (__m128d __A, long long __B)
+{
+ return (__m128d)__builtin_ia32_cvtsi642sd ((__v2df) __A, __B);
+}
+#endif
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtss_sd (__m128d __A, __m128 __B)
+{
+ return (__m128d)__builtin_ia32_cvtss2sd ((__v2df) __A, (__v4sf)__B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_pd(__m128d __A, __m128d __B, const int __mask)
+{
+ return (__m128d)__builtin_ia32_shufpd ((__v2df)__A, (__v2df)__B, __mask);
+}
+#else
+#define _mm_shuffle_pd(A, B, N) \
+ ((__m128d)__builtin_ia32_shufpd ((__v2df)(__m128d)(A), \
+ (__v2df)(__m128d)(B), (int)(N)))
+#endif
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_unpckhpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_pd (__m128d __A, __m128d __B)
+{
+ return (__m128d)__builtin_ia32_unpcklpd ((__v2df)__A, (__v2df)__B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadh_pd (__m128d __A, double const *__B)
+{
+ return (__m128d)__builtin_ia32_loadhpd ((__v2df)__A, __B);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadl_pd (__m128d __A, double const *__B)
+{
+ return (__m128d)__builtin_ia32_loadlpd ((__v2df)__A, __B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movemask_pd (__m128d __A)
+{
+ return __builtin_ia32_movmskpd ((__v2df)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packs_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_packsswb128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packs_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_packssdw128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packus_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_packuswb128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpckhbw128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpckhwd128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpckhdq128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpckhqdq128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpcklbw128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpcklwd128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpckldq128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_punpcklqdq128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddd128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddq128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddsb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddsw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddusb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_epu16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_paddusw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubd128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubq128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubsb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubsw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubusb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_epu16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psubusw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_madd_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmaddwd128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhi_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmulhw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mullo_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmullw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_su32 (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pmuludq ((__v2si)__A, (__v2si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_epu32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmuludq128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_epi16 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psllwi128 ((__v8hi)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_epi32 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_pslldi128 ((__v4si)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_epi64 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psllqi128 ((__v2di)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srai_epi16 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psrawi128 ((__v8hi)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srai_epi32 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psradi128 ((__v4si)__A, __B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_si128 (__m128i __A, const int __N)
+{
+ return (__m128i)__builtin_ia32_psrldqi128 (__A, __N * 8);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_si128 (__m128i __A, const int __N)
+{
+ return (__m128i)__builtin_ia32_pslldqi128 (__A, __N * 8);
+}
+#else
+#define _mm_srli_si128(A, N) \
+ ((__m128i)__builtin_ia32_psrldqi128 ((__m128i)(A), (int)(N) * 8))
+#define _mm_slli_si128(A, N) \
+ ((__m128i)__builtin_ia32_pslldqi128 ((__m128i)(A), (int)(N) * 8))
+#endif
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_epi16 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psrlwi128 ((__v8hi)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_epi32 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psrldi128 ((__v4si)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_epi64 (__m128i __A, int __B)
+{
+ return (__m128i)__builtin_ia32_psrlqi128 ((__v2di)__A, __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psllw128((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pslld128((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psllq128((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sra_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psraw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sra_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psrad128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psrlw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psrld128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_epi64 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psrlq128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_and_si128 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pand128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_andnot_si128 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pandn128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_or_si128 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_por128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_xor_si128 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pxor128 ((__v2di)__A, (__v2di)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpeqb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpeqw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpeqd128 ((__v4si)__A, (__v4si)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtb128 ((__v16qi)__B, (__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtw128 ((__v8hi)__B, (__v8hi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtd128 ((__v4si)__B, (__v4si)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epi8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epi32 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pcmpgtd128 ((__v4si)__A, (__v4si)__B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_epi16 (__m128i const __A, int const __N)
+{
+ return __builtin_ia32_vec_ext_v8hi ((__v8hi)__A, __N);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_epi16 (__m128i const __A, int const __D, int const __N)
+{
+ return (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)__A, __D, __N);
+}
+#else
+#define _mm_extract_epi16(A, N) \
+ ((int) __builtin_ia32_vec_ext_v8hi ((__v8hi)(__m128i)(A), (int)(N)))
+#define _mm_insert_epi16(A, D, N) \
+ ((__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)(__m128i)(A), \
+ (int)(D), (int)(N)))
+#endif
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmaxsw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmaxub128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epi16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pminsw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pminub128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movemask_epi8 (__m128i __A)
+{
+ return __builtin_ia32_pmovmskb128 ((__v16qi)__A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhi_epu16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pmulhuw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shufflehi_epi16 (__m128i __A, const int __mask)
+{
+ return (__m128i)__builtin_ia32_pshufhw ((__v8hi)__A, __mask);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shufflelo_epi16 (__m128i __A, const int __mask)
+{
+ return (__m128i)__builtin_ia32_pshuflw ((__v8hi)__A, __mask);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_epi32 (__m128i __A, const int __mask)
+{
+ return (__m128i)__builtin_ia32_pshufd ((__v4si)__A, __mask);
+}
+#else
+#define _mm_shufflehi_epi16(A, N) \
+ ((__m128i)__builtin_ia32_pshufhw ((__v8hi)(__m128i)(A), (int)(N)))
+#define _mm_shufflelo_epi16(A, N) \
+ ((__m128i)__builtin_ia32_pshuflw ((__v8hi)(__m128i)(A), (int)(N)))
+#define _mm_shuffle_epi32(A, N) \
+ ((__m128i)__builtin_ia32_pshufd ((__v4si)(__m128i)(A), (int)(N)))
+#endif
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskmoveu_si128 (__m128i __A, __m128i __B, char *__C)
+{
+ __builtin_ia32_maskmovdqu ((__v16qi)__A, (__v16qi)__B, __C);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_avg_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pavgb128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_avg_epu16 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_pavgw128 ((__v8hi)__A, (__v8hi)__B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sad_epu8 (__m128i __A, __m128i __B)
+{
+ return (__m128i)__builtin_ia32_psadbw128 ((__v16qi)__A, (__v16qi)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_si32 (int *__A, int __B)
+{
+ __builtin_ia32_movnti (__A, __B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_si128 (__m128i *__A, __m128i __B)
+{
+ __builtin_ia32_movntdq ((__v2di *)__A, (__v2di)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_pd (double *__A, __m128d __B)
+{
+ __builtin_ia32_movntpd (__A, (__v2df)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_clflush (void const *__A)
+{
+ __builtin_ia32_clflush (__A);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_lfence (void)
+{
+ __builtin_ia32_lfence ();
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mfence (void)
+{
+ __builtin_ia32_mfence ();
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi32_si128 (int __A)
+{
+ return _mm_set_epi32 (0, 0, 0, __A);
+}
+
+#ifdef __x86_64__
+/* Intel intrinsic. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_si128 (long long __A)
+{
+ return _mm_set_epi64x (0, __A);
+}
+
+/* Microsoft intrinsic. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64x_si128 (long long __A)
+{
+ return _mm_set_epi64x (0, __A);
+}
+#endif
+
+/* Casts between various SP, DP, INT vector types. Note that these do no
+ conversion of values, they just change the type. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castpd_ps(__m128d __A)
+{
+ return (__m128) __A;
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castpd_si128(__m128d __A)
+{
+ return (__m128i) __A;
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castps_pd(__m128 __A)
+{
+ return (__m128d) __A;
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castps_si128(__m128 __A)
+{
+ return (__m128i) __A;
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castsi128_ps(__m128i __A)
+{
+ return (__m128) __A;
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_castsi128_pd(__m128i __A)
+{
+ return (__m128d) __A;
+}
+
+#endif /* __SSE2__ */
+
+#endif /* _EMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/float.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/float.h
new file mode 100644
index 0000000..9969f1c
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/float.h
@@ -0,0 +1,238 @@
+/* Copyright (C) 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 5.2.4.2.2 Characteristics of floating types <float.h>
+ */
+
+#ifndef _FLOAT_H___
+#define _FLOAT_H___
+
+/* Radix of exponent representation, b. */
+#undef FLT_RADIX
+#define FLT_RADIX __FLT_RADIX__
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef FLT_MANT_DIG
+#undef DBL_MANT_DIG
+#undef LDBL_MANT_DIG
+#define FLT_MANT_DIG __FLT_MANT_DIG__
+#define DBL_MANT_DIG __DBL_MANT_DIG__
+#define LDBL_MANT_DIG __LDBL_MANT_DIG__
+
+/* Number of decimal digits, q, such that any floating-point number with q
+ decimal digits can be rounded into a floating-point number with p radix b
+ digits and back again without change to the q decimal digits,
+
+ p * log10(b) if b is a power of 10
+ floor((p - 1) * log10(b)) otherwise
+*/
+#undef FLT_DIG
+#undef DBL_DIG
+#undef LDBL_DIG
+#define FLT_DIG __FLT_DIG__
+#define DBL_DIG __DBL_DIG__
+#define LDBL_DIG __LDBL_DIG__
+
+/* Minimum int x such that FLT_RADIX**(x-1) is a normalized float, emin */
+#undef FLT_MIN_EXP
+#undef DBL_MIN_EXP
+#undef LDBL_MIN_EXP
+#define FLT_MIN_EXP __FLT_MIN_EXP__
+#define DBL_MIN_EXP __DBL_MIN_EXP__
+#define LDBL_MIN_EXP __LDBL_MIN_EXP__
+
+/* Minimum negative integer such that 10 raised to that power is in the
+ range of normalized floating-point numbers,
+
+ ceil(log10(b) * (emin - 1))
+*/
+#undef FLT_MIN_10_EXP
+#undef DBL_MIN_10_EXP
+#undef LDBL_MIN_10_EXP
+#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
+#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
+#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
+
+/* Maximum int x such that FLT_RADIX**(x-1) is a representable float, emax. */
+#undef FLT_MAX_EXP
+#undef DBL_MAX_EXP
+#undef LDBL_MAX_EXP
+#define FLT_MAX_EXP __FLT_MAX_EXP__
+#define DBL_MAX_EXP __DBL_MAX_EXP__
+#define LDBL_MAX_EXP __LDBL_MAX_EXP__
+
+/* Maximum integer such that 10 raised to that power is in the range of
+ representable finite floating-point numbers,
+
+ floor(log10((1 - b**-p) * b**emax))
+*/
+#undef FLT_MAX_10_EXP
+#undef DBL_MAX_10_EXP
+#undef LDBL_MAX_10_EXP
+#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
+#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
+#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
+
+/* Maximum representable finite floating-point number,
+
+ (1 - b**-p) * b**emax
+*/
+#undef FLT_MAX
+#undef DBL_MAX
+#undef LDBL_MAX
+#define FLT_MAX __FLT_MAX__
+#define DBL_MAX __DBL_MAX__
+#define LDBL_MAX __LDBL_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type, b**1-p. */
+#undef FLT_EPSILON
+#undef DBL_EPSILON
+#undef LDBL_EPSILON
+#define FLT_EPSILON __FLT_EPSILON__
+#define DBL_EPSILON __DBL_EPSILON__
+#define LDBL_EPSILON __LDBL_EPSILON__
+
+/* Minimum normalized positive floating-point number, b**(emin - 1). */
+#undef FLT_MIN
+#undef DBL_MIN
+#undef LDBL_MIN
+#define FLT_MIN __FLT_MIN__
+#define DBL_MIN __DBL_MIN__
+#define LDBL_MIN __LDBL_MIN__
+
+/* Addition rounds to 0: zero, 1: nearest, 2: +inf, 3: -inf, -1: unknown. */
+/* ??? This is supposed to change with calls to fesetround in <fenv.h>. */
+#undef FLT_ROUNDS
+#define FLT_ROUNDS 1
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type float and double
+ to the range and precision of the double type, evaluate
+ long double operations and constants to the range and
+ precision of the long double type
+ 2 evaluate all operations and constants to the range and
+ precision of the long double type
+
+ ??? This ought to change with the setting of the fp control word;
+ the value provided by the compiler assumes the widest setting. */
+#undef FLT_EVAL_METHOD
+#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
+
+/* Number of decimal digits, n, such that any floating-point number in the
+ widest supported floating type with pmax radix b digits can be rounded
+ to a floating-point number with n decimal digits and back again without
+ change to the value,
+
+ pmax * log10(b) if b is a power of 10
+ ceil(1 + pmax * log10(b)) otherwise
+*/
+#undef DECIMAL_DIG
+#define DECIMAL_DIG __DECIMAL_DIG__
+
+#endif /* C99 */
+
+#ifdef __STDC_WANT_DEC_FP__
+/* Draft Technical Report 24732, extension for decimal floating-point
+ arithmetic: Characteristic of decimal floating types <float.h>. */
+
+/* Number of base-FLT_RADIX digits in the significand, p. */
+#undef DEC32_MANT_DIG
+#undef DEC64_MANT_DIG
+#undef DEC128_MANT_DIG
+#define DEC32_MANT_DIG __DEC32_MANT_DIG__
+#define DEC64_MANT_DIG __DEC64_MANT_DIG__
+#define DEC128_MANT_DIG __DEC128_MANT_DIG__
+
+/* Minimum exponent. */
+#undef DEC32_MIN_EXP
+#undef DEC64_MIN_EXP
+#undef DEC128_MIN_EXP
+#define DEC32_MIN_EXP __DEC32_MIN_EXP__
+#define DEC64_MIN_EXP __DEC64_MIN_EXP__
+#define DEC128_MIN_EXP __DEC128_MIN_EXP__
+
+/* Maximum exponent. */
+#undef DEC32_MAX_EXP
+#undef DEC64_MAX_EXP
+#undef DEC128_MAX_EXP
+#define DEC32_MAX_EXP __DEC32_MAX_EXP__
+#define DEC64_MAX_EXP __DEC64_MAX_EXP__
+#define DEC128_MAX_EXP __DEC128_MAX_EXP__
+
+/* Maximum representable finite decimal floating-point number
+ (there are 6, 15, and 33 9s after the decimal points respectively). */
+#undef DEC32_MAX
+#undef DEC64_MAX
+#undef DEC128_MAX
+#define DEC32_MAX __DEC32_MAX__
+#define DEC64_MAX __DEC64_MAX__
+#define DEC128_MAX __DEC128_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+ representable in the given floating point type. */
+#undef DEC32_EPSILON
+#undef DEC64_EPSILON
+#undef DEC128_EPSILON
+#define DEC32_EPSILON __DEC32_EPSILON__
+#define DEC64_EPSILON __DEC64_EPSILON__
+#define DEC128_EPSILON __DEC128_EPSILON__
+
+/* Minimum normalized positive floating-point number. */
+#undef DEC32_MIN
+#undef DEC64_MIN
+#undef DEC128_MIN
+#define DEC32_MIN __DEC32_MIN__
+#define DEC64_MIN __DEC64_MIN__
+#define DEC128_MIN __DEC128_MIN__
+
+/* Minimum subnormal positive floating-point number. */
+#undef DEC32_SUBNORMAL_MIN
+#undef DEC64_SUBNORMAL_MIN
+#undef DEC128_SUBNORMAL_MIN
+#define DEC32_SUBNORMAL_MIN __DEC32_SUBNORMAL_MIN__
+#define DEC64_SUBNORMAL_MIN __DEC64_SUBNORMAL_MIN__
+#define DEC128_SUBNORMAL_MIN __DEC128_SUBNORMAL_MIN__
+
+/* The floating-point expression evaluation method.
+ -1 indeterminate
+ 0 evaluate all operations and constants just to the range and
+ precision of the type
+ 1 evaluate operations and constants of type _Decimal32
+ and _Decimal64 to the range and precision of the _Decimal64
+ type, evaluate _Decimal128 operations and constants to the
+ range and precision of the _Decimal128 type;
+ 2 evaluate all operations and constants to the range and
+ precision of the _Decimal128 type. */
+
+#undef DEC_EVAL_METHOD
+#define DEC_EVAL_METHOD __DEC_EVAL_METHOD__
+
+#endif /* __STDC_WANT_DEC_FP__ */
+
+#endif /* _FLOAT_H___ */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/immintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/immintrin.h
new file mode 100644
index 0000000..7a2b9b9
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/immintrin.h
@@ -0,0 +1,59 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _IMMINTRIN_H_INCLUDED
+#define _IMMINTRIN_H_INCLUDED
+
+#ifdef __MMX__
+#include <mmintrin.h>
+#endif
+
+#ifdef __SSE__
+#include <xmmintrin.h>
+#endif
+
+#ifdef __SSE2__
+#include <emmintrin.h>
+#endif
+
+#ifdef __SSE3__
+#include <pmmintrin.h>
+#endif
+
+#ifdef __SSSE3__
+#include <tmmintrin.h>
+#endif
+
+#if defined (__SSE4_2__) || defined (__SSE4_1__)
+#include <smmintrin.h>
+#endif
+
+#if defined (__AES__) || defined (__PCLMUL__)
+#include <wmmintrin.h>
+#endif
+
+#ifdef __AVX__
+#include <avxintrin.h>
+#endif
+
+#endif /* _IMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/iso646.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/iso646.h
new file mode 100644
index 0000000..28ff9d1
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/iso646.h
@@ -0,0 +1,45 @@
+/* Copyright (C) 1997, 1999, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.9 Alternative spellings <iso646.h>
+ */
+
+#ifndef _ISO646_H
+#define _ISO646_H
+
+#ifndef __cplusplus
+#define and &&
+#define and_eq &=
+#define bitand &
+#define bitor |
+#define compl ~
+#define not !
+#define not_eq !=
+#define or ||
+#define or_eq |=
+#define xor ^
+#define xor_eq ^=
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/lwpintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/lwpintrin.h
new file mode 100644
index 0000000..954b039
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/lwpintrin.h
@@ -0,0 +1,100 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _X86INTRIN_H_INCLUDED
+# error "Never use <lwpintrin.h> directly; include <x86intrin.h> instead."
+#endif
+
+#ifndef _LWPINTRIN_H_INCLUDED
+#define _LWPINTRIN_H_INCLUDED
+
+#ifndef __LWP__
+# error "LWP instruction set not enabled"
+#else
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__llwpcb (void *pcbAddress)
+{
+ __builtin_ia32_llwpcb (pcbAddress);
+}
+
+extern __inline void * __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__slwpcb (void)
+{
+ return __builtin_ia32_slwpcb ();
+}
+
+#ifdef __OPTIMIZE__
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpval32 (unsigned int data2, unsigned int data1, unsigned int flags)
+{
+ __builtin_ia32_lwpval32 (data2, data1, flags);
+}
+
+#ifdef __x86_64__
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpval64 (unsigned long long data2, unsigned int data1, unsigned int flags)
+{
+ __builtin_ia32_lwpval64 (data2, data1, flags);
+}
+#endif
+#else
+#define __lwpval32(D2, D1, F) \
+ (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
+ (unsigned int) (F)))
+#ifdef __x86_64__
+#define __lwpval64(D2, D1, F) \
+ (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
+ (unsigned int) (F)))
+#endif
+#endif
+
+
+#ifdef __OPTIMIZE__
+extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpins32 (unsigned int data2, unsigned int data1, unsigned int flags)
+{
+ return __builtin_ia32_lwpins32 (data2, data1, flags);
+}
+
+#ifdef __x86_64__
+extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpins64 (unsigned long long data2, unsigned int data1, unsigned int flags)
+{
+ return __builtin_ia32_lwpins64 (data2, data1, flags);
+}
+#endif
+#else
+#define __lwpins32(D2, D1, F) \
+ (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
+ (unsigned int) (F)))
+#ifdef __x86_64__
+#define __lwpins64(D2, D1, F) \
+ (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
+ (unsigned int) (F)))
+#endif
+#endif
+
+#endif /* __LWP__ */
+
+#endif /* _LWPINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm3dnow.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm3dnow.h
new file mode 100644
index 0000000..0d0735c
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm3dnow.h
@@ -0,0 +1,215 @@
+/* Copyright (C) 2004, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the mm3dnow.h (of supposedly AMD origin) included with
+ MSVC 7.1. */
+
+#ifndef _MM3DNOW_H_INCLUDED
+#define _MM3DNOW_H_INCLUDED
+
+#ifdef __3dNOW__
+
+#include <mmintrin.h>
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_femms (void)
+{
+ __builtin_ia32_femms();
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pavgusb (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pavgusb ((__v8qi)__A, (__v8qi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pf2id (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pf2id ((__v2sf)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfacc (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfacc ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfadd (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfcmpeq (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfcmpeq ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfcmpge (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfcmpge ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfcmpgt (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfcmpgt ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfmax (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfmax ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfmin (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfmin ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfmul (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfmul ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfrcp (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pfrcp ((__v2sf)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfrcpit1 (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfrcpit1 ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfrcpit2 (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfrcpit2 ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfrsqrt (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pfrsqrt ((__v2sf)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfrsqit1 (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfrsqit1 ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfsub (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfsub ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfsubr (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfsubr ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pi2fd (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pi2fd ((__v2si)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmulhrw (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pmulhrw ((__v4hi)__A, (__v4hi)__B);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_prefetch (void *__P)
+{
+ __builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_prefetchw (void *__P)
+{
+ __builtin_prefetch (__P, 1, 3 /* _MM_HINT_T0 */);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_from_float (float __A)
+{
+ return __extension__ (__m64)(__v2sf){ __A, 0.0f };
+}
+
+extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_to_float (__m64 __A)
+{
+ union { __v2sf v; float a[2]; } __tmp;
+ __tmp.v = (__v2sf)__A;
+ return __tmp.a[0];
+}
+
+#ifdef __3dNOW_A__
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pf2iw (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pf2iw ((__v2sf)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfnacc (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfnacc ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pfpnacc (__m64 __A, __m64 __B)
+{
+ return (__m64)__builtin_ia32_pfpnacc ((__v2sf)__A, (__v2sf)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pi2fw (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pi2fw ((__v2si)__A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pswapd (__m64 __A)
+{
+ return (__m64)__builtin_ia32_pswapdsf ((__v2sf)__A);
+}
+
+#endif /* __3dNOW_A__ */
+#endif /* __3dNOW__ */
+
+#endif /* _MM3DNOW_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm_malloc.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm_malloc.h
new file mode 100644
index 0000000..0a9f2e2
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mm_malloc.h
@@ -0,0 +1,57 @@
+/* Copyright (C) 2004, 2006, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _MM_MALLOC_H_INCLUDED
+#define _MM_MALLOC_H_INCLUDED
+
+#include <stdlib.h>
+
+/* We can't depend on <stdlib.h> since the prototype of posix_memalign
+ may not be visible. */
+#ifndef __cplusplus
+extern int posix_memalign (void **, size_t, size_t);
+#else
+extern "C" int posix_memalign (void **, size_t, size_t) throw ();
+#endif
+
+static __inline void *
+_mm_malloc (size_t size, size_t alignment)
+{
+ void *ptr;
+ if (alignment == 1)
+ return malloc (size);
+ if (alignment == 2 || (sizeof (void *) == 8 && alignment == 4))
+ alignment = sizeof (void *);
+ if (posix_memalign (&ptr, alignment, size) == 0)
+ return ptr;
+ else
+ return NULL;
+}
+
+static __inline void
+_mm_free (void * ptr)
+{
+ free (ptr);
+}
+
+#endif /* _MM_MALLOC_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin-common.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin-common.h
new file mode 100644
index 0000000..0054168
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin-common.h
@@ -0,0 +1,155 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Common definition of the ROUND and PTEST intrinsics that are shared
+ between SSE4.1 and SSE5. */
+
+#ifndef _MMINTRIN_COMMON_H_INCLUDED
+#define _MMINTRIN_COMMON_H_INCLUDED
+
+#if !defined(__SSE5__) && !defined(__SSE4_1__)
+# error "SSE5 or SSE4.1 instruction set not enabled"
+#else
+
+/* Rounding mode macros. */
+#define _MM_FROUND_TO_NEAREST_INT 0x00
+#define _MM_FROUND_TO_NEG_INF 0x01
+#define _MM_FROUND_TO_POS_INF 0x02
+#define _MM_FROUND_TO_ZERO 0x03
+#define _MM_FROUND_CUR_DIRECTION 0x04
+
+#define _MM_FROUND_RAISE_EXC 0x00
+#define _MM_FROUND_NO_EXC 0x08
+
+#define _MM_FROUND_NINT \
+ (_MM_FROUND_TO_NEAREST_INT | _MM_FROUND_RAISE_EXC)
+#define _MM_FROUND_FLOOR \
+ (_MM_FROUND_TO_NEG_INF | _MM_FROUND_RAISE_EXC)
+#define _MM_FROUND_CEIL \
+ (_MM_FROUND_TO_POS_INF | _MM_FROUND_RAISE_EXC)
+#define _MM_FROUND_TRUNC \
+ (_MM_FROUND_TO_ZERO | _MM_FROUND_RAISE_EXC)
+#define _MM_FROUND_RINT \
+ (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_RAISE_EXC)
+#define _MM_FROUND_NEARBYINT \
+ (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_NO_EXC)
+
+/* Test Instruction */
+/* Packed integer 128-bit bitwise comparison. Return 1 if
+ (__V & __M) == 0. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testz_si128 (__m128i __M, __m128i __V)
+{
+ return __builtin_ia32_ptestz128 ((__v2di)__M, (__v2di)__V);
+}
+
+/* Packed integer 128-bit bitwise comparison. Return 1 if
+ (__V & ~__M) == 0. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testc_si128 (__m128i __M, __m128i __V)
+{
+ return __builtin_ia32_ptestc128 ((__v2di)__M, (__v2di)__V);
+}
+
+/* Packed integer 128-bit bitwise comparison. Return 1 if
+ (__V & __M) != 0 && (__V & ~__M) != 0. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testnzc_si128 (__m128i __M, __m128i __V)
+{
+ return __builtin_ia32_ptestnzc128 ((__v2di)__M, (__v2di)__V);
+}
+
+/* Macros for packed integer 128-bit comparison intrinsics. */
+#define _mm_test_all_zeros(M, V) _mm_testz_si128 ((M), (V))
+
+#define _mm_test_all_ones(V) \
+ _mm_testc_si128 ((V), _mm_cmpeq_epi32 ((V), (V)))
+
+#define _mm_test_mix_ones_zeros(M, V) _mm_testnzc_si128 ((M), (V))
+
+/* Packed/scalar double precision floating point rounding. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_round_pd (__m128d __V, const int __M)
+{
+ return (__m128d) __builtin_ia32_roundpd ((__v2df)__V, __M);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_round_sd(__m128d __D, __m128d __V, const int __M)
+{
+ return (__m128d) __builtin_ia32_roundsd ((__v2df)__D,
+ (__v2df)__V,
+ __M);
+}
+#else
+#define _mm_round_pd(V, M) \
+ ((__m128d) __builtin_ia32_roundpd ((__v2df)(__m128d)(V), (int)(M)))
+
+#define _mm_round_sd(D, V, M) \
+ ((__m128d) __builtin_ia32_roundsd ((__v2df)(__m128d)(D), \
+ (__v2df)(__m128d)(V), (int)(M)))
+#endif
+
+/* Packed/scalar single precision floating point rounding. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_round_ps (__m128 __V, const int __M)
+{
+ return (__m128) __builtin_ia32_roundps ((__v4sf)__V, __M);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_round_ss (__m128 __D, __m128 __V, const int __M)
+{
+ return (__m128) __builtin_ia32_roundss ((__v4sf)__D,
+ (__v4sf)__V,
+ __M);
+}
+#else
+#define _mm_round_ps(V, M) \
+ ((__m128) __builtin_ia32_roundps ((__v4sf)(__m128)(V), (int)(M)))
+
+#define _mm_round_ss(D, V, M) \
+ ((__m128) __builtin_ia32_roundss ((__v4sf)(__m128)(D), \
+ (__v4sf)(__m128)(V), (int)(M)))
+#endif
+
+/* Macros for ceil/floor intrinsics. */
+#define _mm_ceil_pd(V) _mm_round_pd ((V), _MM_FROUND_CEIL)
+#define _mm_ceil_sd(D, V) _mm_round_sd ((D), (V), _MM_FROUND_CEIL)
+
+#define _mm_floor_pd(V) _mm_round_pd((V), _MM_FROUND_FLOOR)
+#define _mm_floor_sd(D, V) _mm_round_sd ((D), (V), _MM_FROUND_FLOOR)
+
+#define _mm_ceil_ps(V) _mm_round_ps ((V), _MM_FROUND_CEIL)
+#define _mm_ceil_ss(D, V) _mm_round_ss ((D), (V), _MM_FROUND_CEIL)
+
+#define _mm_floor_ps(V) _mm_round_ps ((V), _MM_FROUND_FLOOR)
+#define _mm_floor_ss(D, V) _mm_round_ss ((D), (V), _MM_FROUND_FLOOR)
+
+#endif /* __SSE5__/__SSE4_1__ */
+
+#endif /* _MMINTRIN_COMMON_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin.h
new file mode 100644
index 0000000..497e22e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/mmintrin.h
@@ -0,0 +1,921 @@
+/* Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 9.0. */
+
+#ifndef _MMINTRIN_H_INCLUDED
+#define _MMINTRIN_H_INCLUDED
+
+#ifndef __MMX__
+# error "MMX instruction set not enabled"
+#else
+/* The Intel API is flexible enough that we must allow aliasing with other
+ vector types, and their scalar components. */
+typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
+
+/* Internal data types for implementing the intrinsics. */
+typedef int __v2si __attribute__ ((__vector_size__ (8)));
+typedef short __v4hi __attribute__ ((__vector_size__ (8)));
+typedef char __v8qi __attribute__ ((__vector_size__ (8)));
+typedef long long __v1di __attribute__ ((__vector_size__ (8)));
+typedef float __v2sf __attribute__ ((__vector_size__ (8)));
+
+/* Empty the multimedia state. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_empty (void)
+{
+ __builtin_ia32_emms ();
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_empty (void)
+{
+ _mm_empty ();
+}
+
+/* Convert I to a __m64 object. The integer is zero-extended to 64-bits. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi32_si64 (int __i)
+{
+ return (__m64) __builtin_ia32_vec_init_v2si (__i, 0);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_from_int (int __i)
+{
+ return _mm_cvtsi32_si64 (__i);
+}
+
+#ifdef __x86_64__
+/* Convert I to a __m64 object. */
+
+/* Intel intrinsic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_from_int64 (long long __i)
+{
+ return (__m64) __i;
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_m64 (long long __i)
+{
+ return (__m64) __i;
+}
+
+/* Microsoft intrinsic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64x_si64 (long long __i)
+{
+ return (__m64) __i;
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pi64x (long long __i)
+{
+ return (__m64) __i;
+}
+#endif
+
+/* Convert the lower 32 bits of the __m64 object into an integer. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_si32 (__m64 __i)
+{
+ return __builtin_ia32_vec_ext_v2si ((__v2si)__i, 0);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_to_int (__m64 __i)
+{
+ return _mm_cvtsi64_si32 (__i);
+}
+
+#ifdef __x86_64__
+/* Convert the __m64 object to a 64bit integer. */
+
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_to_int64 (__m64 __i)
+{
+ return (long long)__i;
+}
+
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtm64_si64 (__m64 __i)
+{
+ return (long long)__i;
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_si64x (__m64 __i)
+{
+ return (long long)__i;
+}
+#endif
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with signed saturation. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_packsswb ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_packsswb (__m64 __m1, __m64 __m2)
+{
+ return _mm_packs_pi16 (__m1, __m2);
+}
+
+/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
+ the result, and the two 32-bit values from M2 into the upper two 16-bit
+ values of the result, all with signed saturation. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packs_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_packssdw ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_packssdw (__m64 __m1, __m64 __m2)
+{
+ return _mm_packs_pi32 (__m1, __m2);
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+ the result, and the four 16-bit values from M2 into the upper four 8-bit
+ values of the result, all with unsigned saturation. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_packuswb ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_packuswb (__m64 __m1, __m64 __m2)
+{
+ return _mm_packs_pu16 (__m1, __m2);
+}
+
+/* Interleave the four 8-bit values from the high half of M1 with the four
+ 8-bit values from the high half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpckhbw ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpckhbw (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpackhi_pi8 (__m1, __m2);
+}
+
+/* Interleave the two 16-bit values from the high half of M1 with the two
+ 16-bit values from the high half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpckhwd ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpckhwd (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpackhi_pi16 (__m1, __m2);
+}
+
+/* Interleave the 32-bit value from the high half of M1 with the 32-bit
+ value from the high half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpckhdq ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpckhdq (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpackhi_pi32 (__m1, __m2);
+}
+
+/* Interleave the four 8-bit values from the low half of M1 with the four
+ 8-bit values from the low half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpcklbw ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpcklbw (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpacklo_pi8 (__m1, __m2);
+}
+
+/* Interleave the two 16-bit values from the low half of M1 with the two
+ 16-bit values from the low half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpcklwd ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpcklwd (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpacklo_pi16 (__m1, __m2);
+}
+
+/* Interleave the 32-bit value from the low half of M1 with the 32-bit
+ value from the low half of M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_punpckldq ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_punpckldq (__m64 __m1, __m64 __m2)
+{
+ return _mm_unpacklo_pi32 (__m1, __m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddb (__m64 __m1, __m64 __m2)
+{
+ return _mm_add_pi8 (__m1, __m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddw (__m64 __m1, __m64 __m2)
+{
+ return _mm_add_pi16 (__m1, __m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddd ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddd (__m64 __m1, __m64 __m2)
+{
+ return _mm_add_pi32 (__m1, __m2);
+}
+
+/* Add the 64-bit values in M1 to the 64-bit values in M2. */
+#ifdef __SSE2__
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_si64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddq ((__v1di)__m1, (__v1di)__m2);
+}
+#endif
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
+ saturated arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddsb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddsb (__m64 __m1, __m64 __m2)
+{
+ return _mm_adds_pi8 (__m1, __m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
+ saturated arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddsw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddsw (__m64 __m1, __m64 __m2)
+{
+ return _mm_adds_pi16 (__m1, __m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
+ saturated arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddusb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddusb (__m64 __m1, __m64 __m2)
+{
+ return _mm_adds_pu8 (__m1, __m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
+ saturated arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_adds_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddusw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_paddusw (__m64 __m1, __m64 __m2)
+{
+ return _mm_adds_pu16 (__m1, __m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubb (__m64 __m1, __m64 __m2)
+{
+ return _mm_sub_pi8 (__m1, __m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubw (__m64 __m1, __m64 __m2)
+{
+ return _mm_sub_pi16 (__m1, __m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubd ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubd (__m64 __m1, __m64 __m2)
+{
+ return _mm_sub_pi32 (__m1, __m2);
+}
+
+/* Add the 64-bit values in M1 to the 64-bit values in M2. */
+#ifdef __SSE2__
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_si64 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubq ((__v1di)__m1, (__v1di)__m2);
+}
+#endif
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
+ saturating arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubsb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubsb (__m64 __m1, __m64 __m2)
+{
+ return _mm_subs_pi8 (__m1, __m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ signed saturating arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubsw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubsw (__m64 __m1, __m64 __m2)
+{
+ return _mm_subs_pi16 (__m1, __m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
+ unsigned saturating arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_pu8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubusb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubusb (__m64 __m1, __m64 __m2)
+{
+ return _mm_subs_pu8 (__m1, __m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+ unsigned saturating arithmetic. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_subs_pu16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_psubusw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psubusw (__m64 __m1, __m64 __m2)
+{
+ return _mm_subs_pu16 (__m1, __m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+ four 32-bit intermediate results, which are then summed by pairs to
+ produce two 32-bit results. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_madd_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pmaddwd ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmaddwd (__m64 __m1, __m64 __m2)
+{
+ return _mm_madd_pi16 (__m1, __m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+ M2 and produce the high 16 bits of the 32-bit results. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pmulhw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmulhw (__m64 __m1, __m64 __m2)
+{
+ return _mm_mulhi_pi16 (__m1, __m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
+ the low 16 bits of the results. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mullo_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pmullw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmullw (__m64 __m1, __m64 __m2)
+{
+ return _mm_mullo_pi16 (__m1, __m2);
+}
+
+/* Shift four 16-bit values in M left by COUNT. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psllw ((__v4hi)__m, (__v4hi)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psllw (__m64 __m, __m64 __count)
+{
+ return _mm_sll_pi16 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psllwi ((__v4hi)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psllwi (__m64 __m, int __count)
+{
+ return _mm_slli_pi16 (__m, __count);
+}
+
+/* Shift two 32-bit values in M left by COUNT. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_pslld ((__v2si)__m, (__v2si)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pslld (__m64 __m, __m64 __count)
+{
+ return _mm_sll_pi32 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_pslldi ((__v2si)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pslldi (__m64 __m, int __count)
+{
+ return _mm_slli_pi32 (__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sll_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psllq ((__v1di)__m, (__v1di)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psllq (__m64 __m, __m64 __count)
+{
+ return _mm_sll_si64 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_slli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psllqi ((__v1di)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psllqi (__m64 __m, int __count)
+{
+ return _mm_slli_si64 (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sra_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psraw ((__v4hi)__m, (__v4hi)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psraw (__m64 __m, __m64 __count)
+{
+ return _mm_sra_pi16 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srai_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psrawi ((__v4hi)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrawi (__m64 __m, int __count)
+{
+ return _mm_srai_pi16 (__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sra_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psrad ((__v2si)__m, (__v2si)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrad (__m64 __m, __m64 __count)
+{
+ return _mm_sra_pi32 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srai_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psradi ((__v2si)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psradi (__m64 __m, int __count)
+{
+ return _mm_srai_pi32 (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in zeros. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_pi16 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psrlw ((__v4hi)__m, (__v4hi)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrlw (__m64 __m, __m64 __count)
+{
+ return _mm_srl_pi16 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_pi16 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psrlwi ((__v4hi)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrlwi (__m64 __m, int __count)
+{
+ return _mm_srli_pi16 (__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in zeros. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_pi32 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psrld ((__v2si)__m, (__v2si)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrld (__m64 __m, __m64 __count)
+{
+ return _mm_srl_pi32 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_pi32 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psrldi ((__v2si)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrldi (__m64 __m, int __count)
+{
+ return _mm_srli_pi32 (__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT; shift in zeros. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srl_si64 (__m64 __m, __m64 __count)
+{
+ return (__m64) __builtin_ia32_psrlq ((__v1di)__m, (__v1di)__count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrlq (__m64 __m, __m64 __count)
+{
+ return _mm_srl_si64 (__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_srli_si64 (__m64 __m, int __count)
+{
+ return (__m64) __builtin_ia32_psrlqi ((__v1di)__m, __count);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psrlqi (__m64 __m, int __count)
+{
+ return _mm_srli_si64 (__m, __count);
+}
+
+/* Bit-wise AND the 64-bit values in M1 and M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_and_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_ia32_pand (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pand (__m64 __m1, __m64 __m2)
+{
+ return _mm_and_si64 (__m1, __m2);
+}
+
+/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
+ 64-bit value in M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_andnot_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_ia32_pandn (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pandn (__m64 __m1, __m64 __m2)
+{
+ return _mm_andnot_si64 (__m1, __m2);
+}
+
+/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_or_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_ia32_por (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_por (__m64 __m1, __m64 __m2)
+{
+ return _mm_or_si64 (__m1, __m2);
+}
+
+/* Bit-wise exclusive OR the 64-bit values in M1 and M2. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_xor_si64 (__m64 __m1, __m64 __m2)
+{
+ return __builtin_ia32_pxor (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pxor (__m64 __m1, __m64 __m2)
+{
+ return _mm_xor_si64 (__m1, __m2);
+}
+
+/* Compare eight 8-bit values. The result of the comparison is 0xFF if the
+ test is true and zero if false. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpeqb (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpeq_pi8 (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpgtb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpgtb (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpgt_pi8 (__m1, __m2);
+}
+
+/* Compare four 16-bit values. The result of the comparison is 0xFFFF if
+ the test is true and zero if false. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpeqw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpeqw (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpeq_pi16 (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpgtw ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpgtw (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpgt_pi16 (__m1, __m2);
+}
+
+/* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if
+ the test is true and zero if false. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpeqd ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpeqd (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpeq_pi32 (__m1, __m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_pcmpgtd ((__v2si)__m1, (__v2si)__m2);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pcmpgtd (__m64 __m1, __m64 __m2)
+{
+ return _mm_cmpgt_pi32 (__m1, __m2);
+}
+
+/* Creates a 64-bit zero. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setzero_si64 (void)
+{
+ return (__m64)0LL;
+}
+
+/* Creates a vector of two 32-bit values; I0 is least significant. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pi32 (int __i1, int __i0)
+{
+ return (__m64) __builtin_ia32_vec_init_v2si (__i0, __i1);
+}
+
+/* Creates a vector of four 16-bit values; W0 is least significant. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
+{
+ return (__m64) __builtin_ia32_vec_init_v4hi (__w0, __w1, __w2, __w3);
+}
+
+/* Creates a vector of eight 8-bit values; B0 is least significant. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
+ char __b3, char __b2, char __b1, char __b0)
+{
+ return (__m64) __builtin_ia32_vec_init_v8qi (__b0, __b1, __b2, __b3,
+ __b4, __b5, __b6, __b7);
+}
+
+/* Similar, but with the arguments in reverse order. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_pi32 (int __i0, int __i1)
+{
+ return _mm_set_pi32 (__i1, __i0);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
+{
+ return _mm_set_pi16 (__w3, __w2, __w1, __w0);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
+ char __b4, char __b5, char __b6, char __b7)
+{
+ return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
+}
+
+/* Creates a vector of two 32-bit values, both elements containing I. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_pi32 (int __i)
+{
+ return _mm_set_pi32 (__i, __i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing W. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_pi16 (short __w)
+{
+ return _mm_set_pi16 (__w, __w, __w, __w);
+}
+
+/* Creates a vector of eight 8-bit values, all elements containing B. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_pi8 (char __b)
+{
+ return _mm_set_pi8 (__b, __b, __b, __b, __b, __b, __b, __b);
+}
+
+#endif /* __MMX__ */
+#endif /* _MMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/nmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/nmmintrin.h
new file mode 100644
index 0000000..2a2d264
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/nmmintrin.h
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>.
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 10.0. */
+
+#ifndef _NMMINTRIN_H_INCLUDED
+#define _NMMINTRIN_H_INCLUDED
+
+#ifndef __SSE4_2__
+# error "SSE4.2 instruction set not enabled"
+#else
+/* We just include SSE4.1 header file. */
+#include <smmintrin.h>
+#endif /* __SSE4_2__ */
+
+#endif /* _NMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/pmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/pmmintrin.h
new file mode 100644
index 0000000..c5c9ae2
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/pmmintrin.h
@@ -0,0 +1,128 @@
+/* Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 9.0. */
+
+#ifndef _PMMINTRIN_H_INCLUDED
+#define _PMMINTRIN_H_INCLUDED
+
+#ifndef __SSE3__
+# error "SSE3 instruction set not enabled"
+#else
+
+/* We need definitions from the SSE2 and SSE header files*/
+#include <emmintrin.h>
+
+/* Additional bits in the MXCSR. */
+#define _MM_DENORMALS_ZERO_MASK 0x0040
+#define _MM_DENORMALS_ZERO_ON 0x0040
+#define _MM_DENORMALS_ZERO_OFF 0x0000
+
+#define _MM_SET_DENORMALS_ZERO_MODE(mode) \
+ _mm_setcsr ((_mm_getcsr () & ~_MM_DENORMALS_ZERO_MASK) | (mode))
+#define _MM_GET_DENORMALS_ZERO_MODE() \
+ (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_addsub_ps (__m128 __X, __m128 __Y)
+{
+ return (__m128) __builtin_ia32_addsubps ((__v4sf)__X, (__v4sf)__Y);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_ps (__m128 __X, __m128 __Y)
+{
+ return (__m128) __builtin_ia32_haddps ((__v4sf)__X, (__v4sf)__Y);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_ps (__m128 __X, __m128 __Y)
+{
+ return (__m128) __builtin_ia32_hsubps ((__v4sf)__X, (__v4sf)__Y);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movehdup_ps (__m128 __X)
+{
+ return (__m128) __builtin_ia32_movshdup ((__v4sf)__X);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_moveldup_ps (__m128 __X)
+{
+ return (__m128) __builtin_ia32_movsldup ((__v4sf)__X);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_addsub_pd (__m128d __X, __m128d __Y)
+{
+ return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_pd (__m128d __X, __m128d __Y)
+{
+ return (__m128d) __builtin_ia32_haddpd ((__v2df)__X, (__v2df)__Y);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_pd (__m128d __X, __m128d __Y)
+{
+ return (__m128d) __builtin_ia32_hsubpd ((__v2df)__X, (__v2df)__Y);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loaddup_pd (double const *__P)
+{
+ return _mm_load1_pd (__P);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movedup_pd (__m128d __X)
+{
+ return _mm_shuffle_pd (__X, __X, _MM_SHUFFLE2 (0,0));
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_lddqu_si128 (__m128i const *__P)
+{
+ return (__m128i) __builtin_ia32_lddqu ((char const *)__P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
+{
+ __builtin_ia32_monitor (__P, __E, __H);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mwait (unsigned int __E, unsigned int __H)
+{
+ __builtin_ia32_mwait (__E, __H);
+}
+
+#endif /* __SSE3__ */
+
+#endif /* _PMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/smmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/smmintrin.h
new file mode 100644
index 0000000..1a29989
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/smmintrin.h
@@ -0,0 +1,724 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>.
+
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 10.0. */
+
+#ifndef _SMMINTRIN_H_INCLUDED
+#define _SMMINTRIN_H_INCLUDED
+
+#ifndef __SSE4_1__
+# error "SSE4.1 instruction set not enabled"
+#else
+
+/* We need definitions from the SSSE3, SSE3, SSE2 and SSE header
+ files. */
+#include <tmmintrin.h>
+#include <mmintrin-common.h>
+
+/* SSE4.1 */
+
+/* Integer blend instructions - select data from 2 sources using
+ constant/variable mask. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blend_epi16 (__m128i __X, __m128i __Y, const int __M)
+{
+ return (__m128i) __builtin_ia32_pblendw128 ((__v8hi)__X,
+ (__v8hi)__Y,
+ __M);
+}
+#else
+#define _mm_blend_epi16(X, Y, M) \
+ ((__m128i) __builtin_ia32_pblendw128 ((__v8hi)(__m128i)(X), \
+ (__v8hi)(__m128i)(Y), (int)(M)))
+#endif
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blendv_epi8 (__m128i __X, __m128i __Y, __m128i __M)
+{
+ return (__m128i) __builtin_ia32_pblendvb128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ (__v16qi)__M);
+}
+
+/* Single precision floating point blend instructions - select data
+ from 2 sources using constant/variable mask. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blend_ps (__m128 __X, __m128 __Y, const int __M)
+{
+ return (__m128) __builtin_ia32_blendps ((__v4sf)__X,
+ (__v4sf)__Y,
+ __M);
+}
+#else
+#define _mm_blend_ps(X, Y, M) \
+ ((__m128) __builtin_ia32_blendps ((__v4sf)(__m128)(X), \
+ (__v4sf)(__m128)(Y), (int)(M)))
+#endif
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blendv_ps (__m128 __X, __m128 __Y, __m128 __M)
+{
+ return (__m128) __builtin_ia32_blendvps ((__v4sf)__X,
+ (__v4sf)__Y,
+ (__v4sf)__M);
+}
+
+/* Double precision floating point blend instructions - select data
+ from 2 sources using constant/variable mask. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blend_pd (__m128d __X, __m128d __Y, const int __M)
+{
+ return (__m128d) __builtin_ia32_blendpd ((__v2df)__X,
+ (__v2df)__Y,
+ __M);
+}
+#else
+#define _mm_blend_pd(X, Y, M) \
+ ((__m128d) __builtin_ia32_blendpd ((__v2df)(__m128d)(X), \
+ (__v2df)(__m128d)(Y), (int)(M)))
+#endif
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_blendv_pd (__m128d __X, __m128d __Y, __m128d __M)
+{
+ return (__m128d) __builtin_ia32_blendvpd ((__v2df)__X,
+ (__v2df)__Y,
+ (__v2df)__M);
+}
+
+/* Dot product instructions with mask-defined summing and zeroing parts
+ of result. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_dp_ps (__m128 __X, __m128 __Y, const int __M)
+{
+ return (__m128) __builtin_ia32_dpps ((__v4sf)__X,
+ (__v4sf)__Y,
+ __M);
+}
+
+extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_dp_pd (__m128d __X, __m128d __Y, const int __M)
+{
+ return (__m128d) __builtin_ia32_dppd ((__v2df)__X,
+ (__v2df)__Y,
+ __M);
+}
+#else
+#define _mm_dp_ps(X, Y, M) \
+ ((__m128) __builtin_ia32_dpps ((__v4sf)(__m128)(X), \
+ (__v4sf)(__m128)(Y), (int)(M)))
+
+#define _mm_dp_pd(X, Y, M) \
+ ((__m128d) __builtin_ia32_dppd ((__v2df)(__m128d)(X), \
+ (__v2df)(__m128d)(Y), (int)(M)))
+#endif
+
+/* Packed integer 64-bit comparison, zeroing or filling with ones
+ corresponding parts of result. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epi64 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pcmpeqq ((__v2di)__X, (__v2di)__Y);
+}
+
+/* Min/max packed integer instructions. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epi8 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pminsb128 ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epi8 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmaxsb128 ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epu16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pminuw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epu16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmaxuw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pminsd128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmaxsd128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epu32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pminud128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epu32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmaxud128 ((__v4si)__X, (__v4si)__Y);
+}
+
+/* Packed integer 32-bit multiplication with truncation of upper
+ halves of results. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mullo_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X, (__v4si)__Y);
+}
+
+/* Packed integer 32-bit multiplication of 2 pairs of operands
+ with two 64-bit results. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmuldq128 ((__v4si)__X, (__v4si)__Y);
+}
+
+/* Insert single precision float into packed single precision array
+ element selected by index N. The bits [7-6] of N define S
+ index, the bits [5-4] define D index, and bits [3-0] define
+ zeroing mask for D. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_ps (__m128 __D, __m128 __S, const int __N)
+{
+ return (__m128) __builtin_ia32_insertps128 ((__v4sf)__D,
+ (__v4sf)__S,
+ __N);
+}
+#else
+#define _mm_insert_ps(D, S, N) \
+ ((__m128) __builtin_ia32_insertps128 ((__v4sf)(__m128)(D), \
+ (__v4sf)(__m128)(S), (int)(N)))
+#endif
+
+/* Helper macro to create the N value for _mm_insert_ps. */
+#define _MM_MK_INSERTPS_NDX(S, D, M) (((S) << 6) | ((D) << 4) | (M))
+
+/* Extract binary representation of single precision float from packed
+ single precision array element of X selected by index N. */
+
+#ifdef __OPTIMIZE__
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_ps (__m128 __X, const int __N)
+{
+ union { int i; float f; } __tmp;
+ __tmp.f = __builtin_ia32_vec_ext_v4sf ((__v4sf)__X, __N);
+ return __tmp.i;
+}
+#else
+#define _mm_extract_ps(X, N) \
+ (__extension__ \
+ ({ \
+ union { int i; float f; } __tmp; \
+ __tmp.f = __builtin_ia32_vec_ext_v4sf ((__v4sf)(__m128)(X), (int)(N)); \
+ __tmp.i; \
+ }))
+#endif
+
+/* Extract binary representation of single precision float into
+ D from packed single precision array element of S selected
+ by index N. */
+#define _MM_EXTRACT_FLOAT(D, S, N) \
+ { (D) = __builtin_ia32_vec_ext_v4sf ((__v4sf)(S), (N)); }
+
+/* Extract specified single precision float element into the lower
+ part of __m128. */
+#define _MM_PICK_OUT_PS(X, N) \
+ _mm_insert_ps (_mm_setzero_ps (), (X), \
+ _MM_MK_INSERTPS_NDX ((N), 0, 0x0e))
+
+/* Insert integer, S, into packed integer array element of D
+ selected by index N. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_epi8 (__m128i __D, int __S, const int __N)
+{
+ return (__m128i) __builtin_ia32_vec_set_v16qi ((__v16qi)__D,
+ __S, __N);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_epi32 (__m128i __D, int __S, const int __N)
+{
+ return (__m128i) __builtin_ia32_vec_set_v4si ((__v4si)__D,
+ __S, __N);
+}
+
+#ifdef __x86_64__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_epi64 (__m128i __D, long long __S, const int __N)
+{
+ return (__m128i) __builtin_ia32_vec_set_v2di ((__v2di)__D,
+ __S, __N);
+}
+#endif
+#else
+#define _mm_insert_epi8(D, S, N) \
+ ((__m128i) __builtin_ia32_vec_set_v16qi ((__v16qi)(__m128i)(D), \
+ (int)(S), (int)(N)))
+
+#define _mm_insert_epi32(D, S, N) \
+ ((__m128i) __builtin_ia32_vec_set_v4si ((__v4si)(__m128i)(D), \
+ (int)(S), (int)(N)))
+
+#ifdef __x86_64__
+#define _mm_insert_epi64(D, S, N) \
+ ((__m128i) __builtin_ia32_vec_set_v2di ((__v2di)(__m128i)(D), \
+ (long long)(S), (int)(N)))
+#endif
+#endif
+
+/* Extract integer from packed integer array element of X selected by
+ index N. */
+
+#ifdef __OPTIMIZE__
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_epi8 (__m128i __X, const int __N)
+{
+ return __builtin_ia32_vec_ext_v16qi ((__v16qi)__X, __N);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_epi32 (__m128i __X, const int __N)
+{
+ return __builtin_ia32_vec_ext_v4si ((__v4si)__X, __N);
+}
+
+#ifdef __x86_64__
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_epi64 (__m128i __X, const int __N)
+{
+ return __builtin_ia32_vec_ext_v2di ((__v2di)__X, __N);
+}
+#endif
+#else
+#define _mm_extract_epi8(X, N) \
+ ((int) __builtin_ia32_vec_ext_v16qi ((__v16qi)(__m128i)(X), (int)(N)))
+#define _mm_extract_epi32(X, N) \
+ ((int) __builtin_ia32_vec_ext_v4si ((__v4si)(__m128i)(X), (int)(N)))
+
+#ifdef __x86_64__
+#define _mm_extract_epi64(X, N) \
+ ((long long) __builtin_ia32_vec_ext_v2di ((__v2di)(__m128i)(X), (int)(N)))
+#endif
+#endif
+
+/* Return horizontal packed word minimum and its index in bits [15:0]
+ and bits [18:16] respectively. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_minpos_epu16 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_phminposuw128 ((__v8hi)__X);
+}
+
+/* Packed integer sign-extension. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi8_epi32 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxbd128 ((__v16qi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi16_epi32 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxwd128 ((__v8hi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi8_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxbq128 ((__v16qi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi32_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxdq128 ((__v4si)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi16_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxwq128 ((__v8hi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepi8_epi16 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovsxbw128 ((__v16qi)__X);
+}
+
+/* Packed integer zero-extension. */
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu8_epi32 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxbd128 ((__v16qi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu16_epi32 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxwd128 ((__v8hi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu8_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxbq128 ((__v16qi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu32_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxdq128 ((__v4si)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu16_epi64 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxwq128 ((__v8hi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtepu8_epi16 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pmovzxbw128 ((__v16qi)__X);
+}
+
+/* Pack 8 double words from 2 operands into 8 words of result with
+ unsigned saturation. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_packus_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_packusdw128 ((__v4si)__X, (__v4si)__Y);
+}
+
+/* Sum absolute 8-bit integer difference of adjacent groups of 4
+ byte integers in the first 2 operands. Starting offsets within
+ operands are determined by the 3rd mask operand. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mpsadbw_epu8 (__m128i __X, __m128i __Y, const int __M)
+{
+ return (__m128i) __builtin_ia32_mpsadbw128 ((__v16qi)__X,
+ (__v16qi)__Y, __M);
+}
+#else
+#define _mm_mpsadbw_epu8(X, Y, M) \
+ ((__m128i) __builtin_ia32_mpsadbw128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#endif
+
+/* Load double quadword using non-temporal aligned hint. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_load_si128 (__m128i *__X)
+{
+ return (__m128i) __builtin_ia32_movntdqa ((__v2di *) __X);
+}
+
+#ifdef __SSE4_2__
+
+/* These macros specify the source data format. */
+#define _SIDD_UBYTE_OPS 0x00
+#define _SIDD_UWORD_OPS 0x01
+#define _SIDD_SBYTE_OPS 0x02
+#define _SIDD_SWORD_OPS 0x03
+
+/* These macros specify the comparison operation. */
+#define _SIDD_CMP_EQUAL_ANY 0x00
+#define _SIDD_CMP_RANGES 0x04
+#define _SIDD_CMP_EQUAL_EACH 0x08
+#define _SIDD_CMP_EQUAL_ORDERED 0x0c
+
+/* These macros specify the the polarity. */
+#define _SIDD_POSITIVE_POLARITY 0x00
+#define _SIDD_NEGATIVE_POLARITY 0x10
+#define _SIDD_MASKED_POSITIVE_POLARITY 0x20
+#define _SIDD_MASKED_NEGATIVE_POLARITY 0x30
+
+/* These macros specify the output selection in _mm_cmpXstri (). */
+#define _SIDD_LEAST_SIGNIFICANT 0x00
+#define _SIDD_MOST_SIGNIFICANT 0x40
+
+/* These macros specify the output selection in _mm_cmpXstrm (). */
+#define _SIDD_BIT_MASK 0x00
+#define _SIDD_UNIT_MASK 0x40
+
+/* Intrinsics for text/string processing. */
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistrm (__m128i __X, __m128i __Y, const int __M)
+{
+ return (__m128i) __builtin_ia32_pcmpistrm128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistri (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistri128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestrm (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return (__m128i) __builtin_ia32_pcmpestrm128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestri (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestri128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+#else
+#define _mm_cmpistrm(X, Y, M) \
+ ((__m128i) __builtin_ia32_pcmpistrm128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#define _mm_cmpistri(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistri128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+
+#define _mm_cmpestrm(X, LX, Y, LY, M) \
+ ((__m128i) __builtin_ia32_pcmpestrm128 ((__v16qi)(__m128i)(X), \
+ (int)(LX), (__v16qi)(__m128i)(Y), \
+ (int)(LY), (int)(M)))
+#define _mm_cmpestri(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestri128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#endif
+
+/* Intrinsics for text/string processing and reading values of
+ EFlags. */
+
+#ifdef __OPTIMIZE__
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistra (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistria128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistrc (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistric128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistro (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistrio128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistrs (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistris128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpistrz (__m128i __X, __m128i __Y, const int __M)
+{
+ return __builtin_ia32_pcmpistriz128 ((__v16qi)__X,
+ (__v16qi)__Y,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestra (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestria128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestrc (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestric128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestro (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestrio128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestrs (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestris128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpestrz (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
+{
+ return __builtin_ia32_pcmpestriz128 ((__v16qi)__X, __LX,
+ (__v16qi)__Y, __LY,
+ __M);
+}
+#else
+#define _mm_cmpistra(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistria128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#define _mm_cmpistrc(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistric128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#define _mm_cmpistro(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistrio128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#define _mm_cmpistrs(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistris128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+#define _mm_cmpistrz(X, Y, M) \
+ ((int) __builtin_ia32_pcmpistriz128 ((__v16qi)(__m128i)(X), \
+ (__v16qi)(__m128i)(Y), (int)(M)))
+
+#define _mm_cmpestra(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestria128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#define _mm_cmpestrc(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestric128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#define _mm_cmpestro(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestrio128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#define _mm_cmpestrs(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestris128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#define _mm_cmpestrz(X, LX, Y, LY, M) \
+ ((int) __builtin_ia32_pcmpestriz128 ((__v16qi)(__m128i)(X), (int)(LX), \
+ (__v16qi)(__m128i)(Y), (int)(LY), \
+ (int)(M)))
+#endif
+
+/* Packed integer 64-bit comparison, zeroing or filling with ones
+ corresponding parts of result. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pcmpgtq ((__v2di)__X, (__v2di)__Y);
+}
+
+/* Calculate a number of bits set to 1. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_popcnt_u32 (unsigned int __X)
+{
+ return __builtin_popcount (__X);
+}
+
+#ifdef __x86_64__
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_popcnt_u64 (unsigned long long __X)
+{
+ return __builtin_popcountll (__X);
+}
+#endif
+
+/* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_crc32_u8 (unsigned int __C, unsigned char __V)
+{
+ return __builtin_ia32_crc32qi (__C, __V);
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_crc32_u16 (unsigned int __C, unsigned short __V)
+{
+ return __builtin_ia32_crc32hi (__C, __V);
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_crc32_u32 (unsigned int __C, unsigned int __V)
+{
+ return __builtin_ia32_crc32si (__C, __V);
+}
+
+#ifdef __x86_64__
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_crc32_u64 (unsigned long long __C, unsigned long long __V)
+{
+ return __builtin_ia32_crc32di (__C, __V);
+}
+#endif
+
+#endif /* __SSE4_2__ */
+
+#endif /* __SSE4_1__ */
+
+#endif /* _SMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdarg.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdarg.h
new file mode 100644
index 0000000..54dc2e7
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdarg.h
@@ -0,0 +1,130 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.15 Variable arguments <stdarg.h>
+ */
+
+#ifndef _STDARG_H
+#ifndef _ANSI_STDARG_H_
+#ifndef __need___va_list
+#define _STDARG_H
+#define _ANSI_STDARG_H_
+#endif /* not __need___va_list */
+#undef __need___va_list
+
+/* Define __gnuc_va_list. */
+
+#ifndef __GNUC_VA_LIST
+#define __GNUC_VA_LIST
+typedef __builtin_va_list __gnuc_va_list;
+#endif
+
+/* Define the standard macros for the user,
+ if this invocation was from the user program. */
+#ifdef _STDARG_H
+
+#define va_start(v,l) __builtin_va_start(v,l)
+#define va_end(v) __builtin_va_end(v)
+#define va_arg(v,l) __builtin_va_arg(v,l)
+#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L || defined(__GXX_EXPERIMENTAL_CXX0X__)
+#define va_copy(d,s) __builtin_va_copy(d,s)
+#endif
+#define __va_copy(d,s) __builtin_va_copy(d,s)
+
+/* Define va_list, if desired, from __gnuc_va_list. */
+/* We deliberately do not define va_list when called from
+ stdio.h, because ANSI C says that stdio.h is not supposed to define
+ va_list. stdio.h needs to have access to that data type,
+ but must not use that name. It should use the name __gnuc_va_list,
+ which is safe because it is reserved for the implementation. */
+
+#ifdef _HIDDEN_VA_LIST /* On OSF1, this means varargs.h is "half-loaded". */
+#undef _VA_LIST
+#endif
+
+#ifdef _BSD_VA_LIST
+#undef _BSD_VA_LIST
+#endif
+
+#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST))
+/* SVR4.2 uses _VA_LIST for an internal alias for va_list,
+ so we must avoid testing it and setting it here.
+ SVR4 uses _VA_LIST as a flag in stdarg.h, but we should
+ have no conflict with that. */
+#ifndef _VA_LIST_
+#define _VA_LIST_
+#ifdef __i860__
+#ifndef _VA_LIST
+#define _VA_LIST va_list
+#endif
+#endif /* __i860__ */
+typedef __gnuc_va_list va_list;
+#ifdef _SCO_DS
+#define __VA_LIST
+#endif
+#endif /* _VA_LIST_ */
+#else /* not __svr4__ || _SCO_DS */
+
+/* The macro _VA_LIST_ is the same thing used by this file in Ultrix.
+ But on BSD NET2 we must not test or define or undef it.
+ (Note that the comments in NET 2's ansi.h
+ are incorrect for _VA_LIST_--see stdio.h!) */
+#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT)
+/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5 */
+#ifndef _VA_LIST_DEFINED
+/* The macro _VA_LIST is used in SCO Unix 3.2. */
+#ifndef _VA_LIST
+/* The macro _VA_LIST_T_H is used in the Bull dpx2 */
+#ifndef _VA_LIST_T_H
+/* The macro __va_list__ is used by BeOS. */
+#ifndef __va_list__
+typedef __gnuc_va_list va_list;
+#endif /* not __va_list__ */
+#endif /* not _VA_LIST_T_H */
+#endif /* not _VA_LIST */
+#endif /* not _VA_LIST_DEFINED */
+#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__))
+#define _VA_LIST_
+#endif
+#ifndef _VA_LIST
+#define _VA_LIST
+#endif
+#ifndef _VA_LIST_DEFINED
+#define _VA_LIST_DEFINED
+#endif
+#ifndef _VA_LIST_T_H
+#define _VA_LIST_T_H
+#endif
+#ifndef __va_list__
+#define __va_list__
+#endif
+
+#endif /* not _VA_LIST_, except on certain systems */
+
+#endif /* not __svr4__ */
+
+#endif /* _STDARG_H */
+
+#endif /* not _ANSI_STDARG_H_ */
+#endif /* not _STDARG_H */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdbool.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdbool.h
new file mode 100644
index 0000000..4ed911f
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdbool.h
@@ -0,0 +1,50 @@
+/* Copyright (C) 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.16 Boolean type and values <stdbool.h>
+ */
+
+#ifndef _STDBOOL_H
+#define _STDBOOL_H
+
+#ifndef __cplusplus
+
+#define bool _Bool
+#define true 1
+#define false 0
+
+#else /* __cplusplus */
+
+/* Supporting <stdbool.h> in C++ is a GCC extension. */
+#define _Bool bool
+#define bool bool
+#define false false
+#define true true
+
+#endif /* __cplusplus */
+
+/* Signal that all the definitions are present. */
+#define __bool_true_false_are_defined 1
+
+#endif /* stdbool.h */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stddef.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stddef.h
new file mode 100644
index 0000000..89e5b2e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stddef.h
@@ -0,0 +1,416 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2002, 2004, 2009
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/*
+ * ISO C Standard: 7.17 Common definitions <stddef.h>
+ */
+#if (!defined(_STDDEF_H) && !defined(_STDDEF_H_) && !defined(_ANSI_STDDEF_H) \
+ && !defined(__STDDEF_H__)) \
+ || defined(__need_wchar_t) || defined(__need_size_t) \
+ || defined(__need_ptrdiff_t) || defined(__need_NULL) \
+ || defined(__need_wint_t)
+
+/* Any one of these symbols __need_* means that GNU libc
+ wants us just to define one data type. So don't define
+ the symbols that indicate this file's entire job has been done. */
+#if (!defined(__need_wchar_t) && !defined(__need_size_t) \
+ && !defined(__need_ptrdiff_t) && !defined(__need_NULL) \
+ && !defined(__need_wint_t))
+#define _STDDEF_H
+#define _STDDEF_H_
+/* snaroff@next.com says the NeXT needs this. */
+#define _ANSI_STDDEF_H
+/* Irix 5.1 needs this. */
+#define __STDDEF_H__
+#endif
+
+#ifndef __sys_stdtypes_h
+/* This avoids lossage on SunOS but only if stdtypes.h comes first.
+ There's no way to win with the other order! Sun lossage. */
+
+/* On 4.3bsd-net2, make sure ansi.h is included, so we have
+ one less case to deal with in the following. */
+#if defined (__BSD_NET2__) || defined (____386BSD____) || (defined (__FreeBSD__) && (__FreeBSD__ < 5)) || defined(__NetBSD__)
+#include <machine/ansi.h>
+#endif
+/* On FreeBSD 5, machine/ansi.h does not exist anymore... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#include <sys/_types.h>
+#endif
+
+/* In 4.3bsd-net2, machine/ansi.h defines these symbols, which are
+ defined if the corresponding type is *not* defined.
+ FreeBSD-2.1 defines _MACHINE_ANSI_H_ instead of _ANSI_H_ */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+#if !defined(_SIZE_T_) && !defined(_BSD_SIZE_T_)
+#define _SIZE_T
+#endif
+#if !defined(_PTRDIFF_T_) && !defined(_BSD_PTRDIFF_T_)
+#define _PTRDIFF_T
+#endif
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_. */
+#if !defined(_WCHAR_T_) && !defined(_BSD_WCHAR_T_)
+#ifndef _BSD_WCHAR_T_
+#define _WCHAR_T
+#endif
+#endif
+/* Undef _FOO_T_ if we are supposed to define foo_t. */
+#if defined (__need_ptrdiff_t) || defined (_STDDEF_H_)
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#if defined (__need_size_t) || defined (_STDDEF_H_)
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#if defined (__need_wchar_t) || defined (_STDDEF_H_)
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) */
+
+/* Sequent's header files use _PTRDIFF_T_ in some conflicting way.
+ Just ignore it. */
+#if defined (__sequent__) && defined (_PTRDIFF_T_)
+#undef _PTRDIFF_T_
+#endif
+
+/* On VxWorks, <type/vxTypesBase.h> may have defined macros like
+ _TYPE_size_t which will typedef size_t. fixincludes patched the
+ vxTypesBase.h so that this macro is only defined if _GCC_SIZE_T is
+ not defined, and so that defining this macro defines _GCC_SIZE_T.
+ If we find that the macros are still defined at this point, we must
+ invoke them so that the type is defined as expected. */
+#if defined (_TYPE_ptrdiff_t) && (defined (__need_ptrdiff_t) || defined (_STDDEF_H_))
+_TYPE_ptrdiff_t;
+#undef _TYPE_ptrdiff_t
+#endif
+#if defined (_TYPE_size_t) && (defined (__need_size_t) || defined (_STDDEF_H_))
+_TYPE_size_t;
+#undef _TYPE_size_t
+#endif
+#if defined (_TYPE_wchar_t) && (defined (__need_wchar_t) || defined (_STDDEF_H_))
+_TYPE_wchar_t;
+#undef _TYPE_wchar_t
+#endif
+
+/* In case nobody has defined these types, but we aren't running under
+ GCC 2.00, make sure that __PTRDIFF_TYPE__, __SIZE_TYPE__, and
+ __WCHAR_TYPE__ have reasonable values. This can happen if the
+ parts of GCC is compiled by an older compiler, that actually
+ include gstddef.h, such as collect2. */
+
+/* Signed type of difference of two pointers. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_ptrdiff_t)
+#ifndef _PTRDIFF_T /* in case <sys/types.h> has defined it. */
+#ifndef _T_PTRDIFF_
+#ifndef _T_PTRDIFF
+#ifndef __PTRDIFF_T
+#ifndef _PTRDIFF_T_
+#ifndef _BSD_PTRDIFF_T_
+#ifndef ___int_ptrdiff_t_h
+#ifndef _GCC_PTRDIFF_T
+#define _PTRDIFF_T
+#define _T_PTRDIFF_
+#define _T_PTRDIFF
+#define __PTRDIFF_T
+#define _PTRDIFF_T_
+#define _BSD_PTRDIFF_T_
+#define ___int_ptrdiff_t_h
+#define _GCC_PTRDIFF_T
+#ifndef __PTRDIFF_TYPE__
+#define __PTRDIFF_TYPE__ long int
+#endif
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+#endif /* _GCC_PTRDIFF_T */
+#endif /* ___int_ptrdiff_t_h */
+#endif /* _BSD_PTRDIFF_T_ */
+#endif /* _PTRDIFF_T_ */
+#endif /* __PTRDIFF_T */
+#endif /* _T_PTRDIFF */
+#endif /* _T_PTRDIFF_ */
+#endif /* _PTRDIFF_T */
+
+/* If this symbol has done its job, get rid of it. */
+#undef __need_ptrdiff_t
+
+#endif /* _STDDEF_H or __need_ptrdiff_t. */
+
+/* Unsigned type of `sizeof' something. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_size_t)
+#ifndef __size_t__ /* BeOS */
+#ifndef __SIZE_T__ /* Cray Unicos/Mk */
+#ifndef _SIZE_T /* in case <sys/types.h> has defined it. */
+#ifndef _SYS_SIZE_T_H
+#ifndef _T_SIZE_
+#ifndef _T_SIZE
+#ifndef __SIZE_T
+#ifndef _SIZE_T_
+#ifndef _BSD_SIZE_T_
+#ifndef _SIZE_T_DEFINED_
+#ifndef _SIZE_T_DEFINED
+#ifndef _BSD_SIZE_T_DEFINED_ /* Darwin */
+#ifndef _SIZE_T_DECLARED /* FreeBSD 5 */
+#ifndef ___int_size_t_h
+#ifndef _GCC_SIZE_T
+#ifndef _SIZET_
+#ifndef __size_t
+#define __size_t__ /* BeOS */
+#define __SIZE_T__ /* Cray Unicos/Mk */
+#define _SIZE_T
+#define _SYS_SIZE_T_H
+#define _T_SIZE_
+#define _T_SIZE
+#define __SIZE_T
+#define _SIZE_T_
+#define _BSD_SIZE_T_
+#define _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED
+#define _BSD_SIZE_T_DEFINED_ /* Darwin */
+#define _SIZE_T_DECLARED /* FreeBSD 5 */
+#define ___int_size_t_h
+#define _GCC_SIZE_T
+#define _SIZET_
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+/* __size_t is a typedef on FreeBSD 5!, must not trash it. */
+#else
+#define __size_t
+#endif
+#ifndef __SIZE_TYPE__
+#define __SIZE_TYPE__ long unsigned int
+#endif
+#if !(defined (__GNUG__) && defined (size_t))
+typedef __SIZE_TYPE__ size_t;
+#ifdef __BEOS__
+typedef long ssize_t;
+#endif /* __BEOS__ */
+#endif /* !(defined (__GNUG__) && defined (size_t)) */
+#endif /* __size_t */
+#endif /* _SIZET_ */
+#endif /* _GCC_SIZE_T */
+#endif /* ___int_size_t_h */
+#endif /* _SIZE_T_DECLARED */
+#endif /* _BSD_SIZE_T_DEFINED_ */
+#endif /* _SIZE_T_DEFINED */
+#endif /* _SIZE_T_DEFINED_ */
+#endif /* _BSD_SIZE_T_ */
+#endif /* _SIZE_T_ */
+#endif /* __SIZE_T */
+#endif /* _T_SIZE */
+#endif /* _T_SIZE_ */
+#endif /* _SYS_SIZE_T_H */
+#endif /* _SIZE_T */
+#endif /* __SIZE_T__ */
+#endif /* __size_t__ */
+#undef __need_size_t
+#endif /* _STDDEF_H or __need_size_t. */
+
+
+/* Wide character type.
+ Locale-writers should change this as necessary to
+ be big enough to hold unique values not between 0 and 127,
+ and not (wchar_t) -1, for each defined multibyte character. */
+
+/* Define this type if we are doing the whole job,
+ or if we want this type in particular. */
+#if defined (_STDDEF_H) || defined (__need_wchar_t)
+#ifndef __wchar_t__ /* BeOS */
+#ifndef __WCHAR_T__ /* Cray Unicos/Mk */
+#ifndef _WCHAR_T
+#ifndef _T_WCHAR_
+#ifndef _T_WCHAR
+#ifndef __WCHAR_T
+#ifndef _WCHAR_T_
+#ifndef _BSD_WCHAR_T_
+#ifndef _BSD_WCHAR_T_DEFINED_ /* Darwin */
+#ifndef _BSD_RUNE_T_DEFINED_ /* Darwin */
+#ifndef _WCHAR_T_DECLARED /* FreeBSD 5 */
+#ifndef _WCHAR_T_DEFINED_
+#ifndef _WCHAR_T_DEFINED
+#ifndef _WCHAR_T_H
+#ifndef ___int_wchar_t_h
+#ifndef __INT_WCHAR_T_H
+#ifndef _GCC_WCHAR_T
+#define __wchar_t__ /* BeOS */
+#define __WCHAR_T__ /* Cray Unicos/Mk */
+#define _WCHAR_T
+#define _T_WCHAR_
+#define _T_WCHAR
+#define __WCHAR_T
+#define _WCHAR_T_
+#define _BSD_WCHAR_T_
+#define _WCHAR_T_DEFINED_
+#define _WCHAR_T_DEFINED
+#define _WCHAR_T_H
+#define ___int_wchar_t_h
+#define __INT_WCHAR_T_H
+#define _GCC_WCHAR_T
+#define _WCHAR_T_DECLARED
+
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+ instead of _WCHAR_T_, and _BSD_RUNE_T_ (which, unlike the other
+ symbols in the _FOO_T_ family, stays defined even after its
+ corresponding type is defined). If we define wchar_t, then we
+ must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if
+ we undef _WCHAR_T_, then we must also define rune_t, since
+ headers like runetype.h assume that if machine/ansi.h is included,
+ and _BSD_WCHAR_T_ is not defined, then rune_t is available.
+ machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of
+ the same type." */
+#ifdef _BSD_WCHAR_T_
+#undef _BSD_WCHAR_T_
+#ifdef _BSD_RUNE_T_
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+typedef _BSD_RUNE_T_ rune_t;
+#define _BSD_WCHAR_T_DEFINED_
+#define _BSD_RUNE_T_DEFINED_ /* Darwin */
+#if defined (__FreeBSD__) && (__FreeBSD__ < 5)
+/* Why is this file so hard to maintain properly? In contrast to
+ the comment above regarding BSD/386 1.1, on FreeBSD for as long
+ as the symbol has existed, _BSD_RUNE_T_ must not stay defined or
+ redundant typedefs will occur when stdlib.h is included after this file. */
+#undef _BSD_RUNE_T_
+#endif
+#endif
+#endif
+#endif
+/* FreeBSD 5 can't be handled well using "traditional" logic above
+ since it no longer defines _BSD_RUNE_T_ yet still desires to export
+ rune_t in some cases... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+#if __BSD_VISIBLE
+#ifndef _RUNE_T_DECLARED
+typedef __rune_t rune_t;
+#define _RUNE_T_DECLARED
+#endif
+#endif
+#endif
+#endif
+
+#ifndef __WCHAR_TYPE__
+#define __WCHAR_TYPE__ int
+#endif
+#ifndef __cplusplus
+typedef __WCHAR_TYPE__ wchar_t;
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* _WCHAR_T_DECLARED */
+#endif /* _BSD_RUNE_T_DEFINED_ */
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* __WCHAR_T__ */
+#endif /* __wchar_t__ */
+#undef __need_wchar_t
+#endif /* _STDDEF_H or __need_wchar_t. */
+
+#if defined (__need_wint_t)
+#ifndef _WINT_T
+#define _WINT_T
+
+#ifndef __WINT_TYPE__
+#define __WINT_TYPE__ unsigned int
+#endif
+typedef __WINT_TYPE__ wint_t;
+#endif
+#undef __need_wint_t
+#endif
+
+/* In 4.3bsd-net2, leave these undefined to indicate that size_t, etc.
+ are already defined. */
+/* BSD/OS 3.1 and FreeBSD [23].x require the MACHINE_ANSI_H check here. */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+/* The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_
+ are probably typos and should be removed before 2.8 is released. */
+#ifdef _GCC_PTRDIFF_T_
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T_
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T_
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+/* The following ones are the real ones. */
+#ifdef _GCC_PTRDIFF_T
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* _ANSI_H_ || _MACHINE_ANSI_H_ */
+
+#endif /* __sys_stdtypes_h */
+
+/* A null pointer constant. */
+
+#if defined (_STDDEF_H) || defined (__need_NULL)
+#undef NULL /* in case <stdio.h> has defined it. */
+#ifdef __GNUG__
+#define NULL __null
+#else /* G++ */
+#ifndef __cplusplus
+#define NULL ((void *)0)
+#else /* C++ */
+#define NULL 0
+#endif /* C++ */
+#endif /* G++ */
+#endif /* NULL not defined and <stddef.h> or need NULL. */
+#undef __need_NULL
+
+#ifdef _STDDEF_H
+
+/* Offset of member MEMBER in a struct of type TYPE. */
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+
+#endif /* _STDDEF_H was defined this time */
+
+#endif /* !_STDDEF_H && !_STDDEF_H_ && !_ANSI_STDDEF_H && !__STDDEF_H__
+ || __need_XXX was not defined before */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdfix.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdfix.h
new file mode 100644
index 0000000..3c3ec00
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/stdfix.h
@@ -0,0 +1,204 @@
+/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* ISO/IEC JTC1 SC22 WG14 N1169
+ * Date: 2006-04-04
+ * ISO/IEC TR 18037
+ * Programming languages - C - Extensions to support embedded processors
+ */
+
+#ifndef _STDFIX_H
+#define _STDFIX_H
+
+/* 7.18a.1 Introduction. */
+
+#undef fract
+#undef accum
+#undef sat
+#define fract _Fract
+#define accum _Accum
+#define sat _Sat
+
+/* 7.18a.3 Precision macros. */
+
+#undef SFRACT_FBIT
+#undef SFRACT_MIN
+#undef SFRACT_MAX
+#undef SFRACT_EPSILON
+#define SFRACT_FBIT __SFRACT_FBIT__
+#define SFRACT_MIN __SFRACT_MIN__
+#define SFRACT_MAX __SFRACT_MAX__
+#define SFRACT_EPSILON __SFRACT_EPSILON__
+
+#undef USFRACT_FBIT
+#undef USFRACT_MIN
+#undef USFRACT_MAX
+#undef USFRACT_EPSILON
+#define USFRACT_FBIT __USFRACT_FBIT__
+#define USFRACT_MIN __USFRACT_MIN__ /* GCC extension. */
+#define USFRACT_MAX __USFRACT_MAX__
+#define USFRACT_EPSILON __USFRACT_EPSILON__
+
+#undef FRACT_FBIT
+#undef FRACT_MIN
+#undef FRACT_MAX
+#undef FRACT_EPSILON
+#define FRACT_FBIT __FRACT_FBIT__
+#define FRACT_MIN __FRACT_MIN__
+#define FRACT_MAX __FRACT_MAX__
+#define FRACT_EPSILON __FRACT_EPSILON__
+
+#undef UFRACT_FBIT
+#undef UFRACT_MIN
+#undef UFRACT_MAX
+#undef UFRACT_EPSILON
+#define UFRACT_FBIT __UFRACT_FBIT__
+#define UFRACT_MIN __UFRACT_MIN__ /* GCC extension. */
+#define UFRACT_MAX __UFRACT_MAX__
+#define UFRACT_EPSILON __UFRACT_EPSILON__
+
+#undef LFRACT_FBIT
+#undef LFRACT_MIN
+#undef LFRACT_MAX
+#undef LFRACT_EPSILON
+#define LFRACT_FBIT __LFRACT_FBIT__
+#define LFRACT_MIN __LFRACT_MIN__
+#define LFRACT_MAX __LFRACT_MAX__
+#define LFRACT_EPSILON __LFRACT_EPSILON__
+
+#undef ULFRACT_FBIT
+#undef ULFRACT_MIN
+#undef ULFRACT_MAX
+#undef ULFRACT_EPSILON
+#define ULFRACT_FBIT __ULFRACT_FBIT__
+#define ULFRACT_MIN __ULFRACT_MIN__ /* GCC extension. */
+#define ULFRACT_MAX __ULFRACT_MAX__
+#define ULFRACT_EPSILON __ULFRACT_EPSILON__
+
+#undef LLFRACT_FBIT
+#undef LLFRACT_MIN
+#undef LLFRACT_MAX
+#undef LLFRACT_EPSILON
+#define LLFRACT_FBIT __LLFRACT_FBIT__ /* GCC extension. */
+#define LLFRACT_MIN __LLFRACT_MIN__ /* GCC extension. */
+#define LLFRACT_MAX __LLFRACT_MAX__ /* GCC extension. */
+#define LLFRACT_EPSILON __LLFRACT_EPSILON__ /* GCC extension. */
+
+#undef ULLFRACT_FBIT
+#undef ULLFRACT_MIN
+#undef ULLFRACT_MAX
+#undef ULLFRACT_EPSILON
+#define ULLFRACT_FBIT __ULLFRACT_FBIT__ /* GCC extension. */
+#define ULLFRACT_MIN __ULLFRACT_MIN__ /* GCC extension. */
+#define ULLFRACT_MAX __ULLFRACT_MAX__ /* GCC extension. */
+#define ULLFRACT_EPSILON __ULLFRACT_EPSILON__ /* GCC extension. */
+
+#undef SACCUM_FBIT
+#undef SACCUM_IBIT
+#undef SACCUM_MIN
+#undef SACCUM_MAX
+#undef SACCUM_EPSILON
+#define SACCUM_FBIT __SACCUM_FBIT__
+#define SACCUM_IBIT __SACCUM_IBIT__
+#define SACCUM_MIN __SACCUM_MIN__
+#define SACCUM_MAX __SACCUM_MAX__
+#define SACCUM_EPSILON __SACCUM_EPSILON__
+
+#undef USACCUM_FBIT
+#undef USACCUM_IBIT
+#undef USACCUM_MIN
+#undef USACCUM_MAX
+#undef USACCUM_EPSILON
+#define USACCUM_FBIT __USACCUM_FBIT__
+#define USACCUM_IBIT __USACCUM_IBIT__
+#define USACCUM_MIN __USACCUM_MIN__ /* GCC extension. */
+#define USACCUM_MAX __USACCUM_MAX__
+#define USACCUM_EPSILON __USACCUM_EPSILON__
+
+#undef ACCUM_FBIT
+#undef ACCUM_IBIT
+#undef ACCUM_MIN
+#undef ACCUM_MAX
+#undef ACCUM_EPSILON
+#define ACCUM_FBIT __ACCUM_FBIT__
+#define ACCUM_IBIT __ACCUM_IBIT__
+#define ACCUM_MIN __ACCUM_MIN__
+#define ACCUM_MAX __ACCUM_MAX__
+#define ACCUM_EPSILON __ACCUM_EPSILON__
+
+#undef UACCUM_FBIT
+#undef UACCUM_IBIT
+#undef UACCUM_MIN
+#undef UACCUM_MAX
+#undef UACCUM_EPSILON
+#define UACCUM_FBIT __UACCUM_FBIT__
+#define UACCUM_IBIT __UACCUM_IBIT__
+#define UACCUM_MIN __UACCUM_MIN__ /* GCC extension. */
+#define UACCUM_MAX __UACCUM_MAX__
+#define UACCUM_EPSILON __UACCUM_EPSILON__
+
+#undef LACCUM_FBIT
+#undef LACCUM_IBIT
+#undef LACCUM_MIN
+#undef LACCUM_MAX
+#undef LACCUM_EPSILON
+#define LACCUM_FBIT __LACCUM_FBIT__
+#define LACCUM_IBIT __LACCUM_IBIT__
+#define LACCUM_MIN __LACCUM_MIN__
+#define LACCUM_MAX __LACCUM_MAX__
+#define LACCUM_EPSILON __LACCUM_EPSILON__
+
+#undef ULACCUM_FBIT
+#undef ULACCUM_IBIT
+#undef ULACCUM_MIN
+#undef ULACCUM_MAX
+#undef ULACCUM_EPSILON
+#define ULACCUM_FBIT __ULACCUM_FBIT__
+#define ULACCUM_IBIT __ULACCUM_IBIT__
+#define ULACCUM_MIN __ULACCUM_MIN__ /* GCC extension. */
+#define ULACCUM_MAX __ULACCUM_MAX__
+#define ULACCUM_EPSILON __ULACCUM_EPSILON__
+
+#undef LLACCUM_FBIT
+#undef LLACCUM_IBIT
+#undef LLACCUM_MIN
+#undef LLACCUM_MAX
+#undef LLACCUM_EPSILON
+#define LLACCUM_FBIT __LLACCUM_FBIT__ /* GCC extension. */
+#define LLACCUM_IBIT __LLACCUM_IBIT__ /* GCC extension. */
+#define LLACCUM_MIN __LLACCUM_MIN__ /* GCC extension. */
+#define LLACCUM_MAX __LLACCUM_MAX__ /* GCC extension. */
+#define LLACCUM_EPSILON __LLACCUM_EPSILON__ /* GCC extension. */
+
+#undef ULLACCUM_FBIT
+#undef ULLACCUM_IBIT
+#undef ULLACCUM_MIN
+#undef ULLACCUM_MAX
+#undef ULLACCUM_EPSILON
+#define ULLACCUM_FBIT __ULLACCUM_FBIT__ /* GCC extension. */
+#define ULLACCUM_IBIT __ULLACCUM_IBIT__ /* GCC extension. */
+#define ULLACCUM_MIN __ULLACCUM_MIN__ /* GCC extension. */
+#define ULLACCUM_MAX __ULLACCUM_MAX__ /* GCC extension. */
+#define ULLACCUM_EPSILON __ULLACCUM_EPSILON__ /* GCC extension. */
+
+#endif /* _STDFIX_H */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/tmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/tmmintrin.h
new file mode 100644
index 0000000..9835669
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/tmmintrin.h
@@ -0,0 +1,244 @@
+/* Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 9.1. */
+
+#ifndef _TMMINTRIN_H_INCLUDED
+#define _TMMINTRIN_H_INCLUDED
+
+#ifndef __SSSE3__
+# error "SSSE3 instruction set not enabled"
+#else
+
+/* We need definitions from the SSE3, SSE2 and SSE header files*/
+#include <pmmintrin.h>
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phaddw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phaddd128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadds_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phaddsw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phaddw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadd_pi32 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phaddd ((__v2si)__X, (__v2si)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hadds_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phaddsw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phsubw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phsubd128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsubs_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_phsubsw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phsubw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsub_pi32 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phsubd ((__v2si)__X, (__v2si)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_hsubs_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_phsubsw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maddubs_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmaddubsw128 ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maddubs_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_pmaddubsw ((__v8qi)__X, (__v8qi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhrs_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pmulhrsw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhrs_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_pmulhrsw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_epi8 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_pshufb128 ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_pi8 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_pshufb ((__v8qi)__X, (__v8qi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_epi8 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_psignb128 ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_epi16 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_psignw128 ((__v8hi)__X, (__v8hi)__Y);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_epi32 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_psignd128 ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_pi8 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_psignb ((__v8qi)__X, (__v8qi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_pi16 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_psignw ((__v4hi)__X, (__v4hi)__Y);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sign_pi32 (__m64 __X, __m64 __Y)
+{
+ return (__m64) __builtin_ia32_psignd ((__v2si)__X, (__v2si)__Y);
+}
+
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_alignr_epi8(__m128i __X, __m128i __Y, const int __N)
+{
+ return (__m128i) __builtin_ia32_palignr128 ((__v2di)__X,
+ (__v2di)__Y, __N * 8);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_alignr_pi8(__m64 __X, __m64 __Y, const int __N)
+{
+ return (__m64) __builtin_ia32_palignr ((__v1di)__X,
+ (__v1di)__Y, __N * 8);
+}
+#else
+#define _mm_alignr_epi8(X, Y, N) \
+ ((__m128i) __builtin_ia32_palignr128 ((__v2di)(__m128i)(X), \
+ (__v2di)(__m128i)(Y), \
+ (int)(N) * 8))
+#define _mm_alignr_pi8(X, Y, N) \
+ ((__m64) __builtin_ia32_palignr ((__v1di)(__m64)(X), \
+ (__v1di)(__m64)(Y), \
+ (int)(N) * 8))
+#endif
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_epi8 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pabsb128 ((__v16qi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_epi16 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pabsw128 ((__v8hi)__X);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_epi32 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_pi8 (__m64 __X)
+{
+ return (__m64) __builtin_ia32_pabsb ((__v8qi)__X);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_pi16 (__m64 __X)
+{
+ return (__m64) __builtin_ia32_pabsw ((__v4hi)__X);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_abs_pi32 (__m64 __X)
+{
+ return (__m64) __builtin_ia32_pabsd ((__v2si)__X);
+}
+
+#endif /* __SSSE3__ */
+
+#endif /* _TMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/unwind.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/unwind.h
new file mode 100644
index 0000000..4ff9017
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/unwind.h
@@ -0,0 +1,276 @@
+/* Exception handling and frame unwind runtime interface routines.
+ Copyright (C) 2001, 2003, 2004, 2006, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* This is derived from the C++ ABI for IA-64. Where we diverge
+ for cross-architecture compatibility are noted with "@@@". */
+
+#ifndef _UNWIND_H
+#define _UNWIND_H
+
+#ifndef HIDE_EXPORTS
+#pragma GCC visibility push(default)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Level 1: Base ABI */
+
+/* @@@ The IA-64 ABI uses uint64 throughout. Most places this is
+ inefficient for 32-bit and smaller machines. */
+typedef unsigned _Unwind_Word __attribute__((__mode__(__unwind_word__)));
+typedef signed _Unwind_Sword __attribute__((__mode__(__unwind_word__)));
+#if defined(__ia64__) && defined(__hpux__)
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__word__)));
+#else
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+#endif
+typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+
+/* @@@ The IA-64 ABI uses a 64-bit word to identify the producer and
+ consumer of an exception. We'll go along with this for now even on
+ 32-bit machines. We'll need to provide some other option for
+ 16-bit machines and for machines with > 8 bits per byte. */
+typedef unsigned _Unwind_Exception_Class __attribute__((__mode__(__DI__)));
+
+/* The unwind interface uses reason codes in several contexts to
+ identify the reasons for failures or other actions. */
+typedef enum
+{
+ _URC_NO_REASON = 0,
+ _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+ _URC_FATAL_PHASE2_ERROR = 2,
+ _URC_FATAL_PHASE1_ERROR = 3,
+ _URC_NORMAL_STOP = 4,
+ _URC_END_OF_STACK = 5,
+ _URC_HANDLER_FOUND = 6,
+ _URC_INSTALL_CONTEXT = 7,
+ _URC_CONTINUE_UNWIND = 8
+} _Unwind_Reason_Code;
+
+
+/* The unwind interface uses a pointer to an exception header object
+ as its representation of an exception being thrown. In general, the
+ full representation of an exception object is language- and
+ implementation-specific, but it will be prefixed by a header
+ understood by the unwind interface. */
+
+struct _Unwind_Exception;
+
+typedef void (*_Unwind_Exception_Cleanup_Fn) (_Unwind_Reason_Code,
+ struct _Unwind_Exception *);
+
+struct _Unwind_Exception
+{
+ _Unwind_Exception_Class exception_class;
+ _Unwind_Exception_Cleanup_Fn exception_cleanup;
+ _Unwind_Word private_1;
+ _Unwind_Word private_2;
+
+ /* @@@ The IA-64 ABI says that this structure must be double-word aligned.
+ Taking that literally does not make much sense generically. Instead we
+ provide the maximum alignment required by any type for the machine. */
+} __attribute__((__aligned__));
+
+
+/* The ACTIONS argument to the personality routine is a bitwise OR of one
+ or more of the following constants. */
+typedef int _Unwind_Action;
+
+#define _UA_SEARCH_PHASE 1
+#define _UA_CLEANUP_PHASE 2
+#define _UA_HANDLER_FRAME 4
+#define _UA_FORCE_UNWIND 8
+#define _UA_END_OF_STACK 16
+
+/* The target can override this macro to define any back-end-specific
+ attributes required for the lowest-level stack frame. */
+#ifndef LIBGCC2_UNWIND_ATTRIBUTE
+#define LIBGCC2_UNWIND_ATTRIBUTE
+#endif
+
+/* This is an opaque type used to refer to a system-specific data
+ structure used by the system unwinder. This context is created and
+ destroyed by the system, and passed to the personality routine
+ during unwinding. */
+struct _Unwind_Context;
+
+/* Raise an exception, passing along the given exception object. */
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_RaiseException (struct _Unwind_Exception *);
+
+/* Raise an exception for forced unwinding. */
+
+typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
+ (int, _Unwind_Action, _Unwind_Exception_Class,
+ struct _Unwind_Exception *, struct _Unwind_Context *, void *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
+
+/* Helper to invoke the exception_cleanup routine. */
+extern void _Unwind_DeleteException (struct _Unwind_Exception *);
+
+/* Resume propagation of an existing exception. This is used after
+ e.g. executing cleanup code, and not to implement rethrowing. */
+extern void LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Resume (struct _Unwind_Exception *);
+
+/* @@@ Resume propagation of a FORCE_UNWIND exception, or to rethrow
+ a normal exception that was handled. */
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Resume_or_Rethrow (struct _Unwind_Exception *);
+
+/* @@@ Use unwind data to perform a stack backtrace. The trace callback
+ is called for every stack frame in the call chain, but no cleanup
+ actions are performed. */
+typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn)
+ (struct _Unwind_Context *, void *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Backtrace (_Unwind_Trace_Fn, void *);
+
+/* These functions are used for communicating information about the unwind
+ context (i.e. the unwind descriptors and the user register state) between
+ the unwind library and the personality routine and landing pad. Only
+ selected registers may be manipulated. */
+
+extern _Unwind_Word _Unwind_GetGR (struct _Unwind_Context *, int);
+extern void _Unwind_SetGR (struct _Unwind_Context *, int, _Unwind_Word);
+
+extern _Unwind_Ptr _Unwind_GetIP (struct _Unwind_Context *);
+extern _Unwind_Ptr _Unwind_GetIPInfo (struct _Unwind_Context *, int *);
+extern void _Unwind_SetIP (struct _Unwind_Context *, _Unwind_Ptr);
+
+/* @@@ Retrieve the CFA of the given context. */
+extern _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *);
+
+extern void *_Unwind_GetLanguageSpecificData (struct _Unwind_Context *);
+
+extern _Unwind_Ptr _Unwind_GetRegionStart (struct _Unwind_Context *);
+
+
+/* The personality routine is the function in the C++ (or other language)
+ runtime library which serves as an interface between the system unwind
+ library and language-specific exception handling semantics. It is
+ specific to the code fragment described by an unwind info block, and
+ it is always referenced via the pointer in the unwind info block, and
+ hence it has no ABI-specified name.
+
+ Note that this implies that two different C++ implementations can
+ use different names, and have different contents in the language
+ specific data area. Moreover, that the language specific data
+ area contains no version info because name of the function invoked
+ provides more effective versioning by detecting at link time the
+ lack of code to handle the different data format. */
+
+typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)
+ (int, _Unwind_Action, _Unwind_Exception_Class,
+ struct _Unwind_Exception *, struct _Unwind_Context *);
+
+/* @@@ The following alternate entry points are for setjmp/longjmp
+ based unwinding. */
+
+struct SjLj_Function_Context;
+extern void _Unwind_SjLj_Register (struct SjLj_Function_Context *);
+extern void _Unwind_SjLj_Unregister (struct SjLj_Function_Context *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_RaiseException (struct _Unwind_Exception *);
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
+extern void LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_Resume (struct _Unwind_Exception *);
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_Resume_or_Rethrow (struct _Unwind_Exception *);
+
+/* @@@ The following provide access to the base addresses for text
+ and data-relative addressing in the LDSA. In order to stay link
+ compatible with the standard ABI for IA-64, we inline these. */
+
+#ifdef __ia64__
+#include <stdlib.h>
+
+static inline _Unwind_Ptr
+_Unwind_GetDataRelBase (struct _Unwind_Context *_C)
+{
+ /* The GP is stored in R1. */
+ return _Unwind_GetGR (_C, 1);
+}
+
+static inline _Unwind_Ptr
+_Unwind_GetTextRelBase (struct _Unwind_Context *_C __attribute__ ((__unused__)))
+{
+ abort ();
+ return 0;
+}
+
+/* @@@ Retrieve the Backing Store Pointer of the given context. */
+extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *);
+#else
+extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *);
+extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *);
+#endif
+
+/* @@@ Given an address, return the entry point of the function that
+ contains it. */
+extern void * _Unwind_FindEnclosingFunction (void *pc);
+
+#ifndef __SIZEOF_LONG__
+ #error "__SIZEOF_LONG__ macro not defined"
+#endif
+
+#ifndef __SIZEOF_POINTER__
+ #error "__SIZEOF_POINTER__ macro not defined"
+#endif
+
+
+/* leb128 type numbers have a potentially unlimited size.
+ The target of the following definitions of _sleb128_t and _uleb128_t
+ is to have efficient data types large enough to hold the leb128 type
+ numbers used in the unwind code.
+ Mostly these types will simply be defined to long and unsigned long
+ except when a unsigned long data type on the target machine is not
+ capable of storing a pointer. */
+
+#if __SIZEOF_LONG__ >= __SIZEOF_POINTER__
+ typedef long _sleb128_t;
+ typedef unsigned long _uleb128_t;
+#elif __SIZEOF_LONG_LONG__ >= __SIZEOF_POINTER__
+ typedef long long _sleb128_t;
+ typedef unsigned long long _uleb128_t;
+#else
+# error "What type shall we use for _sleb128_t?"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifndef HIDE_EXPORTS
+#pragma GCC visibility pop
+#endif
+
+#endif /* unwind.h */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/varargs.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/varargs.h
new file mode 100644
index 0000000..4b9803e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/varargs.h
@@ -0,0 +1,7 @@
+#ifndef _VARARGS_H
+#define _VARARGS_H
+
+#error "GCC no longer implements <varargs.h>."
+#error "Revise your code to use <stdarg.h>."
+
+#endif
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/wmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/wmmintrin.h
new file mode 100644
index 0000000..2c4bdc9
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/wmmintrin.h
@@ -0,0 +1,120 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 10.1. */
+
+#ifndef _WMMINTRIN_H_INCLUDED
+#define _WMMINTRIN_H_INCLUDED
+
+/* We need definitions from the SSE2 header file. */
+#include <emmintrin.h>
+
+#if !defined (__AES__) && !defined (__PCLMUL__)
+# error "AES/PCLMUL instructions not enabled"
+#else
+
+/* AES */
+
+#ifdef __AES__
+/* Performs 1 round of AES decryption of the first m128i using
+ the second m128i as a round key. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aesdec_si128 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_aesdec128 ((__v2di)__X, (__v2di)__Y);
+}
+
+/* Performs the last round of AES decryption of the first m128i
+ using the second m128i as a round key. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aesdeclast_si128 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_aesdeclast128 ((__v2di)__X,
+ (__v2di)__Y);
+}
+
+/* Performs 1 round of AES encryption of the first m128i using
+ the second m128i as a round key. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aesenc_si128 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_aesenc128 ((__v2di)__X, (__v2di)__Y);
+}
+
+/* Performs the last round of AES encryption of the first m128i
+ using the second m128i as a round key. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aesenclast_si128 (__m128i __X, __m128i __Y)
+{
+ return (__m128i) __builtin_ia32_aesenclast128 ((__v2di)__X, (__v2di)__Y);
+}
+
+/* Performs the InverseMixColumn operation on the source m128i
+ and stores the result into m128i destination. */
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aesimc_si128 (__m128i __X)
+{
+ return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
+}
+
+/* Generates a m128i round key for the input m128i AES cipher key and
+ byte round constant. The second parameter must be a compile time
+ constant. */
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_aeskeygenassist_si128 (__m128i __X, const int __C)
+{
+ return (__m128i) __builtin_ia32_aeskeygenassist128 ((__v2di)__X, __C);
+}
+#else
+#define _mm_aeskeygenassist_si128(X, C) \
+ ((__m128i) __builtin_ia32_aeskeygenassist128 ((__v2di)(__m128i)(X), \
+ (int)(C)))
+#endif
+#endif /* __AES__ */
+
+/* PCLMUL */
+
+#ifdef __PCLMUL__
+/* Performs carry-less integer multiplication of 64-bit halves of
+ 128-bit input operands. The third parameter inducates which 64-bit
+ haves of the input parameters v1 and v2 should be used. It must be
+ a compile time constant. */
+#ifdef __OPTIMIZE__
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_clmulepi64_si128 (__m128i __X, __m128i __Y, const int __I)
+{
+ return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
+ (__v2di)__Y, __I);
+}
+#else
+#define _mm_clmulepi64_si128(X, Y, I) \
+ ((__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)(__m128i)(X), \
+ (__v2di)(__m128i)(Y), (int)(I)))
+#endif
+#endif /* __PCLMUL__ */
+
+#endif /* __AES__/__PCLMUL__ */
+
+#endif /* _WMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/x86intrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/x86intrin.h
new file mode 100644
index 0000000..fead766
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/x86intrin.h
@@ -0,0 +1,74 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _X86INTRIN_H_INCLUDED
+#define _X86INTRIN_H_INCLUDED
+
+#ifdef __MMX__
+#include <mmintrin.h>
+#endif
+
+#ifdef __SSE__
+#include <xmmintrin.h>
+#endif
+
+#ifdef __SSE2__
+#include <emmintrin.h>
+#endif
+
+#ifdef __SSE3__
+#include <pmmintrin.h>
+#endif
+
+#ifdef __SSSE3__
+#include <tmmintrin.h>
+#endif
+
+#ifdef __SSE4a__
+#include <ammintrin.h>
+#endif
+
+#if defined (__SSE4_2__) || defined (__SSE4_1__)
+#include <smmintrin.h>
+#endif
+
+#ifdef __SSE5__
+#include <bmmintrin.h>
+#endif
+
+#ifdef __LWP__
+#include <lwpintrin.h>
+#endif
+
+#if defined (__AES__) || defined (__PCLMUL__)
+#include <wmmintrin.h>
+#endif
+
+/* For including AVX instructions */
+#include <immintrin.h>
+
+#ifdef __3dNOW__
+#include <mm3dnow.h>
+#endif
+
+#endif /* _X86INTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/xmmintrin.h b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/xmmintrin.h
new file mode 100644
index 0000000..544577e
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/xmmintrin.h
@@ -0,0 +1,1251 @@
+/* Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 9.0. */
+
+#ifndef _XMMINTRIN_H_INCLUDED
+#define _XMMINTRIN_H_INCLUDED
+
+#ifndef __SSE__
+# error "SSE instruction set not enabled"
+#else
+
+/* We need type definitions from the MMX header file. */
+#include <mmintrin.h>
+
+/* Get _mm_malloc () and _mm_free (). */
+#include <mm_malloc.h>
+
+/* The Intel API is flexible enough that we must allow aliasing with other
+ vector types, and their scalar components. */
+typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
+
+/* Internal data types for implementing the intrinsics. */
+typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+
+/* Create a selector for use with the SHUFPS instruction. */
+#define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
+ (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
+
+/* Constants for use with _mm_prefetch. */
+enum _mm_hint
+{
+ _MM_HINT_T0 = 3,
+ _MM_HINT_T1 = 2,
+ _MM_HINT_T2 = 1,
+ _MM_HINT_NTA = 0
+};
+
+/* Bits in the MXCSR. */
+#define _MM_EXCEPT_MASK 0x003f
+#define _MM_EXCEPT_INVALID 0x0001
+#define _MM_EXCEPT_DENORM 0x0002
+#define _MM_EXCEPT_DIV_ZERO 0x0004
+#define _MM_EXCEPT_OVERFLOW 0x0008
+#define _MM_EXCEPT_UNDERFLOW 0x0010
+#define _MM_EXCEPT_INEXACT 0x0020
+
+#define _MM_MASK_MASK 0x1f80
+#define _MM_MASK_INVALID 0x0080
+#define _MM_MASK_DENORM 0x0100
+#define _MM_MASK_DIV_ZERO 0x0200
+#define _MM_MASK_OVERFLOW 0x0400
+#define _MM_MASK_UNDERFLOW 0x0800
+#define _MM_MASK_INEXACT 0x1000
+
+#define _MM_ROUND_MASK 0x6000
+#define _MM_ROUND_NEAREST 0x0000
+#define _MM_ROUND_DOWN 0x2000
+#define _MM_ROUND_UP 0x4000
+#define _MM_ROUND_TOWARD_ZERO 0x6000
+
+#define _MM_FLUSH_ZERO_MASK 0x8000
+#define _MM_FLUSH_ZERO_ON 0x8000
+#define _MM_FLUSH_ZERO_OFF 0x0000
+
+/* Create a vector of zeros. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setzero_ps (void)
+{
+ return __extension__ (__m128){ 0.0f, 0.0f, 0.0f, 0.0f };
+}
+
+/* Perform the respective operation on the lower SPFP (single-precision
+ floating-point) values of A and B; the upper three SPFP values are
+ passed through from A. */
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_addss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_subss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_mulss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_div_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_divss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sqrt_ss (__m128 __A)
+{
+ return (__m128) __builtin_ia32_sqrtss ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rcp_ss (__m128 __A)
+{
+ return (__m128) __builtin_ia32_rcpss ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rsqrt_ss (__m128 __A)
+{
+ return (__m128) __builtin_ia32_rsqrtss ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_minss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_maxss ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Perform the respective operation on the four SPFP values in A and B. */
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_add_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_addps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sub_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_subps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mul_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_mulps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_div_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_divps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sqrt_ps (__m128 __A)
+{
+ return (__m128) __builtin_ia32_sqrtps ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rcp_ps (__m128 __A)
+{
+ return (__m128) __builtin_ia32_rcpps ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_rsqrt_ps (__m128 __A)
+{
+ return (__m128) __builtin_ia32_rsqrtps ((__v4sf)__A);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_minps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_maxps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Perform logical bit-wise operations on 128-bit values. */
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_and_ps (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_andps (__A, __B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_andnot_ps (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_andnps (__A, __B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_or_ps (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_orps (__A, __B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_xor_ps (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_xorps (__A, __B);
+}
+
+/* Perform a comparison on the lower SPFP values of A and B. If the
+ comparison is true, place a mask of all ones in the result, otherwise a
+ mask of zeros. The upper three SPFP values are passed through from A. */
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpeqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpltss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpless ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movss ((__v4sf) __A,
+ (__v4sf)
+ __builtin_ia32_cmpltss ((__v4sf) __B,
+ (__v4sf)
+ __A));
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movss ((__v4sf) __A,
+ (__v4sf)
+ __builtin_ia32_cmpless ((__v4sf) __B,
+ (__v4sf)
+ __A));
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpneqss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnlt_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpnltss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnle_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpnless ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpngt_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movss ((__v4sf) __A,
+ (__v4sf)
+ __builtin_ia32_cmpnltss ((__v4sf) __B,
+ (__v4sf)
+ __A));
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnge_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movss ((__v4sf) __A,
+ (__v4sf)
+ __builtin_ia32_cmpnless ((__v4sf) __B,
+ (__v4sf)
+ __A));
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpord_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpordss ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpunord_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpunordss ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Perform a comparison on the four SPFP values of A and B. For each
+ element, if the comparison is true, place a mask of all ones in the
+ result, otherwise a mask of zeros. */
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpeqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpltps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpleps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpgtps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpgeps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpneqps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnlt_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpnltps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnle_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpnleps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpngt_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpngtps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpnge_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpngeps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpord_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpordps ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpunord_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_cmpunordps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Compare the lower SPFP values of A and B and return 1 if true
+ and 0 if false. */
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comieq_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comieq ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comilt_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comilt ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comile_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comile ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comigt_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comigt ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comige_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comige ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_comineq_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_comineq ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomieq_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomieq ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomilt_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomilt ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomile_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomile ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomigt_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomigt ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomige_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomige ((__v4sf)__A, (__v4sf)__B);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_ucomineq_ss (__m128 __A, __m128 __B)
+{
+ return __builtin_ia32_ucomineq ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Convert the lower SPFP value to a 32-bit integer according to the current
+ rounding mode. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtss_si32 (__m128 __A)
+{
+ return __builtin_ia32_cvtss2si ((__v4sf) __A);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvt_ss2si (__m128 __A)
+{
+ return _mm_cvtss_si32 (__A);
+}
+
+#ifdef __x86_64__
+/* Convert the lower SPFP value to a 32-bit integer according to the
+ current rounding mode. */
+
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtss_si64 (__m128 __A)
+{
+ return __builtin_ia32_cvtss2si64 ((__v4sf) __A);
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtss_si64x (__m128 __A)
+{
+ return __builtin_ia32_cvtss2si64 ((__v4sf) __A);
+}
+#endif
+
+/* Convert the two lower SPFP values to 32-bit integers according to the
+ current rounding mode. Return the integers in packed form. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtps_pi32 (__m128 __A)
+{
+ return (__m64) __builtin_ia32_cvtps2pi ((__v4sf) __A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvt_ps2pi (__m128 __A)
+{
+ return _mm_cvtps_pi32 (__A);
+}
+
+/* Truncate the lower SPFP value to a 32-bit integer. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttss_si32 (__m128 __A)
+{
+ return __builtin_ia32_cvttss2si ((__v4sf) __A);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtt_ss2si (__m128 __A)
+{
+ return _mm_cvttss_si32 (__A);
+}
+
+#ifdef __x86_64__
+/* Truncate the lower SPFP value to a 32-bit integer. */
+
+/* Intel intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttss_si64 (__m128 __A)
+{
+ return __builtin_ia32_cvttss2si64 ((__v4sf) __A);
+}
+
+/* Microsoft intrinsic. */
+extern __inline long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttss_si64x (__m128 __A)
+{
+ return __builtin_ia32_cvttss2si64 ((__v4sf) __A);
+}
+#endif
+
+/* Truncate the two lower SPFP values to 32-bit integers. Return the
+ integers in packed form. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvttps_pi32 (__m128 __A)
+{
+ return (__m64) __builtin_ia32_cvttps2pi ((__v4sf) __A);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtt_ps2pi (__m128 __A)
+{
+ return _mm_cvttps_pi32 (__A);
+}
+
+/* Convert B to a SPFP value and insert it as element zero in A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi32_ss (__m128 __A, int __B)
+{
+ return (__m128) __builtin_ia32_cvtsi2ss ((__v4sf) __A, __B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvt_si2ss (__m128 __A, int __B)
+{
+ return _mm_cvtsi32_ss (__A, __B);
+}
+
+#ifdef __x86_64__
+/* Convert B to a SPFP value and insert it as element zero in A. */
+
+/* Intel intrinsic. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64_ss (__m128 __A, long long __B)
+{
+ return (__m128) __builtin_ia32_cvtsi642ss ((__v4sf) __A, __B);
+}
+
+/* Microsoft intrinsic. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsi64x_ss (__m128 __A, long long __B)
+{
+ return (__m128) __builtin_ia32_cvtsi642ss ((__v4sf) __A, __B);
+}
+#endif
+
+/* Convert the two 32-bit values in B to SPFP form and insert them
+ as the two lower elements in A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpi32_ps (__m128 __A, __m64 __B)
+{
+ return (__m128) __builtin_ia32_cvtpi2ps ((__v4sf) __A, (__v2si)__B);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvt_pi2ps (__m128 __A, __m64 __B)
+{
+ return _mm_cvtpi32_ps (__A, __B);
+}
+
+/* Convert the four signed 16-bit values in A to SPFP form. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpi16_ps (__m64 __A)
+{
+ __v4hi __sign;
+ __v2si __hisi, __losi;
+ __v4sf __zero, __ra, __rb;
+
+ /* This comparison against zero gives us a mask that can be used to
+ fill in the missing sign bits in the unpack operations below, so
+ that we get signed values after unpacking. */
+ __sign = __builtin_ia32_pcmpgtw ((__v4hi)0LL, (__v4hi)__A);
+
+ /* Convert the four words to doublewords. */
+ __hisi = (__v2si) __builtin_ia32_punpckhwd ((__v4hi)__A, __sign);
+ __losi = (__v2si) __builtin_ia32_punpcklwd ((__v4hi)__A, __sign);
+
+ /* Convert the doublewords to floating point two at a time. */
+ __zero = (__v4sf) _mm_setzero_ps ();
+ __ra = __builtin_ia32_cvtpi2ps (__zero, __hisi);
+ __rb = __builtin_ia32_cvtpi2ps (__ra, __losi);
+
+ return (__m128) __builtin_ia32_movlhps (__ra, __rb);
+}
+
+/* Convert the four unsigned 16-bit values in A to SPFP form. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpu16_ps (__m64 __A)
+{
+ __v2si __hisi, __losi;
+ __v4sf __zero, __ra, __rb;
+
+ /* Convert the four words to doublewords. */
+ __hisi = (__v2si) __builtin_ia32_punpckhwd ((__v4hi)__A, (__v4hi)0LL);
+ __losi = (__v2si) __builtin_ia32_punpcklwd ((__v4hi)__A, (__v4hi)0LL);
+
+ /* Convert the doublewords to floating point two at a time. */
+ __zero = (__v4sf) _mm_setzero_ps ();
+ __ra = __builtin_ia32_cvtpi2ps (__zero, __hisi);
+ __rb = __builtin_ia32_cvtpi2ps (__ra, __losi);
+
+ return (__m128) __builtin_ia32_movlhps (__ra, __rb);
+}
+
+/* Convert the low four signed 8-bit values in A to SPFP form. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpi8_ps (__m64 __A)
+{
+ __v8qi __sign;
+
+ /* This comparison against zero gives us a mask that can be used to
+ fill in the missing sign bits in the unpack operations below, so
+ that we get signed values after unpacking. */
+ __sign = __builtin_ia32_pcmpgtb ((__v8qi)0LL, (__v8qi)__A);
+
+ /* Convert the four low bytes to words. */
+ __A = (__m64) __builtin_ia32_punpcklbw ((__v8qi)__A, __sign);
+
+ return _mm_cvtpi16_ps(__A);
+}
+
+/* Convert the low four unsigned 8-bit values in A to SPFP form. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpu8_ps(__m64 __A)
+{
+ __A = (__m64) __builtin_ia32_punpcklbw ((__v8qi)__A, (__v8qi)0LL);
+ return _mm_cvtpu16_ps(__A);
+}
+
+/* Convert the four signed 32-bit values in A and B to SPFP form. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpi32x2_ps(__m64 __A, __m64 __B)
+{
+ __v4sf __zero = (__v4sf) _mm_setzero_ps ();
+ __v4sf __sfa = __builtin_ia32_cvtpi2ps (__zero, (__v2si)__A);
+ __v4sf __sfb = __builtin_ia32_cvtpi2ps (__sfa, (__v2si)__B);
+ return (__m128) __builtin_ia32_movlhps (__sfa, __sfb);
+}
+
+/* Convert the four SPFP values in A to four signed 16-bit integers. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtps_pi16(__m128 __A)
+{
+ __v4sf __hisf = (__v4sf)__A;
+ __v4sf __losf = __builtin_ia32_movhlps (__hisf, __hisf);
+ __v2si __hisi = __builtin_ia32_cvtps2pi (__hisf);
+ __v2si __losi = __builtin_ia32_cvtps2pi (__losf);
+ return (__m64) __builtin_ia32_packssdw (__hisi, __losi);
+}
+
+/* Convert the four SPFP values in A to four signed 8-bit integers. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtps_pi8(__m128 __A)
+{
+ __v4hi __tmp = (__v4hi) _mm_cvtps_pi16 (__A);
+ return (__m64) __builtin_ia32_packsswb (__tmp, (__v4hi)0LL);
+}
+
+/* Selects four specific SPFP values from A and B based on MASK. */
+#ifdef __OPTIMIZE__
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_ps (__m128 __A, __m128 __B, int const __mask)
+{
+ return (__m128) __builtin_ia32_shufps ((__v4sf)__A, (__v4sf)__B, __mask);
+}
+#else
+#define _mm_shuffle_ps(A, B, MASK) \
+ ((__m128) __builtin_ia32_shufps ((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), (int)(MASK)))
+#endif
+
+/* Selects and interleaves the upper two SPFP values from A and B. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpackhi_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_unpckhps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Selects and interleaves the lower two SPFP values from A and B. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_unpacklo_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_unpcklps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Sets the upper two SPFP values with 64-bits of data loaded from P;
+ the lower two values are passed through from A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadh_pi (__m128 __A, __m64 const *__P)
+{
+ return (__m128) __builtin_ia32_loadhps ((__v4sf)__A, (const __v2sf *)__P);
+}
+
+/* Stores the upper two SPFP values of A into P. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storeh_pi (__m64 *__P, __m128 __A)
+{
+ __builtin_ia32_storehps ((__v2sf *)__P, (__v4sf)__A);
+}
+
+/* Moves the upper two values of B into the lower two values of A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movehl_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movhlps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Moves the lower two values of B into the upper two values of A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movelh_ps (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movlhps ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Sets the lower two SPFP values with 64-bits of data loaded from P;
+ the upper two values are passed through from A. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadl_pi (__m128 __A, __m64 const *__P)
+{
+ return (__m128) __builtin_ia32_loadlps ((__v4sf)__A, (const __v2sf *)__P);
+}
+
+/* Stores the lower two SPFP values of A into P. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storel_pi (__m64 *__P, __m128 __A)
+{
+ __builtin_ia32_storelps ((__v2sf *)__P, (__v4sf)__A);
+}
+
+/* Creates a 4-bit mask from the most significant bits of the SPFP values. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movemask_ps (__m128 __A)
+{
+ return __builtin_ia32_movmskps ((__v4sf)__A);
+}
+
+/* Return the contents of the control register. */
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_getcsr (void)
+{
+ return __builtin_ia32_stmxcsr ();
+}
+
+/* Read exception bits from the control register. */
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_GET_EXCEPTION_STATE (void)
+{
+ return _mm_getcsr() & _MM_EXCEPT_MASK;
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_GET_EXCEPTION_MASK (void)
+{
+ return _mm_getcsr() & _MM_MASK_MASK;
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_GET_ROUNDING_MODE (void)
+{
+ return _mm_getcsr() & _MM_ROUND_MASK;
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_GET_FLUSH_ZERO_MODE (void)
+{
+ return _mm_getcsr() & _MM_FLUSH_ZERO_MASK;
+}
+
+/* Set the control register to I. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setcsr (unsigned int __I)
+{
+ __builtin_ia32_ldmxcsr (__I);
+}
+
+/* Set exception bits in the control register. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_SET_EXCEPTION_STATE(unsigned int __mask)
+{
+ _mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | __mask);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_SET_EXCEPTION_MASK (unsigned int __mask)
+{
+ _mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | __mask);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_SET_ROUNDING_MODE (unsigned int __mode)
+{
+ _mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | __mode);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_MM_SET_FLUSH_ZERO_MODE (unsigned int __mode)
+{
+ _mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | __mode);
+}
+
+/* Create a vector with element 0 as F and the rest zero. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_ss (float __F)
+{
+ return __extension__ (__m128)(__v4sf){ __F, 0.0f, 0.0f, 0.0f };
+}
+
+/* Create a vector with all four elements equal to F. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set1_ps (float __F)
+{
+ return __extension__ (__m128)(__v4sf){ __F, __F, __F, __F };
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_ps1 (float __F)
+{
+ return _mm_set1_ps (__F);
+}
+
+/* Create a vector with element 0 as *P and the rest zero. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_ss (float const *__P)
+{
+ return _mm_set_ss (*__P);
+}
+
+/* Create a vector with all four elements equal to *P. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load1_ps (float const *__P)
+{
+ return _mm_set1_ps (*__P);
+}
+
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_ps1 (float const *__P)
+{
+ return _mm_load1_ps (__P);
+}
+
+/* Load four SPFP values from P. The address must be 16-byte aligned. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_load_ps (float const *__P)
+{
+ return (__m128) *(__v4sf *)__P;
+}
+
+/* Load four SPFP values from P. The address need not be 16-byte aligned. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadu_ps (float const *__P)
+{
+ return (__m128) __builtin_ia32_loadups (__P);
+}
+
+/* Load four SPFP values in reverse order. The address must be aligned. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_loadr_ps (float const *__P)
+{
+ __v4sf __tmp = *(__v4sf *)__P;
+ return (__m128) __builtin_ia32_shufps (__tmp, __tmp, _MM_SHUFFLE (0,1,2,3));
+}
+
+/* Create the vector [Z Y X W]. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_set_ps (const float __Z, const float __Y, const float __X, const float __W)
+{
+ return __extension__ (__m128)(__v4sf){ __W, __X, __Y, __Z };
+}
+
+/* Create the vector [W X Y Z]. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_setr_ps (float __Z, float __Y, float __X, float __W)
+{
+ return __extension__ (__m128)(__v4sf){ __Z, __Y, __X, __W };
+}
+
+/* Stores the lower SPFP value. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_ss (float *__P, __m128 __A)
+{
+ *__P = __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0);
+}
+
+extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtss_f32 (__m128 __A)
+{
+ return __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0);
+}
+
+/* Store four SPFP values. The address must be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_ps (float *__P, __m128 __A)
+{
+ *(__v4sf *)__P = (__v4sf)__A;
+}
+
+/* Store four SPFP values. The address need not be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storeu_ps (float *__P, __m128 __A)
+{
+ __builtin_ia32_storeups (__P, (__v4sf)__A);
+}
+
+/* Store the lower SPFP value across four words. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store1_ps (float *__P, __m128 __A)
+{
+ __v4sf __va = (__v4sf)__A;
+ __v4sf __tmp = __builtin_ia32_shufps (__va, __va, _MM_SHUFFLE (0,0,0,0));
+ _mm_storeu_ps (__P, __tmp);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_store_ps1 (float *__P, __m128 __A)
+{
+ _mm_store1_ps (__P, __A);
+}
+
+/* Store four SPFP values in reverse order. The address must be aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_storer_ps (float *__P, __m128 __A)
+{
+ __v4sf __va = (__v4sf)__A;
+ __v4sf __tmp = __builtin_ia32_shufps (__va, __va, _MM_SHUFFLE (0,1,2,3));
+ _mm_store_ps (__P, __tmp);
+}
+
+/* Sets the low SPFP value of A from the low value of B. */
+extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_move_ss (__m128 __A, __m128 __B)
+{
+ return (__m128) __builtin_ia32_movss ((__v4sf)__A, (__v4sf)__B);
+}
+
+/* Extracts one of the four words of A. The selector N must be immediate. */
+#ifdef __OPTIMIZE__
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_extract_pi16 (__m64 const __A, int const __N)
+{
+ return __builtin_ia32_vec_ext_v4hi ((__v4hi)__A, __N);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pextrw (__m64 const __A, int const __N)
+{
+ return _mm_extract_pi16 (__A, __N);
+}
+#else
+#define _mm_extract_pi16(A, N) \
+ ((int) __builtin_ia32_vec_ext_v4hi ((__v4hi)(__m64)(A), (int)(N)))
+
+#define _m_pextrw(A, N) _mm_extract_pi16(A, N)
+#endif
+
+/* Inserts word D into one of four words of A. The selector N must be
+ immediate. */
+#ifdef __OPTIMIZE__
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_insert_pi16 (__m64 const __A, int const __D, int const __N)
+{
+ return (__m64) __builtin_ia32_vec_set_v4hi ((__v4hi)__A, __D, __N);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pinsrw (__m64 const __A, int const __D, int const __N)
+{
+ return _mm_insert_pi16 (__A, __D, __N);
+}
+#else
+#define _mm_insert_pi16(A, D, N) \
+ ((__m64) __builtin_ia32_vec_set_v4hi ((__v4hi)(__m64)(A), \
+ (int)(D), (int)(N)))
+
+#define _m_pinsrw(A, D, N) _mm_insert_pi16(A, D, N)
+#endif
+
+/* Compute the element-wise maximum of signed 16-bit values. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pmaxsw ((__v4hi)__A, (__v4hi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmaxsw (__m64 __A, __m64 __B)
+{
+ return _mm_max_pi16 (__A, __B);
+}
+
+/* Compute the element-wise maximum of unsigned 8-bit values. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pmaxub ((__v8qi)__A, (__v8qi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmaxub (__m64 __A, __m64 __B)
+{
+ return _mm_max_pu8 (__A, __B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_pi16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pminsw ((__v4hi)__A, (__v4hi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pminsw (__m64 __A, __m64 __B)
+{
+ return _mm_min_pi16 (__A, __B);
+}
+
+/* Compute the element-wise minimum of unsigned 8-bit values. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pminub ((__v8qi)__A, (__v8qi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pminub (__m64 __A, __m64 __B)
+{
+ return _mm_min_pu8 (__A, __B);
+}
+
+/* Create an 8-bit mask of the signs of 8-bit values. */
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_movemask_pi8 (__m64 __A)
+{
+ return __builtin_ia32_pmovmskb ((__v8qi)__A);
+}
+
+extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmovmskb (__m64 __A)
+{
+ return _mm_movemask_pi8 (__A);
+}
+
+/* Multiply four unsigned 16-bit values in A by four unsigned 16-bit values
+ in B and produce the high 16 bits of the 32-bit results. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mulhi_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pmulhuw ((__v4hi)__A, (__v4hi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pmulhuw (__m64 __A, __m64 __B)
+{
+ return _mm_mulhi_pu16 (__A, __B);
+}
+
+/* Return a combination of the four 16-bit values in A. The selector
+ must be an immediate. */
+#ifdef __OPTIMIZE__
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_shuffle_pi16 (__m64 __A, int const __N)
+{
+ return (__m64) __builtin_ia32_pshufw ((__v4hi)__A, __N);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pshufw (__m64 __A, int const __N)
+{
+ return _mm_shuffle_pi16 (__A, __N);
+}
+#else
+#define _mm_shuffle_pi16(A, N) \
+ ((__m64) __builtin_ia32_pshufw ((__v4hi)(__m64)(A), (int)(N)))
+
+#define _m_pshufw(A, N) _mm_shuffle_pi16 (A, N)
+#endif
+
+/* Conditionally store byte elements of A into P. The high bit of each
+ byte in the selector N determines whether the corresponding byte from
+ A is stored. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskmove_si64 (__m64 __A, __m64 __N, char *__P)
+{
+ __builtin_ia32_maskmovq ((__v8qi)__A, (__v8qi)__N, __P);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_maskmovq (__m64 __A, __m64 __N, char *__P)
+{
+ _mm_maskmove_si64 (__A, __N, __P);
+}
+
+/* Compute the rounded averages of the unsigned 8-bit values in A and B. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_avg_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pavgb ((__v8qi)__A, (__v8qi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pavgb (__m64 __A, __m64 __B)
+{
+ return _mm_avg_pu8 (__A, __B);
+}
+
+/* Compute the rounded averages of the unsigned 16-bit values in A and B. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_avg_pu16 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_pavgw ((__v4hi)__A, (__v4hi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_pavgw (__m64 __A, __m64 __B)
+{
+ return _mm_avg_pu16 (__A, __B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+ values in A and B. Return the value in the lower 16-bit word; the
+ upper words are cleared. */
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sad_pu8 (__m64 __A, __m64 __B)
+{
+ return (__m64) __builtin_ia32_psadbw ((__v8qi)__A, (__v8qi)__B);
+}
+
+extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_m_psadbw (__m64 __A, __m64 __B)
+{
+ return _mm_sad_pu8 (__A, __B);
+}
+
+/* Loads one cache line from address P to a location "closer" to the
+ processor. The selector I specifies the type of prefetch operation. */
+#ifdef __OPTIMIZE__
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_prefetch (const void *__P, enum _mm_hint __I)
+{
+ __builtin_prefetch (__P, 0, __I);
+}
+#else
+#define _mm_prefetch(P, I) \
+ __builtin_prefetch ((P), 0, (I))
+#endif
+
+/* Stores the data in A to the address P without polluting the caches. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_pi (__m64 *__P, __m64 __A)
+{
+ __builtin_ia32_movntq ((unsigned long long *)__P, (unsigned long long)__A);
+}
+
+/* Likewise. The address must be 16-byte aligned. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_stream_ps (float *__P, __m128 __A)
+{
+ __builtin_ia32_movntps (__P, (__v4sf)__A);
+}
+
+/* Guarantees that every preceding store is globally visible before
+ any subsequent store. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_sfence (void)
+{
+ __builtin_ia32_sfence ();
+}
+
+/* The execution of the next instruction is delayed by an implementation
+ specific amount of time. The instruction does not modify the
+ architectural state. */
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_pause (void)
+{
+ __asm__ __volatile__ ("rep; nop" : : );
+}
+
+/* Transpose the 4x4 matrix composed of row[0-3]. */
+#define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
+do { \
+ __v4sf __r0 = (row0), __r1 = (row1), __r2 = (row2), __r3 = (row3); \
+ __v4sf __t0 = __builtin_ia32_unpcklps (__r0, __r1); \
+ __v4sf __t1 = __builtin_ia32_unpcklps (__r2, __r3); \
+ __v4sf __t2 = __builtin_ia32_unpckhps (__r0, __r1); \
+ __v4sf __t3 = __builtin_ia32_unpckhps (__r2, __r3); \
+ (row0) = __builtin_ia32_movlhps (__t0, __t1); \
+ (row1) = __builtin_ia32_movhlps (__t1, __t0); \
+ (row2) = __builtin_ia32_movlhps (__t2, __t3); \
+ (row3) = __builtin_ia32_movhlps (__t3, __t2); \
+} while (0)
+
+/* For backward source compatibility. */
+#ifdef __SSE2__
+# include <emmintrin.h>
+#endif
+
+#endif /* __SSE__ */
+#endif /* _XMMINTRIN_H_INCLUDED */
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcc.a b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcc.a
new file mode 100644
index 0000000..8a3f215
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcc.a
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcov.a b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcov.a
new file mode 100644
index 0000000..50cbfda
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/libgcov.a
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/lib/libiberty.a b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/libiberty.a
new file mode 100644
index 0000000..9722a7d
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/lib/libiberty.a
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1 b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1
new file mode 100755
index 0000000..ffb5343
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1plus b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1plus
new file mode 100755
index 0000000..d726da4
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/cc1plus
Binary files differ
diff --git a/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/collect2 b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/collect2
new file mode 100755
index 0000000..f8b150a
--- /dev/null
+++ b/linux-x86/toolchain/i686-android-linux-4.4.3/libexec/gcc/i686-android-linux/4.4.3/collect2
Binary files differ
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/build-hardy-toolchain.sh b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/build-hardy-toolchain.sh
index 533b92b..8b60b9e 100755
--- a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/build-hardy-toolchain.sh
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/build-hardy-toolchain.sh
@@ -20,23 +20,13 @@
# (a.k.a. Hardy Heron) instead of the host system (which usually is 10.04,
# a.k.a. Lucid Lynx)
#
+# Use --help for complete usage information.
+#
+# WARNING: At this time, the generated toolchain binaries will *not* run
+# with GLibc 2.7, only the machine code it generates.
+#
-# You will need a working NDK install or working directory (which is used
-# to download and patch the toolchain sources from android.git.kernel.org)
-#
-# Define the NDK variable in your environment before calling this script,
-# or it will complain loudly. For example, you can invoke it as:
-#
-# export NDK=/path/to/ndk
-# ./uild-hardy-toolchain.sh
-#
-# Then *wait* for a very long time (about 13minutes on an 8-core HP z600)
-# A package file will be generated in /tmp, its name dumped by the script
-# in case of success.
-#
-# There are no command-line options right now, modify the definitions under
-# the "CONFIGURATION" section below if you want to change stuff.
-#
+PROGNAME="`basename \"$0\"`"
###########################################################################
###########################################################################
@@ -58,32 +48,10 @@
;;
esac
-# Set V to 1 to enable verbose mode
-V=${V:-0}
-
# Location of temporary directory where everything will be downloaded
# configured, built and installed before we generate the final
# package archive
-ROOT_DIR=/tmp/gcc-hardy32
-mkdir -p $ROOT_DIR
-
-# Location where we download packages from the Ubuntu servers
-DOWNLOAD_DIR=$ROOT_DIR/download
-
-# Location of the Android NDK
-if [ -z "$NDK" ] ; then
- echo "ERROR: Please define the NDK variable to point to a valid"
- echo " NDK directory (installation or git repository)."
- echo " This is needed to download the toolchain sources."
- exit 1
-fi
-
-NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH="$NDK/build/tools/download-toolchain-sources.sh"
-if [ ! -f "$NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH" ] ; then\
- echo "ERROR: Missing script: $NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH"
- echo "Your NDK variable probably points to an invalid directory!"
- exit 1
-fi
+WORK_DIR=/tmp/gcc32
# Versions of various toolchain components, do not touch unless you know
# what you're doing!
@@ -95,11 +63,11 @@
GMP_TARGET=i386-linux
# Location where we will download the toolchain sources
-TOOLCHAIN_SRC_DIR=$ROOT_DIR/toolchain-src
+TOOLCHAIN_SRC_DIR=$WORK_DIR/toolchain-src
-# Location of original sysroot
-# You must create it with the "hardy-sysroot.sh" script
-ORG_SYSROOT_DIR=$ROOT_DIR/sysroot
+# Location of original sysroot. This is where we're going to extract all
+# binary Ubuntu packages.
+ORG_SYSROOT_DIR=$WORK_DIR/sysroot
# Name of the final generated toolchain
TOOLCHAIN_NAME=$GCC_TARGET-glibc2.7-$GCC_VERSION
@@ -107,8 +75,13 @@
# Name of the final toolchain binary tarball that this script will create
TOOLCHAIN_ARCHIVE=/tmp/$TOOLCHAIN_NAME.tar.bz2
-# Location where we're going to install the toolchain
-INSTALL_DIR=$ROOT_DIR/$TOOLCHAIN_NAME
+# Location where we're going to install the toolchain during the build
+INSTALL_DIR=$WORK_DIR/$TOOLCHAIN_NAME
+
+# Location where we're going to install the final binaries
+# If empty, TOOLCHAIN_ARCHIVE will be generated
+PREFIX_DIR=
+
# Location of the final sysroot. This must be a sub-directory of INSTALL_DIR
# to ensure that the toolchain binaries are properly relocatable (i.e. can
@@ -116,11 +89,22 @@
SYSROOT_DIR=$INSTALL_DIR/sysroot
# Try to parallelize the build for faster performance.
-NUM_CPUS=`cat /proc/cpuinfo | grep processor | wc -l`
-MAKE_FLAGS="-j$NUM_CPUS"
+JOBS=`cat /proc/cpuinfo | grep processor | wc -l`
+
+# The base URL of the Ubuntu mirror we're going to use.
+UBUNTU_MIRROR=http://mirrors.us.kernel.org
+
+# Ubuntu release name we want packages from. Can be a name or a number
+# (i.e. "hardy" or "8.04")
+UBUNTU_RELEASE=hardy
+
# The list of packages we need to download from the Ubuntu servers and
# extract into the original sysroot
+#
+# Call add_ubuntu_package <package-name> to add a package to the list,
+# which will be processed later.
+#
UBUNTU_PACKAGES=
add_ubuntu_package ()
@@ -131,35 +115,52 @@
# The package files containing kernel headers for Hardy and the C
# library headers and binaries
add_ubuntu_package \
- http://mirrors.us.kernel.org/ubuntu//pool/main/l/linux/linux-libc-dev_2.6.24-28.81_i386.deb \
- http://security.ubuntu.com/ubuntu/pool/main/g/glibc/libc6_2.7-10ubuntu7_i386.deb \
- http://security.ubuntu.com/ubuntu/pool/main/g/glibc/libc6-dev_2.7-10ubuntu7_i386.deb
+ linux-libc-dev \
+ libc6 \
+ libc6-dev
# The X11 headers and binaries (for the emulator)
add_ubuntu_package \
- http://mirrors.us.kernel.org/ubuntu//pool/main/libx/libx11/libx11-6_1.1.3-1ubuntu2_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/libx/libx11/libx11-dev_1.1.3-1ubuntu2_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/x/x11proto-core/x11proto-core-dev_7.0.11-1_all.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/x/x11proto-xext/x11proto-xext-dev_7.0.2-5ubuntu1_all.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/x/x11proto-input/x11proto-input-dev_1.4.2-1_all.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/x/x11proto-kb/x11proto-kb-dev_1.0.3-2ubuntu1_all.deb
+ libx11-6 \
+ libx11-dev \
+ libxcb-xlib0 \
+ libxcb1 \
+ libxau6 \
+ libxdmcp6 \
+ x11proto-core-dev \
+ x11proto-xext-dev \
+ x11proto-input-dev \
+ x11proto-kb-dev
+
+# The OpenGL-related headers and libraries (for GLES emulation)
+add_ubuntu_package \
+ mesa-common-dev \
+ libgl1-mesa-dev \
+ libgl1-mesa-glx \
+ libxxf86vm1 \
+ libxext6 \
+ libxdamage1 \
+ libxfixes3 \
+ libdrm2
# Audio libraries (required by the emulator)
add_ubuntu_package \
- http://mirrors.us.kernel.org/ubuntu//pool/main/a/alsa-lib/libasound2_1.0.15-3ubuntu4_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/a/alsa-lib/libasound2-dev_1.0.15-3ubuntu4_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/e/esound/libesd-alsa0_0.2.38-0ubuntu9_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/e/esound/libesd0-dev_0.2.38-0ubuntu9_i386.deb \
- http://security.ubuntu.com/ubuntu/pool/main/a/audiofile/libaudiofile-dev_0.2.6-7ubuntu1.8.04.1_i386.deb \
- http://security.ubuntu.com/ubuntu/pool/main/p/pulseaudio/libpulse0_0.9.10-1ubuntu1.1_i386.deb \
- http://security.ubuntu.com/ubuntu/pool/main/p/pulseaudio/libpulse-dev_0.9.10-1ubuntu1.1_i386.deb
+ libasound2 \
+ libasound2-dev \
+ libesd-alsa0 \
+ libesd0-dev \
+ libaudiofile-dev \
+ libpulse0 \
+ libpulse-dev
# ZLib
add_ubuntu_package \
- http://mirrors.us.kernel.org/ubuntu//pool/main/z/zlib/zlib1g_1.2.3.3.dfsg-7ubuntu1_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/z/zlib/zlib1g-dev_1.2.3.3.dfsg-7ubuntu1_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/n/ncurses/libncurses5_5.6+20071124-1ubuntu2_i386.deb \
- http://mirrors.us.kernel.org/ubuntu//pool/main/n/ncurses/libncurses5-dev_5.6+20071124-1ubuntu2_i386.deb
+ zlib1g \
+ zlib1g-dev \
+ libncurses5 \
+ libncurses5-dev
+
+
###########################################################################
###########################################################################
@@ -169,6 +170,163 @@
###########################################################################
###########################################################################
+# Parse all options
+OPTION_HELP=no
+VERBOSE=no
+VERBOSE2=no
+NDK_ROOT=
+FORCE=no
+ONLY_SYSROOT=no
+
+PARAMETERS=
+
+for opt do
+ optarg=`expr "x$opt" : 'x[^=]*=\(.*\)'`
+ case "$opt" in
+ --help|-h|-\?) OPTION_HELP=yes
+ ;;
+ --verbose)
+ if [ "$VERBOSE" = "yes" ] ; then
+ VERBOSE2=yes
+ else
+ VERBOSE=yes
+ fi
+ ;;
+ --force) FORCE="yes"
+ ;;
+ --ubuntu-mirror=*) UBUNTU_MIRROR="$optarg"
+ ;;
+ --ubuntu-release=*) UBUNTU_RELEASE="$optarg"
+ ;;
+ --prefix=*) PREFIX_DIR="$optarg"
+ ;;
+ --work-dir=*) WORK_DIR="$optarg"
+ ;;
+ --gcc-version=*) GCC_VERSION="$optarg"
+ ;;
+ --binutils-version=*) BINUTILS_VERSION="$optarg"
+ ;;
+ --gmp-version=*) GMP_VERSION="$optarg"
+ ;;
+ --mpfr-version=*) MPFR_VERSION="$optarg"
+ ;;
+ --ndk-dir=*) NDK_ROOT="$optarg"
+ ;;
+ --out-dir=*) OPTION_OUT_DIR="$optarg"
+ ;;
+ --cc=*) OPTION_CC="$optarg"
+ ;;
+ --jobs=*) JOBS="$optarg"
+ ;;
+ -j*) JOBS=`expr "x$opt" : 'x-j\(.*\)'`
+ ;;
+ --only-sysroot) ONLY_SYSROOT=yes
+ ;;
+ -*)
+ echo "unknown option '$opt', use --help"
+ exit 1
+ ;;
+ *)
+ if [ -z "$PARAMETERS" ]; then
+ PARAMETERS="$opt"
+ else
+ PARAMETERS="$PARAMETERS $opt"
+ fi
+ esac
+done
+
+if [ "$OPTION_HELP" = "yes" ]; then
+ cat << EOF
+
+Usage: $PROGNAME [options] <path-to-toolchain-sources>
+
+This script is used to rebuild a 32-bit Linux host toolchain that targets
+GLibc 2.7 or higher. The machine code generated by this toolchain will run
+properly on Ubuntu 8.04 or higher.
+
+You need to a patch corresponding to the patched toolchain sources that
+are downloaded from android.git.toolchain.org/toolchain/. One way to do that
+is to use the NDK's dedicated script to do it, e.g.:
+
+ \$NDK/build/tools/download-toolchain-sources.sh /tmp/toolchain-src
+
+Then invoke this script as:
+
+ $PROGNAME /tmp/toolchain-src
+
+Alternatively, you can use --ndk-dir=<path> to specify the location of
+your NDK directory, and this script will directly download the toolchain
+sources for you.
+
+Note that this script will download various binary packages from Ubuntu
+servers in order to prepare a compatible 32-bit "sysroot".
+
+By default, it generates a package archive ($TOOLCHAIN_ARCHIVE) but you can,
+as an alternative, ask for direct installation with --prefix=<path>
+
+Options: [defaults in brackets after descriptions]
+EOF
+ echo "Standard options:"
+ echo " --help Print this message"
+ echo " --force Force-rebuild everything"
+ echo " --prefix=PATH Installation path [$PREFIX_DIR]"
+ echo " --ubuntu-mirror=URL Ubuntu mirror URL [$UBUNTU_MIRROR]"
+ echo " --ubuntu-release=NAME Ubuntu release name [$UBUNTU_RELEASE]"
+ echo " --work-dir=PATH Temporary work directory [$WORK_DIR]"
+ echo " --only-sysroot Only dowload and build sysroot packages"
+ echo " --verbose Verbose output. Can be used twice."
+ echo " --binutils-version=VERSION Binutils version number [$BINUTILS_VERSION]"
+ echo " --gcc-version=VERSION GCC version number [$GCC_VERSION]."
+ echo " --gmp-version=VERSION GMP version number [$GMP_VERSION]."
+ echo " --mpfr-version=VERSION MPFR version numner [$MPFR_VERSION]."
+ echo " --ndk-dir=PATH Path to NDK (used to download toolchain sources)."
+ echo " --jobs=COUNT Run COUNT build jobs in parallel [$JOBS]"
+ echo " -j<COUNT> Same as --jobs=COUNT."
+ echo ""
+ exit 1
+fi
+
+if [ -z "$PARAMETERS" ] ; then
+ if [ -z "$NDK_ROOT" ]; then
+ echo "ERROR: Please provide the path to the toolchain sources, or use"
+ echo "the --ndk-dir=<path> option to point to an NDK root directory."
+ exit 1
+ fi
+ NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH="$NDK_ROOT/build/tools/download-toolchain-sources.sh"
+ if [ ! -f "$NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH" ]; then
+ echo "ERROR: Path does not point to valid NDK root: $NDK_ROOT"
+ exit 1
+ fi
+else
+ if [ -n "$NDK_ROOT" ]; then
+ echo "ERROR: You can't use both --ndk-dir=<path> and provide a toolchain sources path."
+ exit 1
+ fi
+ set_parameters () {
+ TOOLCHAIN_SRC_DIR="$1"
+ if [ ! -d "$TOOLCHAIN_SRC_DIR" ]; then
+ echo "ERROR: Not a directory: $1"
+ exit 1
+ fi
+ if [ ! -d "$TOOLCHAIN_SRC_DIR/build" ]; then
+ echo "ERROR: Missing directory: $1/build"
+ exit 1
+ fi
+ }
+
+ set_parameters $PARAMETERS
+fi
+
+# Determine Make flags
+MAKE_FLAGS="-j$JOBS"
+
+# Create the work directory
+mkdir -p $WORK_DIR
+
+# Location where we download packages from the Ubuntu servers
+DOWNLOAD_DIR=$WORK_DIR/download
+
+
panic ()
{
echo "ERROR: $@"
@@ -183,21 +341,39 @@
fi
}
-if [ "$V" != 0 ] ; then
+if [ "$VERBOSE" = "yes" ] ; then
run () {
echo "## COMMAND: $@"
$@
}
+ log () {
+ echo "$@"
+ }
+ if [ "$VERBOSE2" = "yes" ] ; then
+ log2 () {
+ echo "$@"
+ }
+ else
+ log2 () {
+ return
+ }
+ fi
else
run () {
$@ >>$TMPLOG 2>&1
}
+ log () {
+ return
+ }
+ log2 () {
+ return
+ }
fi
OLD_PATH="$PATH"
OLD_LD_LIBRARY_PATH="$LD_LIBRARY_PATH"
-BUILD_DIR=$ROOT_DIR/build
+BUILD_DIR=$WORK_DIR/build
mkdir -p $BUILD_DIR
TMPLOG=$BUILD_DIR/build.log
@@ -211,7 +387,12 @@
TIMESTAMPS_DIR=$BUILD_DIR/timestamps
mkdir -p $TIMESTAMPS_DIR
-if [ "$V" = 0 ] ; then
+if [ "$FORCE" = "yes" ] ; then
+ echo "Cleaning up timestamps (forcing the build)."
+ rm -f $TIMESTAMPS_DIR/*
+fi
+
+if [ "$VERBOSE" = "no" ] ; then
echo "To follow build, run: tail -F $TMPLOG"
fi
@@ -265,7 +446,7 @@
find_program CMD_WGET wget
find_program CMD_CURL curl
-find_program CMD_SCRP scp
+find_program CMD_SCP scp
# Download a file with either 'curl', 'wget' or 'scp'
#
@@ -373,6 +554,75 @@
esac
}
+no_trailing_slash ()
+{
+ echo "$1" | sed -e 's!/$!!g'
+}
+
+# Load the Ubuntu packages file. This is a long text file that will list
+# each package for a given release.
+#
+# $1: Ubuntu mirror base URL (e.g. http://mirrors.us.kernel.org/)
+# $2: Release name
+#
+get_ubuntu_packages_list ()
+{
+ local RELEASE=$2
+ local BASE="`no_trailing_slash \"$1\"`"
+ local SRCFILE="$BASE/ubuntu/dists/$RELEASE/main/binary-i386/Packages.bz2"
+ local DSTFILE="$DOWNLOAD_DIR/Packages.bz2"
+ log "Trying to load $SRCFILE"
+ download_file "$SRCFILE" "$DSTFILE"
+ fail_panic "Could not download $SRCFILE"
+ (cd $DOWNLOAD_DIR && bunzip2 -f Packages.bz2)
+ fail_panic "Could not uncompress $DSTFILE"
+
+ # Write a small awk script used to extract filenames for a given package
+ cat > $DOWNLOAD_DIR/extract-filename.awk <<EOF
+BEGIN {
+ # escape special characters in package name
+ gsub("\\\\.","\\\\.",PKG)
+ gsub("\\\\+","\\\\+",PKG)
+ FILE = ""
+ PACKAGE = ""
+}
+
+\$1 == "Package:" {
+ if (\$2 == PKG) {
+ PACKAGE = \$2
+ } else {
+ PACKAGE = ""
+ }
+}
+
+\$1 == "Filename:" && PACKAGE == PKG {
+ FILE = \$2
+}
+
+END {
+ print FILE
+}
+EOF
+}
+
+# Convert an unversioned package name into a .deb package URL
+#
+# $1: Package name without version information (e.g. libc6-dev)
+# $2: Ubuntu mirror base URL
+#
+get_ubuntu_package_deb_url ()
+{
+ # The following is an awk command to parse the Packages file and extract
+ # the filename of a given package.
+ local BASE="`no_trailing_slash \"$1\"`"
+ local FILE=`awk -f "$DOWNLOAD_DIR/extract-filename.awk" -v PKG=$1 $DOWNLOAD_DIR/Packages`
+ if [ -z "$FILE" ]; then
+ log "Could not find filename for package $1"
+ exit 1
+ fi
+ echo "$2/ubuntu/$FILE"
+}
+
# Does the host compiler generate 32-bit machine code?
# If not, add the -m32 flag to the compiler name to ensure this.
#
@@ -666,15 +916,25 @@
$NDK_DOWNLOAD_TOOLCHAIN_SOURCES_SH $TOOLCHAIN_SRC_DIR
}
+task_define download_ubuntu_packages_list "Download Ubuntu packages list"
+cmd_download_ubuntu_packages_list ()
+{
+ mkdir -p $DOWNLOAD_DIR
+ get_ubuntu_packages_list "$UBUNTU_MIRROR" "$UBUNTU_RELEASE"
+}
+
task_define download_packages "Download Ubuntu packages"
+task_depends download_packages download_ubuntu_packages_list
cmd_download_packages ()
{
local PACKAGE
- mkdir -p $DOWNLOAD_DIR &&
for PACKAGE in $UBUNTU_PACKAGES; do
echo "Downloading $PACKAGE"
- download_file_to $PACKAGE $DOWNLOAD_DIR
+ local PKGURL=`get_ubuntu_package_deb_url $PACKAGE $UBUNTU_MIRROR`
+ echo "URL: $PKGURL"
+ download_file_to $PKGURL $DOWNLOAD_DIR
+ fail_panic "Could not download $PACKAGE"
done
}
@@ -685,7 +945,8 @@
{
local PACKAGE
for PACKAGE in $UBUNTU_PACKAGES; do
- local SRC_PKG=$DOWNLOAD_DIR/`basename $PACKAGE`
+ local PKGURL=`get_ubuntu_package_deb_url $PACKAGE $UBUNTU_MIRROR`
+ local SRC_PKG=$DOWNLOAD_DIR/`basename $PKGURL`
echo "Extracting $SRC_PKG"
dpkg -x $SRC_PKG $ORG_SYSROOT_DIR/
done
@@ -717,20 +978,43 @@
for SL in $SYMLINKS; do
# convert /lib/libfoo.so.<n> into 'libfoo.so.<n>' for the target
local DST=`echo $SL | sed -e 's!^/lib/!!g'`
- # convery libfoo.so.<n> into libfoo.so for the source
+ # convert libfoo.so.<n> into libfoo.so for the source
local SRC=`echo $DST | sed -e 's!\.[0-9]*$!!g'`
echo "Fixing symlink $SRC --> $DST"
ln -sf $DST $SRC
done
+ # Also deal with a few direct symlinks that don't use the /lib/ prefix
+ # we simply copy them. Useful for libGL.so -> libGL.so.1 for example.
+ SYMLINKS=`ls -l $SYSROOT_DIR/usr/lib | grep -v /lib/ | awk '{ print $11; }'`
+ cd $SYSROOT_DIR/usr/lib
+ for SL in $SYMLINKS; do
+ # convert /lib/libfoo.so.<n> into 'libfoo.so.<n>' for the target
+ local DST=`echo $SL`
+ # convert libfoo.so.<n> into libfoo.so for the source
+ local SRC=`echo $DST | sed -e 's!\.[0-9]*$!!g'`
+ if [ "$DST" != "$SRC" ]; then
+ echo "Copying symlink $SRC --> $DST"
+ ln -sf $DST $SRC
+ fi
+ done
+
patch_library $SYSROOT_DIR/usr/lib/libc.so
patch_library $SYSROOT_DIR/usr/lib/libpthread.so
}
+task_define prepare_toolchain_sources "Prepare toolchain sources."
+if [ -n "$NDK_ROOT" ]; then
+ task_depends prepare_toolchain_sources download_toolchain_sources
+fi
+cmd_prepare_toolchain_sources ()
+{
+ return
+}
task_define configure_binutils "Configure binutils-$BINUTILS_VERSION"
-task_depends configure_binutils download_toolchain_sources copy_sysroot
+task_depends configure_binutils prepare_toolchain_sources copy_sysroot
cmd_configure_binutils ()
{
OUT_DIR=$BUILD_BINUTILS_DIR
@@ -759,7 +1043,7 @@
}
task_define extract_gmp "Extract sources for gmp-$GMP_VERSION"
-task_depends extract_gmp download_toolchain_sources
+task_depends extract_gmp prepare_toolchain_sources
cmd_extract_gmp ()
{
OUT_DIR=$BUILD_GMP_DIR
@@ -795,7 +1079,7 @@
# Third, build mpfr
task_define extract_mpfr "Extract sources from mpfr-$MPFR_VERSION"
-task_depends extract_mpfr download_toolchain_sources
+task_depends extract_mpfr prepare_toolchain_sources
cmd_extract_mpfr ()
{
OUT_DIR=$BUILD_MPFR_DIR
@@ -835,7 +1119,7 @@
# Fourth, the compiler itself
task_define configure_gcc "Configure gcc-$GCC_VERSION"
-task_depends configure_gcc download_toolchain_sources install_binutils install_gmp install_mpfr
+task_depends configure_gcc prepare_toolchain_sources install_binutils install_gmp install_mpfr
cmd_configure_gcc ()
{
OUT_DIR=$BUILD_GCC_DIR
@@ -898,7 +1182,20 @@
pack_archive $TOOLCHAIN_ARCHIVE "`dirname $INSTALL_DIR`" "`basename $INSTALL_DIR`"
}
-#do_task package_toolchain
-do_task package_toolchain
+task_define install_toolchain "Install final toolchain"
+task_depends install_toolchain cleanup_toolchain
+cmd_install_toolchain ()
+{
+ copy_directory "$INSTALL_DIR" "$PREFIX_DIR/$TOOLCHAIN_NAME"
+}
-echo "Done, see $TOOLCHAIN_ARCHIVE"
+if [ "$ONLY_SYSROOT" = "yes" ]; then
+ do_task copy_sysroot
+ echo "Done, see sysroot files in $SYSROOT_DIR"
+elif [ -n "$PREFIX_DIR" ]; then
+ do_task install_toolchain
+ echo "Done, see $PREFIX_DIR/$TOOLCHAIN_NAME"
+else
+ do_task package_toolchain
+ echo "Done, see $TOOLCHAIN_ARCHIVE"
+fi
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl.h
new file mode 100644
index 0000000..ce5e90e
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl.h
@@ -0,0 +1,2252 @@
+/*
+ * Mesa 3-D graphics library
+ * Version: 7.0
+ *
+ * Copyright (C) 1999-2007 Brian Paul All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#ifndef __gl_h_
+#define __gl_h_
+
+#if defined(USE_MGL_NAMESPACE)
+#include "gl_mangle.h"
+#endif
+
+
+/**********************************************************************
+ * Begin system-specific stuff. Do not do any of this when building
+ * for SciTech SNAP, as this is all done before this header file is
+ * included.
+ */
+#if !defined(__SCITECH_SNAP__)
+
+#if defined(__BEOS__)
+#include <stdlib.h> /* to get some BeOS-isms */
+#endif
+
+#if !defined(OPENSTEP) && (defined(NeXT) || defined(NeXT_PDO))
+#define OPENSTEP
+#endif
+
+#if defined(_WIN32) && !defined(__WIN32__) && !defined(__CYGWIN__)
+#define __WIN32__
+#endif
+
+#if !defined(OPENSTEP) && (defined(__WIN32__) && !defined(__CYGWIN__))
+# if (defined(_MSC_VER) || defined(__MINGW32__)) && defined(BUILD_GL32) /* tag specify we're building mesa as a DLL */
+# define GLAPI __declspec(dllexport)
+# elif (defined(_MSC_VER) || defined(__MINGW32__)) && defined(_DLL) /* tag specifying we're building for DLL runtime support */
+# define GLAPI __declspec(dllimport)
+# else /* for use with static link lib build of Win32 edition only */
+# define GLAPI extern
+# endif /* _STATIC_MESA support */
+# define GLAPIENTRY __stdcall
+#elif defined(__CYGWIN__) && defined(USE_OPENGL32) /* use native windows opengl32 */
+# define GLAPI extern
+# define GLAPIENTRY __stdcall
+#elif defined(__GNUC__) && (__GNUC__ * 100 + __GNUC_MINOR__) >= 303
+# define GLAPI __attribute__((visibility("default")))
+# define GLAPIENTRY
+#endif /* WIN32 && !CYGWIN */
+
+#if (defined(__BEOS__) && defined(__POWERPC__)) || defined(__QUICKDRAW__)
+# define PRAGMA_EXPORT_SUPPORTED 1
+#endif
+
+/*
+ * WINDOWS: Include windows.h here to define APIENTRY.
+ * It is also useful when applications include this file by
+ * including only glut.h, since glut.h depends on windows.h.
+ * Applications needing to include windows.h with parms other
+ * than "WIN32_LEAN_AND_MEAN" may include windows.h before
+ * glut.h or gl.h.
+ */
+#if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__)
+#define WIN32_LEAN_AND_MEAN 1
+#include <windows.h>
+#endif
+
+#if defined(_WIN32) && !defined(_WINGDI_) && !defined(_GNU_H_WINDOWS32_DEFINES) \
+ && !defined(OPENSTEP) && !defined(__CYGWIN__) || defined(__MINGW32__)
+#include <GL/mesa_wgl.h>
+#endif
+
+#if defined(macintosh) && PRAGMA_IMPORT_SUPPORTED
+#pragma import on
+#endif
+
+#ifndef GLAPI
+#define GLAPI extern
+#endif
+
+#ifndef GLAPIENTRY
+#define GLAPIENTRY
+#endif
+
+#ifndef APIENTRY
+#define APIENTRY GLAPIENTRY
+#endif
+
+/* "P" suffix to be used for a pointer to a function */
+#ifndef APIENTRYP
+#define APIENTRYP APIENTRY *
+#endif
+
+#ifndef GLAPIENTRYP
+#define GLAPIENTRYP GLAPIENTRY *
+#endif
+
+#ifdef CENTERLINE_CLPP
+#define signed
+#endif
+
+#if defined(PRAGMA_EXPORT_SUPPORTED)
+#pragma export on
+#endif
+
+#endif /* !__SCITECH_SNAP__ */
+/*
+ * End system-specific stuff.
+ **********************************************************************/
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+#define GL_VERSION_1_1 1
+#define GL_VERSION_1_2 1
+#define GL_VERSION_1_3 1
+#define GL_ARB_imaging 1
+
+
+/*
+ * Datatypes
+ */
+typedef unsigned int GLenum;
+typedef unsigned char GLboolean;
+typedef unsigned int GLbitfield;
+typedef void GLvoid;
+typedef signed char GLbyte; /* 1-byte signed */
+typedef short GLshort; /* 2-byte signed */
+typedef int GLint; /* 4-byte signed */
+typedef unsigned char GLubyte; /* 1-byte unsigned */
+typedef unsigned short GLushort; /* 2-byte unsigned */
+typedef unsigned int GLuint; /* 4-byte unsigned */
+typedef int GLsizei; /* 4-byte signed */
+typedef float GLfloat; /* single precision float */
+typedef float GLclampf; /* single precision float in [0,1] */
+typedef double GLdouble; /* double precision float */
+typedef double GLclampd; /* double precision float in [0,1] */
+
+
+
+/*
+ * Constants
+ */
+
+/* Boolean values */
+#define GL_FALSE 0x0
+#define GL_TRUE 0x1
+
+/* Data types */
+#define GL_BYTE 0x1400
+#define GL_UNSIGNED_BYTE 0x1401
+#define GL_SHORT 0x1402
+#define GL_UNSIGNED_SHORT 0x1403
+#define GL_INT 0x1404
+#define GL_UNSIGNED_INT 0x1405
+#define GL_FLOAT 0x1406
+#define GL_2_BYTES 0x1407
+#define GL_3_BYTES 0x1408
+#define GL_4_BYTES 0x1409
+#define GL_DOUBLE 0x140A
+
+/* Primitives */
+#define GL_POINTS 0x0000
+#define GL_LINES 0x0001
+#define GL_LINE_LOOP 0x0002
+#define GL_LINE_STRIP 0x0003
+#define GL_TRIANGLES 0x0004
+#define GL_TRIANGLE_STRIP 0x0005
+#define GL_TRIANGLE_FAN 0x0006
+#define GL_QUADS 0x0007
+#define GL_QUAD_STRIP 0x0008
+#define GL_POLYGON 0x0009
+
+/* Vertex Arrays */
+#define GL_VERTEX_ARRAY 0x8074
+#define GL_NORMAL_ARRAY 0x8075
+#define GL_COLOR_ARRAY 0x8076
+#define GL_INDEX_ARRAY 0x8077
+#define GL_TEXTURE_COORD_ARRAY 0x8078
+#define GL_EDGE_FLAG_ARRAY 0x8079
+#define GL_VERTEX_ARRAY_SIZE 0x807A
+#define GL_VERTEX_ARRAY_TYPE 0x807B
+#define GL_VERTEX_ARRAY_STRIDE 0x807C
+#define GL_NORMAL_ARRAY_TYPE 0x807E
+#define GL_NORMAL_ARRAY_STRIDE 0x807F
+#define GL_COLOR_ARRAY_SIZE 0x8081
+#define GL_COLOR_ARRAY_TYPE 0x8082
+#define GL_COLOR_ARRAY_STRIDE 0x8083
+#define GL_INDEX_ARRAY_TYPE 0x8085
+#define GL_INDEX_ARRAY_STRIDE 0x8086
+#define GL_TEXTURE_COORD_ARRAY_SIZE 0x8088
+#define GL_TEXTURE_COORD_ARRAY_TYPE 0x8089
+#define GL_TEXTURE_COORD_ARRAY_STRIDE 0x808A
+#define GL_EDGE_FLAG_ARRAY_STRIDE 0x808C
+#define GL_VERTEX_ARRAY_POINTER 0x808E
+#define GL_NORMAL_ARRAY_POINTER 0x808F
+#define GL_COLOR_ARRAY_POINTER 0x8090
+#define GL_INDEX_ARRAY_POINTER 0x8091
+#define GL_TEXTURE_COORD_ARRAY_POINTER 0x8092
+#define GL_EDGE_FLAG_ARRAY_POINTER 0x8093
+#define GL_V2F 0x2A20
+#define GL_V3F 0x2A21
+#define GL_C4UB_V2F 0x2A22
+#define GL_C4UB_V3F 0x2A23
+#define GL_C3F_V3F 0x2A24
+#define GL_N3F_V3F 0x2A25
+#define GL_C4F_N3F_V3F 0x2A26
+#define GL_T2F_V3F 0x2A27
+#define GL_T4F_V4F 0x2A28
+#define GL_T2F_C4UB_V3F 0x2A29
+#define GL_T2F_C3F_V3F 0x2A2A
+#define GL_T2F_N3F_V3F 0x2A2B
+#define GL_T2F_C4F_N3F_V3F 0x2A2C
+#define GL_T4F_C4F_N3F_V4F 0x2A2D
+
+/* Matrix Mode */
+#define GL_MATRIX_MODE 0x0BA0
+#define GL_MODELVIEW 0x1700
+#define GL_PROJECTION 0x1701
+#define GL_TEXTURE 0x1702
+
+/* Points */
+#define GL_POINT_SMOOTH 0x0B10
+#define GL_POINT_SIZE 0x0B11
+#define GL_POINT_SIZE_GRANULARITY 0x0B13
+#define GL_POINT_SIZE_RANGE 0x0B12
+
+/* Lines */
+#define GL_LINE_SMOOTH 0x0B20
+#define GL_LINE_STIPPLE 0x0B24
+#define GL_LINE_STIPPLE_PATTERN 0x0B25
+#define GL_LINE_STIPPLE_REPEAT 0x0B26
+#define GL_LINE_WIDTH 0x0B21
+#define GL_LINE_WIDTH_GRANULARITY 0x0B23
+#define GL_LINE_WIDTH_RANGE 0x0B22
+
+/* Polygons */
+#define GL_POINT 0x1B00
+#define GL_LINE 0x1B01
+#define GL_FILL 0x1B02
+#define GL_CW 0x0900
+#define GL_CCW 0x0901
+#define GL_FRONT 0x0404
+#define GL_BACK 0x0405
+#define GL_POLYGON_MODE 0x0B40
+#define GL_POLYGON_SMOOTH 0x0B41
+#define GL_POLYGON_STIPPLE 0x0B42
+#define GL_EDGE_FLAG 0x0B43
+#define GL_CULL_FACE 0x0B44
+#define GL_CULL_FACE_MODE 0x0B45
+#define GL_FRONT_FACE 0x0B46
+#define GL_POLYGON_OFFSET_FACTOR 0x8038
+#define GL_POLYGON_OFFSET_UNITS 0x2A00
+#define GL_POLYGON_OFFSET_POINT 0x2A01
+#define GL_POLYGON_OFFSET_LINE 0x2A02
+#define GL_POLYGON_OFFSET_FILL 0x8037
+
+/* Display Lists */
+#define GL_COMPILE 0x1300
+#define GL_COMPILE_AND_EXECUTE 0x1301
+#define GL_LIST_BASE 0x0B32
+#define GL_LIST_INDEX 0x0B33
+#define GL_LIST_MODE 0x0B30
+
+/* Depth buffer */
+#define GL_NEVER 0x0200
+#define GL_LESS 0x0201
+#define GL_EQUAL 0x0202
+#define GL_LEQUAL 0x0203
+#define GL_GREATER 0x0204
+#define GL_NOTEQUAL 0x0205
+#define GL_GEQUAL 0x0206
+#define GL_ALWAYS 0x0207
+#define GL_DEPTH_TEST 0x0B71
+#define GL_DEPTH_BITS 0x0D56
+#define GL_DEPTH_CLEAR_VALUE 0x0B73
+#define GL_DEPTH_FUNC 0x0B74
+#define GL_DEPTH_RANGE 0x0B70
+#define GL_DEPTH_WRITEMASK 0x0B72
+#define GL_DEPTH_COMPONENT 0x1902
+
+/* Lighting */
+#define GL_LIGHTING 0x0B50
+#define GL_LIGHT0 0x4000
+#define GL_LIGHT1 0x4001
+#define GL_LIGHT2 0x4002
+#define GL_LIGHT3 0x4003
+#define GL_LIGHT4 0x4004
+#define GL_LIGHT5 0x4005
+#define GL_LIGHT6 0x4006
+#define GL_LIGHT7 0x4007
+#define GL_SPOT_EXPONENT 0x1205
+#define GL_SPOT_CUTOFF 0x1206
+#define GL_CONSTANT_ATTENUATION 0x1207
+#define GL_LINEAR_ATTENUATION 0x1208
+#define GL_QUADRATIC_ATTENUATION 0x1209
+#define GL_AMBIENT 0x1200
+#define GL_DIFFUSE 0x1201
+#define GL_SPECULAR 0x1202
+#define GL_SHININESS 0x1601
+#define GL_EMISSION 0x1600
+#define GL_POSITION 0x1203
+#define GL_SPOT_DIRECTION 0x1204
+#define GL_AMBIENT_AND_DIFFUSE 0x1602
+#define GL_COLOR_INDEXES 0x1603
+#define GL_LIGHT_MODEL_TWO_SIDE 0x0B52
+#define GL_LIGHT_MODEL_LOCAL_VIEWER 0x0B51
+#define GL_LIGHT_MODEL_AMBIENT 0x0B53
+#define GL_FRONT_AND_BACK 0x0408
+#define GL_SHADE_MODEL 0x0B54
+#define GL_FLAT 0x1D00
+#define GL_SMOOTH 0x1D01
+#define GL_COLOR_MATERIAL 0x0B57
+#define GL_COLOR_MATERIAL_FACE 0x0B55
+#define GL_COLOR_MATERIAL_PARAMETER 0x0B56
+#define GL_NORMALIZE 0x0BA1
+
+/* User clipping planes */
+#define GL_CLIP_PLANE0 0x3000
+#define GL_CLIP_PLANE1 0x3001
+#define GL_CLIP_PLANE2 0x3002
+#define GL_CLIP_PLANE3 0x3003
+#define GL_CLIP_PLANE4 0x3004
+#define GL_CLIP_PLANE5 0x3005
+
+/* Accumulation buffer */
+#define GL_ACCUM_RED_BITS 0x0D58
+#define GL_ACCUM_GREEN_BITS 0x0D59
+#define GL_ACCUM_BLUE_BITS 0x0D5A
+#define GL_ACCUM_ALPHA_BITS 0x0D5B
+#define GL_ACCUM_CLEAR_VALUE 0x0B80
+#define GL_ACCUM 0x0100
+#define GL_ADD 0x0104
+#define GL_LOAD 0x0101
+#define GL_MULT 0x0103
+#define GL_RETURN 0x0102
+
+/* Alpha testing */
+#define GL_ALPHA_TEST 0x0BC0
+#define GL_ALPHA_TEST_REF 0x0BC2
+#define GL_ALPHA_TEST_FUNC 0x0BC1
+
+/* Blending */
+#define GL_BLEND 0x0BE2
+#define GL_BLEND_SRC 0x0BE1
+#define GL_BLEND_DST 0x0BE0
+#define GL_ZERO 0x0
+#define GL_ONE 0x1
+#define GL_SRC_COLOR 0x0300
+#define GL_ONE_MINUS_SRC_COLOR 0x0301
+#define GL_SRC_ALPHA 0x0302
+#define GL_ONE_MINUS_SRC_ALPHA 0x0303
+#define GL_DST_ALPHA 0x0304
+#define GL_ONE_MINUS_DST_ALPHA 0x0305
+#define GL_DST_COLOR 0x0306
+#define GL_ONE_MINUS_DST_COLOR 0x0307
+#define GL_SRC_ALPHA_SATURATE 0x0308
+
+/* Render Mode */
+#define GL_FEEDBACK 0x1C01
+#define GL_RENDER 0x1C00
+#define GL_SELECT 0x1C02
+
+/* Feedback */
+#define GL_2D 0x0600
+#define GL_3D 0x0601
+#define GL_3D_COLOR 0x0602
+#define GL_3D_COLOR_TEXTURE 0x0603
+#define GL_4D_COLOR_TEXTURE 0x0604
+#define GL_POINT_TOKEN 0x0701
+#define GL_LINE_TOKEN 0x0702
+#define GL_LINE_RESET_TOKEN 0x0707
+#define GL_POLYGON_TOKEN 0x0703
+#define GL_BITMAP_TOKEN 0x0704
+#define GL_DRAW_PIXEL_TOKEN 0x0705
+#define GL_COPY_PIXEL_TOKEN 0x0706
+#define GL_PASS_THROUGH_TOKEN 0x0700
+#define GL_FEEDBACK_BUFFER_POINTER 0x0DF0
+#define GL_FEEDBACK_BUFFER_SIZE 0x0DF1
+#define GL_FEEDBACK_BUFFER_TYPE 0x0DF2
+
+/* Selection */
+#define GL_SELECTION_BUFFER_POINTER 0x0DF3
+#define GL_SELECTION_BUFFER_SIZE 0x0DF4
+
+/* Fog */
+#define GL_FOG 0x0B60
+#define GL_FOG_MODE 0x0B65
+#define GL_FOG_DENSITY 0x0B62
+#define GL_FOG_COLOR 0x0B66
+#define GL_FOG_INDEX 0x0B61
+#define GL_FOG_START 0x0B63
+#define GL_FOG_END 0x0B64
+#define GL_LINEAR 0x2601
+#define GL_EXP 0x0800
+#define GL_EXP2 0x0801
+
+/* Logic Ops */
+#define GL_LOGIC_OP 0x0BF1
+#define GL_INDEX_LOGIC_OP 0x0BF1
+#define GL_COLOR_LOGIC_OP 0x0BF2
+#define GL_LOGIC_OP_MODE 0x0BF0
+#define GL_CLEAR 0x1500
+#define GL_SET 0x150F
+#define GL_COPY 0x1503
+#define GL_COPY_INVERTED 0x150C
+#define GL_NOOP 0x1505
+#define GL_INVERT 0x150A
+#define GL_AND 0x1501
+#define GL_NAND 0x150E
+#define GL_OR 0x1507
+#define GL_NOR 0x1508
+#define GL_XOR 0x1506
+#define GL_EQUIV 0x1509
+#define GL_AND_REVERSE 0x1502
+#define GL_AND_INVERTED 0x1504
+#define GL_OR_REVERSE 0x150B
+#define GL_OR_INVERTED 0x150D
+
+/* Stencil */
+#define GL_STENCIL_BITS 0x0D57
+#define GL_STENCIL_TEST 0x0B90
+#define GL_STENCIL_CLEAR_VALUE 0x0B91
+#define GL_STENCIL_FUNC 0x0B92
+#define GL_STENCIL_VALUE_MASK 0x0B93
+#define GL_STENCIL_FAIL 0x0B94
+#define GL_STENCIL_PASS_DEPTH_FAIL 0x0B95
+#define GL_STENCIL_PASS_DEPTH_PASS 0x0B96
+#define GL_STENCIL_REF 0x0B97
+#define GL_STENCIL_WRITEMASK 0x0B98
+#define GL_STENCIL_INDEX 0x1901
+#define GL_KEEP 0x1E00
+#define GL_REPLACE 0x1E01
+#define GL_INCR 0x1E02
+#define GL_DECR 0x1E03
+
+/* Buffers, Pixel Drawing/Reading */
+#define GL_NONE 0x0
+#define GL_LEFT 0x0406
+#define GL_RIGHT 0x0407
+/*GL_FRONT 0x0404 */
+/*GL_BACK 0x0405 */
+/*GL_FRONT_AND_BACK 0x0408 */
+#define GL_FRONT_LEFT 0x0400
+#define GL_FRONT_RIGHT 0x0401
+#define GL_BACK_LEFT 0x0402
+#define GL_BACK_RIGHT 0x0403
+#define GL_AUX0 0x0409
+#define GL_AUX1 0x040A
+#define GL_AUX2 0x040B
+#define GL_AUX3 0x040C
+#define GL_COLOR_INDEX 0x1900
+#define GL_RED 0x1903
+#define GL_GREEN 0x1904
+#define GL_BLUE 0x1905
+#define GL_ALPHA 0x1906
+#define GL_LUMINANCE 0x1909
+#define GL_LUMINANCE_ALPHA 0x190A
+#define GL_ALPHA_BITS 0x0D55
+#define GL_RED_BITS 0x0D52
+#define GL_GREEN_BITS 0x0D53
+#define GL_BLUE_BITS 0x0D54
+#define GL_INDEX_BITS 0x0D51
+#define GL_SUBPIXEL_BITS 0x0D50
+#define GL_AUX_BUFFERS 0x0C00
+#define GL_READ_BUFFER 0x0C02
+#define GL_DRAW_BUFFER 0x0C01
+#define GL_DOUBLEBUFFER 0x0C32
+#define GL_STEREO 0x0C33
+#define GL_BITMAP 0x1A00
+#define GL_COLOR 0x1800
+#define GL_DEPTH 0x1801
+#define GL_STENCIL 0x1802
+#define GL_DITHER 0x0BD0
+#define GL_RGB 0x1907
+#define GL_RGBA 0x1908
+
+/* Implementation limits */
+#define GL_MAX_LIST_NESTING 0x0B31
+#define GL_MAX_EVAL_ORDER 0x0D30
+#define GL_MAX_LIGHTS 0x0D31
+#define GL_MAX_CLIP_PLANES 0x0D32
+#define GL_MAX_TEXTURE_SIZE 0x0D33
+#define GL_MAX_PIXEL_MAP_TABLE 0x0D34
+#define GL_MAX_ATTRIB_STACK_DEPTH 0x0D35
+#define GL_MAX_MODELVIEW_STACK_DEPTH 0x0D36
+#define GL_MAX_NAME_STACK_DEPTH 0x0D37
+#define GL_MAX_PROJECTION_STACK_DEPTH 0x0D38
+#define GL_MAX_TEXTURE_STACK_DEPTH 0x0D39
+#define GL_MAX_VIEWPORT_DIMS 0x0D3A
+#define GL_MAX_CLIENT_ATTRIB_STACK_DEPTH 0x0D3B
+
+/* Gets */
+#define GL_ATTRIB_STACK_DEPTH 0x0BB0
+#define GL_CLIENT_ATTRIB_STACK_DEPTH 0x0BB1
+#define GL_COLOR_CLEAR_VALUE 0x0C22
+#define GL_COLOR_WRITEMASK 0x0C23
+#define GL_CURRENT_INDEX 0x0B01
+#define GL_CURRENT_COLOR 0x0B00
+#define GL_CURRENT_NORMAL 0x0B02
+#define GL_CURRENT_RASTER_COLOR 0x0B04
+#define GL_CURRENT_RASTER_DISTANCE 0x0B09
+#define GL_CURRENT_RASTER_INDEX 0x0B05
+#define GL_CURRENT_RASTER_POSITION 0x0B07
+#define GL_CURRENT_RASTER_TEXTURE_COORDS 0x0B06
+#define GL_CURRENT_RASTER_POSITION_VALID 0x0B08
+#define GL_CURRENT_TEXTURE_COORDS 0x0B03
+#define GL_INDEX_CLEAR_VALUE 0x0C20
+#define GL_INDEX_MODE 0x0C30
+#define GL_INDEX_WRITEMASK 0x0C21
+#define GL_MODELVIEW_MATRIX 0x0BA6
+#define GL_MODELVIEW_STACK_DEPTH 0x0BA3
+#define GL_NAME_STACK_DEPTH 0x0D70
+#define GL_PROJECTION_MATRIX 0x0BA7
+#define GL_PROJECTION_STACK_DEPTH 0x0BA4
+#define GL_RENDER_MODE 0x0C40
+#define GL_RGBA_MODE 0x0C31
+#define GL_TEXTURE_MATRIX 0x0BA8
+#define GL_TEXTURE_STACK_DEPTH 0x0BA5
+#define GL_VIEWPORT 0x0BA2
+
+/* Evaluators */
+#define GL_AUTO_NORMAL 0x0D80
+#define GL_MAP1_COLOR_4 0x0D90
+#define GL_MAP1_INDEX 0x0D91
+#define GL_MAP1_NORMAL 0x0D92
+#define GL_MAP1_TEXTURE_COORD_1 0x0D93
+#define GL_MAP1_TEXTURE_COORD_2 0x0D94
+#define GL_MAP1_TEXTURE_COORD_3 0x0D95
+#define GL_MAP1_TEXTURE_COORD_4 0x0D96
+#define GL_MAP1_VERTEX_3 0x0D97
+#define GL_MAP1_VERTEX_4 0x0D98
+#define GL_MAP2_COLOR_4 0x0DB0
+#define GL_MAP2_INDEX 0x0DB1
+#define GL_MAP2_NORMAL 0x0DB2
+#define GL_MAP2_TEXTURE_COORD_1 0x0DB3
+#define GL_MAP2_TEXTURE_COORD_2 0x0DB4
+#define GL_MAP2_TEXTURE_COORD_3 0x0DB5
+#define GL_MAP2_TEXTURE_COORD_4 0x0DB6
+#define GL_MAP2_VERTEX_3 0x0DB7
+#define GL_MAP2_VERTEX_4 0x0DB8
+#define GL_MAP1_GRID_DOMAIN 0x0DD0
+#define GL_MAP1_GRID_SEGMENTS 0x0DD1
+#define GL_MAP2_GRID_DOMAIN 0x0DD2
+#define GL_MAP2_GRID_SEGMENTS 0x0DD3
+#define GL_COEFF 0x0A00
+#define GL_ORDER 0x0A01
+#define GL_DOMAIN 0x0A02
+
+/* Hints */
+#define GL_PERSPECTIVE_CORRECTION_HINT 0x0C50
+#define GL_POINT_SMOOTH_HINT 0x0C51
+#define GL_LINE_SMOOTH_HINT 0x0C52
+#define GL_POLYGON_SMOOTH_HINT 0x0C53
+#define GL_FOG_HINT 0x0C54
+#define GL_DONT_CARE 0x1100
+#define GL_FASTEST 0x1101
+#define GL_NICEST 0x1102
+
+/* Scissor box */
+#define GL_SCISSOR_BOX 0x0C10
+#define GL_SCISSOR_TEST 0x0C11
+
+/* Pixel Mode / Transfer */
+#define GL_MAP_COLOR 0x0D10
+#define GL_MAP_STENCIL 0x0D11
+#define GL_INDEX_SHIFT 0x0D12
+#define GL_INDEX_OFFSET 0x0D13
+#define GL_RED_SCALE 0x0D14
+#define GL_RED_BIAS 0x0D15
+#define GL_GREEN_SCALE 0x0D18
+#define GL_GREEN_BIAS 0x0D19
+#define GL_BLUE_SCALE 0x0D1A
+#define GL_BLUE_BIAS 0x0D1B
+#define GL_ALPHA_SCALE 0x0D1C
+#define GL_ALPHA_BIAS 0x0D1D
+#define GL_DEPTH_SCALE 0x0D1E
+#define GL_DEPTH_BIAS 0x0D1F
+#define GL_PIXEL_MAP_S_TO_S_SIZE 0x0CB1
+#define GL_PIXEL_MAP_I_TO_I_SIZE 0x0CB0
+#define GL_PIXEL_MAP_I_TO_R_SIZE 0x0CB2
+#define GL_PIXEL_MAP_I_TO_G_SIZE 0x0CB3
+#define GL_PIXEL_MAP_I_TO_B_SIZE 0x0CB4
+#define GL_PIXEL_MAP_I_TO_A_SIZE 0x0CB5
+#define GL_PIXEL_MAP_R_TO_R_SIZE 0x0CB6
+#define GL_PIXEL_MAP_G_TO_G_SIZE 0x0CB7
+#define GL_PIXEL_MAP_B_TO_B_SIZE 0x0CB8
+#define GL_PIXEL_MAP_A_TO_A_SIZE 0x0CB9
+#define GL_PIXEL_MAP_S_TO_S 0x0C71
+#define GL_PIXEL_MAP_I_TO_I 0x0C70
+#define GL_PIXEL_MAP_I_TO_R 0x0C72
+#define GL_PIXEL_MAP_I_TO_G 0x0C73
+#define GL_PIXEL_MAP_I_TO_B 0x0C74
+#define GL_PIXEL_MAP_I_TO_A 0x0C75
+#define GL_PIXEL_MAP_R_TO_R 0x0C76
+#define GL_PIXEL_MAP_G_TO_G 0x0C77
+#define GL_PIXEL_MAP_B_TO_B 0x0C78
+#define GL_PIXEL_MAP_A_TO_A 0x0C79
+#define GL_PACK_ALIGNMENT 0x0D05
+#define GL_PACK_LSB_FIRST 0x0D01
+#define GL_PACK_ROW_LENGTH 0x0D02
+#define GL_PACK_SKIP_PIXELS 0x0D04
+#define GL_PACK_SKIP_ROWS 0x0D03
+#define GL_PACK_SWAP_BYTES 0x0D00
+#define GL_UNPACK_ALIGNMENT 0x0CF5
+#define GL_UNPACK_LSB_FIRST 0x0CF1
+#define GL_UNPACK_ROW_LENGTH 0x0CF2
+#define GL_UNPACK_SKIP_PIXELS 0x0CF4
+#define GL_UNPACK_SKIP_ROWS 0x0CF3
+#define GL_UNPACK_SWAP_BYTES 0x0CF0
+#define GL_ZOOM_X 0x0D16
+#define GL_ZOOM_Y 0x0D17
+
+/* Texture mapping */
+#define GL_TEXTURE_ENV 0x2300
+#define GL_TEXTURE_ENV_MODE 0x2200
+#define GL_TEXTURE_1D 0x0DE0
+#define GL_TEXTURE_2D 0x0DE1
+#define GL_TEXTURE_WRAP_S 0x2802
+#define GL_TEXTURE_WRAP_T 0x2803
+#define GL_TEXTURE_MAG_FILTER 0x2800
+#define GL_TEXTURE_MIN_FILTER 0x2801
+#define GL_TEXTURE_ENV_COLOR 0x2201
+#define GL_TEXTURE_GEN_S 0x0C60
+#define GL_TEXTURE_GEN_T 0x0C61
+#define GL_TEXTURE_GEN_MODE 0x2500
+#define GL_TEXTURE_BORDER_COLOR 0x1004
+#define GL_TEXTURE_WIDTH 0x1000
+#define GL_TEXTURE_HEIGHT 0x1001
+#define GL_TEXTURE_BORDER 0x1005
+#define GL_TEXTURE_COMPONENTS 0x1003
+#define GL_TEXTURE_RED_SIZE 0x805C
+#define GL_TEXTURE_GREEN_SIZE 0x805D
+#define GL_TEXTURE_BLUE_SIZE 0x805E
+#define GL_TEXTURE_ALPHA_SIZE 0x805F
+#define GL_TEXTURE_LUMINANCE_SIZE 0x8060
+#define GL_TEXTURE_INTENSITY_SIZE 0x8061
+#define GL_NEAREST_MIPMAP_NEAREST 0x2700
+#define GL_NEAREST_MIPMAP_LINEAR 0x2702
+#define GL_LINEAR_MIPMAP_NEAREST 0x2701
+#define GL_LINEAR_MIPMAP_LINEAR 0x2703
+#define GL_OBJECT_LINEAR 0x2401
+#define GL_OBJECT_PLANE 0x2501
+#define GL_EYE_LINEAR 0x2400
+#define GL_EYE_PLANE 0x2502
+#define GL_SPHERE_MAP 0x2402
+#define GL_DECAL 0x2101
+#define GL_MODULATE 0x2100
+#define GL_NEAREST 0x2600
+#define GL_REPEAT 0x2901
+#define GL_CLAMP 0x2900
+#define GL_S 0x2000
+#define GL_T 0x2001
+#define GL_R 0x2002
+#define GL_Q 0x2003
+#define GL_TEXTURE_GEN_R 0x0C62
+#define GL_TEXTURE_GEN_Q 0x0C63
+
+/* Utility */
+#define GL_VENDOR 0x1F00
+#define GL_RENDERER 0x1F01
+#define GL_VERSION 0x1F02
+#define GL_EXTENSIONS 0x1F03
+
+/* Errors */
+#define GL_NO_ERROR 0x0
+#define GL_INVALID_ENUM 0x0500
+#define GL_INVALID_VALUE 0x0501
+#define GL_INVALID_OPERATION 0x0502
+#define GL_STACK_OVERFLOW 0x0503
+#define GL_STACK_UNDERFLOW 0x0504
+#define GL_OUT_OF_MEMORY 0x0505
+
+/* glPush/PopAttrib bits */
+#define GL_CURRENT_BIT 0x00000001
+#define GL_POINT_BIT 0x00000002
+#define GL_LINE_BIT 0x00000004
+#define GL_POLYGON_BIT 0x00000008
+#define GL_POLYGON_STIPPLE_BIT 0x00000010
+#define GL_PIXEL_MODE_BIT 0x00000020
+#define GL_LIGHTING_BIT 0x00000040
+#define GL_FOG_BIT 0x00000080
+#define GL_DEPTH_BUFFER_BIT 0x00000100
+#define GL_ACCUM_BUFFER_BIT 0x00000200
+#define GL_STENCIL_BUFFER_BIT 0x00000400
+#define GL_VIEWPORT_BIT 0x00000800
+#define GL_TRANSFORM_BIT 0x00001000
+#define GL_ENABLE_BIT 0x00002000
+#define GL_COLOR_BUFFER_BIT 0x00004000
+#define GL_HINT_BIT 0x00008000
+#define GL_EVAL_BIT 0x00010000
+#define GL_LIST_BIT 0x00020000
+#define GL_TEXTURE_BIT 0x00040000
+#define GL_SCISSOR_BIT 0x00080000
+#define GL_ALL_ATTRIB_BITS 0x000FFFFF
+
+
+/* OpenGL 1.1 */
+#define GL_PROXY_TEXTURE_1D 0x8063
+#define GL_PROXY_TEXTURE_2D 0x8064
+#define GL_TEXTURE_PRIORITY 0x8066
+#define GL_TEXTURE_RESIDENT 0x8067
+#define GL_TEXTURE_BINDING_1D 0x8068
+#define GL_TEXTURE_BINDING_2D 0x8069
+#define GL_TEXTURE_INTERNAL_FORMAT 0x1003
+#define GL_ALPHA4 0x803B
+#define GL_ALPHA8 0x803C
+#define GL_ALPHA12 0x803D
+#define GL_ALPHA16 0x803E
+#define GL_LUMINANCE4 0x803F
+#define GL_LUMINANCE8 0x8040
+#define GL_LUMINANCE12 0x8041
+#define GL_LUMINANCE16 0x8042
+#define GL_LUMINANCE4_ALPHA4 0x8043
+#define GL_LUMINANCE6_ALPHA2 0x8044
+#define GL_LUMINANCE8_ALPHA8 0x8045
+#define GL_LUMINANCE12_ALPHA4 0x8046
+#define GL_LUMINANCE12_ALPHA12 0x8047
+#define GL_LUMINANCE16_ALPHA16 0x8048
+#define GL_INTENSITY 0x8049
+#define GL_INTENSITY4 0x804A
+#define GL_INTENSITY8 0x804B
+#define GL_INTENSITY12 0x804C
+#define GL_INTENSITY16 0x804D
+#define GL_R3_G3_B2 0x2A10
+#define GL_RGB4 0x804F
+#define GL_RGB5 0x8050
+#define GL_RGB8 0x8051
+#define GL_RGB10 0x8052
+#define GL_RGB12 0x8053
+#define GL_RGB16 0x8054
+#define GL_RGBA2 0x8055
+#define GL_RGBA4 0x8056
+#define GL_RGB5_A1 0x8057
+#define GL_RGBA8 0x8058
+#define GL_RGB10_A2 0x8059
+#define GL_RGBA12 0x805A
+#define GL_RGBA16 0x805B
+#define GL_CLIENT_PIXEL_STORE_BIT 0x00000001
+#define GL_CLIENT_VERTEX_ARRAY_BIT 0x00000002
+#define GL_ALL_CLIENT_ATTRIB_BITS 0xFFFFFFFF
+#define GL_CLIENT_ALL_ATTRIB_BITS 0xFFFFFFFF
+
+
+
+/*
+ * Miscellaneous
+ */
+
+GLAPI void GLAPIENTRY glClearIndex( GLfloat c );
+
+GLAPI void GLAPIENTRY glClearColor( GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha );
+
+GLAPI void GLAPIENTRY glClear( GLbitfield mask );
+
+GLAPI void GLAPIENTRY glIndexMask( GLuint mask );
+
+GLAPI void GLAPIENTRY glColorMask( GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha );
+
+GLAPI void GLAPIENTRY glAlphaFunc( GLenum func, GLclampf ref );
+
+GLAPI void GLAPIENTRY glBlendFunc( GLenum sfactor, GLenum dfactor );
+
+GLAPI void GLAPIENTRY glLogicOp( GLenum opcode );
+
+GLAPI void GLAPIENTRY glCullFace( GLenum mode );
+
+GLAPI void GLAPIENTRY glFrontFace( GLenum mode );
+
+GLAPI void GLAPIENTRY glPointSize( GLfloat size );
+
+GLAPI void GLAPIENTRY glLineWidth( GLfloat width );
+
+GLAPI void GLAPIENTRY glLineStipple( GLint factor, GLushort pattern );
+
+GLAPI void GLAPIENTRY glPolygonMode( GLenum face, GLenum mode );
+
+GLAPI void GLAPIENTRY glPolygonOffset( GLfloat factor, GLfloat units );
+
+GLAPI void GLAPIENTRY glPolygonStipple( const GLubyte *mask );
+
+GLAPI void GLAPIENTRY glGetPolygonStipple( GLubyte *mask );
+
+GLAPI void GLAPIENTRY glEdgeFlag( GLboolean flag );
+
+GLAPI void GLAPIENTRY glEdgeFlagv( const GLboolean *flag );
+
+GLAPI void GLAPIENTRY glScissor( GLint x, GLint y, GLsizei width, GLsizei height);
+
+GLAPI void GLAPIENTRY glClipPlane( GLenum plane, const GLdouble *equation );
+
+GLAPI void GLAPIENTRY glGetClipPlane( GLenum plane, GLdouble *equation );
+
+GLAPI void GLAPIENTRY glDrawBuffer( GLenum mode );
+
+GLAPI void GLAPIENTRY glReadBuffer( GLenum mode );
+
+GLAPI void GLAPIENTRY glEnable( GLenum cap );
+
+GLAPI void GLAPIENTRY glDisable( GLenum cap );
+
+GLAPI GLboolean GLAPIENTRY glIsEnabled( GLenum cap );
+
+
+GLAPI void GLAPIENTRY glEnableClientState( GLenum cap ); /* 1.1 */
+
+GLAPI void GLAPIENTRY glDisableClientState( GLenum cap ); /* 1.1 */
+
+
+GLAPI void GLAPIENTRY glGetBooleanv( GLenum pname, GLboolean *params );
+
+GLAPI void GLAPIENTRY glGetDoublev( GLenum pname, GLdouble *params );
+
+GLAPI void GLAPIENTRY glGetFloatv( GLenum pname, GLfloat *params );
+
+GLAPI void GLAPIENTRY glGetIntegerv( GLenum pname, GLint *params );
+
+
+GLAPI void GLAPIENTRY glPushAttrib( GLbitfield mask );
+
+GLAPI void GLAPIENTRY glPopAttrib( void );
+
+
+GLAPI void GLAPIENTRY glPushClientAttrib( GLbitfield mask ); /* 1.1 */
+
+GLAPI void GLAPIENTRY glPopClientAttrib( void ); /* 1.1 */
+
+
+GLAPI GLint GLAPIENTRY glRenderMode( GLenum mode );
+
+GLAPI GLenum GLAPIENTRY glGetError( void );
+
+GLAPI const GLubyte * GLAPIENTRY glGetString( GLenum name );
+
+GLAPI void GLAPIENTRY glFinish( void );
+
+GLAPI void GLAPIENTRY glFlush( void );
+
+GLAPI void GLAPIENTRY glHint( GLenum target, GLenum mode );
+
+
+/*
+ * Depth Buffer
+ */
+
+GLAPI void GLAPIENTRY glClearDepth( GLclampd depth );
+
+GLAPI void GLAPIENTRY glDepthFunc( GLenum func );
+
+GLAPI void GLAPIENTRY glDepthMask( GLboolean flag );
+
+GLAPI void GLAPIENTRY glDepthRange( GLclampd near_val, GLclampd far_val );
+
+
+/*
+ * Accumulation Buffer
+ */
+
+GLAPI void GLAPIENTRY glClearAccum( GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha );
+
+GLAPI void GLAPIENTRY glAccum( GLenum op, GLfloat value );
+
+
+/*
+ * Transformation
+ */
+
+GLAPI void GLAPIENTRY glMatrixMode( GLenum mode );
+
+GLAPI void GLAPIENTRY glOrtho( GLdouble left, GLdouble right,
+ GLdouble bottom, GLdouble top,
+ GLdouble near_val, GLdouble far_val );
+
+GLAPI void GLAPIENTRY glFrustum( GLdouble left, GLdouble right,
+ GLdouble bottom, GLdouble top,
+ GLdouble near_val, GLdouble far_val );
+
+GLAPI void GLAPIENTRY glViewport( GLint x, GLint y,
+ GLsizei width, GLsizei height );
+
+GLAPI void GLAPIENTRY glPushMatrix( void );
+
+GLAPI void GLAPIENTRY glPopMatrix( void );
+
+GLAPI void GLAPIENTRY glLoadIdentity( void );
+
+GLAPI void GLAPIENTRY glLoadMatrixd( const GLdouble *m );
+GLAPI void GLAPIENTRY glLoadMatrixf( const GLfloat *m );
+
+GLAPI void GLAPIENTRY glMultMatrixd( const GLdouble *m );
+GLAPI void GLAPIENTRY glMultMatrixf( const GLfloat *m );
+
+GLAPI void GLAPIENTRY glRotated( GLdouble angle,
+ GLdouble x, GLdouble y, GLdouble z );
+GLAPI void GLAPIENTRY glRotatef( GLfloat angle,
+ GLfloat x, GLfloat y, GLfloat z );
+
+GLAPI void GLAPIENTRY glScaled( GLdouble x, GLdouble y, GLdouble z );
+GLAPI void GLAPIENTRY glScalef( GLfloat x, GLfloat y, GLfloat z );
+
+GLAPI void GLAPIENTRY glTranslated( GLdouble x, GLdouble y, GLdouble z );
+GLAPI void GLAPIENTRY glTranslatef( GLfloat x, GLfloat y, GLfloat z );
+
+
+/*
+ * Display Lists
+ */
+
+GLAPI GLboolean GLAPIENTRY glIsList( GLuint list );
+
+GLAPI void GLAPIENTRY glDeleteLists( GLuint list, GLsizei range );
+
+GLAPI GLuint GLAPIENTRY glGenLists( GLsizei range );
+
+GLAPI void GLAPIENTRY glNewList( GLuint list, GLenum mode );
+
+GLAPI void GLAPIENTRY glEndList( void );
+
+GLAPI void GLAPIENTRY glCallList( GLuint list );
+
+GLAPI void GLAPIENTRY glCallLists( GLsizei n, GLenum type,
+ const GLvoid *lists );
+
+GLAPI void GLAPIENTRY glListBase( GLuint base );
+
+
+/*
+ * Drawing Functions
+ */
+
+GLAPI void GLAPIENTRY glBegin( GLenum mode );
+
+GLAPI void GLAPIENTRY glEnd( void );
+
+
+GLAPI void GLAPIENTRY glVertex2d( GLdouble x, GLdouble y );
+GLAPI void GLAPIENTRY glVertex2f( GLfloat x, GLfloat y );
+GLAPI void GLAPIENTRY glVertex2i( GLint x, GLint y );
+GLAPI void GLAPIENTRY glVertex2s( GLshort x, GLshort y );
+
+GLAPI void GLAPIENTRY glVertex3d( GLdouble x, GLdouble y, GLdouble z );
+GLAPI void GLAPIENTRY glVertex3f( GLfloat x, GLfloat y, GLfloat z );
+GLAPI void GLAPIENTRY glVertex3i( GLint x, GLint y, GLint z );
+GLAPI void GLAPIENTRY glVertex3s( GLshort x, GLshort y, GLshort z );
+
+GLAPI void GLAPIENTRY glVertex4d( GLdouble x, GLdouble y, GLdouble z, GLdouble w );
+GLAPI void GLAPIENTRY glVertex4f( GLfloat x, GLfloat y, GLfloat z, GLfloat w );
+GLAPI void GLAPIENTRY glVertex4i( GLint x, GLint y, GLint z, GLint w );
+GLAPI void GLAPIENTRY glVertex4s( GLshort x, GLshort y, GLshort z, GLshort w );
+
+GLAPI void GLAPIENTRY glVertex2dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glVertex2fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glVertex2iv( const GLint *v );
+GLAPI void GLAPIENTRY glVertex2sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glVertex3dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glVertex3fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glVertex3iv( const GLint *v );
+GLAPI void GLAPIENTRY glVertex3sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glVertex4dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glVertex4fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glVertex4iv( const GLint *v );
+GLAPI void GLAPIENTRY glVertex4sv( const GLshort *v );
+
+
+GLAPI void GLAPIENTRY glNormal3b( GLbyte nx, GLbyte ny, GLbyte nz );
+GLAPI void GLAPIENTRY glNormal3d( GLdouble nx, GLdouble ny, GLdouble nz );
+GLAPI void GLAPIENTRY glNormal3f( GLfloat nx, GLfloat ny, GLfloat nz );
+GLAPI void GLAPIENTRY glNormal3i( GLint nx, GLint ny, GLint nz );
+GLAPI void GLAPIENTRY glNormal3s( GLshort nx, GLshort ny, GLshort nz );
+
+GLAPI void GLAPIENTRY glNormal3bv( const GLbyte *v );
+GLAPI void GLAPIENTRY glNormal3dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glNormal3fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glNormal3iv( const GLint *v );
+GLAPI void GLAPIENTRY glNormal3sv( const GLshort *v );
+
+
+GLAPI void GLAPIENTRY glIndexd( GLdouble c );
+GLAPI void GLAPIENTRY glIndexf( GLfloat c );
+GLAPI void GLAPIENTRY glIndexi( GLint c );
+GLAPI void GLAPIENTRY glIndexs( GLshort c );
+GLAPI void GLAPIENTRY glIndexub( GLubyte c ); /* 1.1 */
+
+GLAPI void GLAPIENTRY glIndexdv( const GLdouble *c );
+GLAPI void GLAPIENTRY glIndexfv( const GLfloat *c );
+GLAPI void GLAPIENTRY glIndexiv( const GLint *c );
+GLAPI void GLAPIENTRY glIndexsv( const GLshort *c );
+GLAPI void GLAPIENTRY glIndexubv( const GLubyte *c ); /* 1.1 */
+
+GLAPI void GLAPIENTRY glColor3b( GLbyte red, GLbyte green, GLbyte blue );
+GLAPI void GLAPIENTRY glColor3d( GLdouble red, GLdouble green, GLdouble blue );
+GLAPI void GLAPIENTRY glColor3f( GLfloat red, GLfloat green, GLfloat blue );
+GLAPI void GLAPIENTRY glColor3i( GLint red, GLint green, GLint blue );
+GLAPI void GLAPIENTRY glColor3s( GLshort red, GLshort green, GLshort blue );
+GLAPI void GLAPIENTRY glColor3ub( GLubyte red, GLubyte green, GLubyte blue );
+GLAPI void GLAPIENTRY glColor3ui( GLuint red, GLuint green, GLuint blue );
+GLAPI void GLAPIENTRY glColor3us( GLushort red, GLushort green, GLushort blue );
+
+GLAPI void GLAPIENTRY glColor4b( GLbyte red, GLbyte green,
+ GLbyte blue, GLbyte alpha );
+GLAPI void GLAPIENTRY glColor4d( GLdouble red, GLdouble green,
+ GLdouble blue, GLdouble alpha );
+GLAPI void GLAPIENTRY glColor4f( GLfloat red, GLfloat green,
+ GLfloat blue, GLfloat alpha );
+GLAPI void GLAPIENTRY glColor4i( GLint red, GLint green,
+ GLint blue, GLint alpha );
+GLAPI void GLAPIENTRY glColor4s( GLshort red, GLshort green,
+ GLshort blue, GLshort alpha );
+GLAPI void GLAPIENTRY glColor4ub( GLubyte red, GLubyte green,
+ GLubyte blue, GLubyte alpha );
+GLAPI void GLAPIENTRY glColor4ui( GLuint red, GLuint green,
+ GLuint blue, GLuint alpha );
+GLAPI void GLAPIENTRY glColor4us( GLushort red, GLushort green,
+ GLushort blue, GLushort alpha );
+
+
+GLAPI void GLAPIENTRY glColor3bv( const GLbyte *v );
+GLAPI void GLAPIENTRY glColor3dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glColor3fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glColor3iv( const GLint *v );
+GLAPI void GLAPIENTRY glColor3sv( const GLshort *v );
+GLAPI void GLAPIENTRY glColor3ubv( const GLubyte *v );
+GLAPI void GLAPIENTRY glColor3uiv( const GLuint *v );
+GLAPI void GLAPIENTRY glColor3usv( const GLushort *v );
+
+GLAPI void GLAPIENTRY glColor4bv( const GLbyte *v );
+GLAPI void GLAPIENTRY glColor4dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glColor4fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glColor4iv( const GLint *v );
+GLAPI void GLAPIENTRY glColor4sv( const GLshort *v );
+GLAPI void GLAPIENTRY glColor4ubv( const GLubyte *v );
+GLAPI void GLAPIENTRY glColor4uiv( const GLuint *v );
+GLAPI void GLAPIENTRY glColor4usv( const GLushort *v );
+
+
+GLAPI void GLAPIENTRY glTexCoord1d( GLdouble s );
+GLAPI void GLAPIENTRY glTexCoord1f( GLfloat s );
+GLAPI void GLAPIENTRY glTexCoord1i( GLint s );
+GLAPI void GLAPIENTRY glTexCoord1s( GLshort s );
+
+GLAPI void GLAPIENTRY glTexCoord2d( GLdouble s, GLdouble t );
+GLAPI void GLAPIENTRY glTexCoord2f( GLfloat s, GLfloat t );
+GLAPI void GLAPIENTRY glTexCoord2i( GLint s, GLint t );
+GLAPI void GLAPIENTRY glTexCoord2s( GLshort s, GLshort t );
+
+GLAPI void GLAPIENTRY glTexCoord3d( GLdouble s, GLdouble t, GLdouble r );
+GLAPI void GLAPIENTRY glTexCoord3f( GLfloat s, GLfloat t, GLfloat r );
+GLAPI void GLAPIENTRY glTexCoord3i( GLint s, GLint t, GLint r );
+GLAPI void GLAPIENTRY glTexCoord3s( GLshort s, GLshort t, GLshort r );
+
+GLAPI void GLAPIENTRY glTexCoord4d( GLdouble s, GLdouble t, GLdouble r, GLdouble q );
+GLAPI void GLAPIENTRY glTexCoord4f( GLfloat s, GLfloat t, GLfloat r, GLfloat q );
+GLAPI void GLAPIENTRY glTexCoord4i( GLint s, GLint t, GLint r, GLint q );
+GLAPI void GLAPIENTRY glTexCoord4s( GLshort s, GLshort t, GLshort r, GLshort q );
+
+GLAPI void GLAPIENTRY glTexCoord1dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glTexCoord1fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glTexCoord1iv( const GLint *v );
+GLAPI void GLAPIENTRY glTexCoord1sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glTexCoord2dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glTexCoord2fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glTexCoord2iv( const GLint *v );
+GLAPI void GLAPIENTRY glTexCoord2sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glTexCoord3dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glTexCoord3fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glTexCoord3iv( const GLint *v );
+GLAPI void GLAPIENTRY glTexCoord3sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glTexCoord4dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glTexCoord4fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glTexCoord4iv( const GLint *v );
+GLAPI void GLAPIENTRY glTexCoord4sv( const GLshort *v );
+
+
+GLAPI void GLAPIENTRY glRasterPos2d( GLdouble x, GLdouble y );
+GLAPI void GLAPIENTRY glRasterPos2f( GLfloat x, GLfloat y );
+GLAPI void GLAPIENTRY glRasterPos2i( GLint x, GLint y );
+GLAPI void GLAPIENTRY glRasterPos2s( GLshort x, GLshort y );
+
+GLAPI void GLAPIENTRY glRasterPos3d( GLdouble x, GLdouble y, GLdouble z );
+GLAPI void GLAPIENTRY glRasterPos3f( GLfloat x, GLfloat y, GLfloat z );
+GLAPI void GLAPIENTRY glRasterPos3i( GLint x, GLint y, GLint z );
+GLAPI void GLAPIENTRY glRasterPos3s( GLshort x, GLshort y, GLshort z );
+
+GLAPI void GLAPIENTRY glRasterPos4d( GLdouble x, GLdouble y, GLdouble z, GLdouble w );
+GLAPI void GLAPIENTRY glRasterPos4f( GLfloat x, GLfloat y, GLfloat z, GLfloat w );
+GLAPI void GLAPIENTRY glRasterPos4i( GLint x, GLint y, GLint z, GLint w );
+GLAPI void GLAPIENTRY glRasterPos4s( GLshort x, GLshort y, GLshort z, GLshort w );
+
+GLAPI void GLAPIENTRY glRasterPos2dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glRasterPos2fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glRasterPos2iv( const GLint *v );
+GLAPI void GLAPIENTRY glRasterPos2sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glRasterPos3dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glRasterPos3fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glRasterPos3iv( const GLint *v );
+GLAPI void GLAPIENTRY glRasterPos3sv( const GLshort *v );
+
+GLAPI void GLAPIENTRY glRasterPos4dv( const GLdouble *v );
+GLAPI void GLAPIENTRY glRasterPos4fv( const GLfloat *v );
+GLAPI void GLAPIENTRY glRasterPos4iv( const GLint *v );
+GLAPI void GLAPIENTRY glRasterPos4sv( const GLshort *v );
+
+
+GLAPI void GLAPIENTRY glRectd( GLdouble x1, GLdouble y1, GLdouble x2, GLdouble y2 );
+GLAPI void GLAPIENTRY glRectf( GLfloat x1, GLfloat y1, GLfloat x2, GLfloat y2 );
+GLAPI void GLAPIENTRY glRecti( GLint x1, GLint y1, GLint x2, GLint y2 );
+GLAPI void GLAPIENTRY glRects( GLshort x1, GLshort y1, GLshort x2, GLshort y2 );
+
+
+GLAPI void GLAPIENTRY glRectdv( const GLdouble *v1, const GLdouble *v2 );
+GLAPI void GLAPIENTRY glRectfv( const GLfloat *v1, const GLfloat *v2 );
+GLAPI void GLAPIENTRY glRectiv( const GLint *v1, const GLint *v2 );
+GLAPI void GLAPIENTRY glRectsv( const GLshort *v1, const GLshort *v2 );
+
+
+/*
+ * Vertex Arrays (1.1)
+ */
+
+GLAPI void GLAPIENTRY glVertexPointer( GLint size, GLenum type,
+ GLsizei stride, const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glNormalPointer( GLenum type, GLsizei stride,
+ const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glColorPointer( GLint size, GLenum type,
+ GLsizei stride, const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glIndexPointer( GLenum type, GLsizei stride,
+ const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glTexCoordPointer( GLint size, GLenum type,
+ GLsizei stride, const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glEdgeFlagPointer( GLsizei stride, const GLvoid *ptr );
+
+GLAPI void GLAPIENTRY glGetPointerv( GLenum pname, GLvoid **params );
+
+GLAPI void GLAPIENTRY glArrayElement( GLint i );
+
+GLAPI void GLAPIENTRY glDrawArrays( GLenum mode, GLint first, GLsizei count );
+
+GLAPI void GLAPIENTRY glDrawElements( GLenum mode, GLsizei count,
+ GLenum type, const GLvoid *indices );
+
+GLAPI void GLAPIENTRY glInterleavedArrays( GLenum format, GLsizei stride,
+ const GLvoid *pointer );
+
+/*
+ * Lighting
+ */
+
+GLAPI void GLAPIENTRY glShadeModel( GLenum mode );
+
+GLAPI void GLAPIENTRY glLightf( GLenum light, GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glLighti( GLenum light, GLenum pname, GLint param );
+GLAPI void GLAPIENTRY glLightfv( GLenum light, GLenum pname,
+ const GLfloat *params );
+GLAPI void GLAPIENTRY glLightiv( GLenum light, GLenum pname,
+ const GLint *params );
+
+GLAPI void GLAPIENTRY glGetLightfv( GLenum light, GLenum pname,
+ GLfloat *params );
+GLAPI void GLAPIENTRY glGetLightiv( GLenum light, GLenum pname,
+ GLint *params );
+
+GLAPI void GLAPIENTRY glLightModelf( GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glLightModeli( GLenum pname, GLint param );
+GLAPI void GLAPIENTRY glLightModelfv( GLenum pname, const GLfloat *params );
+GLAPI void GLAPIENTRY glLightModeliv( GLenum pname, const GLint *params );
+
+GLAPI void GLAPIENTRY glMaterialf( GLenum face, GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glMateriali( GLenum face, GLenum pname, GLint param );
+GLAPI void GLAPIENTRY glMaterialfv( GLenum face, GLenum pname, const GLfloat *params );
+GLAPI void GLAPIENTRY glMaterialiv( GLenum face, GLenum pname, const GLint *params );
+
+GLAPI void GLAPIENTRY glGetMaterialfv( GLenum face, GLenum pname, GLfloat *params );
+GLAPI void GLAPIENTRY glGetMaterialiv( GLenum face, GLenum pname, GLint *params );
+
+GLAPI void GLAPIENTRY glColorMaterial( GLenum face, GLenum mode );
+
+
+/*
+ * Raster functions
+ */
+
+GLAPI void GLAPIENTRY glPixelZoom( GLfloat xfactor, GLfloat yfactor );
+
+GLAPI void GLAPIENTRY glPixelStoref( GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glPixelStorei( GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glPixelTransferf( GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glPixelTransferi( GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glPixelMapfv( GLenum map, GLsizei mapsize,
+ const GLfloat *values );
+GLAPI void GLAPIENTRY glPixelMapuiv( GLenum map, GLsizei mapsize,
+ const GLuint *values );
+GLAPI void GLAPIENTRY glPixelMapusv( GLenum map, GLsizei mapsize,
+ const GLushort *values );
+
+GLAPI void GLAPIENTRY glGetPixelMapfv( GLenum map, GLfloat *values );
+GLAPI void GLAPIENTRY glGetPixelMapuiv( GLenum map, GLuint *values );
+GLAPI void GLAPIENTRY glGetPixelMapusv( GLenum map, GLushort *values );
+
+GLAPI void GLAPIENTRY glBitmap( GLsizei width, GLsizei height,
+ GLfloat xorig, GLfloat yorig,
+ GLfloat xmove, GLfloat ymove,
+ const GLubyte *bitmap );
+
+GLAPI void GLAPIENTRY glReadPixels( GLint x, GLint y,
+ GLsizei width, GLsizei height,
+ GLenum format, GLenum type,
+ GLvoid *pixels );
+
+GLAPI void GLAPIENTRY glDrawPixels( GLsizei width, GLsizei height,
+ GLenum format, GLenum type,
+ const GLvoid *pixels );
+
+GLAPI void GLAPIENTRY glCopyPixels( GLint x, GLint y,
+ GLsizei width, GLsizei height,
+ GLenum type );
+
+/*
+ * Stenciling
+ */
+
+GLAPI void GLAPIENTRY glStencilFunc( GLenum func, GLint ref, GLuint mask );
+
+GLAPI void GLAPIENTRY glStencilMask( GLuint mask );
+
+GLAPI void GLAPIENTRY glStencilOp( GLenum fail, GLenum zfail, GLenum zpass );
+
+GLAPI void GLAPIENTRY glClearStencil( GLint s );
+
+
+
+/*
+ * Texture mapping
+ */
+
+GLAPI void GLAPIENTRY glTexGend( GLenum coord, GLenum pname, GLdouble param );
+GLAPI void GLAPIENTRY glTexGenf( GLenum coord, GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glTexGeni( GLenum coord, GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glTexGendv( GLenum coord, GLenum pname, const GLdouble *params );
+GLAPI void GLAPIENTRY glTexGenfv( GLenum coord, GLenum pname, const GLfloat *params );
+GLAPI void GLAPIENTRY glTexGeniv( GLenum coord, GLenum pname, const GLint *params );
+
+GLAPI void GLAPIENTRY glGetTexGendv( GLenum coord, GLenum pname, GLdouble *params );
+GLAPI void GLAPIENTRY glGetTexGenfv( GLenum coord, GLenum pname, GLfloat *params );
+GLAPI void GLAPIENTRY glGetTexGeniv( GLenum coord, GLenum pname, GLint *params );
+
+
+GLAPI void GLAPIENTRY glTexEnvf( GLenum target, GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glTexEnvi( GLenum target, GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glTexEnvfv( GLenum target, GLenum pname, const GLfloat *params );
+GLAPI void GLAPIENTRY glTexEnviv( GLenum target, GLenum pname, const GLint *params );
+
+GLAPI void GLAPIENTRY glGetTexEnvfv( GLenum target, GLenum pname, GLfloat *params );
+GLAPI void GLAPIENTRY glGetTexEnviv( GLenum target, GLenum pname, GLint *params );
+
+
+GLAPI void GLAPIENTRY glTexParameterf( GLenum target, GLenum pname, GLfloat param );
+GLAPI void GLAPIENTRY glTexParameteri( GLenum target, GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glTexParameterfv( GLenum target, GLenum pname,
+ const GLfloat *params );
+GLAPI void GLAPIENTRY glTexParameteriv( GLenum target, GLenum pname,
+ const GLint *params );
+
+GLAPI void GLAPIENTRY glGetTexParameterfv( GLenum target,
+ GLenum pname, GLfloat *params);
+GLAPI void GLAPIENTRY glGetTexParameteriv( GLenum target,
+ GLenum pname, GLint *params );
+
+GLAPI void GLAPIENTRY glGetTexLevelParameterfv( GLenum target, GLint level,
+ GLenum pname, GLfloat *params );
+GLAPI void GLAPIENTRY glGetTexLevelParameteriv( GLenum target, GLint level,
+ GLenum pname, GLint *params );
+
+
+GLAPI void GLAPIENTRY glTexImage1D( GLenum target, GLint level,
+ GLint internalFormat,
+ GLsizei width, GLint border,
+ GLenum format, GLenum type,
+ const GLvoid *pixels );
+
+GLAPI void GLAPIENTRY glTexImage2D( GLenum target, GLint level,
+ GLint internalFormat,
+ GLsizei width, GLsizei height,
+ GLint border, GLenum format, GLenum type,
+ const GLvoid *pixels );
+
+GLAPI void GLAPIENTRY glGetTexImage( GLenum target, GLint level,
+ GLenum format, GLenum type,
+ GLvoid *pixels );
+
+
+/* 1.1 functions */
+
+GLAPI void GLAPIENTRY glGenTextures( GLsizei n, GLuint *textures );
+
+GLAPI void GLAPIENTRY glDeleteTextures( GLsizei n, const GLuint *textures);
+
+GLAPI void GLAPIENTRY glBindTexture( GLenum target, GLuint texture );
+
+GLAPI void GLAPIENTRY glPrioritizeTextures( GLsizei n,
+ const GLuint *textures,
+ const GLclampf *priorities );
+
+GLAPI GLboolean GLAPIENTRY glAreTexturesResident( GLsizei n,
+ const GLuint *textures,
+ GLboolean *residences );
+
+GLAPI GLboolean GLAPIENTRY glIsTexture( GLuint texture );
+
+
+GLAPI void GLAPIENTRY glTexSubImage1D( GLenum target, GLint level,
+ GLint xoffset,
+ GLsizei width, GLenum format,
+ GLenum type, const GLvoid *pixels );
+
+
+GLAPI void GLAPIENTRY glTexSubImage2D( GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLsizei width, GLsizei height,
+ GLenum format, GLenum type,
+ const GLvoid *pixels );
+
+
+GLAPI void GLAPIENTRY glCopyTexImage1D( GLenum target, GLint level,
+ GLenum internalformat,
+ GLint x, GLint y,
+ GLsizei width, GLint border );
+
+
+GLAPI void GLAPIENTRY glCopyTexImage2D( GLenum target, GLint level,
+ GLenum internalformat,
+ GLint x, GLint y,
+ GLsizei width, GLsizei height,
+ GLint border );
+
+
+GLAPI void GLAPIENTRY glCopyTexSubImage1D( GLenum target, GLint level,
+ GLint xoffset, GLint x, GLint y,
+ GLsizei width );
+
+
+GLAPI void GLAPIENTRY glCopyTexSubImage2D( GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLint x, GLint y,
+ GLsizei width, GLsizei height );
+
+
+/*
+ * Evaluators
+ */
+
+GLAPI void GLAPIENTRY glMap1d( GLenum target, GLdouble u1, GLdouble u2,
+ GLint stride,
+ GLint order, const GLdouble *points );
+GLAPI void GLAPIENTRY glMap1f( GLenum target, GLfloat u1, GLfloat u2,
+ GLint stride,
+ GLint order, const GLfloat *points );
+
+GLAPI void GLAPIENTRY glMap2d( GLenum target,
+ GLdouble u1, GLdouble u2, GLint ustride, GLint uorder,
+ GLdouble v1, GLdouble v2, GLint vstride, GLint vorder,
+ const GLdouble *points );
+GLAPI void GLAPIENTRY glMap2f( GLenum target,
+ GLfloat u1, GLfloat u2, GLint ustride, GLint uorder,
+ GLfloat v1, GLfloat v2, GLint vstride, GLint vorder,
+ const GLfloat *points );
+
+GLAPI void GLAPIENTRY glGetMapdv( GLenum target, GLenum query, GLdouble *v );
+GLAPI void GLAPIENTRY glGetMapfv( GLenum target, GLenum query, GLfloat *v );
+GLAPI void GLAPIENTRY glGetMapiv( GLenum target, GLenum query, GLint *v );
+
+GLAPI void GLAPIENTRY glEvalCoord1d( GLdouble u );
+GLAPI void GLAPIENTRY glEvalCoord1f( GLfloat u );
+
+GLAPI void GLAPIENTRY glEvalCoord1dv( const GLdouble *u );
+GLAPI void GLAPIENTRY glEvalCoord1fv( const GLfloat *u );
+
+GLAPI void GLAPIENTRY glEvalCoord2d( GLdouble u, GLdouble v );
+GLAPI void GLAPIENTRY glEvalCoord2f( GLfloat u, GLfloat v );
+
+GLAPI void GLAPIENTRY glEvalCoord2dv( const GLdouble *u );
+GLAPI void GLAPIENTRY glEvalCoord2fv( const GLfloat *u );
+
+GLAPI void GLAPIENTRY glMapGrid1d( GLint un, GLdouble u1, GLdouble u2 );
+GLAPI void GLAPIENTRY glMapGrid1f( GLint un, GLfloat u1, GLfloat u2 );
+
+GLAPI void GLAPIENTRY glMapGrid2d( GLint un, GLdouble u1, GLdouble u2,
+ GLint vn, GLdouble v1, GLdouble v2 );
+GLAPI void GLAPIENTRY glMapGrid2f( GLint un, GLfloat u1, GLfloat u2,
+ GLint vn, GLfloat v1, GLfloat v2 );
+
+GLAPI void GLAPIENTRY glEvalPoint1( GLint i );
+
+GLAPI void GLAPIENTRY glEvalPoint2( GLint i, GLint j );
+
+GLAPI void GLAPIENTRY glEvalMesh1( GLenum mode, GLint i1, GLint i2 );
+
+GLAPI void GLAPIENTRY glEvalMesh2( GLenum mode, GLint i1, GLint i2, GLint j1, GLint j2 );
+
+
+/*
+ * Fog
+ */
+
+GLAPI void GLAPIENTRY glFogf( GLenum pname, GLfloat param );
+
+GLAPI void GLAPIENTRY glFogi( GLenum pname, GLint param );
+
+GLAPI void GLAPIENTRY glFogfv( GLenum pname, const GLfloat *params );
+
+GLAPI void GLAPIENTRY glFogiv( GLenum pname, const GLint *params );
+
+
+/*
+ * Selection and Feedback
+ */
+
+GLAPI void GLAPIENTRY glFeedbackBuffer( GLsizei size, GLenum type, GLfloat *buffer );
+
+GLAPI void GLAPIENTRY glPassThrough( GLfloat token );
+
+GLAPI void GLAPIENTRY glSelectBuffer( GLsizei size, GLuint *buffer );
+
+GLAPI void GLAPIENTRY glInitNames( void );
+
+GLAPI void GLAPIENTRY glLoadName( GLuint name );
+
+GLAPI void GLAPIENTRY glPushName( GLuint name );
+
+GLAPI void GLAPIENTRY glPopName( void );
+
+
+
+/*
+ * OpenGL 1.2
+ */
+
+#define GL_RESCALE_NORMAL 0x803A
+#define GL_CLAMP_TO_EDGE 0x812F
+#define GL_MAX_ELEMENTS_VERTICES 0x80E8
+#define GL_MAX_ELEMENTS_INDICES 0x80E9
+#define GL_BGR 0x80E0
+#define GL_BGRA 0x80E1
+#define GL_UNSIGNED_BYTE_3_3_2 0x8032
+#define GL_UNSIGNED_BYTE_2_3_3_REV 0x8362
+#define GL_UNSIGNED_SHORT_5_6_5 0x8363
+#define GL_UNSIGNED_SHORT_5_6_5_REV 0x8364
+#define GL_UNSIGNED_SHORT_4_4_4_4 0x8033
+#define GL_UNSIGNED_SHORT_4_4_4_4_REV 0x8365
+#define GL_UNSIGNED_SHORT_5_5_5_1 0x8034
+#define GL_UNSIGNED_SHORT_1_5_5_5_REV 0x8366
+#define GL_UNSIGNED_INT_8_8_8_8 0x8035
+#define GL_UNSIGNED_INT_8_8_8_8_REV 0x8367
+#define GL_UNSIGNED_INT_10_10_10_2 0x8036
+#define GL_UNSIGNED_INT_2_10_10_10_REV 0x8368
+#define GL_LIGHT_MODEL_COLOR_CONTROL 0x81F8
+#define GL_SINGLE_COLOR 0x81F9
+#define GL_SEPARATE_SPECULAR_COLOR 0x81FA
+#define GL_TEXTURE_MIN_LOD 0x813A
+#define GL_TEXTURE_MAX_LOD 0x813B
+#define GL_TEXTURE_BASE_LEVEL 0x813C
+#define GL_TEXTURE_MAX_LEVEL 0x813D
+#define GL_SMOOTH_POINT_SIZE_RANGE 0x0B12
+#define GL_SMOOTH_POINT_SIZE_GRANULARITY 0x0B13
+#define GL_SMOOTH_LINE_WIDTH_RANGE 0x0B22
+#define GL_SMOOTH_LINE_WIDTH_GRANULARITY 0x0B23
+#define GL_ALIASED_POINT_SIZE_RANGE 0x846D
+#define GL_ALIASED_LINE_WIDTH_RANGE 0x846E
+#define GL_PACK_SKIP_IMAGES 0x806B
+#define GL_PACK_IMAGE_HEIGHT 0x806C
+#define GL_UNPACK_SKIP_IMAGES 0x806D
+#define GL_UNPACK_IMAGE_HEIGHT 0x806E
+#define GL_TEXTURE_3D 0x806F
+#define GL_PROXY_TEXTURE_3D 0x8070
+#define GL_TEXTURE_DEPTH 0x8071
+#define GL_TEXTURE_WRAP_R 0x8072
+#define GL_MAX_3D_TEXTURE_SIZE 0x8073
+#define GL_TEXTURE_BINDING_3D 0x806A
+
+GLAPI void GLAPIENTRY glDrawRangeElements( GLenum mode, GLuint start,
+ GLuint end, GLsizei count, GLenum type, const GLvoid *indices );
+
+GLAPI void GLAPIENTRY glTexImage3D( GLenum target, GLint level,
+ GLint internalFormat,
+ GLsizei width, GLsizei height,
+ GLsizei depth, GLint border,
+ GLenum format, GLenum type,
+ const GLvoid *pixels );
+
+GLAPI void GLAPIENTRY glTexSubImage3D( GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLint zoffset, GLsizei width,
+ GLsizei height, GLsizei depth,
+ GLenum format,
+ GLenum type, const GLvoid *pixels);
+
+GLAPI void GLAPIENTRY glCopyTexSubImage3D( GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLint zoffset, GLint x,
+ GLint y, GLsizei width,
+ GLsizei height );
+
+typedef void (APIENTRYP PFNGLDRAWRANGEELEMENTSPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const GLvoid *indices);
+typedef void (APIENTRYP PFNGLTEXIMAGE3DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLCOPYTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+
+
+/*
+ * GL_ARB_imaging
+ */
+
+#define GL_CONSTANT_COLOR 0x8001
+#define GL_ONE_MINUS_CONSTANT_COLOR 0x8002
+#define GL_CONSTANT_ALPHA 0x8003
+#define GL_ONE_MINUS_CONSTANT_ALPHA 0x8004
+#define GL_COLOR_TABLE 0x80D0
+#define GL_POST_CONVOLUTION_COLOR_TABLE 0x80D1
+#define GL_POST_COLOR_MATRIX_COLOR_TABLE 0x80D2
+#define GL_PROXY_COLOR_TABLE 0x80D3
+#define GL_PROXY_POST_CONVOLUTION_COLOR_TABLE 0x80D4
+#define GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE 0x80D5
+#define GL_COLOR_TABLE_SCALE 0x80D6
+#define GL_COLOR_TABLE_BIAS 0x80D7
+#define GL_COLOR_TABLE_FORMAT 0x80D8
+#define GL_COLOR_TABLE_WIDTH 0x80D9
+#define GL_COLOR_TABLE_RED_SIZE 0x80DA
+#define GL_COLOR_TABLE_GREEN_SIZE 0x80DB
+#define GL_COLOR_TABLE_BLUE_SIZE 0x80DC
+#define GL_COLOR_TABLE_ALPHA_SIZE 0x80DD
+#define GL_COLOR_TABLE_LUMINANCE_SIZE 0x80DE
+#define GL_COLOR_TABLE_INTENSITY_SIZE 0x80DF
+#define GL_CONVOLUTION_1D 0x8010
+#define GL_CONVOLUTION_2D 0x8011
+#define GL_SEPARABLE_2D 0x8012
+#define GL_CONVOLUTION_BORDER_MODE 0x8013
+#define GL_CONVOLUTION_FILTER_SCALE 0x8014
+#define GL_CONVOLUTION_FILTER_BIAS 0x8015
+#define GL_REDUCE 0x8016
+#define GL_CONVOLUTION_FORMAT 0x8017
+#define GL_CONVOLUTION_WIDTH 0x8018
+#define GL_CONVOLUTION_HEIGHT 0x8019
+#define GL_MAX_CONVOLUTION_WIDTH 0x801A
+#define GL_MAX_CONVOLUTION_HEIGHT 0x801B
+#define GL_POST_CONVOLUTION_RED_SCALE 0x801C
+#define GL_POST_CONVOLUTION_GREEN_SCALE 0x801D
+#define GL_POST_CONVOLUTION_BLUE_SCALE 0x801E
+#define GL_POST_CONVOLUTION_ALPHA_SCALE 0x801F
+#define GL_POST_CONVOLUTION_RED_BIAS 0x8020
+#define GL_POST_CONVOLUTION_GREEN_BIAS 0x8021
+#define GL_POST_CONVOLUTION_BLUE_BIAS 0x8022
+#define GL_POST_CONVOLUTION_ALPHA_BIAS 0x8023
+#define GL_CONSTANT_BORDER 0x8151
+#define GL_REPLICATE_BORDER 0x8153
+#define GL_CONVOLUTION_BORDER_COLOR 0x8154
+#define GL_COLOR_MATRIX 0x80B1
+#define GL_COLOR_MATRIX_STACK_DEPTH 0x80B2
+#define GL_MAX_COLOR_MATRIX_STACK_DEPTH 0x80B3
+#define GL_POST_COLOR_MATRIX_RED_SCALE 0x80B4
+#define GL_POST_COLOR_MATRIX_GREEN_SCALE 0x80B5
+#define GL_POST_COLOR_MATRIX_BLUE_SCALE 0x80B6
+#define GL_POST_COLOR_MATRIX_ALPHA_SCALE 0x80B7
+#define GL_POST_COLOR_MATRIX_RED_BIAS 0x80B8
+#define GL_POST_COLOR_MATRIX_GREEN_BIAS 0x80B9
+#define GL_POST_COLOR_MATRIX_BLUE_BIAS 0x80BA
+#define GL_POST_COLOR_MATRIX_ALPHA_BIAS 0x80BB
+#define GL_HISTOGRAM 0x8024
+#define GL_PROXY_HISTOGRAM 0x8025
+#define GL_HISTOGRAM_WIDTH 0x8026
+#define GL_HISTOGRAM_FORMAT 0x8027
+#define GL_HISTOGRAM_RED_SIZE 0x8028
+#define GL_HISTOGRAM_GREEN_SIZE 0x8029
+#define GL_HISTOGRAM_BLUE_SIZE 0x802A
+#define GL_HISTOGRAM_ALPHA_SIZE 0x802B
+#define GL_HISTOGRAM_LUMINANCE_SIZE 0x802C
+#define GL_HISTOGRAM_SINK 0x802D
+#define GL_MINMAX 0x802E
+#define GL_MINMAX_FORMAT 0x802F
+#define GL_MINMAX_SINK 0x8030
+#define GL_TABLE_TOO_LARGE 0x8031
+#define GL_BLEND_EQUATION 0x8009
+#define GL_MIN 0x8007
+#define GL_MAX 0x8008
+#define GL_FUNC_ADD 0x8006
+#define GL_FUNC_SUBTRACT 0x800A
+#define GL_FUNC_REVERSE_SUBTRACT 0x800B
+#define GL_BLEND_COLOR 0x8005
+
+
+GLAPI void GLAPIENTRY glColorTable( GLenum target, GLenum internalformat,
+ GLsizei width, GLenum format,
+ GLenum type, const GLvoid *table );
+
+GLAPI void GLAPIENTRY glColorSubTable( GLenum target,
+ GLsizei start, GLsizei count,
+ GLenum format, GLenum type,
+ const GLvoid *data );
+
+GLAPI void GLAPIENTRY glColorTableParameteriv(GLenum target, GLenum pname,
+ const GLint *params);
+
+GLAPI void GLAPIENTRY glColorTableParameterfv(GLenum target, GLenum pname,
+ const GLfloat *params);
+
+GLAPI void GLAPIENTRY glCopyColorSubTable( GLenum target, GLsizei start,
+ GLint x, GLint y, GLsizei width );
+
+GLAPI void GLAPIENTRY glCopyColorTable( GLenum target, GLenum internalformat,
+ GLint x, GLint y, GLsizei width );
+
+GLAPI void GLAPIENTRY glGetColorTable( GLenum target, GLenum format,
+ GLenum type, GLvoid *table );
+
+GLAPI void GLAPIENTRY glGetColorTableParameterfv( GLenum target, GLenum pname,
+ GLfloat *params );
+
+GLAPI void GLAPIENTRY glGetColorTableParameteriv( GLenum target, GLenum pname,
+ GLint *params );
+
+GLAPI void GLAPIENTRY glBlendEquation( GLenum mode );
+
+GLAPI void GLAPIENTRY glBlendColor( GLclampf red, GLclampf green,
+ GLclampf blue, GLclampf alpha );
+
+GLAPI void GLAPIENTRY glHistogram( GLenum target, GLsizei width,
+ GLenum internalformat, GLboolean sink );
+
+GLAPI void GLAPIENTRY glResetHistogram( GLenum target );
+
+GLAPI void GLAPIENTRY glGetHistogram( GLenum target, GLboolean reset,
+ GLenum format, GLenum type,
+ GLvoid *values );
+
+GLAPI void GLAPIENTRY glGetHistogramParameterfv( GLenum target, GLenum pname,
+ GLfloat *params );
+
+GLAPI void GLAPIENTRY glGetHistogramParameteriv( GLenum target, GLenum pname,
+ GLint *params );
+
+GLAPI void GLAPIENTRY glMinmax( GLenum target, GLenum internalformat,
+ GLboolean sink );
+
+GLAPI void GLAPIENTRY glResetMinmax( GLenum target );
+
+GLAPI void GLAPIENTRY glGetMinmax( GLenum target, GLboolean reset,
+ GLenum format, GLenum types,
+ GLvoid *values );
+
+GLAPI void GLAPIENTRY glGetMinmaxParameterfv( GLenum target, GLenum pname,
+ GLfloat *params );
+
+GLAPI void GLAPIENTRY glGetMinmaxParameteriv( GLenum target, GLenum pname,
+ GLint *params );
+
+GLAPI void GLAPIENTRY glConvolutionFilter1D( GLenum target,
+ GLenum internalformat, GLsizei width, GLenum format, GLenum type,
+ const GLvoid *image );
+
+GLAPI void GLAPIENTRY glConvolutionFilter2D( GLenum target,
+ GLenum internalformat, GLsizei width, GLsizei height, GLenum format,
+ GLenum type, const GLvoid *image );
+
+GLAPI void GLAPIENTRY glConvolutionParameterf( GLenum target, GLenum pname,
+ GLfloat params );
+
+GLAPI void GLAPIENTRY glConvolutionParameterfv( GLenum target, GLenum pname,
+ const GLfloat *params );
+
+GLAPI void GLAPIENTRY glConvolutionParameteri( GLenum target, GLenum pname,
+ GLint params );
+
+GLAPI void GLAPIENTRY glConvolutionParameteriv( GLenum target, GLenum pname,
+ const GLint *params );
+
+GLAPI void GLAPIENTRY glCopyConvolutionFilter1D( GLenum target,
+ GLenum internalformat, GLint x, GLint y, GLsizei width );
+
+GLAPI void GLAPIENTRY glCopyConvolutionFilter2D( GLenum target,
+ GLenum internalformat, GLint x, GLint y, GLsizei width,
+ GLsizei height);
+
+GLAPI void GLAPIENTRY glGetConvolutionFilter( GLenum target, GLenum format,
+ GLenum type, GLvoid *image );
+
+GLAPI void GLAPIENTRY glGetConvolutionParameterfv( GLenum target, GLenum pname,
+ GLfloat *params );
+
+GLAPI void GLAPIENTRY glGetConvolutionParameteriv( GLenum target, GLenum pname,
+ GLint *params );
+
+GLAPI void GLAPIENTRY glSeparableFilter2D( GLenum target,
+ GLenum internalformat, GLsizei width, GLsizei height, GLenum format,
+ GLenum type, const GLvoid *row, const GLvoid *column );
+
+GLAPI void GLAPIENTRY glGetSeparableFilter( GLenum target, GLenum format,
+ GLenum type, GLvoid *row, GLvoid *column, GLvoid *span );
+
+typedef void (APIENTRYP PFNGLBLENDCOLORPROC) (GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha);
+typedef void (APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode);
+typedef void (APIENTRYP PFNGLCOLORTABLEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *table);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCOLORTABLEPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPROC) (GLenum target, GLenum format, GLenum type, GLvoid *table);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLCOLORSUBTABLEPROC) (GLenum target, GLsizei start, GLsizei count, GLenum format, GLenum type, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOPYCOLORSUBTABLEPROC) (GLenum target, GLsizei start, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER1DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER2DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIPROC) (GLenum target, GLenum pname, GLint params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER1DPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER2DPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONFILTERPROC) (GLenum target, GLenum format, GLenum type, GLvoid *image);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETSEPARABLEFILTERPROC) (GLenum target, GLenum format, GLenum type, GLvoid *row, GLvoid *column, GLvoid *span);
+typedef void (APIENTRYP PFNGLSEPARABLEFILTER2DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *row, const GLvoid *column);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETMINMAXPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLHISTOGRAMPROC) (GLenum target, GLsizei width, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLMINMAXPROC) (GLenum target, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLRESETHISTOGRAMPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLRESETMINMAXPROC) (GLenum target);
+
+
+
+/*
+ * OpenGL 1.3
+ */
+
+/* multitexture */
+#define GL_TEXTURE0 0x84C0
+#define GL_TEXTURE1 0x84C1
+#define GL_TEXTURE2 0x84C2
+#define GL_TEXTURE3 0x84C3
+#define GL_TEXTURE4 0x84C4
+#define GL_TEXTURE5 0x84C5
+#define GL_TEXTURE6 0x84C6
+#define GL_TEXTURE7 0x84C7
+#define GL_TEXTURE8 0x84C8
+#define GL_TEXTURE9 0x84C9
+#define GL_TEXTURE10 0x84CA
+#define GL_TEXTURE11 0x84CB
+#define GL_TEXTURE12 0x84CC
+#define GL_TEXTURE13 0x84CD
+#define GL_TEXTURE14 0x84CE
+#define GL_TEXTURE15 0x84CF
+#define GL_TEXTURE16 0x84D0
+#define GL_TEXTURE17 0x84D1
+#define GL_TEXTURE18 0x84D2
+#define GL_TEXTURE19 0x84D3
+#define GL_TEXTURE20 0x84D4
+#define GL_TEXTURE21 0x84D5
+#define GL_TEXTURE22 0x84D6
+#define GL_TEXTURE23 0x84D7
+#define GL_TEXTURE24 0x84D8
+#define GL_TEXTURE25 0x84D9
+#define GL_TEXTURE26 0x84DA
+#define GL_TEXTURE27 0x84DB
+#define GL_TEXTURE28 0x84DC
+#define GL_TEXTURE29 0x84DD
+#define GL_TEXTURE30 0x84DE
+#define GL_TEXTURE31 0x84DF
+#define GL_ACTIVE_TEXTURE 0x84E0
+#define GL_CLIENT_ACTIVE_TEXTURE 0x84E1
+#define GL_MAX_TEXTURE_UNITS 0x84E2
+/* texture_cube_map */
+#define GL_NORMAL_MAP 0x8511
+#define GL_REFLECTION_MAP 0x8512
+#define GL_TEXTURE_CUBE_MAP 0x8513
+#define GL_TEXTURE_BINDING_CUBE_MAP 0x8514
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_X 0x8515
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X 0x8516
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y 0x8517
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y 0x8518
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x8519
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x851A
+#define GL_PROXY_TEXTURE_CUBE_MAP 0x851B
+#define GL_MAX_CUBE_MAP_TEXTURE_SIZE 0x851C
+/* texture_compression */
+#define GL_COMPRESSED_ALPHA 0x84E9
+#define GL_COMPRESSED_LUMINANCE 0x84EA
+#define GL_COMPRESSED_LUMINANCE_ALPHA 0x84EB
+#define GL_COMPRESSED_INTENSITY 0x84EC
+#define GL_COMPRESSED_RGB 0x84ED
+#define GL_COMPRESSED_RGBA 0x84EE
+#define GL_TEXTURE_COMPRESSION_HINT 0x84EF
+#define GL_TEXTURE_COMPRESSED_IMAGE_SIZE 0x86A0
+#define GL_TEXTURE_COMPRESSED 0x86A1
+#define GL_NUM_COMPRESSED_TEXTURE_FORMATS 0x86A2
+#define GL_COMPRESSED_TEXTURE_FORMATS 0x86A3
+/* multisample */
+#define GL_MULTISAMPLE 0x809D
+#define GL_SAMPLE_ALPHA_TO_COVERAGE 0x809E
+#define GL_SAMPLE_ALPHA_TO_ONE 0x809F
+#define GL_SAMPLE_COVERAGE 0x80A0
+#define GL_SAMPLE_BUFFERS 0x80A8
+#define GL_SAMPLES 0x80A9
+#define GL_SAMPLE_COVERAGE_VALUE 0x80AA
+#define GL_SAMPLE_COVERAGE_INVERT 0x80AB
+#define GL_MULTISAMPLE_BIT 0x20000000
+/* transpose_matrix */
+#define GL_TRANSPOSE_MODELVIEW_MATRIX 0x84E3
+#define GL_TRANSPOSE_PROJECTION_MATRIX 0x84E4
+#define GL_TRANSPOSE_TEXTURE_MATRIX 0x84E5
+#define GL_TRANSPOSE_COLOR_MATRIX 0x84E6
+/* texture_env_combine */
+#define GL_COMBINE 0x8570
+#define GL_COMBINE_RGB 0x8571
+#define GL_COMBINE_ALPHA 0x8572
+#define GL_SOURCE0_RGB 0x8580
+#define GL_SOURCE1_RGB 0x8581
+#define GL_SOURCE2_RGB 0x8582
+#define GL_SOURCE0_ALPHA 0x8588
+#define GL_SOURCE1_ALPHA 0x8589
+#define GL_SOURCE2_ALPHA 0x858A
+#define GL_OPERAND0_RGB 0x8590
+#define GL_OPERAND1_RGB 0x8591
+#define GL_OPERAND2_RGB 0x8592
+#define GL_OPERAND0_ALPHA 0x8598
+#define GL_OPERAND1_ALPHA 0x8599
+#define GL_OPERAND2_ALPHA 0x859A
+#define GL_RGB_SCALE 0x8573
+#define GL_ADD_SIGNED 0x8574
+#define GL_INTERPOLATE 0x8575
+#define GL_SUBTRACT 0x84E7
+#define GL_CONSTANT 0x8576
+#define GL_PRIMARY_COLOR 0x8577
+#define GL_PREVIOUS 0x8578
+/* texture_env_dot3 */
+#define GL_DOT3_RGB 0x86AE
+#define GL_DOT3_RGBA 0x86AF
+/* texture_border_clamp */
+#define GL_CLAMP_TO_BORDER 0x812D
+
+GLAPI void GLAPIENTRY glActiveTexture( GLenum texture );
+
+GLAPI void GLAPIENTRY glClientActiveTexture( GLenum texture );
+
+GLAPI void GLAPIENTRY glCompressedTexImage1D( GLenum target, GLint level, GLenum internalformat, GLsizei width, GLint border, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glCompressedTexImage2D( GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glCompressedTexImage3D( GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glCompressedTexSubImage1D( GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glCompressedTexSubImage2D( GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glCompressedTexSubImage3D( GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data );
+
+GLAPI void GLAPIENTRY glGetCompressedTexImage( GLenum target, GLint lod, GLvoid *img );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1d( GLenum target, GLdouble s );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1dv( GLenum target, const GLdouble *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1f( GLenum target, GLfloat s );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1fv( GLenum target, const GLfloat *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1i( GLenum target, GLint s );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1iv( GLenum target, const GLint *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1s( GLenum target, GLshort s );
+
+GLAPI void GLAPIENTRY glMultiTexCoord1sv( GLenum target, const GLshort *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2d( GLenum target, GLdouble s, GLdouble t );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2dv( GLenum target, const GLdouble *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2f( GLenum target, GLfloat s, GLfloat t );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2fv( GLenum target, const GLfloat *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2i( GLenum target, GLint s, GLint t );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2iv( GLenum target, const GLint *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2s( GLenum target, GLshort s, GLshort t );
+
+GLAPI void GLAPIENTRY glMultiTexCoord2sv( GLenum target, const GLshort *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3d( GLenum target, GLdouble s, GLdouble t, GLdouble r );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3dv( GLenum target, const GLdouble *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3f( GLenum target, GLfloat s, GLfloat t, GLfloat r );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3fv( GLenum target, const GLfloat *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3i( GLenum target, GLint s, GLint t, GLint r );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3iv( GLenum target, const GLint *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3s( GLenum target, GLshort s, GLshort t, GLshort r );
+
+GLAPI void GLAPIENTRY glMultiTexCoord3sv( GLenum target, const GLshort *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4d( GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4dv( GLenum target, const GLdouble *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4f( GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4fv( GLenum target, const GLfloat *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4i( GLenum target, GLint s, GLint t, GLint r, GLint q );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4iv( GLenum target, const GLint *v );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4s( GLenum target, GLshort s, GLshort t, GLshort r, GLshort q );
+
+GLAPI void GLAPIENTRY glMultiTexCoord4sv( GLenum target, const GLshort *v );
+
+
+GLAPI void GLAPIENTRY glLoadTransposeMatrixd( const GLdouble m[16] );
+
+GLAPI void GLAPIENTRY glLoadTransposeMatrixf( const GLfloat m[16] );
+
+GLAPI void GLAPIENTRY glMultTransposeMatrixd( const GLdouble m[16] );
+
+GLAPI void GLAPIENTRY glMultTransposeMatrixf( const GLfloat m[16] );
+
+GLAPI void GLAPIENTRY glSampleCoverage( GLclampf value, GLboolean invert );
+
+typedef void (APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLCLIENTACTIVETEXTUREPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DPROC) (GLenum target, GLdouble s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FPROC) (GLenum target, GLfloat s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IPROC) (GLenum target, GLint s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SPROC) (GLenum target, GLshort s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DPROC) (GLenum target, GLdouble s, GLdouble t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FPROC) (GLenum target, GLfloat s, GLfloat t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IPROC) (GLenum target, GLint s, GLint t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SPROC) (GLenum target, GLshort s, GLshort t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IPROC) (GLenum target, GLint s, GLint t, GLint r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SPROC) (GLenum target, GLshort s, GLshort t, GLshort r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IPROC) (GLenum target, GLint s, GLint t, GLint r, GLint q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SPROC) (GLenum target, GLshort s, GLshort t, GLshort r, GLshort q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXFPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXDPROC) (const GLdouble *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXFPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXDPROC) (const GLdouble *m);
+typedef void (APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLclampf value, GLboolean invert);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE1DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC) (GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLGETCOMPRESSEDTEXIMAGEPROC) (GLenum target, GLint level, void *img);
+
+
+/*
+ * GL_ARB_multitexture (ARB extension 1 and OpenGL 1.2.1)
+ */
+#ifndef GL_ARB_multitexture
+#define GL_ARB_multitexture 1
+
+#define GL_TEXTURE0_ARB 0x84C0
+#define GL_TEXTURE1_ARB 0x84C1
+#define GL_TEXTURE2_ARB 0x84C2
+#define GL_TEXTURE3_ARB 0x84C3
+#define GL_TEXTURE4_ARB 0x84C4
+#define GL_TEXTURE5_ARB 0x84C5
+#define GL_TEXTURE6_ARB 0x84C6
+#define GL_TEXTURE7_ARB 0x84C7
+#define GL_TEXTURE8_ARB 0x84C8
+#define GL_TEXTURE9_ARB 0x84C9
+#define GL_TEXTURE10_ARB 0x84CA
+#define GL_TEXTURE11_ARB 0x84CB
+#define GL_TEXTURE12_ARB 0x84CC
+#define GL_TEXTURE13_ARB 0x84CD
+#define GL_TEXTURE14_ARB 0x84CE
+#define GL_TEXTURE15_ARB 0x84CF
+#define GL_TEXTURE16_ARB 0x84D0
+#define GL_TEXTURE17_ARB 0x84D1
+#define GL_TEXTURE18_ARB 0x84D2
+#define GL_TEXTURE19_ARB 0x84D3
+#define GL_TEXTURE20_ARB 0x84D4
+#define GL_TEXTURE21_ARB 0x84D5
+#define GL_TEXTURE22_ARB 0x84D6
+#define GL_TEXTURE23_ARB 0x84D7
+#define GL_TEXTURE24_ARB 0x84D8
+#define GL_TEXTURE25_ARB 0x84D9
+#define GL_TEXTURE26_ARB 0x84DA
+#define GL_TEXTURE27_ARB 0x84DB
+#define GL_TEXTURE28_ARB 0x84DC
+#define GL_TEXTURE29_ARB 0x84DD
+#define GL_TEXTURE30_ARB 0x84DE
+#define GL_TEXTURE31_ARB 0x84DF
+#define GL_ACTIVE_TEXTURE_ARB 0x84E0
+#define GL_CLIENT_ACTIVE_TEXTURE_ARB 0x84E1
+#define GL_MAX_TEXTURE_UNITS_ARB 0x84E2
+
+GLAPI void GLAPIENTRY glActiveTextureARB(GLenum texture);
+GLAPI void GLAPIENTRY glClientActiveTextureARB(GLenum texture);
+GLAPI void GLAPIENTRY glMultiTexCoord1dARB(GLenum target, GLdouble s);
+GLAPI void GLAPIENTRY glMultiTexCoord1dvARB(GLenum target, const GLdouble *v);
+GLAPI void GLAPIENTRY glMultiTexCoord1fARB(GLenum target, GLfloat s);
+GLAPI void GLAPIENTRY glMultiTexCoord1fvARB(GLenum target, const GLfloat *v);
+GLAPI void GLAPIENTRY glMultiTexCoord1iARB(GLenum target, GLint s);
+GLAPI void GLAPIENTRY glMultiTexCoord1ivARB(GLenum target, const GLint *v);
+GLAPI void GLAPIENTRY glMultiTexCoord1sARB(GLenum target, GLshort s);
+GLAPI void GLAPIENTRY glMultiTexCoord1svARB(GLenum target, const GLshort *v);
+GLAPI void GLAPIENTRY glMultiTexCoord2dARB(GLenum target, GLdouble s, GLdouble t);
+GLAPI void GLAPIENTRY glMultiTexCoord2dvARB(GLenum target, const GLdouble *v);
+GLAPI void GLAPIENTRY glMultiTexCoord2fARB(GLenum target, GLfloat s, GLfloat t);
+GLAPI void GLAPIENTRY glMultiTexCoord2fvARB(GLenum target, const GLfloat *v);
+GLAPI void GLAPIENTRY glMultiTexCoord2iARB(GLenum target, GLint s, GLint t);
+GLAPI void GLAPIENTRY glMultiTexCoord2ivARB(GLenum target, const GLint *v);
+GLAPI void GLAPIENTRY glMultiTexCoord2sARB(GLenum target, GLshort s, GLshort t);
+GLAPI void GLAPIENTRY glMultiTexCoord2svARB(GLenum target, const GLshort *v);
+GLAPI void GLAPIENTRY glMultiTexCoord3dARB(GLenum target, GLdouble s, GLdouble t, GLdouble r);
+GLAPI void GLAPIENTRY glMultiTexCoord3dvARB(GLenum target, const GLdouble *v);
+GLAPI void GLAPIENTRY glMultiTexCoord3fARB(GLenum target, GLfloat s, GLfloat t, GLfloat r);
+GLAPI void GLAPIENTRY glMultiTexCoord3fvARB(GLenum target, const GLfloat *v);
+GLAPI void GLAPIENTRY glMultiTexCoord3iARB(GLenum target, GLint s, GLint t, GLint r);
+GLAPI void GLAPIENTRY glMultiTexCoord3ivARB(GLenum target, const GLint *v);
+GLAPI void GLAPIENTRY glMultiTexCoord3sARB(GLenum target, GLshort s, GLshort t, GLshort r);
+GLAPI void GLAPIENTRY glMultiTexCoord3svARB(GLenum target, const GLshort *v);
+GLAPI void GLAPIENTRY glMultiTexCoord4dARB(GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q);
+GLAPI void GLAPIENTRY glMultiTexCoord4dvARB(GLenum target, const GLdouble *v);
+GLAPI void GLAPIENTRY glMultiTexCoord4fARB(GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q);
+GLAPI void GLAPIENTRY glMultiTexCoord4fvARB(GLenum target, const GLfloat *v);
+GLAPI void GLAPIENTRY glMultiTexCoord4iARB(GLenum target, GLint s, GLint t, GLint r, GLint q);
+GLAPI void GLAPIENTRY glMultiTexCoord4ivARB(GLenum target, const GLint *v);
+GLAPI void GLAPIENTRY glMultiTexCoord4sARB(GLenum target, GLshort s, GLshort t, GLshort r, GLshort q);
+GLAPI void GLAPIENTRY glMultiTexCoord4svARB(GLenum target, const GLshort *v);
+
+typedef void (APIENTRYP PFNGLACTIVETEXTUREARBPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLCLIENTACTIVETEXTUREARBPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DARBPROC) (GLenum target, GLdouble s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FARBPROC) (GLenum target, GLfloat s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IARBPROC) (GLenum target, GLint s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SARBPROC) (GLenum target, GLshort s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DARBPROC) (GLenum target, GLdouble s, GLdouble t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FARBPROC) (GLenum target, GLfloat s, GLfloat t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IARBPROC) (GLenum target, GLint s, GLint t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SARBPROC) (GLenum target, GLshort s, GLshort t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DARBPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FARBPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IARBPROC) (GLenum target, GLint s, GLint t, GLint r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SARBPROC) (GLenum target, GLshort s, GLshort t, GLshort r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DARBPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FARBPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IARBPROC) (GLenum target, GLint s, GLint t, GLint r, GLint q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SARBPROC) (GLenum target, GLshort s, GLshort t, GLshort r, GLshort q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SVARBPROC) (GLenum target, const GLshort *v);
+
+#endif /* GL_ARB_multitexture */
+
+
+
+/*
+ * Define this token if you want "old-style" header file behaviour (extensions
+ * defined in gl.h). Otherwise, extensions will be included from glext.h.
+ */
+#if defined(GL_GLEXT_LEGACY)
+
+/* All extensions that used to be here are now found in glext.h */
+
+#else /* GL_GLEXT_LEGACY */
+
+#include <GL/glext.h>
+
+#endif /* GL_GLEXT_LEGACY */
+
+
+
+#if GL_ARB_shader_objects
+
+#ifndef GL_MESA_shader_debug
+#define GL_MESA_shader_debug 1
+
+#define GL_DEBUG_OBJECT_MESA 0x8759
+#define GL_DEBUG_PRINT_MESA 0x875A
+#define GL_DEBUG_ASSERT_MESA 0x875B
+
+GLAPI GLhandleARB GLAPIENTRY glCreateDebugObjectMESA (void);
+GLAPI void GLAPIENTRY glClearDebugLogMESA (GLhandleARB obj, GLenum logType, GLenum shaderType);
+GLAPI void GLAPIENTRY glGetDebugLogMESA (GLhandleARB obj, GLenum logType, GLenum shaderType, GLsizei maxLength,
+ GLsizei *length, GLcharARB *debugLog);
+GLAPI GLsizei GLAPIENTRY glGetDebugLogLengthMESA (GLhandleARB obj, GLenum logType, GLenum shaderType);
+
+#endif /* GL_MESA_shader_debug */
+
+#endif /* GL_ARB_shader_objects */
+
+
+/*
+ * ???. GL_MESA_packed_depth_stencil
+ * XXX obsolete
+ */
+#ifndef GL_MESA_packed_depth_stencil
+#define GL_MESA_packed_depth_stencil 1
+
+#define GL_DEPTH_STENCIL_MESA 0x8750
+#define GL_UNSIGNED_INT_24_8_MESA 0x8751
+#define GL_UNSIGNED_INT_8_24_REV_MESA 0x8752
+#define GL_UNSIGNED_SHORT_15_1_MESA 0x8753
+#define GL_UNSIGNED_SHORT_1_15_REV_MESA 0x8754
+
+#endif /* GL_MESA_packed_depth_stencil */
+
+
+#ifndef GL_MESA_program_debug
+#define GL_MESA_program_debug 1
+
+#define GL_FRAGMENT_PROGRAM_POSITION_MESA 0x8bb0
+#define GL_FRAGMENT_PROGRAM_CALLBACK_MESA 0x8bb1
+#define GL_FRAGMENT_PROGRAM_CALLBACK_FUNC_MESA 0x8bb2
+#define GL_FRAGMENT_PROGRAM_CALLBACK_DATA_MESA 0x8bb3
+#define GL_VERTEX_PROGRAM_POSITION_MESA 0x8bb4
+#define GL_VERTEX_PROGRAM_CALLBACK_MESA 0x8bb5
+#define GL_VERTEX_PROGRAM_CALLBACK_FUNC_MESA 0x8bb6
+#define GL_VERTEX_PROGRAM_CALLBACK_DATA_MESA 0x8bb7
+
+typedef void (*GLprogramcallbackMESA)(GLenum target, GLvoid *data);
+
+GLAPI void GLAPIENTRY glProgramCallbackMESA(GLenum target, GLprogramcallbackMESA callback, GLvoid *data);
+
+GLAPI void GLAPIENTRY glGetProgramRegisterfvMESA(GLenum target, GLsizei len, const GLubyte *name, GLfloat *v);
+
+#endif /* GL_MESA_program_debug */
+
+
+#ifndef GL_ATI_blend_equation_separate
+#define GL_ATI_blend_equation_separate 1
+
+#define GL_ALPHA_BLEND_EQUATION_ATI 0x883D
+
+GLAPI void GLAPIENTRY glBlendEquationSeparateATI( GLenum modeRGB, GLenum modeA );
+typedef void (APIENTRYP PFNGLBLENDEQUATIONSEPARATEATIPROC) (GLenum modeRGB, GLenum modeA);
+
+#endif /* GL_ATI_blend_equation_separate */
+
+
+
+/**
+ ** NOTE!!!!! If you add new functions to this file, or update
+ ** glext.h be sure to regenerate the gl_mangle.h file. See comments
+ ** in that file for details.
+ **/
+
+
+
+/**********************************************************************
+ * Begin system-specific stuff
+ */
+#if defined(PRAGMA_EXPORT_SUPPORTED)
+#pragma export off
+#endif
+
+#if defined(macintosh) && PRAGMA_IMPORT_SUPPORTED
+#pragma import off
+#endif
+/*
+ * End system-specific stuff
+ **********************************************************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gl_h_ */
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl_mangle.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl_mangle.h
new file mode 100644
index 0000000..1dcd4a8
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/gl_mangle.h
@@ -0,0 +1,1568 @@
+#if 0
+#define GL_MANGLE_C1 "DO NOT EDIT!!! - TO REGENERATE from gl.h, EXECUTE THIS FILE IN SHELL (/bin/sh) and save the output"
+#define GL_MANGLE_C2 "This file is used to create GL function protypes and aliases for the function names"
+ files="gl.h glext.h"
+#define GL_MANGLE_C3 "get regeneration header - copy everything in this file above the 'REGENERATE_TO_END' line"
+ awk '!done; /^\/\*REGENERATE_TO_END/ {done=1}' $0
+ echo ""
+#define GL_MANGLE_C4 get aliases
+ grep '^GLAPI' $files | sed -e 's/.*ENTRY gl\([^( ]*\).*$/#define gl\1 MANGLE(\1)/' | sort | uniq
+ echo ""
+ echo "#endif /* GL_MANGLE_H */"
+ exit
+#endif /* REGENERATION */
+
+/*
+ * If you compile Mesa with USE_MGL_NAMESPACE defined then you can link
+ * your application both with OpenGL and Mesa. The Mesa functions will
+ * be redefined so they are prefixed with "mgl" instead of "gl".
+ * Mgl contributed by Randy Frank (rfrank@rsinc.com)
+ * Regneration code contributed by Ray Tice (rayt@ma.ultra.net)
+ */
+
+#ifndef GL_MANGLE_H
+#define GL_MANGLE_H
+
+#ifndef MANGLE
+#define MANGLE(x) mgl##x
+#endif /*MANGLE*/
+
+/*REGENERATE_TO_END-----------ALL LINES BELOW HERE GET REPLACED ON REGENERATION */
+
+#define glAccum MANGLE(Accum)
+#define glActiveStencilFaceEXT MANGLE(ActiveStencilFaceEXT)
+#define glActiveTextureARB MANGLE(ActiveTextureARB)
+#define glActiveTexture MANGLE(ActiveTexture)
+#define glActiveVaryingNV MANGLE(ActiveVaryingNV)
+#define glAlphaFragmentOp1ATI MANGLE(AlphaFragmentOp1ATI)
+#define glAlphaFragmentOp2ATI MANGLE(AlphaFragmentOp2ATI)
+#define glAlphaFragmentOp3ATI MANGLE(AlphaFragmentOp3ATI)
+#define glAlphaFunc MANGLE(AlphaFunc)
+#define glApplyTextureEXT MANGLE(ApplyTextureEXT)
+#define glAreProgramsResidentNV MANGLE(AreProgramsResidentNV)
+#define glAreTexturesResidentEXT MANGLE(AreTexturesResidentEXT)
+#define glAreTexturesResident MANGLE(AreTexturesResident)
+#define glArrayElementEXT MANGLE(ArrayElementEXT)
+#define glArrayElement MANGLE(ArrayElement)
+#define glArrayObjectATI MANGLE(ArrayObjectATI)
+#define glAsyncMarkerSGIX MANGLE(AsyncMarkerSGIX)
+#define glAttachObjectARB MANGLE(AttachObjectARB)
+#define glAttachShader MANGLE(AttachShader)
+#define glBeginFragmentShaderATI MANGLE(BeginFragmentShaderATI)
+#define glBegin MANGLE(Begin)
+#define glBeginOcclusionQueryNV MANGLE(BeginOcclusionQueryNV)
+#define glBeginQueryARB MANGLE(BeginQueryARB)
+#define glBeginQuery MANGLE(BeginQuery)
+#define glBeginTransformFeedbackNV MANGLE(BeginTransformFeedbackNV)
+#define glBeginVertexShaderEXT MANGLE(BeginVertexShaderEXT)
+#define glBindAttribLocationARB MANGLE(BindAttribLocationARB)
+#define glBindAttribLocation MANGLE(BindAttribLocation)
+#define glBindBufferARB MANGLE(BindBufferARB)
+#define glBindBufferBaseNV MANGLE(BindBufferBaseNV)
+#define glBindBuffer MANGLE(BindBuffer)
+#define glBindBufferOffsetNV MANGLE(BindBufferOffsetNV)
+#define glBindBufferRangeNV MANGLE(BindBufferRangeNV)
+#define glBindFragDataLocationEXT MANGLE(BindFragDataLocationEXT)
+#define glBindFragmentShaderATI MANGLE(BindFragmentShaderATI)
+#define glBindFramebufferEXT MANGLE(BindFramebufferEXT)
+#define glBindLightParameterEXT MANGLE(BindLightParameterEXT)
+#define glBindMaterialParameterEXT MANGLE(BindMaterialParameterEXT)
+#define glBindParameterEXT MANGLE(BindParameterEXT)
+#define glBindProgramARB MANGLE(BindProgramARB)
+#define glBindProgramNV MANGLE(BindProgramNV)
+#define glBindRenderbufferEXT MANGLE(BindRenderbufferEXT)
+#define glBindTexGenParameterEXT MANGLE(BindTexGenParameterEXT)
+#define glBindTextureEXT MANGLE(BindTextureEXT)
+#define glBindTexture MANGLE(BindTexture)
+#define glBindTextureUnitParameterEXT MANGLE(BindTextureUnitParameterEXT)
+#define glBindVertexArrayAPPLE MANGLE(BindVertexArrayAPPLE)
+#define glBindVertexShaderEXT MANGLE(BindVertexShaderEXT)
+#define glBinormal3bEXT MANGLE(Binormal3bEXT)
+#define glBinormal3bvEXT MANGLE(Binormal3bvEXT)
+#define glBinormal3dEXT MANGLE(Binormal3dEXT)
+#define glBinormal3dvEXT MANGLE(Binormal3dvEXT)
+#define glBinormal3fEXT MANGLE(Binormal3fEXT)
+#define glBinormal3fvEXT MANGLE(Binormal3fvEXT)
+#define glBinormal3iEXT MANGLE(Binormal3iEXT)
+#define glBinormal3ivEXT MANGLE(Binormal3ivEXT)
+#define glBinormal3sEXT MANGLE(Binormal3sEXT)
+#define glBinormal3svEXT MANGLE(Binormal3svEXT)
+#define glBinormalPointerEXT MANGLE(BinormalPointerEXT)
+#define glBitmap MANGLE(Bitmap)
+#define glBlendColorEXT MANGLE(BlendColorEXT)
+#define glBlendColor MANGLE(BlendColor)
+#define glBlendEquationEXT MANGLE(BlendEquationEXT)
+#define glBlendEquation MANGLE(BlendEquation)
+#define glBlendEquationSeparateATI MANGLE(BlendEquationSeparateATI)
+#define glBlendEquationSeparateEXT MANGLE(BlendEquationSeparateEXT)
+#define glBlendEquationSeparate MANGLE(BlendEquationSeparate)
+#define glBlendFunc MANGLE(BlendFunc)
+#define glBlendFuncSeparateEXT MANGLE(BlendFuncSeparateEXT)
+#define glBlendFuncSeparateINGR MANGLE(BlendFuncSeparateINGR)
+#define glBlendFuncSeparate MANGLE(BlendFuncSeparate)
+#define glBlitFramebufferEXT MANGLE(BlitFramebufferEXT)
+#define glBufferDataARB MANGLE(BufferDataARB)
+#define glBufferData MANGLE(BufferData)
+#define glBufferParameteriAPPLE MANGLE(BufferParameteriAPPLE)
+#define glBufferSubDataARB MANGLE(BufferSubDataARB)
+#define glBufferSubData MANGLE(BufferSubData)
+#define glCallList MANGLE(CallList)
+#define glCallLists MANGLE(CallLists)
+#define glCheckFramebufferStatusEXT MANGLE(CheckFramebufferStatusEXT)
+#define glClampColorARB MANGLE(ClampColorARB)
+#define glClearAccum MANGLE(ClearAccum)
+#define glClearColorIiEXT MANGLE(ClearColorIiEXT)
+#define glClearColorIuiEXT MANGLE(ClearColorIuiEXT)
+#define glClearColor MANGLE(ClearColor)
+#define glClearDebugLogMESA MANGLE(ClearDebugLogMESA)
+#define glClearDepthdNV MANGLE(ClearDepthdNV)
+#define glClearDepth MANGLE(ClearDepth)
+#define glClearIndex MANGLE(ClearIndex)
+#define glClear MANGLE(Clear)
+#define glClearStencil MANGLE(ClearStencil)
+#define glClientActiveTextureARB MANGLE(ClientActiveTextureARB)
+#define glClientActiveTexture MANGLE(ClientActiveTexture)
+#define glClientActiveVertexStreamATI MANGLE(ClientActiveVertexStreamATI)
+#define glClipPlane MANGLE(ClipPlane)
+#define glColor3b MANGLE(Color3b)
+#define glColor3bv MANGLE(Color3bv)
+#define glColor3d MANGLE(Color3d)
+#define glColor3dv MANGLE(Color3dv)
+#define glColor3f MANGLE(Color3f)
+#define glColor3fVertex3fSUN MANGLE(Color3fVertex3fSUN)
+#define glColor3fVertex3fvSUN MANGLE(Color3fVertex3fvSUN)
+#define glColor3fv MANGLE(Color3fv)
+#define glColor3hNV MANGLE(Color3hNV)
+#define glColor3hvNV MANGLE(Color3hvNV)
+#define glColor3i MANGLE(Color3i)
+#define glColor3iv MANGLE(Color3iv)
+#define glColor3s MANGLE(Color3s)
+#define glColor3sv MANGLE(Color3sv)
+#define glColor3ub MANGLE(Color3ub)
+#define glColor3ubv MANGLE(Color3ubv)
+#define glColor3ui MANGLE(Color3ui)
+#define glColor3uiv MANGLE(Color3uiv)
+#define glColor3us MANGLE(Color3us)
+#define glColor3usv MANGLE(Color3usv)
+#define glColor4b MANGLE(Color4b)
+#define glColor4bv MANGLE(Color4bv)
+#define glColor4d MANGLE(Color4d)
+#define glColor4dv MANGLE(Color4dv)
+#define glColor4f MANGLE(Color4f)
+#define glColor4fNormal3fVertex3fSUN MANGLE(Color4fNormal3fVertex3fSUN)
+#define glColor4fNormal3fVertex3fvSUN MANGLE(Color4fNormal3fVertex3fvSUN)
+#define glColor4fv MANGLE(Color4fv)
+#define glColor4hNV MANGLE(Color4hNV)
+#define glColor4hvNV MANGLE(Color4hvNV)
+#define glColor4i MANGLE(Color4i)
+#define glColor4iv MANGLE(Color4iv)
+#define glColor4s MANGLE(Color4s)
+#define glColor4sv MANGLE(Color4sv)
+#define glColor4ub MANGLE(Color4ub)
+#define glColor4ubVertex2fSUN MANGLE(Color4ubVertex2fSUN)
+#define glColor4ubVertex2fvSUN MANGLE(Color4ubVertex2fvSUN)
+#define glColor4ubVertex3fSUN MANGLE(Color4ubVertex3fSUN)
+#define glColor4ubVertex3fvSUN MANGLE(Color4ubVertex3fvSUN)
+#define glColor4ubv MANGLE(Color4ubv)
+#define glColor4ui MANGLE(Color4ui)
+#define glColor4uiv MANGLE(Color4uiv)
+#define glColor4us MANGLE(Color4us)
+#define glColor4usv MANGLE(Color4usv)
+#define glColorFragmentOp1ATI MANGLE(ColorFragmentOp1ATI)
+#define glColorFragmentOp2ATI MANGLE(ColorFragmentOp2ATI)
+#define glColorFragmentOp3ATI MANGLE(ColorFragmentOp3ATI)
+#define glColorMaskIndexedEXT MANGLE(ColorMaskIndexedEXT)
+#define glColorMask MANGLE(ColorMask)
+#define glColorMaterial MANGLE(ColorMaterial)
+#define glColorPointerEXT MANGLE(ColorPointerEXT)
+#define glColorPointerListIBM MANGLE(ColorPointerListIBM)
+#define glColorPointer MANGLE(ColorPointer)
+#define glColorPointervINTEL MANGLE(ColorPointervINTEL)
+#define glColorSubTableEXT MANGLE(ColorSubTableEXT)
+#define glColorSubTable MANGLE(ColorSubTable)
+#define glColorTableEXT MANGLE(ColorTableEXT)
+#define glColorTable MANGLE(ColorTable)
+#define glColorTableParameterfv MANGLE(ColorTableParameterfv)
+#define glColorTableParameterfvSGI MANGLE(ColorTableParameterfvSGI)
+#define glColorTableParameteriv MANGLE(ColorTableParameteriv)
+#define glColorTableParameterivSGI MANGLE(ColorTableParameterivSGI)
+#define glColorTableSGI MANGLE(ColorTableSGI)
+#define glCombinerInputNV MANGLE(CombinerInputNV)
+#define glCombinerOutputNV MANGLE(CombinerOutputNV)
+#define glCombinerParameterfNV MANGLE(CombinerParameterfNV)
+#define glCombinerParameterfvNV MANGLE(CombinerParameterfvNV)
+#define glCombinerParameteriNV MANGLE(CombinerParameteriNV)
+#define glCombinerParameterivNV MANGLE(CombinerParameterivNV)
+#define glCombinerStageParameterfvNV MANGLE(CombinerStageParameterfvNV)
+#define glCompileShaderARB MANGLE(CompileShaderARB)
+#define glCompileShader MANGLE(CompileShader)
+#define glCompressedTexImage1DARB MANGLE(CompressedTexImage1DARB)
+#define glCompressedTexImage1D MANGLE(CompressedTexImage1D)
+#define glCompressedTexImage2DARB MANGLE(CompressedTexImage2DARB)
+#define glCompressedTexImage2D MANGLE(CompressedTexImage2D)
+#define glCompressedTexImage3DARB MANGLE(CompressedTexImage3DARB)
+#define glCompressedTexImage3D MANGLE(CompressedTexImage3D)
+#define glCompressedTexSubImage1DARB MANGLE(CompressedTexSubImage1DARB)
+#define glCompressedTexSubImage1D MANGLE(CompressedTexSubImage1D)
+#define glCompressedTexSubImage2DARB MANGLE(CompressedTexSubImage2DARB)
+#define glCompressedTexSubImage2D MANGLE(CompressedTexSubImage2D)
+#define glCompressedTexSubImage3DARB MANGLE(CompressedTexSubImage3DARB)
+#define glCompressedTexSubImage3D MANGLE(CompressedTexSubImage3D)
+#define glConvolutionFilter1DEXT MANGLE(ConvolutionFilter1DEXT)
+#define glConvolutionFilter1D MANGLE(ConvolutionFilter1D)
+#define glConvolutionFilter2DEXT MANGLE(ConvolutionFilter2DEXT)
+#define glConvolutionFilter2D MANGLE(ConvolutionFilter2D)
+#define glConvolutionParameterfEXT MANGLE(ConvolutionParameterfEXT)
+#define glConvolutionParameterf MANGLE(ConvolutionParameterf)
+#define glConvolutionParameterfvEXT MANGLE(ConvolutionParameterfvEXT)
+#define glConvolutionParameterfv MANGLE(ConvolutionParameterfv)
+#define glConvolutionParameteriEXT MANGLE(ConvolutionParameteriEXT)
+#define glConvolutionParameteri MANGLE(ConvolutionParameteri)
+#define glConvolutionParameterivEXT MANGLE(ConvolutionParameterivEXT)
+#define glConvolutionParameteriv MANGLE(ConvolutionParameteriv)
+#define glCopyColorSubTableEXT MANGLE(CopyColorSubTableEXT)
+#define glCopyColorSubTable MANGLE(CopyColorSubTable)
+#define glCopyColorTable MANGLE(CopyColorTable)
+#define glCopyColorTableSGI MANGLE(CopyColorTableSGI)
+#define glCopyConvolutionFilter1DEXT MANGLE(CopyConvolutionFilter1DEXT)
+#define glCopyConvolutionFilter1D MANGLE(CopyConvolutionFilter1D)
+#define glCopyConvolutionFilter2DEXT MANGLE(CopyConvolutionFilter2DEXT)
+#define glCopyConvolutionFilter2D MANGLE(CopyConvolutionFilter2D)
+#define glCopyPixels MANGLE(CopyPixels)
+#define glCopyTexImage1DEXT MANGLE(CopyTexImage1DEXT)
+#define glCopyTexImage1D MANGLE(CopyTexImage1D)
+#define glCopyTexImage2DEXT MANGLE(CopyTexImage2DEXT)
+#define glCopyTexImage2D MANGLE(CopyTexImage2D)
+#define glCopyTexSubImage1DEXT MANGLE(CopyTexSubImage1DEXT)
+#define glCopyTexSubImage1D MANGLE(CopyTexSubImage1D)
+#define glCopyTexSubImage2DEXT MANGLE(CopyTexSubImage2DEXT)
+#define glCopyTexSubImage2D MANGLE(CopyTexSubImage2D)
+#define glCopyTexSubImage3DEXT MANGLE(CopyTexSubImage3DEXT)
+#define glCopyTexSubImage3D MANGLE(CopyTexSubImage3D)
+#define glCreateDebugObjectMESA MANGLE(CreateDebugObjectMESA)
+#define glCreateProgram MANGLE(CreateProgram)
+#define glCreateProgramObjectARB MANGLE(CreateProgramObjectARB)
+#define glCreateShader MANGLE(CreateShader)
+#define glCreateShaderObjectARB MANGLE(CreateShaderObjectARB)
+#define glCullFace MANGLE(CullFace)
+#define glCullParameterdvEXT MANGLE(CullParameterdvEXT)
+#define glCullParameterfvEXT MANGLE(CullParameterfvEXT)
+#define glCurrentPaletteMatrixARB MANGLE(CurrentPaletteMatrixARB)
+#define glDeformationMap3dSGIX MANGLE(DeformationMap3dSGIX)
+#define glDeformationMap3fSGIX MANGLE(DeformationMap3fSGIX)
+#define glDeformSGIX MANGLE(DeformSGIX)
+#define glDeleteAsyncMarkersSGIX MANGLE(DeleteAsyncMarkersSGIX)
+#define glDeleteBuffersARB MANGLE(DeleteBuffersARB)
+#define glDeleteBuffers MANGLE(DeleteBuffers)
+#define glDeleteFencesAPPLE MANGLE(DeleteFencesAPPLE)
+#define glDeleteFencesNV MANGLE(DeleteFencesNV)
+#define glDeleteFragmentShaderATI MANGLE(DeleteFragmentShaderATI)
+#define glDeleteFramebuffersEXT MANGLE(DeleteFramebuffersEXT)
+#define glDeleteLists MANGLE(DeleteLists)
+#define glDeleteObjectARB MANGLE(DeleteObjectARB)
+#define glDeleteOcclusionQueriesNV MANGLE(DeleteOcclusionQueriesNV)
+#define glDeleteProgram MANGLE(DeleteProgram)
+#define glDeleteProgramsARB MANGLE(DeleteProgramsARB)
+#define glDeleteProgramsNV MANGLE(DeleteProgramsNV)
+#define glDeleteQueriesARB MANGLE(DeleteQueriesARB)
+#define glDeleteQueries MANGLE(DeleteQueries)
+#define glDeleteRenderbuffersEXT MANGLE(DeleteRenderbuffersEXT)
+#define glDeleteShader MANGLE(DeleteShader)
+#define glDeleteTexturesEXT MANGLE(DeleteTexturesEXT)
+#define glDeleteTextures MANGLE(DeleteTextures)
+#define glDeleteVertexArraysAPPLE MANGLE(DeleteVertexArraysAPPLE)
+#define glDeleteVertexShaderEXT MANGLE(DeleteVertexShaderEXT)
+#define glDepthBoundsdNV MANGLE(DepthBoundsdNV)
+#define glDepthBoundsEXT MANGLE(DepthBoundsEXT)
+#define glDepthFunc MANGLE(DepthFunc)
+#define glDepthMask MANGLE(DepthMask)
+#define glDepthRangedNV MANGLE(DepthRangedNV)
+#define glDepthRange MANGLE(DepthRange)
+#define glDetachObjectARB MANGLE(DetachObjectARB)
+#define glDetachShader MANGLE(DetachShader)
+#define glDetailTexFuncSGIS MANGLE(DetailTexFuncSGIS)
+#define glDisableClientState MANGLE(DisableClientState)
+#define glDisableIndexedEXT MANGLE(DisableIndexedEXT)
+#define glDisable MANGLE(Disable)
+#define glDisableVariantClientStateEXT MANGLE(DisableVariantClientStateEXT)
+#define glDisableVertexAttribArrayARB MANGLE(DisableVertexAttribArrayARB)
+#define glDisableVertexAttribArray MANGLE(DisableVertexAttribArray)
+#define glDrawArraysEXT MANGLE(DrawArraysEXT)
+#define glDrawArraysInstancedEXT MANGLE(DrawArraysInstancedEXT)
+#define glDrawArrays MANGLE(DrawArrays)
+#define glDrawBuffer MANGLE(DrawBuffer)
+#define glDrawBuffersARB MANGLE(DrawBuffersARB)
+#define glDrawBuffersATI MANGLE(DrawBuffersATI)
+#define glDrawBuffers MANGLE(DrawBuffers)
+#define glDrawElementArrayAPPLE MANGLE(DrawElementArrayAPPLE)
+#define glDrawElementArrayATI MANGLE(DrawElementArrayATI)
+#define glDrawElementsInstancedEXT MANGLE(DrawElementsInstancedEXT)
+#define glDrawElements MANGLE(DrawElements)
+#define glDrawMeshArraysSUN MANGLE(DrawMeshArraysSUN)
+#define glDrawPixels MANGLE(DrawPixels)
+#define glDrawRangeElementArrayAPPLE MANGLE(DrawRangeElementArrayAPPLE)
+#define glDrawRangeElementArrayATI MANGLE(DrawRangeElementArrayATI)
+#define glDrawRangeElementsEXT MANGLE(DrawRangeElementsEXT)
+#define glDrawRangeElements MANGLE(DrawRangeElements)
+#define glEdgeFlag MANGLE(EdgeFlag)
+#define glEdgeFlagPointerEXT MANGLE(EdgeFlagPointerEXT)
+#define glEdgeFlagPointerListIBM MANGLE(EdgeFlagPointerListIBM)
+#define glEdgeFlagPointer MANGLE(EdgeFlagPointer)
+#define glEdgeFlagv MANGLE(EdgeFlagv)
+#define glElementPointerAPPLE MANGLE(ElementPointerAPPLE)
+#define glElementPointerATI MANGLE(ElementPointerATI)
+#define glEnableClientState MANGLE(EnableClientState)
+#define glEnableIndexedEXT MANGLE(EnableIndexedEXT)
+#define glEnable MANGLE(Enable)
+#define glEnableVariantClientStateEXT MANGLE(EnableVariantClientStateEXT)
+#define glEnableVertexAttribArrayARB MANGLE(EnableVertexAttribArrayARB)
+#define glEnableVertexAttribArray MANGLE(EnableVertexAttribArray)
+#define glEndFragmentShaderATI MANGLE(EndFragmentShaderATI)
+#define glEndList MANGLE(EndList)
+#define glEnd MANGLE(End)
+#define glEndOcclusionQueryNV MANGLE(EndOcclusionQueryNV)
+#define glEndQueryARB MANGLE(EndQueryARB)
+#define glEndQuery MANGLE(EndQuery)
+#define glEndTransformFeedbackNV MANGLE(EndTransformFeedbackNV)
+#define glEndVertexShaderEXT MANGLE(EndVertexShaderEXT)
+#define glEvalCoord1d MANGLE(EvalCoord1d)
+#define glEvalCoord1dv MANGLE(EvalCoord1dv)
+#define glEvalCoord1f MANGLE(EvalCoord1f)
+#define glEvalCoord1fv MANGLE(EvalCoord1fv)
+#define glEvalCoord2d MANGLE(EvalCoord2d)
+#define glEvalCoord2dv MANGLE(EvalCoord2dv)
+#define glEvalCoord2f MANGLE(EvalCoord2f)
+#define glEvalCoord2fv MANGLE(EvalCoord2fv)
+#define glEvalMapsNV MANGLE(EvalMapsNV)
+#define glEvalMesh1 MANGLE(EvalMesh1)
+#define glEvalMesh2 MANGLE(EvalMesh2)
+#define glEvalPoint1 MANGLE(EvalPoint1)
+#define glEvalPoint2 MANGLE(EvalPoint2)
+#define glExecuteProgramNV MANGLE(ExecuteProgramNV)
+#define glExtractComponentEXT MANGLE(ExtractComponentEXT)
+#define glFeedbackBuffer MANGLE(FeedbackBuffer)
+#define glFinalCombinerInputNV MANGLE(FinalCombinerInputNV)
+#define glFinishAsyncSGIX MANGLE(FinishAsyncSGIX)
+#define glFinishFenceAPPLE MANGLE(FinishFenceAPPLE)
+#define glFinishFenceNV MANGLE(FinishFenceNV)
+#define glFinish MANGLE(Finish)
+#define glFinishObjectAPPLE MANGLE(FinishObjectAPPLE)
+#define glFinishTextureSUNX MANGLE(FinishTextureSUNX)
+#define glFlush MANGLE(Flush)
+#define glFlushMappedBufferRangeAPPLE MANGLE(FlushMappedBufferRangeAPPLE)
+#define glFlushPixelDataRangeNV MANGLE(FlushPixelDataRangeNV)
+#define glFlushRasterSGIX MANGLE(FlushRasterSGIX)
+#define glFlushVertexArrayRangeAPPLE MANGLE(FlushVertexArrayRangeAPPLE)
+#define glFlushVertexArrayRangeNV MANGLE(FlushVertexArrayRangeNV)
+#define glFogCoorddEXT MANGLE(FogCoorddEXT)
+#define glFogCoordd MANGLE(FogCoordd)
+#define glFogCoorddvEXT MANGLE(FogCoorddvEXT)
+#define glFogCoorddv MANGLE(FogCoorddv)
+#define glFogCoordfEXT MANGLE(FogCoordfEXT)
+#define glFogCoordf MANGLE(FogCoordf)
+#define glFogCoordfvEXT MANGLE(FogCoordfvEXT)
+#define glFogCoordfv MANGLE(FogCoordfv)
+#define glFogCoordhNV MANGLE(FogCoordhNV)
+#define glFogCoordhvNV MANGLE(FogCoordhvNV)
+#define glFogCoordPointerEXT MANGLE(FogCoordPointerEXT)
+#define glFogCoordPointerListIBM MANGLE(FogCoordPointerListIBM)
+#define glFogCoordPointer MANGLE(FogCoordPointer)
+#define glFogf MANGLE(Fogf)
+#define glFogFuncSGIS MANGLE(FogFuncSGIS)
+#define glFogfv MANGLE(Fogfv)
+#define glFogi MANGLE(Fogi)
+#define glFogiv MANGLE(Fogiv)
+#define glFragmentColorMaterialSGIX MANGLE(FragmentColorMaterialSGIX)
+#define glFragmentLightfSGIX MANGLE(FragmentLightfSGIX)
+#define glFragmentLightfvSGIX MANGLE(FragmentLightfvSGIX)
+#define glFragmentLightiSGIX MANGLE(FragmentLightiSGIX)
+#define glFragmentLightivSGIX MANGLE(FragmentLightivSGIX)
+#define glFragmentLightModelfSGIX MANGLE(FragmentLightModelfSGIX)
+#define glFragmentLightModelfvSGIX MANGLE(FragmentLightModelfvSGIX)
+#define glFragmentLightModeliSGIX MANGLE(FragmentLightModeliSGIX)
+#define glFragmentLightModelivSGIX MANGLE(FragmentLightModelivSGIX)
+#define glFragmentMaterialfSGIX MANGLE(FragmentMaterialfSGIX)
+#define glFragmentMaterialfvSGIX MANGLE(FragmentMaterialfvSGIX)
+#define glFragmentMaterialiSGIX MANGLE(FragmentMaterialiSGIX)
+#define glFragmentMaterialivSGIX MANGLE(FragmentMaterialivSGIX)
+#define glFramebufferRenderbufferEXT MANGLE(FramebufferRenderbufferEXT)
+#define glFramebufferTexture1DEXT MANGLE(FramebufferTexture1DEXT)
+#define glFramebufferTexture2DEXT MANGLE(FramebufferTexture2DEXT)
+#define glFramebufferTexture3DEXT MANGLE(FramebufferTexture3DEXT)
+#define glFramebufferTextureEXT MANGLE(FramebufferTextureEXT)
+#define glFramebufferTextureFaceEXT MANGLE(FramebufferTextureFaceEXT)
+#define glFramebufferTextureLayerEXT MANGLE(FramebufferTextureLayerEXT)
+#define glFrameZoomSGIX MANGLE(FrameZoomSGIX)
+#define glFreeObjectBufferATI MANGLE(FreeObjectBufferATI)
+#define glFrontFace MANGLE(FrontFace)
+#define glFrustum MANGLE(Frustum)
+#define glGenAsyncMarkersSGIX MANGLE(GenAsyncMarkersSGIX)
+#define glGenBuffersARB MANGLE(GenBuffersARB)
+#define glGenBuffers MANGLE(GenBuffers)
+#define glGenerateMipmapEXT MANGLE(GenerateMipmapEXT)
+#define glGenFencesAPPLE MANGLE(GenFencesAPPLE)
+#define glGenFencesNV MANGLE(GenFencesNV)
+#define glGenFragmentShadersATI MANGLE(GenFragmentShadersATI)
+#define glGenFramebuffersEXT MANGLE(GenFramebuffersEXT)
+#define glGenLists MANGLE(GenLists)
+#define glGenOcclusionQueriesNV MANGLE(GenOcclusionQueriesNV)
+#define glGenProgramsARB MANGLE(GenProgramsARB)
+#define glGenProgramsNV MANGLE(GenProgramsNV)
+#define glGenQueriesARB MANGLE(GenQueriesARB)
+#define glGenQueries MANGLE(GenQueries)
+#define glGenRenderbuffersEXT MANGLE(GenRenderbuffersEXT)
+#define glGenSymbolsEXT MANGLE(GenSymbolsEXT)
+#define glGenTexturesEXT MANGLE(GenTexturesEXT)
+#define glGenTextures MANGLE(GenTextures)
+#define glGenVertexArraysAPPLE MANGLE(GenVertexArraysAPPLE)
+#define glGenVertexShadersEXT MANGLE(GenVertexShadersEXT)
+#define glGetActiveAttribARB MANGLE(GetActiveAttribARB)
+#define glGetActiveAttrib MANGLE(GetActiveAttrib)
+#define glGetActiveUniformARB MANGLE(GetActiveUniformARB)
+#define glGetActiveUniform MANGLE(GetActiveUniform)
+#define glGetActiveVaryingNV MANGLE(GetActiveVaryingNV)
+#define glGetArrayObjectfvATI MANGLE(GetArrayObjectfvATI)
+#define glGetArrayObjectivATI MANGLE(GetArrayObjectivATI)
+#define glGetAttachedObjectsARB MANGLE(GetAttachedObjectsARB)
+#define glGetAttachedShaders MANGLE(GetAttachedShaders)
+#define glGetAttribLocationARB MANGLE(GetAttribLocationARB)
+#define glGetAttribLocation MANGLE(GetAttribLocation)
+#define glGetBooleanIndexedvEXT MANGLE(GetBooleanIndexedvEXT)
+#define glGetBooleanv MANGLE(GetBooleanv)
+#define glGetBufferParameterivARB MANGLE(GetBufferParameterivARB)
+#define glGetBufferParameteriv MANGLE(GetBufferParameteriv)
+#define glGetBufferPointervARB MANGLE(GetBufferPointervARB)
+#define glGetBufferPointerv MANGLE(GetBufferPointerv)
+#define glGetBufferSubDataARB MANGLE(GetBufferSubDataARB)
+#define glGetBufferSubData MANGLE(GetBufferSubData)
+#define glGetClipPlane MANGLE(GetClipPlane)
+#define glGetColorTableEXT MANGLE(GetColorTableEXT)
+#define glGetColorTable MANGLE(GetColorTable)
+#define glGetColorTableParameterfvEXT MANGLE(GetColorTableParameterfvEXT)
+#define glGetColorTableParameterfv MANGLE(GetColorTableParameterfv)
+#define glGetColorTableParameterfvSGI MANGLE(GetColorTableParameterfvSGI)
+#define glGetColorTableParameterivEXT MANGLE(GetColorTableParameterivEXT)
+#define glGetColorTableParameteriv MANGLE(GetColorTableParameteriv)
+#define glGetColorTableParameterivSGI MANGLE(GetColorTableParameterivSGI)
+#define glGetColorTableSGI MANGLE(GetColorTableSGI)
+#define glGetCombinerInputParameterfvNV MANGLE(GetCombinerInputParameterfvNV)
+#define glGetCombinerInputParameterivNV MANGLE(GetCombinerInputParameterivNV)
+#define glGetCombinerOutputParameterfvNV MANGLE(GetCombinerOutputParameterfvNV)
+#define glGetCombinerOutputParameterivNV MANGLE(GetCombinerOutputParameterivNV)
+#define glGetCombinerStageParameterfvNV MANGLE(GetCombinerStageParameterfvNV)
+#define glGetCompressedTexImageARB MANGLE(GetCompressedTexImageARB)
+#define glGetCompressedTexImage MANGLE(GetCompressedTexImage)
+#define glGetConvolutionFilterEXT MANGLE(GetConvolutionFilterEXT)
+#define glGetConvolutionFilter MANGLE(GetConvolutionFilter)
+#define glGetConvolutionParameterfvEXT MANGLE(GetConvolutionParameterfvEXT)
+#define glGetConvolutionParameterfv MANGLE(GetConvolutionParameterfv)
+#define glGetConvolutionParameterivEXT MANGLE(GetConvolutionParameterivEXT)
+#define glGetConvolutionParameteriv MANGLE(GetConvolutionParameteriv)
+#define glGetDebugLogLengthMESA MANGLE(GetDebugLogLengthMESA)
+#define glGetDebugLogMESA MANGLE(GetDebugLogMESA)
+#define glGetDetailTexFuncSGIS MANGLE(GetDetailTexFuncSGIS)
+#define glGetDoublev MANGLE(GetDoublev)
+#define glGetError MANGLE(GetError)
+#define glGetFenceivNV MANGLE(GetFenceivNV)
+#define glGetFinalCombinerInputParameterfvNV MANGLE(GetFinalCombinerInputParameterfvNV)
+#define glGetFinalCombinerInputParameterivNV MANGLE(GetFinalCombinerInputParameterivNV)
+#define glGetFloatv MANGLE(GetFloatv)
+#define glGetFogFuncSGIS MANGLE(GetFogFuncSGIS)
+#define glGetFragDataLocationEXT MANGLE(GetFragDataLocationEXT)
+#define glGetFragmentLightfvSGIX MANGLE(GetFragmentLightfvSGIX)
+#define glGetFragmentLightivSGIX MANGLE(GetFragmentLightivSGIX)
+#define glGetFragmentMaterialfvSGIX MANGLE(GetFragmentMaterialfvSGIX)
+#define glGetFragmentMaterialivSGIX MANGLE(GetFragmentMaterialivSGIX)
+#define glGetFramebufferAttachmentParameterivEXT MANGLE(GetFramebufferAttachmentParameterivEXT)
+#define glGetHandleARB MANGLE(GetHandleARB)
+#define glGetHistogramEXT MANGLE(GetHistogramEXT)
+#define glGetHistogram MANGLE(GetHistogram)
+#define glGetHistogramParameterfvEXT MANGLE(GetHistogramParameterfvEXT)
+#define glGetHistogramParameterfv MANGLE(GetHistogramParameterfv)
+#define glGetHistogramParameterivEXT MANGLE(GetHistogramParameterivEXT)
+#define glGetHistogramParameteriv MANGLE(GetHistogramParameteriv)
+#define glGetImageTransformParameterfvHP MANGLE(GetImageTransformParameterfvHP)
+#define glGetImageTransformParameterivHP MANGLE(GetImageTransformParameterivHP)
+#define glGetInfoLogARB MANGLE(GetInfoLogARB)
+#define glGetInstrumentsSGIX MANGLE(GetInstrumentsSGIX)
+#define glGetIntegerIndexedvEXT MANGLE(GetIntegerIndexedvEXT)
+#define glGetIntegerv MANGLE(GetIntegerv)
+#define glGetInvariantBooleanvEXT MANGLE(GetInvariantBooleanvEXT)
+#define glGetInvariantFloatvEXT MANGLE(GetInvariantFloatvEXT)
+#define glGetInvariantIntegervEXT MANGLE(GetInvariantIntegervEXT)
+#define glGetLightfv MANGLE(GetLightfv)
+#define glGetLightiv MANGLE(GetLightiv)
+#define glGetListParameterfvSGIX MANGLE(GetListParameterfvSGIX)
+#define glGetListParameterivSGIX MANGLE(GetListParameterivSGIX)
+#define glGetLocalConstantBooleanvEXT MANGLE(GetLocalConstantBooleanvEXT)
+#define glGetLocalConstantFloatvEXT MANGLE(GetLocalConstantFloatvEXT)
+#define glGetLocalConstantIntegervEXT MANGLE(GetLocalConstantIntegervEXT)
+#define glGetMapAttribParameterfvNV MANGLE(GetMapAttribParameterfvNV)
+#define glGetMapAttribParameterivNV MANGLE(GetMapAttribParameterivNV)
+#define glGetMapControlPointsNV MANGLE(GetMapControlPointsNV)
+#define glGetMapdv MANGLE(GetMapdv)
+#define glGetMapfv MANGLE(GetMapfv)
+#define glGetMapiv MANGLE(GetMapiv)
+#define glGetMapParameterfvNV MANGLE(GetMapParameterfvNV)
+#define glGetMapParameterivNV MANGLE(GetMapParameterivNV)
+#define glGetMaterialfv MANGLE(GetMaterialfv)
+#define glGetMaterialiv MANGLE(GetMaterialiv)
+#define glGetMinmaxEXT MANGLE(GetMinmaxEXT)
+#define glGetMinmax MANGLE(GetMinmax)
+#define glGetMinmaxParameterfvEXT MANGLE(GetMinmaxParameterfvEXT)
+#define glGetMinmaxParameterfv MANGLE(GetMinmaxParameterfv)
+#define glGetMinmaxParameterivEXT MANGLE(GetMinmaxParameterivEXT)
+#define glGetMinmaxParameteriv MANGLE(GetMinmaxParameteriv)
+#define glGetObjectBufferfvATI MANGLE(GetObjectBufferfvATI)
+#define glGetObjectBufferivATI MANGLE(GetObjectBufferivATI)
+#define glGetObjectParameterfvARB MANGLE(GetObjectParameterfvARB)
+#define glGetObjectParameterivARB MANGLE(GetObjectParameterivARB)
+#define glGetOcclusionQueryivNV MANGLE(GetOcclusionQueryivNV)
+#define glGetOcclusionQueryuivNV MANGLE(GetOcclusionQueryuivNV)
+#define glGetPixelMapfv MANGLE(GetPixelMapfv)
+#define glGetPixelMapuiv MANGLE(GetPixelMapuiv)
+#define glGetPixelMapusv MANGLE(GetPixelMapusv)
+#define glGetPixelTexGenParameterfvSGIS MANGLE(GetPixelTexGenParameterfvSGIS)
+#define glGetPixelTexGenParameterivSGIS MANGLE(GetPixelTexGenParameterivSGIS)
+#define glGetPointervEXT MANGLE(GetPointervEXT)
+#define glGetPointerv MANGLE(GetPointerv)
+#define glGetPolygonStipple MANGLE(GetPolygonStipple)
+#define glGetProgramEnvParameterdvARB MANGLE(GetProgramEnvParameterdvARB)
+#define glGetProgramEnvParameterfvARB MANGLE(GetProgramEnvParameterfvARB)
+#define glGetProgramEnvParameterIivNV MANGLE(GetProgramEnvParameterIivNV)
+#define glGetProgramEnvParameterIuivNV MANGLE(GetProgramEnvParameterIuivNV)
+#define glGetProgramInfoLog MANGLE(GetProgramInfoLog)
+#define glGetProgramivARB MANGLE(GetProgramivARB)
+#define glGetProgramiv MANGLE(GetProgramiv)
+#define glGetProgramivNV MANGLE(GetProgramivNV)
+#define glGetProgramLocalParameterdvARB MANGLE(GetProgramLocalParameterdvARB)
+#define glGetProgramLocalParameterfvARB MANGLE(GetProgramLocalParameterfvARB)
+#define glGetProgramLocalParameterIivNV MANGLE(GetProgramLocalParameterIivNV)
+#define glGetProgramLocalParameterIuivNV MANGLE(GetProgramLocalParameterIuivNV)
+#define glGetProgramNamedParameterdvNV MANGLE(GetProgramNamedParameterdvNV)
+#define glGetProgramNamedParameterfvNV MANGLE(GetProgramNamedParameterfvNV)
+#define glGetProgramParameterdvNV MANGLE(GetProgramParameterdvNV)
+#define glGetProgramParameterfvNV MANGLE(GetProgramParameterfvNV)
+#define glGetProgramRegisterfvMESA MANGLE(GetProgramRegisterfvMESA)
+#define glGetProgramStringARB MANGLE(GetProgramStringARB)
+#define glGetProgramStringNV MANGLE(GetProgramStringNV)
+#define glGetQueryivARB MANGLE(GetQueryivARB)
+#define glGetQueryiv MANGLE(GetQueryiv)
+#define glGetQueryObjecti64vEXT MANGLE(GetQueryObjecti64vEXT)
+#define glGetQueryObjectivARB MANGLE(GetQueryObjectivARB)
+#define glGetQueryObjectiv MANGLE(GetQueryObjectiv)
+#define glGetQueryObjectui64vEXT MANGLE(GetQueryObjectui64vEXT)
+#define glGetQueryObjectuivARB MANGLE(GetQueryObjectuivARB)
+#define glGetQueryObjectuiv MANGLE(GetQueryObjectuiv)
+#define glGetRenderbufferParameterivEXT MANGLE(GetRenderbufferParameterivEXT)
+#define glGetSeparableFilterEXT MANGLE(GetSeparableFilterEXT)
+#define glGetSeparableFilter MANGLE(GetSeparableFilter)
+#define glGetShaderInfoLog MANGLE(GetShaderInfoLog)
+#define glGetShaderiv MANGLE(GetShaderiv)
+#define glGetShaderSourceARB MANGLE(GetShaderSourceARB)
+#define glGetShaderSource MANGLE(GetShaderSource)
+#define glGetSharpenTexFuncSGIS MANGLE(GetSharpenTexFuncSGIS)
+#define glGetString MANGLE(GetString)
+#define glGetTexBumpParameterfvATI MANGLE(GetTexBumpParameterfvATI)
+#define glGetTexBumpParameterivATI MANGLE(GetTexBumpParameterivATI)
+#define glGetTexEnvfv MANGLE(GetTexEnvfv)
+#define glGetTexEnviv MANGLE(GetTexEnviv)
+#define glGetTexFilterFuncSGIS MANGLE(GetTexFilterFuncSGIS)
+#define glGetTexGendv MANGLE(GetTexGendv)
+#define glGetTexGenfv MANGLE(GetTexGenfv)
+#define glGetTexGeniv MANGLE(GetTexGeniv)
+#define glGetTexImage MANGLE(GetTexImage)
+#define glGetTexLevelParameterfv MANGLE(GetTexLevelParameterfv)
+#define glGetTexLevelParameteriv MANGLE(GetTexLevelParameteriv)
+#define glGetTexParameterfv MANGLE(GetTexParameterfv)
+#define glGetTexParameterIivEXT MANGLE(GetTexParameterIivEXT)
+#define glGetTexParameterIuivEXT MANGLE(GetTexParameterIuivEXT)
+#define glGetTexParameteriv MANGLE(GetTexParameteriv)
+#define glGetTrackMatrixivNV MANGLE(GetTrackMatrixivNV)
+#define glGetTransformFeedbackVaryingNV MANGLE(GetTransformFeedbackVaryingNV)
+#define glGetUniformBufferSizeEXT MANGLE(GetUniformBufferSizeEXT)
+#define glGetUniformfvARB MANGLE(GetUniformfvARB)
+#define glGetUniformfv MANGLE(GetUniformfv)
+#define glGetUniformivARB MANGLE(GetUniformivARB)
+#define glGetUniformiv MANGLE(GetUniformiv)
+#define glGetUniformLocationARB MANGLE(GetUniformLocationARB)
+#define glGetUniformLocation MANGLE(GetUniformLocation)
+#define glGetUniformOffsetEXT MANGLE(GetUniformOffsetEXT)
+#define glGetUniformuivEXT MANGLE(GetUniformuivEXT)
+#define glGetVariantArrayObjectfvATI MANGLE(GetVariantArrayObjectfvATI)
+#define glGetVariantArrayObjectivATI MANGLE(GetVariantArrayObjectivATI)
+#define glGetVariantBooleanvEXT MANGLE(GetVariantBooleanvEXT)
+#define glGetVariantFloatvEXT MANGLE(GetVariantFloatvEXT)
+#define glGetVariantIntegervEXT MANGLE(GetVariantIntegervEXT)
+#define glGetVariantPointervEXT MANGLE(GetVariantPointervEXT)
+#define glGetVaryingLocationNV MANGLE(GetVaryingLocationNV)
+#define glGetVertexAttribArrayObjectfvATI MANGLE(GetVertexAttribArrayObjectfvATI)
+#define glGetVertexAttribArrayObjectivATI MANGLE(GetVertexAttribArrayObjectivATI)
+#define glGetVertexAttribdvARB MANGLE(GetVertexAttribdvARB)
+#define glGetVertexAttribdv MANGLE(GetVertexAttribdv)
+#define glGetVertexAttribdvNV MANGLE(GetVertexAttribdvNV)
+#define glGetVertexAttribfvARB MANGLE(GetVertexAttribfvARB)
+#define glGetVertexAttribfv MANGLE(GetVertexAttribfv)
+#define glGetVertexAttribfvNV MANGLE(GetVertexAttribfvNV)
+#define glGetVertexAttribIivEXT MANGLE(GetVertexAttribIivEXT)
+#define glGetVertexAttribIuivEXT MANGLE(GetVertexAttribIuivEXT)
+#define glGetVertexAttribivARB MANGLE(GetVertexAttribivARB)
+#define glGetVertexAttribiv MANGLE(GetVertexAttribiv)
+#define glGetVertexAttribivNV MANGLE(GetVertexAttribivNV)
+#define glGetVertexAttribPointervARB MANGLE(GetVertexAttribPointervARB)
+#define glGetVertexAttribPointerv MANGLE(GetVertexAttribPointerv)
+#define glGetVertexAttribPointervNV MANGLE(GetVertexAttribPointervNV)
+#define glGlobalAlphaFactorbSUN MANGLE(GlobalAlphaFactorbSUN)
+#define glGlobalAlphaFactordSUN MANGLE(GlobalAlphaFactordSUN)
+#define glGlobalAlphaFactorfSUN MANGLE(GlobalAlphaFactorfSUN)
+#define glGlobalAlphaFactoriSUN MANGLE(GlobalAlphaFactoriSUN)
+#define glGlobalAlphaFactorsSUN MANGLE(GlobalAlphaFactorsSUN)
+#define glGlobalAlphaFactorubSUN MANGLE(GlobalAlphaFactorubSUN)
+#define glGlobalAlphaFactoruiSUN MANGLE(GlobalAlphaFactoruiSUN)
+#define glGlobalAlphaFactorusSUN MANGLE(GlobalAlphaFactorusSUN)
+#define glHint MANGLE(Hint)
+#define glHintPGI MANGLE(HintPGI)
+#define glHistogramEXT MANGLE(HistogramEXT)
+#define glHistogram MANGLE(Histogram)
+#define glIglooInterfaceSGIX MANGLE(IglooInterfaceSGIX)
+#define glImageTransformParameterfHP MANGLE(ImageTransformParameterfHP)
+#define glImageTransformParameterfvHP MANGLE(ImageTransformParameterfvHP)
+#define glImageTransformParameteriHP MANGLE(ImageTransformParameteriHP)
+#define glImageTransformParameterivHP MANGLE(ImageTransformParameterivHP)
+#define glIndexd MANGLE(Indexd)
+#define glIndexdv MANGLE(Indexdv)
+#define glIndexf MANGLE(Indexf)
+#define glIndexFuncEXT MANGLE(IndexFuncEXT)
+#define glIndexfv MANGLE(Indexfv)
+#define glIndexi MANGLE(Indexi)
+#define glIndexiv MANGLE(Indexiv)
+#define glIndexMask MANGLE(IndexMask)
+#define glIndexMaterialEXT MANGLE(IndexMaterialEXT)
+#define glIndexPointerEXT MANGLE(IndexPointerEXT)
+#define glIndexPointerListIBM MANGLE(IndexPointerListIBM)
+#define glIndexPointer MANGLE(IndexPointer)
+#define glIndexs MANGLE(Indexs)
+#define glIndexsv MANGLE(Indexsv)
+#define glIndexub MANGLE(Indexub)
+#define glIndexubv MANGLE(Indexubv)
+#define glInitNames MANGLE(InitNames)
+#define glInsertComponentEXT MANGLE(InsertComponentEXT)
+#define glInstrumentsBufferSGIX MANGLE(InstrumentsBufferSGIX)
+#define glInterleavedArrays MANGLE(InterleavedArrays)
+#define glIsAsyncMarkerSGIX MANGLE(IsAsyncMarkerSGIX)
+#define glIsBufferARB MANGLE(IsBufferARB)
+#define glIsBuffer MANGLE(IsBuffer)
+#define glIsEnabledIndexedEXT MANGLE(IsEnabledIndexedEXT)
+#define glIsEnabled MANGLE(IsEnabled)
+#define glIsFenceAPPLE MANGLE(IsFenceAPPLE)
+#define glIsFenceNV MANGLE(IsFenceNV)
+#define glIsFramebufferEXT MANGLE(IsFramebufferEXT)
+#define glIsList MANGLE(IsList)
+#define glIsObjectBufferATI MANGLE(IsObjectBufferATI)
+#define glIsOcclusionQueryNV MANGLE(IsOcclusionQueryNV)
+#define glIsProgramARB MANGLE(IsProgramARB)
+#define glIsProgram MANGLE(IsProgram)
+#define glIsProgramNV MANGLE(IsProgramNV)
+#define glIsQueryARB MANGLE(IsQueryARB)
+#define glIsQuery MANGLE(IsQuery)
+#define glIsRenderbufferEXT MANGLE(IsRenderbufferEXT)
+#define glIsShader MANGLE(IsShader)
+#define glIsTextureEXT MANGLE(IsTextureEXT)
+#define glIsTexture MANGLE(IsTexture)
+#define glIsVariantEnabledEXT MANGLE(IsVariantEnabledEXT)
+#define glIsVertexArrayAPPLE MANGLE(IsVertexArrayAPPLE)
+#define glLightEnviSGIX MANGLE(LightEnviSGIX)
+#define glLightf MANGLE(Lightf)
+#define glLightfv MANGLE(Lightfv)
+#define glLighti MANGLE(Lighti)
+#define glLightiv MANGLE(Lightiv)
+#define glLightModelf MANGLE(LightModelf)
+#define glLightModelfv MANGLE(LightModelfv)
+#define glLightModeli MANGLE(LightModeli)
+#define glLightModeliv MANGLE(LightModeliv)
+#define glLineStipple MANGLE(LineStipple)
+#define glLineWidth MANGLE(LineWidth)
+#define glLinkProgramARB MANGLE(LinkProgramARB)
+#define glLinkProgram MANGLE(LinkProgram)
+#define glListBase MANGLE(ListBase)
+#define glListParameterfSGIX MANGLE(ListParameterfSGIX)
+#define glListParameterfvSGIX MANGLE(ListParameterfvSGIX)
+#define glListParameteriSGIX MANGLE(ListParameteriSGIX)
+#define glListParameterivSGIX MANGLE(ListParameterivSGIX)
+#define glLoadIdentityDeformationMapSGIX MANGLE(LoadIdentityDeformationMapSGIX)
+#define glLoadIdentity MANGLE(LoadIdentity)
+#define glLoadMatrixd MANGLE(LoadMatrixd)
+#define glLoadMatrixf MANGLE(LoadMatrixf)
+#define glLoadName MANGLE(LoadName)
+#define glLoadProgramNV MANGLE(LoadProgramNV)
+#define glLoadTransposeMatrixdARB MANGLE(LoadTransposeMatrixdARB)
+#define glLoadTransposeMatrixd MANGLE(LoadTransposeMatrixd)
+#define glLoadTransposeMatrixfARB MANGLE(LoadTransposeMatrixfARB)
+#define glLoadTransposeMatrixf MANGLE(LoadTransposeMatrixf)
+#define glLockArraysEXT MANGLE(LockArraysEXT)
+#define glLogicOp MANGLE(LogicOp)
+#define glMap1d MANGLE(Map1d)
+#define glMap1f MANGLE(Map1f)
+#define glMap2d MANGLE(Map2d)
+#define glMap2f MANGLE(Map2f)
+#define glMapBufferARB MANGLE(MapBufferARB)
+#define glMapBuffer MANGLE(MapBuffer)
+#define glMapControlPointsNV MANGLE(MapControlPointsNV)
+#define glMapGrid1d MANGLE(MapGrid1d)
+#define glMapGrid1f MANGLE(MapGrid1f)
+#define glMapGrid2d MANGLE(MapGrid2d)
+#define glMapGrid2f MANGLE(MapGrid2f)
+#define glMapObjectBufferATI MANGLE(MapObjectBufferATI)
+#define glMapParameterfvNV MANGLE(MapParameterfvNV)
+#define glMapParameterivNV MANGLE(MapParameterivNV)
+#define glMaterialf MANGLE(Materialf)
+#define glMaterialfv MANGLE(Materialfv)
+#define glMateriali MANGLE(Materiali)
+#define glMaterialiv MANGLE(Materialiv)
+#define glMatrixIndexPointerARB MANGLE(MatrixIndexPointerARB)
+#define glMatrixIndexubvARB MANGLE(MatrixIndexubvARB)
+#define glMatrixIndexuivARB MANGLE(MatrixIndexuivARB)
+#define glMatrixIndexusvARB MANGLE(MatrixIndexusvARB)
+#define glMatrixMode MANGLE(MatrixMode)
+#define glMinmaxEXT MANGLE(MinmaxEXT)
+#define glMinmax MANGLE(Minmax)
+#define glMultiDrawArraysEXT MANGLE(MultiDrawArraysEXT)
+#define glMultiDrawArrays MANGLE(MultiDrawArrays)
+#define glMultiDrawElementArrayAPPLE MANGLE(MultiDrawElementArrayAPPLE)
+#define glMultiDrawElementsEXT MANGLE(MultiDrawElementsEXT)
+#define glMultiDrawElements MANGLE(MultiDrawElements)
+#define glMultiDrawRangeElementArrayAPPLE MANGLE(MultiDrawRangeElementArrayAPPLE)
+#define glMultiModeDrawArraysIBM MANGLE(MultiModeDrawArraysIBM)
+#define glMultiModeDrawElementsIBM MANGLE(MultiModeDrawElementsIBM)
+#define glMultiTexCoord1dARB MANGLE(MultiTexCoord1dARB)
+#define glMultiTexCoord1d MANGLE(MultiTexCoord1d)
+#define glMultiTexCoord1dvARB MANGLE(MultiTexCoord1dvARB)
+#define glMultiTexCoord1dv MANGLE(MultiTexCoord1dv)
+#define glMultiTexCoord1fARB MANGLE(MultiTexCoord1fARB)
+#define glMultiTexCoord1f MANGLE(MultiTexCoord1f)
+#define glMultiTexCoord1fvARB MANGLE(MultiTexCoord1fvARB)
+#define glMultiTexCoord1fv MANGLE(MultiTexCoord1fv)
+#define glMultiTexCoord1hNV MANGLE(MultiTexCoord1hNV)
+#define glMultiTexCoord1hvNV MANGLE(MultiTexCoord1hvNV)
+#define glMultiTexCoord1iARB MANGLE(MultiTexCoord1iARB)
+#define glMultiTexCoord1i MANGLE(MultiTexCoord1i)
+#define glMultiTexCoord1ivARB MANGLE(MultiTexCoord1ivARB)
+#define glMultiTexCoord1iv MANGLE(MultiTexCoord1iv)
+#define glMultiTexCoord1sARB MANGLE(MultiTexCoord1sARB)
+#define glMultiTexCoord1s MANGLE(MultiTexCoord1s)
+#define glMultiTexCoord1svARB MANGLE(MultiTexCoord1svARB)
+#define glMultiTexCoord1sv MANGLE(MultiTexCoord1sv)
+#define glMultiTexCoord2dARB MANGLE(MultiTexCoord2dARB)
+#define glMultiTexCoord2d MANGLE(MultiTexCoord2d)
+#define glMultiTexCoord2dvARB MANGLE(MultiTexCoord2dvARB)
+#define glMultiTexCoord2dv MANGLE(MultiTexCoord2dv)
+#define glMultiTexCoord2fARB MANGLE(MultiTexCoord2fARB)
+#define glMultiTexCoord2f MANGLE(MultiTexCoord2f)
+#define glMultiTexCoord2fvARB MANGLE(MultiTexCoord2fvARB)
+#define glMultiTexCoord2fv MANGLE(MultiTexCoord2fv)
+#define glMultiTexCoord2hNV MANGLE(MultiTexCoord2hNV)
+#define glMultiTexCoord2hvNV MANGLE(MultiTexCoord2hvNV)
+#define glMultiTexCoord2iARB MANGLE(MultiTexCoord2iARB)
+#define glMultiTexCoord2i MANGLE(MultiTexCoord2i)
+#define glMultiTexCoord2ivARB MANGLE(MultiTexCoord2ivARB)
+#define glMultiTexCoord2iv MANGLE(MultiTexCoord2iv)
+#define glMultiTexCoord2sARB MANGLE(MultiTexCoord2sARB)
+#define glMultiTexCoord2s MANGLE(MultiTexCoord2s)
+#define glMultiTexCoord2svARB MANGLE(MultiTexCoord2svARB)
+#define glMultiTexCoord2sv MANGLE(MultiTexCoord2sv)
+#define glMultiTexCoord3dARB MANGLE(MultiTexCoord3dARB)
+#define glMultiTexCoord3d MANGLE(MultiTexCoord3d)
+#define glMultiTexCoord3dvARB MANGLE(MultiTexCoord3dvARB)
+#define glMultiTexCoord3dv MANGLE(MultiTexCoord3dv)
+#define glMultiTexCoord3fARB MANGLE(MultiTexCoord3fARB)
+#define glMultiTexCoord3f MANGLE(MultiTexCoord3f)
+#define glMultiTexCoord3fvARB MANGLE(MultiTexCoord3fvARB)
+#define glMultiTexCoord3fv MANGLE(MultiTexCoord3fv)
+#define glMultiTexCoord3hNV MANGLE(MultiTexCoord3hNV)
+#define glMultiTexCoord3hvNV MANGLE(MultiTexCoord3hvNV)
+#define glMultiTexCoord3iARB MANGLE(MultiTexCoord3iARB)
+#define glMultiTexCoord3i MANGLE(MultiTexCoord3i)
+#define glMultiTexCoord3ivARB MANGLE(MultiTexCoord3ivARB)
+#define glMultiTexCoord3iv MANGLE(MultiTexCoord3iv)
+#define glMultiTexCoord3sARB MANGLE(MultiTexCoord3sARB)
+#define glMultiTexCoord3s MANGLE(MultiTexCoord3s)
+#define glMultiTexCoord3svARB MANGLE(MultiTexCoord3svARB)
+#define glMultiTexCoord3sv MANGLE(MultiTexCoord3sv)
+#define glMultiTexCoord4dARB MANGLE(MultiTexCoord4dARB)
+#define glMultiTexCoord4d MANGLE(MultiTexCoord4d)
+#define glMultiTexCoord4dvARB MANGLE(MultiTexCoord4dvARB)
+#define glMultiTexCoord4dv MANGLE(MultiTexCoord4dv)
+#define glMultiTexCoord4fARB MANGLE(MultiTexCoord4fARB)
+#define glMultiTexCoord4f MANGLE(MultiTexCoord4f)
+#define glMultiTexCoord4fvARB MANGLE(MultiTexCoord4fvARB)
+#define glMultiTexCoord4fv MANGLE(MultiTexCoord4fv)
+#define glMultiTexCoord4hNV MANGLE(MultiTexCoord4hNV)
+#define glMultiTexCoord4hvNV MANGLE(MultiTexCoord4hvNV)
+#define glMultiTexCoord4iARB MANGLE(MultiTexCoord4iARB)
+#define glMultiTexCoord4i MANGLE(MultiTexCoord4i)
+#define glMultiTexCoord4ivARB MANGLE(MultiTexCoord4ivARB)
+#define glMultiTexCoord4iv MANGLE(MultiTexCoord4iv)
+#define glMultiTexCoord4sARB MANGLE(MultiTexCoord4sARB)
+#define glMultiTexCoord4s MANGLE(MultiTexCoord4s)
+#define glMultiTexCoord4svARB MANGLE(MultiTexCoord4svARB)
+#define glMultiTexCoord4sv MANGLE(MultiTexCoord4sv)
+#define glMultMatrixd MANGLE(MultMatrixd)
+#define glMultMatrixf MANGLE(MultMatrixf)
+#define glMultTransposeMatrixdARB MANGLE(MultTransposeMatrixdARB)
+#define glMultTransposeMatrixd MANGLE(MultTransposeMatrixd)
+#define glMultTransposeMatrixfARB MANGLE(MultTransposeMatrixfARB)
+#define glMultTransposeMatrixf MANGLE(MultTransposeMatrixf)
+#define glNewList MANGLE(NewList)
+#define glNewObjectBufferATI MANGLE(NewObjectBufferATI)
+#define glNormal3b MANGLE(Normal3b)
+#define glNormal3bv MANGLE(Normal3bv)
+#define glNormal3d MANGLE(Normal3d)
+#define glNormal3dv MANGLE(Normal3dv)
+#define glNormal3f MANGLE(Normal3f)
+#define glNormal3fVertex3fSUN MANGLE(Normal3fVertex3fSUN)
+#define glNormal3fVertex3fvSUN MANGLE(Normal3fVertex3fvSUN)
+#define glNormal3fv MANGLE(Normal3fv)
+#define glNormal3hNV MANGLE(Normal3hNV)
+#define glNormal3hvNV MANGLE(Normal3hvNV)
+#define glNormal3i MANGLE(Normal3i)
+#define glNormal3iv MANGLE(Normal3iv)
+#define glNormal3s MANGLE(Normal3s)
+#define glNormal3sv MANGLE(Normal3sv)
+#define glNormalPointerEXT MANGLE(NormalPointerEXT)
+#define glNormalPointerListIBM MANGLE(NormalPointerListIBM)
+#define glNormalPointer MANGLE(NormalPointer)
+#define glNormalPointervINTEL MANGLE(NormalPointervINTEL)
+#define glNormalStream3bATI MANGLE(NormalStream3bATI)
+#define glNormalStream3bvATI MANGLE(NormalStream3bvATI)
+#define glNormalStream3dATI MANGLE(NormalStream3dATI)
+#define glNormalStream3dvATI MANGLE(NormalStream3dvATI)
+#define glNormalStream3fATI MANGLE(NormalStream3fATI)
+#define glNormalStream3fvATI MANGLE(NormalStream3fvATI)
+#define glNormalStream3iATI MANGLE(NormalStream3iATI)
+#define glNormalStream3ivATI MANGLE(NormalStream3ivATI)
+#define glNormalStream3sATI MANGLE(NormalStream3sATI)
+#define glNormalStream3svATI MANGLE(NormalStream3svATI)
+#define glOrtho MANGLE(Ortho)
+#define glPassTexCoordATI MANGLE(PassTexCoordATI)
+#define glPassThrough MANGLE(PassThrough)
+#define glPixelDataRangeNV MANGLE(PixelDataRangeNV)
+#define glPixelMapfv MANGLE(PixelMapfv)
+#define glPixelMapuiv MANGLE(PixelMapuiv)
+#define glPixelMapusv MANGLE(PixelMapusv)
+#define glPixelStoref MANGLE(PixelStoref)
+#define glPixelStorei MANGLE(PixelStorei)
+#define glPixelTexGenParameterfSGIS MANGLE(PixelTexGenParameterfSGIS)
+#define glPixelTexGenParameterfvSGIS MANGLE(PixelTexGenParameterfvSGIS)
+#define glPixelTexGenParameteriSGIS MANGLE(PixelTexGenParameteriSGIS)
+#define glPixelTexGenParameterivSGIS MANGLE(PixelTexGenParameterivSGIS)
+#define glPixelTexGenSGIX MANGLE(PixelTexGenSGIX)
+#define glPixelTransferf MANGLE(PixelTransferf)
+#define glPixelTransferi MANGLE(PixelTransferi)
+#define glPixelTransformParameterfEXT MANGLE(PixelTransformParameterfEXT)
+#define glPixelTransformParameterfvEXT MANGLE(PixelTransformParameterfvEXT)
+#define glPixelTransformParameteriEXT MANGLE(PixelTransformParameteriEXT)
+#define glPixelTransformParameterivEXT MANGLE(PixelTransformParameterivEXT)
+#define glPixelZoom MANGLE(PixelZoom)
+#define glPNTrianglesfATI MANGLE(PNTrianglesfATI)
+#define glPNTrianglesiATI MANGLE(PNTrianglesiATI)
+#define glPointParameterfARB MANGLE(PointParameterfARB)
+#define glPointParameterfEXT MANGLE(PointParameterfEXT)
+#define glPointParameterf MANGLE(PointParameterf)
+#define glPointParameterfSGIS MANGLE(PointParameterfSGIS)
+#define glPointParameterfvARB MANGLE(PointParameterfvARB)
+#define glPointParameterfvEXT MANGLE(PointParameterfvEXT)
+#define glPointParameterfv MANGLE(PointParameterfv)
+#define glPointParameterfvSGIS MANGLE(PointParameterfvSGIS)
+#define glPointParameteri MANGLE(PointParameteri)
+#define glPointParameteriNV MANGLE(PointParameteriNV)
+#define glPointParameteriv MANGLE(PointParameteriv)
+#define glPointParameterivNV MANGLE(PointParameterivNV)
+#define glPointSize MANGLE(PointSize)
+#define glPollAsyncSGIX MANGLE(PollAsyncSGIX)
+#define glPollInstrumentsSGIX MANGLE(PollInstrumentsSGIX)
+#define glPolygonMode MANGLE(PolygonMode)
+#define glPolygonOffsetEXT MANGLE(PolygonOffsetEXT)
+#define glPolygonOffset MANGLE(PolygonOffset)
+#define glPolygonStipple MANGLE(PolygonStipple)
+#define glPopAttrib MANGLE(PopAttrib)
+#define glPopClientAttrib MANGLE(PopClientAttrib)
+#define glPopMatrix MANGLE(PopMatrix)
+#define glPopName MANGLE(PopName)
+#define glPrimitiveRestartIndexNV MANGLE(PrimitiveRestartIndexNV)
+#define glPrimitiveRestartNV MANGLE(PrimitiveRestartNV)
+#define glPrioritizeTexturesEXT MANGLE(PrioritizeTexturesEXT)
+#define glPrioritizeTextures MANGLE(PrioritizeTextures)
+#define glProgramBufferParametersfvNV MANGLE(ProgramBufferParametersfvNV)
+#define glProgramBufferParametersIivNV MANGLE(ProgramBufferParametersIivNV)
+#define glProgramBufferParametersIuivNV MANGLE(ProgramBufferParametersIuivNV)
+#define glProgramCallbackMESA MANGLE(ProgramCallbackMESA)
+#define glProgramEnvParameter4dARB MANGLE(ProgramEnvParameter4dARB)
+#define glProgramEnvParameter4dvARB MANGLE(ProgramEnvParameter4dvARB)
+#define glProgramEnvParameter4fARB MANGLE(ProgramEnvParameter4fARB)
+#define glProgramEnvParameter4fvARB MANGLE(ProgramEnvParameter4fvARB)
+#define glProgramEnvParameterI4iNV MANGLE(ProgramEnvParameterI4iNV)
+#define glProgramEnvParameterI4ivNV MANGLE(ProgramEnvParameterI4ivNV)
+#define glProgramEnvParameterI4uiNV MANGLE(ProgramEnvParameterI4uiNV)
+#define glProgramEnvParameterI4uivNV MANGLE(ProgramEnvParameterI4uivNV)
+#define glProgramEnvParameters4fvEXT MANGLE(ProgramEnvParameters4fvEXT)
+#define glProgramEnvParametersI4ivNV MANGLE(ProgramEnvParametersI4ivNV)
+#define glProgramEnvParametersI4uivNV MANGLE(ProgramEnvParametersI4uivNV)
+#define glProgramLocalParameter4dARB MANGLE(ProgramLocalParameter4dARB)
+#define glProgramLocalParameter4dvARB MANGLE(ProgramLocalParameter4dvARB)
+#define glProgramLocalParameter4fARB MANGLE(ProgramLocalParameter4fARB)
+#define glProgramLocalParameter4fvARB MANGLE(ProgramLocalParameter4fvARB)
+#define glProgramLocalParameterI4iNV MANGLE(ProgramLocalParameterI4iNV)
+#define glProgramLocalParameterI4ivNV MANGLE(ProgramLocalParameterI4ivNV)
+#define glProgramLocalParameterI4uiNV MANGLE(ProgramLocalParameterI4uiNV)
+#define glProgramLocalParameterI4uivNV MANGLE(ProgramLocalParameterI4uivNV)
+#define glProgramLocalParameters4fvEXT MANGLE(ProgramLocalParameters4fvEXT)
+#define glProgramLocalParametersI4ivNV MANGLE(ProgramLocalParametersI4ivNV)
+#define glProgramLocalParametersI4uivNV MANGLE(ProgramLocalParametersI4uivNV)
+#define glProgramNamedParameter4dNV MANGLE(ProgramNamedParameter4dNV)
+#define glProgramNamedParameter4dvNV MANGLE(ProgramNamedParameter4dvNV)
+#define glProgramNamedParameter4fNV MANGLE(ProgramNamedParameter4fNV)
+#define glProgramNamedParameter4fvNV MANGLE(ProgramNamedParameter4fvNV)
+#define glProgramParameter4dNV MANGLE(ProgramParameter4dNV)
+#define glProgramParameter4dvNV MANGLE(ProgramParameter4dvNV)
+#define glProgramParameter4fNV MANGLE(ProgramParameter4fNV)
+#define glProgramParameter4fvNV MANGLE(ProgramParameter4fvNV)
+#define glProgramParameteriEXT MANGLE(ProgramParameteriEXT)
+#define glProgramParameters4dvNV MANGLE(ProgramParameters4dvNV)
+#define glProgramParameters4fvNV MANGLE(ProgramParameters4fvNV)
+#define glProgramStringARB MANGLE(ProgramStringARB)
+#define glProgramVertexLimitNV MANGLE(ProgramVertexLimitNV)
+#define glPushAttrib MANGLE(PushAttrib)
+#define glPushClientAttrib MANGLE(PushClientAttrib)
+#define glPushMatrix MANGLE(PushMatrix)
+#define glPushName MANGLE(PushName)
+#define glRasterPos2d MANGLE(RasterPos2d)
+#define glRasterPos2dv MANGLE(RasterPos2dv)
+#define glRasterPos2f MANGLE(RasterPos2f)
+#define glRasterPos2fv MANGLE(RasterPos2fv)
+#define glRasterPos2i MANGLE(RasterPos2i)
+#define glRasterPos2iv MANGLE(RasterPos2iv)
+#define glRasterPos2s MANGLE(RasterPos2s)
+#define glRasterPos2sv MANGLE(RasterPos2sv)
+#define glRasterPos3d MANGLE(RasterPos3d)
+#define glRasterPos3dv MANGLE(RasterPos3dv)
+#define glRasterPos3f MANGLE(RasterPos3f)
+#define glRasterPos3fv MANGLE(RasterPos3fv)
+#define glRasterPos3i MANGLE(RasterPos3i)
+#define glRasterPos3iv MANGLE(RasterPos3iv)
+#define glRasterPos3s MANGLE(RasterPos3s)
+#define glRasterPos3sv MANGLE(RasterPos3sv)
+#define glRasterPos4d MANGLE(RasterPos4d)
+#define glRasterPos4dv MANGLE(RasterPos4dv)
+#define glRasterPos4f MANGLE(RasterPos4f)
+#define glRasterPos4fv MANGLE(RasterPos4fv)
+#define glRasterPos4i MANGLE(RasterPos4i)
+#define glRasterPos4iv MANGLE(RasterPos4iv)
+#define glRasterPos4s MANGLE(RasterPos4s)
+#define glRasterPos4sv MANGLE(RasterPos4sv)
+#define glReadBuffer MANGLE(ReadBuffer)
+#define glReadInstrumentsSGIX MANGLE(ReadInstrumentsSGIX)
+#define glReadPixels MANGLE(ReadPixels)
+#define glRectd MANGLE(Rectd)
+#define glRectdv MANGLE(Rectdv)
+#define glRectf MANGLE(Rectf)
+#define glRectfv MANGLE(Rectfv)
+#define glRecti MANGLE(Recti)
+#define glRectiv MANGLE(Rectiv)
+#define glRects MANGLE(Rects)
+#define glRectsv MANGLE(Rectsv)
+#define glReferencePlaneSGIX MANGLE(ReferencePlaneSGIX)
+#define glRenderbufferStorageEXT MANGLE(RenderbufferStorageEXT)
+#define glRenderbufferStorageMultisampleCoverageNV MANGLE(RenderbufferStorageMultisampleCoverageNV)
+#define glRenderbufferStorageMultisampleEXT MANGLE(RenderbufferStorageMultisampleEXT)
+#define glRenderMode MANGLE(RenderMode)
+#define glReplacementCodePointerSUN MANGLE(ReplacementCodePointerSUN)
+#define glReplacementCodeubSUN MANGLE(ReplacementCodeubSUN)
+#define glReplacementCodeubvSUN MANGLE(ReplacementCodeubvSUN)
+#define glReplacementCodeuiColor3fVertex3fSUN MANGLE(ReplacementCodeuiColor3fVertex3fSUN)
+#define glReplacementCodeuiColor3fVertex3fvSUN MANGLE(ReplacementCodeuiColor3fVertex3fvSUN)
+#define glReplacementCodeuiColor4fNormal3fVertex3fSUN MANGLE(ReplacementCodeuiColor4fNormal3fVertex3fSUN)
+#define glReplacementCodeuiColor4fNormal3fVertex3fvSUN MANGLE(ReplacementCodeuiColor4fNormal3fVertex3fvSUN)
+#define glReplacementCodeuiColor4ubVertex3fSUN MANGLE(ReplacementCodeuiColor4ubVertex3fSUN)
+#define glReplacementCodeuiColor4ubVertex3fvSUN MANGLE(ReplacementCodeuiColor4ubVertex3fvSUN)
+#define glReplacementCodeuiNormal3fVertex3fSUN MANGLE(ReplacementCodeuiNormal3fVertex3fSUN)
+#define glReplacementCodeuiNormal3fVertex3fvSUN MANGLE(ReplacementCodeuiNormal3fVertex3fvSUN)
+#define glReplacementCodeuiSUN MANGLE(ReplacementCodeuiSUN)
+#define glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN MANGLE(ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN)
+#define glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN MANGLE(ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN)
+#define glReplacementCodeuiTexCoord2fNormal3fVertex3fSUN MANGLE(ReplacementCodeuiTexCoord2fNormal3fVertex3fSUN)
+#define glReplacementCodeuiTexCoord2fNormal3fVertex3fvSUN MANGLE(ReplacementCodeuiTexCoord2fNormal3fVertex3fvSUN)
+#define glReplacementCodeuiTexCoord2fVertex3fSUN MANGLE(ReplacementCodeuiTexCoord2fVertex3fSUN)
+#define glReplacementCodeuiTexCoord2fVertex3fvSUN MANGLE(ReplacementCodeuiTexCoord2fVertex3fvSUN)
+#define glReplacementCodeuiVertex3fSUN MANGLE(ReplacementCodeuiVertex3fSUN)
+#define glReplacementCodeuiVertex3fvSUN MANGLE(ReplacementCodeuiVertex3fvSUN)
+#define glReplacementCodeuivSUN MANGLE(ReplacementCodeuivSUN)
+#define glReplacementCodeusSUN MANGLE(ReplacementCodeusSUN)
+#define glReplacementCodeusvSUN MANGLE(ReplacementCodeusvSUN)
+#define glRequestResidentProgramsNV MANGLE(RequestResidentProgramsNV)
+#define glResetHistogramEXT MANGLE(ResetHistogramEXT)
+#define glResetHistogram MANGLE(ResetHistogram)
+#define glResetMinmaxEXT MANGLE(ResetMinmaxEXT)
+#define glResetMinmax MANGLE(ResetMinmax)
+#define glResizeBuffersMESA MANGLE(ResizeBuffersMESA)
+#define glRotated MANGLE(Rotated)
+#define glRotatef MANGLE(Rotatef)
+#define glSampleCoverageARB MANGLE(SampleCoverageARB)
+#define glSampleCoverage MANGLE(SampleCoverage)
+#define glSampleMapATI MANGLE(SampleMapATI)
+#define glSampleMaskEXT MANGLE(SampleMaskEXT)
+#define glSampleMaskSGIS MANGLE(SampleMaskSGIS)
+#define glSamplePatternEXT MANGLE(SamplePatternEXT)
+#define glSamplePatternSGIS MANGLE(SamplePatternSGIS)
+#define glScaled MANGLE(Scaled)
+#define glScalef MANGLE(Scalef)
+#define glScissor MANGLE(Scissor)
+#define glSecondaryColor3bEXT MANGLE(SecondaryColor3bEXT)
+#define glSecondaryColor3b MANGLE(SecondaryColor3b)
+#define glSecondaryColor3bvEXT MANGLE(SecondaryColor3bvEXT)
+#define glSecondaryColor3bv MANGLE(SecondaryColor3bv)
+#define glSecondaryColor3dEXT MANGLE(SecondaryColor3dEXT)
+#define glSecondaryColor3d MANGLE(SecondaryColor3d)
+#define glSecondaryColor3dvEXT MANGLE(SecondaryColor3dvEXT)
+#define glSecondaryColor3dv MANGLE(SecondaryColor3dv)
+#define glSecondaryColor3fEXT MANGLE(SecondaryColor3fEXT)
+#define glSecondaryColor3f MANGLE(SecondaryColor3f)
+#define glSecondaryColor3fvEXT MANGLE(SecondaryColor3fvEXT)
+#define glSecondaryColor3fv MANGLE(SecondaryColor3fv)
+#define glSecondaryColor3hNV MANGLE(SecondaryColor3hNV)
+#define glSecondaryColor3hvNV MANGLE(SecondaryColor3hvNV)
+#define glSecondaryColor3iEXT MANGLE(SecondaryColor3iEXT)
+#define glSecondaryColor3i MANGLE(SecondaryColor3i)
+#define glSecondaryColor3ivEXT MANGLE(SecondaryColor3ivEXT)
+#define glSecondaryColor3iv MANGLE(SecondaryColor3iv)
+#define glSecondaryColor3sEXT MANGLE(SecondaryColor3sEXT)
+#define glSecondaryColor3s MANGLE(SecondaryColor3s)
+#define glSecondaryColor3svEXT MANGLE(SecondaryColor3svEXT)
+#define glSecondaryColor3sv MANGLE(SecondaryColor3sv)
+#define glSecondaryColor3ubEXT MANGLE(SecondaryColor3ubEXT)
+#define glSecondaryColor3ub MANGLE(SecondaryColor3ub)
+#define glSecondaryColor3ubvEXT MANGLE(SecondaryColor3ubvEXT)
+#define glSecondaryColor3ubv MANGLE(SecondaryColor3ubv)
+#define glSecondaryColor3uiEXT MANGLE(SecondaryColor3uiEXT)
+#define glSecondaryColor3ui MANGLE(SecondaryColor3ui)
+#define glSecondaryColor3uivEXT MANGLE(SecondaryColor3uivEXT)
+#define glSecondaryColor3uiv MANGLE(SecondaryColor3uiv)
+#define glSecondaryColor3usEXT MANGLE(SecondaryColor3usEXT)
+#define glSecondaryColor3us MANGLE(SecondaryColor3us)
+#define glSecondaryColor3usvEXT MANGLE(SecondaryColor3usvEXT)
+#define glSecondaryColor3usv MANGLE(SecondaryColor3usv)
+#define glSecondaryColorPointerEXT MANGLE(SecondaryColorPointerEXT)
+#define glSecondaryColorPointerListIBM MANGLE(SecondaryColorPointerListIBM)
+#define glSecondaryColorPointer MANGLE(SecondaryColorPointer)
+#define glSelectBuffer MANGLE(SelectBuffer)
+#define glSeparableFilter2DEXT MANGLE(SeparableFilter2DEXT)
+#define glSeparableFilter2D MANGLE(SeparableFilter2D)
+#define glSetFenceAPPLE MANGLE(SetFenceAPPLE)
+#define glSetFenceNV MANGLE(SetFenceNV)
+#define glSetFragmentShaderConstantATI MANGLE(SetFragmentShaderConstantATI)
+#define glSetInvariantEXT MANGLE(SetInvariantEXT)
+#define glSetLocalConstantEXT MANGLE(SetLocalConstantEXT)
+#define glShadeModel MANGLE(ShadeModel)
+#define glShaderOp1EXT MANGLE(ShaderOp1EXT)
+#define glShaderOp2EXT MANGLE(ShaderOp2EXT)
+#define glShaderOp3EXT MANGLE(ShaderOp3EXT)
+#define glShaderSourceARB MANGLE(ShaderSourceARB)
+#define glShaderSource MANGLE(ShaderSource)
+#define glSharpenTexFuncSGIS MANGLE(SharpenTexFuncSGIS)
+#define glSpriteParameterfSGIX MANGLE(SpriteParameterfSGIX)
+#define glSpriteParameterfvSGIX MANGLE(SpriteParameterfvSGIX)
+#define glSpriteParameteriSGIX MANGLE(SpriteParameteriSGIX)
+#define glSpriteParameterivSGIX MANGLE(SpriteParameterivSGIX)
+#define glStartInstrumentsSGIX MANGLE(StartInstrumentsSGIX)
+#define glStencilClearTagEXT MANGLE(StencilClearTagEXT)
+#define glStencilFunc MANGLE(StencilFunc)
+#define glStencilFuncSeparateATI MANGLE(StencilFuncSeparateATI)
+#define glStencilFuncSeparate MANGLE(StencilFuncSeparate)
+#define glStencilMask MANGLE(StencilMask)
+#define glStencilMaskSeparate MANGLE(StencilMaskSeparate)
+#define glStencilOp MANGLE(StencilOp)
+#define glStencilOpSeparateATI MANGLE(StencilOpSeparateATI)
+#define glStencilOpSeparate MANGLE(StencilOpSeparate)
+#define glStopInstrumentsSGIX MANGLE(StopInstrumentsSGIX)
+#define glStringMarkerGREMEDY MANGLE(StringMarkerGREMEDY)
+#define glSwizzleEXT MANGLE(SwizzleEXT)
+#define glTagSampleBufferSGIX MANGLE(TagSampleBufferSGIX)
+#define glTangent3bEXT MANGLE(Tangent3bEXT)
+#define glTangent3bvEXT MANGLE(Tangent3bvEXT)
+#define glTangent3dEXT MANGLE(Tangent3dEXT)
+#define glTangent3dvEXT MANGLE(Tangent3dvEXT)
+#define glTangent3fEXT MANGLE(Tangent3fEXT)
+#define glTangent3fvEXT MANGLE(Tangent3fvEXT)
+#define glTangent3iEXT MANGLE(Tangent3iEXT)
+#define glTangent3ivEXT MANGLE(Tangent3ivEXT)
+#define glTangent3sEXT MANGLE(Tangent3sEXT)
+#define glTangent3svEXT MANGLE(Tangent3svEXT)
+#define glTangentPointerEXT MANGLE(TangentPointerEXT)
+#define glTbufferMask3DFX MANGLE(TbufferMask3DFX)
+#define glTestFenceAPPLE MANGLE(TestFenceAPPLE)
+#define glTestFenceNV MANGLE(TestFenceNV)
+#define glTestObjectAPPLE MANGLE(TestObjectAPPLE)
+#define glTexBufferEXT MANGLE(TexBufferEXT)
+#define glTexBumpParameterfvATI MANGLE(TexBumpParameterfvATI)
+#define glTexBumpParameterivATI MANGLE(TexBumpParameterivATI)
+#define glTexCoord1d MANGLE(TexCoord1d)
+#define glTexCoord1dv MANGLE(TexCoord1dv)
+#define glTexCoord1f MANGLE(TexCoord1f)
+#define glTexCoord1fv MANGLE(TexCoord1fv)
+#define glTexCoord1hNV MANGLE(TexCoord1hNV)
+#define glTexCoord1hvNV MANGLE(TexCoord1hvNV)
+#define glTexCoord1i MANGLE(TexCoord1i)
+#define glTexCoord1iv MANGLE(TexCoord1iv)
+#define glTexCoord1s MANGLE(TexCoord1s)
+#define glTexCoord1sv MANGLE(TexCoord1sv)
+#define glTexCoord2d MANGLE(TexCoord2d)
+#define glTexCoord2dv MANGLE(TexCoord2dv)
+#define glTexCoord2fColor3fVertex3fSUN MANGLE(TexCoord2fColor3fVertex3fSUN)
+#define glTexCoord2fColor3fVertex3fvSUN MANGLE(TexCoord2fColor3fVertex3fvSUN)
+#define glTexCoord2fColor4fNormal3fVertex3fSUN MANGLE(TexCoord2fColor4fNormal3fVertex3fSUN)
+#define glTexCoord2fColor4fNormal3fVertex3fvSUN MANGLE(TexCoord2fColor4fNormal3fVertex3fvSUN)
+#define glTexCoord2fColor4ubVertex3fSUN MANGLE(TexCoord2fColor4ubVertex3fSUN)
+#define glTexCoord2fColor4ubVertex3fvSUN MANGLE(TexCoord2fColor4ubVertex3fvSUN)
+#define glTexCoord2f MANGLE(TexCoord2f)
+#define glTexCoord2fNormal3fVertex3fSUN MANGLE(TexCoord2fNormal3fVertex3fSUN)
+#define glTexCoord2fNormal3fVertex3fvSUN MANGLE(TexCoord2fNormal3fVertex3fvSUN)
+#define glTexCoord2fVertex3fSUN MANGLE(TexCoord2fVertex3fSUN)
+#define glTexCoord2fVertex3fvSUN MANGLE(TexCoord2fVertex3fvSUN)
+#define glTexCoord2fv MANGLE(TexCoord2fv)
+#define glTexCoord2hNV MANGLE(TexCoord2hNV)
+#define glTexCoord2hvNV MANGLE(TexCoord2hvNV)
+#define glTexCoord2i MANGLE(TexCoord2i)
+#define glTexCoord2iv MANGLE(TexCoord2iv)
+#define glTexCoord2s MANGLE(TexCoord2s)
+#define glTexCoord2sv MANGLE(TexCoord2sv)
+#define glTexCoord3d MANGLE(TexCoord3d)
+#define glTexCoord3dv MANGLE(TexCoord3dv)
+#define glTexCoord3f MANGLE(TexCoord3f)
+#define glTexCoord3fv MANGLE(TexCoord3fv)
+#define glTexCoord3hNV MANGLE(TexCoord3hNV)
+#define glTexCoord3hvNV MANGLE(TexCoord3hvNV)
+#define glTexCoord3i MANGLE(TexCoord3i)
+#define glTexCoord3iv MANGLE(TexCoord3iv)
+#define glTexCoord3s MANGLE(TexCoord3s)
+#define glTexCoord3sv MANGLE(TexCoord3sv)
+#define glTexCoord4d MANGLE(TexCoord4d)
+#define glTexCoord4dv MANGLE(TexCoord4dv)
+#define glTexCoord4fColor4fNormal3fVertex4fSUN MANGLE(TexCoord4fColor4fNormal3fVertex4fSUN)
+#define glTexCoord4fColor4fNormal3fVertex4fvSUN MANGLE(TexCoord4fColor4fNormal3fVertex4fvSUN)
+#define glTexCoord4f MANGLE(TexCoord4f)
+#define glTexCoord4fVertex4fSUN MANGLE(TexCoord4fVertex4fSUN)
+#define glTexCoord4fVertex4fvSUN MANGLE(TexCoord4fVertex4fvSUN)
+#define glTexCoord4fv MANGLE(TexCoord4fv)
+#define glTexCoord4hNV MANGLE(TexCoord4hNV)
+#define glTexCoord4hvNV MANGLE(TexCoord4hvNV)
+#define glTexCoord4i MANGLE(TexCoord4i)
+#define glTexCoord4iv MANGLE(TexCoord4iv)
+#define glTexCoord4s MANGLE(TexCoord4s)
+#define glTexCoord4sv MANGLE(TexCoord4sv)
+#define glTexCoordPointerEXT MANGLE(TexCoordPointerEXT)
+#define glTexCoordPointerListIBM MANGLE(TexCoordPointerListIBM)
+#define glTexCoordPointer MANGLE(TexCoordPointer)
+#define glTexCoordPointervINTEL MANGLE(TexCoordPointervINTEL)
+#define glTexEnvf MANGLE(TexEnvf)
+#define glTexEnvfv MANGLE(TexEnvfv)
+#define glTexEnvi MANGLE(TexEnvi)
+#define glTexEnviv MANGLE(TexEnviv)
+#define glTexFilterFuncSGIS MANGLE(TexFilterFuncSGIS)
+#define glTexGend MANGLE(TexGend)
+#define glTexGendv MANGLE(TexGendv)
+#define glTexGenf MANGLE(TexGenf)
+#define glTexGenfv MANGLE(TexGenfv)
+#define glTexGeni MANGLE(TexGeni)
+#define glTexGeniv MANGLE(TexGeniv)
+#define glTexImage1D MANGLE(TexImage1D)
+#define glTexImage2D MANGLE(TexImage2D)
+#define glTexImage3DEXT MANGLE(TexImage3DEXT)
+#define glTexImage3D MANGLE(TexImage3D)
+#define glTexImage4DSGIS MANGLE(TexImage4DSGIS)
+#define glTexParameterf MANGLE(TexParameterf)
+#define glTexParameterfv MANGLE(TexParameterfv)
+#define glTexParameterIivEXT MANGLE(TexParameterIivEXT)
+#define glTexParameteri MANGLE(TexParameteri)
+#define glTexParameterIuivEXT MANGLE(TexParameterIuivEXT)
+#define glTexParameteriv MANGLE(TexParameteriv)
+#define glTexSubImage1DEXT MANGLE(TexSubImage1DEXT)
+#define glTexSubImage1D MANGLE(TexSubImage1D)
+#define glTexSubImage2DEXT MANGLE(TexSubImage2DEXT)
+#define glTexSubImage2D MANGLE(TexSubImage2D)
+#define glTexSubImage3DEXT MANGLE(TexSubImage3DEXT)
+#define glTexSubImage3D MANGLE(TexSubImage3D)
+#define glTexSubImage4DSGIS MANGLE(TexSubImage4DSGIS)
+#define glTextureColorMaskSGIS MANGLE(TextureColorMaskSGIS)
+#define glTextureLightEXT MANGLE(TextureLightEXT)
+#define glTextureMaterialEXT MANGLE(TextureMaterialEXT)
+#define glTextureNormalEXT MANGLE(TextureNormalEXT)
+#define glTrackMatrixNV MANGLE(TrackMatrixNV)
+#define glTransformFeedbackAttribsNV MANGLE(TransformFeedbackAttribsNV)
+#define glTransformFeedbackVaryingsNV MANGLE(TransformFeedbackVaryingsNV)
+#define glTranslated MANGLE(Translated)
+#define glTranslatef MANGLE(Translatef)
+#define glUniform1fARB MANGLE(Uniform1fARB)
+#define glUniform1f MANGLE(Uniform1f)
+#define glUniform1fvARB MANGLE(Uniform1fvARB)
+#define glUniform1fv MANGLE(Uniform1fv)
+#define glUniform1iARB MANGLE(Uniform1iARB)
+#define glUniform1i MANGLE(Uniform1i)
+#define glUniform1ivARB MANGLE(Uniform1ivARB)
+#define glUniform1iv MANGLE(Uniform1iv)
+#define glUniform1uiEXT MANGLE(Uniform1uiEXT)
+#define glUniform1uivEXT MANGLE(Uniform1uivEXT)
+#define glUniform2fARB MANGLE(Uniform2fARB)
+#define glUniform2f MANGLE(Uniform2f)
+#define glUniform2fvARB MANGLE(Uniform2fvARB)
+#define glUniform2fv MANGLE(Uniform2fv)
+#define glUniform2iARB MANGLE(Uniform2iARB)
+#define glUniform2i MANGLE(Uniform2i)
+#define glUniform2ivARB MANGLE(Uniform2ivARB)
+#define glUniform2iv MANGLE(Uniform2iv)
+#define glUniform2uiEXT MANGLE(Uniform2uiEXT)
+#define glUniform2uivEXT MANGLE(Uniform2uivEXT)
+#define glUniform3fARB MANGLE(Uniform3fARB)
+#define glUniform3f MANGLE(Uniform3f)
+#define glUniform3fvARB MANGLE(Uniform3fvARB)
+#define glUniform3fv MANGLE(Uniform3fv)
+#define glUniform3iARB MANGLE(Uniform3iARB)
+#define glUniform3i MANGLE(Uniform3i)
+#define glUniform3ivARB MANGLE(Uniform3ivARB)
+#define glUniform3iv MANGLE(Uniform3iv)
+#define glUniform3uiEXT MANGLE(Uniform3uiEXT)
+#define glUniform3uivEXT MANGLE(Uniform3uivEXT)
+#define glUniform4fARB MANGLE(Uniform4fARB)
+#define glUniform4f MANGLE(Uniform4f)
+#define glUniform4fvARB MANGLE(Uniform4fvARB)
+#define glUniform4fv MANGLE(Uniform4fv)
+#define glUniform4iARB MANGLE(Uniform4iARB)
+#define glUniform4i MANGLE(Uniform4i)
+#define glUniform4ivARB MANGLE(Uniform4ivARB)
+#define glUniform4iv MANGLE(Uniform4iv)
+#define glUniform4uiEXT MANGLE(Uniform4uiEXT)
+#define glUniform4uivEXT MANGLE(Uniform4uivEXT)
+#define glUniformBufferEXT MANGLE(UniformBufferEXT)
+#define glUniformMatrix2fvARB MANGLE(UniformMatrix2fvARB)
+#define glUniformMatrix2fv MANGLE(UniformMatrix2fv)
+#define glUniformMatrix2x3fv MANGLE(UniformMatrix2x3fv)
+#define glUniformMatrix2x4fv MANGLE(UniformMatrix2x4fv)
+#define glUniformMatrix3fvARB MANGLE(UniformMatrix3fvARB)
+#define glUniformMatrix3fv MANGLE(UniformMatrix3fv)
+#define glUniformMatrix3x2fv MANGLE(UniformMatrix3x2fv)
+#define glUniformMatrix3x4fv MANGLE(UniformMatrix3x4fv)
+#define glUniformMatrix4fvARB MANGLE(UniformMatrix4fvARB)
+#define glUniformMatrix4fv MANGLE(UniformMatrix4fv)
+#define glUniformMatrix4x2fv MANGLE(UniformMatrix4x2fv)
+#define glUniformMatrix4x3fv MANGLE(UniformMatrix4x3fv)
+#define glUnlockArraysEXT MANGLE(UnlockArraysEXT)
+#define glUnmapBufferARB MANGLE(UnmapBufferARB)
+#define glUnmapBuffer MANGLE(UnmapBuffer)
+#define glUnmapObjectBufferATI MANGLE(UnmapObjectBufferATI)
+#define glUpdateObjectBufferATI MANGLE(UpdateObjectBufferATI)
+#define glUseProgram MANGLE(UseProgram)
+#define glUseProgramObjectARB MANGLE(UseProgramObjectARB)
+#define glValidateProgramARB MANGLE(ValidateProgramARB)
+#define glValidateProgram MANGLE(ValidateProgram)
+#define glVariantArrayObjectATI MANGLE(VariantArrayObjectATI)
+#define glVariantbvEXT MANGLE(VariantbvEXT)
+#define glVariantdvEXT MANGLE(VariantdvEXT)
+#define glVariantfvEXT MANGLE(VariantfvEXT)
+#define glVariantivEXT MANGLE(VariantivEXT)
+#define glVariantPointerEXT MANGLE(VariantPointerEXT)
+#define glVariantsvEXT MANGLE(VariantsvEXT)
+#define glVariantubvEXT MANGLE(VariantubvEXT)
+#define glVariantuivEXT MANGLE(VariantuivEXT)
+#define glVariantusvEXT MANGLE(VariantusvEXT)
+#define glVertex2d MANGLE(Vertex2d)
+#define glVertex2dv MANGLE(Vertex2dv)
+#define glVertex2f MANGLE(Vertex2f)
+#define glVertex2fv MANGLE(Vertex2fv)
+#define glVertex2hNV MANGLE(Vertex2hNV)
+#define glVertex2hvNV MANGLE(Vertex2hvNV)
+#define glVertex2i MANGLE(Vertex2i)
+#define glVertex2iv MANGLE(Vertex2iv)
+#define glVertex2s MANGLE(Vertex2s)
+#define glVertex2sv MANGLE(Vertex2sv)
+#define glVertex3d MANGLE(Vertex3d)
+#define glVertex3dv MANGLE(Vertex3dv)
+#define glVertex3f MANGLE(Vertex3f)
+#define glVertex3fv MANGLE(Vertex3fv)
+#define glVertex3hNV MANGLE(Vertex3hNV)
+#define glVertex3hvNV MANGLE(Vertex3hvNV)
+#define glVertex3i MANGLE(Vertex3i)
+#define glVertex3iv MANGLE(Vertex3iv)
+#define glVertex3s MANGLE(Vertex3s)
+#define glVertex3sv MANGLE(Vertex3sv)
+#define glVertex4d MANGLE(Vertex4d)
+#define glVertex4dv MANGLE(Vertex4dv)
+#define glVertex4f MANGLE(Vertex4f)
+#define glVertex4fv MANGLE(Vertex4fv)
+#define glVertex4hNV MANGLE(Vertex4hNV)
+#define glVertex4hvNV MANGLE(Vertex4hvNV)
+#define glVertex4i MANGLE(Vertex4i)
+#define glVertex4iv MANGLE(Vertex4iv)
+#define glVertex4s MANGLE(Vertex4s)
+#define glVertex4sv MANGLE(Vertex4sv)
+#define glVertexArrayParameteriAPPLE MANGLE(VertexArrayParameteriAPPLE)
+#define glVertexArrayRangeAPPLE MANGLE(VertexArrayRangeAPPLE)
+#define glVertexArrayRangeNV MANGLE(VertexArrayRangeNV)
+#define glVertexAttrib1dARB MANGLE(VertexAttrib1dARB)
+#define glVertexAttrib1d MANGLE(VertexAttrib1d)
+#define glVertexAttrib1dNV MANGLE(VertexAttrib1dNV)
+#define glVertexAttrib1dvARB MANGLE(VertexAttrib1dvARB)
+#define glVertexAttrib1dv MANGLE(VertexAttrib1dv)
+#define glVertexAttrib1dvNV MANGLE(VertexAttrib1dvNV)
+#define glVertexAttrib1fARB MANGLE(VertexAttrib1fARB)
+#define glVertexAttrib1f MANGLE(VertexAttrib1f)
+#define glVertexAttrib1fNV MANGLE(VertexAttrib1fNV)
+#define glVertexAttrib1fvARB MANGLE(VertexAttrib1fvARB)
+#define glVertexAttrib1fv MANGLE(VertexAttrib1fv)
+#define glVertexAttrib1fvNV MANGLE(VertexAttrib1fvNV)
+#define glVertexAttrib1hNV MANGLE(VertexAttrib1hNV)
+#define glVertexAttrib1hvNV MANGLE(VertexAttrib1hvNV)
+#define glVertexAttrib1sARB MANGLE(VertexAttrib1sARB)
+#define glVertexAttrib1s MANGLE(VertexAttrib1s)
+#define glVertexAttrib1sNV MANGLE(VertexAttrib1sNV)
+#define glVertexAttrib1svARB MANGLE(VertexAttrib1svARB)
+#define glVertexAttrib1sv MANGLE(VertexAttrib1sv)
+#define glVertexAttrib1svNV MANGLE(VertexAttrib1svNV)
+#define glVertexAttrib2dARB MANGLE(VertexAttrib2dARB)
+#define glVertexAttrib2d MANGLE(VertexAttrib2d)
+#define glVertexAttrib2dNV MANGLE(VertexAttrib2dNV)
+#define glVertexAttrib2dvARB MANGLE(VertexAttrib2dvARB)
+#define glVertexAttrib2dv MANGLE(VertexAttrib2dv)
+#define glVertexAttrib2dvNV MANGLE(VertexAttrib2dvNV)
+#define glVertexAttrib2fARB MANGLE(VertexAttrib2fARB)
+#define glVertexAttrib2f MANGLE(VertexAttrib2f)
+#define glVertexAttrib2fNV MANGLE(VertexAttrib2fNV)
+#define glVertexAttrib2fvARB MANGLE(VertexAttrib2fvARB)
+#define glVertexAttrib2fv MANGLE(VertexAttrib2fv)
+#define glVertexAttrib2fvNV MANGLE(VertexAttrib2fvNV)
+#define glVertexAttrib2hNV MANGLE(VertexAttrib2hNV)
+#define glVertexAttrib2hvNV MANGLE(VertexAttrib2hvNV)
+#define glVertexAttrib2sARB MANGLE(VertexAttrib2sARB)
+#define glVertexAttrib2s MANGLE(VertexAttrib2s)
+#define glVertexAttrib2sNV MANGLE(VertexAttrib2sNV)
+#define glVertexAttrib2svARB MANGLE(VertexAttrib2svARB)
+#define glVertexAttrib2sv MANGLE(VertexAttrib2sv)
+#define glVertexAttrib2svNV MANGLE(VertexAttrib2svNV)
+#define glVertexAttrib3dARB MANGLE(VertexAttrib3dARB)
+#define glVertexAttrib3d MANGLE(VertexAttrib3d)
+#define glVertexAttrib3dNV MANGLE(VertexAttrib3dNV)
+#define glVertexAttrib3dvARB MANGLE(VertexAttrib3dvARB)
+#define glVertexAttrib3dv MANGLE(VertexAttrib3dv)
+#define glVertexAttrib3dvNV MANGLE(VertexAttrib3dvNV)
+#define glVertexAttrib3fARB MANGLE(VertexAttrib3fARB)
+#define glVertexAttrib3f MANGLE(VertexAttrib3f)
+#define glVertexAttrib3fNV MANGLE(VertexAttrib3fNV)
+#define glVertexAttrib3fvARB MANGLE(VertexAttrib3fvARB)
+#define glVertexAttrib3fv MANGLE(VertexAttrib3fv)
+#define glVertexAttrib3fvNV MANGLE(VertexAttrib3fvNV)
+#define glVertexAttrib3hNV MANGLE(VertexAttrib3hNV)
+#define glVertexAttrib3hvNV MANGLE(VertexAttrib3hvNV)
+#define glVertexAttrib3sARB MANGLE(VertexAttrib3sARB)
+#define glVertexAttrib3s MANGLE(VertexAttrib3s)
+#define glVertexAttrib3sNV MANGLE(VertexAttrib3sNV)
+#define glVertexAttrib3svARB MANGLE(VertexAttrib3svARB)
+#define glVertexAttrib3sv MANGLE(VertexAttrib3sv)
+#define glVertexAttrib3svNV MANGLE(VertexAttrib3svNV)
+#define glVertexAttrib4bvARB MANGLE(VertexAttrib4bvARB)
+#define glVertexAttrib4bv MANGLE(VertexAttrib4bv)
+#define glVertexAttrib4dARB MANGLE(VertexAttrib4dARB)
+#define glVertexAttrib4d MANGLE(VertexAttrib4d)
+#define glVertexAttrib4dNV MANGLE(VertexAttrib4dNV)
+#define glVertexAttrib4dvARB MANGLE(VertexAttrib4dvARB)
+#define glVertexAttrib4dv MANGLE(VertexAttrib4dv)
+#define glVertexAttrib4dvNV MANGLE(VertexAttrib4dvNV)
+#define glVertexAttrib4fARB MANGLE(VertexAttrib4fARB)
+#define glVertexAttrib4f MANGLE(VertexAttrib4f)
+#define glVertexAttrib4fNV MANGLE(VertexAttrib4fNV)
+#define glVertexAttrib4fvARB MANGLE(VertexAttrib4fvARB)
+#define glVertexAttrib4fv MANGLE(VertexAttrib4fv)
+#define glVertexAttrib4fvNV MANGLE(VertexAttrib4fvNV)
+#define glVertexAttrib4hNV MANGLE(VertexAttrib4hNV)
+#define glVertexAttrib4hvNV MANGLE(VertexAttrib4hvNV)
+#define glVertexAttrib4ivARB MANGLE(VertexAttrib4ivARB)
+#define glVertexAttrib4iv MANGLE(VertexAttrib4iv)
+#define glVertexAttrib4NbvARB MANGLE(VertexAttrib4NbvARB)
+#define glVertexAttrib4Nbv MANGLE(VertexAttrib4Nbv)
+#define glVertexAttrib4NivARB MANGLE(VertexAttrib4NivARB)
+#define glVertexAttrib4Niv MANGLE(VertexAttrib4Niv)
+#define glVertexAttrib4NsvARB MANGLE(VertexAttrib4NsvARB)
+#define glVertexAttrib4Nsv MANGLE(VertexAttrib4Nsv)
+#define glVertexAttrib4NubARB MANGLE(VertexAttrib4NubARB)
+#define glVertexAttrib4Nub MANGLE(VertexAttrib4Nub)
+#define glVertexAttrib4NubvARB MANGLE(VertexAttrib4NubvARB)
+#define glVertexAttrib4Nubv MANGLE(VertexAttrib4Nubv)
+#define glVertexAttrib4NuivARB MANGLE(VertexAttrib4NuivARB)
+#define glVertexAttrib4Nuiv MANGLE(VertexAttrib4Nuiv)
+#define glVertexAttrib4NusvARB MANGLE(VertexAttrib4NusvARB)
+#define glVertexAttrib4Nusv MANGLE(VertexAttrib4Nusv)
+#define glVertexAttrib4sARB MANGLE(VertexAttrib4sARB)
+#define glVertexAttrib4s MANGLE(VertexAttrib4s)
+#define glVertexAttrib4sNV MANGLE(VertexAttrib4sNV)
+#define glVertexAttrib4svARB MANGLE(VertexAttrib4svARB)
+#define glVertexAttrib4sv MANGLE(VertexAttrib4sv)
+#define glVertexAttrib4svNV MANGLE(VertexAttrib4svNV)
+#define glVertexAttrib4ubNV MANGLE(VertexAttrib4ubNV)
+#define glVertexAttrib4ubvARB MANGLE(VertexAttrib4ubvARB)
+#define glVertexAttrib4ubv MANGLE(VertexAttrib4ubv)
+#define glVertexAttrib4ubvNV MANGLE(VertexAttrib4ubvNV)
+#define glVertexAttrib4uivARB MANGLE(VertexAttrib4uivARB)
+#define glVertexAttrib4uiv MANGLE(VertexAttrib4uiv)
+#define glVertexAttrib4usvARB MANGLE(VertexAttrib4usvARB)
+#define glVertexAttrib4usv MANGLE(VertexAttrib4usv)
+#define glVertexAttribArrayObjectATI MANGLE(VertexAttribArrayObjectATI)
+#define glVertexAttribI1iEXT MANGLE(VertexAttribI1iEXT)
+#define glVertexAttribI1ivEXT MANGLE(VertexAttribI1ivEXT)
+#define glVertexAttribI1uiEXT MANGLE(VertexAttribI1uiEXT)
+#define glVertexAttribI1uivEXT MANGLE(VertexAttribI1uivEXT)
+#define glVertexAttribI2iEXT MANGLE(VertexAttribI2iEXT)
+#define glVertexAttribI2ivEXT MANGLE(VertexAttribI2ivEXT)
+#define glVertexAttribI2uiEXT MANGLE(VertexAttribI2uiEXT)
+#define glVertexAttribI2uivEXT MANGLE(VertexAttribI2uivEXT)
+#define glVertexAttribI3iEXT MANGLE(VertexAttribI3iEXT)
+#define glVertexAttribI3ivEXT MANGLE(VertexAttribI3ivEXT)
+#define glVertexAttribI3uiEXT MANGLE(VertexAttribI3uiEXT)
+#define glVertexAttribI3uivEXT MANGLE(VertexAttribI3uivEXT)
+#define glVertexAttribI4bvEXT MANGLE(VertexAttribI4bvEXT)
+#define glVertexAttribI4iEXT MANGLE(VertexAttribI4iEXT)
+#define glVertexAttribI4ivEXT MANGLE(VertexAttribI4ivEXT)
+#define glVertexAttribI4svEXT MANGLE(VertexAttribI4svEXT)
+#define glVertexAttribI4ubvEXT MANGLE(VertexAttribI4ubvEXT)
+#define glVertexAttribI4uiEXT MANGLE(VertexAttribI4uiEXT)
+#define glVertexAttribI4uivEXT MANGLE(VertexAttribI4uivEXT)
+#define glVertexAttribI4usvEXT MANGLE(VertexAttribI4usvEXT)
+#define glVertexAttribIPointerEXT MANGLE(VertexAttribIPointerEXT)
+#define glVertexAttribPointerARB MANGLE(VertexAttribPointerARB)
+#define glVertexAttribPointer MANGLE(VertexAttribPointer)
+#define glVertexAttribPointerNV MANGLE(VertexAttribPointerNV)
+#define glVertexAttribs1dvNV MANGLE(VertexAttribs1dvNV)
+#define glVertexAttribs1fvNV MANGLE(VertexAttribs1fvNV)
+#define glVertexAttribs1hvNV MANGLE(VertexAttribs1hvNV)
+#define glVertexAttribs1svNV MANGLE(VertexAttribs1svNV)
+#define glVertexAttribs2dvNV MANGLE(VertexAttribs2dvNV)
+#define glVertexAttribs2fvNV MANGLE(VertexAttribs2fvNV)
+#define glVertexAttribs2hvNV MANGLE(VertexAttribs2hvNV)
+#define glVertexAttribs2svNV MANGLE(VertexAttribs2svNV)
+#define glVertexAttribs3dvNV MANGLE(VertexAttribs3dvNV)
+#define glVertexAttribs3fvNV MANGLE(VertexAttribs3fvNV)
+#define glVertexAttribs3hvNV MANGLE(VertexAttribs3hvNV)
+#define glVertexAttribs3svNV MANGLE(VertexAttribs3svNV)
+#define glVertexAttribs4dvNV MANGLE(VertexAttribs4dvNV)
+#define glVertexAttribs4fvNV MANGLE(VertexAttribs4fvNV)
+#define glVertexAttribs4hvNV MANGLE(VertexAttribs4hvNV)
+#define glVertexAttribs4svNV MANGLE(VertexAttribs4svNV)
+#define glVertexAttribs4ubvNV MANGLE(VertexAttribs4ubvNV)
+#define glVertexBlendARB MANGLE(VertexBlendARB)
+#define glVertexBlendEnvfATI MANGLE(VertexBlendEnvfATI)
+#define glVertexBlendEnviATI MANGLE(VertexBlendEnviATI)
+#define glVertexPointerEXT MANGLE(VertexPointerEXT)
+#define glVertexPointerListIBM MANGLE(VertexPointerListIBM)
+#define glVertexPointer MANGLE(VertexPointer)
+#define glVertexPointervINTEL MANGLE(VertexPointervINTEL)
+#define glVertexStream1dATI MANGLE(VertexStream1dATI)
+#define glVertexStream1dvATI MANGLE(VertexStream1dvATI)
+#define glVertexStream1fATI MANGLE(VertexStream1fATI)
+#define glVertexStream1fvATI MANGLE(VertexStream1fvATI)
+#define glVertexStream1iATI MANGLE(VertexStream1iATI)
+#define glVertexStream1ivATI MANGLE(VertexStream1ivATI)
+#define glVertexStream1sATI MANGLE(VertexStream1sATI)
+#define glVertexStream1svATI MANGLE(VertexStream1svATI)
+#define glVertexStream2dATI MANGLE(VertexStream2dATI)
+#define glVertexStream2dvATI MANGLE(VertexStream2dvATI)
+#define glVertexStream2fATI MANGLE(VertexStream2fATI)
+#define glVertexStream2fvATI MANGLE(VertexStream2fvATI)
+#define glVertexStream2iATI MANGLE(VertexStream2iATI)
+#define glVertexStream2ivATI MANGLE(VertexStream2ivATI)
+#define glVertexStream2sATI MANGLE(VertexStream2sATI)
+#define glVertexStream2svATI MANGLE(VertexStream2svATI)
+#define glVertexStream3dATI MANGLE(VertexStream3dATI)
+#define glVertexStream3dvATI MANGLE(VertexStream3dvATI)
+#define glVertexStream3fATI MANGLE(VertexStream3fATI)
+#define glVertexStream3fvATI MANGLE(VertexStream3fvATI)
+#define glVertexStream3iATI MANGLE(VertexStream3iATI)
+#define glVertexStream3ivATI MANGLE(VertexStream3ivATI)
+#define glVertexStream3sATI MANGLE(VertexStream3sATI)
+#define glVertexStream3svATI MANGLE(VertexStream3svATI)
+#define glVertexStream4dATI MANGLE(VertexStream4dATI)
+#define glVertexStream4dvATI MANGLE(VertexStream4dvATI)
+#define glVertexStream4fATI MANGLE(VertexStream4fATI)
+#define glVertexStream4fvATI MANGLE(VertexStream4fvATI)
+#define glVertexStream4iATI MANGLE(VertexStream4iATI)
+#define glVertexStream4ivATI MANGLE(VertexStream4ivATI)
+#define glVertexStream4sATI MANGLE(VertexStream4sATI)
+#define glVertexStream4svATI MANGLE(VertexStream4svATI)
+#define glVertexWeightfEXT MANGLE(VertexWeightfEXT)
+#define glVertexWeightfvEXT MANGLE(VertexWeightfvEXT)
+#define glVertexWeighthNV MANGLE(VertexWeighthNV)
+#define glVertexWeighthvNV MANGLE(VertexWeighthvNV)
+#define glVertexWeightPointerEXT MANGLE(VertexWeightPointerEXT)
+#define glViewport MANGLE(Viewport)
+#define glWeightbvARB MANGLE(WeightbvARB)
+#define glWeightdvARB MANGLE(WeightdvARB)
+#define glWeightfvARB MANGLE(WeightfvARB)
+#define glWeightivARB MANGLE(WeightivARB)
+#define glWeightPointerARB MANGLE(WeightPointerARB)
+#define glWeightsvARB MANGLE(WeightsvARB)
+#define glWeightubvARB MANGLE(WeightubvARB)
+#define glWeightuivARB MANGLE(WeightuivARB)
+#define glWeightusvARB MANGLE(WeightusvARB)
+#define glWindowPos2dARB MANGLE(WindowPos2dARB)
+#define glWindowPos2d MANGLE(WindowPos2d)
+#define glWindowPos2dMESA MANGLE(WindowPos2dMESA)
+#define glWindowPos2dvARB MANGLE(WindowPos2dvARB)
+#define glWindowPos2dv MANGLE(WindowPos2dv)
+#define glWindowPos2dvMESA MANGLE(WindowPos2dvMESA)
+#define glWindowPos2fARB MANGLE(WindowPos2fARB)
+#define glWindowPos2f MANGLE(WindowPos2f)
+#define glWindowPos2fMESA MANGLE(WindowPos2fMESA)
+#define glWindowPos2fvARB MANGLE(WindowPos2fvARB)
+#define glWindowPos2fv MANGLE(WindowPos2fv)
+#define glWindowPos2fvMESA MANGLE(WindowPos2fvMESA)
+#define glWindowPos2iARB MANGLE(WindowPos2iARB)
+#define glWindowPos2i MANGLE(WindowPos2i)
+#define glWindowPos2iMESA MANGLE(WindowPos2iMESA)
+#define glWindowPos2ivARB MANGLE(WindowPos2ivARB)
+#define glWindowPos2iv MANGLE(WindowPos2iv)
+#define glWindowPos2ivMESA MANGLE(WindowPos2ivMESA)
+#define glWindowPos2sARB MANGLE(WindowPos2sARB)
+#define glWindowPos2s MANGLE(WindowPos2s)
+#define glWindowPos2sMESA MANGLE(WindowPos2sMESA)
+#define glWindowPos2svARB MANGLE(WindowPos2svARB)
+#define glWindowPos2sv MANGLE(WindowPos2sv)
+#define glWindowPos2svMESA MANGLE(WindowPos2svMESA)
+#define glWindowPos3dARB MANGLE(WindowPos3dARB)
+#define glWindowPos3d MANGLE(WindowPos3d)
+#define glWindowPos3dMESA MANGLE(WindowPos3dMESA)
+#define glWindowPos3dvARB MANGLE(WindowPos3dvARB)
+#define glWindowPos3dv MANGLE(WindowPos3dv)
+#define glWindowPos3dvMESA MANGLE(WindowPos3dvMESA)
+#define glWindowPos3fARB MANGLE(WindowPos3fARB)
+#define glWindowPos3f MANGLE(WindowPos3f)
+#define glWindowPos3fMESA MANGLE(WindowPos3fMESA)
+#define glWindowPos3fvARB MANGLE(WindowPos3fvARB)
+#define glWindowPos3fv MANGLE(WindowPos3fv)
+#define glWindowPos3fvMESA MANGLE(WindowPos3fvMESA)
+#define glWindowPos3iARB MANGLE(WindowPos3iARB)
+#define glWindowPos3i MANGLE(WindowPos3i)
+#define glWindowPos3iMESA MANGLE(WindowPos3iMESA)
+#define glWindowPos3ivARB MANGLE(WindowPos3ivARB)
+#define glWindowPos3iv MANGLE(WindowPos3iv)
+#define glWindowPos3ivMESA MANGLE(WindowPos3ivMESA)
+#define glWindowPos3sARB MANGLE(WindowPos3sARB)
+#define glWindowPos3s MANGLE(WindowPos3s)
+#define glWindowPos3sMESA MANGLE(WindowPos3sMESA)
+#define glWindowPos3svARB MANGLE(WindowPos3svARB)
+#define glWindowPos3sv MANGLE(WindowPos3sv)
+#define glWindowPos3svMESA MANGLE(WindowPos3svMESA)
+#define glWindowPos4dMESA MANGLE(WindowPos4dMESA)
+#define glWindowPos4dvMESA MANGLE(WindowPos4dvMESA)
+#define glWindowPos4fMESA MANGLE(WindowPos4fMESA)
+#define glWindowPos4fvMESA MANGLE(WindowPos4fvMESA)
+#define glWindowPos4iMESA MANGLE(WindowPos4iMESA)
+#define glWindowPos4ivMESA MANGLE(WindowPos4ivMESA)
+#define glWindowPos4sMESA MANGLE(WindowPos4sMESA)
+#define glWindowPos4svMESA MANGLE(WindowPos4svMESA)
+#define glWriteMaskEXT MANGLE(WriteMaskEXT)
+
+#endif /* GL_MANGLE_H */
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glext.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glext.h
new file mode 100644
index 0000000..2519a6c
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glext.h
@@ -0,0 +1,7260 @@
+#ifndef __glext_h_
+#define __glext_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** Copyright (c) 2007 The Khronos Group Inc.
+**
+** Permission is hereby granted, free of charge, to any person obtaining a
+** copy of this software and/or associated documentation files (the
+** "Materials"), to deal in the Materials without restriction, including
+** without limitation the rights to use, copy, modify, merge, publish,
+** distribute, sublicense, and/or sell copies of the Materials, and to
+** permit persons to whom the Materials are furnished to do so, subject to
+** the following conditions:
+**
+** The above copyright notice and this permission notice shall be included
+** in all copies or substantial portions of the Materials.
+**
+** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+*/
+
+#if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__) && !defined(__SCITECH_SNAP__)
+#define WIN32_LEAN_AND_MEAN 1
+#include <windows.h>
+#endif
+
+#ifndef APIENTRY
+#define APIENTRY
+#endif
+#ifndef APIENTRYP
+#define APIENTRYP APIENTRY *
+#endif
+#ifndef GLAPI
+#define GLAPI extern
+#endif
+
+/*************************************************************/
+
+/* Header file version number, required by OpenGL ABI for Linux */
+/* glext.h last updated 2007/02/12 */
+/* Current version at http://www.opengl.org/registry/ */
+#define GL_GLEXT_VERSION 39
+
+#ifndef GL_VERSION_1_2
+#define GL_UNSIGNED_BYTE_3_3_2 0x8032
+#define GL_UNSIGNED_SHORT_4_4_4_4 0x8033
+#define GL_UNSIGNED_SHORT_5_5_5_1 0x8034
+#define GL_UNSIGNED_INT_8_8_8_8 0x8035
+#define GL_UNSIGNED_INT_10_10_10_2 0x8036
+#define GL_RESCALE_NORMAL 0x803A
+#define GL_TEXTURE_BINDING_3D 0x806A
+#define GL_PACK_SKIP_IMAGES 0x806B
+#define GL_PACK_IMAGE_HEIGHT 0x806C
+#define GL_UNPACK_SKIP_IMAGES 0x806D
+#define GL_UNPACK_IMAGE_HEIGHT 0x806E
+#define GL_TEXTURE_3D 0x806F
+#define GL_PROXY_TEXTURE_3D 0x8070
+#define GL_TEXTURE_DEPTH 0x8071
+#define GL_TEXTURE_WRAP_R 0x8072
+#define GL_MAX_3D_TEXTURE_SIZE 0x8073
+#define GL_UNSIGNED_BYTE_2_3_3_REV 0x8362
+#define GL_UNSIGNED_SHORT_5_6_5 0x8363
+#define GL_UNSIGNED_SHORT_5_6_5_REV 0x8364
+#define GL_UNSIGNED_SHORT_4_4_4_4_REV 0x8365
+#define GL_UNSIGNED_SHORT_1_5_5_5_REV 0x8366
+#define GL_UNSIGNED_INT_8_8_8_8_REV 0x8367
+#define GL_UNSIGNED_INT_2_10_10_10_REV 0x8368
+#define GL_BGR 0x80E0
+#define GL_BGRA 0x80E1
+#define GL_MAX_ELEMENTS_VERTICES 0x80E8
+#define GL_MAX_ELEMENTS_INDICES 0x80E9
+#define GL_CLAMP_TO_EDGE 0x812F
+#define GL_TEXTURE_MIN_LOD 0x813A
+#define GL_TEXTURE_MAX_LOD 0x813B
+#define GL_TEXTURE_BASE_LEVEL 0x813C
+#define GL_TEXTURE_MAX_LEVEL 0x813D
+#define GL_LIGHT_MODEL_COLOR_CONTROL 0x81F8
+#define GL_SINGLE_COLOR 0x81F9
+#define GL_SEPARATE_SPECULAR_COLOR 0x81FA
+#define GL_SMOOTH_POINT_SIZE_RANGE 0x0B12
+#define GL_SMOOTH_POINT_SIZE_GRANULARITY 0x0B13
+#define GL_SMOOTH_LINE_WIDTH_RANGE 0x0B22
+#define GL_SMOOTH_LINE_WIDTH_GRANULARITY 0x0B23
+#define GL_ALIASED_POINT_SIZE_RANGE 0x846D
+#define GL_ALIASED_LINE_WIDTH_RANGE 0x846E
+#endif
+
+#ifndef GL_ARB_imaging
+#define GL_CONSTANT_COLOR 0x8001
+#define GL_ONE_MINUS_CONSTANT_COLOR 0x8002
+#define GL_CONSTANT_ALPHA 0x8003
+#define GL_ONE_MINUS_CONSTANT_ALPHA 0x8004
+#define GL_BLEND_COLOR 0x8005
+#define GL_FUNC_ADD 0x8006
+#define GL_MIN 0x8007
+#define GL_MAX 0x8008
+#define GL_BLEND_EQUATION 0x8009
+#define GL_FUNC_SUBTRACT 0x800A
+#define GL_FUNC_REVERSE_SUBTRACT 0x800B
+#define GL_CONVOLUTION_1D 0x8010
+#define GL_CONVOLUTION_2D 0x8011
+#define GL_SEPARABLE_2D 0x8012
+#define GL_CONVOLUTION_BORDER_MODE 0x8013
+#define GL_CONVOLUTION_FILTER_SCALE 0x8014
+#define GL_CONVOLUTION_FILTER_BIAS 0x8015
+#define GL_REDUCE 0x8016
+#define GL_CONVOLUTION_FORMAT 0x8017
+#define GL_CONVOLUTION_WIDTH 0x8018
+#define GL_CONVOLUTION_HEIGHT 0x8019
+#define GL_MAX_CONVOLUTION_WIDTH 0x801A
+#define GL_MAX_CONVOLUTION_HEIGHT 0x801B
+#define GL_POST_CONVOLUTION_RED_SCALE 0x801C
+#define GL_POST_CONVOLUTION_GREEN_SCALE 0x801D
+#define GL_POST_CONVOLUTION_BLUE_SCALE 0x801E
+#define GL_POST_CONVOLUTION_ALPHA_SCALE 0x801F
+#define GL_POST_CONVOLUTION_RED_BIAS 0x8020
+#define GL_POST_CONVOLUTION_GREEN_BIAS 0x8021
+#define GL_POST_CONVOLUTION_BLUE_BIAS 0x8022
+#define GL_POST_CONVOLUTION_ALPHA_BIAS 0x8023
+#define GL_HISTOGRAM 0x8024
+#define GL_PROXY_HISTOGRAM 0x8025
+#define GL_HISTOGRAM_WIDTH 0x8026
+#define GL_HISTOGRAM_FORMAT 0x8027
+#define GL_HISTOGRAM_RED_SIZE 0x8028
+#define GL_HISTOGRAM_GREEN_SIZE 0x8029
+#define GL_HISTOGRAM_BLUE_SIZE 0x802A
+#define GL_HISTOGRAM_ALPHA_SIZE 0x802B
+#define GL_HISTOGRAM_LUMINANCE_SIZE 0x802C
+#define GL_HISTOGRAM_SINK 0x802D
+#define GL_MINMAX 0x802E
+#define GL_MINMAX_FORMAT 0x802F
+#define GL_MINMAX_SINK 0x8030
+#define GL_TABLE_TOO_LARGE 0x8031
+#define GL_COLOR_MATRIX 0x80B1
+#define GL_COLOR_MATRIX_STACK_DEPTH 0x80B2
+#define GL_MAX_COLOR_MATRIX_STACK_DEPTH 0x80B3
+#define GL_POST_COLOR_MATRIX_RED_SCALE 0x80B4
+#define GL_POST_COLOR_MATRIX_GREEN_SCALE 0x80B5
+#define GL_POST_COLOR_MATRIX_BLUE_SCALE 0x80B6
+#define GL_POST_COLOR_MATRIX_ALPHA_SCALE 0x80B7
+#define GL_POST_COLOR_MATRIX_RED_BIAS 0x80B8
+#define GL_POST_COLOR_MATRIX_GREEN_BIAS 0x80B9
+#define GL_POST_COLOR_MATRIX_BLUE_BIAS 0x80BA
+#define GL_POST_COLOR_MATRIX_ALPHA_BIAS 0x80BB
+#define GL_COLOR_TABLE 0x80D0
+#define GL_POST_CONVOLUTION_COLOR_TABLE 0x80D1
+#define GL_POST_COLOR_MATRIX_COLOR_TABLE 0x80D2
+#define GL_PROXY_COLOR_TABLE 0x80D3
+#define GL_PROXY_POST_CONVOLUTION_COLOR_TABLE 0x80D4
+#define GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE 0x80D5
+#define GL_COLOR_TABLE_SCALE 0x80D6
+#define GL_COLOR_TABLE_BIAS 0x80D7
+#define GL_COLOR_TABLE_FORMAT 0x80D8
+#define GL_COLOR_TABLE_WIDTH 0x80D9
+#define GL_COLOR_TABLE_RED_SIZE 0x80DA
+#define GL_COLOR_TABLE_GREEN_SIZE 0x80DB
+#define GL_COLOR_TABLE_BLUE_SIZE 0x80DC
+#define GL_COLOR_TABLE_ALPHA_SIZE 0x80DD
+#define GL_COLOR_TABLE_LUMINANCE_SIZE 0x80DE
+#define GL_COLOR_TABLE_INTENSITY_SIZE 0x80DF
+#define GL_CONSTANT_BORDER 0x8151
+#define GL_REPLICATE_BORDER 0x8153
+#define GL_CONVOLUTION_BORDER_COLOR 0x8154
+#endif
+
+#ifndef GL_VERSION_1_3
+#define GL_TEXTURE0 0x84C0
+#define GL_TEXTURE1 0x84C1
+#define GL_TEXTURE2 0x84C2
+#define GL_TEXTURE3 0x84C3
+#define GL_TEXTURE4 0x84C4
+#define GL_TEXTURE5 0x84C5
+#define GL_TEXTURE6 0x84C6
+#define GL_TEXTURE7 0x84C7
+#define GL_TEXTURE8 0x84C8
+#define GL_TEXTURE9 0x84C9
+#define GL_TEXTURE10 0x84CA
+#define GL_TEXTURE11 0x84CB
+#define GL_TEXTURE12 0x84CC
+#define GL_TEXTURE13 0x84CD
+#define GL_TEXTURE14 0x84CE
+#define GL_TEXTURE15 0x84CF
+#define GL_TEXTURE16 0x84D0
+#define GL_TEXTURE17 0x84D1
+#define GL_TEXTURE18 0x84D2
+#define GL_TEXTURE19 0x84D3
+#define GL_TEXTURE20 0x84D4
+#define GL_TEXTURE21 0x84D5
+#define GL_TEXTURE22 0x84D6
+#define GL_TEXTURE23 0x84D7
+#define GL_TEXTURE24 0x84D8
+#define GL_TEXTURE25 0x84D9
+#define GL_TEXTURE26 0x84DA
+#define GL_TEXTURE27 0x84DB
+#define GL_TEXTURE28 0x84DC
+#define GL_TEXTURE29 0x84DD
+#define GL_TEXTURE30 0x84DE
+#define GL_TEXTURE31 0x84DF
+#define GL_ACTIVE_TEXTURE 0x84E0
+#define GL_CLIENT_ACTIVE_TEXTURE 0x84E1
+#define GL_MAX_TEXTURE_UNITS 0x84E2
+#define GL_TRANSPOSE_MODELVIEW_MATRIX 0x84E3
+#define GL_TRANSPOSE_PROJECTION_MATRIX 0x84E4
+#define GL_TRANSPOSE_TEXTURE_MATRIX 0x84E5
+#define GL_TRANSPOSE_COLOR_MATRIX 0x84E6
+#define GL_MULTISAMPLE 0x809D
+#define GL_SAMPLE_ALPHA_TO_COVERAGE 0x809E
+#define GL_SAMPLE_ALPHA_TO_ONE 0x809F
+#define GL_SAMPLE_COVERAGE 0x80A0
+#define GL_SAMPLE_BUFFERS 0x80A8
+#define GL_SAMPLES 0x80A9
+#define GL_SAMPLE_COVERAGE_VALUE 0x80AA
+#define GL_SAMPLE_COVERAGE_INVERT 0x80AB
+#define GL_MULTISAMPLE_BIT 0x20000000
+#define GL_NORMAL_MAP 0x8511
+#define GL_REFLECTION_MAP 0x8512
+#define GL_TEXTURE_CUBE_MAP 0x8513
+#define GL_TEXTURE_BINDING_CUBE_MAP 0x8514
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_X 0x8515
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X 0x8516
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y 0x8517
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y 0x8518
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x8519
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x851A
+#define GL_PROXY_TEXTURE_CUBE_MAP 0x851B
+#define GL_MAX_CUBE_MAP_TEXTURE_SIZE 0x851C
+#define GL_COMPRESSED_ALPHA 0x84E9
+#define GL_COMPRESSED_LUMINANCE 0x84EA
+#define GL_COMPRESSED_LUMINANCE_ALPHA 0x84EB
+#define GL_COMPRESSED_INTENSITY 0x84EC
+#define GL_COMPRESSED_RGB 0x84ED
+#define GL_COMPRESSED_RGBA 0x84EE
+#define GL_TEXTURE_COMPRESSION_HINT 0x84EF
+#define GL_TEXTURE_COMPRESSED_IMAGE_SIZE 0x86A0
+#define GL_TEXTURE_COMPRESSED 0x86A1
+#define GL_NUM_COMPRESSED_TEXTURE_FORMATS 0x86A2
+#define GL_COMPRESSED_TEXTURE_FORMATS 0x86A3
+#define GL_CLAMP_TO_BORDER 0x812D
+#define GL_COMBINE 0x8570
+#define GL_COMBINE_RGB 0x8571
+#define GL_COMBINE_ALPHA 0x8572
+#define GL_SOURCE0_RGB 0x8580
+#define GL_SOURCE1_RGB 0x8581
+#define GL_SOURCE2_RGB 0x8582
+#define GL_SOURCE0_ALPHA 0x8588
+#define GL_SOURCE1_ALPHA 0x8589
+#define GL_SOURCE2_ALPHA 0x858A
+#define GL_OPERAND0_RGB 0x8590
+#define GL_OPERAND1_RGB 0x8591
+#define GL_OPERAND2_RGB 0x8592
+#define GL_OPERAND0_ALPHA 0x8598
+#define GL_OPERAND1_ALPHA 0x8599
+#define GL_OPERAND2_ALPHA 0x859A
+#define GL_RGB_SCALE 0x8573
+#define GL_ADD_SIGNED 0x8574
+#define GL_INTERPOLATE 0x8575
+#define GL_SUBTRACT 0x84E7
+#define GL_CONSTANT 0x8576
+#define GL_PRIMARY_COLOR 0x8577
+#define GL_PREVIOUS 0x8578
+#define GL_DOT3_RGB 0x86AE
+#define GL_DOT3_RGBA 0x86AF
+#endif
+
+#ifndef GL_VERSION_1_4
+#define GL_BLEND_DST_RGB 0x80C8
+#define GL_BLEND_SRC_RGB 0x80C9
+#define GL_BLEND_DST_ALPHA 0x80CA
+#define GL_BLEND_SRC_ALPHA 0x80CB
+#define GL_POINT_SIZE_MIN 0x8126
+#define GL_POINT_SIZE_MAX 0x8127
+#define GL_POINT_FADE_THRESHOLD_SIZE 0x8128
+#define GL_POINT_DISTANCE_ATTENUATION 0x8129
+#define GL_GENERATE_MIPMAP 0x8191
+#define GL_GENERATE_MIPMAP_HINT 0x8192
+#define GL_DEPTH_COMPONENT16 0x81A5
+#define GL_DEPTH_COMPONENT24 0x81A6
+#define GL_DEPTH_COMPONENT32 0x81A7
+#define GL_MIRRORED_REPEAT 0x8370
+#define GL_FOG_COORDINATE_SOURCE 0x8450
+#define GL_FOG_COORDINATE 0x8451
+#define GL_FRAGMENT_DEPTH 0x8452
+#define GL_CURRENT_FOG_COORDINATE 0x8453
+#define GL_FOG_COORDINATE_ARRAY_TYPE 0x8454
+#define GL_FOG_COORDINATE_ARRAY_STRIDE 0x8455
+#define GL_FOG_COORDINATE_ARRAY_POINTER 0x8456
+#define GL_FOG_COORDINATE_ARRAY 0x8457
+#define GL_COLOR_SUM 0x8458
+#define GL_CURRENT_SECONDARY_COLOR 0x8459
+#define GL_SECONDARY_COLOR_ARRAY_SIZE 0x845A
+#define GL_SECONDARY_COLOR_ARRAY_TYPE 0x845B
+#define GL_SECONDARY_COLOR_ARRAY_STRIDE 0x845C
+#define GL_SECONDARY_COLOR_ARRAY_POINTER 0x845D
+#define GL_SECONDARY_COLOR_ARRAY 0x845E
+#define GL_MAX_TEXTURE_LOD_BIAS 0x84FD
+#define GL_TEXTURE_FILTER_CONTROL 0x8500
+#define GL_TEXTURE_LOD_BIAS 0x8501
+#define GL_INCR_WRAP 0x8507
+#define GL_DECR_WRAP 0x8508
+#define GL_TEXTURE_DEPTH_SIZE 0x884A
+#define GL_DEPTH_TEXTURE_MODE 0x884B
+#define GL_TEXTURE_COMPARE_MODE 0x884C
+#define GL_TEXTURE_COMPARE_FUNC 0x884D
+#define GL_COMPARE_R_TO_TEXTURE 0x884E
+#endif
+
+#ifndef GL_VERSION_1_5
+#define GL_BUFFER_SIZE 0x8764
+#define GL_BUFFER_USAGE 0x8765
+#define GL_QUERY_COUNTER_BITS 0x8864
+#define GL_CURRENT_QUERY 0x8865
+#define GL_QUERY_RESULT 0x8866
+#define GL_QUERY_RESULT_AVAILABLE 0x8867
+#define GL_ARRAY_BUFFER 0x8892
+#define GL_ELEMENT_ARRAY_BUFFER 0x8893
+#define GL_ARRAY_BUFFER_BINDING 0x8894
+#define GL_ELEMENT_ARRAY_BUFFER_BINDING 0x8895
+#define GL_VERTEX_ARRAY_BUFFER_BINDING 0x8896
+#define GL_NORMAL_ARRAY_BUFFER_BINDING 0x8897
+#define GL_COLOR_ARRAY_BUFFER_BINDING 0x8898
+#define GL_INDEX_ARRAY_BUFFER_BINDING 0x8899
+#define GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING 0x889A
+#define GL_EDGE_FLAG_ARRAY_BUFFER_BINDING 0x889B
+#define GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING 0x889C
+#define GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING 0x889D
+#define GL_WEIGHT_ARRAY_BUFFER_BINDING 0x889E
+#define GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING 0x889F
+#define GL_READ_ONLY 0x88B8
+#define GL_WRITE_ONLY 0x88B9
+#define GL_READ_WRITE 0x88BA
+#define GL_BUFFER_ACCESS 0x88BB
+#define GL_BUFFER_MAPPED 0x88BC
+#define GL_BUFFER_MAP_POINTER 0x88BD
+#define GL_STREAM_DRAW 0x88E0
+#define GL_STREAM_READ 0x88E1
+#define GL_STREAM_COPY 0x88E2
+#define GL_STATIC_DRAW 0x88E4
+#define GL_STATIC_READ 0x88E5
+#define GL_STATIC_COPY 0x88E6
+#define GL_DYNAMIC_DRAW 0x88E8
+#define GL_DYNAMIC_READ 0x88E9
+#define GL_DYNAMIC_COPY 0x88EA
+#define GL_SAMPLES_PASSED 0x8914
+#define GL_FOG_COORD_SRC GL_FOG_COORDINATE_SOURCE
+#define GL_FOG_COORD GL_FOG_COORDINATE
+#define GL_CURRENT_FOG_COORD GL_CURRENT_FOG_COORDINATE
+#define GL_FOG_COORD_ARRAY_TYPE GL_FOG_COORDINATE_ARRAY_TYPE
+#define GL_FOG_COORD_ARRAY_STRIDE GL_FOG_COORDINATE_ARRAY_STRIDE
+#define GL_FOG_COORD_ARRAY_POINTER GL_FOG_COORDINATE_ARRAY_POINTER
+#define GL_FOG_COORD_ARRAY GL_FOG_COORDINATE_ARRAY
+#define GL_FOG_COORD_ARRAY_BUFFER_BINDING GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING
+#define GL_SRC0_RGB GL_SOURCE0_RGB
+#define GL_SRC1_RGB GL_SOURCE1_RGB
+#define GL_SRC2_RGB GL_SOURCE2_RGB
+#define GL_SRC0_ALPHA GL_SOURCE0_ALPHA
+#define GL_SRC1_ALPHA GL_SOURCE1_ALPHA
+#define GL_SRC2_ALPHA GL_SOURCE2_ALPHA
+#endif
+
+#ifndef GL_VERSION_2_0
+#define GL_BLEND_EQUATION_RGB GL_BLEND_EQUATION
+#define GL_VERTEX_ATTRIB_ARRAY_ENABLED 0x8622
+#define GL_VERTEX_ATTRIB_ARRAY_SIZE 0x8623
+#define GL_VERTEX_ATTRIB_ARRAY_STRIDE 0x8624
+#define GL_VERTEX_ATTRIB_ARRAY_TYPE 0x8625
+#define GL_CURRENT_VERTEX_ATTRIB 0x8626
+#define GL_VERTEX_PROGRAM_POINT_SIZE 0x8642
+#define GL_VERTEX_PROGRAM_TWO_SIDE 0x8643
+#define GL_VERTEX_ATTRIB_ARRAY_POINTER 0x8645
+#define GL_STENCIL_BACK_FUNC 0x8800
+#define GL_STENCIL_BACK_FAIL 0x8801
+#define GL_STENCIL_BACK_PASS_DEPTH_FAIL 0x8802
+#define GL_STENCIL_BACK_PASS_DEPTH_PASS 0x8803
+#define GL_MAX_DRAW_BUFFERS 0x8824
+#define GL_DRAW_BUFFER0 0x8825
+#define GL_DRAW_BUFFER1 0x8826
+#define GL_DRAW_BUFFER2 0x8827
+#define GL_DRAW_BUFFER3 0x8828
+#define GL_DRAW_BUFFER4 0x8829
+#define GL_DRAW_BUFFER5 0x882A
+#define GL_DRAW_BUFFER6 0x882B
+#define GL_DRAW_BUFFER7 0x882C
+#define GL_DRAW_BUFFER8 0x882D
+#define GL_DRAW_BUFFER9 0x882E
+#define GL_DRAW_BUFFER10 0x882F
+#define GL_DRAW_BUFFER11 0x8830
+#define GL_DRAW_BUFFER12 0x8831
+#define GL_DRAW_BUFFER13 0x8832
+#define GL_DRAW_BUFFER14 0x8833
+#define GL_DRAW_BUFFER15 0x8834
+#define GL_BLEND_EQUATION_ALPHA 0x883D
+#define GL_POINT_SPRITE 0x8861
+#define GL_COORD_REPLACE 0x8862
+#define GL_MAX_VERTEX_ATTRIBS 0x8869
+#define GL_VERTEX_ATTRIB_ARRAY_NORMALIZED 0x886A
+#define GL_MAX_TEXTURE_COORDS 0x8871
+#define GL_MAX_TEXTURE_IMAGE_UNITS 0x8872
+#define GL_FRAGMENT_SHADER 0x8B30
+#define GL_VERTEX_SHADER 0x8B31
+#define GL_MAX_FRAGMENT_UNIFORM_COMPONENTS 0x8B49
+#define GL_MAX_VERTEX_UNIFORM_COMPONENTS 0x8B4A
+#define GL_MAX_VARYING_FLOATS 0x8B4B
+#define GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS 0x8B4C
+#define GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS 0x8B4D
+#define GL_SHADER_TYPE 0x8B4F
+#define GL_FLOAT_VEC2 0x8B50
+#define GL_FLOAT_VEC3 0x8B51
+#define GL_FLOAT_VEC4 0x8B52
+#define GL_INT_VEC2 0x8B53
+#define GL_INT_VEC3 0x8B54
+#define GL_INT_VEC4 0x8B55
+#define GL_BOOL 0x8B56
+#define GL_BOOL_VEC2 0x8B57
+#define GL_BOOL_VEC3 0x8B58
+#define GL_BOOL_VEC4 0x8B59
+#define GL_FLOAT_MAT2 0x8B5A
+#define GL_FLOAT_MAT3 0x8B5B
+#define GL_FLOAT_MAT4 0x8B5C
+#define GL_SAMPLER_1D 0x8B5D
+#define GL_SAMPLER_2D 0x8B5E
+#define GL_SAMPLER_3D 0x8B5F
+#define GL_SAMPLER_CUBE 0x8B60
+#define GL_SAMPLER_1D_SHADOW 0x8B61
+#define GL_SAMPLER_2D_SHADOW 0x8B62
+#define GL_DELETE_STATUS 0x8B80
+#define GL_COMPILE_STATUS 0x8B81
+#define GL_LINK_STATUS 0x8B82
+#define GL_VALIDATE_STATUS 0x8B83
+#define GL_INFO_LOG_LENGTH 0x8B84
+#define GL_ATTACHED_SHADERS 0x8B85
+#define GL_ACTIVE_UNIFORMS 0x8B86
+#define GL_ACTIVE_UNIFORM_MAX_LENGTH 0x8B87
+#define GL_SHADER_SOURCE_LENGTH 0x8B88
+#define GL_ACTIVE_ATTRIBUTES 0x8B89
+#define GL_ACTIVE_ATTRIBUTE_MAX_LENGTH 0x8B8A
+#define GL_FRAGMENT_SHADER_DERIVATIVE_HINT 0x8B8B
+#define GL_SHADING_LANGUAGE_VERSION 0x8B8C
+#define GL_CURRENT_PROGRAM 0x8B8D
+#define GL_POINT_SPRITE_COORD_ORIGIN 0x8CA0
+#define GL_LOWER_LEFT 0x8CA1
+#define GL_UPPER_LEFT 0x8CA2
+#define GL_STENCIL_BACK_REF 0x8CA3
+#define GL_STENCIL_BACK_VALUE_MASK 0x8CA4
+#define GL_STENCIL_BACK_WRITEMASK 0x8CA5
+#endif
+
+#ifndef GL_VERSION_2_1
+#define GL_CURRENT_RASTER_SECONDARY_COLOR 0x845F
+#define GL_PIXEL_PACK_BUFFER 0x88EB
+#define GL_PIXEL_UNPACK_BUFFER 0x88EC
+#define GL_PIXEL_PACK_BUFFER_BINDING 0x88ED
+#define GL_PIXEL_UNPACK_BUFFER_BINDING 0x88EF
+#define GL_FLOAT_MAT2x3 0x8B65
+#define GL_FLOAT_MAT2x4 0x8B66
+#define GL_FLOAT_MAT3x2 0x8B67
+#define GL_FLOAT_MAT3x4 0x8B68
+#define GL_FLOAT_MAT4x2 0x8B69
+#define GL_FLOAT_MAT4x3 0x8B6A
+#define GL_SRGB 0x8C40
+#define GL_SRGB8 0x8C41
+#define GL_SRGB_ALPHA 0x8C42
+#define GL_SRGB8_ALPHA8 0x8C43
+#define GL_SLUMINANCE_ALPHA 0x8C44
+#define GL_SLUMINANCE8_ALPHA8 0x8C45
+#define GL_SLUMINANCE 0x8C46
+#define GL_SLUMINANCE8 0x8C47
+#define GL_COMPRESSED_SRGB 0x8C48
+#define GL_COMPRESSED_SRGB_ALPHA 0x8C49
+#define GL_COMPRESSED_SLUMINANCE 0x8C4A
+#define GL_COMPRESSED_SLUMINANCE_ALPHA 0x8C4B
+#endif
+
+#ifndef GL_ARB_multitexture
+#define GL_TEXTURE0_ARB 0x84C0
+#define GL_TEXTURE1_ARB 0x84C1
+#define GL_TEXTURE2_ARB 0x84C2
+#define GL_TEXTURE3_ARB 0x84C3
+#define GL_TEXTURE4_ARB 0x84C4
+#define GL_TEXTURE5_ARB 0x84C5
+#define GL_TEXTURE6_ARB 0x84C6
+#define GL_TEXTURE7_ARB 0x84C7
+#define GL_TEXTURE8_ARB 0x84C8
+#define GL_TEXTURE9_ARB 0x84C9
+#define GL_TEXTURE10_ARB 0x84CA
+#define GL_TEXTURE11_ARB 0x84CB
+#define GL_TEXTURE12_ARB 0x84CC
+#define GL_TEXTURE13_ARB 0x84CD
+#define GL_TEXTURE14_ARB 0x84CE
+#define GL_TEXTURE15_ARB 0x84CF
+#define GL_TEXTURE16_ARB 0x84D0
+#define GL_TEXTURE17_ARB 0x84D1
+#define GL_TEXTURE18_ARB 0x84D2
+#define GL_TEXTURE19_ARB 0x84D3
+#define GL_TEXTURE20_ARB 0x84D4
+#define GL_TEXTURE21_ARB 0x84D5
+#define GL_TEXTURE22_ARB 0x84D6
+#define GL_TEXTURE23_ARB 0x84D7
+#define GL_TEXTURE24_ARB 0x84D8
+#define GL_TEXTURE25_ARB 0x84D9
+#define GL_TEXTURE26_ARB 0x84DA
+#define GL_TEXTURE27_ARB 0x84DB
+#define GL_TEXTURE28_ARB 0x84DC
+#define GL_TEXTURE29_ARB 0x84DD
+#define GL_TEXTURE30_ARB 0x84DE
+#define GL_TEXTURE31_ARB 0x84DF
+#define GL_ACTIVE_TEXTURE_ARB 0x84E0
+#define GL_CLIENT_ACTIVE_TEXTURE_ARB 0x84E1
+#define GL_MAX_TEXTURE_UNITS_ARB 0x84E2
+#endif
+
+#ifndef GL_ARB_transpose_matrix
+#define GL_TRANSPOSE_MODELVIEW_MATRIX_ARB 0x84E3
+#define GL_TRANSPOSE_PROJECTION_MATRIX_ARB 0x84E4
+#define GL_TRANSPOSE_TEXTURE_MATRIX_ARB 0x84E5
+#define GL_TRANSPOSE_COLOR_MATRIX_ARB 0x84E6
+#endif
+
+#ifndef GL_ARB_multisample
+#define GL_MULTISAMPLE_ARB 0x809D
+#define GL_SAMPLE_ALPHA_TO_COVERAGE_ARB 0x809E
+#define GL_SAMPLE_ALPHA_TO_ONE_ARB 0x809F
+#define GL_SAMPLE_COVERAGE_ARB 0x80A0
+#define GL_SAMPLE_BUFFERS_ARB 0x80A8
+#define GL_SAMPLES_ARB 0x80A9
+#define GL_SAMPLE_COVERAGE_VALUE_ARB 0x80AA
+#define GL_SAMPLE_COVERAGE_INVERT_ARB 0x80AB
+#define GL_MULTISAMPLE_BIT_ARB 0x20000000
+#endif
+
+#ifndef GL_ARB_texture_env_add
+#endif
+
+#ifndef GL_ARB_texture_cube_map
+#define GL_NORMAL_MAP_ARB 0x8511
+#define GL_REFLECTION_MAP_ARB 0x8512
+#define GL_TEXTURE_CUBE_MAP_ARB 0x8513
+#define GL_TEXTURE_BINDING_CUBE_MAP_ARB 0x8514
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB 0x8515
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB 0x8516
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB 0x8517
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB 0x8518
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB 0x8519
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB 0x851A
+#define GL_PROXY_TEXTURE_CUBE_MAP_ARB 0x851B
+#define GL_MAX_CUBE_MAP_TEXTURE_SIZE_ARB 0x851C
+#endif
+
+#ifndef GL_ARB_texture_compression
+#define GL_COMPRESSED_ALPHA_ARB 0x84E9
+#define GL_COMPRESSED_LUMINANCE_ARB 0x84EA
+#define GL_COMPRESSED_LUMINANCE_ALPHA_ARB 0x84EB
+#define GL_COMPRESSED_INTENSITY_ARB 0x84EC
+#define GL_COMPRESSED_RGB_ARB 0x84ED
+#define GL_COMPRESSED_RGBA_ARB 0x84EE
+#define GL_TEXTURE_COMPRESSION_HINT_ARB 0x84EF
+#define GL_TEXTURE_COMPRESSED_IMAGE_SIZE_ARB 0x86A0
+#define GL_TEXTURE_COMPRESSED_ARB 0x86A1
+#define GL_NUM_COMPRESSED_TEXTURE_FORMATS_ARB 0x86A2
+#define GL_COMPRESSED_TEXTURE_FORMATS_ARB 0x86A3
+#endif
+
+#ifndef GL_ARB_texture_border_clamp
+#define GL_CLAMP_TO_BORDER_ARB 0x812D
+#endif
+
+#ifndef GL_ARB_point_parameters
+#define GL_POINT_SIZE_MIN_ARB 0x8126
+#define GL_POINT_SIZE_MAX_ARB 0x8127
+#define GL_POINT_FADE_THRESHOLD_SIZE_ARB 0x8128
+#define GL_POINT_DISTANCE_ATTENUATION_ARB 0x8129
+#endif
+
+#ifndef GL_ARB_vertex_blend
+#define GL_MAX_VERTEX_UNITS_ARB 0x86A4
+#define GL_ACTIVE_VERTEX_UNITS_ARB 0x86A5
+#define GL_WEIGHT_SUM_UNITY_ARB 0x86A6
+#define GL_VERTEX_BLEND_ARB 0x86A7
+#define GL_CURRENT_WEIGHT_ARB 0x86A8
+#define GL_WEIGHT_ARRAY_TYPE_ARB 0x86A9
+#define GL_WEIGHT_ARRAY_STRIDE_ARB 0x86AA
+#define GL_WEIGHT_ARRAY_SIZE_ARB 0x86AB
+#define GL_WEIGHT_ARRAY_POINTER_ARB 0x86AC
+#define GL_WEIGHT_ARRAY_ARB 0x86AD
+#define GL_MODELVIEW0_ARB 0x1700
+#define GL_MODELVIEW1_ARB 0x850A
+#define GL_MODELVIEW2_ARB 0x8722
+#define GL_MODELVIEW3_ARB 0x8723
+#define GL_MODELVIEW4_ARB 0x8724
+#define GL_MODELVIEW5_ARB 0x8725
+#define GL_MODELVIEW6_ARB 0x8726
+#define GL_MODELVIEW7_ARB 0x8727
+#define GL_MODELVIEW8_ARB 0x8728
+#define GL_MODELVIEW9_ARB 0x8729
+#define GL_MODELVIEW10_ARB 0x872A
+#define GL_MODELVIEW11_ARB 0x872B
+#define GL_MODELVIEW12_ARB 0x872C
+#define GL_MODELVIEW13_ARB 0x872D
+#define GL_MODELVIEW14_ARB 0x872E
+#define GL_MODELVIEW15_ARB 0x872F
+#define GL_MODELVIEW16_ARB 0x8730
+#define GL_MODELVIEW17_ARB 0x8731
+#define GL_MODELVIEW18_ARB 0x8732
+#define GL_MODELVIEW19_ARB 0x8733
+#define GL_MODELVIEW20_ARB 0x8734
+#define GL_MODELVIEW21_ARB 0x8735
+#define GL_MODELVIEW22_ARB 0x8736
+#define GL_MODELVIEW23_ARB 0x8737
+#define GL_MODELVIEW24_ARB 0x8738
+#define GL_MODELVIEW25_ARB 0x8739
+#define GL_MODELVIEW26_ARB 0x873A
+#define GL_MODELVIEW27_ARB 0x873B
+#define GL_MODELVIEW28_ARB 0x873C
+#define GL_MODELVIEW29_ARB 0x873D
+#define GL_MODELVIEW30_ARB 0x873E
+#define GL_MODELVIEW31_ARB 0x873F
+#endif
+
+#ifndef GL_ARB_matrix_palette
+#define GL_MATRIX_PALETTE_ARB 0x8840
+#define GL_MAX_MATRIX_PALETTE_STACK_DEPTH_ARB 0x8841
+#define GL_MAX_PALETTE_MATRICES_ARB 0x8842
+#define GL_CURRENT_PALETTE_MATRIX_ARB 0x8843
+#define GL_MATRIX_INDEX_ARRAY_ARB 0x8844
+#define GL_CURRENT_MATRIX_INDEX_ARB 0x8845
+#define GL_MATRIX_INDEX_ARRAY_SIZE_ARB 0x8846
+#define GL_MATRIX_INDEX_ARRAY_TYPE_ARB 0x8847
+#define GL_MATRIX_INDEX_ARRAY_STRIDE_ARB 0x8848
+#define GL_MATRIX_INDEX_ARRAY_POINTER_ARB 0x8849
+#endif
+
+#ifndef GL_ARB_texture_env_combine
+#define GL_COMBINE_ARB 0x8570
+#define GL_COMBINE_RGB_ARB 0x8571
+#define GL_COMBINE_ALPHA_ARB 0x8572
+#define GL_SOURCE0_RGB_ARB 0x8580
+#define GL_SOURCE1_RGB_ARB 0x8581
+#define GL_SOURCE2_RGB_ARB 0x8582
+#define GL_SOURCE0_ALPHA_ARB 0x8588
+#define GL_SOURCE1_ALPHA_ARB 0x8589
+#define GL_SOURCE2_ALPHA_ARB 0x858A
+#define GL_OPERAND0_RGB_ARB 0x8590
+#define GL_OPERAND1_RGB_ARB 0x8591
+#define GL_OPERAND2_RGB_ARB 0x8592
+#define GL_OPERAND0_ALPHA_ARB 0x8598
+#define GL_OPERAND1_ALPHA_ARB 0x8599
+#define GL_OPERAND2_ALPHA_ARB 0x859A
+#define GL_RGB_SCALE_ARB 0x8573
+#define GL_ADD_SIGNED_ARB 0x8574
+#define GL_INTERPOLATE_ARB 0x8575
+#define GL_SUBTRACT_ARB 0x84E7
+#define GL_CONSTANT_ARB 0x8576
+#define GL_PRIMARY_COLOR_ARB 0x8577
+#define GL_PREVIOUS_ARB 0x8578
+#endif
+
+#ifndef GL_ARB_texture_env_crossbar
+#endif
+
+#ifndef GL_ARB_texture_env_dot3
+#define GL_DOT3_RGB_ARB 0x86AE
+#define GL_DOT3_RGBA_ARB 0x86AF
+#endif
+
+#ifndef GL_ARB_texture_mirrored_repeat
+#define GL_MIRRORED_REPEAT_ARB 0x8370
+#endif
+
+#ifndef GL_ARB_depth_texture
+#define GL_DEPTH_COMPONENT16_ARB 0x81A5
+#define GL_DEPTH_COMPONENT24_ARB 0x81A6
+#define GL_DEPTH_COMPONENT32_ARB 0x81A7
+#define GL_TEXTURE_DEPTH_SIZE_ARB 0x884A
+#define GL_DEPTH_TEXTURE_MODE_ARB 0x884B
+#endif
+
+#ifndef GL_ARB_shadow
+#define GL_TEXTURE_COMPARE_MODE_ARB 0x884C
+#define GL_TEXTURE_COMPARE_FUNC_ARB 0x884D
+#define GL_COMPARE_R_TO_TEXTURE_ARB 0x884E
+#endif
+
+#ifndef GL_ARB_shadow_ambient
+#define GL_TEXTURE_COMPARE_FAIL_VALUE_ARB 0x80BF
+#endif
+
+#ifndef GL_ARB_window_pos
+#endif
+
+#ifndef GL_ARB_vertex_program
+#define GL_COLOR_SUM_ARB 0x8458
+#define GL_VERTEX_PROGRAM_ARB 0x8620
+#define GL_VERTEX_ATTRIB_ARRAY_ENABLED_ARB 0x8622
+#define GL_VERTEX_ATTRIB_ARRAY_SIZE_ARB 0x8623
+#define GL_VERTEX_ATTRIB_ARRAY_STRIDE_ARB 0x8624
+#define GL_VERTEX_ATTRIB_ARRAY_TYPE_ARB 0x8625
+#define GL_CURRENT_VERTEX_ATTRIB_ARB 0x8626
+#define GL_PROGRAM_LENGTH_ARB 0x8627
+#define GL_PROGRAM_STRING_ARB 0x8628
+#define GL_MAX_PROGRAM_MATRIX_STACK_DEPTH_ARB 0x862E
+#define GL_MAX_PROGRAM_MATRICES_ARB 0x862F
+#define GL_CURRENT_MATRIX_STACK_DEPTH_ARB 0x8640
+#define GL_CURRENT_MATRIX_ARB 0x8641
+#define GL_VERTEX_PROGRAM_POINT_SIZE_ARB 0x8642
+#define GL_VERTEX_PROGRAM_TWO_SIDE_ARB 0x8643
+#define GL_VERTEX_ATTRIB_ARRAY_POINTER_ARB 0x8645
+#define GL_PROGRAM_ERROR_POSITION_ARB 0x864B
+#define GL_PROGRAM_BINDING_ARB 0x8677
+#define GL_MAX_VERTEX_ATTRIBS_ARB 0x8869
+#define GL_VERTEX_ATTRIB_ARRAY_NORMALIZED_ARB 0x886A
+#define GL_PROGRAM_ERROR_STRING_ARB 0x8874
+#define GL_PROGRAM_FORMAT_ASCII_ARB 0x8875
+#define GL_PROGRAM_FORMAT_ARB 0x8876
+#define GL_PROGRAM_INSTRUCTIONS_ARB 0x88A0
+#define GL_MAX_PROGRAM_INSTRUCTIONS_ARB 0x88A1
+#define GL_PROGRAM_NATIVE_INSTRUCTIONS_ARB 0x88A2
+#define GL_MAX_PROGRAM_NATIVE_INSTRUCTIONS_ARB 0x88A3
+#define GL_PROGRAM_TEMPORARIES_ARB 0x88A4
+#define GL_MAX_PROGRAM_TEMPORARIES_ARB 0x88A5
+#define GL_PROGRAM_NATIVE_TEMPORARIES_ARB 0x88A6
+#define GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB 0x88A7
+#define GL_PROGRAM_PARAMETERS_ARB 0x88A8
+#define GL_MAX_PROGRAM_PARAMETERS_ARB 0x88A9
+#define GL_PROGRAM_NATIVE_PARAMETERS_ARB 0x88AA
+#define GL_MAX_PROGRAM_NATIVE_PARAMETERS_ARB 0x88AB
+#define GL_PROGRAM_ATTRIBS_ARB 0x88AC
+#define GL_MAX_PROGRAM_ATTRIBS_ARB 0x88AD
+#define GL_PROGRAM_NATIVE_ATTRIBS_ARB 0x88AE
+#define GL_MAX_PROGRAM_NATIVE_ATTRIBS_ARB 0x88AF
+#define GL_PROGRAM_ADDRESS_REGISTERS_ARB 0x88B0
+#define GL_MAX_PROGRAM_ADDRESS_REGISTERS_ARB 0x88B1
+#define GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB 0x88B2
+#define GL_MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB 0x88B3
+#define GL_MAX_PROGRAM_LOCAL_PARAMETERS_ARB 0x88B4
+#define GL_MAX_PROGRAM_ENV_PARAMETERS_ARB 0x88B5
+#define GL_PROGRAM_UNDER_NATIVE_LIMITS_ARB 0x88B6
+#define GL_TRANSPOSE_CURRENT_MATRIX_ARB 0x88B7
+#define GL_MATRIX0_ARB 0x88C0
+#define GL_MATRIX1_ARB 0x88C1
+#define GL_MATRIX2_ARB 0x88C2
+#define GL_MATRIX3_ARB 0x88C3
+#define GL_MATRIX4_ARB 0x88C4
+#define GL_MATRIX5_ARB 0x88C5
+#define GL_MATRIX6_ARB 0x88C6
+#define GL_MATRIX7_ARB 0x88C7
+#define GL_MATRIX8_ARB 0x88C8
+#define GL_MATRIX9_ARB 0x88C9
+#define GL_MATRIX10_ARB 0x88CA
+#define GL_MATRIX11_ARB 0x88CB
+#define GL_MATRIX12_ARB 0x88CC
+#define GL_MATRIX13_ARB 0x88CD
+#define GL_MATRIX14_ARB 0x88CE
+#define GL_MATRIX15_ARB 0x88CF
+#define GL_MATRIX16_ARB 0x88D0
+#define GL_MATRIX17_ARB 0x88D1
+#define GL_MATRIX18_ARB 0x88D2
+#define GL_MATRIX19_ARB 0x88D3
+#define GL_MATRIX20_ARB 0x88D4
+#define GL_MATRIX21_ARB 0x88D5
+#define GL_MATRIX22_ARB 0x88D6
+#define GL_MATRIX23_ARB 0x88D7
+#define GL_MATRIX24_ARB 0x88D8
+#define GL_MATRIX25_ARB 0x88D9
+#define GL_MATRIX26_ARB 0x88DA
+#define GL_MATRIX27_ARB 0x88DB
+#define GL_MATRIX28_ARB 0x88DC
+#define GL_MATRIX29_ARB 0x88DD
+#define GL_MATRIX30_ARB 0x88DE
+#define GL_MATRIX31_ARB 0x88DF
+#endif
+
+#ifndef GL_ARB_fragment_program
+#define GL_FRAGMENT_PROGRAM_ARB 0x8804
+#define GL_PROGRAM_ALU_INSTRUCTIONS_ARB 0x8805
+#define GL_PROGRAM_TEX_INSTRUCTIONS_ARB 0x8806
+#define GL_PROGRAM_TEX_INDIRECTIONS_ARB 0x8807
+#define GL_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB 0x8808
+#define GL_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB 0x8809
+#define GL_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB 0x880A
+#define GL_MAX_PROGRAM_ALU_INSTRUCTIONS_ARB 0x880B
+#define GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB 0x880C
+#define GL_MAX_PROGRAM_TEX_INDIRECTIONS_ARB 0x880D
+#define GL_MAX_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB 0x880E
+#define GL_MAX_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB 0x880F
+#define GL_MAX_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB 0x8810
+#define GL_MAX_TEXTURE_COORDS_ARB 0x8871
+#define GL_MAX_TEXTURE_IMAGE_UNITS_ARB 0x8872
+#endif
+
+#ifndef GL_ARB_vertex_buffer_object
+#define GL_BUFFER_SIZE_ARB 0x8764
+#define GL_BUFFER_USAGE_ARB 0x8765
+#define GL_ARRAY_BUFFER_ARB 0x8892
+#define GL_ELEMENT_ARRAY_BUFFER_ARB 0x8893
+#define GL_ARRAY_BUFFER_BINDING_ARB 0x8894
+#define GL_ELEMENT_ARRAY_BUFFER_BINDING_ARB 0x8895
+#define GL_VERTEX_ARRAY_BUFFER_BINDING_ARB 0x8896
+#define GL_NORMAL_ARRAY_BUFFER_BINDING_ARB 0x8897
+#define GL_COLOR_ARRAY_BUFFER_BINDING_ARB 0x8898
+#define GL_INDEX_ARRAY_BUFFER_BINDING_ARB 0x8899
+#define GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING_ARB 0x889A
+#define GL_EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB 0x889B
+#define GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB 0x889C
+#define GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB 0x889D
+#define GL_WEIGHT_ARRAY_BUFFER_BINDING_ARB 0x889E
+#define GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING_ARB 0x889F
+#define GL_READ_ONLY_ARB 0x88B8
+#define GL_WRITE_ONLY_ARB 0x88B9
+#define GL_READ_WRITE_ARB 0x88BA
+#define GL_BUFFER_ACCESS_ARB 0x88BB
+#define GL_BUFFER_MAPPED_ARB 0x88BC
+#define GL_BUFFER_MAP_POINTER_ARB 0x88BD
+#define GL_STREAM_DRAW_ARB 0x88E0
+#define GL_STREAM_READ_ARB 0x88E1
+#define GL_STREAM_COPY_ARB 0x88E2
+#define GL_STATIC_DRAW_ARB 0x88E4
+#define GL_STATIC_READ_ARB 0x88E5
+#define GL_STATIC_COPY_ARB 0x88E6
+#define GL_DYNAMIC_DRAW_ARB 0x88E8
+#define GL_DYNAMIC_READ_ARB 0x88E9
+#define GL_DYNAMIC_COPY_ARB 0x88EA
+#endif
+
+#ifndef GL_ARB_occlusion_query
+#define GL_QUERY_COUNTER_BITS_ARB 0x8864
+#define GL_CURRENT_QUERY_ARB 0x8865
+#define GL_QUERY_RESULT_ARB 0x8866
+#define GL_QUERY_RESULT_AVAILABLE_ARB 0x8867
+#define GL_SAMPLES_PASSED_ARB 0x8914
+#endif
+
+#ifndef GL_ARB_shader_objects
+#define GL_PROGRAM_OBJECT_ARB 0x8B40
+#define GL_SHADER_OBJECT_ARB 0x8B48
+#define GL_OBJECT_TYPE_ARB 0x8B4E
+#define GL_OBJECT_SUBTYPE_ARB 0x8B4F
+#define GL_FLOAT_VEC2_ARB 0x8B50
+#define GL_FLOAT_VEC3_ARB 0x8B51
+#define GL_FLOAT_VEC4_ARB 0x8B52
+#define GL_INT_VEC2_ARB 0x8B53
+#define GL_INT_VEC3_ARB 0x8B54
+#define GL_INT_VEC4_ARB 0x8B55
+#define GL_BOOL_ARB 0x8B56
+#define GL_BOOL_VEC2_ARB 0x8B57
+#define GL_BOOL_VEC3_ARB 0x8B58
+#define GL_BOOL_VEC4_ARB 0x8B59
+#define GL_FLOAT_MAT2_ARB 0x8B5A
+#define GL_FLOAT_MAT3_ARB 0x8B5B
+#define GL_FLOAT_MAT4_ARB 0x8B5C
+#define GL_SAMPLER_1D_ARB 0x8B5D
+#define GL_SAMPLER_2D_ARB 0x8B5E
+#define GL_SAMPLER_3D_ARB 0x8B5F
+#define GL_SAMPLER_CUBE_ARB 0x8B60
+#define GL_SAMPLER_1D_SHADOW_ARB 0x8B61
+#define GL_SAMPLER_2D_SHADOW_ARB 0x8B62
+#define GL_SAMPLER_2D_RECT_ARB 0x8B63
+#define GL_SAMPLER_2D_RECT_SHADOW_ARB 0x8B64
+#define GL_OBJECT_DELETE_STATUS_ARB 0x8B80
+#define GL_OBJECT_COMPILE_STATUS_ARB 0x8B81
+#define GL_OBJECT_LINK_STATUS_ARB 0x8B82
+#define GL_OBJECT_VALIDATE_STATUS_ARB 0x8B83
+#define GL_OBJECT_INFO_LOG_LENGTH_ARB 0x8B84
+#define GL_OBJECT_ATTACHED_OBJECTS_ARB 0x8B85
+#define GL_OBJECT_ACTIVE_UNIFORMS_ARB 0x8B86
+#define GL_OBJECT_ACTIVE_UNIFORM_MAX_LENGTH_ARB 0x8B87
+#define GL_OBJECT_SHADER_SOURCE_LENGTH_ARB 0x8B88
+#endif
+
+#ifndef GL_ARB_vertex_shader
+#define GL_VERTEX_SHADER_ARB 0x8B31
+#define GL_MAX_VERTEX_UNIFORM_COMPONENTS_ARB 0x8B4A
+#define GL_MAX_VARYING_FLOATS_ARB 0x8B4B
+#define GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS_ARB 0x8B4C
+#define GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB 0x8B4D
+#define GL_OBJECT_ACTIVE_ATTRIBUTES_ARB 0x8B89
+#define GL_OBJECT_ACTIVE_ATTRIBUTE_MAX_LENGTH_ARB 0x8B8A
+#endif
+
+#ifndef GL_ARB_fragment_shader
+#define GL_FRAGMENT_SHADER_ARB 0x8B30
+#define GL_MAX_FRAGMENT_UNIFORM_COMPONENTS_ARB 0x8B49
+#define GL_FRAGMENT_SHADER_DERIVATIVE_HINT_ARB 0x8B8B
+#endif
+
+#ifndef GL_ARB_shading_language_100
+#define GL_SHADING_LANGUAGE_VERSION_ARB 0x8B8C
+#endif
+
+#ifndef GL_ARB_texture_non_power_of_two
+#endif
+
+#ifndef GL_ARB_point_sprite
+#define GL_POINT_SPRITE_ARB 0x8861
+#define GL_COORD_REPLACE_ARB 0x8862
+#endif
+
+#ifndef GL_ARB_fragment_program_shadow
+#endif
+
+#ifndef GL_ARB_draw_buffers
+#define GL_MAX_DRAW_BUFFERS_ARB 0x8824
+#define GL_DRAW_BUFFER0_ARB 0x8825
+#define GL_DRAW_BUFFER1_ARB 0x8826
+#define GL_DRAW_BUFFER2_ARB 0x8827
+#define GL_DRAW_BUFFER3_ARB 0x8828
+#define GL_DRAW_BUFFER4_ARB 0x8829
+#define GL_DRAW_BUFFER5_ARB 0x882A
+#define GL_DRAW_BUFFER6_ARB 0x882B
+#define GL_DRAW_BUFFER7_ARB 0x882C
+#define GL_DRAW_BUFFER8_ARB 0x882D
+#define GL_DRAW_BUFFER9_ARB 0x882E
+#define GL_DRAW_BUFFER10_ARB 0x882F
+#define GL_DRAW_BUFFER11_ARB 0x8830
+#define GL_DRAW_BUFFER12_ARB 0x8831
+#define GL_DRAW_BUFFER13_ARB 0x8832
+#define GL_DRAW_BUFFER14_ARB 0x8833
+#define GL_DRAW_BUFFER15_ARB 0x8834
+#endif
+
+#ifndef GL_ARB_texture_rectangle
+#define GL_TEXTURE_RECTANGLE_ARB 0x84F5
+#define GL_TEXTURE_BINDING_RECTANGLE_ARB 0x84F6
+#define GL_PROXY_TEXTURE_RECTANGLE_ARB 0x84F7
+#define GL_MAX_RECTANGLE_TEXTURE_SIZE_ARB 0x84F8
+#endif
+
+#ifndef GL_ARB_color_buffer_float
+#define GL_RGBA_FLOAT_MODE_ARB 0x8820
+#define GL_CLAMP_VERTEX_COLOR_ARB 0x891A
+#define GL_CLAMP_FRAGMENT_COLOR_ARB 0x891B
+#define GL_CLAMP_READ_COLOR_ARB 0x891C
+#define GL_FIXED_ONLY_ARB 0x891D
+#endif
+
+#ifndef GL_ARB_half_float_pixel
+#define GL_HALF_FLOAT_ARB 0x140B
+#endif
+
+#ifndef GL_ARB_texture_float
+#define GL_TEXTURE_RED_TYPE_ARB 0x8C10
+#define GL_TEXTURE_GREEN_TYPE_ARB 0x8C11
+#define GL_TEXTURE_BLUE_TYPE_ARB 0x8C12
+#define GL_TEXTURE_ALPHA_TYPE_ARB 0x8C13
+#define GL_TEXTURE_LUMINANCE_TYPE_ARB 0x8C14
+#define GL_TEXTURE_INTENSITY_TYPE_ARB 0x8C15
+#define GL_TEXTURE_DEPTH_TYPE_ARB 0x8C16
+#define GL_UNSIGNED_NORMALIZED_ARB 0x8C17
+#define GL_RGBA32F_ARB 0x8814
+#define GL_RGB32F_ARB 0x8815
+#define GL_ALPHA32F_ARB 0x8816
+#define GL_INTENSITY32F_ARB 0x8817
+#define GL_LUMINANCE32F_ARB 0x8818
+#define GL_LUMINANCE_ALPHA32F_ARB 0x8819
+#define GL_RGBA16F_ARB 0x881A
+#define GL_RGB16F_ARB 0x881B
+#define GL_ALPHA16F_ARB 0x881C
+#define GL_INTENSITY16F_ARB 0x881D
+#define GL_LUMINANCE16F_ARB 0x881E
+#define GL_LUMINANCE_ALPHA16F_ARB 0x881F
+#endif
+
+#ifndef GL_ARB_pixel_buffer_object
+#define GL_PIXEL_PACK_BUFFER_ARB 0x88EB
+#define GL_PIXEL_UNPACK_BUFFER_ARB 0x88EC
+#define GL_PIXEL_PACK_BUFFER_BINDING_ARB 0x88ED
+#define GL_PIXEL_UNPACK_BUFFER_BINDING_ARB 0x88EF
+#endif
+
+#ifndef GL_EXT_abgr
+#define GL_ABGR_EXT 0x8000
+#endif
+
+#ifndef GL_EXT_blend_color
+#define GL_CONSTANT_COLOR_EXT 0x8001
+#define GL_ONE_MINUS_CONSTANT_COLOR_EXT 0x8002
+#define GL_CONSTANT_ALPHA_EXT 0x8003
+#define GL_ONE_MINUS_CONSTANT_ALPHA_EXT 0x8004
+#define GL_BLEND_COLOR_EXT 0x8005
+#endif
+
+#ifndef GL_EXT_polygon_offset
+#define GL_POLYGON_OFFSET_EXT 0x8037
+#define GL_POLYGON_OFFSET_FACTOR_EXT 0x8038
+#define GL_POLYGON_OFFSET_BIAS_EXT 0x8039
+#endif
+
+#ifndef GL_EXT_texture
+#define GL_ALPHA4_EXT 0x803B
+#define GL_ALPHA8_EXT 0x803C
+#define GL_ALPHA12_EXT 0x803D
+#define GL_ALPHA16_EXT 0x803E
+#define GL_LUMINANCE4_EXT 0x803F
+#define GL_LUMINANCE8_EXT 0x8040
+#define GL_LUMINANCE12_EXT 0x8041
+#define GL_LUMINANCE16_EXT 0x8042
+#define GL_LUMINANCE4_ALPHA4_EXT 0x8043
+#define GL_LUMINANCE6_ALPHA2_EXT 0x8044
+#define GL_LUMINANCE8_ALPHA8_EXT 0x8045
+#define GL_LUMINANCE12_ALPHA4_EXT 0x8046
+#define GL_LUMINANCE12_ALPHA12_EXT 0x8047
+#define GL_LUMINANCE16_ALPHA16_EXT 0x8048
+#define GL_INTENSITY_EXT 0x8049
+#define GL_INTENSITY4_EXT 0x804A
+#define GL_INTENSITY8_EXT 0x804B
+#define GL_INTENSITY12_EXT 0x804C
+#define GL_INTENSITY16_EXT 0x804D
+#define GL_RGB2_EXT 0x804E
+#define GL_RGB4_EXT 0x804F
+#define GL_RGB5_EXT 0x8050
+#define GL_RGB8_EXT 0x8051
+#define GL_RGB10_EXT 0x8052
+#define GL_RGB12_EXT 0x8053
+#define GL_RGB16_EXT 0x8054
+#define GL_RGBA2_EXT 0x8055
+#define GL_RGBA4_EXT 0x8056
+#define GL_RGB5_A1_EXT 0x8057
+#define GL_RGBA8_EXT 0x8058
+#define GL_RGB10_A2_EXT 0x8059
+#define GL_RGBA12_EXT 0x805A
+#define GL_RGBA16_EXT 0x805B
+#define GL_TEXTURE_RED_SIZE_EXT 0x805C
+#define GL_TEXTURE_GREEN_SIZE_EXT 0x805D
+#define GL_TEXTURE_BLUE_SIZE_EXT 0x805E
+#define GL_TEXTURE_ALPHA_SIZE_EXT 0x805F
+#define GL_TEXTURE_LUMINANCE_SIZE_EXT 0x8060
+#define GL_TEXTURE_INTENSITY_SIZE_EXT 0x8061
+#define GL_REPLACE_EXT 0x8062
+#define GL_PROXY_TEXTURE_1D_EXT 0x8063
+#define GL_PROXY_TEXTURE_2D_EXT 0x8064
+#define GL_TEXTURE_TOO_LARGE_EXT 0x8065
+#endif
+
+#ifndef GL_EXT_texture3D
+#define GL_PACK_SKIP_IMAGES_EXT 0x806B
+#define GL_PACK_IMAGE_HEIGHT_EXT 0x806C
+#define GL_UNPACK_SKIP_IMAGES_EXT 0x806D
+#define GL_UNPACK_IMAGE_HEIGHT_EXT 0x806E
+#define GL_TEXTURE_3D_EXT 0x806F
+#define GL_PROXY_TEXTURE_3D_EXT 0x8070
+#define GL_TEXTURE_DEPTH_EXT 0x8071
+#define GL_TEXTURE_WRAP_R_EXT 0x8072
+#define GL_MAX_3D_TEXTURE_SIZE_EXT 0x8073
+#endif
+
+#ifndef GL_SGIS_texture_filter4
+#define GL_FILTER4_SGIS 0x8146
+#define GL_TEXTURE_FILTER4_SIZE_SGIS 0x8147
+#endif
+
+#ifndef GL_EXT_subtexture
+#endif
+
+#ifndef GL_EXT_copy_texture
+#endif
+
+#ifndef GL_EXT_histogram
+#define GL_HISTOGRAM_EXT 0x8024
+#define GL_PROXY_HISTOGRAM_EXT 0x8025
+#define GL_HISTOGRAM_WIDTH_EXT 0x8026
+#define GL_HISTOGRAM_FORMAT_EXT 0x8027
+#define GL_HISTOGRAM_RED_SIZE_EXT 0x8028
+#define GL_HISTOGRAM_GREEN_SIZE_EXT 0x8029
+#define GL_HISTOGRAM_BLUE_SIZE_EXT 0x802A
+#define GL_HISTOGRAM_ALPHA_SIZE_EXT 0x802B
+#define GL_HISTOGRAM_LUMINANCE_SIZE_EXT 0x802C
+#define GL_HISTOGRAM_SINK_EXT 0x802D
+#define GL_MINMAX_EXT 0x802E
+#define GL_MINMAX_FORMAT_EXT 0x802F
+#define GL_MINMAX_SINK_EXT 0x8030
+#define GL_TABLE_TOO_LARGE_EXT 0x8031
+#endif
+
+#ifndef GL_EXT_convolution
+#define GL_CONVOLUTION_1D_EXT 0x8010
+#define GL_CONVOLUTION_2D_EXT 0x8011
+#define GL_SEPARABLE_2D_EXT 0x8012
+#define GL_CONVOLUTION_BORDER_MODE_EXT 0x8013
+#define GL_CONVOLUTION_FILTER_SCALE_EXT 0x8014
+#define GL_CONVOLUTION_FILTER_BIAS_EXT 0x8015
+#define GL_REDUCE_EXT 0x8016
+#define GL_CONVOLUTION_FORMAT_EXT 0x8017
+#define GL_CONVOLUTION_WIDTH_EXT 0x8018
+#define GL_CONVOLUTION_HEIGHT_EXT 0x8019
+#define GL_MAX_CONVOLUTION_WIDTH_EXT 0x801A
+#define GL_MAX_CONVOLUTION_HEIGHT_EXT 0x801B
+#define GL_POST_CONVOLUTION_RED_SCALE_EXT 0x801C
+#define GL_POST_CONVOLUTION_GREEN_SCALE_EXT 0x801D
+#define GL_POST_CONVOLUTION_BLUE_SCALE_EXT 0x801E
+#define GL_POST_CONVOLUTION_ALPHA_SCALE_EXT 0x801F
+#define GL_POST_CONVOLUTION_RED_BIAS_EXT 0x8020
+#define GL_POST_CONVOLUTION_GREEN_BIAS_EXT 0x8021
+#define GL_POST_CONVOLUTION_BLUE_BIAS_EXT 0x8022
+#define GL_POST_CONVOLUTION_ALPHA_BIAS_EXT 0x8023
+#endif
+
+#ifndef GL_SGI_color_matrix
+#define GL_COLOR_MATRIX_SGI 0x80B1
+#define GL_COLOR_MATRIX_STACK_DEPTH_SGI 0x80B2
+#define GL_MAX_COLOR_MATRIX_STACK_DEPTH_SGI 0x80B3
+#define GL_POST_COLOR_MATRIX_RED_SCALE_SGI 0x80B4
+#define GL_POST_COLOR_MATRIX_GREEN_SCALE_SGI 0x80B5
+#define GL_POST_COLOR_MATRIX_BLUE_SCALE_SGI 0x80B6
+#define GL_POST_COLOR_MATRIX_ALPHA_SCALE_SGI 0x80B7
+#define GL_POST_COLOR_MATRIX_RED_BIAS_SGI 0x80B8
+#define GL_POST_COLOR_MATRIX_GREEN_BIAS_SGI 0x80B9
+#define GL_POST_COLOR_MATRIX_BLUE_BIAS_SGI 0x80BA
+#define GL_POST_COLOR_MATRIX_ALPHA_BIAS_SGI 0x80BB
+#endif
+
+#ifndef GL_SGI_color_table
+#define GL_COLOR_TABLE_SGI 0x80D0
+#define GL_POST_CONVOLUTION_COLOR_TABLE_SGI 0x80D1
+#define GL_POST_COLOR_MATRIX_COLOR_TABLE_SGI 0x80D2
+#define GL_PROXY_COLOR_TABLE_SGI 0x80D3
+#define GL_PROXY_POST_CONVOLUTION_COLOR_TABLE_SGI 0x80D4
+#define GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE_SGI 0x80D5
+#define GL_COLOR_TABLE_SCALE_SGI 0x80D6
+#define GL_COLOR_TABLE_BIAS_SGI 0x80D7
+#define GL_COLOR_TABLE_FORMAT_SGI 0x80D8
+#define GL_COLOR_TABLE_WIDTH_SGI 0x80D9
+#define GL_COLOR_TABLE_RED_SIZE_SGI 0x80DA
+#define GL_COLOR_TABLE_GREEN_SIZE_SGI 0x80DB
+#define GL_COLOR_TABLE_BLUE_SIZE_SGI 0x80DC
+#define GL_COLOR_TABLE_ALPHA_SIZE_SGI 0x80DD
+#define GL_COLOR_TABLE_LUMINANCE_SIZE_SGI 0x80DE
+#define GL_COLOR_TABLE_INTENSITY_SIZE_SGI 0x80DF
+#endif
+
+#ifndef GL_SGIS_pixel_texture
+#define GL_PIXEL_TEXTURE_SGIS 0x8353
+#define GL_PIXEL_FRAGMENT_RGB_SOURCE_SGIS 0x8354
+#define GL_PIXEL_FRAGMENT_ALPHA_SOURCE_SGIS 0x8355
+#define GL_PIXEL_GROUP_COLOR_SGIS 0x8356
+#endif
+
+#ifndef GL_SGIX_pixel_texture
+#define GL_PIXEL_TEX_GEN_SGIX 0x8139
+#define GL_PIXEL_TEX_GEN_MODE_SGIX 0x832B
+#endif
+
+#ifndef GL_SGIS_texture4D
+#define GL_PACK_SKIP_VOLUMES_SGIS 0x8130
+#define GL_PACK_IMAGE_DEPTH_SGIS 0x8131
+#define GL_UNPACK_SKIP_VOLUMES_SGIS 0x8132
+#define GL_UNPACK_IMAGE_DEPTH_SGIS 0x8133
+#define GL_TEXTURE_4D_SGIS 0x8134
+#define GL_PROXY_TEXTURE_4D_SGIS 0x8135
+#define GL_TEXTURE_4DSIZE_SGIS 0x8136
+#define GL_TEXTURE_WRAP_Q_SGIS 0x8137
+#define GL_MAX_4D_TEXTURE_SIZE_SGIS 0x8138
+#define GL_TEXTURE_4D_BINDING_SGIS 0x814F
+#endif
+
+#ifndef GL_SGI_texture_color_table
+#define GL_TEXTURE_COLOR_TABLE_SGI 0x80BC
+#define GL_PROXY_TEXTURE_COLOR_TABLE_SGI 0x80BD
+#endif
+
+#ifndef GL_EXT_cmyka
+#define GL_CMYK_EXT 0x800C
+#define GL_CMYKA_EXT 0x800D
+#define GL_PACK_CMYK_HINT_EXT 0x800E
+#define GL_UNPACK_CMYK_HINT_EXT 0x800F
+#endif
+
+#ifndef GL_EXT_texture_object
+#define GL_TEXTURE_PRIORITY_EXT 0x8066
+#define GL_TEXTURE_RESIDENT_EXT 0x8067
+#define GL_TEXTURE_1D_BINDING_EXT 0x8068
+#define GL_TEXTURE_2D_BINDING_EXT 0x8069
+#define GL_TEXTURE_3D_BINDING_EXT 0x806A
+#endif
+
+#ifndef GL_SGIS_detail_texture
+#define GL_DETAIL_TEXTURE_2D_SGIS 0x8095
+#define GL_DETAIL_TEXTURE_2D_BINDING_SGIS 0x8096
+#define GL_LINEAR_DETAIL_SGIS 0x8097
+#define GL_LINEAR_DETAIL_ALPHA_SGIS 0x8098
+#define GL_LINEAR_DETAIL_COLOR_SGIS 0x8099
+#define GL_DETAIL_TEXTURE_LEVEL_SGIS 0x809A
+#define GL_DETAIL_TEXTURE_MODE_SGIS 0x809B
+#define GL_DETAIL_TEXTURE_FUNC_POINTS_SGIS 0x809C
+#endif
+
+#ifndef GL_SGIS_sharpen_texture
+#define GL_LINEAR_SHARPEN_SGIS 0x80AD
+#define GL_LINEAR_SHARPEN_ALPHA_SGIS 0x80AE
+#define GL_LINEAR_SHARPEN_COLOR_SGIS 0x80AF
+#define GL_SHARPEN_TEXTURE_FUNC_POINTS_SGIS 0x80B0
+#endif
+
+#ifndef GL_EXT_packed_pixels
+#define GL_UNSIGNED_BYTE_3_3_2_EXT 0x8032
+#define GL_UNSIGNED_SHORT_4_4_4_4_EXT 0x8033
+#define GL_UNSIGNED_SHORT_5_5_5_1_EXT 0x8034
+#define GL_UNSIGNED_INT_8_8_8_8_EXT 0x8035
+#define GL_UNSIGNED_INT_10_10_10_2_EXT 0x8036
+#endif
+
+#ifndef GL_SGIS_texture_lod
+#define GL_TEXTURE_MIN_LOD_SGIS 0x813A
+#define GL_TEXTURE_MAX_LOD_SGIS 0x813B
+#define GL_TEXTURE_BASE_LEVEL_SGIS 0x813C
+#define GL_TEXTURE_MAX_LEVEL_SGIS 0x813D
+#endif
+
+#ifndef GL_SGIS_multisample
+#define GL_MULTISAMPLE_SGIS 0x809D
+#define GL_SAMPLE_ALPHA_TO_MASK_SGIS 0x809E
+#define GL_SAMPLE_ALPHA_TO_ONE_SGIS 0x809F
+#define GL_SAMPLE_MASK_SGIS 0x80A0
+#define GL_1PASS_SGIS 0x80A1
+#define GL_2PASS_0_SGIS 0x80A2
+#define GL_2PASS_1_SGIS 0x80A3
+#define GL_4PASS_0_SGIS 0x80A4
+#define GL_4PASS_1_SGIS 0x80A5
+#define GL_4PASS_2_SGIS 0x80A6
+#define GL_4PASS_3_SGIS 0x80A7
+#define GL_SAMPLE_BUFFERS_SGIS 0x80A8
+#define GL_SAMPLES_SGIS 0x80A9
+#define GL_SAMPLE_MASK_VALUE_SGIS 0x80AA
+#define GL_SAMPLE_MASK_INVERT_SGIS 0x80AB
+#define GL_SAMPLE_PATTERN_SGIS 0x80AC
+#endif
+
+#ifndef GL_EXT_rescale_normal
+#define GL_RESCALE_NORMAL_EXT 0x803A
+#endif
+
+#ifndef GL_EXT_vertex_array
+#define GL_VERTEX_ARRAY_EXT 0x8074
+#define GL_NORMAL_ARRAY_EXT 0x8075
+#define GL_COLOR_ARRAY_EXT 0x8076
+#define GL_INDEX_ARRAY_EXT 0x8077
+#define GL_TEXTURE_COORD_ARRAY_EXT 0x8078
+#define GL_EDGE_FLAG_ARRAY_EXT 0x8079
+#define GL_VERTEX_ARRAY_SIZE_EXT 0x807A
+#define GL_VERTEX_ARRAY_TYPE_EXT 0x807B
+#define GL_VERTEX_ARRAY_STRIDE_EXT 0x807C
+#define GL_VERTEX_ARRAY_COUNT_EXT 0x807D
+#define GL_NORMAL_ARRAY_TYPE_EXT 0x807E
+#define GL_NORMAL_ARRAY_STRIDE_EXT 0x807F
+#define GL_NORMAL_ARRAY_COUNT_EXT 0x8080
+#define GL_COLOR_ARRAY_SIZE_EXT 0x8081
+#define GL_COLOR_ARRAY_TYPE_EXT 0x8082
+#define GL_COLOR_ARRAY_STRIDE_EXT 0x8083
+#define GL_COLOR_ARRAY_COUNT_EXT 0x8084
+#define GL_INDEX_ARRAY_TYPE_EXT 0x8085
+#define GL_INDEX_ARRAY_STRIDE_EXT 0x8086
+#define GL_INDEX_ARRAY_COUNT_EXT 0x8087
+#define GL_TEXTURE_COORD_ARRAY_SIZE_EXT 0x8088
+#define GL_TEXTURE_COORD_ARRAY_TYPE_EXT 0x8089
+#define GL_TEXTURE_COORD_ARRAY_STRIDE_EXT 0x808A
+#define GL_TEXTURE_COORD_ARRAY_COUNT_EXT 0x808B
+#define GL_EDGE_FLAG_ARRAY_STRIDE_EXT 0x808C
+#define GL_EDGE_FLAG_ARRAY_COUNT_EXT 0x808D
+#define GL_VERTEX_ARRAY_POINTER_EXT 0x808E
+#define GL_NORMAL_ARRAY_POINTER_EXT 0x808F
+#define GL_COLOR_ARRAY_POINTER_EXT 0x8090
+#define GL_INDEX_ARRAY_POINTER_EXT 0x8091
+#define GL_TEXTURE_COORD_ARRAY_POINTER_EXT 0x8092
+#define GL_EDGE_FLAG_ARRAY_POINTER_EXT 0x8093
+#endif
+
+#ifndef GL_EXT_misc_attribute
+#endif
+
+#ifndef GL_SGIS_generate_mipmap
+#define GL_GENERATE_MIPMAP_SGIS 0x8191
+#define GL_GENERATE_MIPMAP_HINT_SGIS 0x8192
+#endif
+
+#ifndef GL_SGIX_clipmap
+#define GL_LINEAR_CLIPMAP_LINEAR_SGIX 0x8170
+#define GL_TEXTURE_CLIPMAP_CENTER_SGIX 0x8171
+#define GL_TEXTURE_CLIPMAP_FRAME_SGIX 0x8172
+#define GL_TEXTURE_CLIPMAP_OFFSET_SGIX 0x8173
+#define GL_TEXTURE_CLIPMAP_VIRTUAL_DEPTH_SGIX 0x8174
+#define GL_TEXTURE_CLIPMAP_LOD_OFFSET_SGIX 0x8175
+#define GL_TEXTURE_CLIPMAP_DEPTH_SGIX 0x8176
+#define GL_MAX_CLIPMAP_DEPTH_SGIX 0x8177
+#define GL_MAX_CLIPMAP_VIRTUAL_DEPTH_SGIX 0x8178
+#define GL_NEAREST_CLIPMAP_NEAREST_SGIX 0x844D
+#define GL_NEAREST_CLIPMAP_LINEAR_SGIX 0x844E
+#define GL_LINEAR_CLIPMAP_NEAREST_SGIX 0x844F
+#endif
+
+#ifndef GL_SGIX_shadow
+#define GL_TEXTURE_COMPARE_SGIX 0x819A
+#define GL_TEXTURE_COMPARE_OPERATOR_SGIX 0x819B
+#define GL_TEXTURE_LEQUAL_R_SGIX 0x819C
+#define GL_TEXTURE_GEQUAL_R_SGIX 0x819D
+#endif
+
+#ifndef GL_SGIS_texture_edge_clamp
+#define GL_CLAMP_TO_EDGE_SGIS 0x812F
+#endif
+
+#ifndef GL_SGIS_texture_border_clamp
+#define GL_CLAMP_TO_BORDER_SGIS 0x812D
+#endif
+
+#ifndef GL_EXT_blend_minmax
+#define GL_FUNC_ADD_EXT 0x8006
+#define GL_MIN_EXT 0x8007
+#define GL_MAX_EXT 0x8008
+#define GL_BLEND_EQUATION_EXT 0x8009
+#endif
+
+#ifndef GL_EXT_blend_subtract
+#define GL_FUNC_SUBTRACT_EXT 0x800A
+#define GL_FUNC_REVERSE_SUBTRACT_EXT 0x800B
+#endif
+
+#ifndef GL_EXT_blend_logic_op
+#endif
+
+#ifndef GL_SGIX_interlace
+#define GL_INTERLACE_SGIX 0x8094
+#endif
+
+#ifndef GL_SGIX_pixel_tiles
+#define GL_PIXEL_TILE_BEST_ALIGNMENT_SGIX 0x813E
+#define GL_PIXEL_TILE_CACHE_INCREMENT_SGIX 0x813F
+#define GL_PIXEL_TILE_WIDTH_SGIX 0x8140
+#define GL_PIXEL_TILE_HEIGHT_SGIX 0x8141
+#define GL_PIXEL_TILE_GRID_WIDTH_SGIX 0x8142
+#define GL_PIXEL_TILE_GRID_HEIGHT_SGIX 0x8143
+#define GL_PIXEL_TILE_GRID_DEPTH_SGIX 0x8144
+#define GL_PIXEL_TILE_CACHE_SIZE_SGIX 0x8145
+#endif
+
+#ifndef GL_SGIS_texture_select
+#define GL_DUAL_ALPHA4_SGIS 0x8110
+#define GL_DUAL_ALPHA8_SGIS 0x8111
+#define GL_DUAL_ALPHA12_SGIS 0x8112
+#define GL_DUAL_ALPHA16_SGIS 0x8113
+#define GL_DUAL_LUMINANCE4_SGIS 0x8114
+#define GL_DUAL_LUMINANCE8_SGIS 0x8115
+#define GL_DUAL_LUMINANCE12_SGIS 0x8116
+#define GL_DUAL_LUMINANCE16_SGIS 0x8117
+#define GL_DUAL_INTENSITY4_SGIS 0x8118
+#define GL_DUAL_INTENSITY8_SGIS 0x8119
+#define GL_DUAL_INTENSITY12_SGIS 0x811A
+#define GL_DUAL_INTENSITY16_SGIS 0x811B
+#define GL_DUAL_LUMINANCE_ALPHA4_SGIS 0x811C
+#define GL_DUAL_LUMINANCE_ALPHA8_SGIS 0x811D
+#define GL_QUAD_ALPHA4_SGIS 0x811E
+#define GL_QUAD_ALPHA8_SGIS 0x811F
+#define GL_QUAD_LUMINANCE4_SGIS 0x8120
+#define GL_QUAD_LUMINANCE8_SGIS 0x8121
+#define GL_QUAD_INTENSITY4_SGIS 0x8122
+#define GL_QUAD_INTENSITY8_SGIS 0x8123
+#define GL_DUAL_TEXTURE_SELECT_SGIS 0x8124
+#define GL_QUAD_TEXTURE_SELECT_SGIS 0x8125
+#endif
+
+#ifndef GL_SGIX_sprite
+#define GL_SPRITE_SGIX 0x8148
+#define GL_SPRITE_MODE_SGIX 0x8149
+#define GL_SPRITE_AXIS_SGIX 0x814A
+#define GL_SPRITE_TRANSLATION_SGIX 0x814B
+#define GL_SPRITE_AXIAL_SGIX 0x814C
+#define GL_SPRITE_OBJECT_ALIGNED_SGIX 0x814D
+#define GL_SPRITE_EYE_ALIGNED_SGIX 0x814E
+#endif
+
+#ifndef GL_SGIX_texture_multi_buffer
+#define GL_TEXTURE_MULTI_BUFFER_HINT_SGIX 0x812E
+#endif
+
+#ifndef GL_EXT_point_parameters
+#define GL_POINT_SIZE_MIN_EXT 0x8126
+#define GL_POINT_SIZE_MAX_EXT 0x8127
+#define GL_POINT_FADE_THRESHOLD_SIZE_EXT 0x8128
+#define GL_DISTANCE_ATTENUATION_EXT 0x8129
+#endif
+
+#ifndef GL_SGIS_point_parameters
+#define GL_POINT_SIZE_MIN_SGIS 0x8126
+#define GL_POINT_SIZE_MAX_SGIS 0x8127
+#define GL_POINT_FADE_THRESHOLD_SIZE_SGIS 0x8128
+#define GL_DISTANCE_ATTENUATION_SGIS 0x8129
+#endif
+
+#ifndef GL_SGIX_instruments
+#define GL_INSTRUMENT_BUFFER_POINTER_SGIX 0x8180
+#define GL_INSTRUMENT_MEASUREMENTS_SGIX 0x8181
+#endif
+
+#ifndef GL_SGIX_texture_scale_bias
+#define GL_POST_TEXTURE_FILTER_BIAS_SGIX 0x8179
+#define GL_POST_TEXTURE_FILTER_SCALE_SGIX 0x817A
+#define GL_POST_TEXTURE_FILTER_BIAS_RANGE_SGIX 0x817B
+#define GL_POST_TEXTURE_FILTER_SCALE_RANGE_SGIX 0x817C
+#endif
+
+#ifndef GL_SGIX_framezoom
+#define GL_FRAMEZOOM_SGIX 0x818B
+#define GL_FRAMEZOOM_FACTOR_SGIX 0x818C
+#define GL_MAX_FRAMEZOOM_FACTOR_SGIX 0x818D
+#endif
+
+#ifndef GL_SGIX_tag_sample_buffer
+#endif
+
+#ifndef GL_FfdMaskSGIX
+#define GL_TEXTURE_DEFORMATION_BIT_SGIX 0x00000001
+#define GL_GEOMETRY_DEFORMATION_BIT_SGIX 0x00000002
+#endif
+
+#ifndef GL_SGIX_polynomial_ffd
+#define GL_GEOMETRY_DEFORMATION_SGIX 0x8194
+#define GL_TEXTURE_DEFORMATION_SGIX 0x8195
+#define GL_DEFORMATIONS_MASK_SGIX 0x8196
+#define GL_MAX_DEFORMATION_ORDER_SGIX 0x8197
+#endif
+
+#ifndef GL_SGIX_reference_plane
+#define GL_REFERENCE_PLANE_SGIX 0x817D
+#define GL_REFERENCE_PLANE_EQUATION_SGIX 0x817E
+#endif
+
+#ifndef GL_SGIX_flush_raster
+#endif
+
+#ifndef GL_SGIX_depth_texture
+#define GL_DEPTH_COMPONENT16_SGIX 0x81A5
+#define GL_DEPTH_COMPONENT24_SGIX 0x81A6
+#define GL_DEPTH_COMPONENT32_SGIX 0x81A7
+#endif
+
+#ifndef GL_SGIS_fog_function
+#define GL_FOG_FUNC_SGIS 0x812A
+#define GL_FOG_FUNC_POINTS_SGIS 0x812B
+#define GL_MAX_FOG_FUNC_POINTS_SGIS 0x812C
+#endif
+
+#ifndef GL_SGIX_fog_offset
+#define GL_FOG_OFFSET_SGIX 0x8198
+#define GL_FOG_OFFSET_VALUE_SGIX 0x8199
+#endif
+
+#ifndef GL_HP_image_transform
+#define GL_IMAGE_SCALE_X_HP 0x8155
+#define GL_IMAGE_SCALE_Y_HP 0x8156
+#define GL_IMAGE_TRANSLATE_X_HP 0x8157
+#define GL_IMAGE_TRANSLATE_Y_HP 0x8158
+#define GL_IMAGE_ROTATE_ANGLE_HP 0x8159
+#define GL_IMAGE_ROTATE_ORIGIN_X_HP 0x815A
+#define GL_IMAGE_ROTATE_ORIGIN_Y_HP 0x815B
+#define GL_IMAGE_MAG_FILTER_HP 0x815C
+#define GL_IMAGE_MIN_FILTER_HP 0x815D
+#define GL_IMAGE_CUBIC_WEIGHT_HP 0x815E
+#define GL_CUBIC_HP 0x815F
+#define GL_AVERAGE_HP 0x8160
+#define GL_IMAGE_TRANSFORM_2D_HP 0x8161
+#define GL_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP 0x8162
+#define GL_PROXY_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP 0x8163
+#endif
+
+#ifndef GL_HP_convolution_border_modes
+#define GL_IGNORE_BORDER_HP 0x8150
+#define GL_CONSTANT_BORDER_HP 0x8151
+#define GL_REPLICATE_BORDER_HP 0x8153
+#define GL_CONVOLUTION_BORDER_COLOR_HP 0x8154
+#endif
+
+#ifndef GL_INGR_palette_buffer
+#endif
+
+#ifndef GL_SGIX_texture_add_env
+#define GL_TEXTURE_ENV_BIAS_SGIX 0x80BE
+#endif
+
+#ifndef GL_EXT_color_subtable
+#endif
+
+#ifndef GL_PGI_vertex_hints
+#define GL_VERTEX_DATA_HINT_PGI 0x1A22A
+#define GL_VERTEX_CONSISTENT_HINT_PGI 0x1A22B
+#define GL_MATERIAL_SIDE_HINT_PGI 0x1A22C
+#define GL_MAX_VERTEX_HINT_PGI 0x1A22D
+#define GL_COLOR3_BIT_PGI 0x00010000
+#define GL_COLOR4_BIT_PGI 0x00020000
+#define GL_EDGEFLAG_BIT_PGI 0x00040000
+#define GL_INDEX_BIT_PGI 0x00080000
+#define GL_MAT_AMBIENT_BIT_PGI 0x00100000
+#define GL_MAT_AMBIENT_AND_DIFFUSE_BIT_PGI 0x00200000
+#define GL_MAT_DIFFUSE_BIT_PGI 0x00400000
+#define GL_MAT_EMISSION_BIT_PGI 0x00800000
+#define GL_MAT_COLOR_INDEXES_BIT_PGI 0x01000000
+#define GL_MAT_SHININESS_BIT_PGI 0x02000000
+#define GL_MAT_SPECULAR_BIT_PGI 0x04000000
+#define GL_NORMAL_BIT_PGI 0x08000000
+#define GL_TEXCOORD1_BIT_PGI 0x10000000
+#define GL_TEXCOORD2_BIT_PGI 0x20000000
+#define GL_TEXCOORD3_BIT_PGI 0x40000000
+#define GL_TEXCOORD4_BIT_PGI 0x80000000
+#define GL_VERTEX23_BIT_PGI 0x00000004
+#define GL_VERTEX4_BIT_PGI 0x00000008
+#endif
+
+#ifndef GL_PGI_misc_hints
+#define GL_PREFER_DOUBLEBUFFER_HINT_PGI 0x1A1F8
+#define GL_CONSERVE_MEMORY_HINT_PGI 0x1A1FD
+#define GL_RECLAIM_MEMORY_HINT_PGI 0x1A1FE
+#define GL_NATIVE_GRAPHICS_HANDLE_PGI 0x1A202
+#define GL_NATIVE_GRAPHICS_BEGIN_HINT_PGI 0x1A203
+#define GL_NATIVE_GRAPHICS_END_HINT_PGI 0x1A204
+#define GL_ALWAYS_FAST_HINT_PGI 0x1A20C
+#define GL_ALWAYS_SOFT_HINT_PGI 0x1A20D
+#define GL_ALLOW_DRAW_OBJ_HINT_PGI 0x1A20E
+#define GL_ALLOW_DRAW_WIN_HINT_PGI 0x1A20F
+#define GL_ALLOW_DRAW_FRG_HINT_PGI 0x1A210
+#define GL_ALLOW_DRAW_MEM_HINT_PGI 0x1A211
+#define GL_STRICT_DEPTHFUNC_HINT_PGI 0x1A216
+#define GL_STRICT_LIGHTING_HINT_PGI 0x1A217
+#define GL_STRICT_SCISSOR_HINT_PGI 0x1A218
+#define GL_FULL_STIPPLE_HINT_PGI 0x1A219
+#define GL_CLIP_NEAR_HINT_PGI 0x1A220
+#define GL_CLIP_FAR_HINT_PGI 0x1A221
+#define GL_WIDE_LINE_HINT_PGI 0x1A222
+#define GL_BACK_NORMALS_HINT_PGI 0x1A223
+#endif
+
+#ifndef GL_EXT_paletted_texture
+#define GL_COLOR_INDEX1_EXT 0x80E2
+#define GL_COLOR_INDEX2_EXT 0x80E3
+#define GL_COLOR_INDEX4_EXT 0x80E4
+#define GL_COLOR_INDEX8_EXT 0x80E5
+#define GL_COLOR_INDEX12_EXT 0x80E6
+#define GL_COLOR_INDEX16_EXT 0x80E7
+#define GL_TEXTURE_INDEX_SIZE_EXT 0x80ED
+#endif
+
+#ifndef GL_EXT_clip_volume_hint
+#define GL_CLIP_VOLUME_CLIPPING_HINT_EXT 0x80F0
+#endif
+
+#ifndef GL_SGIX_list_priority
+#define GL_LIST_PRIORITY_SGIX 0x8182
+#endif
+
+#ifndef GL_SGIX_ir_instrument1
+#define GL_IR_INSTRUMENT1_SGIX 0x817F
+#endif
+
+#ifndef GL_SGIX_calligraphic_fragment
+#define GL_CALLIGRAPHIC_FRAGMENT_SGIX 0x8183
+#endif
+
+#ifndef GL_SGIX_texture_lod_bias
+#define GL_TEXTURE_LOD_BIAS_S_SGIX 0x818E
+#define GL_TEXTURE_LOD_BIAS_T_SGIX 0x818F
+#define GL_TEXTURE_LOD_BIAS_R_SGIX 0x8190
+#endif
+
+#ifndef GL_SGIX_shadow_ambient
+#define GL_SHADOW_AMBIENT_SGIX 0x80BF
+#endif
+
+#ifndef GL_EXT_index_texture
+#endif
+
+#ifndef GL_EXT_index_material
+#define GL_INDEX_MATERIAL_EXT 0x81B8
+#define GL_INDEX_MATERIAL_PARAMETER_EXT 0x81B9
+#define GL_INDEX_MATERIAL_FACE_EXT 0x81BA
+#endif
+
+#ifndef GL_EXT_index_func
+#define GL_INDEX_TEST_EXT 0x81B5
+#define GL_INDEX_TEST_FUNC_EXT 0x81B6
+#define GL_INDEX_TEST_REF_EXT 0x81B7
+#endif
+
+#ifndef GL_EXT_index_array_formats
+#define GL_IUI_V2F_EXT 0x81AD
+#define GL_IUI_V3F_EXT 0x81AE
+#define GL_IUI_N3F_V2F_EXT 0x81AF
+#define GL_IUI_N3F_V3F_EXT 0x81B0
+#define GL_T2F_IUI_V2F_EXT 0x81B1
+#define GL_T2F_IUI_V3F_EXT 0x81B2
+#define GL_T2F_IUI_N3F_V2F_EXT 0x81B3
+#define GL_T2F_IUI_N3F_V3F_EXT 0x81B4
+#endif
+
+#ifndef GL_EXT_compiled_vertex_array
+#define GL_ARRAY_ELEMENT_LOCK_FIRST_EXT 0x81A8
+#define GL_ARRAY_ELEMENT_LOCK_COUNT_EXT 0x81A9
+#endif
+
+#ifndef GL_EXT_cull_vertex
+#define GL_CULL_VERTEX_EXT 0x81AA
+#define GL_CULL_VERTEX_EYE_POSITION_EXT 0x81AB
+#define GL_CULL_VERTEX_OBJECT_POSITION_EXT 0x81AC
+#endif
+
+#ifndef GL_SGIX_ycrcb
+#define GL_YCRCB_422_SGIX 0x81BB
+#define GL_YCRCB_444_SGIX 0x81BC
+#endif
+
+#ifndef GL_SGIX_fragment_lighting
+#define GL_FRAGMENT_LIGHTING_SGIX 0x8400
+#define GL_FRAGMENT_COLOR_MATERIAL_SGIX 0x8401
+#define GL_FRAGMENT_COLOR_MATERIAL_FACE_SGIX 0x8402
+#define GL_FRAGMENT_COLOR_MATERIAL_PARAMETER_SGIX 0x8403
+#define GL_MAX_FRAGMENT_LIGHTS_SGIX 0x8404
+#define GL_MAX_ACTIVE_LIGHTS_SGIX 0x8405
+#define GL_CURRENT_RASTER_NORMAL_SGIX 0x8406
+#define GL_LIGHT_ENV_MODE_SGIX 0x8407
+#define GL_FRAGMENT_LIGHT_MODEL_LOCAL_VIEWER_SGIX 0x8408
+#define GL_FRAGMENT_LIGHT_MODEL_TWO_SIDE_SGIX 0x8409
+#define GL_FRAGMENT_LIGHT_MODEL_AMBIENT_SGIX 0x840A
+#define GL_FRAGMENT_LIGHT_MODEL_NORMAL_INTERPOLATION_SGIX 0x840B
+#define GL_FRAGMENT_LIGHT0_SGIX 0x840C
+#define GL_FRAGMENT_LIGHT1_SGIX 0x840D
+#define GL_FRAGMENT_LIGHT2_SGIX 0x840E
+#define GL_FRAGMENT_LIGHT3_SGIX 0x840F
+#define GL_FRAGMENT_LIGHT4_SGIX 0x8410
+#define GL_FRAGMENT_LIGHT5_SGIX 0x8411
+#define GL_FRAGMENT_LIGHT6_SGIX 0x8412
+#define GL_FRAGMENT_LIGHT7_SGIX 0x8413
+#endif
+
+#ifndef GL_IBM_rasterpos_clip
+#define GL_RASTER_POSITION_UNCLIPPED_IBM 0x19262
+#endif
+
+#ifndef GL_HP_texture_lighting
+#define GL_TEXTURE_LIGHTING_MODE_HP 0x8167
+#define GL_TEXTURE_POST_SPECULAR_HP 0x8168
+#define GL_TEXTURE_PRE_SPECULAR_HP 0x8169
+#endif
+
+#ifndef GL_EXT_draw_range_elements
+#define GL_MAX_ELEMENTS_VERTICES_EXT 0x80E8
+#define GL_MAX_ELEMENTS_INDICES_EXT 0x80E9
+#endif
+
+#ifndef GL_WIN_phong_shading
+#define GL_PHONG_WIN 0x80EA
+#define GL_PHONG_HINT_WIN 0x80EB
+#endif
+
+#ifndef GL_WIN_specular_fog
+#define GL_FOG_SPECULAR_TEXTURE_WIN 0x80EC
+#endif
+
+#ifndef GL_EXT_light_texture
+#define GL_FRAGMENT_MATERIAL_EXT 0x8349
+#define GL_FRAGMENT_NORMAL_EXT 0x834A
+#define GL_FRAGMENT_COLOR_EXT 0x834C
+#define GL_ATTENUATION_EXT 0x834D
+#define GL_SHADOW_ATTENUATION_EXT 0x834E
+#define GL_TEXTURE_APPLICATION_MODE_EXT 0x834F
+#define GL_TEXTURE_LIGHT_EXT 0x8350
+#define GL_TEXTURE_MATERIAL_FACE_EXT 0x8351
+#define GL_TEXTURE_MATERIAL_PARAMETER_EXT 0x8352
+/* reuse GL_FRAGMENT_DEPTH_EXT */
+#endif
+
+#ifndef GL_SGIX_blend_alpha_minmax
+#define GL_ALPHA_MIN_SGIX 0x8320
+#define GL_ALPHA_MAX_SGIX 0x8321
+#endif
+
+#ifndef GL_SGIX_impact_pixel_texture
+#define GL_PIXEL_TEX_GEN_Q_CEILING_SGIX 0x8184
+#define GL_PIXEL_TEX_GEN_Q_ROUND_SGIX 0x8185
+#define GL_PIXEL_TEX_GEN_Q_FLOOR_SGIX 0x8186
+#define GL_PIXEL_TEX_GEN_ALPHA_REPLACE_SGIX 0x8187
+#define GL_PIXEL_TEX_GEN_ALPHA_NO_REPLACE_SGIX 0x8188
+#define GL_PIXEL_TEX_GEN_ALPHA_LS_SGIX 0x8189
+#define GL_PIXEL_TEX_GEN_ALPHA_MS_SGIX 0x818A
+#endif
+
+#ifndef GL_EXT_bgra
+#define GL_BGR_EXT 0x80E0
+#define GL_BGRA_EXT 0x80E1
+#endif
+
+#ifndef GL_SGIX_async
+#define GL_ASYNC_MARKER_SGIX 0x8329
+#endif
+
+#ifndef GL_SGIX_async_pixel
+#define GL_ASYNC_TEX_IMAGE_SGIX 0x835C
+#define GL_ASYNC_DRAW_PIXELS_SGIX 0x835D
+#define GL_ASYNC_READ_PIXELS_SGIX 0x835E
+#define GL_MAX_ASYNC_TEX_IMAGE_SGIX 0x835F
+#define GL_MAX_ASYNC_DRAW_PIXELS_SGIX 0x8360
+#define GL_MAX_ASYNC_READ_PIXELS_SGIX 0x8361
+#endif
+
+#ifndef GL_SGIX_async_histogram
+#define GL_ASYNC_HISTOGRAM_SGIX 0x832C
+#define GL_MAX_ASYNC_HISTOGRAM_SGIX 0x832D
+#endif
+
+#ifndef GL_INTEL_texture_scissor
+#endif
+
+#ifndef GL_INTEL_parallel_arrays
+#define GL_PARALLEL_ARRAYS_INTEL 0x83F4
+#define GL_VERTEX_ARRAY_PARALLEL_POINTERS_INTEL 0x83F5
+#define GL_NORMAL_ARRAY_PARALLEL_POINTERS_INTEL 0x83F6
+#define GL_COLOR_ARRAY_PARALLEL_POINTERS_INTEL 0x83F7
+#define GL_TEXTURE_COORD_ARRAY_PARALLEL_POINTERS_INTEL 0x83F8
+#endif
+
+#ifndef GL_HP_occlusion_test
+#define GL_OCCLUSION_TEST_HP 0x8165
+#define GL_OCCLUSION_TEST_RESULT_HP 0x8166
+#endif
+
+#ifndef GL_EXT_pixel_transform
+#define GL_PIXEL_TRANSFORM_2D_EXT 0x8330
+#define GL_PIXEL_MAG_FILTER_EXT 0x8331
+#define GL_PIXEL_MIN_FILTER_EXT 0x8332
+#define GL_PIXEL_CUBIC_WEIGHT_EXT 0x8333
+#define GL_CUBIC_EXT 0x8334
+#define GL_AVERAGE_EXT 0x8335
+#define GL_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT 0x8336
+#define GL_MAX_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT 0x8337
+#define GL_PIXEL_TRANSFORM_2D_MATRIX_EXT 0x8338
+#endif
+
+#ifndef GL_EXT_pixel_transform_color_table
+#endif
+
+#ifndef GL_EXT_shared_texture_palette
+#define GL_SHARED_TEXTURE_PALETTE_EXT 0x81FB
+#endif
+
+#ifndef GL_EXT_separate_specular_color
+#define GL_LIGHT_MODEL_COLOR_CONTROL_EXT 0x81F8
+#define GL_SINGLE_COLOR_EXT 0x81F9
+#define GL_SEPARATE_SPECULAR_COLOR_EXT 0x81FA
+#endif
+
+#ifndef GL_EXT_secondary_color
+#define GL_COLOR_SUM_EXT 0x8458
+#define GL_CURRENT_SECONDARY_COLOR_EXT 0x8459
+#define GL_SECONDARY_COLOR_ARRAY_SIZE_EXT 0x845A
+#define GL_SECONDARY_COLOR_ARRAY_TYPE_EXT 0x845B
+#define GL_SECONDARY_COLOR_ARRAY_STRIDE_EXT 0x845C
+#define GL_SECONDARY_COLOR_ARRAY_POINTER_EXT 0x845D
+#define GL_SECONDARY_COLOR_ARRAY_EXT 0x845E
+#endif
+
+#ifndef GL_EXT_texture_perturb_normal
+#define GL_PERTURB_EXT 0x85AE
+#define GL_TEXTURE_NORMAL_EXT 0x85AF
+#endif
+
+#ifndef GL_EXT_multi_draw_arrays
+#endif
+
+#ifndef GL_EXT_fog_coord
+#define GL_FOG_COORDINATE_SOURCE_EXT 0x8450
+#define GL_FOG_COORDINATE_EXT 0x8451
+#define GL_FRAGMENT_DEPTH_EXT 0x8452
+#define GL_CURRENT_FOG_COORDINATE_EXT 0x8453
+#define GL_FOG_COORDINATE_ARRAY_TYPE_EXT 0x8454
+#define GL_FOG_COORDINATE_ARRAY_STRIDE_EXT 0x8455
+#define GL_FOG_COORDINATE_ARRAY_POINTER_EXT 0x8456
+#define GL_FOG_COORDINATE_ARRAY_EXT 0x8457
+#endif
+
+#ifndef GL_REND_screen_coordinates
+#define GL_SCREEN_COORDINATES_REND 0x8490
+#define GL_INVERTED_SCREEN_W_REND 0x8491
+#endif
+
+#ifndef GL_EXT_coordinate_frame
+#define GL_TANGENT_ARRAY_EXT 0x8439
+#define GL_BINORMAL_ARRAY_EXT 0x843A
+#define GL_CURRENT_TANGENT_EXT 0x843B
+#define GL_CURRENT_BINORMAL_EXT 0x843C
+#define GL_TANGENT_ARRAY_TYPE_EXT 0x843E
+#define GL_TANGENT_ARRAY_STRIDE_EXT 0x843F
+#define GL_BINORMAL_ARRAY_TYPE_EXT 0x8440
+#define GL_BINORMAL_ARRAY_STRIDE_EXT 0x8441
+#define GL_TANGENT_ARRAY_POINTER_EXT 0x8442
+#define GL_BINORMAL_ARRAY_POINTER_EXT 0x8443
+#define GL_MAP1_TANGENT_EXT 0x8444
+#define GL_MAP2_TANGENT_EXT 0x8445
+#define GL_MAP1_BINORMAL_EXT 0x8446
+#define GL_MAP2_BINORMAL_EXT 0x8447
+#endif
+
+#ifndef GL_EXT_texture_env_combine
+#define GL_COMBINE_EXT 0x8570
+#define GL_COMBINE_RGB_EXT 0x8571
+#define GL_COMBINE_ALPHA_EXT 0x8572
+#define GL_RGB_SCALE_EXT 0x8573
+#define GL_ADD_SIGNED_EXT 0x8574
+#define GL_INTERPOLATE_EXT 0x8575
+#define GL_CONSTANT_EXT 0x8576
+#define GL_PRIMARY_COLOR_EXT 0x8577
+#define GL_PREVIOUS_EXT 0x8578
+#define GL_SOURCE0_RGB_EXT 0x8580
+#define GL_SOURCE1_RGB_EXT 0x8581
+#define GL_SOURCE2_RGB_EXT 0x8582
+#define GL_SOURCE0_ALPHA_EXT 0x8588
+#define GL_SOURCE1_ALPHA_EXT 0x8589
+#define GL_SOURCE2_ALPHA_EXT 0x858A
+#define GL_OPERAND0_RGB_EXT 0x8590
+#define GL_OPERAND1_RGB_EXT 0x8591
+#define GL_OPERAND2_RGB_EXT 0x8592
+#define GL_OPERAND0_ALPHA_EXT 0x8598
+#define GL_OPERAND1_ALPHA_EXT 0x8599
+#define GL_OPERAND2_ALPHA_EXT 0x859A
+#endif
+
+#ifndef GL_APPLE_specular_vector
+#define GL_LIGHT_MODEL_SPECULAR_VECTOR_APPLE 0x85B0
+#endif
+
+#ifndef GL_APPLE_transform_hint
+#define GL_TRANSFORM_HINT_APPLE 0x85B1
+#endif
+
+#ifndef GL_SGIX_fog_scale
+#define GL_FOG_SCALE_SGIX 0x81FC
+#define GL_FOG_SCALE_VALUE_SGIX 0x81FD
+#endif
+
+#ifndef GL_SUNX_constant_data
+#define GL_UNPACK_CONSTANT_DATA_SUNX 0x81D5
+#define GL_TEXTURE_CONSTANT_DATA_SUNX 0x81D6
+#endif
+
+#ifndef GL_SUN_global_alpha
+#define GL_GLOBAL_ALPHA_SUN 0x81D9
+#define GL_GLOBAL_ALPHA_FACTOR_SUN 0x81DA
+#endif
+
+#ifndef GL_SUN_triangle_list
+#define GL_RESTART_SUN 0x0001
+#define GL_REPLACE_MIDDLE_SUN 0x0002
+#define GL_REPLACE_OLDEST_SUN 0x0003
+#define GL_TRIANGLE_LIST_SUN 0x81D7
+#define GL_REPLACEMENT_CODE_SUN 0x81D8
+#define GL_REPLACEMENT_CODE_ARRAY_SUN 0x85C0
+#define GL_REPLACEMENT_CODE_ARRAY_TYPE_SUN 0x85C1
+#define GL_REPLACEMENT_CODE_ARRAY_STRIDE_SUN 0x85C2
+#define GL_REPLACEMENT_CODE_ARRAY_POINTER_SUN 0x85C3
+#define GL_R1UI_V3F_SUN 0x85C4
+#define GL_R1UI_C4UB_V3F_SUN 0x85C5
+#define GL_R1UI_C3F_V3F_SUN 0x85C6
+#define GL_R1UI_N3F_V3F_SUN 0x85C7
+#define GL_R1UI_C4F_N3F_V3F_SUN 0x85C8
+#define GL_R1UI_T2F_V3F_SUN 0x85C9
+#define GL_R1UI_T2F_N3F_V3F_SUN 0x85CA
+#define GL_R1UI_T2F_C4F_N3F_V3F_SUN 0x85CB
+#endif
+
+#ifndef GL_SUN_vertex
+#endif
+
+#ifndef GL_EXT_blend_func_separate
+#define GL_BLEND_DST_RGB_EXT 0x80C8
+#define GL_BLEND_SRC_RGB_EXT 0x80C9
+#define GL_BLEND_DST_ALPHA_EXT 0x80CA
+#define GL_BLEND_SRC_ALPHA_EXT 0x80CB
+#endif
+
+#ifndef GL_INGR_color_clamp
+#define GL_RED_MIN_CLAMP_INGR 0x8560
+#define GL_GREEN_MIN_CLAMP_INGR 0x8561
+#define GL_BLUE_MIN_CLAMP_INGR 0x8562
+#define GL_ALPHA_MIN_CLAMP_INGR 0x8563
+#define GL_RED_MAX_CLAMP_INGR 0x8564
+#define GL_GREEN_MAX_CLAMP_INGR 0x8565
+#define GL_BLUE_MAX_CLAMP_INGR 0x8566
+#define GL_ALPHA_MAX_CLAMP_INGR 0x8567
+#endif
+
+#ifndef GL_INGR_interlace_read
+#define GL_INTERLACE_READ_INGR 0x8568
+#endif
+
+#ifndef GL_EXT_stencil_wrap
+#define GL_INCR_WRAP_EXT 0x8507
+#define GL_DECR_WRAP_EXT 0x8508
+#endif
+
+#ifndef GL_EXT_422_pixels
+#define GL_422_EXT 0x80CC
+#define GL_422_REV_EXT 0x80CD
+#define GL_422_AVERAGE_EXT 0x80CE
+#define GL_422_REV_AVERAGE_EXT 0x80CF
+#endif
+
+#ifndef GL_NV_texgen_reflection
+#define GL_NORMAL_MAP_NV 0x8511
+#define GL_REFLECTION_MAP_NV 0x8512
+#endif
+
+#ifndef GL_EXT_texture_cube_map
+#define GL_NORMAL_MAP_EXT 0x8511
+#define GL_REFLECTION_MAP_EXT 0x8512
+#define GL_TEXTURE_CUBE_MAP_EXT 0x8513
+#define GL_TEXTURE_BINDING_CUBE_MAP_EXT 0x8514
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_X_EXT 0x8515
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X_EXT 0x8516
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y_EXT 0x8517
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_EXT 0x8518
+#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z_EXT 0x8519
+#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_EXT 0x851A
+#define GL_PROXY_TEXTURE_CUBE_MAP_EXT 0x851B
+#define GL_MAX_CUBE_MAP_TEXTURE_SIZE_EXT 0x851C
+#endif
+
+#ifndef GL_SUN_convolution_border_modes
+#define GL_WRAP_BORDER_SUN 0x81D4
+#endif
+
+#ifndef GL_EXT_texture_env_add
+#endif
+
+#ifndef GL_EXT_texture_lod_bias
+#define GL_MAX_TEXTURE_LOD_BIAS_EXT 0x84FD
+#define GL_TEXTURE_FILTER_CONTROL_EXT 0x8500
+#define GL_TEXTURE_LOD_BIAS_EXT 0x8501
+#endif
+
+#ifndef GL_EXT_texture_filter_anisotropic
+#define GL_TEXTURE_MAX_ANISOTROPY_EXT 0x84FE
+#define GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT 0x84FF
+#endif
+
+#ifndef GL_EXT_vertex_weighting
+#define GL_MODELVIEW0_STACK_DEPTH_EXT GL_MODELVIEW_STACK_DEPTH
+#define GL_MODELVIEW1_STACK_DEPTH_EXT 0x8502
+#define GL_MODELVIEW0_MATRIX_EXT GL_MODELVIEW_MATRIX
+#define GL_MODELVIEW1_MATRIX_EXT 0x8506
+#define GL_VERTEX_WEIGHTING_EXT 0x8509
+#define GL_MODELVIEW0_EXT GL_MODELVIEW
+#define GL_MODELVIEW1_EXT 0x850A
+#define GL_CURRENT_VERTEX_WEIGHT_EXT 0x850B
+#define GL_VERTEX_WEIGHT_ARRAY_EXT 0x850C
+#define GL_VERTEX_WEIGHT_ARRAY_SIZE_EXT 0x850D
+#define GL_VERTEX_WEIGHT_ARRAY_TYPE_EXT 0x850E
+#define GL_VERTEX_WEIGHT_ARRAY_STRIDE_EXT 0x850F
+#define GL_VERTEX_WEIGHT_ARRAY_POINTER_EXT 0x8510
+#endif
+
+#ifndef GL_NV_light_max_exponent
+#define GL_MAX_SHININESS_NV 0x8504
+#define GL_MAX_SPOT_EXPONENT_NV 0x8505
+#endif
+
+#ifndef GL_NV_vertex_array_range
+#define GL_VERTEX_ARRAY_RANGE_NV 0x851D
+#define GL_VERTEX_ARRAY_RANGE_LENGTH_NV 0x851E
+#define GL_VERTEX_ARRAY_RANGE_VALID_NV 0x851F
+#define GL_MAX_VERTEX_ARRAY_RANGE_ELEMENT_NV 0x8520
+#define GL_VERTEX_ARRAY_RANGE_POINTER_NV 0x8521
+#endif
+
+#ifndef GL_NV_register_combiners
+#define GL_REGISTER_COMBINERS_NV 0x8522
+#define GL_VARIABLE_A_NV 0x8523
+#define GL_VARIABLE_B_NV 0x8524
+#define GL_VARIABLE_C_NV 0x8525
+#define GL_VARIABLE_D_NV 0x8526
+#define GL_VARIABLE_E_NV 0x8527
+#define GL_VARIABLE_F_NV 0x8528
+#define GL_VARIABLE_G_NV 0x8529
+#define GL_CONSTANT_COLOR0_NV 0x852A
+#define GL_CONSTANT_COLOR1_NV 0x852B
+#define GL_PRIMARY_COLOR_NV 0x852C
+#define GL_SECONDARY_COLOR_NV 0x852D
+#define GL_SPARE0_NV 0x852E
+#define GL_SPARE1_NV 0x852F
+#define GL_DISCARD_NV 0x8530
+#define GL_E_TIMES_F_NV 0x8531
+#define GL_SPARE0_PLUS_SECONDARY_COLOR_NV 0x8532
+#define GL_UNSIGNED_IDENTITY_NV 0x8536
+#define GL_UNSIGNED_INVERT_NV 0x8537
+#define GL_EXPAND_NORMAL_NV 0x8538
+#define GL_EXPAND_NEGATE_NV 0x8539
+#define GL_HALF_BIAS_NORMAL_NV 0x853A
+#define GL_HALF_BIAS_NEGATE_NV 0x853B
+#define GL_SIGNED_IDENTITY_NV 0x853C
+#define GL_SIGNED_NEGATE_NV 0x853D
+#define GL_SCALE_BY_TWO_NV 0x853E
+#define GL_SCALE_BY_FOUR_NV 0x853F
+#define GL_SCALE_BY_ONE_HALF_NV 0x8540
+#define GL_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x8541
+#define GL_COMBINER_INPUT_NV 0x8542
+#define GL_COMBINER_MAPPING_NV 0x8543
+#define GL_COMBINER_COMPONENT_USAGE_NV 0x8544
+#define GL_COMBINER_AB_DOT_PRODUCT_NV 0x8545
+#define GL_COMBINER_CD_DOT_PRODUCT_NV 0x8546
+#define GL_COMBINER_MUX_SUM_NV 0x8547
+#define GL_COMBINER_SCALE_NV 0x8548
+#define GL_COMBINER_BIAS_NV 0x8549
+#define GL_COMBINER_AB_OUTPUT_NV 0x854A
+#define GL_COMBINER_CD_OUTPUT_NV 0x854B
+#define GL_COMBINER_SUM_OUTPUT_NV 0x854C
+#define GL_MAX_GENERAL_COMBINERS_NV 0x854D
+#define GL_NUM_GENERAL_COMBINERS_NV 0x854E
+#define GL_COLOR_SUM_CLAMP_NV 0x854F
+#define GL_COMBINER0_NV 0x8550
+#define GL_COMBINER1_NV 0x8551
+#define GL_COMBINER2_NV 0x8552
+#define GL_COMBINER3_NV 0x8553
+#define GL_COMBINER4_NV 0x8554
+#define GL_COMBINER5_NV 0x8555
+#define GL_COMBINER6_NV 0x8556
+#define GL_COMBINER7_NV 0x8557
+/* reuse GL_TEXTURE0_ARB */
+/* reuse GL_TEXTURE1_ARB */
+/* reuse GL_ZERO */
+/* reuse GL_NONE */
+/* reuse GL_FOG */
+#endif
+
+#ifndef GL_NV_fog_distance
+#define GL_FOG_DISTANCE_MODE_NV 0x855A
+#define GL_EYE_RADIAL_NV 0x855B
+#define GL_EYE_PLANE_ABSOLUTE_NV 0x855C
+/* reuse GL_EYE_PLANE */
+#endif
+
+#ifndef GL_NV_texgen_emboss
+#define GL_EMBOSS_LIGHT_NV 0x855D
+#define GL_EMBOSS_CONSTANT_NV 0x855E
+#define GL_EMBOSS_MAP_NV 0x855F
+#endif
+
+#ifndef GL_NV_blend_square
+#endif
+
+#ifndef GL_NV_texture_env_combine4
+#define GL_COMBINE4_NV 0x8503
+#define GL_SOURCE3_RGB_NV 0x8583
+#define GL_SOURCE3_ALPHA_NV 0x858B
+#define GL_OPERAND3_RGB_NV 0x8593
+#define GL_OPERAND3_ALPHA_NV 0x859B
+#endif
+
+#ifndef GL_MESA_resize_buffers
+#endif
+
+#ifndef GL_MESA_window_pos
+#endif
+
+#ifndef GL_EXT_texture_compression_s3tc
+#define GL_COMPRESSED_RGB_S3TC_DXT1_EXT 0x83F0
+#define GL_COMPRESSED_RGBA_S3TC_DXT1_EXT 0x83F1
+#define GL_COMPRESSED_RGBA_S3TC_DXT3_EXT 0x83F2
+#define GL_COMPRESSED_RGBA_S3TC_DXT5_EXT 0x83F3
+#endif
+
+#ifndef GL_IBM_cull_vertex
+#define GL_CULL_VERTEX_IBM 103050
+#endif
+
+#ifndef GL_IBM_multimode_draw_arrays
+#endif
+
+#ifndef GL_IBM_vertex_array_lists
+#define GL_VERTEX_ARRAY_LIST_IBM 103070
+#define GL_NORMAL_ARRAY_LIST_IBM 103071
+#define GL_COLOR_ARRAY_LIST_IBM 103072
+#define GL_INDEX_ARRAY_LIST_IBM 103073
+#define GL_TEXTURE_COORD_ARRAY_LIST_IBM 103074
+#define GL_EDGE_FLAG_ARRAY_LIST_IBM 103075
+#define GL_FOG_COORDINATE_ARRAY_LIST_IBM 103076
+#define GL_SECONDARY_COLOR_ARRAY_LIST_IBM 103077
+#define GL_VERTEX_ARRAY_LIST_STRIDE_IBM 103080
+#define GL_NORMAL_ARRAY_LIST_STRIDE_IBM 103081
+#define GL_COLOR_ARRAY_LIST_STRIDE_IBM 103082
+#define GL_INDEX_ARRAY_LIST_STRIDE_IBM 103083
+#define GL_TEXTURE_COORD_ARRAY_LIST_STRIDE_IBM 103084
+#define GL_EDGE_FLAG_ARRAY_LIST_STRIDE_IBM 103085
+#define GL_FOG_COORDINATE_ARRAY_LIST_STRIDE_IBM 103086
+#define GL_SECONDARY_COLOR_ARRAY_LIST_STRIDE_IBM 103087
+#endif
+
+#ifndef GL_SGIX_subsample
+#define GL_PACK_SUBSAMPLE_RATE_SGIX 0x85A0
+#define GL_UNPACK_SUBSAMPLE_RATE_SGIX 0x85A1
+#define GL_PIXEL_SUBSAMPLE_4444_SGIX 0x85A2
+#define GL_PIXEL_SUBSAMPLE_2424_SGIX 0x85A3
+#define GL_PIXEL_SUBSAMPLE_4242_SGIX 0x85A4
+#endif
+
+#ifndef GL_SGIX_ycrcb_subsample
+#endif
+
+#ifndef GL_SGIX_ycrcba
+#define GL_YCRCB_SGIX 0x8318
+#define GL_YCRCBA_SGIX 0x8319
+#endif
+
+#ifndef GL_SGI_depth_pass_instrument
+#define GL_DEPTH_PASS_INSTRUMENT_SGIX 0x8310
+#define GL_DEPTH_PASS_INSTRUMENT_COUNTERS_SGIX 0x8311
+#define GL_DEPTH_PASS_INSTRUMENT_MAX_SGIX 0x8312
+#endif
+
+#ifndef GL_3DFX_texture_compression_FXT1
+#define GL_COMPRESSED_RGB_FXT1_3DFX 0x86B0
+#define GL_COMPRESSED_RGBA_FXT1_3DFX 0x86B1
+#endif
+
+#ifndef GL_3DFX_multisample
+#define GL_MULTISAMPLE_3DFX 0x86B2
+#define GL_SAMPLE_BUFFERS_3DFX 0x86B3
+#define GL_SAMPLES_3DFX 0x86B4
+#define GL_MULTISAMPLE_BIT_3DFX 0x20000000
+#endif
+
+#ifndef GL_3DFX_tbuffer
+#endif
+
+#ifndef GL_EXT_multisample
+#define GL_MULTISAMPLE_EXT 0x809D
+#define GL_SAMPLE_ALPHA_TO_MASK_EXT 0x809E
+#define GL_SAMPLE_ALPHA_TO_ONE_EXT 0x809F
+#define GL_SAMPLE_MASK_EXT 0x80A0
+#define GL_1PASS_EXT 0x80A1
+#define GL_2PASS_0_EXT 0x80A2
+#define GL_2PASS_1_EXT 0x80A3
+#define GL_4PASS_0_EXT 0x80A4
+#define GL_4PASS_1_EXT 0x80A5
+#define GL_4PASS_2_EXT 0x80A6
+#define GL_4PASS_3_EXT 0x80A7
+#define GL_SAMPLE_BUFFERS_EXT 0x80A8
+#define GL_SAMPLES_EXT 0x80A9
+#define GL_SAMPLE_MASK_VALUE_EXT 0x80AA
+#define GL_SAMPLE_MASK_INVERT_EXT 0x80AB
+#define GL_SAMPLE_PATTERN_EXT 0x80AC
+#define GL_MULTISAMPLE_BIT_EXT 0x20000000
+#endif
+
+#ifndef GL_SGIX_vertex_preclip
+#define GL_VERTEX_PRECLIP_SGIX 0x83EE
+#define GL_VERTEX_PRECLIP_HINT_SGIX 0x83EF
+#endif
+
+#ifndef GL_SGIX_convolution_accuracy
+#define GL_CONVOLUTION_HINT_SGIX 0x8316
+#endif
+
+#ifndef GL_SGIX_resample
+#define GL_PACK_RESAMPLE_SGIX 0x842C
+#define GL_UNPACK_RESAMPLE_SGIX 0x842D
+#define GL_RESAMPLE_REPLICATE_SGIX 0x842E
+#define GL_RESAMPLE_ZERO_FILL_SGIX 0x842F
+#define GL_RESAMPLE_DECIMATE_SGIX 0x8430
+#endif
+
+#ifndef GL_SGIS_point_line_texgen
+#define GL_EYE_DISTANCE_TO_POINT_SGIS 0x81F0
+#define GL_OBJECT_DISTANCE_TO_POINT_SGIS 0x81F1
+#define GL_EYE_DISTANCE_TO_LINE_SGIS 0x81F2
+#define GL_OBJECT_DISTANCE_TO_LINE_SGIS 0x81F3
+#define GL_EYE_POINT_SGIS 0x81F4
+#define GL_OBJECT_POINT_SGIS 0x81F5
+#define GL_EYE_LINE_SGIS 0x81F6
+#define GL_OBJECT_LINE_SGIS 0x81F7
+#endif
+
+#ifndef GL_SGIS_texture_color_mask
+#define GL_TEXTURE_COLOR_WRITEMASK_SGIS 0x81EF
+#endif
+
+#ifndef GL_EXT_texture_env_dot3
+#define GL_DOT3_RGB_EXT 0x8740
+#define GL_DOT3_RGBA_EXT 0x8741
+#endif
+
+#ifndef GL_ATI_texture_mirror_once
+#define GL_MIRROR_CLAMP_ATI 0x8742
+#define GL_MIRROR_CLAMP_TO_EDGE_ATI 0x8743
+#endif
+
+#ifndef GL_NV_fence
+#define GL_ALL_COMPLETED_NV 0x84F2
+#define GL_FENCE_STATUS_NV 0x84F3
+#define GL_FENCE_CONDITION_NV 0x84F4
+#endif
+
+#ifndef GL_IBM_texture_mirrored_repeat
+#define GL_MIRRORED_REPEAT_IBM 0x8370
+#endif
+
+#ifndef GL_NV_evaluators
+#define GL_EVAL_2D_NV 0x86C0
+#define GL_EVAL_TRIANGULAR_2D_NV 0x86C1
+#define GL_MAP_TESSELLATION_NV 0x86C2
+#define GL_MAP_ATTRIB_U_ORDER_NV 0x86C3
+#define GL_MAP_ATTRIB_V_ORDER_NV 0x86C4
+#define GL_EVAL_FRACTIONAL_TESSELLATION_NV 0x86C5
+#define GL_EVAL_VERTEX_ATTRIB0_NV 0x86C6
+#define GL_EVAL_VERTEX_ATTRIB1_NV 0x86C7
+#define GL_EVAL_VERTEX_ATTRIB2_NV 0x86C8
+#define GL_EVAL_VERTEX_ATTRIB3_NV 0x86C9
+#define GL_EVAL_VERTEX_ATTRIB4_NV 0x86CA
+#define GL_EVAL_VERTEX_ATTRIB5_NV 0x86CB
+#define GL_EVAL_VERTEX_ATTRIB6_NV 0x86CC
+#define GL_EVAL_VERTEX_ATTRIB7_NV 0x86CD
+#define GL_EVAL_VERTEX_ATTRIB8_NV 0x86CE
+#define GL_EVAL_VERTEX_ATTRIB9_NV 0x86CF
+#define GL_EVAL_VERTEX_ATTRIB10_NV 0x86D0
+#define GL_EVAL_VERTEX_ATTRIB11_NV 0x86D1
+#define GL_EVAL_VERTEX_ATTRIB12_NV 0x86D2
+#define GL_EVAL_VERTEX_ATTRIB13_NV 0x86D3
+#define GL_EVAL_VERTEX_ATTRIB14_NV 0x86D4
+#define GL_EVAL_VERTEX_ATTRIB15_NV 0x86D5
+#define GL_MAX_MAP_TESSELLATION_NV 0x86D6
+#define GL_MAX_RATIONAL_EVAL_ORDER_NV 0x86D7
+#endif
+
+#ifndef GL_NV_packed_depth_stencil
+#define GL_DEPTH_STENCIL_NV 0x84F9
+#define GL_UNSIGNED_INT_24_8_NV 0x84FA
+#endif
+
+#ifndef GL_NV_register_combiners2
+#define GL_PER_STAGE_CONSTANTS_NV 0x8535
+#endif
+
+#ifndef GL_NV_texture_compression_vtc
+#endif
+
+#ifndef GL_NV_texture_rectangle
+#define GL_TEXTURE_RECTANGLE_NV 0x84F5
+#define GL_TEXTURE_BINDING_RECTANGLE_NV 0x84F6
+#define GL_PROXY_TEXTURE_RECTANGLE_NV 0x84F7
+#define GL_MAX_RECTANGLE_TEXTURE_SIZE_NV 0x84F8
+#endif
+
+#ifndef GL_NV_texture_shader
+#define GL_OFFSET_TEXTURE_RECTANGLE_NV 0x864C
+#define GL_OFFSET_TEXTURE_RECTANGLE_SCALE_NV 0x864D
+#define GL_DOT_PRODUCT_TEXTURE_RECTANGLE_NV 0x864E
+#define GL_RGBA_UNSIGNED_DOT_PRODUCT_MAPPING_NV 0x86D9
+#define GL_UNSIGNED_INT_S8_S8_8_8_NV 0x86DA
+#define GL_UNSIGNED_INT_8_8_S8_S8_REV_NV 0x86DB
+#define GL_DSDT_MAG_INTENSITY_NV 0x86DC
+#define GL_SHADER_CONSISTENT_NV 0x86DD
+#define GL_TEXTURE_SHADER_NV 0x86DE
+#define GL_SHADER_OPERATION_NV 0x86DF
+#define GL_CULL_MODES_NV 0x86E0
+#define GL_OFFSET_TEXTURE_MATRIX_NV 0x86E1
+#define GL_OFFSET_TEXTURE_SCALE_NV 0x86E2
+#define GL_OFFSET_TEXTURE_BIAS_NV 0x86E3
+#define GL_OFFSET_TEXTURE_2D_MATRIX_NV GL_OFFSET_TEXTURE_MATRIX_NV
+#define GL_OFFSET_TEXTURE_2D_SCALE_NV GL_OFFSET_TEXTURE_SCALE_NV
+#define GL_OFFSET_TEXTURE_2D_BIAS_NV GL_OFFSET_TEXTURE_BIAS_NV
+#define GL_PREVIOUS_TEXTURE_INPUT_NV 0x86E4
+#define GL_CONST_EYE_NV 0x86E5
+#define GL_PASS_THROUGH_NV 0x86E6
+#define GL_CULL_FRAGMENT_NV 0x86E7
+#define GL_OFFSET_TEXTURE_2D_NV 0x86E8
+#define GL_DEPENDENT_AR_TEXTURE_2D_NV 0x86E9
+#define GL_DEPENDENT_GB_TEXTURE_2D_NV 0x86EA
+#define GL_DOT_PRODUCT_NV 0x86EC
+#define GL_DOT_PRODUCT_DEPTH_REPLACE_NV 0x86ED
+#define GL_DOT_PRODUCT_TEXTURE_2D_NV 0x86EE
+#define GL_DOT_PRODUCT_TEXTURE_CUBE_MAP_NV 0x86F0
+#define GL_DOT_PRODUCT_DIFFUSE_CUBE_MAP_NV 0x86F1
+#define GL_DOT_PRODUCT_REFLECT_CUBE_MAP_NV 0x86F2
+#define GL_DOT_PRODUCT_CONST_EYE_REFLECT_CUBE_MAP_NV 0x86F3
+#define GL_HILO_NV 0x86F4
+#define GL_DSDT_NV 0x86F5
+#define GL_DSDT_MAG_NV 0x86F6
+#define GL_DSDT_MAG_VIB_NV 0x86F7
+#define GL_HILO16_NV 0x86F8
+#define GL_SIGNED_HILO_NV 0x86F9
+#define GL_SIGNED_HILO16_NV 0x86FA
+#define GL_SIGNED_RGBA_NV 0x86FB
+#define GL_SIGNED_RGBA8_NV 0x86FC
+#define GL_SIGNED_RGB_NV 0x86FE
+#define GL_SIGNED_RGB8_NV 0x86FF
+#define GL_SIGNED_LUMINANCE_NV 0x8701
+#define GL_SIGNED_LUMINANCE8_NV 0x8702
+#define GL_SIGNED_LUMINANCE_ALPHA_NV 0x8703
+#define GL_SIGNED_LUMINANCE8_ALPHA8_NV 0x8704
+#define GL_SIGNED_ALPHA_NV 0x8705
+#define GL_SIGNED_ALPHA8_NV 0x8706
+#define GL_SIGNED_INTENSITY_NV 0x8707
+#define GL_SIGNED_INTENSITY8_NV 0x8708
+#define GL_DSDT8_NV 0x8709
+#define GL_DSDT8_MAG8_NV 0x870A
+#define GL_DSDT8_MAG8_INTENSITY8_NV 0x870B
+#define GL_SIGNED_RGB_UNSIGNED_ALPHA_NV 0x870C
+#define GL_SIGNED_RGB8_UNSIGNED_ALPHA8_NV 0x870D
+#define GL_HI_SCALE_NV 0x870E
+#define GL_LO_SCALE_NV 0x870F
+#define GL_DS_SCALE_NV 0x8710
+#define GL_DT_SCALE_NV 0x8711
+#define GL_MAGNITUDE_SCALE_NV 0x8712
+#define GL_VIBRANCE_SCALE_NV 0x8713
+#define GL_HI_BIAS_NV 0x8714
+#define GL_LO_BIAS_NV 0x8715
+#define GL_DS_BIAS_NV 0x8716
+#define GL_DT_BIAS_NV 0x8717
+#define GL_MAGNITUDE_BIAS_NV 0x8718
+#define GL_VIBRANCE_BIAS_NV 0x8719
+#define GL_TEXTURE_BORDER_VALUES_NV 0x871A
+#define GL_TEXTURE_HI_SIZE_NV 0x871B
+#define GL_TEXTURE_LO_SIZE_NV 0x871C
+#define GL_TEXTURE_DS_SIZE_NV 0x871D
+#define GL_TEXTURE_DT_SIZE_NV 0x871E
+#define GL_TEXTURE_MAG_SIZE_NV 0x871F
+#endif
+
+#ifndef GL_NV_texture_shader2
+#define GL_DOT_PRODUCT_TEXTURE_3D_NV 0x86EF
+#endif
+
+#ifndef GL_NV_vertex_array_range2
+#define GL_VERTEX_ARRAY_RANGE_WITHOUT_FLUSH_NV 0x8533
+#endif
+
+#ifndef GL_NV_vertex_program
+#define GL_VERTEX_PROGRAM_NV 0x8620
+#define GL_VERTEX_STATE_PROGRAM_NV 0x8621
+#define GL_ATTRIB_ARRAY_SIZE_NV 0x8623
+#define GL_ATTRIB_ARRAY_STRIDE_NV 0x8624
+#define GL_ATTRIB_ARRAY_TYPE_NV 0x8625
+#define GL_CURRENT_ATTRIB_NV 0x8626
+#define GL_PROGRAM_LENGTH_NV 0x8627
+#define GL_PROGRAM_STRING_NV 0x8628
+#define GL_MODELVIEW_PROJECTION_NV 0x8629
+#define GL_IDENTITY_NV 0x862A
+#define GL_INVERSE_NV 0x862B
+#define GL_TRANSPOSE_NV 0x862C
+#define GL_INVERSE_TRANSPOSE_NV 0x862D
+#define GL_MAX_TRACK_MATRIX_STACK_DEPTH_NV 0x862E
+#define GL_MAX_TRACK_MATRICES_NV 0x862F
+#define GL_MATRIX0_NV 0x8630
+#define GL_MATRIX1_NV 0x8631
+#define GL_MATRIX2_NV 0x8632
+#define GL_MATRIX3_NV 0x8633
+#define GL_MATRIX4_NV 0x8634
+#define GL_MATRIX5_NV 0x8635
+#define GL_MATRIX6_NV 0x8636
+#define GL_MATRIX7_NV 0x8637
+#define GL_CURRENT_MATRIX_STACK_DEPTH_NV 0x8640
+#define GL_CURRENT_MATRIX_NV 0x8641
+#define GL_VERTEX_PROGRAM_POINT_SIZE_NV 0x8642
+#define GL_VERTEX_PROGRAM_TWO_SIDE_NV 0x8643
+#define GL_PROGRAM_PARAMETER_NV 0x8644
+#define GL_ATTRIB_ARRAY_POINTER_NV 0x8645
+#define GL_PROGRAM_TARGET_NV 0x8646
+#define GL_PROGRAM_RESIDENT_NV 0x8647
+#define GL_TRACK_MATRIX_NV 0x8648
+#define GL_TRACK_MATRIX_TRANSFORM_NV 0x8649
+#define GL_VERTEX_PROGRAM_BINDING_NV 0x864A
+#define GL_PROGRAM_ERROR_POSITION_NV 0x864B
+#define GL_VERTEX_ATTRIB_ARRAY0_NV 0x8650
+#define GL_VERTEX_ATTRIB_ARRAY1_NV 0x8651
+#define GL_VERTEX_ATTRIB_ARRAY2_NV 0x8652
+#define GL_VERTEX_ATTRIB_ARRAY3_NV 0x8653
+#define GL_VERTEX_ATTRIB_ARRAY4_NV 0x8654
+#define GL_VERTEX_ATTRIB_ARRAY5_NV 0x8655
+#define GL_VERTEX_ATTRIB_ARRAY6_NV 0x8656
+#define GL_VERTEX_ATTRIB_ARRAY7_NV 0x8657
+#define GL_VERTEX_ATTRIB_ARRAY8_NV 0x8658
+#define GL_VERTEX_ATTRIB_ARRAY9_NV 0x8659
+#define GL_VERTEX_ATTRIB_ARRAY10_NV 0x865A
+#define GL_VERTEX_ATTRIB_ARRAY11_NV 0x865B
+#define GL_VERTEX_ATTRIB_ARRAY12_NV 0x865C
+#define GL_VERTEX_ATTRIB_ARRAY13_NV 0x865D
+#define GL_VERTEX_ATTRIB_ARRAY14_NV 0x865E
+#define GL_VERTEX_ATTRIB_ARRAY15_NV 0x865F
+#define GL_MAP1_VERTEX_ATTRIB0_4_NV 0x8660
+#define GL_MAP1_VERTEX_ATTRIB1_4_NV 0x8661
+#define GL_MAP1_VERTEX_ATTRIB2_4_NV 0x8662
+#define GL_MAP1_VERTEX_ATTRIB3_4_NV 0x8663
+#define GL_MAP1_VERTEX_ATTRIB4_4_NV 0x8664
+#define GL_MAP1_VERTEX_ATTRIB5_4_NV 0x8665
+#define GL_MAP1_VERTEX_ATTRIB6_4_NV 0x8666
+#define GL_MAP1_VERTEX_ATTRIB7_4_NV 0x8667
+#define GL_MAP1_VERTEX_ATTRIB8_4_NV 0x8668
+#define GL_MAP1_VERTEX_ATTRIB9_4_NV 0x8669
+#define GL_MAP1_VERTEX_ATTRIB10_4_NV 0x866A
+#define GL_MAP1_VERTEX_ATTRIB11_4_NV 0x866B
+#define GL_MAP1_VERTEX_ATTRIB12_4_NV 0x866C
+#define GL_MAP1_VERTEX_ATTRIB13_4_NV 0x866D
+#define GL_MAP1_VERTEX_ATTRIB14_4_NV 0x866E
+#define GL_MAP1_VERTEX_ATTRIB15_4_NV 0x866F
+#define GL_MAP2_VERTEX_ATTRIB0_4_NV 0x8670
+#define GL_MAP2_VERTEX_ATTRIB1_4_NV 0x8671
+#define GL_MAP2_VERTEX_ATTRIB2_4_NV 0x8672
+#define GL_MAP2_VERTEX_ATTRIB3_4_NV 0x8673
+#define GL_MAP2_VERTEX_ATTRIB4_4_NV 0x8674
+#define GL_MAP2_VERTEX_ATTRIB5_4_NV 0x8675
+#define GL_MAP2_VERTEX_ATTRIB6_4_NV 0x8676
+#define GL_MAP2_VERTEX_ATTRIB7_4_NV 0x8677
+#define GL_MAP2_VERTEX_ATTRIB8_4_NV 0x8678
+#define GL_MAP2_VERTEX_ATTRIB9_4_NV 0x8679
+#define GL_MAP2_VERTEX_ATTRIB10_4_NV 0x867A
+#define GL_MAP2_VERTEX_ATTRIB11_4_NV 0x867B
+#define GL_MAP2_VERTEX_ATTRIB12_4_NV 0x867C
+#define GL_MAP2_VERTEX_ATTRIB13_4_NV 0x867D
+#define GL_MAP2_VERTEX_ATTRIB14_4_NV 0x867E
+#define GL_MAP2_VERTEX_ATTRIB15_4_NV 0x867F
+#endif
+
+#ifndef GL_SGIX_texture_coordinate_clamp
+#define GL_TEXTURE_MAX_CLAMP_S_SGIX 0x8369
+#define GL_TEXTURE_MAX_CLAMP_T_SGIX 0x836A
+#define GL_TEXTURE_MAX_CLAMP_R_SGIX 0x836B
+#endif
+
+#ifndef GL_SGIX_scalebias_hint
+#define GL_SCALEBIAS_HINT_SGIX 0x8322
+#endif
+
+#ifndef GL_OML_interlace
+#define GL_INTERLACE_OML 0x8980
+#define GL_INTERLACE_READ_OML 0x8981
+#endif
+
+#ifndef GL_OML_subsample
+#define GL_FORMAT_SUBSAMPLE_24_24_OML 0x8982
+#define GL_FORMAT_SUBSAMPLE_244_244_OML 0x8983
+#endif
+
+#ifndef GL_OML_resample
+#define GL_PACK_RESAMPLE_OML 0x8984
+#define GL_UNPACK_RESAMPLE_OML 0x8985
+#define GL_RESAMPLE_REPLICATE_OML 0x8986
+#define GL_RESAMPLE_ZERO_FILL_OML 0x8987
+#define GL_RESAMPLE_AVERAGE_OML 0x8988
+#define GL_RESAMPLE_DECIMATE_OML 0x8989
+#endif
+
+#ifndef GL_NV_copy_depth_to_color
+#define GL_DEPTH_STENCIL_TO_RGBA_NV 0x886E
+#define GL_DEPTH_STENCIL_TO_BGRA_NV 0x886F
+#endif
+
+#ifndef GL_ATI_envmap_bumpmap
+#define GL_BUMP_ROT_MATRIX_ATI 0x8775
+#define GL_BUMP_ROT_MATRIX_SIZE_ATI 0x8776
+#define GL_BUMP_NUM_TEX_UNITS_ATI 0x8777
+#define GL_BUMP_TEX_UNITS_ATI 0x8778
+#define GL_DUDV_ATI 0x8779
+#define GL_DU8DV8_ATI 0x877A
+#define GL_BUMP_ENVMAP_ATI 0x877B
+#define GL_BUMP_TARGET_ATI 0x877C
+#endif
+
+#ifndef GL_ATI_fragment_shader
+#define GL_FRAGMENT_SHADER_ATI 0x8920
+#define GL_REG_0_ATI 0x8921
+#define GL_REG_1_ATI 0x8922
+#define GL_REG_2_ATI 0x8923
+#define GL_REG_3_ATI 0x8924
+#define GL_REG_4_ATI 0x8925
+#define GL_REG_5_ATI 0x8926
+#define GL_REG_6_ATI 0x8927
+#define GL_REG_7_ATI 0x8928
+#define GL_REG_8_ATI 0x8929
+#define GL_REG_9_ATI 0x892A
+#define GL_REG_10_ATI 0x892B
+#define GL_REG_11_ATI 0x892C
+#define GL_REG_12_ATI 0x892D
+#define GL_REG_13_ATI 0x892E
+#define GL_REG_14_ATI 0x892F
+#define GL_REG_15_ATI 0x8930
+#define GL_REG_16_ATI 0x8931
+#define GL_REG_17_ATI 0x8932
+#define GL_REG_18_ATI 0x8933
+#define GL_REG_19_ATI 0x8934
+#define GL_REG_20_ATI 0x8935
+#define GL_REG_21_ATI 0x8936
+#define GL_REG_22_ATI 0x8937
+#define GL_REG_23_ATI 0x8938
+#define GL_REG_24_ATI 0x8939
+#define GL_REG_25_ATI 0x893A
+#define GL_REG_26_ATI 0x893B
+#define GL_REG_27_ATI 0x893C
+#define GL_REG_28_ATI 0x893D
+#define GL_REG_29_ATI 0x893E
+#define GL_REG_30_ATI 0x893F
+#define GL_REG_31_ATI 0x8940
+#define GL_CON_0_ATI 0x8941
+#define GL_CON_1_ATI 0x8942
+#define GL_CON_2_ATI 0x8943
+#define GL_CON_3_ATI 0x8944
+#define GL_CON_4_ATI 0x8945
+#define GL_CON_5_ATI 0x8946
+#define GL_CON_6_ATI 0x8947
+#define GL_CON_7_ATI 0x8948
+#define GL_CON_8_ATI 0x8949
+#define GL_CON_9_ATI 0x894A
+#define GL_CON_10_ATI 0x894B
+#define GL_CON_11_ATI 0x894C
+#define GL_CON_12_ATI 0x894D
+#define GL_CON_13_ATI 0x894E
+#define GL_CON_14_ATI 0x894F
+#define GL_CON_15_ATI 0x8950
+#define GL_CON_16_ATI 0x8951
+#define GL_CON_17_ATI 0x8952
+#define GL_CON_18_ATI 0x8953
+#define GL_CON_19_ATI 0x8954
+#define GL_CON_20_ATI 0x8955
+#define GL_CON_21_ATI 0x8956
+#define GL_CON_22_ATI 0x8957
+#define GL_CON_23_ATI 0x8958
+#define GL_CON_24_ATI 0x8959
+#define GL_CON_25_ATI 0x895A
+#define GL_CON_26_ATI 0x895B
+#define GL_CON_27_ATI 0x895C
+#define GL_CON_28_ATI 0x895D
+#define GL_CON_29_ATI 0x895E
+#define GL_CON_30_ATI 0x895F
+#define GL_CON_31_ATI 0x8960
+#define GL_MOV_ATI 0x8961
+#define GL_ADD_ATI 0x8963
+#define GL_MUL_ATI 0x8964
+#define GL_SUB_ATI 0x8965
+#define GL_DOT3_ATI 0x8966
+#define GL_DOT4_ATI 0x8967
+#define GL_MAD_ATI 0x8968
+#define GL_LERP_ATI 0x8969
+#define GL_CND_ATI 0x896A
+#define GL_CND0_ATI 0x896B
+#define GL_DOT2_ADD_ATI 0x896C
+#define GL_SECONDARY_INTERPOLATOR_ATI 0x896D
+#define GL_NUM_FRAGMENT_REGISTERS_ATI 0x896E
+#define GL_NUM_FRAGMENT_CONSTANTS_ATI 0x896F
+#define GL_NUM_PASSES_ATI 0x8970
+#define GL_NUM_INSTRUCTIONS_PER_PASS_ATI 0x8971
+#define GL_NUM_INSTRUCTIONS_TOTAL_ATI 0x8972
+#define GL_NUM_INPUT_INTERPOLATOR_COMPONENTS_ATI 0x8973
+#define GL_NUM_LOOPBACK_COMPONENTS_ATI 0x8974
+#define GL_COLOR_ALPHA_PAIRING_ATI 0x8975
+#define GL_SWIZZLE_STR_ATI 0x8976
+#define GL_SWIZZLE_STQ_ATI 0x8977
+#define GL_SWIZZLE_STR_DR_ATI 0x8978
+#define GL_SWIZZLE_STQ_DQ_ATI 0x8979
+#define GL_SWIZZLE_STRQ_ATI 0x897A
+#define GL_SWIZZLE_STRQ_DQ_ATI 0x897B
+#define GL_RED_BIT_ATI 0x00000001
+#define GL_GREEN_BIT_ATI 0x00000002
+#define GL_BLUE_BIT_ATI 0x00000004
+#define GL_2X_BIT_ATI 0x00000001
+#define GL_4X_BIT_ATI 0x00000002
+#define GL_8X_BIT_ATI 0x00000004
+#define GL_HALF_BIT_ATI 0x00000008
+#define GL_QUARTER_BIT_ATI 0x00000010
+#define GL_EIGHTH_BIT_ATI 0x00000020
+#define GL_SATURATE_BIT_ATI 0x00000040
+#define GL_COMP_BIT_ATI 0x00000002
+#define GL_NEGATE_BIT_ATI 0x00000004
+#define GL_BIAS_BIT_ATI 0x00000008
+#endif
+
+#ifndef GL_ATI_pn_triangles
+#define GL_PN_TRIANGLES_ATI 0x87F0
+#define GL_MAX_PN_TRIANGLES_TESSELATION_LEVEL_ATI 0x87F1
+#define GL_PN_TRIANGLES_POINT_MODE_ATI 0x87F2
+#define GL_PN_TRIANGLES_NORMAL_MODE_ATI 0x87F3
+#define GL_PN_TRIANGLES_TESSELATION_LEVEL_ATI 0x87F4
+#define GL_PN_TRIANGLES_POINT_MODE_LINEAR_ATI 0x87F5
+#define GL_PN_TRIANGLES_POINT_MODE_CUBIC_ATI 0x87F6
+#define GL_PN_TRIANGLES_NORMAL_MODE_LINEAR_ATI 0x87F7
+#define GL_PN_TRIANGLES_NORMAL_MODE_QUADRATIC_ATI 0x87F8
+#endif
+
+#ifndef GL_ATI_vertex_array_object
+#define GL_STATIC_ATI 0x8760
+#define GL_DYNAMIC_ATI 0x8761
+#define GL_PRESERVE_ATI 0x8762
+#define GL_DISCARD_ATI 0x8763
+#define GL_OBJECT_BUFFER_SIZE_ATI 0x8764
+#define GL_OBJECT_BUFFER_USAGE_ATI 0x8765
+#define GL_ARRAY_OBJECT_BUFFER_ATI 0x8766
+#define GL_ARRAY_OBJECT_OFFSET_ATI 0x8767
+#endif
+
+#ifndef GL_EXT_vertex_shader
+#define GL_VERTEX_SHADER_EXT 0x8780
+#define GL_VERTEX_SHADER_BINDING_EXT 0x8781
+#define GL_OP_INDEX_EXT 0x8782
+#define GL_OP_NEGATE_EXT 0x8783
+#define GL_OP_DOT3_EXT 0x8784
+#define GL_OP_DOT4_EXT 0x8785
+#define GL_OP_MUL_EXT 0x8786
+#define GL_OP_ADD_EXT 0x8787
+#define GL_OP_MADD_EXT 0x8788
+#define GL_OP_FRAC_EXT 0x8789
+#define GL_OP_MAX_EXT 0x878A
+#define GL_OP_MIN_EXT 0x878B
+#define GL_OP_SET_GE_EXT 0x878C
+#define GL_OP_SET_LT_EXT 0x878D
+#define GL_OP_CLAMP_EXT 0x878E
+#define GL_OP_FLOOR_EXT 0x878F
+#define GL_OP_ROUND_EXT 0x8790
+#define GL_OP_EXP_BASE_2_EXT 0x8791
+#define GL_OP_LOG_BASE_2_EXT 0x8792
+#define GL_OP_POWER_EXT 0x8793
+#define GL_OP_RECIP_EXT 0x8794
+#define GL_OP_RECIP_SQRT_EXT 0x8795
+#define GL_OP_SUB_EXT 0x8796
+#define GL_OP_CROSS_PRODUCT_EXT 0x8797
+#define GL_OP_MULTIPLY_MATRIX_EXT 0x8798
+#define GL_OP_MOV_EXT 0x8799
+#define GL_OUTPUT_VERTEX_EXT 0x879A
+#define GL_OUTPUT_COLOR0_EXT 0x879B
+#define GL_OUTPUT_COLOR1_EXT 0x879C
+#define GL_OUTPUT_TEXTURE_COORD0_EXT 0x879D
+#define GL_OUTPUT_TEXTURE_COORD1_EXT 0x879E
+#define GL_OUTPUT_TEXTURE_COORD2_EXT 0x879F
+#define GL_OUTPUT_TEXTURE_COORD3_EXT 0x87A0
+#define GL_OUTPUT_TEXTURE_COORD4_EXT 0x87A1
+#define GL_OUTPUT_TEXTURE_COORD5_EXT 0x87A2
+#define GL_OUTPUT_TEXTURE_COORD6_EXT 0x87A3
+#define GL_OUTPUT_TEXTURE_COORD7_EXT 0x87A4
+#define GL_OUTPUT_TEXTURE_COORD8_EXT 0x87A5
+#define GL_OUTPUT_TEXTURE_COORD9_EXT 0x87A6
+#define GL_OUTPUT_TEXTURE_COORD10_EXT 0x87A7
+#define GL_OUTPUT_TEXTURE_COORD11_EXT 0x87A8
+#define GL_OUTPUT_TEXTURE_COORD12_EXT 0x87A9
+#define GL_OUTPUT_TEXTURE_COORD13_EXT 0x87AA
+#define GL_OUTPUT_TEXTURE_COORD14_EXT 0x87AB
+#define GL_OUTPUT_TEXTURE_COORD15_EXT 0x87AC
+#define GL_OUTPUT_TEXTURE_COORD16_EXT 0x87AD
+#define GL_OUTPUT_TEXTURE_COORD17_EXT 0x87AE
+#define GL_OUTPUT_TEXTURE_COORD18_EXT 0x87AF
+#define GL_OUTPUT_TEXTURE_COORD19_EXT 0x87B0
+#define GL_OUTPUT_TEXTURE_COORD20_EXT 0x87B1
+#define GL_OUTPUT_TEXTURE_COORD21_EXT 0x87B2
+#define GL_OUTPUT_TEXTURE_COORD22_EXT 0x87B3
+#define GL_OUTPUT_TEXTURE_COORD23_EXT 0x87B4
+#define GL_OUTPUT_TEXTURE_COORD24_EXT 0x87B5
+#define GL_OUTPUT_TEXTURE_COORD25_EXT 0x87B6
+#define GL_OUTPUT_TEXTURE_COORD26_EXT 0x87B7
+#define GL_OUTPUT_TEXTURE_COORD27_EXT 0x87B8
+#define GL_OUTPUT_TEXTURE_COORD28_EXT 0x87B9
+#define GL_OUTPUT_TEXTURE_COORD29_EXT 0x87BA
+#define GL_OUTPUT_TEXTURE_COORD30_EXT 0x87BB
+#define GL_OUTPUT_TEXTURE_COORD31_EXT 0x87BC
+#define GL_OUTPUT_FOG_EXT 0x87BD
+#define GL_SCALAR_EXT 0x87BE
+#define GL_VECTOR_EXT 0x87BF
+#define GL_MATRIX_EXT 0x87C0
+#define GL_VARIANT_EXT 0x87C1
+#define GL_INVARIANT_EXT 0x87C2
+#define GL_LOCAL_CONSTANT_EXT 0x87C3
+#define GL_LOCAL_EXT 0x87C4
+#define GL_MAX_VERTEX_SHADER_INSTRUCTIONS_EXT 0x87C5
+#define GL_MAX_VERTEX_SHADER_VARIANTS_EXT 0x87C6
+#define GL_MAX_VERTEX_SHADER_INVARIANTS_EXT 0x87C7
+#define GL_MAX_VERTEX_SHADER_LOCAL_CONSTANTS_EXT 0x87C8
+#define GL_MAX_VERTEX_SHADER_LOCALS_EXT 0x87C9
+#define GL_MAX_OPTIMIZED_VERTEX_SHADER_INSTRUCTIONS_EXT 0x87CA
+#define GL_MAX_OPTIMIZED_VERTEX_SHADER_VARIANTS_EXT 0x87CB
+#define GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCAL_CONSTANTS_EXT 0x87CC
+#define GL_MAX_OPTIMIZED_VERTEX_SHADER_INVARIANTS_EXT 0x87CD
+#define GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCALS_EXT 0x87CE
+#define GL_VERTEX_SHADER_INSTRUCTIONS_EXT 0x87CF
+#define GL_VERTEX_SHADER_VARIANTS_EXT 0x87D0
+#define GL_VERTEX_SHADER_INVARIANTS_EXT 0x87D1
+#define GL_VERTEX_SHADER_LOCAL_CONSTANTS_EXT 0x87D2
+#define GL_VERTEX_SHADER_LOCALS_EXT 0x87D3
+#define GL_VERTEX_SHADER_OPTIMIZED_EXT 0x87D4
+#define GL_X_EXT 0x87D5
+#define GL_Y_EXT 0x87D6
+#define GL_Z_EXT 0x87D7
+#define GL_W_EXT 0x87D8
+#define GL_NEGATIVE_X_EXT 0x87D9
+#define GL_NEGATIVE_Y_EXT 0x87DA
+#define GL_NEGATIVE_Z_EXT 0x87DB
+#define GL_NEGATIVE_W_EXT 0x87DC
+#define GL_ZERO_EXT 0x87DD
+#define GL_ONE_EXT 0x87DE
+#define GL_NEGATIVE_ONE_EXT 0x87DF
+#define GL_NORMALIZED_RANGE_EXT 0x87E0
+#define GL_FULL_RANGE_EXT 0x87E1
+#define GL_CURRENT_VERTEX_EXT 0x87E2
+#define GL_MVP_MATRIX_EXT 0x87E3
+#define GL_VARIANT_VALUE_EXT 0x87E4
+#define GL_VARIANT_DATATYPE_EXT 0x87E5
+#define GL_VARIANT_ARRAY_STRIDE_EXT 0x87E6
+#define GL_VARIANT_ARRAY_TYPE_EXT 0x87E7
+#define GL_VARIANT_ARRAY_EXT 0x87E8
+#define GL_VARIANT_ARRAY_POINTER_EXT 0x87E9
+#define GL_INVARIANT_VALUE_EXT 0x87EA
+#define GL_INVARIANT_DATATYPE_EXT 0x87EB
+#define GL_LOCAL_CONSTANT_VALUE_EXT 0x87EC
+#define GL_LOCAL_CONSTANT_DATATYPE_EXT 0x87ED
+#endif
+
+#ifndef GL_ATI_vertex_streams
+#define GL_MAX_VERTEX_STREAMS_ATI 0x876B
+#define GL_VERTEX_STREAM0_ATI 0x876C
+#define GL_VERTEX_STREAM1_ATI 0x876D
+#define GL_VERTEX_STREAM2_ATI 0x876E
+#define GL_VERTEX_STREAM3_ATI 0x876F
+#define GL_VERTEX_STREAM4_ATI 0x8770
+#define GL_VERTEX_STREAM5_ATI 0x8771
+#define GL_VERTEX_STREAM6_ATI 0x8772
+#define GL_VERTEX_STREAM7_ATI 0x8773
+#define GL_VERTEX_SOURCE_ATI 0x8774
+#endif
+
+#ifndef GL_ATI_element_array
+#define GL_ELEMENT_ARRAY_ATI 0x8768
+#define GL_ELEMENT_ARRAY_TYPE_ATI 0x8769
+#define GL_ELEMENT_ARRAY_POINTER_ATI 0x876A
+#endif
+
+#ifndef GL_SUN_mesh_array
+#define GL_QUAD_MESH_SUN 0x8614
+#define GL_TRIANGLE_MESH_SUN 0x8615
+#endif
+
+#ifndef GL_SUN_slice_accum
+#define GL_SLICE_ACCUM_SUN 0x85CC
+#endif
+
+#ifndef GL_NV_multisample_filter_hint
+#define GL_MULTISAMPLE_FILTER_HINT_NV 0x8534
+#endif
+
+#ifndef GL_NV_depth_clamp
+#define GL_DEPTH_CLAMP_NV 0x864F
+#endif
+
+#ifndef GL_NV_occlusion_query
+#define GL_PIXEL_COUNTER_BITS_NV 0x8864
+#define GL_CURRENT_OCCLUSION_QUERY_ID_NV 0x8865
+#define GL_PIXEL_COUNT_NV 0x8866
+#define GL_PIXEL_COUNT_AVAILABLE_NV 0x8867
+#endif
+
+#ifndef GL_NV_point_sprite
+#define GL_POINT_SPRITE_NV 0x8861
+#define GL_COORD_REPLACE_NV 0x8862
+#define GL_POINT_SPRITE_R_MODE_NV 0x8863
+#endif
+
+#ifndef GL_NV_texture_shader3
+#define GL_OFFSET_PROJECTIVE_TEXTURE_2D_NV 0x8850
+#define GL_OFFSET_PROJECTIVE_TEXTURE_2D_SCALE_NV 0x8851
+#define GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_NV 0x8852
+#define GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_SCALE_NV 0x8853
+#define GL_OFFSET_HILO_TEXTURE_2D_NV 0x8854
+#define GL_OFFSET_HILO_TEXTURE_RECTANGLE_NV 0x8855
+#define GL_OFFSET_HILO_PROJECTIVE_TEXTURE_2D_NV 0x8856
+#define GL_OFFSET_HILO_PROJECTIVE_TEXTURE_RECTANGLE_NV 0x8857
+#define GL_DEPENDENT_HILO_TEXTURE_2D_NV 0x8858
+#define GL_DEPENDENT_RGB_TEXTURE_3D_NV 0x8859
+#define GL_DEPENDENT_RGB_TEXTURE_CUBE_MAP_NV 0x885A
+#define GL_DOT_PRODUCT_PASS_THROUGH_NV 0x885B
+#define GL_DOT_PRODUCT_TEXTURE_1D_NV 0x885C
+#define GL_DOT_PRODUCT_AFFINE_DEPTH_REPLACE_NV 0x885D
+#define GL_HILO8_NV 0x885E
+#define GL_SIGNED_HILO8_NV 0x885F
+#define GL_FORCE_BLUE_TO_ONE_NV 0x8860
+#endif
+
+#ifndef GL_NV_vertex_program1_1
+#endif
+
+#ifndef GL_EXT_shadow_funcs
+#endif
+
+#ifndef GL_EXT_stencil_two_side
+#define GL_STENCIL_TEST_TWO_SIDE_EXT 0x8910
+#define GL_ACTIVE_STENCIL_FACE_EXT 0x8911
+#endif
+
+#ifndef GL_ATI_text_fragment_shader
+#define GL_TEXT_FRAGMENT_SHADER_ATI 0x8200
+#endif
+
+#ifndef GL_APPLE_client_storage
+#define GL_UNPACK_CLIENT_STORAGE_APPLE 0x85B2
+#endif
+
+#ifndef GL_APPLE_element_array
+#define GL_ELEMENT_ARRAY_APPLE 0x8768
+#define GL_ELEMENT_ARRAY_TYPE_APPLE 0x8769
+#define GL_ELEMENT_ARRAY_POINTER_APPLE 0x876A
+#endif
+
+#ifndef GL_APPLE_fence
+#define GL_DRAW_PIXELS_APPLE 0x8A0A
+#define GL_FENCE_APPLE 0x8A0B
+#endif
+
+#ifndef GL_APPLE_vertex_array_object
+#define GL_VERTEX_ARRAY_BINDING_APPLE 0x85B5
+#endif
+
+#ifndef GL_APPLE_vertex_array_range
+#define GL_VERTEX_ARRAY_RANGE_APPLE 0x851D
+#define GL_VERTEX_ARRAY_RANGE_LENGTH_APPLE 0x851E
+#define GL_VERTEX_ARRAY_STORAGE_HINT_APPLE 0x851F
+#define GL_VERTEX_ARRAY_RANGE_POINTER_APPLE 0x8521
+#define GL_STORAGE_CACHED_APPLE 0x85BE
+#define GL_STORAGE_SHARED_APPLE 0x85BF
+#endif
+
+#ifndef GL_APPLE_ycbcr_422
+#define GL_YCBCR_422_APPLE 0x85B9
+#define GL_UNSIGNED_SHORT_8_8_APPLE 0x85BA
+#define GL_UNSIGNED_SHORT_8_8_REV_APPLE 0x85BB
+#endif
+
+#ifndef GL_S3_s3tc
+#define GL_RGB_S3TC 0x83A0
+#define GL_RGB4_S3TC 0x83A1
+#define GL_RGBA_S3TC 0x83A2
+#define GL_RGBA4_S3TC 0x83A3
+#endif
+
+#ifndef GL_ATI_draw_buffers
+#define GL_MAX_DRAW_BUFFERS_ATI 0x8824
+#define GL_DRAW_BUFFER0_ATI 0x8825
+#define GL_DRAW_BUFFER1_ATI 0x8826
+#define GL_DRAW_BUFFER2_ATI 0x8827
+#define GL_DRAW_BUFFER3_ATI 0x8828
+#define GL_DRAW_BUFFER4_ATI 0x8829
+#define GL_DRAW_BUFFER5_ATI 0x882A
+#define GL_DRAW_BUFFER6_ATI 0x882B
+#define GL_DRAW_BUFFER7_ATI 0x882C
+#define GL_DRAW_BUFFER8_ATI 0x882D
+#define GL_DRAW_BUFFER9_ATI 0x882E
+#define GL_DRAW_BUFFER10_ATI 0x882F
+#define GL_DRAW_BUFFER11_ATI 0x8830
+#define GL_DRAW_BUFFER12_ATI 0x8831
+#define GL_DRAW_BUFFER13_ATI 0x8832
+#define GL_DRAW_BUFFER14_ATI 0x8833
+#define GL_DRAW_BUFFER15_ATI 0x8834
+#endif
+
+#ifndef GL_ATI_pixel_format_float
+#define GL_TYPE_RGBA_FLOAT_ATI 0x8820
+#define GL_COLOR_CLEAR_UNCLAMPED_VALUE_ATI 0x8835
+#endif
+
+#ifndef GL_ATI_texture_env_combine3
+#define GL_MODULATE_ADD_ATI 0x8744
+#define GL_MODULATE_SIGNED_ADD_ATI 0x8745
+#define GL_MODULATE_SUBTRACT_ATI 0x8746
+#endif
+
+#ifndef GL_ATI_texture_float
+#define GL_RGBA_FLOAT32_ATI 0x8814
+#define GL_RGB_FLOAT32_ATI 0x8815
+#define GL_ALPHA_FLOAT32_ATI 0x8816
+#define GL_INTENSITY_FLOAT32_ATI 0x8817
+#define GL_LUMINANCE_FLOAT32_ATI 0x8818
+#define GL_LUMINANCE_ALPHA_FLOAT32_ATI 0x8819
+#define GL_RGBA_FLOAT16_ATI 0x881A
+#define GL_RGB_FLOAT16_ATI 0x881B
+#define GL_ALPHA_FLOAT16_ATI 0x881C
+#define GL_INTENSITY_FLOAT16_ATI 0x881D
+#define GL_LUMINANCE_FLOAT16_ATI 0x881E
+#define GL_LUMINANCE_ALPHA_FLOAT16_ATI 0x881F
+#endif
+
+#ifndef GL_NV_float_buffer
+#define GL_FLOAT_R_NV 0x8880
+#define GL_FLOAT_RG_NV 0x8881
+#define GL_FLOAT_RGB_NV 0x8882
+#define GL_FLOAT_RGBA_NV 0x8883
+#define GL_FLOAT_R16_NV 0x8884
+#define GL_FLOAT_R32_NV 0x8885
+#define GL_FLOAT_RG16_NV 0x8886
+#define GL_FLOAT_RG32_NV 0x8887
+#define GL_FLOAT_RGB16_NV 0x8888
+#define GL_FLOAT_RGB32_NV 0x8889
+#define GL_FLOAT_RGBA16_NV 0x888A
+#define GL_FLOAT_RGBA32_NV 0x888B
+#define GL_TEXTURE_FLOAT_COMPONENTS_NV 0x888C
+#define GL_FLOAT_CLEAR_COLOR_VALUE_NV 0x888D
+#define GL_FLOAT_RGBA_MODE_NV 0x888E
+#endif
+
+#ifndef GL_NV_fragment_program
+#define GL_MAX_FRAGMENT_PROGRAM_LOCAL_PARAMETERS_NV 0x8868
+#define GL_FRAGMENT_PROGRAM_NV 0x8870
+#define GL_MAX_TEXTURE_COORDS_NV 0x8871
+#define GL_MAX_TEXTURE_IMAGE_UNITS_NV 0x8872
+#define GL_FRAGMENT_PROGRAM_BINDING_NV 0x8873
+#define GL_PROGRAM_ERROR_STRING_NV 0x8874
+#endif
+
+#ifndef GL_NV_half_float
+#define GL_HALF_FLOAT_NV 0x140B
+#endif
+
+#ifndef GL_NV_pixel_data_range
+#define GL_WRITE_PIXEL_DATA_RANGE_NV 0x8878
+#define GL_READ_PIXEL_DATA_RANGE_NV 0x8879
+#define GL_WRITE_PIXEL_DATA_RANGE_LENGTH_NV 0x887A
+#define GL_READ_PIXEL_DATA_RANGE_LENGTH_NV 0x887B
+#define GL_WRITE_PIXEL_DATA_RANGE_POINTER_NV 0x887C
+#define GL_READ_PIXEL_DATA_RANGE_POINTER_NV 0x887D
+#endif
+
+#ifndef GL_NV_primitive_restart
+#define GL_PRIMITIVE_RESTART_NV 0x8558
+#define GL_PRIMITIVE_RESTART_INDEX_NV 0x8559
+#endif
+
+#ifndef GL_NV_texture_expand_normal
+#define GL_TEXTURE_UNSIGNED_REMAP_MODE_NV 0x888F
+#endif
+
+#ifndef GL_NV_vertex_program2
+#endif
+
+#ifndef GL_ATI_map_object_buffer
+#endif
+
+#ifndef GL_ATI_separate_stencil
+#define GL_STENCIL_BACK_FUNC_ATI 0x8800
+#define GL_STENCIL_BACK_FAIL_ATI 0x8801
+#define GL_STENCIL_BACK_PASS_DEPTH_FAIL_ATI 0x8802
+#define GL_STENCIL_BACK_PASS_DEPTH_PASS_ATI 0x8803
+#endif
+
+#ifndef GL_ATI_vertex_attrib_array_object
+#endif
+
+#ifndef GL_OES_read_format
+#define GL_IMPLEMENTATION_COLOR_READ_TYPE_OES 0x8B9A
+#define GL_IMPLEMENTATION_COLOR_READ_FORMAT_OES 0x8B9B
+#endif
+
+#ifndef GL_EXT_depth_bounds_test
+#define GL_DEPTH_BOUNDS_TEST_EXT 0x8890
+#define GL_DEPTH_BOUNDS_EXT 0x8891
+#endif
+
+#ifndef GL_EXT_texture_mirror_clamp
+#define GL_MIRROR_CLAMP_EXT 0x8742
+#define GL_MIRROR_CLAMP_TO_EDGE_EXT 0x8743
+#define GL_MIRROR_CLAMP_TO_BORDER_EXT 0x8912
+#endif
+
+#ifndef GL_EXT_blend_equation_separate
+#define GL_BLEND_EQUATION_RGB_EXT GL_BLEND_EQUATION
+#define GL_BLEND_EQUATION_ALPHA_EXT 0x883D
+#endif
+
+#ifndef GL_MESA_pack_invert
+#define GL_PACK_INVERT_MESA 0x8758
+#endif
+
+#ifndef GL_MESA_ycbcr_texture
+#define GL_UNSIGNED_SHORT_8_8_MESA 0x85BA
+#define GL_UNSIGNED_SHORT_8_8_REV_MESA 0x85BB
+#define GL_YCBCR_MESA 0x8757
+#endif
+
+#ifndef GL_EXT_pixel_buffer_object
+#define GL_PIXEL_PACK_BUFFER_EXT 0x88EB
+#define GL_PIXEL_UNPACK_BUFFER_EXT 0x88EC
+#define GL_PIXEL_PACK_BUFFER_BINDING_EXT 0x88ED
+#define GL_PIXEL_UNPACK_BUFFER_BINDING_EXT 0x88EF
+#endif
+
+#ifndef GL_NV_fragment_program_option
+#endif
+
+#ifndef GL_NV_fragment_program2
+#define GL_MAX_PROGRAM_EXEC_INSTRUCTIONS_NV 0x88F4
+#define GL_MAX_PROGRAM_CALL_DEPTH_NV 0x88F5
+#define GL_MAX_PROGRAM_IF_DEPTH_NV 0x88F6
+#define GL_MAX_PROGRAM_LOOP_DEPTH_NV 0x88F7
+#define GL_MAX_PROGRAM_LOOP_COUNT_NV 0x88F8
+#endif
+
+#ifndef GL_NV_vertex_program2_option
+/* reuse GL_MAX_PROGRAM_EXEC_INSTRUCTIONS_NV */
+/* reuse GL_MAX_PROGRAM_CALL_DEPTH_NV */
+#endif
+
+#ifndef GL_NV_vertex_program3
+/* reuse GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS_ARB */
+#endif
+
+#ifndef GL_EXT_framebuffer_object
+#define GL_INVALID_FRAMEBUFFER_OPERATION_EXT 0x0506
+#define GL_MAX_RENDERBUFFER_SIZE_EXT 0x84E8
+#define GL_FRAMEBUFFER_BINDING_EXT 0x8CA6
+#define GL_RENDERBUFFER_BINDING_EXT 0x8CA7
+#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE_EXT 0x8CD0
+#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME_EXT 0x8CD1
+#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL_EXT 0x8CD2
+#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE_EXT 0x8CD3
+#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_3D_ZOFFSET_EXT 0x8CD4
+#define GL_FRAMEBUFFER_COMPLETE_EXT 0x8CD5
+#define GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT_EXT 0x8CD6
+#define GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT_EXT 0x8CD7
+#define GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS_EXT 0x8CD9
+#define GL_FRAMEBUFFER_INCOMPLETE_FORMATS_EXT 0x8CDA
+#define GL_FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER_EXT 0x8CDB
+#define GL_FRAMEBUFFER_INCOMPLETE_READ_BUFFER_EXT 0x8CDC
+#define GL_FRAMEBUFFER_UNSUPPORTED_EXT 0x8CDD
+#define GL_MAX_COLOR_ATTACHMENTS_EXT 0x8CDF
+#define GL_COLOR_ATTACHMENT0_EXT 0x8CE0
+#define GL_COLOR_ATTACHMENT1_EXT 0x8CE1
+#define GL_COLOR_ATTACHMENT2_EXT 0x8CE2
+#define GL_COLOR_ATTACHMENT3_EXT 0x8CE3
+#define GL_COLOR_ATTACHMENT4_EXT 0x8CE4
+#define GL_COLOR_ATTACHMENT5_EXT 0x8CE5
+#define GL_COLOR_ATTACHMENT6_EXT 0x8CE6
+#define GL_COLOR_ATTACHMENT7_EXT 0x8CE7
+#define GL_COLOR_ATTACHMENT8_EXT 0x8CE8
+#define GL_COLOR_ATTACHMENT9_EXT 0x8CE9
+#define GL_COLOR_ATTACHMENT10_EXT 0x8CEA
+#define GL_COLOR_ATTACHMENT11_EXT 0x8CEB
+#define GL_COLOR_ATTACHMENT12_EXT 0x8CEC
+#define GL_COLOR_ATTACHMENT13_EXT 0x8CED
+#define GL_COLOR_ATTACHMENT14_EXT 0x8CEE
+#define GL_COLOR_ATTACHMENT15_EXT 0x8CEF
+#define GL_DEPTH_ATTACHMENT_EXT 0x8D00
+#define GL_STENCIL_ATTACHMENT_EXT 0x8D20
+#define GL_FRAMEBUFFER_EXT 0x8D40
+#define GL_RENDERBUFFER_EXT 0x8D41
+#define GL_RENDERBUFFER_WIDTH_EXT 0x8D42
+#define GL_RENDERBUFFER_HEIGHT_EXT 0x8D43
+#define GL_RENDERBUFFER_INTERNAL_FORMAT_EXT 0x8D44
+#define GL_STENCIL_INDEX1_EXT 0x8D46
+#define GL_STENCIL_INDEX4_EXT 0x8D47
+#define GL_STENCIL_INDEX8_EXT 0x8D48
+#define GL_STENCIL_INDEX16_EXT 0x8D49
+#define GL_RENDERBUFFER_RED_SIZE_EXT 0x8D50
+#define GL_RENDERBUFFER_GREEN_SIZE_EXT 0x8D51
+#define GL_RENDERBUFFER_BLUE_SIZE_EXT 0x8D52
+#define GL_RENDERBUFFER_ALPHA_SIZE_EXT 0x8D53
+#define GL_RENDERBUFFER_DEPTH_SIZE_EXT 0x8D54
+#define GL_RENDERBUFFER_STENCIL_SIZE_EXT 0x8D55
+#endif
+
+#ifndef GL_GREMEDY_string_marker
+#endif
+
+#ifndef GL_EXT_packed_depth_stencil
+#define GL_DEPTH_STENCIL_EXT 0x84F9
+#define GL_UNSIGNED_INT_24_8_EXT 0x84FA
+#define GL_DEPTH24_STENCIL8_EXT 0x88F0
+#define GL_TEXTURE_STENCIL_SIZE_EXT 0x88F1
+#endif
+
+#ifndef GL_EXT_stencil_clear_tag
+#define GL_STENCIL_TAG_BITS_EXT 0x88F2
+#define GL_STENCIL_CLEAR_TAG_VALUE_EXT 0x88F3
+#endif
+
+#ifndef GL_EXT_texture_sRGB
+#define GL_SRGB_EXT 0x8C40
+#define GL_SRGB8_EXT 0x8C41
+#define GL_SRGB_ALPHA_EXT 0x8C42
+#define GL_SRGB8_ALPHA8_EXT 0x8C43
+#define GL_SLUMINANCE_ALPHA_EXT 0x8C44
+#define GL_SLUMINANCE8_ALPHA8_EXT 0x8C45
+#define GL_SLUMINANCE_EXT 0x8C46
+#define GL_SLUMINANCE8_EXT 0x8C47
+#define GL_COMPRESSED_SRGB_EXT 0x8C48
+#define GL_COMPRESSED_SRGB_ALPHA_EXT 0x8C49
+#define GL_COMPRESSED_SLUMINANCE_EXT 0x8C4A
+#define GL_COMPRESSED_SLUMINANCE_ALPHA_EXT 0x8C4B
+#define GL_COMPRESSED_SRGB_S3TC_DXT1_EXT 0x8C4C
+#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT 0x8C4D
+#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT 0x8C4E
+#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT 0x8C4F
+#endif
+
+#ifndef GL_EXT_framebuffer_blit
+#define GL_READ_FRAMEBUFFER_EXT 0x8CA8
+#define GL_DRAW_FRAMEBUFFER_EXT 0x8CA9
+#define GL_READ_FRAMEBUFFER_BINDING_EXT GL_FRAMEBUFFER_BINDING_EXT
+#define GL_DRAW_FRAMEBUFFER_BINDING_EXT 0x8CAA
+#endif
+
+#ifndef GL_EXT_framebuffer_multisample
+#define GL_RENDERBUFFER_SAMPLES_EXT 0x8CAB
+#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_EXT 0x8D56
+#define GL_MAX_SAMPLES_EXT 0x8D57
+#endif
+
+#ifndef GL_MESAX_texture_stack
+#define GL_TEXTURE_1D_STACK_MESAX 0x8759
+#define GL_TEXTURE_2D_STACK_MESAX 0x875A
+#define GL_PROXY_TEXTURE_1D_STACK_MESAX 0x875B
+#define GL_PROXY_TEXTURE_2D_STACK_MESAX 0x875C
+#define GL_TEXTURE_1D_STACK_BINDING_MESAX 0x875D
+#define GL_TEXTURE_2D_STACK_BINDING_MESAX 0x875E
+#endif
+
+#ifndef GL_EXT_timer_query
+#define GL_TIME_ELAPSED_EXT 0x88BF
+#endif
+
+#ifndef GL_EXT_gpu_program_parameters
+#endif
+
+#ifndef GL_APPLE_flush_buffer_range
+#define GL_BUFFER_SERIALIZED_MODIFY_APPLE 0x8A12
+#define GL_BUFFER_FLUSHING_UNMAP_APPLE 0x8A13
+#endif
+
+#ifndef GL_NV_gpu_program4
+#define GL_MIN_PROGRAM_TEXEL_OFFSET_NV 0x8904
+#define GL_MAX_PROGRAM_TEXEL_OFFSET_NV 0x8905
+#define GL_PROGRAM_ATTRIB_COMPONENTS_NV 0x8906
+#define GL_PROGRAM_RESULT_COMPONENTS_NV 0x8907
+#define GL_MAX_PROGRAM_ATTRIB_COMPONENTS_NV 0x8908
+#define GL_MAX_PROGRAM_RESULT_COMPONENTS_NV 0x8909
+#define GL_MAX_PROGRAM_GENERIC_ATTRIBS_NV 0x8DA5
+#define GL_MAX_PROGRAM_GENERIC_RESULTS_NV 0x8DA6
+#endif
+
+#ifndef GL_NV_geometry_program4
+#define GL_LINES_ADJACENCY_EXT 0x000A
+#define GL_LINE_STRIP_ADJACENCY_EXT 0x000B
+#define GL_TRIANGLES_ADJACENCY_EXT 0x000C
+#define GL_TRIANGLE_STRIP_ADJACENCY_EXT 0x000D
+#define GL_GEOMETRY_PROGRAM_NV 0x8C26
+#define GL_MAX_PROGRAM_OUTPUT_VERTICES_NV 0x8C27
+#define GL_MAX_PROGRAM_TOTAL_OUTPUT_COMPONENTS_NV 0x8C28
+#define GL_GEOMETRY_VERTICES_OUT_EXT 0x8DDA
+#define GL_GEOMETRY_INPUT_TYPE_EXT 0x8DDB
+#define GL_GEOMETRY_OUTPUT_TYPE_EXT 0x8DDC
+#define GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS_EXT 0x8C29
+#define GL_FRAMEBUFFER_ATTACHMENT_LAYERED_EXT 0x8DA7
+#define GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS_EXT 0x8DA8
+#define GL_FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_EXT 0x8DA9
+#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER_EXT 0x8CD4
+#define GL_PROGRAM_POINT_SIZE_EXT 0x8642
+#endif
+
+#ifndef GL_EXT_geometry_shader4
+#define GL_GEOMETRY_SHADER_EXT 0x8DD9
+/* reuse GL_GEOMETRY_VERTICES_OUT_EXT */
+/* reuse GL_GEOMETRY_INPUT_TYPE_EXT */
+/* reuse GL_GEOMETRY_OUTPUT_TYPE_EXT */
+/* reuse GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS_EXT */
+#define GL_MAX_GEOMETRY_VARYING_COMPONENTS_EXT 0x8DDD
+#define GL_MAX_VERTEX_VARYING_COMPONENTS_EXT 0x8DDE
+#define GL_MAX_VARYING_COMPONENTS_EXT 0x8B4B
+#define GL_MAX_GEOMETRY_UNIFORM_COMPONENTS_EXT 0x8DDF
+#define GL_MAX_GEOMETRY_OUTPUT_VERTICES_EXT 0x8DE0
+#define GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS_EXT 0x8DE1
+/* reuse GL_LINES_ADJACENCY_EXT */
+/* reuse GL_LINE_STRIP_ADJACENCY_EXT */
+/* reuse GL_TRIANGLES_ADJACENCY_EXT */
+/* reuse GL_TRIANGLE_STRIP_ADJACENCY_EXT */
+/* reuse GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS_EXT */
+/* reuse GL_FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_EXT */
+/* reuse GL_FRAMEBUFFER_ATTACHMENT_LAYERED_EXT */
+/* reuse GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER_EXT */
+/* reuse GL_PROGRAM_POINT_SIZE_EXT */
+#endif
+
+#ifndef GL_NV_vertex_program4
+#define GL_VERTEX_ATTRIB_ARRAY_INTEGER_NV 0x88FD
+#endif
+
+#ifndef GL_EXT_gpu_shader4
+#define GL_SAMPLER_1D_ARRAY_EXT 0x8DC0
+#define GL_SAMPLER_2D_ARRAY_EXT 0x8DC1
+#define GL_SAMPLER_BUFFER_EXT 0x8DC2
+#define GL_SAMPLER_1D_ARRAY_SHADOW_EXT 0x8DC3
+#define GL_SAMPLER_2D_ARRAY_SHADOW_EXT 0x8DC4
+#define GL_SAMPLER_CUBE_SHADOW_EXT 0x8DC5
+#define GL_UNSIGNED_INT_VEC2_EXT 0x8DC6
+#define GL_UNSIGNED_INT_VEC3_EXT 0x8DC7
+#define GL_UNSIGNED_INT_VEC4_EXT 0x8DC8
+#define GL_INT_SAMPLER_1D_EXT 0x8DC9
+#define GL_INT_SAMPLER_2D_EXT 0x8DCA
+#define GL_INT_SAMPLER_3D_EXT 0x8DCB
+#define GL_INT_SAMPLER_CUBE_EXT 0x8DCC
+#define GL_INT_SAMPLER_2D_RECT_EXT 0x8DCD
+#define GL_INT_SAMPLER_1D_ARRAY_EXT 0x8DCE
+#define GL_INT_SAMPLER_2D_ARRAY_EXT 0x8DCF
+#define GL_INT_SAMPLER_BUFFER_EXT 0x8DD0
+#define GL_UNSIGNED_INT_SAMPLER_1D_EXT 0x8DD1
+#define GL_UNSIGNED_INT_SAMPLER_2D_EXT 0x8DD2
+#define GL_UNSIGNED_INT_SAMPLER_3D_EXT 0x8DD3
+#define GL_UNSIGNED_INT_SAMPLER_CUBE_EXT 0x8DD4
+#define GL_UNSIGNED_INT_SAMPLER_2D_RECT_EXT 0x8DD5
+#define GL_UNSIGNED_INT_SAMPLER_1D_ARRAY_EXT 0x8DD6
+#define GL_UNSIGNED_INT_SAMPLER_2D_ARRAY_EXT 0x8DD7
+#define GL_UNSIGNED_INT_SAMPLER_BUFFER_EXT 0x8DD8
+#endif
+
+#ifndef GL_EXT_draw_instanced
+#endif
+
+#ifndef GL_EXT_packed_float
+#define GL_R11F_G11F_B10F_EXT 0x8C3A
+#define GL_UNSIGNED_INT_10F_11F_11F_REV_EXT 0x8C3B
+#define GL_RGBA_SIGNED_COMPONENTS_EXT 0x8C3C
+#endif
+
+#ifndef GL_EXT_texture_array
+#define GL_TEXTURE_1D_ARRAY_EXT 0x8C18
+#define GL_PROXY_TEXTURE_1D_ARRAY_EXT 0x8C19
+#define GL_TEXTURE_2D_ARRAY_EXT 0x8C1A
+#define GL_PROXY_TEXTURE_2D_ARRAY_EXT 0x8C1B
+#define GL_TEXTURE_BINDING_1D_ARRAY_EXT 0x8C1C
+#define GL_TEXTURE_BINDING_2D_ARRAY_EXT 0x8C1D
+#define GL_MAX_ARRAY_TEXTURE_LAYERS_EXT 0x88FF
+#define GL_COMPARE_REF_DEPTH_TO_TEXTURE_EXT 0x884E
+/* reuse GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER_EXT */
+#endif
+
+#ifndef GL_EXT_texture_buffer_object
+#define GL_TEXTURE_BUFFER_EXT 0x8C2A
+#define GL_MAX_TEXTURE_BUFFER_SIZE_EXT 0x8C2B
+#define GL_TEXTURE_BINDING_BUFFER_EXT 0x8C2C
+#define GL_TEXTURE_BUFFER_DATA_STORE_BINDING_EXT 0x8C2D
+#define GL_TEXTURE_BUFFER_FORMAT_EXT 0x8C2E
+#endif
+
+#ifndef GL_EXT_texture_compression_latc
+#define GL_COMPRESSED_LUMINANCE_LATC1_EXT 0x8C70
+#define GL_COMPRESSED_SIGNED_LUMINANCE_LATC1_EXT 0x8C71
+#define GL_COMPRESSED_LUMINANCE_ALPHA_LATC2_EXT 0x8C72
+#define GL_COMPRESSED_SIGNED_LUMINANCE_ALPHA_LATC2_EXT 0x8C73
+#endif
+
+#ifndef GL_EXT_texture_compression_rgtc
+#define GL_COMPRESSED_RED_RGTC1_EXT 0x8DBB
+#define GL_COMPRESSED_SIGNED_RED_RGTC1_EXT 0x8DBC
+#define GL_COMPRESSED_RED_GREEN_RGTC2_EXT 0x8DBD
+#define GL_COMPRESSED_SIGNED_RED_GREEN_RGTC2_EXT 0x8DBE
+#endif
+
+#ifndef GL_EXT_texture_shared_exponent
+#define GL_RGB9_E5_EXT 0x8C3D
+#define GL_UNSIGNED_INT_5_9_9_9_REV_EXT 0x8C3E
+#define GL_TEXTURE_SHARED_SIZE_EXT 0x8C3F
+#endif
+
+#ifndef GL_NV_depth_buffer_float
+#define GL_DEPTH_COMPONENT32F_NV 0x8DAB
+#define GL_DEPTH32F_STENCIL8_NV 0x8DAC
+#define GL_FLOAT_32_UNSIGNED_INT_24_8_REV_NV 0x8DAD
+#define GL_DEPTH_BUFFER_FLOAT_MODE_NV 0x8DAF
+#endif
+
+#ifndef GL_NV_fragment_program4
+#endif
+
+#ifndef GL_NV_framebuffer_multisample_coverage
+#define GL_RENDERBUFFER_COVERAGE_SAMPLES_NV 0x8CAB
+#define GL_RENDERBUFFER_COLOR_SAMPLES_NV 0x8E10
+#define GL_MAX_MULTISAMPLE_COVERAGE_MODES_NV 0x8E11
+#define GL_MULTISAMPLE_COVERAGE_MODES_NV 0x8E12
+#endif
+
+#ifndef GL_EXT_framebuffer_sRGB
+#define GL_FRAMEBUFFER_SRGB_EXT 0x8DB9
+#define GL_FRAMEBUFFER_SRGB_CAPABLE_EXT 0x8DBA
+#endif
+
+#ifndef GL_NV_geometry_shader4
+#endif
+
+#ifndef GL_NV_parameter_buffer_object
+#define GL_MAX_PROGRAM_PARAMETER_BUFFER_BINDINGS_NV 0x8DA0
+#define GL_MAX_PROGRAM_PARAMETER_BUFFER_SIZE_NV 0x8DA1
+#define GL_VERTEX_PROGRAM_PARAMETER_BUFFER_NV 0x8DA2
+#define GL_GEOMETRY_PROGRAM_PARAMETER_BUFFER_NV 0x8DA3
+#define GL_FRAGMENT_PROGRAM_PARAMETER_BUFFER_NV 0x8DA4
+#endif
+
+#ifndef GL_EXT_draw_buffers2
+#endif
+
+#ifndef GL_NV_transform_feedback
+#define GL_BACK_PRIMARY_COLOR_NV 0x8C77
+#define GL_BACK_SECONDARY_COLOR_NV 0x8C78
+#define GL_TEXTURE_COORD_NV 0x8C79
+#define GL_CLIP_DISTANCE_NV 0x8C7A
+#define GL_VERTEX_ID_NV 0x8C7B
+#define GL_PRIMITIVE_ID_NV 0x8C7C
+#define GL_GENERIC_ATTRIB_NV 0x8C7D
+#define GL_TRANSFORM_FEEDBACK_ATTRIBS_NV 0x8C7E
+#define GL_TRANSFORM_FEEDBACK_BUFFER_MODE_NV 0x8C7F
+#define GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS_NV 0x8C80
+#define GL_ACTIVE_VARYINGS_NV 0x8C81
+#define GL_ACTIVE_VARYING_MAX_LENGTH_NV 0x8C82
+#define GL_TRANSFORM_FEEDBACK_VARYINGS_NV 0x8C83
+#define GL_TRANSFORM_FEEDBACK_BUFFER_START_NV 0x8C84
+#define GL_TRANSFORM_FEEDBACK_BUFFER_SIZE_NV 0x8C85
+#define GL_TRANSFORM_FEEDBACK_RECORD_NV 0x8C86
+#define GL_PRIMITIVES_GENERATED_NV 0x8C87
+#define GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN_NV 0x8C88
+#define GL_RASTERIZER_DISCARD_NV 0x8C89
+#define GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_ATTRIBS_NV 0x8C8A
+#define GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS_NV 0x8C8B
+#define GL_INTERLEAVED_ATTRIBS_NV 0x8C8C
+#define GL_SEPARATE_ATTRIBS_NV 0x8C8D
+#define GL_TRANSFORM_FEEDBACK_BUFFER_NV 0x8C8E
+#define GL_TRANSFORM_FEEDBACK_BUFFER_BINDING_NV 0x8C8F
+#endif
+
+#ifndef GL_EXT_bindable_uniform
+#define GL_MAX_VERTEX_BINDABLE_UNIFORMS_EXT 0x8DE2
+#define GL_MAX_FRAGMENT_BINDABLE_UNIFORMS_EXT 0x8DE3
+#define GL_MAX_GEOMETRY_BINDABLE_UNIFORMS_EXT 0x8DE4
+#define GL_MAX_BINDABLE_UNIFORM_SIZE_EXT 0x8DED
+#define GL_UNIFORM_BUFFER_EXT 0x8DEE
+#define GL_UNIFORM_BUFFER_BINDING_EXT 0x8DEF
+#endif
+
+#ifndef GL_EXT_texture_integer
+#define GL_RGBA32UI_EXT 0x8D70
+#define GL_RGB32UI_EXT 0x8D71
+#define GL_ALPHA32UI_EXT 0x8D72
+#define GL_INTENSITY32UI_EXT 0x8D73
+#define GL_LUMINANCE32UI_EXT 0x8D74
+#define GL_LUMINANCE_ALPHA32UI_EXT 0x8D75
+#define GL_RGBA16UI_EXT 0x8D76
+#define GL_RGB16UI_EXT 0x8D77
+#define GL_ALPHA16UI_EXT 0x8D78
+#define GL_INTENSITY16UI_EXT 0x8D79
+#define GL_LUMINANCE16UI_EXT 0x8D7A
+#define GL_LUMINANCE_ALPHA16UI_EXT 0x8D7B
+#define GL_RGBA8UI_EXT 0x8D7C
+#define GL_RGB8UI_EXT 0x8D7D
+#define GL_ALPHA8UI_EXT 0x8D7E
+#define GL_INTENSITY8UI_EXT 0x8D7F
+#define GL_LUMINANCE8UI_EXT 0x8D80
+#define GL_LUMINANCE_ALPHA8UI_EXT 0x8D81
+#define GL_RGBA32I_EXT 0x8D82
+#define GL_RGB32I_EXT 0x8D83
+#define GL_ALPHA32I_EXT 0x8D84
+#define GL_INTENSITY32I_EXT 0x8D85
+#define GL_LUMINANCE32I_EXT 0x8D86
+#define GL_LUMINANCE_ALPHA32I_EXT 0x8D87
+#define GL_RGBA16I_EXT 0x8D88
+#define GL_RGB16I_EXT 0x8D89
+#define GL_ALPHA16I_EXT 0x8D8A
+#define GL_INTENSITY16I_EXT 0x8D8B
+#define GL_LUMINANCE16I_EXT 0x8D8C
+#define GL_LUMINANCE_ALPHA16I_EXT 0x8D8D
+#define GL_RGBA8I_EXT 0x8D8E
+#define GL_RGB8I_EXT 0x8D8F
+#define GL_ALPHA8I_EXT 0x8D90
+#define GL_INTENSITY8I_EXT 0x8D91
+#define GL_LUMINANCE8I_EXT 0x8D92
+#define GL_LUMINANCE_ALPHA8I_EXT 0x8D93
+#define GL_RED_INTEGER_EXT 0x8D94
+#define GL_GREEN_INTEGER_EXT 0x8D95
+#define GL_BLUE_INTEGER_EXT 0x8D96
+#define GL_ALPHA_INTEGER_EXT 0x8D97
+#define GL_RGB_INTEGER_EXT 0x8D98
+#define GL_RGBA_INTEGER_EXT 0x8D99
+#define GL_BGR_INTEGER_EXT 0x8D9A
+#define GL_BGRA_INTEGER_EXT 0x8D9B
+#define GL_LUMINANCE_INTEGER_EXT 0x8D9C
+#define GL_LUMINANCE_ALPHA_INTEGER_EXT 0x8D9D
+#define GL_RGBA_INTEGER_MODE_EXT 0x8D9E
+#endif
+
+
+/*************************************************************/
+
+#include <stddef.h>
+#ifndef GL_VERSION_2_0
+/* GL type for program/shader text */
+typedef char GLchar; /* native character */
+#endif
+
+#ifndef GL_VERSION_1_5
+/* GL types for handling large vertex buffer objects */
+typedef ptrdiff_t GLintptr;
+typedef ptrdiff_t GLsizeiptr;
+#endif
+
+#ifndef GL_ARB_vertex_buffer_object
+/* GL types for handling large vertex buffer objects */
+typedef ptrdiff_t GLintptrARB;
+typedef ptrdiff_t GLsizeiptrARB;
+#endif
+
+#ifndef GL_ARB_shader_objects
+/* GL types for handling shader object handles and program/shader text */
+typedef char GLcharARB; /* native character */
+typedef unsigned int GLhandleARB; /* shader object handle */
+#endif
+
+/* GL types for "half" precision (s10e5) float data in host memory */
+#ifndef GL_ARB_half_float_pixel
+typedef unsigned short GLhalfARB;
+#endif
+
+#ifndef GL_NV_half_float
+typedef unsigned short GLhalfNV;
+#endif
+
+#ifndef GLEXT_64_TYPES_DEFINED
+/* This code block is duplicated in glext.h, so must be protected */
+#define GLEXT_64_TYPES_DEFINED
+/* Define int32_t, int64_t, and uint64_t types for UST/MSC */
+/* (as used in the GL_EXT_timer_query extension). */
+#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+#include <inttypes.h>
+#elif defined(__sun__)
+#include <inttypes.h>
+#if defined(__STDC__)
+#if defined(__arch64__)
+typedef long int int64_t;
+typedef unsigned long int uint64_t;
+#else
+typedef long long int int64_t;
+typedef unsigned long long int uint64_t;
+#endif /* __arch64__ */
+#endif /* __STDC__ */
+#elif defined( __VMS )
+#include <inttypes.h>
+#elif defined(__SCO__) || defined(__USLC__)
+#include <stdint.h>
+#elif defined(__UNIXOS2__) || defined(__SOL64__)
+typedef long int int32_t;
+typedef long long int int64_t;
+typedef unsigned long long int uint64_t;
+#elif defined(_WIN32) && defined(__GNUC__)
+#include <stdint.h>
+#elif defined(_WIN32)
+typedef __int32 int32_t;
+typedef __int64 int64_t;
+typedef unsigned __int64 uint64_t;
+#else
+#include <inttypes.h> /* Fallback option */
+#endif
+#endif
+
+#ifndef GL_EXT_timer_query
+typedef int64_t GLint64EXT;
+typedef uint64_t GLuint64EXT;
+#endif
+
+#ifndef GL_VERSION_1_2
+#define GL_VERSION_1_2 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendColor (GLclampf, GLclampf, GLclampf, GLclampf);
+GLAPI void APIENTRY glBlendEquation (GLenum);
+GLAPI void APIENTRY glDrawRangeElements (GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *);
+GLAPI void APIENTRY glColorTable (GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glColorTableParameterfv (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glColorTableParameteriv (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glCopyColorTable (GLenum, GLenum, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glGetColorTable (GLenum, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetColorTableParameterfv (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetColorTableParameteriv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glColorSubTable (GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glCopyColorSubTable (GLenum, GLsizei, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glConvolutionFilter1D (GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glConvolutionFilter2D (GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glConvolutionParameterf (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glConvolutionParameterfv (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glConvolutionParameteri (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glConvolutionParameteriv (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glCopyConvolutionFilter1D (GLenum, GLenum, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glCopyConvolutionFilter2D (GLenum, GLenum, GLint, GLint, GLsizei, GLsizei);
+GLAPI void APIENTRY glGetConvolutionFilter (GLenum, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetConvolutionParameterfv (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetConvolutionParameteriv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetSeparableFilter (GLenum, GLenum, GLenum, GLvoid *, GLvoid *, GLvoid *);
+GLAPI void APIENTRY glSeparableFilter2D (GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *, const GLvoid *);
+GLAPI void APIENTRY glGetHistogram (GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetHistogramParameterfv (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetHistogramParameteriv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetMinmax (GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetMinmaxParameterfv (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetMinmaxParameteriv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glHistogram (GLenum, GLsizei, GLenum, GLboolean);
+GLAPI void APIENTRY glMinmax (GLenum, GLenum, GLboolean);
+GLAPI void APIENTRY glResetHistogram (GLenum);
+GLAPI void APIENTRY glResetMinmax (GLenum);
+GLAPI void APIENTRY glTexImage3D (GLenum, GLint, GLint, GLsizei, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glTexSubImage3D (GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glCopyTexSubImage3D (GLenum, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDCOLORPROC) (GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha);
+typedef void (APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode);
+typedef void (APIENTRYP PFNGLDRAWRANGEELEMENTSPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const GLvoid *indices);
+typedef void (APIENTRYP PFNGLCOLORTABLEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *table);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCOLORTABLEPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPROC) (GLenum target, GLenum format, GLenum type, GLvoid *table);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLCOLORSUBTABLEPROC) (GLenum target, GLsizei start, GLsizei count, GLenum format, GLenum type, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOPYCOLORSUBTABLEPROC) (GLenum target, GLsizei start, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER1DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER2DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIPROC) (GLenum target, GLenum pname, GLint params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER1DPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER2DPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONFILTERPROC) (GLenum target, GLenum format, GLenum type, GLvoid *image);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETSEPARABLEFILTERPROC) (GLenum target, GLenum format, GLenum type, GLvoid *row, GLvoid *column, GLvoid *span);
+typedef void (APIENTRYP PFNGLSEPARABLEFILTER2DPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *row, const GLvoid *column);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETMINMAXPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLHISTOGRAMPROC) (GLenum target, GLsizei width, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLMINMAXPROC) (GLenum target, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLRESETHISTOGRAMPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLRESETMINMAXPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLTEXIMAGE3DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLCOPYTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+#endif
+
+#ifndef GL_VERSION_1_3
+#define GL_VERSION_1_3 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glActiveTexture (GLenum);
+GLAPI void APIENTRY glClientActiveTexture (GLenum);
+GLAPI void APIENTRY glMultiTexCoord1d (GLenum, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord1dv (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord1f (GLenum, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord1fv (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord1i (GLenum, GLint);
+GLAPI void APIENTRY glMultiTexCoord1iv (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord1s (GLenum, GLshort);
+GLAPI void APIENTRY glMultiTexCoord1sv (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord2d (GLenum, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord2dv (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord2f (GLenum, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord2fv (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord2i (GLenum, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord2iv (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord2s (GLenum, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord2sv (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord3d (GLenum, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord3dv (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord3f (GLenum, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord3fv (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord3i (GLenum, GLint, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord3iv (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord3s (GLenum, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord3sv (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord4d (GLenum, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord4dv (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord4f (GLenum, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord4fv (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord4i (GLenum, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord4iv (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord4s (GLenum, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord4sv (GLenum, const GLshort *);
+GLAPI void APIENTRY glLoadTransposeMatrixf (const GLfloat *);
+GLAPI void APIENTRY glLoadTransposeMatrixd (const GLdouble *);
+GLAPI void APIENTRY glMultTransposeMatrixf (const GLfloat *);
+GLAPI void APIENTRY glMultTransposeMatrixd (const GLdouble *);
+GLAPI void APIENTRY glSampleCoverage (GLclampf, GLboolean);
+GLAPI void APIENTRY glCompressedTexImage3D (GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexImage2D (GLenum, GLint, GLenum, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexImage1D (GLenum, GLint, GLenum, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage3D (GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage2D (GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage1D (GLenum, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glGetCompressedTexImage (GLenum, GLint, GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLCLIENTACTIVETEXTUREPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DPROC) (GLenum target, GLdouble s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FPROC) (GLenum target, GLfloat s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IPROC) (GLenum target, GLint s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SPROC) (GLenum target, GLshort s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DPROC) (GLenum target, GLdouble s, GLdouble t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FPROC) (GLenum target, GLfloat s, GLfloat t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IPROC) (GLenum target, GLint s, GLint t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SPROC) (GLenum target, GLshort s, GLshort t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IPROC) (GLenum target, GLint s, GLint t, GLint r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SPROC) (GLenum target, GLshort s, GLshort t, GLshort r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DVPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FVPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IPROC) (GLenum target, GLint s, GLint t, GLint r, GLint q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IVPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SPROC) (GLenum target, GLshort s, GLshort t, GLshort r, GLshort q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SVPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXFPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXDPROC) (const GLdouble *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXFPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXDPROC) (const GLdouble *m);
+typedef void (APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLclampf value, GLboolean invert);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE1DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC) (GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLGETCOMPRESSEDTEXIMAGEPROC) (GLenum target, GLint level, GLvoid *img);
+#endif
+
+#ifndef GL_VERSION_1_4
+#define GL_VERSION_1_4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendFuncSeparate (GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glFogCoordf (GLfloat);
+GLAPI void APIENTRY glFogCoordfv (const GLfloat *);
+GLAPI void APIENTRY glFogCoordd (GLdouble);
+GLAPI void APIENTRY glFogCoorddv (const GLdouble *);
+GLAPI void APIENTRY glFogCoordPointer (GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glMultiDrawArrays (GLenum, GLint *, GLsizei *, GLsizei);
+GLAPI void APIENTRY glMultiDrawElements (GLenum, const GLsizei *, GLenum, const GLvoid* *, GLsizei);
+GLAPI void APIENTRY glPointParameterf (GLenum, GLfloat);
+GLAPI void APIENTRY glPointParameterfv (GLenum, const GLfloat *);
+GLAPI void APIENTRY glPointParameteri (GLenum, GLint);
+GLAPI void APIENTRY glPointParameteriv (GLenum, const GLint *);
+GLAPI void APIENTRY glSecondaryColor3b (GLbyte, GLbyte, GLbyte);
+GLAPI void APIENTRY glSecondaryColor3bv (const GLbyte *);
+GLAPI void APIENTRY glSecondaryColor3d (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glSecondaryColor3dv (const GLdouble *);
+GLAPI void APIENTRY glSecondaryColor3f (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glSecondaryColor3fv (const GLfloat *);
+GLAPI void APIENTRY glSecondaryColor3i (GLint, GLint, GLint);
+GLAPI void APIENTRY glSecondaryColor3iv (const GLint *);
+GLAPI void APIENTRY glSecondaryColor3s (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glSecondaryColor3sv (const GLshort *);
+GLAPI void APIENTRY glSecondaryColor3ub (GLubyte, GLubyte, GLubyte);
+GLAPI void APIENTRY glSecondaryColor3ubv (const GLubyte *);
+GLAPI void APIENTRY glSecondaryColor3ui (GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glSecondaryColor3uiv (const GLuint *);
+GLAPI void APIENTRY glSecondaryColor3us (GLushort, GLushort, GLushort);
+GLAPI void APIENTRY glSecondaryColor3usv (const GLushort *);
+GLAPI void APIENTRY glSecondaryColorPointer (GLint, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glWindowPos2d (GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos2dv (const GLdouble *);
+GLAPI void APIENTRY glWindowPos2f (GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos2fv (const GLfloat *);
+GLAPI void APIENTRY glWindowPos2i (GLint, GLint);
+GLAPI void APIENTRY glWindowPos2iv (const GLint *);
+GLAPI void APIENTRY glWindowPos2s (GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos2sv (const GLshort *);
+GLAPI void APIENTRY glWindowPos3d (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos3dv (const GLdouble *);
+GLAPI void APIENTRY glWindowPos3f (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos3fv (const GLfloat *);
+GLAPI void APIENTRY glWindowPos3i (GLint, GLint, GLint);
+GLAPI void APIENTRY glWindowPos3iv (const GLint *);
+GLAPI void APIENTRY glWindowPos3s (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos3sv (const GLshort *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDFUNCSEPARATEPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha);
+typedef void (APIENTRYP PFNGLFOGCOORDFPROC) (GLfloat coord);
+typedef void (APIENTRYP PFNGLFOGCOORDFVPROC) (const GLfloat *coord);
+typedef void (APIENTRYP PFNGLFOGCOORDDPROC) (GLdouble coord);
+typedef void (APIENTRYP PFNGLFOGCOORDDVPROC) (const GLdouble *coord);
+typedef void (APIENTRYP PFNGLFOGCOORDPOINTERPROC) (GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLMULTIDRAWARRAYSPROC) (GLenum mode, GLint *first, GLsizei *count, GLsizei primcount);
+typedef void (APIENTRYP PFNGLMULTIDRAWELEMENTSPROC) (GLenum mode, const GLsizei *count, GLenum type, const GLvoid* *indices, GLsizei primcount);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFVPROC) (GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERIPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERIVPROC) (GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3BPROC) (GLbyte red, GLbyte green, GLbyte blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3BVPROC) (const GLbyte *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3DPROC) (GLdouble red, GLdouble green, GLdouble blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3DVPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3FPROC) (GLfloat red, GLfloat green, GLfloat blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3FVPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3IPROC) (GLint red, GLint green, GLint blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3IVPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3SPROC) (GLshort red, GLshort green, GLshort blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3SVPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UBPROC) (GLubyte red, GLubyte green, GLubyte blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UBVPROC) (const GLubyte *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UIPROC) (GLuint red, GLuint green, GLuint blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UIVPROC) (const GLuint *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3USPROC) (GLushort red, GLushort green, GLushort blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3USVPROC) (const GLushort *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLORPOINTERPROC) (GLint size, GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLWINDOWPOS2DPROC) (GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2DVPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FPROC) (GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FVPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IPROC) (GLint x, GLint y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IVPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SPROC) (GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SVPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DPROC) (GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DVPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FPROC) (GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FVPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IPROC) (GLint x, GLint y, GLint z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IVPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SPROC) (GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SVPROC) (const GLshort *v);
+#endif
+
+#ifndef GL_VERSION_1_5
+#define GL_VERSION_1_5 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGenQueries (GLsizei, GLuint *);
+GLAPI void APIENTRY glDeleteQueries (GLsizei, const GLuint *);
+GLAPI GLboolean APIENTRY glIsQuery (GLuint);
+GLAPI void APIENTRY glBeginQuery (GLenum, GLuint);
+GLAPI void APIENTRY glEndQuery (GLenum);
+GLAPI void APIENTRY glGetQueryiv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetQueryObjectiv (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetQueryObjectuiv (GLuint, GLenum, GLuint *);
+GLAPI void APIENTRY glBindBuffer (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteBuffers (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenBuffers (GLsizei, GLuint *);
+GLAPI GLboolean APIENTRY glIsBuffer (GLuint);
+GLAPI void APIENTRY glBufferData (GLenum, GLsizeiptr, const GLvoid *, GLenum);
+GLAPI void APIENTRY glBufferSubData (GLenum, GLintptr, GLsizeiptr, const GLvoid *);
+GLAPI void APIENTRY glGetBufferSubData (GLenum, GLintptr, GLsizeiptr, GLvoid *);
+GLAPI GLvoid* APIENTRY glMapBuffer (GLenum, GLenum);
+GLAPI GLboolean APIENTRY glUnmapBuffer (GLenum);
+GLAPI void APIENTRY glGetBufferParameteriv (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetBufferPointerv (GLenum, GLenum, GLvoid* *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGENQUERIESPROC) (GLsizei n, GLuint *ids);
+typedef void (APIENTRYP PFNGLDELETEQUERIESPROC) (GLsizei n, const GLuint *ids);
+typedef GLboolean (APIENTRYP PFNGLISQUERYPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLBEGINQUERYPROC) (GLenum target, GLuint id);
+typedef void (APIENTRYP PFNGLENDQUERYPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLGETQUERYIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTIVPROC) (GLuint id, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTUIVPROC) (GLuint id, GLenum pname, GLuint *params);
+typedef void (APIENTRYP PFNGLBINDBUFFERPROC) (GLenum target, GLuint buffer);
+typedef void (APIENTRYP PFNGLDELETEBUFFERSPROC) (GLsizei n, const GLuint *buffers);
+typedef void (APIENTRYP PFNGLGENBUFFERSPROC) (GLsizei n, GLuint *buffers);
+typedef GLboolean (APIENTRYP PFNGLISBUFFERPROC) (GLuint buffer);
+typedef void (APIENTRYP PFNGLBUFFERDATAPROC) (GLenum target, GLsizeiptr size, const GLvoid *data, GLenum usage);
+typedef void (APIENTRYP PFNGLBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, const GLvoid *data);
+typedef void (APIENTRYP PFNGLGETBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, GLvoid *data);
+typedef GLvoid* (APIENTRYP PFNGLMAPBUFFERPROC) (GLenum target, GLenum access);
+typedef GLboolean (APIENTRYP PFNGLUNMAPBUFFERPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLGETBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETBUFFERPOINTERVPROC) (GLenum target, GLenum pname, GLvoid* *params);
+#endif
+
+#ifndef GL_VERSION_2_0
+#define GL_VERSION_2_0 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendEquationSeparate (GLenum, GLenum);
+GLAPI void APIENTRY glDrawBuffers (GLsizei, const GLenum *);
+GLAPI void APIENTRY glStencilOpSeparate (GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glStencilFuncSeparate (GLenum, GLenum, GLint, GLuint);
+GLAPI void APIENTRY glStencilMaskSeparate (GLenum, GLuint);
+GLAPI void APIENTRY glAttachShader (GLuint, GLuint);
+GLAPI void APIENTRY glBindAttribLocation (GLuint, GLuint, const GLchar *);
+GLAPI void APIENTRY glCompileShader (GLuint);
+GLAPI GLuint APIENTRY glCreateProgram (void);
+GLAPI GLuint APIENTRY glCreateShader (GLenum);
+GLAPI void APIENTRY glDeleteProgram (GLuint);
+GLAPI void APIENTRY glDeleteShader (GLuint);
+GLAPI void APIENTRY glDetachShader (GLuint, GLuint);
+GLAPI void APIENTRY glDisableVertexAttribArray (GLuint);
+GLAPI void APIENTRY glEnableVertexAttribArray (GLuint);
+GLAPI void APIENTRY glGetActiveAttrib (GLuint, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLchar *);
+GLAPI void APIENTRY glGetActiveUniform (GLuint, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLchar *);
+GLAPI void APIENTRY glGetAttachedShaders (GLuint, GLsizei, GLsizei *, GLuint *);
+GLAPI GLint APIENTRY glGetAttribLocation (GLuint, const GLchar *);
+GLAPI void APIENTRY glGetProgramiv (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetProgramInfoLog (GLuint, GLsizei, GLsizei *, GLchar *);
+GLAPI void APIENTRY glGetShaderiv (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetShaderInfoLog (GLuint, GLsizei, GLsizei *, GLchar *);
+GLAPI void APIENTRY glGetShaderSource (GLuint, GLsizei, GLsizei *, GLchar *);
+GLAPI GLint APIENTRY glGetUniformLocation (GLuint, const GLchar *);
+GLAPI void APIENTRY glGetUniformfv (GLuint, GLint, GLfloat *);
+GLAPI void APIENTRY glGetUniformiv (GLuint, GLint, GLint *);
+GLAPI void APIENTRY glGetVertexAttribdv (GLuint, GLenum, GLdouble *);
+GLAPI void APIENTRY glGetVertexAttribfv (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVertexAttribiv (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVertexAttribPointerv (GLuint, GLenum, GLvoid* *);
+GLAPI GLboolean APIENTRY glIsProgram (GLuint);
+GLAPI GLboolean APIENTRY glIsShader (GLuint);
+GLAPI void APIENTRY glLinkProgram (GLuint);
+GLAPI void APIENTRY glShaderSource (GLuint, GLsizei, const GLchar* *, const GLint *);
+GLAPI void APIENTRY glUseProgram (GLuint);
+GLAPI void APIENTRY glUniform1f (GLint, GLfloat);
+GLAPI void APIENTRY glUniform2f (GLint, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform3f (GLint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform4f (GLint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform1i (GLint, GLint);
+GLAPI void APIENTRY glUniform2i (GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform3i (GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform4i (GLint, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform1fv (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform2fv (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform3fv (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform4fv (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform1iv (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform2iv (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform3iv (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform4iv (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniformMatrix2fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix3fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix4fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glValidateProgram (GLuint);
+GLAPI void APIENTRY glVertexAttrib1d (GLuint, GLdouble);
+GLAPI void APIENTRY glVertexAttrib1dv (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib1f (GLuint, GLfloat);
+GLAPI void APIENTRY glVertexAttrib1fv (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib1s (GLuint, GLshort);
+GLAPI void APIENTRY glVertexAttrib1sv (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib2d (GLuint, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib2dv (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib2f (GLuint, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib2fv (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib2s (GLuint, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib2sv (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib3d (GLuint, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib3dv (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib3f (GLuint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib3fv (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib3s (GLuint, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib3sv (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4Nbv (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVertexAttrib4Niv (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttrib4Nsv (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4Nub (GLuint, GLubyte, GLubyte, GLubyte, GLubyte);
+GLAPI void APIENTRY glVertexAttrib4Nubv (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttrib4Nuiv (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttrib4Nusv (GLuint, const GLushort *);
+GLAPI void APIENTRY glVertexAttrib4bv (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVertexAttrib4d (GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib4dv (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib4f (GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib4fv (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib4iv (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttrib4s (GLuint, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib4sv (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4ubv (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttrib4uiv (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttrib4usv (GLuint, const GLushort *);
+GLAPI void APIENTRY glVertexAttribPointer (GLuint, GLint, GLenum, GLboolean, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDEQUATIONSEPARATEPROC) (GLenum modeRGB, GLenum modeAlpha);
+typedef void (APIENTRYP PFNGLDRAWBUFFERSPROC) (GLsizei n, const GLenum *bufs);
+typedef void (APIENTRYP PFNGLSTENCILOPSEPARATEPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass);
+typedef void (APIENTRYP PFNGLSTENCILFUNCSEPARATEPROC) (GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask);
+typedef void (APIENTRYP PFNGLSTENCILMASKSEPARATEPROC) (GLenum face, GLuint mask);
+typedef void (APIENTRYP PFNGLATTACHSHADERPROC) (GLuint program, GLuint shader);
+typedef void (APIENTRYP PFNGLBINDATTRIBLOCATIONPROC) (GLuint program, GLuint index, const GLchar *name);
+typedef void (APIENTRYP PFNGLCOMPILESHADERPROC) (GLuint shader);
+typedef GLuint (APIENTRYP PFNGLCREATEPROGRAMPROC) (void);
+typedef GLuint (APIENTRYP PFNGLCREATESHADERPROC) (GLenum type);
+typedef void (APIENTRYP PFNGLDELETEPROGRAMPROC) (GLuint program);
+typedef void (APIENTRYP PFNGLDELETESHADERPROC) (GLuint shader);
+typedef void (APIENTRYP PFNGLDETACHSHADERPROC) (GLuint program, GLuint shader);
+typedef void (APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYPROC) (GLuint index);
+typedef void (APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYPROC) (GLuint index);
+typedef void (APIENTRYP PFNGLGETACTIVEATTRIBPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name);
+typedef void (APIENTRYP PFNGLGETACTIVEUNIFORMPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name);
+typedef void (APIENTRYP PFNGLGETATTACHEDSHADERSPROC) (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *obj);
+typedef GLint (APIENTRYP PFNGLGETATTRIBLOCATIONPROC) (GLuint program, const GLchar *name);
+typedef void (APIENTRYP PFNGLGETPROGRAMIVPROC) (GLuint program, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMINFOLOGPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog);
+typedef void (APIENTRYP PFNGLGETSHADERIVPROC) (GLuint shader, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETSHADERINFOLOGPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog);
+typedef void (APIENTRYP PFNGLGETSHADERSOURCEPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source);
+typedef GLint (APIENTRYP PFNGLGETUNIFORMLOCATIONPROC) (GLuint program, const GLchar *name);
+typedef void (APIENTRYP PFNGLGETUNIFORMFVPROC) (GLuint program, GLint location, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETUNIFORMIVPROC) (GLuint program, GLint location, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBDVPROC) (GLuint index, GLenum pname, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBFVPROC) (GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBIVPROC) (GLuint index, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVPROC) (GLuint index, GLenum pname, GLvoid* *pointer);
+typedef GLboolean (APIENTRYP PFNGLISPROGRAMPROC) (GLuint program);
+typedef GLboolean (APIENTRYP PFNGLISSHADERPROC) (GLuint shader);
+typedef void (APIENTRYP PFNGLLINKPROGRAMPROC) (GLuint program);
+typedef void (APIENTRYP PFNGLSHADERSOURCEPROC) (GLuint shader, GLsizei count, const GLchar* *string, const GLint *length);
+typedef void (APIENTRYP PFNGLUSEPROGRAMPROC) (GLuint program);
+typedef void (APIENTRYP PFNGLUNIFORM1FPROC) (GLint location, GLfloat v0);
+typedef void (APIENTRYP PFNGLUNIFORM2FPROC) (GLint location, GLfloat v0, GLfloat v1);
+typedef void (APIENTRYP PFNGLUNIFORM3FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2);
+typedef void (APIENTRYP PFNGLUNIFORM4FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3);
+typedef void (APIENTRYP PFNGLUNIFORM1IPROC) (GLint location, GLint v0);
+typedef void (APIENTRYP PFNGLUNIFORM2IPROC) (GLint location, GLint v0, GLint v1);
+typedef void (APIENTRYP PFNGLUNIFORM3IPROC) (GLint location, GLint v0, GLint v1, GLint v2);
+typedef void (APIENTRYP PFNGLUNIFORM4IPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3);
+typedef void (APIENTRYP PFNGLUNIFORM1FVPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM2FVPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM3FVPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM4FVPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM1IVPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM2IVPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM3IVPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM4IVPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLVALIDATEPROGRAMPROC) (GLuint program);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DPROC) (GLuint index, GLdouble x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FPROC) (GLuint index, GLfloat x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SPROC) (GLuint index, GLshort x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DPROC) (GLuint index, GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FPROC) (GLuint index, GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SPROC) (GLuint index, GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SPROC) (GLuint index, GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NBVPROC) (GLuint index, const GLbyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NIVPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NSVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUBPROC) (GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUBVPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUIVPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUSVPROC) (GLuint index, const GLushort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4BVPROC) (GLuint index, const GLbyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4IVPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SPROC) (GLuint index, GLshort x, GLshort y, GLshort z, GLshort w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UBVPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UIVPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4USVPROC) (GLuint index, const GLushort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBPOINTERPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_VERSION_2_1
+#define GL_VERSION_2_1 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glUniformMatrix2x3fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix3x2fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix2x4fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix4x2fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix3x4fv (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix4x3fv (GLint, GLsizei, GLboolean, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX2X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX3X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX2X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX4X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX3X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX4X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+#endif
+
+#ifndef GL_ARB_multitexture
+#define GL_ARB_multitexture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glActiveTextureARB (GLenum);
+GLAPI void APIENTRY glClientActiveTextureARB (GLenum);
+GLAPI void APIENTRY glMultiTexCoord1dARB (GLenum, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord1dvARB (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord1fARB (GLenum, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord1fvARB (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord1iARB (GLenum, GLint);
+GLAPI void APIENTRY glMultiTexCoord1ivARB (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord1sARB (GLenum, GLshort);
+GLAPI void APIENTRY glMultiTexCoord1svARB (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord2dARB (GLenum, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord2dvARB (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord2fARB (GLenum, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord2fvARB (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord2iARB (GLenum, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord2ivARB (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord2sARB (GLenum, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord2svARB (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord3dARB (GLenum, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord3dvARB (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord3fARB (GLenum, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord3fvARB (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord3iARB (GLenum, GLint, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord3ivARB (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord3sARB (GLenum, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord3svARB (GLenum, const GLshort *);
+GLAPI void APIENTRY glMultiTexCoord4dARB (GLenum, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glMultiTexCoord4dvARB (GLenum, const GLdouble *);
+GLAPI void APIENTRY glMultiTexCoord4fARB (GLenum, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glMultiTexCoord4fvARB (GLenum, const GLfloat *);
+GLAPI void APIENTRY glMultiTexCoord4iARB (GLenum, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glMultiTexCoord4ivARB (GLenum, const GLint *);
+GLAPI void APIENTRY glMultiTexCoord4sARB (GLenum, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glMultiTexCoord4svARB (GLenum, const GLshort *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLACTIVETEXTUREARBPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLCLIENTACTIVETEXTUREARBPROC) (GLenum texture);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DARBPROC) (GLenum target, GLdouble s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FARBPROC) (GLenum target, GLfloat s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IARBPROC) (GLenum target, GLint s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SARBPROC) (GLenum target, GLshort s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DARBPROC) (GLenum target, GLdouble s, GLdouble t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FARBPROC) (GLenum target, GLfloat s, GLfloat t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IARBPROC) (GLenum target, GLint s, GLint t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SARBPROC) (GLenum target, GLshort s, GLshort t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DARBPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FARBPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IARBPROC) (GLenum target, GLint s, GLint t, GLint r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SARBPROC) (GLenum target, GLshort s, GLshort t, GLshort r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3SVARBPROC) (GLenum target, const GLshort *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DARBPROC) (GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4DVARBPROC) (GLenum target, const GLdouble *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FARBPROC) (GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4FVARBPROC) (GLenum target, const GLfloat *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IARBPROC) (GLenum target, GLint s, GLint t, GLint r, GLint q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4IVARBPROC) (GLenum target, const GLint *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SARBPROC) (GLenum target, GLshort s, GLshort t, GLshort r, GLshort q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4SVARBPROC) (GLenum target, const GLshort *v);
+#endif
+
+#ifndef GL_ARB_transpose_matrix
+#define GL_ARB_transpose_matrix 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glLoadTransposeMatrixfARB (const GLfloat *);
+GLAPI void APIENTRY glLoadTransposeMatrixdARB (const GLdouble *);
+GLAPI void APIENTRY glMultTransposeMatrixfARB (const GLfloat *);
+GLAPI void APIENTRY glMultTransposeMatrixdARB (const GLdouble *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXFARBPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLLOADTRANSPOSEMATRIXDARBPROC) (const GLdouble *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXFARBPROC) (const GLfloat *m);
+typedef void (APIENTRYP PFNGLMULTTRANSPOSEMATRIXDARBPROC) (const GLdouble *m);
+#endif
+
+#ifndef GL_ARB_multisample
+#define GL_ARB_multisample 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSampleCoverageARB (GLclampf, GLboolean);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSAMPLECOVERAGEARBPROC) (GLclampf value, GLboolean invert);
+#endif
+
+#ifndef GL_ARB_texture_env_add
+#define GL_ARB_texture_env_add 1
+#endif
+
+#ifndef GL_ARB_texture_cube_map
+#define GL_ARB_texture_cube_map 1
+#endif
+
+#ifndef GL_ARB_texture_compression
+#define GL_ARB_texture_compression 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCompressedTexImage3DARB (GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexImage2DARB (GLenum, GLint, GLenum, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexImage1DARB (GLenum, GLint, GLenum, GLsizei, GLint, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage3DARB (GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage2DARB (GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glCompressedTexSubImage1DARB (GLenum, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glGetCompressedTexImageARB (GLenum, GLint, GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DARBPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DARBPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXIMAGE1DARBPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLint border, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DARBPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DARBPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE1DARBPROC) (GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data);
+typedef void (APIENTRYP PFNGLGETCOMPRESSEDTEXIMAGEARBPROC) (GLenum target, GLint level, GLvoid *img);
+#endif
+
+#ifndef GL_ARB_texture_border_clamp
+#define GL_ARB_texture_border_clamp 1
+#endif
+
+#ifndef GL_ARB_point_parameters
+#define GL_ARB_point_parameters 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPointParameterfARB (GLenum, GLfloat);
+GLAPI void APIENTRY glPointParameterfvARB (GLenum, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFARBPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFVARBPROC) (GLenum pname, const GLfloat *params);
+#endif
+
+#ifndef GL_ARB_vertex_blend
+#define GL_ARB_vertex_blend 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glWeightbvARB (GLint, const GLbyte *);
+GLAPI void APIENTRY glWeightsvARB (GLint, const GLshort *);
+GLAPI void APIENTRY glWeightivARB (GLint, const GLint *);
+GLAPI void APIENTRY glWeightfvARB (GLint, const GLfloat *);
+GLAPI void APIENTRY glWeightdvARB (GLint, const GLdouble *);
+GLAPI void APIENTRY glWeightubvARB (GLint, const GLubyte *);
+GLAPI void APIENTRY glWeightusvARB (GLint, const GLushort *);
+GLAPI void APIENTRY glWeightuivARB (GLint, const GLuint *);
+GLAPI void APIENTRY glWeightPointerARB (GLint, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glVertexBlendARB (GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLWEIGHTBVARBPROC) (GLint size, const GLbyte *weights);
+typedef void (APIENTRYP PFNGLWEIGHTSVARBPROC) (GLint size, const GLshort *weights);
+typedef void (APIENTRYP PFNGLWEIGHTIVARBPROC) (GLint size, const GLint *weights);
+typedef void (APIENTRYP PFNGLWEIGHTFVARBPROC) (GLint size, const GLfloat *weights);
+typedef void (APIENTRYP PFNGLWEIGHTDVARBPROC) (GLint size, const GLdouble *weights);
+typedef void (APIENTRYP PFNGLWEIGHTUBVARBPROC) (GLint size, const GLubyte *weights);
+typedef void (APIENTRYP PFNGLWEIGHTUSVARBPROC) (GLint size, const GLushort *weights);
+typedef void (APIENTRYP PFNGLWEIGHTUIVARBPROC) (GLint size, const GLuint *weights);
+typedef void (APIENTRYP PFNGLWEIGHTPOINTERARBPROC) (GLint size, GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLVERTEXBLENDARBPROC) (GLint count);
+#endif
+
+#ifndef GL_ARB_matrix_palette
+#define GL_ARB_matrix_palette 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCurrentPaletteMatrixARB (GLint);
+GLAPI void APIENTRY glMatrixIndexubvARB (GLint, const GLubyte *);
+GLAPI void APIENTRY glMatrixIndexusvARB (GLint, const GLushort *);
+GLAPI void APIENTRY glMatrixIndexuivARB (GLint, const GLuint *);
+GLAPI void APIENTRY glMatrixIndexPointerARB (GLint, GLenum, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCURRENTPALETTEMATRIXARBPROC) (GLint index);
+typedef void (APIENTRYP PFNGLMATRIXINDEXUBVARBPROC) (GLint size, const GLubyte *indices);
+typedef void (APIENTRYP PFNGLMATRIXINDEXUSVARBPROC) (GLint size, const GLushort *indices);
+typedef void (APIENTRYP PFNGLMATRIXINDEXUIVARBPROC) (GLint size, const GLuint *indices);
+typedef void (APIENTRYP PFNGLMATRIXINDEXPOINTERARBPROC) (GLint size, GLenum type, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_ARB_texture_env_combine
+#define GL_ARB_texture_env_combine 1
+#endif
+
+#ifndef GL_ARB_texture_env_crossbar
+#define GL_ARB_texture_env_crossbar 1
+#endif
+
+#ifndef GL_ARB_texture_env_dot3
+#define GL_ARB_texture_env_dot3 1
+#endif
+
+#ifndef GL_ARB_texture_mirrored_repeat
+#define GL_ARB_texture_mirrored_repeat 1
+#endif
+
+#ifndef GL_ARB_depth_texture
+#define GL_ARB_depth_texture 1
+#endif
+
+#ifndef GL_ARB_shadow
+#define GL_ARB_shadow 1
+#endif
+
+#ifndef GL_ARB_shadow_ambient
+#define GL_ARB_shadow_ambient 1
+#endif
+
+#ifndef GL_ARB_window_pos
+#define GL_ARB_window_pos 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glWindowPos2dARB (GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos2dvARB (const GLdouble *);
+GLAPI void APIENTRY glWindowPos2fARB (GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos2fvARB (const GLfloat *);
+GLAPI void APIENTRY glWindowPos2iARB (GLint, GLint);
+GLAPI void APIENTRY glWindowPos2ivARB (const GLint *);
+GLAPI void APIENTRY glWindowPos2sARB (GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos2svARB (const GLshort *);
+GLAPI void APIENTRY glWindowPos3dARB (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos3dvARB (const GLdouble *);
+GLAPI void APIENTRY glWindowPos3fARB (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos3fvARB (const GLfloat *);
+GLAPI void APIENTRY glWindowPos3iARB (GLint, GLint, GLint);
+GLAPI void APIENTRY glWindowPos3ivARB (const GLint *);
+GLAPI void APIENTRY glWindowPos3sARB (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos3svARB (const GLshort *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLWINDOWPOS2DARBPROC) (GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2DVARBPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FARBPROC) (GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FVARBPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IARBPROC) (GLint x, GLint y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IVARBPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SARBPROC) (GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SVARBPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DARBPROC) (GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DVARBPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FARBPROC) (GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FVARBPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IARBPROC) (GLint x, GLint y, GLint z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IVARBPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SARBPROC) (GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SVARBPROC) (const GLshort *v);
+#endif
+
+#ifndef GL_ARB_vertex_program
+#define GL_ARB_vertex_program 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexAttrib1dARB (GLuint, GLdouble);
+GLAPI void APIENTRY glVertexAttrib1dvARB (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib1fARB (GLuint, GLfloat);
+GLAPI void APIENTRY glVertexAttrib1fvARB (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib1sARB (GLuint, GLshort);
+GLAPI void APIENTRY glVertexAttrib1svARB (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib2dARB (GLuint, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib2dvARB (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib2fARB (GLuint, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib2fvARB (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib2sARB (GLuint, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib2svARB (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib3dARB (GLuint, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib3dvARB (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib3fARB (GLuint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib3fvARB (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib3sARB (GLuint, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib3svARB (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4NbvARB (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVertexAttrib4NivARB (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttrib4NsvARB (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4NubARB (GLuint, GLubyte, GLubyte, GLubyte, GLubyte);
+GLAPI void APIENTRY glVertexAttrib4NubvARB (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttrib4NuivARB (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttrib4NusvARB (GLuint, const GLushort *);
+GLAPI void APIENTRY glVertexAttrib4bvARB (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVertexAttrib4dARB (GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib4dvARB (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib4fARB (GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib4fvARB (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib4ivARB (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttrib4sARB (GLuint, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib4svARB (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4ubvARB (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttrib4uivARB (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttrib4usvARB (GLuint, const GLushort *);
+GLAPI void APIENTRY glVertexAttribPointerARB (GLuint, GLint, GLenum, GLboolean, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glEnableVertexAttribArrayARB (GLuint);
+GLAPI void APIENTRY glDisableVertexAttribArrayARB (GLuint);
+GLAPI void APIENTRY glProgramStringARB (GLenum, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glBindProgramARB (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteProgramsARB (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenProgramsARB (GLsizei, GLuint *);
+GLAPI void APIENTRY glProgramEnvParameter4dARB (GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glProgramEnvParameter4dvARB (GLenum, GLuint, const GLdouble *);
+GLAPI void APIENTRY glProgramEnvParameter4fARB (GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glProgramEnvParameter4fvARB (GLenum, GLuint, const GLfloat *);
+GLAPI void APIENTRY glProgramLocalParameter4dARB (GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glProgramLocalParameter4dvARB (GLenum, GLuint, const GLdouble *);
+GLAPI void APIENTRY glProgramLocalParameter4fARB (GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glProgramLocalParameter4fvARB (GLenum, GLuint, const GLfloat *);
+GLAPI void APIENTRY glGetProgramEnvParameterdvARB (GLenum, GLuint, GLdouble *);
+GLAPI void APIENTRY glGetProgramEnvParameterfvARB (GLenum, GLuint, GLfloat *);
+GLAPI void APIENTRY glGetProgramLocalParameterdvARB (GLenum, GLuint, GLdouble *);
+GLAPI void APIENTRY glGetProgramLocalParameterfvARB (GLenum, GLuint, GLfloat *);
+GLAPI void APIENTRY glGetProgramivARB (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetProgramStringARB (GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetVertexAttribdvARB (GLuint, GLenum, GLdouble *);
+GLAPI void APIENTRY glGetVertexAttribfvARB (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVertexAttribivARB (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVertexAttribPointervARB (GLuint, GLenum, GLvoid* *);
+GLAPI GLboolean APIENTRY glIsProgramARB (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DARBPROC) (GLuint index, GLdouble x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DVARBPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FARBPROC) (GLuint index, GLfloat x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FVARBPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SARBPROC) (GLuint index, GLshort x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SVARBPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DARBPROC) (GLuint index, GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DVARBPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FARBPROC) (GLuint index, GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FVARBPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SARBPROC) (GLuint index, GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SVARBPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DARBPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DVARBPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FARBPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FVARBPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SARBPROC) (GLuint index, GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SVARBPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NBVARBPROC) (GLuint index, const GLbyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NIVARBPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NSVARBPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUBARBPROC) (GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUBVARBPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUIVARBPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4NUSVARBPROC) (GLuint index, const GLushort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4BVARBPROC) (GLuint index, const GLbyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DARBPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DVARBPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FARBPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FVARBPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4IVARBPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SARBPROC) (GLuint index, GLshort x, GLshort y, GLshort z, GLshort w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SVARBPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UBVARBPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UIVARBPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4USVARBPROC) (GLuint index, const GLushort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBPOINTERARBPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYARBPROC) (GLuint index);
+typedef void (APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYARBPROC) (GLuint index);
+typedef void (APIENTRYP PFNGLPROGRAMSTRINGARBPROC) (GLenum target, GLenum format, GLsizei len, const GLvoid *string);
+typedef void (APIENTRYP PFNGLBINDPROGRAMARBPROC) (GLenum target, GLuint program);
+typedef void (APIENTRYP PFNGLDELETEPROGRAMSARBPROC) (GLsizei n, const GLuint *programs);
+typedef void (APIENTRYP PFNGLGENPROGRAMSARBPROC) (GLsizei n, GLuint *programs);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETER4DARBPROC) (GLenum target, GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETER4DVARBPROC) (GLenum target, GLuint index, const GLdouble *params);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETER4FARBPROC) (GLenum target, GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETER4FVARBPROC) (GLenum target, GLuint index, const GLfloat *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETER4DARBPROC) (GLenum target, GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETER4DVARBPROC) (GLenum target, GLuint index, const GLdouble *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETER4FARBPROC) (GLenum target, GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETER4FVARBPROC) (GLenum target, GLuint index, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMENVPARAMETERDVARBPROC) (GLenum target, GLuint index, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMENVPARAMETERFVARBPROC) (GLenum target, GLuint index, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMLOCALPARAMETERDVARBPROC) (GLenum target, GLuint index, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMLOCALPARAMETERFVARBPROC) (GLenum target, GLuint index, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMIVARBPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMSTRINGARBPROC) (GLenum target, GLenum pname, GLvoid *string);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBDVARBPROC) (GLuint index, GLenum pname, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBFVARBPROC) (GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBIVARBPROC) (GLuint index, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVARBPROC) (GLuint index, GLenum pname, GLvoid* *pointer);
+typedef GLboolean (APIENTRYP PFNGLISPROGRAMARBPROC) (GLuint program);
+#endif
+
+#ifndef GL_ARB_fragment_program
+#define GL_ARB_fragment_program 1
+/* All ARB_fragment_program entry points are shared with ARB_vertex_program. */
+#endif
+
+#ifndef GL_ARB_vertex_buffer_object
+#define GL_ARB_vertex_buffer_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBindBufferARB (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteBuffersARB (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenBuffersARB (GLsizei, GLuint *);
+GLAPI GLboolean APIENTRY glIsBufferARB (GLuint);
+GLAPI void APIENTRY glBufferDataARB (GLenum, GLsizeiptrARB, const GLvoid *, GLenum);
+GLAPI void APIENTRY glBufferSubDataARB (GLenum, GLintptrARB, GLsizeiptrARB, const GLvoid *);
+GLAPI void APIENTRY glGetBufferSubDataARB (GLenum, GLintptrARB, GLsizeiptrARB, GLvoid *);
+GLAPI GLvoid* APIENTRY glMapBufferARB (GLenum, GLenum);
+GLAPI GLboolean APIENTRY glUnmapBufferARB (GLenum);
+GLAPI void APIENTRY glGetBufferParameterivARB (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetBufferPointervARB (GLenum, GLenum, GLvoid* *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBINDBUFFERARBPROC) (GLenum target, GLuint buffer);
+typedef void (APIENTRYP PFNGLDELETEBUFFERSARBPROC) (GLsizei n, const GLuint *buffers);
+typedef void (APIENTRYP PFNGLGENBUFFERSARBPROC) (GLsizei n, GLuint *buffers);
+typedef GLboolean (APIENTRYP PFNGLISBUFFERARBPROC) (GLuint buffer);
+typedef void (APIENTRYP PFNGLBUFFERDATAARBPROC) (GLenum target, GLsizeiptrARB size, const GLvoid *data, GLenum usage);
+typedef void (APIENTRYP PFNGLBUFFERSUBDATAARBPROC) (GLenum target, GLintptrARB offset, GLsizeiptrARB size, const GLvoid *data);
+typedef void (APIENTRYP PFNGLGETBUFFERSUBDATAARBPROC) (GLenum target, GLintptrARB offset, GLsizeiptrARB size, GLvoid *data);
+typedef GLvoid* (APIENTRYP PFNGLMAPBUFFERARBPROC) (GLenum target, GLenum access);
+typedef GLboolean (APIENTRYP PFNGLUNMAPBUFFERARBPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLGETBUFFERPARAMETERIVARBPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETBUFFERPOINTERVARBPROC) (GLenum target, GLenum pname, GLvoid* *params);
+#endif
+
+#ifndef GL_ARB_occlusion_query
+#define GL_ARB_occlusion_query 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGenQueriesARB (GLsizei, GLuint *);
+GLAPI void APIENTRY glDeleteQueriesARB (GLsizei, const GLuint *);
+GLAPI GLboolean APIENTRY glIsQueryARB (GLuint);
+GLAPI void APIENTRY glBeginQueryARB (GLenum, GLuint);
+GLAPI void APIENTRY glEndQueryARB (GLenum);
+GLAPI void APIENTRY glGetQueryivARB (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetQueryObjectivARB (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetQueryObjectuivARB (GLuint, GLenum, GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGENQUERIESARBPROC) (GLsizei n, GLuint *ids);
+typedef void (APIENTRYP PFNGLDELETEQUERIESARBPROC) (GLsizei n, const GLuint *ids);
+typedef GLboolean (APIENTRYP PFNGLISQUERYARBPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLBEGINQUERYARBPROC) (GLenum target, GLuint id);
+typedef void (APIENTRYP PFNGLENDQUERYARBPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLGETQUERYIVARBPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTIVARBPROC) (GLuint id, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTUIVARBPROC) (GLuint id, GLenum pname, GLuint *params);
+#endif
+
+#ifndef GL_ARB_shader_objects
+#define GL_ARB_shader_objects 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDeleteObjectARB (GLhandleARB);
+GLAPI GLhandleARB APIENTRY glGetHandleARB (GLenum);
+GLAPI void APIENTRY glDetachObjectARB (GLhandleARB, GLhandleARB);
+GLAPI GLhandleARB APIENTRY glCreateShaderObjectARB (GLenum);
+GLAPI void APIENTRY glShaderSourceARB (GLhandleARB, GLsizei, const GLcharARB* *, const GLint *);
+GLAPI void APIENTRY glCompileShaderARB (GLhandleARB);
+GLAPI GLhandleARB APIENTRY glCreateProgramObjectARB (void);
+GLAPI void APIENTRY glAttachObjectARB (GLhandleARB, GLhandleARB);
+GLAPI void APIENTRY glLinkProgramARB (GLhandleARB);
+GLAPI void APIENTRY glUseProgramObjectARB (GLhandleARB);
+GLAPI void APIENTRY glValidateProgramARB (GLhandleARB);
+GLAPI void APIENTRY glUniform1fARB (GLint, GLfloat);
+GLAPI void APIENTRY glUniform2fARB (GLint, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform3fARB (GLint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform4fARB (GLint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glUniform1iARB (GLint, GLint);
+GLAPI void APIENTRY glUniform2iARB (GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform3iARB (GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform4iARB (GLint, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glUniform1fvARB (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform2fvARB (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform3fvARB (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform4fvARB (GLint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glUniform1ivARB (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform2ivARB (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform3ivARB (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniform4ivARB (GLint, GLsizei, const GLint *);
+GLAPI void APIENTRY glUniformMatrix2fvARB (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix3fvARB (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glUniformMatrix4fvARB (GLint, GLsizei, GLboolean, const GLfloat *);
+GLAPI void APIENTRY glGetObjectParameterfvARB (GLhandleARB, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetObjectParameterivARB (GLhandleARB, GLenum, GLint *);
+GLAPI void APIENTRY glGetInfoLogARB (GLhandleARB, GLsizei, GLsizei *, GLcharARB *);
+GLAPI void APIENTRY glGetAttachedObjectsARB (GLhandleARB, GLsizei, GLsizei *, GLhandleARB *);
+GLAPI GLint APIENTRY glGetUniformLocationARB (GLhandleARB, const GLcharARB *);
+GLAPI void APIENTRY glGetActiveUniformARB (GLhandleARB, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLcharARB *);
+GLAPI void APIENTRY glGetUniformfvARB (GLhandleARB, GLint, GLfloat *);
+GLAPI void APIENTRY glGetUniformivARB (GLhandleARB, GLint, GLint *);
+GLAPI void APIENTRY glGetShaderSourceARB (GLhandleARB, GLsizei, GLsizei *, GLcharARB *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDELETEOBJECTARBPROC) (GLhandleARB obj);
+typedef GLhandleARB (APIENTRYP PFNGLGETHANDLEARBPROC) (GLenum pname);
+typedef void (APIENTRYP PFNGLDETACHOBJECTARBPROC) (GLhandleARB containerObj, GLhandleARB attachedObj);
+typedef GLhandleARB (APIENTRYP PFNGLCREATESHADEROBJECTARBPROC) (GLenum shaderType);
+typedef void (APIENTRYP PFNGLSHADERSOURCEARBPROC) (GLhandleARB shaderObj, GLsizei count, const GLcharARB* *string, const GLint *length);
+typedef void (APIENTRYP PFNGLCOMPILESHADERARBPROC) (GLhandleARB shaderObj);
+typedef GLhandleARB (APIENTRYP PFNGLCREATEPROGRAMOBJECTARBPROC) (void);
+typedef void (APIENTRYP PFNGLATTACHOBJECTARBPROC) (GLhandleARB containerObj, GLhandleARB obj);
+typedef void (APIENTRYP PFNGLLINKPROGRAMARBPROC) (GLhandleARB programObj);
+typedef void (APIENTRYP PFNGLUSEPROGRAMOBJECTARBPROC) (GLhandleARB programObj);
+typedef void (APIENTRYP PFNGLVALIDATEPROGRAMARBPROC) (GLhandleARB programObj);
+typedef void (APIENTRYP PFNGLUNIFORM1FARBPROC) (GLint location, GLfloat v0);
+typedef void (APIENTRYP PFNGLUNIFORM2FARBPROC) (GLint location, GLfloat v0, GLfloat v1);
+typedef void (APIENTRYP PFNGLUNIFORM3FARBPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2);
+typedef void (APIENTRYP PFNGLUNIFORM4FARBPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3);
+typedef void (APIENTRYP PFNGLUNIFORM1IARBPROC) (GLint location, GLint v0);
+typedef void (APIENTRYP PFNGLUNIFORM2IARBPROC) (GLint location, GLint v0, GLint v1);
+typedef void (APIENTRYP PFNGLUNIFORM3IARBPROC) (GLint location, GLint v0, GLint v1, GLint v2);
+typedef void (APIENTRYP PFNGLUNIFORM4IARBPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3);
+typedef void (APIENTRYP PFNGLUNIFORM1FVARBPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM2FVARBPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM3FVARBPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM4FVARBPROC) (GLint location, GLsizei count, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORM1IVARBPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM2IVARBPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM3IVARBPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORM4IVARBPROC) (GLint location, GLsizei count, const GLint *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX2FVARBPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX3FVARBPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLUNIFORMMATRIX4FVARBPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+typedef void (APIENTRYP PFNGLGETOBJECTPARAMETERFVARBPROC) (GLhandleARB obj, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETOBJECTPARAMETERIVARBPROC) (GLhandleARB obj, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETINFOLOGARBPROC) (GLhandleARB obj, GLsizei maxLength, GLsizei *length, GLcharARB *infoLog);
+typedef void (APIENTRYP PFNGLGETATTACHEDOBJECTSARBPROC) (GLhandleARB containerObj, GLsizei maxCount, GLsizei *count, GLhandleARB *obj);
+typedef GLint (APIENTRYP PFNGLGETUNIFORMLOCATIONARBPROC) (GLhandleARB programObj, const GLcharARB *name);
+typedef void (APIENTRYP PFNGLGETACTIVEUNIFORMARBPROC) (GLhandleARB programObj, GLuint index, GLsizei maxLength, GLsizei *length, GLint *size, GLenum *type, GLcharARB *name);
+typedef void (APIENTRYP PFNGLGETUNIFORMFVARBPROC) (GLhandleARB programObj, GLint location, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETUNIFORMIVARBPROC) (GLhandleARB programObj, GLint location, GLint *params);
+typedef void (APIENTRYP PFNGLGETSHADERSOURCEARBPROC) (GLhandleARB obj, GLsizei maxLength, GLsizei *length, GLcharARB *source);
+#endif
+
+#ifndef GL_ARB_vertex_shader
+#define GL_ARB_vertex_shader 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBindAttribLocationARB (GLhandleARB, GLuint, const GLcharARB *);
+GLAPI void APIENTRY glGetActiveAttribARB (GLhandleARB, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLcharARB *);
+GLAPI GLint APIENTRY glGetAttribLocationARB (GLhandleARB, const GLcharARB *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBINDATTRIBLOCATIONARBPROC) (GLhandleARB programObj, GLuint index, const GLcharARB *name);
+typedef void (APIENTRYP PFNGLGETACTIVEATTRIBARBPROC) (GLhandleARB programObj, GLuint index, GLsizei maxLength, GLsizei *length, GLint *size, GLenum *type, GLcharARB *name);
+typedef GLint (APIENTRYP PFNGLGETATTRIBLOCATIONARBPROC) (GLhandleARB programObj, const GLcharARB *name);
+#endif
+
+#ifndef GL_ARB_fragment_shader
+#define GL_ARB_fragment_shader 1
+#endif
+
+#ifndef GL_ARB_shading_language_100
+#define GL_ARB_shading_language_100 1
+#endif
+
+#ifndef GL_ARB_texture_non_power_of_two
+#define GL_ARB_texture_non_power_of_two 1
+#endif
+
+#ifndef GL_ARB_point_sprite
+#define GL_ARB_point_sprite 1
+#endif
+
+#ifndef GL_ARB_fragment_program_shadow
+#define GL_ARB_fragment_program_shadow 1
+#endif
+
+#ifndef GL_ARB_draw_buffers
+#define GL_ARB_draw_buffers 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDrawBuffersARB (GLsizei, const GLenum *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDRAWBUFFERSARBPROC) (GLsizei n, const GLenum *bufs);
+#endif
+
+#ifndef GL_ARB_texture_rectangle
+#define GL_ARB_texture_rectangle 1
+#endif
+
+#ifndef GL_ARB_color_buffer_float
+#define GL_ARB_color_buffer_float 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glClampColorARB (GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCLAMPCOLORARBPROC) (GLenum target, GLenum clamp);
+#endif
+
+#ifndef GL_ARB_half_float_pixel
+#define GL_ARB_half_float_pixel 1
+#endif
+
+#ifndef GL_ARB_texture_float
+#define GL_ARB_texture_float 1
+#endif
+
+#ifndef GL_ARB_pixel_buffer_object
+#define GL_ARB_pixel_buffer_object 1
+#endif
+
+#ifndef GL_EXT_abgr
+#define GL_EXT_abgr 1
+#endif
+
+#ifndef GL_EXT_blend_color
+#define GL_EXT_blend_color 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendColorEXT (GLclampf, GLclampf, GLclampf, GLclampf);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDCOLOREXTPROC) (GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha);
+#endif
+
+#ifndef GL_EXT_polygon_offset
+#define GL_EXT_polygon_offset 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPolygonOffsetEXT (GLfloat, GLfloat);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPOLYGONOFFSETEXTPROC) (GLfloat factor, GLfloat bias);
+#endif
+
+#ifndef GL_EXT_texture
+#define GL_EXT_texture 1
+#endif
+
+#ifndef GL_EXT_texture3D
+#define GL_EXT_texture3D 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexImage3DEXT (GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glTexSubImage3DEXT (GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXIMAGE3DEXTPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE3DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels);
+#endif
+
+#ifndef GL_SGIS_texture_filter4
+#define GL_SGIS_texture_filter4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGetTexFilterFuncSGIS (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glTexFilterFuncSGIS (GLenum, GLenum, GLsizei, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGETTEXFILTERFUNCSGISPROC) (GLenum target, GLenum filter, GLfloat *weights);
+typedef void (APIENTRYP PFNGLTEXFILTERFUNCSGISPROC) (GLenum target, GLenum filter, GLsizei n, const GLfloat *weights);
+#endif
+
+#ifndef GL_EXT_subtexture
+#define GL_EXT_subtexture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexSubImage1DEXT (GLenum, GLint, GLint, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glTexSubImage2DEXT (GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE1DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE2DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels);
+#endif
+
+#ifndef GL_EXT_copy_texture
+#define GL_EXT_copy_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCopyTexImage1DEXT (GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLint);
+GLAPI void APIENTRY glCopyTexImage2DEXT (GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLsizei, GLint);
+GLAPI void APIENTRY glCopyTexSubImage1DEXT (GLenum, GLint, GLint, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glCopyTexSubImage2DEXT (GLenum, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+GLAPI void APIENTRY glCopyTexSubImage3DEXT (GLenum, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOPYTEXIMAGE1DEXTPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLint border);
+typedef void (APIENTRYP PFNGLCOPYTEXIMAGE2DEXTPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border);
+typedef void (APIENTRYP PFNGLCOPYTEXSUBIMAGE1DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCOPYTEXSUBIMAGE2DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+typedef void (APIENTRYP PFNGLCOPYTEXSUBIMAGE3DEXTPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+#endif
+
+#ifndef GL_EXT_histogram
+#define GL_EXT_histogram 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGetHistogramEXT (GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetHistogramParameterfvEXT (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetHistogramParameterivEXT (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetMinmaxEXT (GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetMinmaxParameterfvEXT (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetMinmaxParameterivEXT (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glHistogramEXT (GLenum, GLsizei, GLenum, GLboolean);
+GLAPI void APIENTRY glMinmaxEXT (GLenum, GLenum, GLboolean);
+GLAPI void APIENTRY glResetHistogramEXT (GLenum);
+GLAPI void APIENTRY glResetMinmaxEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGETHISTOGRAMEXTPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERFVEXTPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETHISTOGRAMPARAMETERIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETMINMAXEXTPROC) (GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid *values);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERFVEXTPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETMINMAXPARAMETERIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLHISTOGRAMEXTPROC) (GLenum target, GLsizei width, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLMINMAXEXTPROC) (GLenum target, GLenum internalformat, GLboolean sink);
+typedef void (APIENTRYP PFNGLRESETHISTOGRAMEXTPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLRESETMINMAXEXTPROC) (GLenum target);
+#endif
+
+#ifndef GL_EXT_convolution
+#define GL_EXT_convolution 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glConvolutionFilter1DEXT (GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glConvolutionFilter2DEXT (GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glConvolutionParameterfEXT (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glConvolutionParameterfvEXT (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glConvolutionParameteriEXT (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glConvolutionParameterivEXT (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glCopyConvolutionFilter1DEXT (GLenum, GLenum, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glCopyConvolutionFilter2DEXT (GLenum, GLenum, GLint, GLint, GLsizei, GLsizei);
+GLAPI void APIENTRY glGetConvolutionFilterEXT (GLenum, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetConvolutionParameterfvEXT (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetConvolutionParameterivEXT (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetSeparableFilterEXT (GLenum, GLenum, GLenum, GLvoid *, GLvoid *, GLvoid *);
+GLAPI void APIENTRY glSeparableFilter2DEXT (GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER1DEXTPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONFILTER2DEXTPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *image);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFEXTPROC) (GLenum target, GLenum pname, GLfloat params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERFVEXTPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIEXTPROC) (GLenum target, GLenum pname, GLint params);
+typedef void (APIENTRYP PFNGLCONVOLUTIONPARAMETERIVEXTPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER1DEXTPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLCOPYCONVOLUTIONFILTER2DEXTPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONFILTEREXTPROC) (GLenum target, GLenum format, GLenum type, GLvoid *image);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERFVEXTPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCONVOLUTIONPARAMETERIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETSEPARABLEFILTEREXTPROC) (GLenum target, GLenum format, GLenum type, GLvoid *row, GLvoid *column, GLvoid *span);
+typedef void (APIENTRYP PFNGLSEPARABLEFILTER2DEXTPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *row, const GLvoid *column);
+#endif
+
+#ifndef GL_SGI_color_matrix
+#define GL_SGI_color_matrix 1
+#endif
+
+#ifndef GL_SGI_color_table
+#define GL_SGI_color_table 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColorTableSGI (GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glColorTableParameterfvSGI (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glColorTableParameterivSGI (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glCopyColorTableSGI (GLenum, GLenum, GLint, GLint, GLsizei);
+GLAPI void APIENTRY glGetColorTableSGI (GLenum, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetColorTableParameterfvSGI (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetColorTableParameterivSGI (GLenum, GLenum, GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLORTABLESGIPROC) (GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid *table);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERFVSGIPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCOLORTABLEPARAMETERIVSGIPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOPYCOLORTABLESGIPROC) (GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width);
+typedef void (APIENTRYP PFNGLGETCOLORTABLESGIPROC) (GLenum target, GLenum format, GLenum type, GLvoid *table);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERFVSGIPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERIVSGIPROC) (GLenum target, GLenum pname, GLint *params);
+#endif
+
+#ifndef GL_SGIX_pixel_texture
+#define GL_SGIX_pixel_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPixelTexGenSGIX (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPIXELTEXGENSGIXPROC) (GLenum mode);
+#endif
+
+#ifndef GL_SGIS_pixel_texture
+#define GL_SGIS_pixel_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPixelTexGenParameteriSGIS (GLenum, GLint);
+GLAPI void APIENTRY glPixelTexGenParameterivSGIS (GLenum, const GLint *);
+GLAPI void APIENTRY glPixelTexGenParameterfSGIS (GLenum, GLfloat);
+GLAPI void APIENTRY glPixelTexGenParameterfvSGIS (GLenum, const GLfloat *);
+GLAPI void APIENTRY glGetPixelTexGenParameterivSGIS (GLenum, GLint *);
+GLAPI void APIENTRY glGetPixelTexGenParameterfvSGIS (GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPIXELTEXGENPARAMETERISGISPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLPIXELTEXGENPARAMETERIVSGISPROC) (GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLPIXELTEXGENPARAMETERFSGISPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPIXELTEXGENPARAMETERFVSGISPROC) (GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPIXELTEXGENPARAMETERIVSGISPROC) (GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETPIXELTEXGENPARAMETERFVSGISPROC) (GLenum pname, GLfloat *params);
+#endif
+
+#ifndef GL_SGIS_texture4D
+#define GL_SGIS_texture4D 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexImage4DSGIS (GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glTexSubImage4DSGIS (GLenum, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXIMAGE4DSGISPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLsizei size4d, GLint border, GLenum format, GLenum type, const GLvoid *pixels);
+typedef void (APIENTRYP PFNGLTEXSUBIMAGE4DSGISPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint woffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei size4d, GLenum format, GLenum type, const GLvoid *pixels);
+#endif
+
+#ifndef GL_SGI_texture_color_table
+#define GL_SGI_texture_color_table 1
+#endif
+
+#ifndef GL_EXT_cmyka
+#define GL_EXT_cmyka 1
+#endif
+
+#ifndef GL_EXT_texture_object
+#define GL_EXT_texture_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLboolean APIENTRY glAreTexturesResidentEXT (GLsizei, const GLuint *, GLboolean *);
+GLAPI void APIENTRY glBindTextureEXT (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteTexturesEXT (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenTexturesEXT (GLsizei, GLuint *);
+GLAPI GLboolean APIENTRY glIsTextureEXT (GLuint);
+GLAPI void APIENTRY glPrioritizeTexturesEXT (GLsizei, const GLuint *, const GLclampf *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLboolean (APIENTRYP PFNGLARETEXTURESRESIDENTEXTPROC) (GLsizei n, const GLuint *textures, GLboolean *residences);
+typedef void (APIENTRYP PFNGLBINDTEXTUREEXTPROC) (GLenum target, GLuint texture);
+typedef void (APIENTRYP PFNGLDELETETEXTURESEXTPROC) (GLsizei n, const GLuint *textures);
+typedef void (APIENTRYP PFNGLGENTEXTURESEXTPROC) (GLsizei n, GLuint *textures);
+typedef GLboolean (APIENTRYP PFNGLISTEXTUREEXTPROC) (GLuint texture);
+typedef void (APIENTRYP PFNGLPRIORITIZETEXTURESEXTPROC) (GLsizei n, const GLuint *textures, const GLclampf *priorities);
+#endif
+
+#ifndef GL_SGIS_detail_texture
+#define GL_SGIS_detail_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDetailTexFuncSGIS (GLenum, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glGetDetailTexFuncSGIS (GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDETAILTEXFUNCSGISPROC) (GLenum target, GLsizei n, const GLfloat *points);
+typedef void (APIENTRYP PFNGLGETDETAILTEXFUNCSGISPROC) (GLenum target, GLfloat *points);
+#endif
+
+#ifndef GL_SGIS_sharpen_texture
+#define GL_SGIS_sharpen_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSharpenTexFuncSGIS (GLenum, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glGetSharpenTexFuncSGIS (GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSHARPENTEXFUNCSGISPROC) (GLenum target, GLsizei n, const GLfloat *points);
+typedef void (APIENTRYP PFNGLGETSHARPENTEXFUNCSGISPROC) (GLenum target, GLfloat *points);
+#endif
+
+#ifndef GL_EXT_packed_pixels
+#define GL_EXT_packed_pixels 1
+#endif
+
+#ifndef GL_SGIS_texture_lod
+#define GL_SGIS_texture_lod 1
+#endif
+
+#ifndef GL_SGIS_multisample
+#define GL_SGIS_multisample 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSampleMaskSGIS (GLclampf, GLboolean);
+GLAPI void APIENTRY glSamplePatternSGIS (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSAMPLEMASKSGISPROC) (GLclampf value, GLboolean invert);
+typedef void (APIENTRYP PFNGLSAMPLEPATTERNSGISPROC) (GLenum pattern);
+#endif
+
+#ifndef GL_EXT_rescale_normal
+#define GL_EXT_rescale_normal 1
+#endif
+
+#ifndef GL_EXT_vertex_array
+#define GL_EXT_vertex_array 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glArrayElementEXT (GLint);
+GLAPI void APIENTRY glColorPointerEXT (GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glDrawArraysEXT (GLenum, GLint, GLsizei);
+GLAPI void APIENTRY glEdgeFlagPointerEXT (GLsizei, GLsizei, const GLboolean *);
+GLAPI void APIENTRY glGetPointervEXT (GLenum, GLvoid* *);
+GLAPI void APIENTRY glIndexPointerEXT (GLenum, GLsizei, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glNormalPointerEXT (GLenum, GLsizei, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glTexCoordPointerEXT (GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glVertexPointerEXT (GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLARRAYELEMENTEXTPROC) (GLint i);
+typedef void (APIENTRYP PFNGLCOLORPOINTEREXTPROC) (GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLDRAWARRAYSEXTPROC) (GLenum mode, GLint first, GLsizei count);
+typedef void (APIENTRYP PFNGLEDGEFLAGPOINTEREXTPROC) (GLsizei stride, GLsizei count, const GLboolean *pointer);
+typedef void (APIENTRYP PFNGLGETPOINTERVEXTPROC) (GLenum pname, GLvoid* *params);
+typedef void (APIENTRYP PFNGLINDEXPOINTEREXTPROC) (GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLNORMALPOINTEREXTPROC) (GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLTEXCOORDPOINTEREXTPROC) (GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLVERTEXPOINTEREXTPROC) (GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer);
+#endif
+
+#ifndef GL_EXT_misc_attribute
+#define GL_EXT_misc_attribute 1
+#endif
+
+#ifndef GL_SGIS_generate_mipmap
+#define GL_SGIS_generate_mipmap 1
+#endif
+
+#ifndef GL_SGIX_clipmap
+#define GL_SGIX_clipmap 1
+#endif
+
+#ifndef GL_SGIX_shadow
+#define GL_SGIX_shadow 1
+#endif
+
+#ifndef GL_SGIS_texture_edge_clamp
+#define GL_SGIS_texture_edge_clamp 1
+#endif
+
+#ifndef GL_SGIS_texture_border_clamp
+#define GL_SGIS_texture_border_clamp 1
+#endif
+
+#ifndef GL_EXT_blend_minmax
+#define GL_EXT_blend_minmax 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendEquationEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDEQUATIONEXTPROC) (GLenum mode);
+#endif
+
+#ifndef GL_EXT_blend_subtract
+#define GL_EXT_blend_subtract 1
+#endif
+
+#ifndef GL_EXT_blend_logic_op
+#define GL_EXT_blend_logic_op 1
+#endif
+
+#ifndef GL_SGIX_interlace
+#define GL_SGIX_interlace 1
+#endif
+
+#ifndef GL_SGIX_pixel_tiles
+#define GL_SGIX_pixel_tiles 1
+#endif
+
+#ifndef GL_SGIX_texture_select
+#define GL_SGIX_texture_select 1
+#endif
+
+#ifndef GL_SGIX_sprite
+#define GL_SGIX_sprite 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSpriteParameterfSGIX (GLenum, GLfloat);
+GLAPI void APIENTRY glSpriteParameterfvSGIX (GLenum, const GLfloat *);
+GLAPI void APIENTRY glSpriteParameteriSGIX (GLenum, GLint);
+GLAPI void APIENTRY glSpriteParameterivSGIX (GLenum, const GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSPRITEPARAMETERFSGIXPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLSPRITEPARAMETERFVSGIXPROC) (GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLSPRITEPARAMETERISGIXPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLSPRITEPARAMETERIVSGIXPROC) (GLenum pname, const GLint *params);
+#endif
+
+#ifndef GL_SGIX_texture_multi_buffer
+#define GL_SGIX_texture_multi_buffer 1
+#endif
+
+#ifndef GL_EXT_point_parameters
+#define GL_EXT_point_parameters 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPointParameterfEXT (GLenum, GLfloat);
+GLAPI void APIENTRY glPointParameterfvEXT (GLenum, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFEXTPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFVEXTPROC) (GLenum pname, const GLfloat *params);
+#endif
+
+#ifndef GL_SGIS_point_parameters
+#define GL_SGIS_point_parameters 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPointParameterfSGIS (GLenum, GLfloat);
+GLAPI void APIENTRY glPointParameterfvSGIS (GLenum, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFSGISPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERFVSGISPROC) (GLenum pname, const GLfloat *params);
+#endif
+
+#ifndef GL_SGIX_instruments
+#define GL_SGIX_instruments 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLint APIENTRY glGetInstrumentsSGIX (void);
+GLAPI void APIENTRY glInstrumentsBufferSGIX (GLsizei, GLint *);
+GLAPI GLint APIENTRY glPollInstrumentsSGIX (GLint *);
+GLAPI void APIENTRY glReadInstrumentsSGIX (GLint);
+GLAPI void APIENTRY glStartInstrumentsSGIX (void);
+GLAPI void APIENTRY glStopInstrumentsSGIX (GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLint (APIENTRYP PFNGLGETINSTRUMENTSSGIXPROC) (void);
+typedef void (APIENTRYP PFNGLINSTRUMENTSBUFFERSGIXPROC) (GLsizei size, GLint *buffer);
+typedef GLint (APIENTRYP PFNGLPOLLINSTRUMENTSSGIXPROC) (GLint *marker_p);
+typedef void (APIENTRYP PFNGLREADINSTRUMENTSSGIXPROC) (GLint marker);
+typedef void (APIENTRYP PFNGLSTARTINSTRUMENTSSGIXPROC) (void);
+typedef void (APIENTRYP PFNGLSTOPINSTRUMENTSSGIXPROC) (GLint marker);
+#endif
+
+#ifndef GL_SGIX_texture_scale_bias
+#define GL_SGIX_texture_scale_bias 1
+#endif
+
+#ifndef GL_SGIX_framezoom
+#define GL_SGIX_framezoom 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFrameZoomSGIX (GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFRAMEZOOMSGIXPROC) (GLint factor);
+#endif
+
+#ifndef GL_SGIX_tag_sample_buffer
+#define GL_SGIX_tag_sample_buffer 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTagSampleBufferSGIX (void);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTAGSAMPLEBUFFERSGIXPROC) (void);
+#endif
+
+#ifndef GL_SGIX_polynomial_ffd
+#define GL_SGIX_polynomial_ffd 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDeformationMap3dSGIX (GLenum, GLdouble, GLdouble, GLint, GLint, GLdouble, GLdouble, GLint, GLint, GLdouble, GLdouble, GLint, GLint, const GLdouble *);
+GLAPI void APIENTRY glDeformationMap3fSGIX (GLenum, GLfloat, GLfloat, GLint, GLint, GLfloat, GLfloat, GLint, GLint, GLfloat, GLfloat, GLint, GLint, const GLfloat *);
+GLAPI void APIENTRY glDeformSGIX (GLbitfield);
+GLAPI void APIENTRY glLoadIdentityDeformationMapSGIX (GLbitfield);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDEFORMATIONMAP3DSGIXPROC) (GLenum target, GLdouble u1, GLdouble u2, GLint ustride, GLint uorder, GLdouble v1, GLdouble v2, GLint vstride, GLint vorder, GLdouble w1, GLdouble w2, GLint wstride, GLint worder, const GLdouble *points);
+typedef void (APIENTRYP PFNGLDEFORMATIONMAP3FSGIXPROC) (GLenum target, GLfloat u1, GLfloat u2, GLint ustride, GLint uorder, GLfloat v1, GLfloat v2, GLint vstride, GLint vorder, GLfloat w1, GLfloat w2, GLint wstride, GLint worder, const GLfloat *points);
+typedef void (APIENTRYP PFNGLDEFORMSGIXPROC) (GLbitfield mask);
+typedef void (APIENTRYP PFNGLLOADIDENTITYDEFORMATIONMAPSGIXPROC) (GLbitfield mask);
+#endif
+
+#ifndef GL_SGIX_reference_plane
+#define GL_SGIX_reference_plane 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glReferencePlaneSGIX (const GLdouble *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLREFERENCEPLANESGIXPROC) (const GLdouble *equation);
+#endif
+
+#ifndef GL_SGIX_flush_raster
+#define GL_SGIX_flush_raster 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFlushRasterSGIX (void);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFLUSHRASTERSGIXPROC) (void);
+#endif
+
+#ifndef GL_SGIX_depth_texture
+#define GL_SGIX_depth_texture 1
+#endif
+
+#ifndef GL_SGIS_fog_function
+#define GL_SGIS_fog_function 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFogFuncSGIS (GLsizei, const GLfloat *);
+GLAPI void APIENTRY glGetFogFuncSGIS (GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFOGFUNCSGISPROC) (GLsizei n, const GLfloat *points);
+typedef void (APIENTRYP PFNGLGETFOGFUNCSGISPROC) (GLfloat *points);
+#endif
+
+#ifndef GL_SGIX_fog_offset
+#define GL_SGIX_fog_offset 1
+#endif
+
+#ifndef GL_HP_image_transform
+#define GL_HP_image_transform 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glImageTransformParameteriHP (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glImageTransformParameterfHP (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glImageTransformParameterivHP (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glImageTransformParameterfvHP (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glGetImageTransformParameterivHP (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetImageTransformParameterfvHP (GLenum, GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLIMAGETRANSFORMPARAMETERIHPPROC) (GLenum target, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLIMAGETRANSFORMPARAMETERFHPPROC) (GLenum target, GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLIMAGETRANSFORMPARAMETERIVHPPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLIMAGETRANSFORMPARAMETERFVHPPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGETIMAGETRANSFORMPARAMETERIVHPPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETIMAGETRANSFORMPARAMETERFVHPPROC) (GLenum target, GLenum pname, GLfloat *params);
+#endif
+
+#ifndef GL_HP_convolution_border_modes
+#define GL_HP_convolution_border_modes 1
+#endif
+
+#ifndef GL_SGIX_texture_add_env
+#define GL_SGIX_texture_add_env 1
+#endif
+
+#ifndef GL_EXT_color_subtable
+#define GL_EXT_color_subtable 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColorSubTableEXT (GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glCopyColorSubTableEXT (GLenum, GLsizei, GLint, GLint, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLORSUBTABLEEXTPROC) (GLenum target, GLsizei start, GLsizei count, GLenum format, GLenum type, const GLvoid *data);
+typedef void (APIENTRYP PFNGLCOPYCOLORSUBTABLEEXTPROC) (GLenum target, GLsizei start, GLint x, GLint y, GLsizei width);
+#endif
+
+#ifndef GL_PGI_vertex_hints
+#define GL_PGI_vertex_hints 1
+#endif
+
+#ifndef GL_PGI_misc_hints
+#define GL_PGI_misc_hints 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glHintPGI (GLenum, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLHINTPGIPROC) (GLenum target, GLint mode);
+#endif
+
+#ifndef GL_EXT_paletted_texture
+#define GL_EXT_paletted_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColorTableEXT (GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+GLAPI void APIENTRY glGetColorTableEXT (GLenum, GLenum, GLenum, GLvoid *);
+GLAPI void APIENTRY glGetColorTableParameterivEXT (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetColorTableParameterfvEXT (GLenum, GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLORTABLEEXTPROC) (GLenum target, GLenum internalFormat, GLsizei width, GLenum format, GLenum type, const GLvoid *table);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEEXTPROC) (GLenum target, GLenum format, GLenum type, GLvoid *data);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETCOLORTABLEPARAMETERFVEXTPROC) (GLenum target, GLenum pname, GLfloat *params);
+#endif
+
+#ifndef GL_EXT_clip_volume_hint
+#define GL_EXT_clip_volume_hint 1
+#endif
+
+#ifndef GL_SGIX_list_priority
+#define GL_SGIX_list_priority 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGetListParameterfvSGIX (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetListParameterivSGIX (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glListParameterfSGIX (GLuint, GLenum, GLfloat);
+GLAPI void APIENTRY glListParameterfvSGIX (GLuint, GLenum, const GLfloat *);
+GLAPI void APIENTRY glListParameteriSGIX (GLuint, GLenum, GLint);
+GLAPI void APIENTRY glListParameterivSGIX (GLuint, GLenum, const GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGETLISTPARAMETERFVSGIXPROC) (GLuint list, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETLISTPARAMETERIVSGIXPROC) (GLuint list, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLLISTPARAMETERFSGIXPROC) (GLuint list, GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLLISTPARAMETERFVSGIXPROC) (GLuint list, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLLISTPARAMETERISGIXPROC) (GLuint list, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLLISTPARAMETERIVSGIXPROC) (GLuint list, GLenum pname, const GLint *params);
+#endif
+
+#ifndef GL_SGIX_ir_instrument1
+#define GL_SGIX_ir_instrument1 1
+#endif
+
+#ifndef GL_SGIX_calligraphic_fragment
+#define GL_SGIX_calligraphic_fragment 1
+#endif
+
+#ifndef GL_SGIX_texture_lod_bias
+#define GL_SGIX_texture_lod_bias 1
+#endif
+
+#ifndef GL_SGIX_shadow_ambient
+#define GL_SGIX_shadow_ambient 1
+#endif
+
+#ifndef GL_EXT_index_texture
+#define GL_EXT_index_texture 1
+#endif
+
+#ifndef GL_EXT_index_material
+#define GL_EXT_index_material 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glIndexMaterialEXT (GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLINDEXMATERIALEXTPROC) (GLenum face, GLenum mode);
+#endif
+
+#ifndef GL_EXT_index_func
+#define GL_EXT_index_func 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glIndexFuncEXT (GLenum, GLclampf);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLINDEXFUNCEXTPROC) (GLenum func, GLclampf ref);
+#endif
+
+#ifndef GL_EXT_index_array_formats
+#define GL_EXT_index_array_formats 1
+#endif
+
+#ifndef GL_EXT_compiled_vertex_array
+#define GL_EXT_compiled_vertex_array 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glLockArraysEXT (GLint, GLsizei);
+GLAPI void APIENTRY glUnlockArraysEXT (void);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLLOCKARRAYSEXTPROC) (GLint first, GLsizei count);
+typedef void (APIENTRYP PFNGLUNLOCKARRAYSEXTPROC) (void);
+#endif
+
+#ifndef GL_EXT_cull_vertex
+#define GL_EXT_cull_vertex 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCullParameterdvEXT (GLenum, GLdouble *);
+GLAPI void APIENTRY glCullParameterfvEXT (GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCULLPARAMETERDVEXTPROC) (GLenum pname, GLdouble *params);
+typedef void (APIENTRYP PFNGLCULLPARAMETERFVEXTPROC) (GLenum pname, GLfloat *params);
+#endif
+
+#ifndef GL_SGIX_ycrcb
+#define GL_SGIX_ycrcb 1
+#endif
+
+#ifndef GL_SGIX_fragment_lighting
+#define GL_SGIX_fragment_lighting 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFragmentColorMaterialSGIX (GLenum, GLenum);
+GLAPI void APIENTRY glFragmentLightfSGIX (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glFragmentLightfvSGIX (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glFragmentLightiSGIX (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glFragmentLightivSGIX (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glFragmentLightModelfSGIX (GLenum, GLfloat);
+GLAPI void APIENTRY glFragmentLightModelfvSGIX (GLenum, const GLfloat *);
+GLAPI void APIENTRY glFragmentLightModeliSGIX (GLenum, GLint);
+GLAPI void APIENTRY glFragmentLightModelivSGIX (GLenum, const GLint *);
+GLAPI void APIENTRY glFragmentMaterialfSGIX (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glFragmentMaterialfvSGIX (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glFragmentMaterialiSGIX (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glFragmentMaterialivSGIX (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glGetFragmentLightfvSGIX (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetFragmentLightivSGIX (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetFragmentMaterialfvSGIX (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetFragmentMaterialivSGIX (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glLightEnviSGIX (GLenum, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFRAGMENTCOLORMATERIALSGIXPROC) (GLenum face, GLenum mode);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTFSGIXPROC) (GLenum light, GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTFVSGIXPROC) (GLenum light, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTISGIXPROC) (GLenum light, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTIVSGIXPROC) (GLenum light, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTMODELFSGIXPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTMODELFVSGIXPROC) (GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTMODELISGIXPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLFRAGMENTLIGHTMODELIVSGIXPROC) (GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLFRAGMENTMATERIALFSGIXPROC) (GLenum face, GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLFRAGMENTMATERIALFVSGIXPROC) (GLenum face, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLFRAGMENTMATERIALISGIXPROC) (GLenum face, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLFRAGMENTMATERIALIVSGIXPROC) (GLenum face, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLGETFRAGMENTLIGHTFVSGIXPROC) (GLenum light, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETFRAGMENTLIGHTIVSGIXPROC) (GLenum light, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETFRAGMENTMATERIALFVSGIXPROC) (GLenum face, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETFRAGMENTMATERIALIVSGIXPROC) (GLenum face, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLLIGHTENVISGIXPROC) (GLenum pname, GLint param);
+#endif
+
+#ifndef GL_IBM_rasterpos_clip
+#define GL_IBM_rasterpos_clip 1
+#endif
+
+#ifndef GL_HP_texture_lighting
+#define GL_HP_texture_lighting 1
+#endif
+
+#ifndef GL_EXT_draw_range_elements
+#define GL_EXT_draw_range_elements 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDrawRangeElementsEXT (GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDRAWRANGEELEMENTSEXTPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const GLvoid *indices);
+#endif
+
+#ifndef GL_WIN_phong_shading
+#define GL_WIN_phong_shading 1
+#endif
+
+#ifndef GL_WIN_specular_fog
+#define GL_WIN_specular_fog 1
+#endif
+
+#ifndef GL_EXT_light_texture
+#define GL_EXT_light_texture 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glApplyTextureEXT (GLenum);
+GLAPI void APIENTRY glTextureLightEXT (GLenum);
+GLAPI void APIENTRY glTextureMaterialEXT (GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLAPPLYTEXTUREEXTPROC) (GLenum mode);
+typedef void (APIENTRYP PFNGLTEXTURELIGHTEXTPROC) (GLenum pname);
+typedef void (APIENTRYP PFNGLTEXTUREMATERIALEXTPROC) (GLenum face, GLenum mode);
+#endif
+
+#ifndef GL_SGIX_blend_alpha_minmax
+#define GL_SGIX_blend_alpha_minmax 1
+#endif
+
+#ifndef GL_EXT_bgra
+#define GL_EXT_bgra 1
+#endif
+
+#ifndef GL_SGIX_async
+#define GL_SGIX_async 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glAsyncMarkerSGIX (GLuint);
+GLAPI GLint APIENTRY glFinishAsyncSGIX (GLuint *);
+GLAPI GLint APIENTRY glPollAsyncSGIX (GLuint *);
+GLAPI GLuint APIENTRY glGenAsyncMarkersSGIX (GLsizei);
+GLAPI void APIENTRY glDeleteAsyncMarkersSGIX (GLuint, GLsizei);
+GLAPI GLboolean APIENTRY glIsAsyncMarkerSGIX (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLASYNCMARKERSGIXPROC) (GLuint marker);
+typedef GLint (APIENTRYP PFNGLFINISHASYNCSGIXPROC) (GLuint *markerp);
+typedef GLint (APIENTRYP PFNGLPOLLASYNCSGIXPROC) (GLuint *markerp);
+typedef GLuint (APIENTRYP PFNGLGENASYNCMARKERSSGIXPROC) (GLsizei range);
+typedef void (APIENTRYP PFNGLDELETEASYNCMARKERSSGIXPROC) (GLuint marker, GLsizei range);
+typedef GLboolean (APIENTRYP PFNGLISASYNCMARKERSGIXPROC) (GLuint marker);
+#endif
+
+#ifndef GL_SGIX_async_pixel
+#define GL_SGIX_async_pixel 1
+#endif
+
+#ifndef GL_SGIX_async_histogram
+#define GL_SGIX_async_histogram 1
+#endif
+
+#ifndef GL_INTEL_parallel_arrays
+#define GL_INTEL_parallel_arrays 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexPointervINTEL (GLint, GLenum, const GLvoid* *);
+GLAPI void APIENTRY glNormalPointervINTEL (GLenum, const GLvoid* *);
+GLAPI void APIENTRY glColorPointervINTEL (GLint, GLenum, const GLvoid* *);
+GLAPI void APIENTRY glTexCoordPointervINTEL (GLint, GLenum, const GLvoid* *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXPOINTERVINTELPROC) (GLint size, GLenum type, const GLvoid* *pointer);
+typedef void (APIENTRYP PFNGLNORMALPOINTERVINTELPROC) (GLenum type, const GLvoid* *pointer);
+typedef void (APIENTRYP PFNGLCOLORPOINTERVINTELPROC) (GLint size, GLenum type, const GLvoid* *pointer);
+typedef void (APIENTRYP PFNGLTEXCOORDPOINTERVINTELPROC) (GLint size, GLenum type, const GLvoid* *pointer);
+#endif
+
+#ifndef GL_HP_occlusion_test
+#define GL_HP_occlusion_test 1
+#endif
+
+#ifndef GL_EXT_pixel_transform
+#define GL_EXT_pixel_transform 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPixelTransformParameteriEXT (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glPixelTransformParameterfEXT (GLenum, GLenum, GLfloat);
+GLAPI void APIENTRY glPixelTransformParameterivEXT (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glPixelTransformParameterfvEXT (GLenum, GLenum, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPIXELTRANSFORMPARAMETERIEXTPROC) (GLenum target, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLPIXELTRANSFORMPARAMETERFEXTPROC) (GLenum target, GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLPIXELTRANSFORMPARAMETERIVEXTPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLPIXELTRANSFORMPARAMETERFVEXTPROC) (GLenum target, GLenum pname, const GLfloat *params);
+#endif
+
+#ifndef GL_EXT_pixel_transform_color_table
+#define GL_EXT_pixel_transform_color_table 1
+#endif
+
+#ifndef GL_EXT_shared_texture_palette
+#define GL_EXT_shared_texture_palette 1
+#endif
+
+#ifndef GL_EXT_separate_specular_color
+#define GL_EXT_separate_specular_color 1
+#endif
+
+#ifndef GL_EXT_secondary_color
+#define GL_EXT_secondary_color 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSecondaryColor3bEXT (GLbyte, GLbyte, GLbyte);
+GLAPI void APIENTRY glSecondaryColor3bvEXT (const GLbyte *);
+GLAPI void APIENTRY glSecondaryColor3dEXT (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glSecondaryColor3dvEXT (const GLdouble *);
+GLAPI void APIENTRY glSecondaryColor3fEXT (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glSecondaryColor3fvEXT (const GLfloat *);
+GLAPI void APIENTRY glSecondaryColor3iEXT (GLint, GLint, GLint);
+GLAPI void APIENTRY glSecondaryColor3ivEXT (const GLint *);
+GLAPI void APIENTRY glSecondaryColor3sEXT (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glSecondaryColor3svEXT (const GLshort *);
+GLAPI void APIENTRY glSecondaryColor3ubEXT (GLubyte, GLubyte, GLubyte);
+GLAPI void APIENTRY glSecondaryColor3ubvEXT (const GLubyte *);
+GLAPI void APIENTRY glSecondaryColor3uiEXT (GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glSecondaryColor3uivEXT (const GLuint *);
+GLAPI void APIENTRY glSecondaryColor3usEXT (GLushort, GLushort, GLushort);
+GLAPI void APIENTRY glSecondaryColor3usvEXT (const GLushort *);
+GLAPI void APIENTRY glSecondaryColorPointerEXT (GLint, GLenum, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3BEXTPROC) (GLbyte red, GLbyte green, GLbyte blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3BVEXTPROC) (const GLbyte *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3DEXTPROC) (GLdouble red, GLdouble green, GLdouble blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3DVEXTPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3FEXTPROC) (GLfloat red, GLfloat green, GLfloat blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3FVEXTPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3IEXTPROC) (GLint red, GLint green, GLint blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3IVEXTPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3SEXTPROC) (GLshort red, GLshort green, GLshort blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3SVEXTPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UBEXTPROC) (GLubyte red, GLubyte green, GLubyte blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UBVEXTPROC) (const GLubyte *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UIEXTPROC) (GLuint red, GLuint green, GLuint blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3UIVEXTPROC) (const GLuint *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3USEXTPROC) (GLushort red, GLushort green, GLushort blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3USVEXTPROC) (const GLushort *v);
+typedef void (APIENTRYP PFNGLSECONDARYCOLORPOINTEREXTPROC) (GLint size, GLenum type, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_EXT_texture_perturb_normal
+#define GL_EXT_texture_perturb_normal 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTextureNormalEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXTURENORMALEXTPROC) (GLenum mode);
+#endif
+
+#ifndef GL_EXT_multi_draw_arrays
+#define GL_EXT_multi_draw_arrays 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glMultiDrawArraysEXT (GLenum, GLint *, GLsizei *, GLsizei);
+GLAPI void APIENTRY glMultiDrawElementsEXT (GLenum, const GLsizei *, GLenum, const GLvoid* *, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLMULTIDRAWARRAYSEXTPROC) (GLenum mode, GLint *first, GLsizei *count, GLsizei primcount);
+typedef void (APIENTRYP PFNGLMULTIDRAWELEMENTSEXTPROC) (GLenum mode, const GLsizei *count, GLenum type, const GLvoid* *indices, GLsizei primcount);
+#endif
+
+#ifndef GL_EXT_fog_coord
+#define GL_EXT_fog_coord 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFogCoordfEXT (GLfloat);
+GLAPI void APIENTRY glFogCoordfvEXT (const GLfloat *);
+GLAPI void APIENTRY glFogCoorddEXT (GLdouble);
+GLAPI void APIENTRY glFogCoorddvEXT (const GLdouble *);
+GLAPI void APIENTRY glFogCoordPointerEXT (GLenum, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFOGCOORDFEXTPROC) (GLfloat coord);
+typedef void (APIENTRYP PFNGLFOGCOORDFVEXTPROC) (const GLfloat *coord);
+typedef void (APIENTRYP PFNGLFOGCOORDDEXTPROC) (GLdouble coord);
+typedef void (APIENTRYP PFNGLFOGCOORDDVEXTPROC) (const GLdouble *coord);
+typedef void (APIENTRYP PFNGLFOGCOORDPOINTEREXTPROC) (GLenum type, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_REND_screen_coordinates
+#define GL_REND_screen_coordinates 1
+#endif
+
+#ifndef GL_EXT_coordinate_frame
+#define GL_EXT_coordinate_frame 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTangent3bEXT (GLbyte, GLbyte, GLbyte);
+GLAPI void APIENTRY glTangent3bvEXT (const GLbyte *);
+GLAPI void APIENTRY glTangent3dEXT (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glTangent3dvEXT (const GLdouble *);
+GLAPI void APIENTRY glTangent3fEXT (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTangent3fvEXT (const GLfloat *);
+GLAPI void APIENTRY glTangent3iEXT (GLint, GLint, GLint);
+GLAPI void APIENTRY glTangent3ivEXT (const GLint *);
+GLAPI void APIENTRY glTangent3sEXT (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glTangent3svEXT (const GLshort *);
+GLAPI void APIENTRY glBinormal3bEXT (GLbyte, GLbyte, GLbyte);
+GLAPI void APIENTRY glBinormal3bvEXT (const GLbyte *);
+GLAPI void APIENTRY glBinormal3dEXT (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glBinormal3dvEXT (const GLdouble *);
+GLAPI void APIENTRY glBinormal3fEXT (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glBinormal3fvEXT (const GLfloat *);
+GLAPI void APIENTRY glBinormal3iEXT (GLint, GLint, GLint);
+GLAPI void APIENTRY glBinormal3ivEXT (const GLint *);
+GLAPI void APIENTRY glBinormal3sEXT (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glBinormal3svEXT (const GLshort *);
+GLAPI void APIENTRY glTangentPointerEXT (GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glBinormalPointerEXT (GLenum, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTANGENT3BEXTPROC) (GLbyte tx, GLbyte ty, GLbyte tz);
+typedef void (APIENTRYP PFNGLTANGENT3BVEXTPROC) (const GLbyte *v);
+typedef void (APIENTRYP PFNGLTANGENT3DEXTPROC) (GLdouble tx, GLdouble ty, GLdouble tz);
+typedef void (APIENTRYP PFNGLTANGENT3DVEXTPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLTANGENT3FEXTPROC) (GLfloat tx, GLfloat ty, GLfloat tz);
+typedef void (APIENTRYP PFNGLTANGENT3FVEXTPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLTANGENT3IEXTPROC) (GLint tx, GLint ty, GLint tz);
+typedef void (APIENTRYP PFNGLTANGENT3IVEXTPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLTANGENT3SEXTPROC) (GLshort tx, GLshort ty, GLshort tz);
+typedef void (APIENTRYP PFNGLTANGENT3SVEXTPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLBINORMAL3BEXTPROC) (GLbyte bx, GLbyte by, GLbyte bz);
+typedef void (APIENTRYP PFNGLBINORMAL3BVEXTPROC) (const GLbyte *v);
+typedef void (APIENTRYP PFNGLBINORMAL3DEXTPROC) (GLdouble bx, GLdouble by, GLdouble bz);
+typedef void (APIENTRYP PFNGLBINORMAL3DVEXTPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLBINORMAL3FEXTPROC) (GLfloat bx, GLfloat by, GLfloat bz);
+typedef void (APIENTRYP PFNGLBINORMAL3FVEXTPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLBINORMAL3IEXTPROC) (GLint bx, GLint by, GLint bz);
+typedef void (APIENTRYP PFNGLBINORMAL3IVEXTPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLBINORMAL3SEXTPROC) (GLshort bx, GLshort by, GLshort bz);
+typedef void (APIENTRYP PFNGLBINORMAL3SVEXTPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLTANGENTPOINTEREXTPROC) (GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLBINORMALPOINTEREXTPROC) (GLenum type, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_EXT_texture_env_combine
+#define GL_EXT_texture_env_combine 1
+#endif
+
+#ifndef GL_APPLE_specular_vector
+#define GL_APPLE_specular_vector 1
+#endif
+
+#ifndef GL_APPLE_transform_hint
+#define GL_APPLE_transform_hint 1
+#endif
+
+#ifndef GL_SGIX_fog_scale
+#define GL_SGIX_fog_scale 1
+#endif
+
+#ifndef GL_SUNX_constant_data
+#define GL_SUNX_constant_data 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFinishTextureSUNX (void);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFINISHTEXTURESUNXPROC) (void);
+#endif
+
+#ifndef GL_SUN_global_alpha
+#define GL_SUN_global_alpha 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGlobalAlphaFactorbSUN (GLbyte);
+GLAPI void APIENTRY glGlobalAlphaFactorsSUN (GLshort);
+GLAPI void APIENTRY glGlobalAlphaFactoriSUN (GLint);
+GLAPI void APIENTRY glGlobalAlphaFactorfSUN (GLfloat);
+GLAPI void APIENTRY glGlobalAlphaFactordSUN (GLdouble);
+GLAPI void APIENTRY glGlobalAlphaFactorubSUN (GLubyte);
+GLAPI void APIENTRY glGlobalAlphaFactorusSUN (GLushort);
+GLAPI void APIENTRY glGlobalAlphaFactoruiSUN (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORBSUNPROC) (GLbyte factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORSSUNPROC) (GLshort factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORISUNPROC) (GLint factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORFSUNPROC) (GLfloat factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORDSUNPROC) (GLdouble factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORUBSUNPROC) (GLubyte factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORUSSUNPROC) (GLushort factor);
+typedef void (APIENTRYP PFNGLGLOBALALPHAFACTORUISUNPROC) (GLuint factor);
+#endif
+
+#ifndef GL_SUN_triangle_list
+#define GL_SUN_triangle_list 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glReplacementCodeuiSUN (GLuint);
+GLAPI void APIENTRY glReplacementCodeusSUN (GLushort);
+GLAPI void APIENTRY glReplacementCodeubSUN (GLubyte);
+GLAPI void APIENTRY glReplacementCodeuivSUN (const GLuint *);
+GLAPI void APIENTRY glReplacementCodeusvSUN (const GLushort *);
+GLAPI void APIENTRY glReplacementCodeubvSUN (const GLubyte *);
+GLAPI void APIENTRY glReplacementCodePointerSUN (GLenum, GLsizei, const GLvoid* *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUISUNPROC) (GLuint code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUSSUNPROC) (GLushort code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUBSUNPROC) (GLubyte code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUIVSUNPROC) (const GLuint *code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUSVSUNPROC) (const GLushort *code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUBVSUNPROC) (const GLubyte *code);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEPOINTERSUNPROC) (GLenum type, GLsizei stride, const GLvoid* *pointer);
+#endif
+
+#ifndef GL_SUN_vertex
+#define GL_SUN_vertex 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColor4ubVertex2fSUN (GLubyte, GLubyte, GLubyte, GLubyte, GLfloat, GLfloat);
+GLAPI void APIENTRY glColor4ubVertex2fvSUN (const GLubyte *, const GLfloat *);
+GLAPI void APIENTRY glColor4ubVertex3fSUN (GLubyte, GLubyte, GLubyte, GLubyte, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glColor4ubVertex3fvSUN (const GLubyte *, const GLfloat *);
+GLAPI void APIENTRY glColor3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glColor3fVertex3fvSUN (const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glNormal3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glNormal3fVertex3fvSUN (const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glColor4fNormal3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glColor4fNormal3fVertex3fvSUN (const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord2fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord2fVertex3fvSUN (const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord4fVertex4fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord4fVertex4fvSUN (const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord2fColor4ubVertex3fSUN (GLfloat, GLfloat, GLubyte, GLubyte, GLubyte, GLubyte, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord2fColor4ubVertex3fvSUN (const GLfloat *, const GLubyte *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord2fColor3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord2fColor3fVertex3fvSUN (const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord2fNormal3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord2fNormal3fVertex3fvSUN (const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord2fColor4fNormal3fVertex3fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord2fColor4fNormal3fVertex3fvSUN (const GLfloat *, const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glTexCoord4fColor4fNormal3fVertex4fSUN (GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glTexCoord4fColor4fNormal3fVertex4fvSUN (const GLfloat *, const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiVertex3fvSUN (const GLuint *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiColor4ubVertex3fSUN (GLuint, GLubyte, GLubyte, GLubyte, GLubyte, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiColor4ubVertex3fvSUN (const GLuint *, const GLubyte *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiColor3fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiColor3fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiNormal3fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiNormal3fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiColor4fNormal3fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiColor4fNormal3fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fNormal3fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fNormal3fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *, const GLfloat *);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN (GLuint, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN (const GLuint *, const GLfloat *, const GLfloat *, const GLfloat *, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLOR4UBVERTEX2FSUNPROC) (GLubyte r, GLubyte g, GLubyte b, GLubyte a, GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLCOLOR4UBVERTEX2FVSUNPROC) (const GLubyte *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLCOLOR4UBVERTEX3FSUNPROC) (GLubyte r, GLubyte g, GLubyte b, GLubyte a, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLCOLOR4UBVERTEX3FVSUNPROC) (const GLubyte *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLCOLOR3FVERTEX3FSUNPROC) (GLfloat r, GLfloat g, GLfloat b, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLCOLOR3FVERTEX3FVSUNPROC) (const GLfloat *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLNORMAL3FVERTEX3FSUNPROC) (GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLNORMAL3FVERTEX3FVSUNPROC) (const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLCOLOR4FNORMAL3FVERTEX3FSUNPROC) (GLfloat r, GLfloat g, GLfloat b, GLfloat a, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLCOLOR4FNORMAL3FVERTEX3FVSUNPROC) (const GLfloat *c, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2FVERTEX3FSUNPROC) (GLfloat s, GLfloat t, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLTEXCOORD2FVERTEX3FVSUNPROC) (const GLfloat *tc, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD4FVERTEX4FSUNPROC) (GLfloat s, GLfloat t, GLfloat p, GLfloat q, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLTEXCOORD4FVERTEX4FVSUNPROC) (const GLfloat *tc, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR4UBVERTEX3FSUNPROC) (GLfloat s, GLfloat t, GLubyte r, GLubyte g, GLubyte b, GLubyte a, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR4UBVERTEX3FVSUNPROC) (const GLfloat *tc, const GLubyte *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR3FVERTEX3FSUNPROC) (GLfloat s, GLfloat t, GLfloat r, GLfloat g, GLfloat b, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR3FVERTEX3FVSUNPROC) (const GLfloat *tc, const GLfloat *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2FNORMAL3FVERTEX3FSUNPROC) (GLfloat s, GLfloat t, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLTEXCOORD2FNORMAL3FVERTEX3FVSUNPROC) (const GLfloat *tc, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR4FNORMAL3FVERTEX3FSUNPROC) (GLfloat s, GLfloat t, GLfloat r, GLfloat g, GLfloat b, GLfloat a, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLTEXCOORD2FCOLOR4FNORMAL3FVERTEX3FVSUNPROC) (const GLfloat *tc, const GLfloat *c, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLTEXCOORD4FCOLOR4FNORMAL3FVERTEX4FSUNPROC) (GLfloat s, GLfloat t, GLfloat p, GLfloat q, GLfloat r, GLfloat g, GLfloat b, GLfloat a, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLTEXCOORD4FCOLOR4FNORMAL3FVERTEX4FVSUNPROC) (const GLfloat *tc, const GLfloat *c, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUIVERTEX3FSUNPROC) (GLuint rc, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUIVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR4UBVERTEX3FSUNPROC) (GLuint rc, GLubyte r, GLubyte g, GLubyte b, GLubyte a, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR4UBVERTEX3FVSUNPROC) (const GLuint *rc, const GLubyte *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR3FVERTEX3FSUNPROC) (GLuint rc, GLfloat r, GLfloat g, GLfloat b, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR3FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *c, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUINORMAL3FVERTEX3FSUNPROC) (GLuint rc, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUINORMAL3FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR4FNORMAL3FVERTEX3FSUNPROC) (GLuint rc, GLfloat r, GLfloat g, GLfloat b, GLfloat a, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUICOLOR4FNORMAL3FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *c, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FVERTEX3FSUNPROC) (GLuint rc, GLfloat s, GLfloat t, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *tc, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FNORMAL3FVERTEX3FSUNPROC) (GLuint rc, GLfloat s, GLfloat t, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FNORMAL3FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *tc, const GLfloat *n, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FCOLOR4FNORMAL3FVERTEX3FSUNPROC) (GLuint rc, GLfloat s, GLfloat t, GLfloat r, GLfloat g, GLfloat b, GLfloat a, GLfloat nx, GLfloat ny, GLfloat nz, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLREPLACEMENTCODEUITEXCOORD2FCOLOR4FNORMAL3FVERTEX3FVSUNPROC) (const GLuint *rc, const GLfloat *tc, const GLfloat *c, const GLfloat *n, const GLfloat *v);
+#endif
+
+#ifndef GL_EXT_blend_func_separate
+#define GL_EXT_blend_func_separate 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendFuncSeparateEXT (GLenum, GLenum, GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDFUNCSEPARATEEXTPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha);
+#endif
+
+#ifndef GL_INGR_blend_func_separate
+#define GL_INGR_blend_func_separate 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendFuncSeparateINGR (GLenum, GLenum, GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDFUNCSEPARATEINGRPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha);
+#endif
+
+#ifndef GL_INGR_color_clamp
+#define GL_INGR_color_clamp 1
+#endif
+
+#ifndef GL_INGR_interlace_read
+#define GL_INGR_interlace_read 1
+#endif
+
+#ifndef GL_EXT_stencil_wrap
+#define GL_EXT_stencil_wrap 1
+#endif
+
+#ifndef GL_EXT_422_pixels
+#define GL_EXT_422_pixels 1
+#endif
+
+#ifndef GL_NV_texgen_reflection
+#define GL_NV_texgen_reflection 1
+#endif
+
+#ifndef GL_SUN_convolution_border_modes
+#define GL_SUN_convolution_border_modes 1
+#endif
+
+#ifndef GL_EXT_texture_env_add
+#define GL_EXT_texture_env_add 1
+#endif
+
+#ifndef GL_EXT_texture_lod_bias
+#define GL_EXT_texture_lod_bias 1
+#endif
+
+#ifndef GL_EXT_texture_filter_anisotropic
+#define GL_EXT_texture_filter_anisotropic 1
+#endif
+
+#ifndef GL_EXT_vertex_weighting
+#define GL_EXT_vertex_weighting 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexWeightfEXT (GLfloat);
+GLAPI void APIENTRY glVertexWeightfvEXT (const GLfloat *);
+GLAPI void APIENTRY glVertexWeightPointerEXT (GLsizei, GLenum, GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXWEIGHTFEXTPROC) (GLfloat weight);
+typedef void (APIENTRYP PFNGLVERTEXWEIGHTFVEXTPROC) (const GLfloat *weight);
+typedef void (APIENTRYP PFNGLVERTEXWEIGHTPOINTEREXTPROC) (GLsizei size, GLenum type, GLsizei stride, const GLvoid *pointer);
+#endif
+
+#ifndef GL_NV_light_max_exponent
+#define GL_NV_light_max_exponent 1
+#endif
+
+#ifndef GL_NV_vertex_array_range
+#define GL_NV_vertex_array_range 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glFlushVertexArrayRangeNV (void);
+GLAPI void APIENTRY glVertexArrayRangeNV (GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLFLUSHVERTEXARRAYRANGENVPROC) (void);
+typedef void (APIENTRYP PFNGLVERTEXARRAYRANGENVPROC) (GLsizei length, const GLvoid *pointer);
+#endif
+
+#ifndef GL_NV_register_combiners
+#define GL_NV_register_combiners 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCombinerParameterfvNV (GLenum, const GLfloat *);
+GLAPI void APIENTRY glCombinerParameterfNV (GLenum, GLfloat);
+GLAPI void APIENTRY glCombinerParameterivNV (GLenum, const GLint *);
+GLAPI void APIENTRY glCombinerParameteriNV (GLenum, GLint);
+GLAPI void APIENTRY glCombinerInputNV (GLenum, GLenum, GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glCombinerOutputNV (GLenum, GLenum, GLenum, GLenum, GLenum, GLenum, GLenum, GLboolean, GLboolean, GLboolean);
+GLAPI void APIENTRY glFinalCombinerInputNV (GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glGetCombinerInputParameterfvNV (GLenum, GLenum, GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetCombinerInputParameterivNV (GLenum, GLenum, GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetCombinerOutputParameterfvNV (GLenum, GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetCombinerOutputParameterivNV (GLenum, GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetFinalCombinerInputParameterfvNV (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetFinalCombinerInputParameterivNV (GLenum, GLenum, GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOMBINERPARAMETERFVNVPROC) (GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLCOMBINERPARAMETERFNVPROC) (GLenum pname, GLfloat param);
+typedef void (APIENTRYP PFNGLCOMBINERPARAMETERIVNVPROC) (GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLCOMBINERPARAMETERINVPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLCOMBINERINPUTNVPROC) (GLenum stage, GLenum portion, GLenum variable, GLenum input, GLenum mapping, GLenum componentUsage);
+typedef void (APIENTRYP PFNGLCOMBINEROUTPUTNVPROC) (GLenum stage, GLenum portion, GLenum abOutput, GLenum cdOutput, GLenum sumOutput, GLenum scale, GLenum bias, GLboolean abDotProduct, GLboolean cdDotProduct, GLboolean muxSum);
+typedef void (APIENTRYP PFNGLFINALCOMBINERINPUTNVPROC) (GLenum variable, GLenum input, GLenum mapping, GLenum componentUsage);
+typedef void (APIENTRYP PFNGLGETCOMBINERINPUTPARAMETERFVNVPROC) (GLenum stage, GLenum portion, GLenum variable, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOMBINERINPUTPARAMETERIVNVPROC) (GLenum stage, GLenum portion, GLenum variable, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETCOMBINEROUTPUTPARAMETERFVNVPROC) (GLenum stage, GLenum portion, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOMBINEROUTPUTPARAMETERIVNVPROC) (GLenum stage, GLenum portion, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETFINALCOMBINERINPUTPARAMETERFVNVPROC) (GLenum variable, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETFINALCOMBINERINPUTPARAMETERIVNVPROC) (GLenum variable, GLenum pname, GLint *params);
+#endif
+
+#ifndef GL_NV_fog_distance
+#define GL_NV_fog_distance 1
+#endif
+
+#ifndef GL_NV_texgen_emboss
+#define GL_NV_texgen_emboss 1
+#endif
+
+#ifndef GL_NV_blend_square
+#define GL_NV_blend_square 1
+#endif
+
+#ifndef GL_NV_texture_env_combine4
+#define GL_NV_texture_env_combine4 1
+#endif
+
+#ifndef GL_MESA_resize_buffers
+#define GL_MESA_resize_buffers 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glResizeBuffersMESA (void);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLRESIZEBUFFERSMESAPROC) (void);
+#endif
+
+#ifndef GL_MESA_window_pos
+#define GL_MESA_window_pos 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glWindowPos2dMESA (GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos2dvMESA (const GLdouble *);
+GLAPI void APIENTRY glWindowPos2fMESA (GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos2fvMESA (const GLfloat *);
+GLAPI void APIENTRY glWindowPos2iMESA (GLint, GLint);
+GLAPI void APIENTRY glWindowPos2ivMESA (const GLint *);
+GLAPI void APIENTRY glWindowPos2sMESA (GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos2svMESA (const GLshort *);
+GLAPI void APIENTRY glWindowPos3dMESA (GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos3dvMESA (const GLdouble *);
+GLAPI void APIENTRY glWindowPos3fMESA (GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos3fvMESA (const GLfloat *);
+GLAPI void APIENTRY glWindowPos3iMESA (GLint, GLint, GLint);
+GLAPI void APIENTRY glWindowPos3ivMESA (const GLint *);
+GLAPI void APIENTRY glWindowPos3sMESA (GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos3svMESA (const GLshort *);
+GLAPI void APIENTRY glWindowPos4dMESA (GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glWindowPos4dvMESA (const GLdouble *);
+GLAPI void APIENTRY glWindowPos4fMESA (GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glWindowPos4fvMESA (const GLfloat *);
+GLAPI void APIENTRY glWindowPos4iMESA (GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glWindowPos4ivMESA (const GLint *);
+GLAPI void APIENTRY glWindowPos4sMESA (GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glWindowPos4svMESA (const GLshort *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLWINDOWPOS2DMESAPROC) (GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2DVMESAPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FMESAPROC) (GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2FVMESAPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IMESAPROC) (GLint x, GLint y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2IVMESAPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SMESAPROC) (GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLWINDOWPOS2SVMESAPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DMESAPROC) (GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3DVMESAPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FMESAPROC) (GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3FVMESAPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IMESAPROC) (GLint x, GLint y, GLint z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3IVMESAPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SMESAPROC) (GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLWINDOWPOS3SVMESAPROC) (const GLshort *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS4DMESAPROC) (GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLWINDOWPOS4DVMESAPROC) (const GLdouble *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS4FMESAPROC) (GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLWINDOWPOS4FVMESAPROC) (const GLfloat *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS4IMESAPROC) (GLint x, GLint y, GLint z, GLint w);
+typedef void (APIENTRYP PFNGLWINDOWPOS4IVMESAPROC) (const GLint *v);
+typedef void (APIENTRYP PFNGLWINDOWPOS4SMESAPROC) (GLshort x, GLshort y, GLshort z, GLshort w);
+typedef void (APIENTRYP PFNGLWINDOWPOS4SVMESAPROC) (const GLshort *v);
+#endif
+
+#ifndef GL_IBM_cull_vertex
+#define GL_IBM_cull_vertex 1
+#endif
+
+#ifndef GL_IBM_multimode_draw_arrays
+#define GL_IBM_multimode_draw_arrays 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glMultiModeDrawArraysIBM (const GLenum *, const GLint *, const GLsizei *, GLsizei, GLint);
+GLAPI void APIENTRY glMultiModeDrawElementsIBM (const GLenum *, const GLsizei *, GLenum, const GLvoid* const *, GLsizei, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLMULTIMODEDRAWARRAYSIBMPROC) (const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride);
+typedef void (APIENTRYP PFNGLMULTIMODEDRAWELEMENTSIBMPROC) (const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid* const *indices, GLsizei primcount, GLint modestride);
+#endif
+
+#ifndef GL_IBM_vertex_array_lists
+#define GL_IBM_vertex_array_lists 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColorPointerListIBM (GLint, GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glSecondaryColorPointerListIBM (GLint, GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glEdgeFlagPointerListIBM (GLint, const GLboolean* *, GLint);
+GLAPI void APIENTRY glFogCoordPointerListIBM (GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glIndexPointerListIBM (GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glNormalPointerListIBM (GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glTexCoordPointerListIBM (GLint, GLenum, GLint, const GLvoid* *, GLint);
+GLAPI void APIENTRY glVertexPointerListIBM (GLint, GLenum, GLint, const GLvoid* *, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLORPOINTERLISTIBMPROC) (GLint size, GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLSECONDARYCOLORPOINTERLISTIBMPROC) (GLint size, GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLEDGEFLAGPOINTERLISTIBMPROC) (GLint stride, const GLboolean* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLFOGCOORDPOINTERLISTIBMPROC) (GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLINDEXPOINTERLISTIBMPROC) (GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLNORMALPOINTERLISTIBMPROC) (GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLTEXCOORDPOINTERLISTIBMPROC) (GLint size, GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+typedef void (APIENTRYP PFNGLVERTEXPOINTERLISTIBMPROC) (GLint size, GLenum type, GLint stride, const GLvoid* *pointer, GLint ptrstride);
+#endif
+
+#ifndef GL_SGIX_subsample
+#define GL_SGIX_subsample 1
+#endif
+
+#ifndef GL_SGIX_ycrcba
+#define GL_SGIX_ycrcba 1
+#endif
+
+#ifndef GL_SGIX_ycrcb_subsample
+#define GL_SGIX_ycrcb_subsample 1
+#endif
+
+#ifndef GL_SGIX_depth_pass_instrument
+#define GL_SGIX_depth_pass_instrument 1
+#endif
+
+#ifndef GL_3DFX_texture_compression_FXT1
+#define GL_3DFX_texture_compression_FXT1 1
+#endif
+
+#ifndef GL_3DFX_multisample
+#define GL_3DFX_multisample 1
+#endif
+
+#ifndef GL_3DFX_tbuffer
+#define GL_3DFX_tbuffer 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTbufferMask3DFX (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTBUFFERMASK3DFXPROC) (GLuint mask);
+#endif
+
+#ifndef GL_EXT_multisample
+#define GL_EXT_multisample 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glSampleMaskEXT (GLclampf, GLboolean);
+GLAPI void APIENTRY glSamplePatternEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSAMPLEMASKEXTPROC) (GLclampf value, GLboolean invert);
+typedef void (APIENTRYP PFNGLSAMPLEPATTERNEXTPROC) (GLenum pattern);
+#endif
+
+#ifndef GL_SGIX_vertex_preclip
+#define GL_SGIX_vertex_preclip 1
+#endif
+
+#ifndef GL_SGIX_convolution_accuracy
+#define GL_SGIX_convolution_accuracy 1
+#endif
+
+#ifndef GL_SGIX_resample
+#define GL_SGIX_resample 1
+#endif
+
+#ifndef GL_SGIS_point_line_texgen
+#define GL_SGIS_point_line_texgen 1
+#endif
+
+#ifndef GL_SGIS_texture_color_mask
+#define GL_SGIS_texture_color_mask 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTextureColorMaskSGIS (GLboolean, GLboolean, GLboolean, GLboolean);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXTURECOLORMASKSGISPROC) (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha);
+#endif
+
+#ifndef GL_SGIX_igloo_interface
+#define GL_SGIX_igloo_interface 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glIglooInterfaceSGIX (GLenum, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLIGLOOINTERFACESGIXPROC) (GLenum pname, const GLvoid *params);
+#endif
+
+#ifndef GL_EXT_texture_env_dot3
+#define GL_EXT_texture_env_dot3 1
+#endif
+
+#ifndef GL_ATI_texture_mirror_once
+#define GL_ATI_texture_mirror_once 1
+#endif
+
+#ifndef GL_NV_fence
+#define GL_NV_fence 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDeleteFencesNV (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenFencesNV (GLsizei, GLuint *);
+GLAPI GLboolean APIENTRY glIsFenceNV (GLuint);
+GLAPI GLboolean APIENTRY glTestFenceNV (GLuint);
+GLAPI void APIENTRY glGetFenceivNV (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glFinishFenceNV (GLuint);
+GLAPI void APIENTRY glSetFenceNV (GLuint, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDELETEFENCESNVPROC) (GLsizei n, const GLuint *fences);
+typedef void (APIENTRYP PFNGLGENFENCESNVPROC) (GLsizei n, GLuint *fences);
+typedef GLboolean (APIENTRYP PFNGLISFENCENVPROC) (GLuint fence);
+typedef GLboolean (APIENTRYP PFNGLTESTFENCENVPROC) (GLuint fence);
+typedef void (APIENTRYP PFNGLGETFENCEIVNVPROC) (GLuint fence, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLFINISHFENCENVPROC) (GLuint fence);
+typedef void (APIENTRYP PFNGLSETFENCENVPROC) (GLuint fence, GLenum condition);
+#endif
+
+#ifndef GL_NV_evaluators
+#define GL_NV_evaluators 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glMapControlPointsNV (GLenum, GLuint, GLenum, GLsizei, GLsizei, GLint, GLint, GLboolean, const GLvoid *);
+GLAPI void APIENTRY glMapParameterivNV (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glMapParameterfvNV (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glGetMapControlPointsNV (GLenum, GLuint, GLenum, GLsizei, GLsizei, GLboolean, GLvoid *);
+GLAPI void APIENTRY glGetMapParameterivNV (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetMapParameterfvNV (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetMapAttribParameterivNV (GLenum, GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetMapAttribParameterfvNV (GLenum, GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glEvalMapsNV (GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLMAPCONTROLPOINTSNVPROC) (GLenum target, GLuint index, GLenum type, GLsizei ustride, GLsizei vstride, GLint uorder, GLint vorder, GLboolean packed, const GLvoid *points);
+typedef void (APIENTRYP PFNGLMAPPARAMETERIVNVPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLMAPPARAMETERFVNVPROC) (GLenum target, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGETMAPCONTROLPOINTSNVPROC) (GLenum target, GLuint index, GLenum type, GLsizei ustride, GLsizei vstride, GLboolean packed, GLvoid *points);
+typedef void (APIENTRYP PFNGLGETMAPPARAMETERIVNVPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETMAPPARAMETERFVNVPROC) (GLenum target, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETMAPATTRIBPARAMETERIVNVPROC) (GLenum target, GLuint index, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETMAPATTRIBPARAMETERFVNVPROC) (GLenum target, GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLEVALMAPSNVPROC) (GLenum target, GLenum mode);
+#endif
+
+#ifndef GL_NV_packed_depth_stencil
+#define GL_NV_packed_depth_stencil 1
+#endif
+
+#ifndef GL_NV_register_combiners2
+#define GL_NV_register_combiners2 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glCombinerStageParameterfvNV (GLenum, GLenum, const GLfloat *);
+GLAPI void APIENTRY glGetCombinerStageParameterfvNV (GLenum, GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOMBINERSTAGEPARAMETERFVNVPROC) (GLenum stage, GLenum pname, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGETCOMBINERSTAGEPARAMETERFVNVPROC) (GLenum stage, GLenum pname, GLfloat *params);
+#endif
+
+#ifndef GL_NV_texture_compression_vtc
+#define GL_NV_texture_compression_vtc 1
+#endif
+
+#ifndef GL_NV_texture_rectangle
+#define GL_NV_texture_rectangle 1
+#endif
+
+#ifndef GL_NV_texture_shader
+#define GL_NV_texture_shader 1
+#endif
+
+#ifndef GL_NV_texture_shader2
+#define GL_NV_texture_shader2 1
+#endif
+
+#ifndef GL_NV_vertex_array_range2
+#define GL_NV_vertex_array_range2 1
+#endif
+
+#ifndef GL_NV_vertex_program
+#define GL_NV_vertex_program 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLboolean APIENTRY glAreProgramsResidentNV (GLsizei, const GLuint *, GLboolean *);
+GLAPI void APIENTRY glBindProgramNV (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteProgramsNV (GLsizei, const GLuint *);
+GLAPI void APIENTRY glExecuteProgramNV (GLenum, GLuint, const GLfloat *);
+GLAPI void APIENTRY glGenProgramsNV (GLsizei, GLuint *);
+GLAPI void APIENTRY glGetProgramParameterdvNV (GLenum, GLuint, GLenum, GLdouble *);
+GLAPI void APIENTRY glGetProgramParameterfvNV (GLenum, GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetProgramivNV (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetProgramStringNV (GLuint, GLenum, GLubyte *);
+GLAPI void APIENTRY glGetTrackMatrixivNV (GLenum, GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVertexAttribdvNV (GLuint, GLenum, GLdouble *);
+GLAPI void APIENTRY glGetVertexAttribfvNV (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVertexAttribivNV (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVertexAttribPointervNV (GLuint, GLenum, GLvoid* *);
+GLAPI GLboolean APIENTRY glIsProgramNV (GLuint);
+GLAPI void APIENTRY glLoadProgramNV (GLenum, GLuint, GLsizei, const GLubyte *);
+GLAPI void APIENTRY glProgramParameter4dNV (GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glProgramParameter4dvNV (GLenum, GLuint, const GLdouble *);
+GLAPI void APIENTRY glProgramParameter4fNV (GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glProgramParameter4fvNV (GLenum, GLuint, const GLfloat *);
+GLAPI void APIENTRY glProgramParameters4dvNV (GLenum, GLuint, GLuint, const GLdouble *);
+GLAPI void APIENTRY glProgramParameters4fvNV (GLenum, GLuint, GLuint, const GLfloat *);
+GLAPI void APIENTRY glRequestResidentProgramsNV (GLsizei, const GLuint *);
+GLAPI void APIENTRY glTrackMatrixNV (GLenum, GLuint, GLenum, GLenum);
+GLAPI void APIENTRY glVertexAttribPointerNV (GLuint, GLint, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glVertexAttrib1dNV (GLuint, GLdouble);
+GLAPI void APIENTRY glVertexAttrib1dvNV (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib1fNV (GLuint, GLfloat);
+GLAPI void APIENTRY glVertexAttrib1fvNV (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib1sNV (GLuint, GLshort);
+GLAPI void APIENTRY glVertexAttrib1svNV (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib2dNV (GLuint, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib2dvNV (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib2fNV (GLuint, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib2fvNV (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib2sNV (GLuint, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib2svNV (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib3dNV (GLuint, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib3dvNV (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib3fNV (GLuint, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib3fvNV (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib3sNV (GLuint, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib3svNV (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4dNV (GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexAttrib4dvNV (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVertexAttrib4fNV (GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexAttrib4fvNV (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVertexAttrib4sNV (GLuint, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexAttrib4svNV (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttrib4ubNV (GLuint, GLubyte, GLubyte, GLubyte, GLubyte);
+GLAPI void APIENTRY glVertexAttrib4ubvNV (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttribs1dvNV (GLuint, GLsizei, const GLdouble *);
+GLAPI void APIENTRY glVertexAttribs1fvNV (GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glVertexAttribs1svNV (GLuint, GLsizei, const GLshort *);
+GLAPI void APIENTRY glVertexAttribs2dvNV (GLuint, GLsizei, const GLdouble *);
+GLAPI void APIENTRY glVertexAttribs2fvNV (GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glVertexAttribs2svNV (GLuint, GLsizei, const GLshort *);
+GLAPI void APIENTRY glVertexAttribs3dvNV (GLuint, GLsizei, const GLdouble *);
+GLAPI void APIENTRY glVertexAttribs3fvNV (GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glVertexAttribs3svNV (GLuint, GLsizei, const GLshort *);
+GLAPI void APIENTRY glVertexAttribs4dvNV (GLuint, GLsizei, const GLdouble *);
+GLAPI void APIENTRY glVertexAttribs4fvNV (GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glVertexAttribs4svNV (GLuint, GLsizei, const GLshort *);
+GLAPI void APIENTRY glVertexAttribs4ubvNV (GLuint, GLsizei, const GLubyte *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLboolean (APIENTRYP PFNGLAREPROGRAMSRESIDENTNVPROC) (GLsizei n, const GLuint *programs, GLboolean *residences);
+typedef void (APIENTRYP PFNGLBINDPROGRAMNVPROC) (GLenum target, GLuint id);
+typedef void (APIENTRYP PFNGLDELETEPROGRAMSNVPROC) (GLsizei n, const GLuint *programs);
+typedef void (APIENTRYP PFNGLEXECUTEPROGRAMNVPROC) (GLenum target, GLuint id, const GLfloat *params);
+typedef void (APIENTRYP PFNGLGENPROGRAMSNVPROC) (GLsizei n, GLuint *programs);
+typedef void (APIENTRYP PFNGLGETPROGRAMPARAMETERDVNVPROC) (GLenum target, GLuint index, GLenum pname, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMPARAMETERFVNVPROC) (GLenum target, GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMIVNVPROC) (GLuint id, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMSTRINGNVPROC) (GLuint id, GLenum pname, GLubyte *program);
+typedef void (APIENTRYP PFNGLGETTRACKMATRIXIVNVPROC) (GLenum target, GLuint address, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBDVNVPROC) (GLuint index, GLenum pname, GLdouble *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBFVNVPROC) (GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBIVNVPROC) (GLuint index, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVNVPROC) (GLuint index, GLenum pname, GLvoid* *pointer);
+typedef GLboolean (APIENTRYP PFNGLISPROGRAMNVPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLLOADPROGRAMNVPROC) (GLenum target, GLuint id, GLsizei len, const GLubyte *program);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETER4DNVPROC) (GLenum target, GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETER4DVNVPROC) (GLenum target, GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETER4FNVPROC) (GLenum target, GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETER4FVNVPROC) (GLenum target, GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETERS4DVNVPROC) (GLenum target, GLuint index, GLuint count, const GLdouble *v);
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETERS4FVNVPROC) (GLenum target, GLuint index, GLuint count, const GLfloat *v);
+typedef void (APIENTRYP PFNGLREQUESTRESIDENTPROGRAMSNVPROC) (GLsizei n, const GLuint *programs);
+typedef void (APIENTRYP PFNGLTRACKMATRIXNVPROC) (GLenum target, GLuint address, GLenum matrix, GLenum transform);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBPOINTERNVPROC) (GLuint index, GLint fsize, GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DNVPROC) (GLuint index, GLdouble x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1DVNVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FNVPROC) (GLuint index, GLfloat x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1FVNVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SNVPROC) (GLuint index, GLshort x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1SVNVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DNVPROC) (GLuint index, GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2DVNVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FNVPROC) (GLuint index, GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2FVNVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SNVPROC) (GLuint index, GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2SVNVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DNVPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3DVNVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FNVPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3FVNVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SNVPROC) (GLuint index, GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3SVNVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DNVPROC) (GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4DVNVPROC) (GLuint index, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FNVPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4FVNVPROC) (GLuint index, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SNVPROC) (GLuint index, GLshort x, GLshort y, GLshort z, GLshort w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4SVNVPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UBNVPROC) (GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4UBVNVPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS1DVNVPROC) (GLuint index, GLsizei count, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS1FVNVPROC) (GLuint index, GLsizei count, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS1SVNVPROC) (GLuint index, GLsizei count, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS2DVNVPROC) (GLuint index, GLsizei count, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS2FVNVPROC) (GLuint index, GLsizei count, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS2SVNVPROC) (GLuint index, GLsizei count, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS3DVNVPROC) (GLuint index, GLsizei count, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS3FVNVPROC) (GLuint index, GLsizei count, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS3SVNVPROC) (GLuint index, GLsizei count, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS4DVNVPROC) (GLuint index, GLsizei count, const GLdouble *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS4FVNVPROC) (GLuint index, GLsizei count, const GLfloat *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS4SVNVPROC) (GLuint index, GLsizei count, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS4UBVNVPROC) (GLuint index, GLsizei count, const GLubyte *v);
+#endif
+
+#ifndef GL_SGIX_texture_coordinate_clamp
+#define GL_SGIX_texture_coordinate_clamp 1
+#endif
+
+#ifndef GL_SGIX_scalebias_hint
+#define GL_SGIX_scalebias_hint 1
+#endif
+
+#ifndef GL_OML_interlace
+#define GL_OML_interlace 1
+#endif
+
+#ifndef GL_OML_subsample
+#define GL_OML_subsample 1
+#endif
+
+#ifndef GL_OML_resample
+#define GL_OML_resample 1
+#endif
+
+#ifndef GL_NV_copy_depth_to_color
+#define GL_NV_copy_depth_to_color 1
+#endif
+
+#ifndef GL_ATI_envmap_bumpmap
+#define GL_ATI_envmap_bumpmap 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexBumpParameterivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glTexBumpParameterfvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glGetTexBumpParameterivATI (GLenum, GLint *);
+GLAPI void APIENTRY glGetTexBumpParameterfvATI (GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXBUMPPARAMETERIVATIPROC) (GLenum pname, const GLint *param);
+typedef void (APIENTRYP PFNGLTEXBUMPPARAMETERFVATIPROC) (GLenum pname, const GLfloat *param);
+typedef void (APIENTRYP PFNGLGETTEXBUMPPARAMETERIVATIPROC) (GLenum pname, GLint *param);
+typedef void (APIENTRYP PFNGLGETTEXBUMPPARAMETERFVATIPROC) (GLenum pname, GLfloat *param);
+#endif
+
+#ifndef GL_ATI_fragment_shader
+#define GL_ATI_fragment_shader 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLuint APIENTRY glGenFragmentShadersATI (GLuint);
+GLAPI void APIENTRY glBindFragmentShaderATI (GLuint);
+GLAPI void APIENTRY glDeleteFragmentShaderATI (GLuint);
+GLAPI void APIENTRY glBeginFragmentShaderATI (void);
+GLAPI void APIENTRY glEndFragmentShaderATI (void);
+GLAPI void APIENTRY glPassTexCoordATI (GLuint, GLuint, GLenum);
+GLAPI void APIENTRY glSampleMapATI (GLuint, GLuint, GLenum);
+GLAPI void APIENTRY glColorFragmentOp1ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glColorFragmentOp2ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glColorFragmentOp3ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glAlphaFragmentOp1ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glAlphaFragmentOp2ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glAlphaFragmentOp3ATI (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glSetFragmentShaderConstantATI (GLuint, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLuint (APIENTRYP PFNGLGENFRAGMENTSHADERSATIPROC) (GLuint range);
+typedef void (APIENTRYP PFNGLBINDFRAGMENTSHADERATIPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLDELETEFRAGMENTSHADERATIPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLBEGINFRAGMENTSHADERATIPROC) (void);
+typedef void (APIENTRYP PFNGLENDFRAGMENTSHADERATIPROC) (void);
+typedef void (APIENTRYP PFNGLPASSTEXCOORDATIPROC) (GLuint dst, GLuint coord, GLenum swizzle);
+typedef void (APIENTRYP PFNGLSAMPLEMAPATIPROC) (GLuint dst, GLuint interp, GLenum swizzle);
+typedef void (APIENTRYP PFNGLCOLORFRAGMENTOP1ATIPROC) (GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod);
+typedef void (APIENTRYP PFNGLCOLORFRAGMENTOP2ATIPROC) (GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod);
+typedef void (APIENTRYP PFNGLCOLORFRAGMENTOP3ATIPROC) (GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod);
+typedef void (APIENTRYP PFNGLALPHAFRAGMENTOP1ATIPROC) (GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod);
+typedef void (APIENTRYP PFNGLALPHAFRAGMENTOP2ATIPROC) (GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod);
+typedef void (APIENTRYP PFNGLALPHAFRAGMENTOP3ATIPROC) (GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod);
+typedef void (APIENTRYP PFNGLSETFRAGMENTSHADERCONSTANTATIPROC) (GLuint dst, const GLfloat *value);
+#endif
+
+#ifndef GL_ATI_pn_triangles
+#define GL_ATI_pn_triangles 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPNTrianglesiATI (GLenum, GLint);
+GLAPI void APIENTRY glPNTrianglesfATI (GLenum, GLfloat);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPNTRIANGLESIATIPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLPNTRIANGLESFATIPROC) (GLenum pname, GLfloat param);
+#endif
+
+#ifndef GL_ATI_vertex_array_object
+#define GL_ATI_vertex_array_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLuint APIENTRY glNewObjectBufferATI (GLsizei, const GLvoid *, GLenum);
+GLAPI GLboolean APIENTRY glIsObjectBufferATI (GLuint);
+GLAPI void APIENTRY glUpdateObjectBufferATI (GLuint, GLuint, GLsizei, const GLvoid *, GLenum);
+GLAPI void APIENTRY glGetObjectBufferfvATI (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetObjectBufferivATI (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glFreeObjectBufferATI (GLuint);
+GLAPI void APIENTRY glArrayObjectATI (GLenum, GLint, GLenum, GLsizei, GLuint, GLuint);
+GLAPI void APIENTRY glGetArrayObjectfvATI (GLenum, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetArrayObjectivATI (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glVariantArrayObjectATI (GLuint, GLenum, GLsizei, GLuint, GLuint);
+GLAPI void APIENTRY glGetVariantArrayObjectfvATI (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVariantArrayObjectivATI (GLuint, GLenum, GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLuint (APIENTRYP PFNGLNEWOBJECTBUFFERATIPROC) (GLsizei size, const GLvoid *pointer, GLenum usage);
+typedef GLboolean (APIENTRYP PFNGLISOBJECTBUFFERATIPROC) (GLuint buffer);
+typedef void (APIENTRYP PFNGLUPDATEOBJECTBUFFERATIPROC) (GLuint buffer, GLuint offset, GLsizei size, const GLvoid *pointer, GLenum preserve);
+typedef void (APIENTRYP PFNGLGETOBJECTBUFFERFVATIPROC) (GLuint buffer, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETOBJECTBUFFERIVATIPROC) (GLuint buffer, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLFREEOBJECTBUFFERATIPROC) (GLuint buffer);
+typedef void (APIENTRYP PFNGLARRAYOBJECTATIPROC) (GLenum array, GLint size, GLenum type, GLsizei stride, GLuint buffer, GLuint offset);
+typedef void (APIENTRYP PFNGLGETARRAYOBJECTFVATIPROC) (GLenum array, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETARRAYOBJECTIVATIPROC) (GLenum array, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLVARIANTARRAYOBJECTATIPROC) (GLuint id, GLenum type, GLsizei stride, GLuint buffer, GLuint offset);
+typedef void (APIENTRYP PFNGLGETVARIANTARRAYOBJECTFVATIPROC) (GLuint id, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETVARIANTARRAYOBJECTIVATIPROC) (GLuint id, GLenum pname, GLint *params);
+#endif
+
+#ifndef GL_EXT_vertex_shader
+#define GL_EXT_vertex_shader 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBeginVertexShaderEXT (void);
+GLAPI void APIENTRY glEndVertexShaderEXT (void);
+GLAPI void APIENTRY glBindVertexShaderEXT (GLuint);
+GLAPI GLuint APIENTRY glGenVertexShadersEXT (GLuint);
+GLAPI void APIENTRY glDeleteVertexShaderEXT (GLuint);
+GLAPI void APIENTRY glShaderOp1EXT (GLenum, GLuint, GLuint);
+GLAPI void APIENTRY glShaderOp2EXT (GLenum, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glShaderOp3EXT (GLenum, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glSwizzleEXT (GLuint, GLuint, GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glWriteMaskEXT (GLuint, GLuint, GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glInsertComponentEXT (GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glExtractComponentEXT (GLuint, GLuint, GLuint);
+GLAPI GLuint APIENTRY glGenSymbolsEXT (GLenum, GLenum, GLenum, GLuint);
+GLAPI void APIENTRY glSetInvariantEXT (GLuint, GLenum, const GLvoid *);
+GLAPI void APIENTRY glSetLocalConstantEXT (GLuint, GLenum, const GLvoid *);
+GLAPI void APIENTRY glVariantbvEXT (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVariantsvEXT (GLuint, const GLshort *);
+GLAPI void APIENTRY glVariantivEXT (GLuint, const GLint *);
+GLAPI void APIENTRY glVariantfvEXT (GLuint, const GLfloat *);
+GLAPI void APIENTRY glVariantdvEXT (GLuint, const GLdouble *);
+GLAPI void APIENTRY glVariantubvEXT (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVariantusvEXT (GLuint, const GLushort *);
+GLAPI void APIENTRY glVariantuivEXT (GLuint, const GLuint *);
+GLAPI void APIENTRY glVariantPointerEXT (GLuint, GLenum, GLuint, const GLvoid *);
+GLAPI void APIENTRY glEnableVariantClientStateEXT (GLuint);
+GLAPI void APIENTRY glDisableVariantClientStateEXT (GLuint);
+GLAPI GLuint APIENTRY glBindLightParameterEXT (GLenum, GLenum);
+GLAPI GLuint APIENTRY glBindMaterialParameterEXT (GLenum, GLenum);
+GLAPI GLuint APIENTRY glBindTexGenParameterEXT (GLenum, GLenum, GLenum);
+GLAPI GLuint APIENTRY glBindTextureUnitParameterEXT (GLenum, GLenum);
+GLAPI GLuint APIENTRY glBindParameterEXT (GLenum);
+GLAPI GLboolean APIENTRY glIsVariantEnabledEXT (GLuint, GLenum);
+GLAPI void APIENTRY glGetVariantBooleanvEXT (GLuint, GLenum, GLboolean *);
+GLAPI void APIENTRY glGetVariantIntegervEXT (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVariantFloatvEXT (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVariantPointervEXT (GLuint, GLenum, GLvoid* *);
+GLAPI void APIENTRY glGetInvariantBooleanvEXT (GLuint, GLenum, GLboolean *);
+GLAPI void APIENTRY glGetInvariantIntegervEXT (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetInvariantFloatvEXT (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetLocalConstantBooleanvEXT (GLuint, GLenum, GLboolean *);
+GLAPI void APIENTRY glGetLocalConstantIntegervEXT (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetLocalConstantFloatvEXT (GLuint, GLenum, GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBEGINVERTEXSHADEREXTPROC) (void);
+typedef void (APIENTRYP PFNGLENDVERTEXSHADEREXTPROC) (void);
+typedef void (APIENTRYP PFNGLBINDVERTEXSHADEREXTPROC) (GLuint id);
+typedef GLuint (APIENTRYP PFNGLGENVERTEXSHADERSEXTPROC) (GLuint range);
+typedef void (APIENTRYP PFNGLDELETEVERTEXSHADEREXTPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLSHADEROP1EXTPROC) (GLenum op, GLuint res, GLuint arg1);
+typedef void (APIENTRYP PFNGLSHADEROP2EXTPROC) (GLenum op, GLuint res, GLuint arg1, GLuint arg2);
+typedef void (APIENTRYP PFNGLSHADEROP3EXTPROC) (GLenum op, GLuint res, GLuint arg1, GLuint arg2, GLuint arg3);
+typedef void (APIENTRYP PFNGLSWIZZLEEXTPROC) (GLuint res, GLuint in, GLenum outX, GLenum outY, GLenum outZ, GLenum outW);
+typedef void (APIENTRYP PFNGLWRITEMASKEXTPROC) (GLuint res, GLuint in, GLenum outX, GLenum outY, GLenum outZ, GLenum outW);
+typedef void (APIENTRYP PFNGLINSERTCOMPONENTEXTPROC) (GLuint res, GLuint src, GLuint num);
+typedef void (APIENTRYP PFNGLEXTRACTCOMPONENTEXTPROC) (GLuint res, GLuint src, GLuint num);
+typedef GLuint (APIENTRYP PFNGLGENSYMBOLSEXTPROC) (GLenum datatype, GLenum storagetype, GLenum range, GLuint components);
+typedef void (APIENTRYP PFNGLSETINVARIANTEXTPROC) (GLuint id, GLenum type, const GLvoid *addr);
+typedef void (APIENTRYP PFNGLSETLOCALCONSTANTEXTPROC) (GLuint id, GLenum type, const GLvoid *addr);
+typedef void (APIENTRYP PFNGLVARIANTBVEXTPROC) (GLuint id, const GLbyte *addr);
+typedef void (APIENTRYP PFNGLVARIANTSVEXTPROC) (GLuint id, const GLshort *addr);
+typedef void (APIENTRYP PFNGLVARIANTIVEXTPROC) (GLuint id, const GLint *addr);
+typedef void (APIENTRYP PFNGLVARIANTFVEXTPROC) (GLuint id, const GLfloat *addr);
+typedef void (APIENTRYP PFNGLVARIANTDVEXTPROC) (GLuint id, const GLdouble *addr);
+typedef void (APIENTRYP PFNGLVARIANTUBVEXTPROC) (GLuint id, const GLubyte *addr);
+typedef void (APIENTRYP PFNGLVARIANTUSVEXTPROC) (GLuint id, const GLushort *addr);
+typedef void (APIENTRYP PFNGLVARIANTUIVEXTPROC) (GLuint id, const GLuint *addr);
+typedef void (APIENTRYP PFNGLVARIANTPOINTEREXTPROC) (GLuint id, GLenum type, GLuint stride, const GLvoid *addr);
+typedef void (APIENTRYP PFNGLENABLEVARIANTCLIENTSTATEEXTPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLDISABLEVARIANTCLIENTSTATEEXTPROC) (GLuint id);
+typedef GLuint (APIENTRYP PFNGLBINDLIGHTPARAMETEREXTPROC) (GLenum light, GLenum value);
+typedef GLuint (APIENTRYP PFNGLBINDMATERIALPARAMETEREXTPROC) (GLenum face, GLenum value);
+typedef GLuint (APIENTRYP PFNGLBINDTEXGENPARAMETEREXTPROC) (GLenum unit, GLenum coord, GLenum value);
+typedef GLuint (APIENTRYP PFNGLBINDTEXTUREUNITPARAMETEREXTPROC) (GLenum unit, GLenum value);
+typedef GLuint (APIENTRYP PFNGLBINDPARAMETEREXTPROC) (GLenum value);
+typedef GLboolean (APIENTRYP PFNGLISVARIANTENABLEDEXTPROC) (GLuint id, GLenum cap);
+typedef void (APIENTRYP PFNGLGETVARIANTBOOLEANVEXTPROC) (GLuint id, GLenum value, GLboolean *data);
+typedef void (APIENTRYP PFNGLGETVARIANTINTEGERVEXTPROC) (GLuint id, GLenum value, GLint *data);
+typedef void (APIENTRYP PFNGLGETVARIANTFLOATVEXTPROC) (GLuint id, GLenum value, GLfloat *data);
+typedef void (APIENTRYP PFNGLGETVARIANTPOINTERVEXTPROC) (GLuint id, GLenum value, GLvoid* *data);
+typedef void (APIENTRYP PFNGLGETINVARIANTBOOLEANVEXTPROC) (GLuint id, GLenum value, GLboolean *data);
+typedef void (APIENTRYP PFNGLGETINVARIANTINTEGERVEXTPROC) (GLuint id, GLenum value, GLint *data);
+typedef void (APIENTRYP PFNGLGETINVARIANTFLOATVEXTPROC) (GLuint id, GLenum value, GLfloat *data);
+typedef void (APIENTRYP PFNGLGETLOCALCONSTANTBOOLEANVEXTPROC) (GLuint id, GLenum value, GLboolean *data);
+typedef void (APIENTRYP PFNGLGETLOCALCONSTANTINTEGERVEXTPROC) (GLuint id, GLenum value, GLint *data);
+typedef void (APIENTRYP PFNGLGETLOCALCONSTANTFLOATVEXTPROC) (GLuint id, GLenum value, GLfloat *data);
+#endif
+
+#ifndef GL_ATI_vertex_streams
+#define GL_ATI_vertex_streams 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexStream1sATI (GLenum, GLshort);
+GLAPI void APIENTRY glVertexStream1svATI (GLenum, const GLshort *);
+GLAPI void APIENTRY glVertexStream1iATI (GLenum, GLint);
+GLAPI void APIENTRY glVertexStream1ivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glVertexStream1fATI (GLenum, GLfloat);
+GLAPI void APIENTRY glVertexStream1fvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glVertexStream1dATI (GLenum, GLdouble);
+GLAPI void APIENTRY glVertexStream1dvATI (GLenum, const GLdouble *);
+GLAPI void APIENTRY glVertexStream2sATI (GLenum, GLshort, GLshort);
+GLAPI void APIENTRY glVertexStream2svATI (GLenum, const GLshort *);
+GLAPI void APIENTRY glVertexStream2iATI (GLenum, GLint, GLint);
+GLAPI void APIENTRY glVertexStream2ivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glVertexStream2fATI (GLenum, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexStream2fvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glVertexStream2dATI (GLenum, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexStream2dvATI (GLenum, const GLdouble *);
+GLAPI void APIENTRY glVertexStream3sATI (GLenum, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexStream3svATI (GLenum, const GLshort *);
+GLAPI void APIENTRY glVertexStream3iATI (GLenum, GLint, GLint, GLint);
+GLAPI void APIENTRY glVertexStream3ivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glVertexStream3fATI (GLenum, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexStream3fvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glVertexStream3dATI (GLenum, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexStream3dvATI (GLenum, const GLdouble *);
+GLAPI void APIENTRY glVertexStream4sATI (GLenum, GLshort, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glVertexStream4svATI (GLenum, const GLshort *);
+GLAPI void APIENTRY glVertexStream4iATI (GLenum, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glVertexStream4ivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glVertexStream4fATI (GLenum, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glVertexStream4fvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glVertexStream4dATI (GLenum, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glVertexStream4dvATI (GLenum, const GLdouble *);
+GLAPI void APIENTRY glNormalStream3bATI (GLenum, GLbyte, GLbyte, GLbyte);
+GLAPI void APIENTRY glNormalStream3bvATI (GLenum, const GLbyte *);
+GLAPI void APIENTRY glNormalStream3sATI (GLenum, GLshort, GLshort, GLshort);
+GLAPI void APIENTRY glNormalStream3svATI (GLenum, const GLshort *);
+GLAPI void APIENTRY glNormalStream3iATI (GLenum, GLint, GLint, GLint);
+GLAPI void APIENTRY glNormalStream3ivATI (GLenum, const GLint *);
+GLAPI void APIENTRY glNormalStream3fATI (GLenum, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glNormalStream3fvATI (GLenum, const GLfloat *);
+GLAPI void APIENTRY glNormalStream3dATI (GLenum, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glNormalStream3dvATI (GLenum, const GLdouble *);
+GLAPI void APIENTRY glClientActiveVertexStreamATI (GLenum);
+GLAPI void APIENTRY glVertexBlendEnviATI (GLenum, GLint);
+GLAPI void APIENTRY glVertexBlendEnvfATI (GLenum, GLfloat);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1SATIPROC) (GLenum stream, GLshort x);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1SVATIPROC) (GLenum stream, const GLshort *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1IATIPROC) (GLenum stream, GLint x);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1IVATIPROC) (GLenum stream, const GLint *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1FATIPROC) (GLenum stream, GLfloat x);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1FVATIPROC) (GLenum stream, const GLfloat *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1DATIPROC) (GLenum stream, GLdouble x);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM1DVATIPROC) (GLenum stream, const GLdouble *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2SATIPROC) (GLenum stream, GLshort x, GLshort y);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2SVATIPROC) (GLenum stream, const GLshort *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2IATIPROC) (GLenum stream, GLint x, GLint y);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2IVATIPROC) (GLenum stream, const GLint *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2FATIPROC) (GLenum stream, GLfloat x, GLfloat y);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2FVATIPROC) (GLenum stream, const GLfloat *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2DATIPROC) (GLenum stream, GLdouble x, GLdouble y);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM2DVATIPROC) (GLenum stream, const GLdouble *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3SATIPROC) (GLenum stream, GLshort x, GLshort y, GLshort z);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3SVATIPROC) (GLenum stream, const GLshort *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3IATIPROC) (GLenum stream, GLint x, GLint y, GLint z);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3IVATIPROC) (GLenum stream, const GLint *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3FATIPROC) (GLenum stream, GLfloat x, GLfloat y, GLfloat z);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3FVATIPROC) (GLenum stream, const GLfloat *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3DATIPROC) (GLenum stream, GLdouble x, GLdouble y, GLdouble z);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM3DVATIPROC) (GLenum stream, const GLdouble *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4SATIPROC) (GLenum stream, GLshort x, GLshort y, GLshort z, GLshort w);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4SVATIPROC) (GLenum stream, const GLshort *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4IATIPROC) (GLenum stream, GLint x, GLint y, GLint z, GLint w);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4IVATIPROC) (GLenum stream, const GLint *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4FATIPROC) (GLenum stream, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4FVATIPROC) (GLenum stream, const GLfloat *coords);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4DATIPROC) (GLenum stream, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLVERTEXSTREAM4DVATIPROC) (GLenum stream, const GLdouble *coords);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3BATIPROC) (GLenum stream, GLbyte nx, GLbyte ny, GLbyte nz);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3BVATIPROC) (GLenum stream, const GLbyte *coords);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3SATIPROC) (GLenum stream, GLshort nx, GLshort ny, GLshort nz);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3SVATIPROC) (GLenum stream, const GLshort *coords);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3IATIPROC) (GLenum stream, GLint nx, GLint ny, GLint nz);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3IVATIPROC) (GLenum stream, const GLint *coords);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3FATIPROC) (GLenum stream, GLfloat nx, GLfloat ny, GLfloat nz);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3FVATIPROC) (GLenum stream, const GLfloat *coords);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3DATIPROC) (GLenum stream, GLdouble nx, GLdouble ny, GLdouble nz);
+typedef void (APIENTRYP PFNGLNORMALSTREAM3DVATIPROC) (GLenum stream, const GLdouble *coords);
+typedef void (APIENTRYP PFNGLCLIENTACTIVEVERTEXSTREAMATIPROC) (GLenum stream);
+typedef void (APIENTRYP PFNGLVERTEXBLENDENVIATIPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLVERTEXBLENDENVFATIPROC) (GLenum pname, GLfloat param);
+#endif
+
+#ifndef GL_ATI_element_array
+#define GL_ATI_element_array 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glElementPointerATI (GLenum, const GLvoid *);
+GLAPI void APIENTRY glDrawElementArrayATI (GLenum, GLsizei);
+GLAPI void APIENTRY glDrawRangeElementArrayATI (GLenum, GLuint, GLuint, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLELEMENTPOINTERATIPROC) (GLenum type, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLDRAWELEMENTARRAYATIPROC) (GLenum mode, GLsizei count);
+typedef void (APIENTRYP PFNGLDRAWRANGEELEMENTARRAYATIPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count);
+#endif
+
+#ifndef GL_SUN_mesh_array
+#define GL_SUN_mesh_array 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDrawMeshArraysSUN (GLenum, GLint, GLsizei, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDRAWMESHARRAYSSUNPROC) (GLenum mode, GLint first, GLsizei count, GLsizei width);
+#endif
+
+#ifndef GL_SUN_slice_accum
+#define GL_SUN_slice_accum 1
+#endif
+
+#ifndef GL_NV_multisample_filter_hint
+#define GL_NV_multisample_filter_hint 1
+#endif
+
+#ifndef GL_NV_depth_clamp
+#define GL_NV_depth_clamp 1
+#endif
+
+#ifndef GL_NV_occlusion_query
+#define GL_NV_occlusion_query 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGenOcclusionQueriesNV (GLsizei, GLuint *);
+GLAPI void APIENTRY glDeleteOcclusionQueriesNV (GLsizei, const GLuint *);
+GLAPI GLboolean APIENTRY glIsOcclusionQueryNV (GLuint);
+GLAPI void APIENTRY glBeginOcclusionQueryNV (GLuint);
+GLAPI void APIENTRY glEndOcclusionQueryNV (void);
+GLAPI void APIENTRY glGetOcclusionQueryivNV (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetOcclusionQueryuivNV (GLuint, GLenum, GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGENOCCLUSIONQUERIESNVPROC) (GLsizei n, GLuint *ids);
+typedef void (APIENTRYP PFNGLDELETEOCCLUSIONQUERIESNVPROC) (GLsizei n, const GLuint *ids);
+typedef GLboolean (APIENTRYP PFNGLISOCCLUSIONQUERYNVPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLBEGINOCCLUSIONQUERYNVPROC) (GLuint id);
+typedef void (APIENTRYP PFNGLENDOCCLUSIONQUERYNVPROC) (void);
+typedef void (APIENTRYP PFNGLGETOCCLUSIONQUERYIVNVPROC) (GLuint id, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETOCCLUSIONQUERYUIVNVPROC) (GLuint id, GLenum pname, GLuint *params);
+#endif
+
+#ifndef GL_NV_point_sprite
+#define GL_NV_point_sprite 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPointParameteriNV (GLenum, GLint);
+GLAPI void APIENTRY glPointParameterivNV (GLenum, const GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPOINTPARAMETERINVPROC) (GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLPOINTPARAMETERIVNVPROC) (GLenum pname, const GLint *params);
+#endif
+
+#ifndef GL_NV_texture_shader3
+#define GL_NV_texture_shader3 1
+#endif
+
+#ifndef GL_NV_vertex_program1_1
+#define GL_NV_vertex_program1_1 1
+#endif
+
+#ifndef GL_EXT_shadow_funcs
+#define GL_EXT_shadow_funcs 1
+#endif
+
+#ifndef GL_EXT_stencil_two_side
+#define GL_EXT_stencil_two_side 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glActiveStencilFaceEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLACTIVESTENCILFACEEXTPROC) (GLenum face);
+#endif
+
+#ifndef GL_ATI_text_fragment_shader
+#define GL_ATI_text_fragment_shader 1
+#endif
+
+#ifndef GL_APPLE_client_storage
+#define GL_APPLE_client_storage 1
+#endif
+
+#ifndef GL_APPLE_element_array
+#define GL_APPLE_element_array 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glElementPointerAPPLE (GLenum, const GLvoid *);
+GLAPI void APIENTRY glDrawElementArrayAPPLE (GLenum, GLint, GLsizei);
+GLAPI void APIENTRY glDrawRangeElementArrayAPPLE (GLenum, GLuint, GLuint, GLint, GLsizei);
+GLAPI void APIENTRY glMultiDrawElementArrayAPPLE (GLenum, const GLint *, const GLsizei *, GLsizei);
+GLAPI void APIENTRY glMultiDrawRangeElementArrayAPPLE (GLenum, GLuint, GLuint, const GLint *, const GLsizei *, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLELEMENTPOINTERAPPLEPROC) (GLenum type, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLDRAWELEMENTARRAYAPPLEPROC) (GLenum mode, GLint first, GLsizei count);
+typedef void (APIENTRYP PFNGLDRAWRANGEELEMENTARRAYAPPLEPROC) (GLenum mode, GLuint start, GLuint end, GLint first, GLsizei count);
+typedef void (APIENTRYP PFNGLMULTIDRAWELEMENTARRAYAPPLEPROC) (GLenum mode, const GLint *first, const GLsizei *count, GLsizei primcount);
+typedef void (APIENTRYP PFNGLMULTIDRAWRANGEELEMENTARRAYAPPLEPROC) (GLenum mode, GLuint start, GLuint end, const GLint *first, const GLsizei *count, GLsizei primcount);
+#endif
+
+#ifndef GL_APPLE_fence
+#define GL_APPLE_fence 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGenFencesAPPLE (GLsizei, GLuint *);
+GLAPI void APIENTRY glDeleteFencesAPPLE (GLsizei, const GLuint *);
+GLAPI void APIENTRY glSetFenceAPPLE (GLuint);
+GLAPI GLboolean APIENTRY glIsFenceAPPLE (GLuint);
+GLAPI GLboolean APIENTRY glTestFenceAPPLE (GLuint);
+GLAPI void APIENTRY glFinishFenceAPPLE (GLuint);
+GLAPI GLboolean APIENTRY glTestObjectAPPLE (GLenum, GLuint);
+GLAPI void APIENTRY glFinishObjectAPPLE (GLenum, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGENFENCESAPPLEPROC) (GLsizei n, GLuint *fences);
+typedef void (APIENTRYP PFNGLDELETEFENCESAPPLEPROC) (GLsizei n, const GLuint *fences);
+typedef void (APIENTRYP PFNGLSETFENCEAPPLEPROC) (GLuint fence);
+typedef GLboolean (APIENTRYP PFNGLISFENCEAPPLEPROC) (GLuint fence);
+typedef GLboolean (APIENTRYP PFNGLTESTFENCEAPPLEPROC) (GLuint fence);
+typedef void (APIENTRYP PFNGLFINISHFENCEAPPLEPROC) (GLuint fence);
+typedef GLboolean (APIENTRYP PFNGLTESTOBJECTAPPLEPROC) (GLenum object, GLuint name);
+typedef void (APIENTRYP PFNGLFINISHOBJECTAPPLEPROC) (GLenum object, GLint name);
+#endif
+
+#ifndef GL_APPLE_vertex_array_object
+#define GL_APPLE_vertex_array_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBindVertexArrayAPPLE (GLuint);
+GLAPI void APIENTRY glDeleteVertexArraysAPPLE (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenVertexArraysAPPLE (GLsizei, GLuint *);
+GLAPI GLboolean APIENTRY glIsVertexArrayAPPLE (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBINDVERTEXARRAYAPPLEPROC) (GLuint array);
+typedef void (APIENTRYP PFNGLDELETEVERTEXARRAYSAPPLEPROC) (GLsizei n, const GLuint *arrays);
+typedef void (APIENTRYP PFNGLGENVERTEXARRAYSAPPLEPROC) (GLsizei n, GLuint *arrays);
+typedef GLboolean (APIENTRYP PFNGLISVERTEXARRAYAPPLEPROC) (GLuint array);
+#endif
+
+#ifndef GL_APPLE_vertex_array_range
+#define GL_APPLE_vertex_array_range 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexArrayRangeAPPLE (GLsizei, GLvoid *);
+GLAPI void APIENTRY glFlushVertexArrayRangeAPPLE (GLsizei, GLvoid *);
+GLAPI void APIENTRY glVertexArrayParameteriAPPLE (GLenum, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXARRAYRANGEAPPLEPROC) (GLsizei length, GLvoid *pointer);
+typedef void (APIENTRYP PFNGLFLUSHVERTEXARRAYRANGEAPPLEPROC) (GLsizei length, GLvoid *pointer);
+typedef void (APIENTRYP PFNGLVERTEXARRAYPARAMETERIAPPLEPROC) (GLenum pname, GLint param);
+#endif
+
+#ifndef GL_APPLE_ycbcr_422
+#define GL_APPLE_ycbcr_422 1
+#endif
+
+#ifndef GL_S3_s3tc
+#define GL_S3_s3tc 1
+#endif
+
+#ifndef GL_ATI_draw_buffers
+#define GL_ATI_draw_buffers 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDrawBuffersATI (GLsizei, const GLenum *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDRAWBUFFERSATIPROC) (GLsizei n, const GLenum *bufs);
+#endif
+
+#ifndef GL_ATI_pixel_format_float
+#define GL_ATI_pixel_format_float 1
+/* This is really a WGL extension, but defines some associated GL enums.
+ * ATI does not export "GL_ATI_pixel_format_float" in the GL_EXTENSIONS string.
+ */
+#endif
+
+#ifndef GL_ATI_texture_env_combine3
+#define GL_ATI_texture_env_combine3 1
+#endif
+
+#ifndef GL_ATI_texture_float
+#define GL_ATI_texture_float 1
+#endif
+
+#ifndef GL_NV_float_buffer
+#define GL_NV_float_buffer 1
+#endif
+
+#ifndef GL_NV_fragment_program
+#define GL_NV_fragment_program 1
+/* Some NV_fragment_program entry points are shared with ARB_vertex_program. */
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramNamedParameter4fNV (GLuint, GLsizei, const GLubyte *, GLfloat, GLfloat, GLfloat, GLfloat);
+GLAPI void APIENTRY glProgramNamedParameter4dNV (GLuint, GLsizei, const GLubyte *, GLdouble, GLdouble, GLdouble, GLdouble);
+GLAPI void APIENTRY glProgramNamedParameter4fvNV (GLuint, GLsizei, const GLubyte *, const GLfloat *);
+GLAPI void APIENTRY glProgramNamedParameter4dvNV (GLuint, GLsizei, const GLubyte *, const GLdouble *);
+GLAPI void APIENTRY glGetProgramNamedParameterfvNV (GLuint, GLsizei, const GLubyte *, GLfloat *);
+GLAPI void APIENTRY glGetProgramNamedParameterdvNV (GLuint, GLsizei, const GLubyte *, GLdouble *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMNAMEDPARAMETER4FNVPROC) (GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+typedef void (APIENTRYP PFNGLPROGRAMNAMEDPARAMETER4DNVPROC) (GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w);
+typedef void (APIENTRYP PFNGLPROGRAMNAMEDPARAMETER4FVNVPROC) (GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v);
+typedef void (APIENTRYP PFNGLPROGRAMNAMEDPARAMETER4DVNVPROC) (GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v);
+typedef void (APIENTRYP PFNGLGETPROGRAMNAMEDPARAMETERFVNVPROC) (GLuint id, GLsizei len, const GLubyte *name, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMNAMEDPARAMETERDVNVPROC) (GLuint id, GLsizei len, const GLubyte *name, GLdouble *params);
+#endif
+
+#ifndef GL_NV_half_float
+#define GL_NV_half_float 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertex2hNV (GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertex2hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glVertex3hNV (GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertex3hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glVertex4hNV (GLhalfNV, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertex4hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glNormal3hNV (GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glNormal3hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glColor3hNV (GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glColor3hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glColor4hNV (GLhalfNV, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glColor4hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glTexCoord1hNV (GLhalfNV);
+GLAPI void APIENTRY glTexCoord1hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glTexCoord2hNV (GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glTexCoord2hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glTexCoord3hNV (GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glTexCoord3hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glTexCoord4hNV (GLhalfNV, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glTexCoord4hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glMultiTexCoord1hNV (GLenum, GLhalfNV);
+GLAPI void APIENTRY glMultiTexCoord1hvNV (GLenum, const GLhalfNV *);
+GLAPI void APIENTRY glMultiTexCoord2hNV (GLenum, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glMultiTexCoord2hvNV (GLenum, const GLhalfNV *);
+GLAPI void APIENTRY glMultiTexCoord3hNV (GLenum, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glMultiTexCoord3hvNV (GLenum, const GLhalfNV *);
+GLAPI void APIENTRY glMultiTexCoord4hNV (GLenum, GLhalfNV, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glMultiTexCoord4hvNV (GLenum, const GLhalfNV *);
+GLAPI void APIENTRY glFogCoordhNV (GLhalfNV);
+GLAPI void APIENTRY glFogCoordhvNV (const GLhalfNV *);
+GLAPI void APIENTRY glSecondaryColor3hNV (GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glSecondaryColor3hvNV (const GLhalfNV *);
+GLAPI void APIENTRY glVertexWeighthNV (GLhalfNV);
+GLAPI void APIENTRY glVertexWeighthvNV (const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttrib1hNV (GLuint, GLhalfNV);
+GLAPI void APIENTRY glVertexAttrib1hvNV (GLuint, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttrib2hNV (GLuint, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertexAttrib2hvNV (GLuint, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttrib3hNV (GLuint, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertexAttrib3hvNV (GLuint, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttrib4hNV (GLuint, GLhalfNV, GLhalfNV, GLhalfNV, GLhalfNV);
+GLAPI void APIENTRY glVertexAttrib4hvNV (GLuint, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttribs1hvNV (GLuint, GLsizei, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttribs2hvNV (GLuint, GLsizei, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttribs3hvNV (GLuint, GLsizei, const GLhalfNV *);
+GLAPI void APIENTRY glVertexAttribs4hvNV (GLuint, GLsizei, const GLhalfNV *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEX2HNVPROC) (GLhalfNV x, GLhalfNV y);
+typedef void (APIENTRYP PFNGLVERTEX2HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEX3HNVPROC) (GLhalfNV x, GLhalfNV y, GLhalfNV z);
+typedef void (APIENTRYP PFNGLVERTEX3HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEX4HNVPROC) (GLhalfNV x, GLhalfNV y, GLhalfNV z, GLhalfNV w);
+typedef void (APIENTRYP PFNGLVERTEX4HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLNORMAL3HNVPROC) (GLhalfNV nx, GLhalfNV ny, GLhalfNV nz);
+typedef void (APIENTRYP PFNGLNORMAL3HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLCOLOR3HNVPROC) (GLhalfNV red, GLhalfNV green, GLhalfNV blue);
+typedef void (APIENTRYP PFNGLCOLOR3HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLCOLOR4HNVPROC) (GLhalfNV red, GLhalfNV green, GLhalfNV blue, GLhalfNV alpha);
+typedef void (APIENTRYP PFNGLCOLOR4HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLTEXCOORD1HNVPROC) (GLhalfNV s);
+typedef void (APIENTRYP PFNGLTEXCOORD1HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLTEXCOORD2HNVPROC) (GLhalfNV s, GLhalfNV t);
+typedef void (APIENTRYP PFNGLTEXCOORD2HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLTEXCOORD3HNVPROC) (GLhalfNV s, GLhalfNV t, GLhalfNV r);
+typedef void (APIENTRYP PFNGLTEXCOORD3HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLTEXCOORD4HNVPROC) (GLhalfNV s, GLhalfNV t, GLhalfNV r, GLhalfNV q);
+typedef void (APIENTRYP PFNGLTEXCOORD4HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1HNVPROC) (GLenum target, GLhalfNV s);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD1HVNVPROC) (GLenum target, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2HNVPROC) (GLenum target, GLhalfNV s, GLhalfNV t);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD2HVNVPROC) (GLenum target, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3HNVPROC) (GLenum target, GLhalfNV s, GLhalfNV t, GLhalfNV r);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD3HVNVPROC) (GLenum target, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4HNVPROC) (GLenum target, GLhalfNV s, GLhalfNV t, GLhalfNV r, GLhalfNV q);
+typedef void (APIENTRYP PFNGLMULTITEXCOORD4HVNVPROC) (GLenum target, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLFOGCOORDHNVPROC) (GLhalfNV fog);
+typedef void (APIENTRYP PFNGLFOGCOORDHVNVPROC) (const GLhalfNV *fog);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3HNVPROC) (GLhalfNV red, GLhalfNV green, GLhalfNV blue);
+typedef void (APIENTRYP PFNGLSECONDARYCOLOR3HVNVPROC) (const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXWEIGHTHNVPROC) (GLhalfNV weight);
+typedef void (APIENTRYP PFNGLVERTEXWEIGHTHVNVPROC) (const GLhalfNV *weight);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1HNVPROC) (GLuint index, GLhalfNV x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB1HVNVPROC) (GLuint index, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2HNVPROC) (GLuint index, GLhalfNV x, GLhalfNV y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB2HVNVPROC) (GLuint index, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3HNVPROC) (GLuint index, GLhalfNV x, GLhalfNV y, GLhalfNV z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB3HVNVPROC) (GLuint index, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4HNVPROC) (GLuint index, GLhalfNV x, GLhalfNV y, GLhalfNV z, GLhalfNV w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIB4HVNVPROC) (GLuint index, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS1HVNVPROC) (GLuint index, GLsizei n, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS2HVNVPROC) (GLuint index, GLsizei n, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS3HVNVPROC) (GLuint index, GLsizei n, const GLhalfNV *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBS4HVNVPROC) (GLuint index, GLsizei n, const GLhalfNV *v);
+#endif
+
+#ifndef GL_NV_pixel_data_range
+#define GL_NV_pixel_data_range 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPixelDataRangeNV (GLenum, GLsizei, GLvoid *);
+GLAPI void APIENTRY glFlushPixelDataRangeNV (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPIXELDATARANGENVPROC) (GLenum target, GLsizei length, GLvoid *pointer);
+typedef void (APIENTRYP PFNGLFLUSHPIXELDATARANGENVPROC) (GLenum target);
+#endif
+
+#ifndef GL_NV_primitive_restart
+#define GL_NV_primitive_restart 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glPrimitiveRestartNV (void);
+GLAPI void APIENTRY glPrimitiveRestartIndexNV (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPRIMITIVERESTARTNVPROC) (void);
+typedef void (APIENTRYP PFNGLPRIMITIVERESTARTINDEXNVPROC) (GLuint index);
+#endif
+
+#ifndef GL_NV_texture_expand_normal
+#define GL_NV_texture_expand_normal 1
+#endif
+
+#ifndef GL_NV_vertex_program2
+#define GL_NV_vertex_program2 1
+#endif
+
+#ifndef GL_ATI_map_object_buffer
+#define GL_ATI_map_object_buffer 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLvoid* APIENTRY glMapObjectBufferATI (GLuint);
+GLAPI void APIENTRY glUnmapObjectBufferATI (GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLvoid* (APIENTRYP PFNGLMAPOBJECTBUFFERATIPROC) (GLuint buffer);
+typedef void (APIENTRYP PFNGLUNMAPOBJECTBUFFERATIPROC) (GLuint buffer);
+#endif
+
+#ifndef GL_ATI_separate_stencil
+#define GL_ATI_separate_stencil 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glStencilOpSeparateATI (GLenum, GLenum, GLenum, GLenum);
+GLAPI void APIENTRY glStencilFuncSeparateATI (GLenum, GLenum, GLint, GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSTENCILOPSEPARATEATIPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass);
+typedef void (APIENTRYP PFNGLSTENCILFUNCSEPARATEATIPROC) (GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask);
+#endif
+
+#ifndef GL_ATI_vertex_attrib_array_object
+#define GL_ATI_vertex_attrib_array_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexAttribArrayObjectATI (GLuint, GLint, GLenum, GLboolean, GLsizei, GLuint, GLuint);
+GLAPI void APIENTRY glGetVertexAttribArrayObjectfvATI (GLuint, GLenum, GLfloat *);
+GLAPI void APIENTRY glGetVertexAttribArrayObjectivATI (GLuint, GLenum, GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXATTRIBARRAYOBJECTATIPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, GLuint buffer, GLuint offset);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBARRAYOBJECTFVATIPROC) (GLuint index, GLenum pname, GLfloat *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBARRAYOBJECTIVATIPROC) (GLuint index, GLenum pname, GLint *params);
+#endif
+
+#ifndef GL_OES_read_format
+#define GL_OES_read_format 1
+#endif
+
+#ifndef GL_EXT_depth_bounds_test
+#define GL_EXT_depth_bounds_test 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDepthBoundsEXT (GLclampd, GLclampd);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDEPTHBOUNDSEXTPROC) (GLclampd zmin, GLclampd zmax);
+#endif
+
+#ifndef GL_EXT_texture_mirror_clamp
+#define GL_EXT_texture_mirror_clamp 1
+#endif
+
+#ifndef GL_EXT_blend_equation_separate
+#define GL_EXT_blend_equation_separate 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlendEquationSeparateEXT (GLenum, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLENDEQUATIONSEPARATEEXTPROC) (GLenum modeRGB, GLenum modeAlpha);
+#endif
+
+#ifndef GL_MESA_pack_invert
+#define GL_MESA_pack_invert 1
+#endif
+
+#ifndef GL_MESA_ycbcr_texture
+#define GL_MESA_ycbcr_texture 1
+#endif
+
+#ifndef GL_EXT_pixel_buffer_object
+#define GL_EXT_pixel_buffer_object 1
+#endif
+
+#ifndef GL_NV_fragment_program_option
+#define GL_NV_fragment_program_option 1
+#endif
+
+#ifndef GL_NV_fragment_program2
+#define GL_NV_fragment_program2 1
+#endif
+
+#ifndef GL_NV_vertex_program2_option
+#define GL_NV_vertex_program2_option 1
+#endif
+
+#ifndef GL_NV_vertex_program3
+#define GL_NV_vertex_program3 1
+#endif
+
+#ifndef GL_EXT_framebuffer_object
+#define GL_EXT_framebuffer_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI GLboolean APIENTRY glIsRenderbufferEXT (GLuint);
+GLAPI void APIENTRY glBindRenderbufferEXT (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteRenderbuffersEXT (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenRenderbuffersEXT (GLsizei, GLuint *);
+GLAPI void APIENTRY glRenderbufferStorageEXT (GLenum, GLenum, GLsizei, GLsizei);
+GLAPI void APIENTRY glGetRenderbufferParameterivEXT (GLenum, GLenum, GLint *);
+GLAPI GLboolean APIENTRY glIsFramebufferEXT (GLuint);
+GLAPI void APIENTRY glBindFramebufferEXT (GLenum, GLuint);
+GLAPI void APIENTRY glDeleteFramebuffersEXT (GLsizei, const GLuint *);
+GLAPI void APIENTRY glGenFramebuffersEXT (GLsizei, GLuint *);
+GLAPI GLenum APIENTRY glCheckFramebufferStatusEXT (GLenum);
+GLAPI void APIENTRY glFramebufferTexture1DEXT (GLenum, GLenum, GLenum, GLuint, GLint);
+GLAPI void APIENTRY glFramebufferTexture2DEXT (GLenum, GLenum, GLenum, GLuint, GLint);
+GLAPI void APIENTRY glFramebufferTexture3DEXT (GLenum, GLenum, GLenum, GLuint, GLint, GLint);
+GLAPI void APIENTRY glFramebufferRenderbufferEXT (GLenum, GLenum, GLenum, GLuint);
+GLAPI void APIENTRY glGetFramebufferAttachmentParameterivEXT (GLenum, GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGenerateMipmapEXT (GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef GLboolean (APIENTRYP PFNGLISRENDERBUFFEREXTPROC) (GLuint renderbuffer);
+typedef void (APIENTRYP PFNGLBINDRENDERBUFFEREXTPROC) (GLenum target, GLuint renderbuffer);
+typedef void (APIENTRYP PFNGLDELETERENDERBUFFERSEXTPROC) (GLsizei n, const GLuint *renderbuffers);
+typedef void (APIENTRYP PFNGLGENRENDERBUFFERSEXTPROC) (GLsizei n, GLuint *renderbuffers);
+typedef void (APIENTRYP PFNGLRENDERBUFFERSTORAGEEXTPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height);
+typedef void (APIENTRYP PFNGLGETRENDERBUFFERPARAMETERIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef GLboolean (APIENTRYP PFNGLISFRAMEBUFFEREXTPROC) (GLuint framebuffer);
+typedef void (APIENTRYP PFNGLBINDFRAMEBUFFEREXTPROC) (GLenum target, GLuint framebuffer);
+typedef void (APIENTRYP PFNGLDELETEFRAMEBUFFERSEXTPROC) (GLsizei n, const GLuint *framebuffers);
+typedef void (APIENTRYP PFNGLGENFRAMEBUFFERSEXTPROC) (GLsizei n, GLuint *framebuffers);
+typedef GLenum (APIENTRYP PFNGLCHECKFRAMEBUFFERSTATUSEXTPROC) (GLenum target);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTURE1DEXTPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DEXTPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTURE3DEXTPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint zoffset);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERRENDERBUFFEREXTPROC) (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer);
+typedef void (APIENTRYP PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVEXTPROC) (GLenum target, GLenum attachment, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGENERATEMIPMAPEXTPROC) (GLenum target);
+#endif
+
+#ifndef GL_GREMEDY_string_marker
+#define GL_GREMEDY_string_marker 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glStringMarkerGREMEDY (GLsizei, const GLvoid *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSTRINGMARKERGREMEDYPROC) (GLsizei len, const GLvoid *string);
+#endif
+
+#ifndef GL_EXT_packed_depth_stencil
+#define GL_EXT_packed_depth_stencil 1
+#endif
+
+#ifndef GL_EXT_stencil_clear_tag
+#define GL_EXT_stencil_clear_tag 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glStencilClearTagEXT (GLsizei, GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLSTENCILCLEARTAGEXTPROC) (GLsizei stencilTagBits, GLuint stencilClearTag);
+#endif
+
+#ifndef GL_EXT_texture_sRGB
+#define GL_EXT_texture_sRGB 1
+#endif
+
+#ifndef GL_EXT_framebuffer_blit
+#define GL_EXT_framebuffer_blit 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBlitFramebufferEXT (GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLbitfield, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBLITFRAMEBUFFEREXTPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter);
+#endif
+
+#ifndef GL_EXT_framebuffer_multisample
+#define GL_EXT_framebuffer_multisample 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glRenderbufferStorageMultisampleEXT (GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEEXTPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+#endif
+
+#ifndef GL_MESAX_texture_stack
+#define GL_MESAX_texture_stack 1
+#endif
+
+#ifndef GL_EXT_timer_query
+#define GL_EXT_timer_query 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGetQueryObjecti64vEXT (GLuint, GLenum, GLint64EXT *);
+GLAPI void APIENTRY glGetQueryObjectui64vEXT (GLuint, GLenum, GLuint64EXT *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTI64VEXTPROC) (GLuint id, GLenum pname, GLint64EXT *params);
+typedef void (APIENTRYP PFNGLGETQUERYOBJECTUI64VEXTPROC) (GLuint id, GLenum pname, GLuint64EXT *params);
+#endif
+
+#ifndef GL_EXT_gpu_program_parameters
+#define GL_EXT_gpu_program_parameters 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramEnvParameters4fvEXT (GLenum, GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glProgramLocalParameters4fvEXT (GLenum, GLuint, GLsizei, const GLfloat *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERS4FVEXTPROC) (GLenum target, GLuint index, GLsizei count, const GLfloat *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERS4FVEXTPROC) (GLenum target, GLuint index, GLsizei count, const GLfloat *params);
+#endif
+
+#ifndef GL_APPLE_flush_buffer_range
+#define GL_APPLE_flush_buffer_range 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBufferParameteriAPPLE (GLenum, GLenum, GLint);
+GLAPI void APIENTRY glFlushMappedBufferRangeAPPLE (GLenum, GLintptr, GLsizeiptr);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBUFFERPARAMETERIAPPLEPROC) (GLenum target, GLenum pname, GLint param);
+typedef void (APIENTRYP PFNGLFLUSHMAPPEDBUFFERRANGEAPPLEPROC) (GLenum target, GLintptr offset, GLsizeiptr size);
+#endif
+
+#ifndef GL_NV_gpu_program4
+#define GL_NV_gpu_program4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramLocalParameterI4iNV (GLenum, GLuint, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glProgramLocalParameterI4ivNV (GLenum, GLuint, const GLint *);
+GLAPI void APIENTRY glProgramLocalParametersI4ivNV (GLenum, GLuint, GLsizei, const GLint *);
+GLAPI void APIENTRY glProgramLocalParameterI4uiNV (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glProgramLocalParameterI4uivNV (GLenum, GLuint, const GLuint *);
+GLAPI void APIENTRY glProgramLocalParametersI4uivNV (GLenum, GLuint, GLsizei, const GLuint *);
+GLAPI void APIENTRY glProgramEnvParameterI4iNV (GLenum, GLuint, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glProgramEnvParameterI4ivNV (GLenum, GLuint, const GLint *);
+GLAPI void APIENTRY glProgramEnvParametersI4ivNV (GLenum, GLuint, GLsizei, const GLint *);
+GLAPI void APIENTRY glProgramEnvParameterI4uiNV (GLenum, GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glProgramEnvParameterI4uivNV (GLenum, GLuint, const GLuint *);
+GLAPI void APIENTRY glProgramEnvParametersI4uivNV (GLenum, GLuint, GLsizei, const GLuint *);
+GLAPI void APIENTRY glGetProgramLocalParameterIivNV (GLenum, GLuint, GLint *);
+GLAPI void APIENTRY glGetProgramLocalParameterIuivNV (GLenum, GLuint, GLuint *);
+GLAPI void APIENTRY glGetProgramEnvParameterIivNV (GLenum, GLuint, GLint *);
+GLAPI void APIENTRY glGetProgramEnvParameterIuivNV (GLenum, GLuint, GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERI4INVPROC) (GLenum target, GLuint index, GLint x, GLint y, GLint z, GLint w);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERI4IVNVPROC) (GLenum target, GLuint index, const GLint *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERSI4IVNVPROC) (GLenum target, GLuint index, GLsizei count, const GLint *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERI4UINVPROC) (GLenum target, GLuint index, GLuint x, GLuint y, GLuint z, GLuint w);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERI4UIVNVPROC) (GLenum target, GLuint index, const GLuint *params);
+typedef void (APIENTRYP PFNGLPROGRAMLOCALPARAMETERSI4UIVNVPROC) (GLenum target, GLuint index, GLsizei count, const GLuint *params);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERI4INVPROC) (GLenum target, GLuint index, GLint x, GLint y, GLint z, GLint w);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERI4IVNVPROC) (GLenum target, GLuint index, const GLint *params);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERSI4IVNVPROC) (GLenum target, GLuint index, GLsizei count, const GLint *params);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERI4UINVPROC) (GLenum target, GLuint index, GLuint x, GLuint y, GLuint z, GLuint w);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERI4UIVNVPROC) (GLenum target, GLuint index, const GLuint *params);
+typedef void (APIENTRYP PFNGLPROGRAMENVPARAMETERSI4UIVNVPROC) (GLenum target, GLuint index, GLsizei count, const GLuint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMLOCALPARAMETERIIVNVPROC) (GLenum target, GLuint index, GLint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMLOCALPARAMETERIUIVNVPROC) (GLenum target, GLuint index, GLuint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMENVPARAMETERIIVNVPROC) (GLenum target, GLuint index, GLint *params);
+typedef void (APIENTRYP PFNGLGETPROGRAMENVPARAMETERIUIVNVPROC) (GLenum target, GLuint index, GLuint *params);
+#endif
+
+#ifndef GL_NV_geometry_program4
+#define GL_NV_geometry_program4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramVertexLimitNV (GLenum, GLint);
+GLAPI void APIENTRY glFramebufferTextureEXT (GLenum, GLenum, GLuint, GLint);
+GLAPI void APIENTRY glFramebufferTextureLayerEXT (GLenum, GLenum, GLuint, GLint, GLint);
+GLAPI void APIENTRY glFramebufferTextureFaceEXT (GLenum, GLenum, GLuint, GLint, GLenum);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMVERTEXLIMITNVPROC) (GLenum target, GLint limit);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTUREEXTPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTURELAYEREXTPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer);
+typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTUREFACEEXTPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLenum face);
+#endif
+
+#ifndef GL_EXT_geometry_shader4
+#define GL_EXT_geometry_shader4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramParameteriEXT (GLuint, GLenum, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMPARAMETERIEXTPROC) (GLuint program, GLenum pname, GLint value);
+#endif
+
+#ifndef GL_NV_vertex_program4
+#define GL_NV_vertex_program4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glVertexAttribI1iEXT (GLuint, GLint);
+GLAPI void APIENTRY glVertexAttribI2iEXT (GLuint, GLint, GLint);
+GLAPI void APIENTRY glVertexAttribI3iEXT (GLuint, GLint, GLint, GLint);
+GLAPI void APIENTRY glVertexAttribI4iEXT (GLuint, GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glVertexAttribI1uiEXT (GLuint, GLuint);
+GLAPI void APIENTRY glVertexAttribI2uiEXT (GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glVertexAttribI3uiEXT (GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glVertexAttribI4uiEXT (GLuint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glVertexAttribI1ivEXT (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttribI2ivEXT (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttribI3ivEXT (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttribI4ivEXT (GLuint, const GLint *);
+GLAPI void APIENTRY glVertexAttribI1uivEXT (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttribI2uivEXT (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttribI3uivEXT (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttribI4uivEXT (GLuint, const GLuint *);
+GLAPI void APIENTRY glVertexAttribI4bvEXT (GLuint, const GLbyte *);
+GLAPI void APIENTRY glVertexAttribI4svEXT (GLuint, const GLshort *);
+GLAPI void APIENTRY glVertexAttribI4ubvEXT (GLuint, const GLubyte *);
+GLAPI void APIENTRY glVertexAttribI4usvEXT (GLuint, const GLushort *);
+GLAPI void APIENTRY glVertexAttribIPointerEXT (GLuint, GLint, GLenum, GLsizei, const GLvoid *);
+GLAPI void APIENTRY glGetVertexAttribIivEXT (GLuint, GLenum, GLint *);
+GLAPI void APIENTRY glGetVertexAttribIuivEXT (GLuint, GLenum, GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI1IEXTPROC) (GLuint index, GLint x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI2IEXTPROC) (GLuint index, GLint x, GLint y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI3IEXTPROC) (GLuint index, GLint x, GLint y, GLint z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4IEXTPROC) (GLuint index, GLint x, GLint y, GLint z, GLint w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI1UIEXTPROC) (GLuint index, GLuint x);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI2UIEXTPROC) (GLuint index, GLuint x, GLuint y);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI3UIEXTPROC) (GLuint index, GLuint x, GLuint y, GLuint z);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4UIEXTPROC) (GLuint index, GLuint x, GLuint y, GLuint z, GLuint w);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI1IVEXTPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI2IVEXTPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI3IVEXTPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4IVEXTPROC) (GLuint index, const GLint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI1UIVEXTPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI2UIVEXTPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI3UIVEXTPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4UIVEXTPROC) (GLuint index, const GLuint *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4BVEXTPROC) (GLuint index, const GLbyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4SVEXTPROC) (GLuint index, const GLshort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4UBVEXTPROC) (GLuint index, const GLubyte *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBI4USVEXTPROC) (GLuint index, const GLushort *v);
+typedef void (APIENTRYP PFNGLVERTEXATTRIBIPOINTEREXTPROC) (GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBIIVEXTPROC) (GLuint index, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETVERTEXATTRIBIUIVEXTPROC) (GLuint index, GLenum pname, GLuint *params);
+#endif
+
+#ifndef GL_EXT_gpu_shader4
+#define GL_EXT_gpu_shader4 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glGetUniformuivEXT (GLuint, GLint, GLuint *);
+GLAPI void APIENTRY glBindFragDataLocationEXT (GLuint, GLuint, const GLchar *);
+GLAPI GLint APIENTRY glGetFragDataLocationEXT (GLuint, const GLchar *);
+GLAPI void APIENTRY glUniform1uiEXT (GLint, GLuint);
+GLAPI void APIENTRY glUniform2uiEXT (GLint, GLuint, GLuint);
+GLAPI void APIENTRY glUniform3uiEXT (GLint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glUniform4uiEXT (GLint, GLuint, GLuint, GLuint, GLuint);
+GLAPI void APIENTRY glUniform1uivEXT (GLint, GLsizei, const GLuint *);
+GLAPI void APIENTRY glUniform2uivEXT (GLint, GLsizei, const GLuint *);
+GLAPI void APIENTRY glUniform3uivEXT (GLint, GLsizei, const GLuint *);
+GLAPI void APIENTRY glUniform4uivEXT (GLint, GLsizei, const GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLGETUNIFORMUIVEXTPROC) (GLuint program, GLint location, GLuint *params);
+typedef void (APIENTRYP PFNGLBINDFRAGDATALOCATIONEXTPROC) (GLuint program, GLuint color, const GLchar *name);
+typedef GLint (APIENTRYP PFNGLGETFRAGDATALOCATIONEXTPROC) (GLuint program, const GLchar *name);
+typedef void (APIENTRYP PFNGLUNIFORM1UIEXTPROC) (GLint location, GLuint v0);
+typedef void (APIENTRYP PFNGLUNIFORM2UIEXTPROC) (GLint location, GLuint v0, GLuint v1);
+typedef void (APIENTRYP PFNGLUNIFORM3UIEXTPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2);
+typedef void (APIENTRYP PFNGLUNIFORM4UIEXTPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3);
+typedef void (APIENTRYP PFNGLUNIFORM1UIVEXTPROC) (GLint location, GLsizei count, const GLuint *value);
+typedef void (APIENTRYP PFNGLUNIFORM2UIVEXTPROC) (GLint location, GLsizei count, const GLuint *value);
+typedef void (APIENTRYP PFNGLUNIFORM3UIVEXTPROC) (GLint location, GLsizei count, const GLuint *value);
+typedef void (APIENTRYP PFNGLUNIFORM4UIVEXTPROC) (GLint location, GLsizei count, const GLuint *value);
+#endif
+
+#ifndef GL_EXT_draw_instanced
+#define GL_EXT_draw_instanced 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDrawArraysInstancedEXT (GLenum, GLint, GLsizei, GLsizei);
+GLAPI void APIENTRY glDrawElementsInstancedEXT (GLenum, GLsizei, GLenum, const GLvoid *, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDRAWARRAYSINSTANCEDEXTPROC) (GLenum mode, GLint start, GLsizei count, GLsizei primcount);
+typedef void (APIENTRYP PFNGLDRAWELEMENTSINSTANCEDEXTPROC) (GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount);
+#endif
+
+#ifndef GL_EXT_packed_float
+#define GL_EXT_packed_float 1
+#endif
+
+#ifndef GL_EXT_texture_array
+#define GL_EXT_texture_array 1
+#endif
+
+#ifndef GL_EXT_texture_buffer_object
+#define GL_EXT_texture_buffer_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexBufferEXT (GLenum, GLenum, GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXBUFFEREXTPROC) (GLenum target, GLenum internalformat, GLuint buffer);
+#endif
+
+#ifndef GL_EXT_texture_compression_latc
+#define GL_EXT_texture_compression_latc 1
+#endif
+
+#ifndef GL_EXT_texture_compression_rgtc
+#define GL_EXT_texture_compression_rgtc 1
+#endif
+
+#ifndef GL_EXT_texture_shared_exponent
+#define GL_EXT_texture_shared_exponent 1
+#endif
+
+#ifndef GL_NV_depth_buffer_float
+#define GL_NV_depth_buffer_float 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glDepthRangedNV (GLdouble, GLdouble);
+GLAPI void APIENTRY glClearDepthdNV (GLdouble);
+GLAPI void APIENTRY glDepthBoundsdNV (GLdouble, GLdouble);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLDEPTHRANGEDNVPROC) (GLdouble zNear, GLdouble zFar);
+typedef void (APIENTRYP PFNGLCLEARDEPTHDNVPROC) (GLdouble depth);
+typedef void (APIENTRYP PFNGLDEPTHBOUNDSDNVPROC) (GLdouble zmin, GLdouble zmax);
+#endif
+
+#ifndef GL_NV_fragment_program4
+#define GL_NV_fragment_program4 1
+#endif
+
+#ifndef GL_NV_framebuffer_multisample_coverage
+#define GL_NV_framebuffer_multisample_coverage 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glRenderbufferStorageMultisampleCoverageNV (GLenum, GLsizei, GLsizei, GLenum, GLsizei, GLsizei);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLECOVERAGENVPROC) (GLenum target, GLsizei coverageSamples, GLsizei colorSamples, GLenum internalformat, GLsizei width, GLsizei height);
+#endif
+
+#ifndef GL_EXT_framebuffer_sRGB
+#define GL_EXT_framebuffer_sRGB 1
+#endif
+
+#ifndef GL_NV_geometry_shader4
+#define GL_NV_geometry_shader4 1
+#endif
+
+#ifndef GL_NV_parameter_buffer_object
+#define GL_NV_parameter_buffer_object 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glProgramBufferParametersfvNV (GLenum, GLuint, GLuint, GLsizei, const GLfloat *);
+GLAPI void APIENTRY glProgramBufferParametersIivNV (GLenum, GLuint, GLuint, GLsizei, const GLint *);
+GLAPI void APIENTRY glProgramBufferParametersIuivNV (GLenum, GLuint, GLuint, GLsizei, const GLuint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLPROGRAMBUFFERPARAMETERSFVNVPROC) (GLenum target, GLuint buffer, GLuint index, GLsizei count, const GLfloat *params);
+typedef void (APIENTRYP PFNGLPROGRAMBUFFERPARAMETERSIIVNVPROC) (GLenum target, GLuint buffer, GLuint index, GLsizei count, const GLint *params);
+typedef void (APIENTRYP PFNGLPROGRAMBUFFERPARAMETERSIUIVNVPROC) (GLenum target, GLuint buffer, GLuint index, GLsizei count, const GLuint *params);
+#endif
+
+#ifndef GL_EXT_draw_buffers2
+#define GL_EXT_draw_buffers2 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glColorMaskIndexedEXT (GLuint, GLboolean, GLboolean, GLboolean, GLboolean);
+GLAPI void APIENTRY glGetBooleanIndexedvEXT (GLenum, GLuint, GLboolean *);
+GLAPI void APIENTRY glGetIntegerIndexedvEXT (GLenum, GLuint, GLint *);
+GLAPI void APIENTRY glEnableIndexedEXT (GLenum, GLuint);
+GLAPI void APIENTRY glDisableIndexedEXT (GLenum, GLuint);
+GLAPI GLboolean APIENTRY glIsEnabledIndexedEXT (GLenum, GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLCOLORMASKINDEXEDEXTPROC) (GLuint index, GLboolean r, GLboolean g, GLboolean b, GLboolean a);
+typedef void (APIENTRYP PFNGLGETBOOLEANINDEXEDVEXTPROC) (GLenum target, GLuint index, GLboolean *data);
+typedef void (APIENTRYP PFNGLGETINTEGERINDEXEDVEXTPROC) (GLenum target, GLuint index, GLint *data);
+typedef void (APIENTRYP PFNGLENABLEINDEXEDEXTPROC) (GLenum target, GLuint index);
+typedef void (APIENTRYP PFNGLDISABLEINDEXEDEXTPROC) (GLenum target, GLuint index);
+typedef GLboolean (APIENTRYP PFNGLISENABLEDINDEXEDEXTPROC) (GLenum target, GLuint index);
+#endif
+
+#ifndef GL_NV_transform_feedback
+#define GL_NV_transform_feedback 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glBeginTransformFeedbackNV (GLenum);
+GLAPI void APIENTRY glEndTransformFeedbackNV (void);
+GLAPI void APIENTRY glTransformFeedbackAttribsNV (GLuint, const GLint *, GLenum);
+GLAPI void APIENTRY glBindBufferRangeNV (GLenum, GLuint, GLuint, GLintptr, GLsizeiptr);
+GLAPI void APIENTRY glBindBufferOffsetNV (GLenum, GLuint, GLuint, GLintptr);
+GLAPI void APIENTRY glBindBufferBaseNV (GLenum, GLuint, GLuint);
+GLAPI void APIENTRY glTransformFeedbackVaryingsNV (GLuint, GLsizei, const GLint *, GLenum);
+GLAPI void APIENTRY glActiveVaryingNV (GLuint, const GLchar *);
+GLAPI GLint APIENTRY glGetVaryingLocationNV (GLuint, const GLchar *);
+GLAPI void APIENTRY glGetActiveVaryingNV (GLuint, GLuint, GLsizei, GLsizei *, GLsizei *, GLenum *, GLchar *);
+GLAPI void APIENTRY glGetTransformFeedbackVaryingNV (GLuint, GLuint, GLint *);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLBEGINTRANSFORMFEEDBACKNVPROC) (GLenum primitiveMode);
+typedef void (APIENTRYP PFNGLENDTRANSFORMFEEDBACKNVPROC) (void);
+typedef void (APIENTRYP PFNGLTRANSFORMFEEDBACKATTRIBSNVPROC) (GLuint count, const GLint *attribs, GLenum bufferMode);
+typedef void (APIENTRYP PFNGLBINDBUFFERRANGENVPROC) (GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size);
+typedef void (APIENTRYP PFNGLBINDBUFFEROFFSETNVPROC) (GLenum target, GLuint index, GLuint buffer, GLintptr offset);
+typedef void (APIENTRYP PFNGLBINDBUFFERBASENVPROC) (GLenum target, GLuint index, GLuint buffer);
+typedef void (APIENTRYP PFNGLTRANSFORMFEEDBACKVARYINGSNVPROC) (GLuint program, GLsizei count, const GLint *locations, GLenum bufferMode);
+typedef void (APIENTRYP PFNGLACTIVEVARYINGNVPROC) (GLuint program, const GLchar *name);
+typedef GLint (APIENTRYP PFNGLGETVARYINGLOCATIONNVPROC) (GLuint program, const GLchar *name);
+typedef void (APIENTRYP PFNGLGETACTIVEVARYINGNVPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLsizei *size, GLenum *type, GLchar *name);
+typedef void (APIENTRYP PFNGLGETTRANSFORMFEEDBACKVARYINGNVPROC) (GLuint program, GLuint index, GLint *location);
+#endif
+
+#ifndef GL_EXT_bindable_uniform
+#define GL_EXT_bindable_uniform 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glUniformBufferEXT (GLuint, GLint, GLuint);
+GLAPI GLint APIENTRY glGetUniformBufferSizeEXT (GLuint, GLint);
+GLAPI GLintptr APIENTRY glGetUniformOffsetEXT (GLuint, GLint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLUNIFORMBUFFEREXTPROC) (GLuint program, GLint location, GLuint buffer);
+typedef GLint (APIENTRYP PFNGLGETUNIFORMBUFFERSIZEEXTPROC) (GLuint program, GLint location);
+typedef GLintptr (APIENTRYP PFNGLGETUNIFORMOFFSETEXTPROC) (GLuint program, GLint location);
+#endif
+
+#ifndef GL_EXT_texture_integer
+#define GL_EXT_texture_integer 1
+#ifdef GL_GLEXT_PROTOTYPES
+GLAPI void APIENTRY glTexParameterIivEXT (GLenum, GLenum, const GLint *);
+GLAPI void APIENTRY glTexParameterIuivEXT (GLenum, GLenum, const GLuint *);
+GLAPI void APIENTRY glGetTexParameterIivEXT (GLenum, GLenum, GLint *);
+GLAPI void APIENTRY glGetTexParameterIuivEXT (GLenum, GLenum, GLuint *);
+GLAPI void APIENTRY glClearColorIiEXT (GLint, GLint, GLint, GLint);
+GLAPI void APIENTRY glClearColorIuiEXT (GLuint, GLuint, GLuint, GLuint);
+#endif /* GL_GLEXT_PROTOTYPES */
+typedef void (APIENTRYP PFNGLTEXPARAMETERIIVEXTPROC) (GLenum target, GLenum pname, const GLint *params);
+typedef void (APIENTRYP PFNGLTEXPARAMETERIUIVEXTPROC) (GLenum target, GLenum pname, const GLuint *params);
+typedef void (APIENTRYP PFNGLGETTEXPARAMETERIIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+typedef void (APIENTRYP PFNGLGETTEXPARAMETERIUIVEXTPROC) (GLenum target, GLenum pname, GLuint *params);
+typedef void (APIENTRYP PFNGLCLEARCOLORIIEXTPROC) (GLint red, GLint green, GLint blue, GLint alpha);
+typedef void (APIENTRYP PFNGLCLEARCOLORIUIEXTPROC) (GLuint red, GLuint green, GLuint blue, GLuint alpha);
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx.h
new file mode 100644
index 0000000..c70a294
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx.h
@@ -0,0 +1,500 @@
+/*
+ * Mesa 3-D graphics library
+ * Version: 6.5
+ *
+ * Copyright (C) 1999-2006 Brian Paul All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#ifndef GLX_H
+#define GLX_H
+
+
+#ifdef __VMS
+#include <GL/vms_x_fix.h>
+# ifdef __cplusplus
+/* VMS Xlib.h gives problems with C++.
+ * this avoids a bunch of trivial warnings */
+#pragma message disable nosimpint
+#endif
+#endif
+#include <X11/Xlib.h>
+#include <X11/Xutil.h>
+#ifdef __VMS
+# ifdef __cplusplus
+#pragma message enable nosimpint
+#endif
+#endif
+#include <GL/gl.h>
+
+
+#if defined(USE_MGL_NAMESPACE)
+#include "glx_mangle.h"
+#endif
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define GLX_VERSION_1_1 1
+#define GLX_VERSION_1_2 1
+#define GLX_VERSION_1_3 1
+#define GLX_VERSION_1_4 1
+
+#define GLX_EXTENSION_NAME "GLX"
+
+
+
+/*
+ * Tokens for glXChooseVisual and glXGetConfig:
+ */
+#define GLX_USE_GL 1
+#define GLX_BUFFER_SIZE 2
+#define GLX_LEVEL 3
+#define GLX_RGBA 4
+#define GLX_DOUBLEBUFFER 5
+#define GLX_STEREO 6
+#define GLX_AUX_BUFFERS 7
+#define GLX_RED_SIZE 8
+#define GLX_GREEN_SIZE 9
+#define GLX_BLUE_SIZE 10
+#define GLX_ALPHA_SIZE 11
+#define GLX_DEPTH_SIZE 12
+#define GLX_STENCIL_SIZE 13
+#define GLX_ACCUM_RED_SIZE 14
+#define GLX_ACCUM_GREEN_SIZE 15
+#define GLX_ACCUM_BLUE_SIZE 16
+#define GLX_ACCUM_ALPHA_SIZE 17
+
+
+/*
+ * Error codes returned by glXGetConfig:
+ */
+#define GLX_BAD_SCREEN 1
+#define GLX_BAD_ATTRIBUTE 2
+#define GLX_NO_EXTENSION 3
+#define GLX_BAD_VISUAL 4
+#define GLX_BAD_CONTEXT 5
+#define GLX_BAD_VALUE 6
+#define GLX_BAD_ENUM 7
+
+
+/*
+ * GLX 1.1 and later:
+ */
+#define GLX_VENDOR 1
+#define GLX_VERSION 2
+#define GLX_EXTENSIONS 3
+
+
+/*
+ * GLX 1.3 and later:
+ */
+#define GLX_CONFIG_CAVEAT 0x20
+#define GLX_DONT_CARE 0xFFFFFFFF
+#define GLX_X_VISUAL_TYPE 0x22
+#define GLX_TRANSPARENT_TYPE 0x23
+#define GLX_TRANSPARENT_INDEX_VALUE 0x24
+#define GLX_TRANSPARENT_RED_VALUE 0x25
+#define GLX_TRANSPARENT_GREEN_VALUE 0x26
+#define GLX_TRANSPARENT_BLUE_VALUE 0x27
+#define GLX_TRANSPARENT_ALPHA_VALUE 0x28
+#define GLX_WINDOW_BIT 0x00000001
+#define GLX_PIXMAP_BIT 0x00000002
+#define GLX_PBUFFER_BIT 0x00000004
+#define GLX_AUX_BUFFERS_BIT 0x00000010
+#define GLX_FRONT_LEFT_BUFFER_BIT 0x00000001
+#define GLX_FRONT_RIGHT_BUFFER_BIT 0x00000002
+#define GLX_BACK_LEFT_BUFFER_BIT 0x00000004
+#define GLX_BACK_RIGHT_BUFFER_BIT 0x00000008
+#define GLX_DEPTH_BUFFER_BIT 0x00000020
+#define GLX_STENCIL_BUFFER_BIT 0x00000040
+#define GLX_ACCUM_BUFFER_BIT 0x00000080
+#define GLX_NONE 0x8000
+#define GLX_SLOW_CONFIG 0x8001
+#define GLX_TRUE_COLOR 0x8002
+#define GLX_DIRECT_COLOR 0x8003
+#define GLX_PSEUDO_COLOR 0x8004
+#define GLX_STATIC_COLOR 0x8005
+#define GLX_GRAY_SCALE 0x8006
+#define GLX_STATIC_GRAY 0x8007
+#define GLX_TRANSPARENT_RGB 0x8008
+#define GLX_TRANSPARENT_INDEX 0x8009
+#define GLX_VISUAL_ID 0x800B
+#define GLX_SCREEN 0x800C
+#define GLX_NON_CONFORMANT_CONFIG 0x800D
+#define GLX_DRAWABLE_TYPE 0x8010
+#define GLX_RENDER_TYPE 0x8011
+#define GLX_X_RENDERABLE 0x8012
+#define GLX_FBCONFIG_ID 0x8013
+#define GLX_RGBA_TYPE 0x8014
+#define GLX_COLOR_INDEX_TYPE 0x8015
+#define GLX_MAX_PBUFFER_WIDTH 0x8016
+#define GLX_MAX_PBUFFER_HEIGHT 0x8017
+#define GLX_MAX_PBUFFER_PIXELS 0x8018
+#define GLX_PRESERVED_CONTENTS 0x801B
+#define GLX_LARGEST_PBUFFER 0x801C
+#define GLX_WIDTH 0x801D
+#define GLX_HEIGHT 0x801E
+#define GLX_EVENT_MASK 0x801F
+#define GLX_DAMAGED 0x8020
+#define GLX_SAVED 0x8021
+#define GLX_WINDOW 0x8022
+#define GLX_PBUFFER 0x8023
+#define GLX_PBUFFER_HEIGHT 0x8040
+#define GLX_PBUFFER_WIDTH 0x8041
+#define GLX_RGBA_BIT 0x00000001
+#define GLX_COLOR_INDEX_BIT 0x00000002
+#define GLX_PBUFFER_CLOBBER_MASK 0x08000000
+
+
+/*
+ * GLX 1.4 and later:
+ */
+#define GLX_SAMPLE_BUFFERS 0x186a0 /*100000*/
+#define GLX_SAMPLES 0x186a1 /*100001*/
+
+
+
+typedef struct __GLXcontextRec *GLXContext;
+typedef XID GLXPixmap;
+typedef XID GLXDrawable;
+/* GLX 1.3 and later */
+typedef struct __GLXFBConfigRec *GLXFBConfig;
+typedef XID GLXFBConfigID;
+typedef XID GLXContextID;
+typedef XID GLXWindow;
+typedef XID GLXPbuffer;
+
+
+
+extern XVisualInfo* glXChooseVisual( Display *dpy, int screen,
+ int *attribList );
+
+extern GLXContext glXCreateContext( Display *dpy, XVisualInfo *vis,
+ GLXContext shareList, Bool direct );
+
+extern void glXDestroyContext( Display *dpy, GLXContext ctx );
+
+extern Bool glXMakeCurrent( Display *dpy, GLXDrawable drawable,
+ GLXContext ctx);
+
+extern void glXCopyContext( Display *dpy, GLXContext src, GLXContext dst,
+ unsigned long mask );
+
+extern void glXSwapBuffers( Display *dpy, GLXDrawable drawable );
+
+extern GLXPixmap glXCreateGLXPixmap( Display *dpy, XVisualInfo *visual,
+ Pixmap pixmap );
+
+extern void glXDestroyGLXPixmap( Display *dpy, GLXPixmap pixmap );
+
+extern Bool glXQueryExtension( Display *dpy, int *errorb, int *event );
+
+extern Bool glXQueryVersion( Display *dpy, int *maj, int *min );
+
+extern Bool glXIsDirect( Display *dpy, GLXContext ctx );
+
+extern int glXGetConfig( Display *dpy, XVisualInfo *visual,
+ int attrib, int *value );
+
+extern GLXContext glXGetCurrentContext( void );
+
+extern GLXDrawable glXGetCurrentDrawable( void );
+
+extern void glXWaitGL( void );
+
+extern void glXWaitX( void );
+
+extern void glXUseXFont( Font font, int first, int count, int list );
+
+
+
+/* GLX 1.1 and later */
+extern const char *glXQueryExtensionsString( Display *dpy, int screen );
+
+extern const char *glXQueryServerString( Display *dpy, int screen, int name );
+
+extern const char *glXGetClientString( Display *dpy, int name );
+
+
+/* GLX 1.2 and later */
+extern Display *glXGetCurrentDisplay( void );
+
+
+/* GLX 1.3 and later */
+extern GLXFBConfig *glXChooseFBConfig( Display *dpy, int screen,
+ const int *attribList, int *nitems );
+
+extern int glXGetFBConfigAttrib( Display *dpy, GLXFBConfig config,
+ int attribute, int *value );
+
+extern GLXFBConfig *glXGetFBConfigs( Display *dpy, int screen,
+ int *nelements );
+
+extern XVisualInfo *glXGetVisualFromFBConfig( Display *dpy,
+ GLXFBConfig config );
+
+extern GLXWindow glXCreateWindow( Display *dpy, GLXFBConfig config,
+ Window win, const int *attribList );
+
+extern void glXDestroyWindow( Display *dpy, GLXWindow window );
+
+extern GLXPixmap glXCreatePixmap( Display *dpy, GLXFBConfig config,
+ Pixmap pixmap, const int *attribList );
+
+extern void glXDestroyPixmap( Display *dpy, GLXPixmap pixmap );
+
+extern GLXPbuffer glXCreatePbuffer( Display *dpy, GLXFBConfig config,
+ const int *attribList );
+
+extern void glXDestroyPbuffer( Display *dpy, GLXPbuffer pbuf );
+
+extern void glXQueryDrawable( Display *dpy, GLXDrawable draw, int attribute,
+ unsigned int *value );
+
+extern GLXContext glXCreateNewContext( Display *dpy, GLXFBConfig config,
+ int renderType, GLXContext shareList,
+ Bool direct );
+
+extern Bool glXMakeContextCurrent( Display *dpy, GLXDrawable draw,
+ GLXDrawable read, GLXContext ctx );
+
+extern GLXDrawable glXGetCurrentReadDrawable( void );
+
+extern int glXQueryContext( Display *dpy, GLXContext ctx, int attribute,
+ int *value );
+
+extern void glXSelectEvent( Display *dpy, GLXDrawable drawable,
+ unsigned long mask );
+
+extern void glXGetSelectedEvent( Display *dpy, GLXDrawable drawable,
+ unsigned long *mask );
+
+
+/* GLX 1.4 and later */
+extern void (*glXGetProcAddress(const GLubyte *procname))( void );
+
+
+#ifndef GLX_GLXEXT_LEGACY
+
+#include <GL/glxext.h>
+
+#else
+
+
+
+/*
+ * ARB 2. GLX_ARB_get_proc_address
+ */
+#ifndef GLX_ARB_get_proc_address
+#define GLX_ARB_get_proc_address 1
+
+typedef void (*__GLXextFuncPtr)(void);
+extern __GLXextFuncPtr glXGetProcAddressARB (const GLubyte *);
+
+#endif /* GLX_ARB_get_proc_address */
+
+
+
+#endif /* GLX_GLXEXT_LEGACY */
+
+
+/**
+ ** The following aren't in glxext.h yet.
+ **/
+
+
+/*
+ * ???. GLX_NV_vertex_array_range
+ */
+#ifndef GLX_NV_vertex_array_range
+#define GLX_NV_vertex_array_range
+
+extern void *glXAllocateMemoryNV(GLsizei size, GLfloat readfreq, GLfloat writefreq, GLfloat priority);
+extern void glXFreeMemoryNV(GLvoid *pointer);
+typedef void * ( * PFNGLXALLOCATEMEMORYNVPROC) (GLsizei size, GLfloat readfreq, GLfloat writefreq, GLfloat priority);
+typedef void ( * PFNGLXFREEMEMORYNVPROC) (GLvoid *pointer);
+
+#endif /* GLX_NV_vertex_array_range */
+
+
+/*
+ * ???. GLX_MESA_allocate_memory
+ */
+#ifndef GLX_MESA_allocate_memory
+#define GLX_MESA_allocate_memory 1
+
+extern void *glXAllocateMemoryMESA(Display *dpy, int scrn, size_t size, float readfreq, float writefreq, float priority);
+extern void glXFreeMemoryMESA(Display *dpy, int scrn, void *pointer);
+extern GLuint glXGetMemoryOffsetMESA(Display *dpy, int scrn, const void *pointer);
+typedef void * ( * PFNGLXALLOCATEMEMORYMESAPROC) (Display *dpy, int scrn, size_t size, float readfreq, float writefreq, float priority);
+typedef void ( * PFNGLXFREEMEMORYMESAPROC) (Display *dpy, int scrn, void *pointer);
+typedef GLuint (* PFNGLXGETMEMORYOFFSETMESAPROC) (Display *dpy, int scrn, const void *pointer);
+
+#endif /* GLX_MESA_allocate_memory */
+
+
+/*
+ * ARB ?. GLX_ARB_render_texture
+ * XXX This was never finalized!
+ */
+#ifndef GLX_ARB_render_texture
+#define GLX_ARB_render_texture 1
+
+extern Bool glXBindTexImageARB(Display *dpy, GLXPbuffer pbuffer, int buffer);
+extern Bool glXReleaseTexImageARB(Display *dpy, GLXPbuffer pbuffer, int buffer);
+extern Bool glXDrawableAttribARB(Display *dpy, GLXDrawable draw, const int *attribList);
+
+#endif /* GLX_ARB_render_texture */
+
+
+/*
+ * Remove this when glxext.h is updated.
+ */
+#ifndef GLX_NV_float_buffer
+#define GLX_NV_float_buffer 1
+
+#define GLX_FLOAT_COMPONENTS_NV 0x20B0
+
+#endif /* GLX_NV_float_buffer */
+
+
+
+/*
+ * #?. GLX_MESA_swap_frame_usage
+ */
+#ifndef GLX_MESA_swap_frame_usage
+#define GLX_MESA_swap_frame_usage 1
+
+extern int glXGetFrameUsageMESA(Display *dpy, GLXDrawable drawable, float *usage);
+extern int glXBeginFrameTrackingMESA(Display *dpy, GLXDrawable drawable);
+extern int glXEndFrameTrackingMESA(Display *dpy, GLXDrawable drawable);
+extern int glXQueryFrameTrackingMESA(Display *dpy, GLXDrawable drawable, int64_t *swapCount, int64_t *missedFrames, float *lastMissedUsage);
+
+typedef int (*PFNGLXGETFRAMEUSAGEMESAPROC) (Display *dpy, GLXDrawable drawable, float *usage);
+typedef int (*PFNGLXBEGINFRAMETRACKINGMESAPROC)(Display *dpy, GLXDrawable drawable);
+typedef int (*PFNGLXENDFRAMETRACKINGMESAPROC)(Display *dpy, GLXDrawable drawable);
+typedef int (*PFNGLXQUERYFRAMETRACKINGMESAPROC)(Display *dpy, GLXDrawable drawable, int64_t *swapCount, int64_t *missedFrames, float *lastMissedUsage);
+
+#endif /* GLX_MESA_swap_frame_usage */
+
+
+
+/*
+ * #?. GLX_MESA_swap_control
+ */
+#ifndef GLX_MESA_swap_control
+#define GLX_MESA_swap_control 1
+
+extern int glXSwapIntervalMESA(unsigned int interval);
+extern int glXGetSwapIntervalMESA(void);
+
+typedef int (*PFNGLXSWAPINTERVALMESAPROC)(unsigned int interval);
+typedef int (*PFNGLXGETSWAPINTERVALMESAPROC)(void);
+
+#endif /* GLX_MESA_swap_control */
+
+
+
+/*
+ * #?. GLX_EXT_texture_from_pixmap
+ * XXX not finished?
+ */
+#ifndef GLX_EXT_texture_from_pixmap
+#define GLX_EXT_texture_from_pixmap 1
+
+#define GLX_BIND_TO_TEXTURE_RGB_EXT 0x20D0
+#define GLX_BIND_TO_TEXTURE_RGBA_EXT 0x20D1
+#define GLX_BIND_TO_MIPMAP_TEXTURE_EXT 0x20D2
+#define GLX_BIND_TO_TEXTURE_TARGETS_EXT 0x20D3
+#define GLX_Y_INVERTED_EXT 0x20D4
+
+#define GLX_TEXTURE_FORMAT_EXT 0x20D5
+#define GLX_TEXTURE_TARGET_EXT 0x20D6
+#define GLX_MIPMAP_TEXTURE_EXT 0x20D7
+
+#define GLX_TEXTURE_FORMAT_NONE_EXT 0x20D8
+#define GLX_TEXTURE_FORMAT_RGB_EXT 0x20D9
+#define GLX_TEXTURE_FORMAT_RGBA_EXT 0x20DA
+
+#define GLX_TEXTURE_1D_BIT_EXT 0x00000001
+#define GLX_TEXTURE_2D_BIT_EXT 0x00000002
+#define GLX_TEXTURE_RECTANGLE_BIT_EXT 0x00000004
+
+#define GLX_TEXTURE_1D_EXT 0x20DB
+#define GLX_TEXTURE_2D_EXT 0x20DC
+#define GLX_TEXTURE_RECTANGLE_EXT 0x20DD
+
+#define GLX_FRONT_LEFT_EXT 0x20DE
+#define GLX_FRONT_RIGHT_EXT 0x20DF
+#define GLX_BACK_LEFT_EXT 0x20E0
+#define GLX_BACK_RIGHT_EXT 0x20E1
+#define GLX_FRONT_EXT GLX_FRONT_LEFT_EXT
+#define GLX_BACK_EXT GLX_BACK_LEFT_EXT
+#define GLX_AUX0_EXT 0x20E2
+#define GLX_AUX1_EXT 0x20E3
+#define GLX_AUX2_EXT 0x20E4
+#define GLX_AUX3_EXT 0x20E5
+#define GLX_AUX4_EXT 0x20E6
+#define GLX_AUX5_EXT 0x20E7
+#define GLX_AUX6_EXT 0x20E8
+#define GLX_AUX7_EXT 0x20E9
+#define GLX_AUX8_EXT 0x20EA
+#define GLX_AUX9_EXT 0x20EB
+
+extern void glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer, const int *attrib_list);
+extern void glXReleaseTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer);
+
+#endif /* GLX_EXT_texture_from_pixmap */
+
+
+
+
+/*** Should these go here, or in another header? */
+/*
+** GLX Events
+*/
+typedef struct {
+ int event_type; /* GLX_DAMAGED or GLX_SAVED */
+ int draw_type; /* GLX_WINDOW or GLX_PBUFFER */
+ unsigned long serial; /* # of last request processed by server */
+ Bool send_event; /* true if this came for SendEvent request */
+ Display *display; /* display the event was read from */
+ GLXDrawable drawable; /* XID of Drawable */
+ unsigned int buffer_mask; /* mask indicating which buffers are affected */
+ unsigned int aux_buffer; /* which aux buffer was affected */
+ int x, y;
+ int width, height;
+ int count; /* if nonzero, at least this many more */
+} GLXPbufferClobberEvent;
+
+typedef union __GLXEvent {
+ GLXPbufferClobberEvent glxpbufferclobber;
+ long pad[24];
+} GLXEvent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx_mangle.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx_mangle.h
new file mode 100644
index 0000000..4439a96
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glx_mangle.h
@@ -0,0 +1,81 @@
+/*
+ * Mesa 3-D graphics library
+ * Version: 6.5
+ *
+ * Copyright (C) 1999-2006 Brian Paul All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#ifndef GLX_MANGLE_H
+#define GLX_MANGLE_H
+
+#define glXChooseVisual mglXChooseVisual
+#define glXCreateContext mglXCreateContext
+#define glXDestroyContext mglXDestroyContext
+#define glXMakeCurrent mglXMakeCurrent
+#define glXCopyContext mglXCopyContext
+#define glXSwapBuffers mglXSwapBuffers
+#define glXCreateGLXPixmap mglXCreateGLXPixmap
+#define glXDestroyGLXPixmap mglXDestroyGLXPixmap
+#define glXQueryExtension mglXQueryExtension
+#define glXQueryVersion mglXQueryVersion
+#define glXIsDirect mglXIsDirect
+#define glXGetConfig mglXGetConfig
+#define glXGetCurrentContext mglXGetCurrentContext
+#define glXGetCurrentDrawable mglXGetCurrentDrawable
+#define glXWaitGL mglXWaitGL
+#define glXWaitX mglXWaitX
+#define glXUseXFont mglXUseXFont
+#define glXQueryExtensionsString mglXQueryExtensionsString
+#define glXQueryServerString mglXQueryServerString
+#define glXGetClientString mglXGetClientString
+#define glXCreateGLXPixmapMESA mglXCreateGLXPixmapMESA
+#define glXReleaseBuffersMESA mglXReleaseBuffersMESA
+#define glXCopySubBufferMESA mglXCopySubBufferMESA
+#define glXGetVideoSyncSGI mglXGetVideoSyncSGI
+#define glXWaitVideoSyncSGI mglXWaitVideoSyncSGI
+
+/* GLX 1.2 */
+#define glXGetCurrentDisplay mglXGetCurrentDisplay
+
+/* GLX 1.3 */
+#define glXChooseFBConfig mglXChooseFBConfig
+#define glXGetFBConfigAttrib mglXGetFBConfigAttrib
+#define glXGetFBConfigs mglXGetFBConfigs
+#define glXGetVisualFromFBConfig mglXGetVisualFromFBConfig
+#define glXCreateWindow mglXCreateWindow
+#define glXDestroyWindow mglXDestroyWindow
+#define glXCreatePixmap mglXCreatePixmap
+#define glXDestroyPixmap mglXDestroyPixmap
+#define glXCreatePbuffer mglXCreatePbuffer
+#define glXDestroyPbuffer mglXDestroyPbuffer
+#define glXQueryDrawable mglXQueryDrawable
+#define glXCreateNewContext mglXCreateNewContext
+#define glXMakeContextCurrent mglXMakeContextCurrent
+#define glXGetCurrentReadDrawable mglXGetCurrentReadDrawable
+#define glXQueryContext mglXQueryContext
+#define glXSelectEvent mglXSelectEvent
+#define glXGetSelectedEvent mglXGetSelectedEvent
+
+/* GLX 1.4 */
+#define glXGetProcAddress mglXGetProcAddress
+
+
+#endif
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glxext.h b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glxext.h
new file mode 100644
index 0000000..0f66df6
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/GL/glxext.h
@@ -0,0 +1,785 @@
+#ifndef __glxext_h_
+#define __glxext_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** Copyright (c) 2007 The Khronos Group Inc.
+**
+** Permission is hereby granted, free of charge, to any person obtaining a
+** copy of this software and/or associated documentation files (the
+** "Materials"), to deal in the Materials without restriction, including
+** without limitation the rights to use, copy, modify, merge, publish,
+** distribute, sublicense, and/or sell copies of the Materials, and to
+** permit persons to whom the Materials are furnished to do so, subject to
+** the following conditions:
+**
+** The above copyright notice and this permission notice shall be included
+** in all copies or substantial portions of the Materials.
+**
+** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+*/
+
+#if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__) && !defined(__SCITECH_SNAP__)
+#define WIN32_LEAN_AND_MEAN 1
+#include <windows.h>
+#endif
+
+#ifndef APIENTRY
+#define APIENTRY
+#endif
+#ifndef APIENTRYP
+#define APIENTRYP APIENTRY *
+#endif
+#ifndef GLAPI
+#define GLAPI extern
+#endif
+
+/*************************************************************/
+
+/* Header file version number, required by OpenGL ABI for Linux */
+/* glxext.h last updated 2007/04/21 */
+/* Current version at http://www.opengl.org/registry/ */
+#define GLX_GLXEXT_VERSION 19
+
+#ifndef GLX_VERSION_1_3
+#define GLX_WINDOW_BIT 0x00000001
+#define GLX_PIXMAP_BIT 0x00000002
+#define GLX_PBUFFER_BIT 0x00000004
+#define GLX_RGBA_BIT 0x00000001
+#define GLX_COLOR_INDEX_BIT 0x00000002
+#define GLX_PBUFFER_CLOBBER_MASK 0x08000000
+#define GLX_FRONT_LEFT_BUFFER_BIT 0x00000001
+#define GLX_FRONT_RIGHT_BUFFER_BIT 0x00000002
+#define GLX_BACK_LEFT_BUFFER_BIT 0x00000004
+#define GLX_BACK_RIGHT_BUFFER_BIT 0x00000008
+#define GLX_AUX_BUFFERS_BIT 0x00000010
+#define GLX_DEPTH_BUFFER_BIT 0x00000020
+#define GLX_STENCIL_BUFFER_BIT 0x00000040
+#define GLX_ACCUM_BUFFER_BIT 0x00000080
+#define GLX_CONFIG_CAVEAT 0x20
+#define GLX_X_VISUAL_TYPE 0x22
+#define GLX_TRANSPARENT_TYPE 0x23
+#define GLX_TRANSPARENT_INDEX_VALUE 0x24
+#define GLX_TRANSPARENT_RED_VALUE 0x25
+#define GLX_TRANSPARENT_GREEN_VALUE 0x26
+#define GLX_TRANSPARENT_BLUE_VALUE 0x27
+#define GLX_TRANSPARENT_ALPHA_VALUE 0x28
+#define GLX_DONT_CARE 0xFFFFFFFF
+#define GLX_NONE 0x8000
+#define GLX_SLOW_CONFIG 0x8001
+#define GLX_TRUE_COLOR 0x8002
+#define GLX_DIRECT_COLOR 0x8003
+#define GLX_PSEUDO_COLOR 0x8004
+#define GLX_STATIC_COLOR 0x8005
+#define GLX_GRAY_SCALE 0x8006
+#define GLX_STATIC_GRAY 0x8007
+#define GLX_TRANSPARENT_RGB 0x8008
+#define GLX_TRANSPARENT_INDEX 0x8009
+#define GLX_VISUAL_ID 0x800B
+#define GLX_SCREEN 0x800C
+#define GLX_NON_CONFORMANT_CONFIG 0x800D
+#define GLX_DRAWABLE_TYPE 0x8010
+#define GLX_RENDER_TYPE 0x8011
+#define GLX_X_RENDERABLE 0x8012
+#define GLX_FBCONFIG_ID 0x8013
+#define GLX_RGBA_TYPE 0x8014
+#define GLX_COLOR_INDEX_TYPE 0x8015
+#define GLX_MAX_PBUFFER_WIDTH 0x8016
+#define GLX_MAX_PBUFFER_HEIGHT 0x8017
+#define GLX_MAX_PBUFFER_PIXELS 0x8018
+#define GLX_PRESERVED_CONTENTS 0x801B
+#define GLX_LARGEST_PBUFFER 0x801C
+#define GLX_WIDTH 0x801D
+#define GLX_HEIGHT 0x801E
+#define GLX_EVENT_MASK 0x801F
+#define GLX_DAMAGED 0x8020
+#define GLX_SAVED 0x8021
+#define GLX_WINDOW 0x8022
+#define GLX_PBUFFER 0x8023
+#define GLX_PBUFFER_HEIGHT 0x8040
+#define GLX_PBUFFER_WIDTH 0x8041
+#endif
+
+#ifndef GLX_VERSION_1_4
+#define GLX_SAMPLE_BUFFERS 100000
+#define GLX_SAMPLES 100001
+#endif
+
+#ifndef GLX_ARB_get_proc_address
+#endif
+
+#ifndef GLX_ARB_multisample
+#define GLX_SAMPLE_BUFFERS_ARB 100000
+#define GLX_SAMPLES_ARB 100001
+#endif
+
+#ifndef GLX_ARB_fbconfig_float
+#define GLX_RGBA_FLOAT_TYPE_ARB 0x20B9
+#define GLX_RGBA_FLOAT_BIT_ARB 0x00000004
+#endif
+
+#ifndef GLX_SGIS_multisample
+#define GLX_SAMPLE_BUFFERS_SGIS 100000
+#define GLX_SAMPLES_SGIS 100001
+#endif
+
+#ifndef GLX_EXT_visual_info
+#define GLX_X_VISUAL_TYPE_EXT 0x22
+#define GLX_TRANSPARENT_TYPE_EXT 0x23
+#define GLX_TRANSPARENT_INDEX_VALUE_EXT 0x24
+#define GLX_TRANSPARENT_RED_VALUE_EXT 0x25
+#define GLX_TRANSPARENT_GREEN_VALUE_EXT 0x26
+#define GLX_TRANSPARENT_BLUE_VALUE_EXT 0x27
+#define GLX_TRANSPARENT_ALPHA_VALUE_EXT 0x28
+#define GLX_NONE_EXT 0x8000
+#define GLX_TRUE_COLOR_EXT 0x8002
+#define GLX_DIRECT_COLOR_EXT 0x8003
+#define GLX_PSEUDO_COLOR_EXT 0x8004
+#define GLX_STATIC_COLOR_EXT 0x8005
+#define GLX_GRAY_SCALE_EXT 0x8006
+#define GLX_STATIC_GRAY_EXT 0x8007
+#define GLX_TRANSPARENT_RGB_EXT 0x8008
+#define GLX_TRANSPARENT_INDEX_EXT 0x8009
+#endif
+
+#ifndef GLX_SGI_swap_control
+#endif
+
+#ifndef GLX_SGI_video_sync
+#endif
+
+#ifndef GLX_SGI_make_current_read
+#endif
+
+#ifndef GLX_SGIX_video_source
+#endif
+
+#ifndef GLX_EXT_visual_rating
+#define GLX_VISUAL_CAVEAT_EXT 0x20
+#define GLX_SLOW_VISUAL_EXT 0x8001
+#define GLX_NON_CONFORMANT_VISUAL_EXT 0x800D
+/* reuse GLX_NONE_EXT */
+#endif
+
+#ifndef GLX_EXT_import_context
+#define GLX_SHARE_CONTEXT_EXT 0x800A
+#define GLX_VISUAL_ID_EXT 0x800B
+#define GLX_SCREEN_EXT 0x800C
+#endif
+
+#ifndef GLX_SGIX_fbconfig
+#define GLX_WINDOW_BIT_SGIX 0x00000001
+#define GLX_PIXMAP_BIT_SGIX 0x00000002
+#define GLX_RGBA_BIT_SGIX 0x00000001
+#define GLX_COLOR_INDEX_BIT_SGIX 0x00000002
+#define GLX_DRAWABLE_TYPE_SGIX 0x8010
+#define GLX_RENDER_TYPE_SGIX 0x8011
+#define GLX_X_RENDERABLE_SGIX 0x8012
+#define GLX_FBCONFIG_ID_SGIX 0x8013
+#define GLX_RGBA_TYPE_SGIX 0x8014
+#define GLX_COLOR_INDEX_TYPE_SGIX 0x8015
+/* reuse GLX_SCREEN_EXT */
+#endif
+
+#ifndef GLX_SGIX_pbuffer
+#define GLX_PBUFFER_BIT_SGIX 0x00000004
+#define GLX_BUFFER_CLOBBER_MASK_SGIX 0x08000000
+#define GLX_FRONT_LEFT_BUFFER_BIT_SGIX 0x00000001
+#define GLX_FRONT_RIGHT_BUFFER_BIT_SGIX 0x00000002
+#define GLX_BACK_LEFT_BUFFER_BIT_SGIX 0x00000004
+#define GLX_BACK_RIGHT_BUFFER_BIT_SGIX 0x00000008
+#define GLX_AUX_BUFFERS_BIT_SGIX 0x00000010
+#define GLX_DEPTH_BUFFER_BIT_SGIX 0x00000020
+#define GLX_STENCIL_BUFFER_BIT_SGIX 0x00000040
+#define GLX_ACCUM_BUFFER_BIT_SGIX 0x00000080
+#define GLX_SAMPLE_BUFFERS_BIT_SGIX 0x00000100
+#define GLX_MAX_PBUFFER_WIDTH_SGIX 0x8016
+#define GLX_MAX_PBUFFER_HEIGHT_SGIX 0x8017
+#define GLX_MAX_PBUFFER_PIXELS_SGIX 0x8018
+#define GLX_OPTIMAL_PBUFFER_WIDTH_SGIX 0x8019
+#define GLX_OPTIMAL_PBUFFER_HEIGHT_SGIX 0x801A
+#define GLX_PRESERVED_CONTENTS_SGIX 0x801B
+#define GLX_LARGEST_PBUFFER_SGIX 0x801C
+#define GLX_WIDTH_SGIX 0x801D
+#define GLX_HEIGHT_SGIX 0x801E
+#define GLX_EVENT_MASK_SGIX 0x801F
+#define GLX_DAMAGED_SGIX 0x8020
+#define GLX_SAVED_SGIX 0x8021
+#define GLX_WINDOW_SGIX 0x8022
+#define GLX_PBUFFER_SGIX 0x8023
+#endif
+
+#ifndef GLX_SGI_cushion
+#endif
+
+#ifndef GLX_SGIX_video_resize
+#define GLX_SYNC_FRAME_SGIX 0x00000000
+#define GLX_SYNC_SWAP_SGIX 0x00000001
+#endif
+
+#ifndef GLX_SGIX_dmbuffer
+#define GLX_DIGITAL_MEDIA_PBUFFER_SGIX 0x8024
+#endif
+
+#ifndef GLX_SGIX_swap_group
+#endif
+
+#ifndef GLX_SGIX_swap_barrier
+#endif
+
+#ifndef GLX_SGIS_blended_overlay
+#define GLX_BLENDED_RGBA_SGIS 0x8025
+#endif
+
+#ifndef GLX_SGIS_shared_multisample
+#define GLX_MULTISAMPLE_SUB_RECT_WIDTH_SGIS 0x8026
+#define GLX_MULTISAMPLE_SUB_RECT_HEIGHT_SGIS 0x8027
+#endif
+
+#ifndef GLX_SUN_get_transparent_index
+#endif
+
+#ifndef GLX_3DFX_multisample
+#define GLX_SAMPLE_BUFFERS_3DFX 0x8050
+#define GLX_SAMPLES_3DFX 0x8051
+#endif
+
+#ifndef GLX_MESA_copy_sub_buffer
+#endif
+
+#ifndef GLX_MESA_pixmap_colormap
+#endif
+
+#ifndef GLX_MESA_release_buffers
+#endif
+
+#ifndef GLX_MESA_set_3dfx_mode
+#define GLX_3DFX_WINDOW_MODE_MESA 0x1
+#define GLX_3DFX_FULLSCREEN_MODE_MESA 0x2
+#endif
+
+#ifndef GLX_SGIX_visual_select_group
+#define GLX_VISUAL_SELECT_GROUP_SGIX 0x8028
+#endif
+
+#ifndef GLX_OML_swap_method
+#define GLX_SWAP_METHOD_OML 0x8060
+#define GLX_SWAP_EXCHANGE_OML 0x8061
+#define GLX_SWAP_COPY_OML 0x8062
+#define GLX_SWAP_UNDEFINED_OML 0x8063
+#endif
+
+#ifndef GLX_OML_sync_control
+#endif
+
+#ifndef GLX_NV_float_buffer
+#define GLX_FLOAT_COMPONENTS_NV 0x20B0
+#endif
+
+#ifndef GLX_SGIX_hyperpipe
+#define GLX_HYPERPIPE_PIPE_NAME_LENGTH_SGIX 80
+#define GLX_BAD_HYPERPIPE_CONFIG_SGIX 91
+#define GLX_BAD_HYPERPIPE_SGIX 92
+#define GLX_HYPERPIPE_DISPLAY_PIPE_SGIX 0x00000001
+#define GLX_HYPERPIPE_RENDER_PIPE_SGIX 0x00000002
+#define GLX_PIPE_RECT_SGIX 0x00000001
+#define GLX_PIPE_RECT_LIMITS_SGIX 0x00000002
+#define GLX_HYPERPIPE_STEREO_SGIX 0x00000003
+#define GLX_HYPERPIPE_PIXEL_AVERAGE_SGIX 0x00000004
+#define GLX_HYPERPIPE_ID_SGIX 0x8030
+#endif
+
+#ifndef GLX_MESA_agp_offset
+#endif
+
+#ifndef GLX_EXT_fbconfig_packed_float
+#define GLX_RGBA_UNSIGNED_FLOAT_TYPE_EXT 0x20B1
+#define GLX_RGBA_UNSIGNED_FLOAT_BIT_EXT 0x00000008
+#endif
+
+#ifndef GLX_EXT_framebuffer_sRGB
+#define GLX_FRAMEBUFFER_SRGB_CAPABLE_EXT 0x20B2
+#endif
+
+#ifndef GLX_EXT_texture_from_pixmap
+#define GLX_TEXTURE_1D_BIT_EXT 0x00000001
+#define GLX_TEXTURE_2D_BIT_EXT 0x00000002
+#define GLX_TEXTURE_RECTANGLE_BIT_EXT 0x00000004
+#define GLX_BIND_TO_TEXTURE_RGB_EXT 0x20D0
+#define GLX_BIND_TO_TEXTURE_RGBA_EXT 0x20D1
+#define GLX_BIND_TO_MIPMAP_TEXTURE_EXT 0x20D2
+#define GLX_BIND_TO_TEXTURE_TARGETS_EXT 0x20D3
+#define GLX_Y_INVERTED_EXT 0x20D4
+#define GLX_TEXTURE_FORMAT_EXT 0x20D5
+#define GLX_TEXTURE_TARGET_EXT 0x20D6
+#define GLX_MIPMAP_TEXTURE_EXT 0x20D7
+#define GLX_TEXTURE_FORMAT_NONE_EXT 0x20D8
+#define GLX_TEXTURE_FORMAT_RGB_EXT 0x20D9
+#define GLX_TEXTURE_FORMAT_RGBA_EXT 0x20DA
+#define GLX_TEXTURE_1D_EXT 0x20DB
+#define GLX_TEXTURE_2D_EXT 0x20DC
+#define GLX_TEXTURE_RECTANGLE_EXT 0x20DD
+#define GLX_FRONT_LEFT_EXT 0x20DE
+#define GLX_FRONT_RIGHT_EXT 0x20DF
+#define GLX_BACK_LEFT_EXT 0x20E0
+#define GLX_BACK_RIGHT_EXT 0x20E1
+#define GLX_FRONT_EXT GLX_FRONT_LEFT_EXT
+#define GLX_BACK_EXT GLX_BACK_LEFT_EXT
+#define GLX_AUX0_EXT 0x20E2
+#define GLX_AUX1_EXT 0x20E3
+#define GLX_AUX2_EXT 0x20E4
+#define GLX_AUX3_EXT 0x20E5
+#define GLX_AUX4_EXT 0x20E6
+#define GLX_AUX5_EXT 0x20E7
+#define GLX_AUX6_EXT 0x20E8
+#define GLX_AUX7_EXT 0x20E9
+#define GLX_AUX8_EXT 0x20EA
+#define GLX_AUX9_EXT 0x20EB
+#endif
+
+
+/*************************************************************/
+
+#ifndef GLX_ARB_get_proc_address
+typedef void (*__GLXextFuncPtr)(void);
+#endif
+
+#ifndef GLX_SGIX_video_source
+typedef XID GLXVideoSourceSGIX;
+#endif
+
+#ifndef GLX_SGIX_fbconfig
+typedef XID GLXFBConfigIDSGIX;
+typedef struct __GLXFBConfigRec *GLXFBConfigSGIX;
+#endif
+
+#ifndef GLX_SGIX_pbuffer
+typedef XID GLXPbufferSGIX;
+typedef struct {
+ int type;
+ unsigned long serial; /* # of last request processed by server */
+ Bool send_event; /* true if this came for SendEvent request */
+ Display *display; /* display the event was read from */
+ GLXDrawable drawable; /* i.d. of Drawable */
+ int event_type; /* GLX_DAMAGED_SGIX or GLX_SAVED_SGIX */
+ int draw_type; /* GLX_WINDOW_SGIX or GLX_PBUFFER_SGIX */
+ unsigned int mask; /* mask indicating which buffers are affected*/
+ int x, y;
+ int width, height;
+ int count; /* if nonzero, at least this many more */
+} GLXBufferClobberEventSGIX;
+#endif
+
+#ifndef GLEXT_64_TYPES_DEFINED
+/* This code block is duplicated in glxext.h, so must be protected */
+#define GLEXT_64_TYPES_DEFINED
+/* Define int32_t, int64_t, and uint64_t types for UST/MSC */
+/* (as used in the GLX_OML_sync_control extension). */
+#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+#include <inttypes.h>
+#elif defined(__sun__) || defined(__digital__)
+#include <inttypes.h>
+#if defined(__STDC__)
+#if defined(__arch64__)
+typedef long int int64_t;
+typedef unsigned long int uint64_t;
+#else
+typedef long long int int64_t;
+typedef unsigned long long int uint64_t;
+#endif /* __arch64__ */
+#endif /* __STDC__ */
+#elif defined( __VMS )
+#include <inttypes.h>
+#elif defined(__SCO__) || defined(__USLC__)
+#include <stdint.h>
+#elif defined(__UNIXOS2__) || defined(__SOL64__)
+typedef long int int32_t;
+typedef long long int int64_t;
+typedef unsigned long long int uint64_t;
+#elif defined(_WIN32) && defined(__GNUC__)
+#include <stdint.h>
+#elif defined(_WIN32)
+typedef __int32 int32_t;
+typedef __int64 int64_t;
+typedef unsigned __int64 uint64_t;
+#else
+#include <inttypes.h> /* Fallback option */
+#endif
+#endif
+
+#ifndef GLX_VERSION_1_3
+#define GLX_VERSION_1_3 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern GLXFBConfig * glXGetFBConfigs (Display *, int, int *);
+extern GLXFBConfig * glXChooseFBConfig (Display *, int, const int *, int *);
+extern int glXGetFBConfigAttrib (Display *, GLXFBConfig, int, int *);
+extern XVisualInfo * glXGetVisualFromFBConfig (Display *, GLXFBConfig);
+extern GLXWindow glXCreateWindow (Display *, GLXFBConfig, Window, const int *);
+extern void glXDestroyWindow (Display *, GLXWindow);
+extern GLXPixmap glXCreatePixmap (Display *, GLXFBConfig, Pixmap, const int *);
+extern void glXDestroyPixmap (Display *, GLXPixmap);
+extern GLXPbuffer glXCreatePbuffer (Display *, GLXFBConfig, const int *);
+extern void glXDestroyPbuffer (Display *, GLXPbuffer);
+extern void glXQueryDrawable (Display *, GLXDrawable, int, unsigned int *);
+extern GLXContext glXCreateNewContext (Display *, GLXFBConfig, int, GLXContext, Bool);
+extern Bool glXMakeContextCurrent (Display *, GLXDrawable, GLXDrawable, GLXContext);
+extern GLXDrawable glXGetCurrentReadDrawable (void);
+extern Display * glXGetCurrentDisplay (void);
+extern int glXQueryContext (Display *, GLXContext, int, int *);
+extern void glXSelectEvent (Display *, GLXDrawable, unsigned long);
+extern void glXGetSelectedEvent (Display *, GLXDrawable, unsigned long *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef GLXFBConfig * ( * PFNGLXGETFBCONFIGSPROC) (Display *dpy, int screen, int *nelements);
+typedef GLXFBConfig * ( * PFNGLXCHOOSEFBCONFIGPROC) (Display *dpy, int screen, const int *attrib_list, int *nelements);
+typedef int ( * PFNGLXGETFBCONFIGATTRIBPROC) (Display *dpy, GLXFBConfig config, int attribute, int *value);
+typedef XVisualInfo * ( * PFNGLXGETVISUALFROMFBCONFIGPROC) (Display *dpy, GLXFBConfig config);
+typedef GLXWindow ( * PFNGLXCREATEWINDOWPROC) (Display *dpy, GLXFBConfig config, Window win, const int *attrib_list);
+typedef void ( * PFNGLXDESTROYWINDOWPROC) (Display *dpy, GLXWindow win);
+typedef GLXPixmap ( * PFNGLXCREATEPIXMAPPROC) (Display *dpy, GLXFBConfig config, Pixmap pixmap, const int *attrib_list);
+typedef void ( * PFNGLXDESTROYPIXMAPPROC) (Display *dpy, GLXPixmap pixmap);
+typedef GLXPbuffer ( * PFNGLXCREATEPBUFFERPROC) (Display *dpy, GLXFBConfig config, const int *attrib_list);
+typedef void ( * PFNGLXDESTROYPBUFFERPROC) (Display *dpy, GLXPbuffer pbuf);
+typedef void ( * PFNGLXQUERYDRAWABLEPROC) (Display *dpy, GLXDrawable draw, int attribute, unsigned int *value);
+typedef GLXContext ( * PFNGLXCREATENEWCONTEXTPROC) (Display *dpy, GLXFBConfig config, int render_type, GLXContext share_list, Bool direct);
+typedef Bool ( * PFNGLXMAKECONTEXTCURRENTPROC) (Display *dpy, GLXDrawable draw, GLXDrawable read, GLXContext ctx);
+typedef GLXDrawable ( * PFNGLXGETCURRENTREADDRAWABLEPROC) (void);
+typedef Display * ( * PFNGLXGETCURRENTDISPLAYPROC) (void);
+typedef int ( * PFNGLXQUERYCONTEXTPROC) (Display *dpy, GLXContext ctx, int attribute, int *value);
+typedef void ( * PFNGLXSELECTEVENTPROC) (Display *dpy, GLXDrawable draw, unsigned long event_mask);
+typedef void ( * PFNGLXGETSELECTEDEVENTPROC) (Display *dpy, GLXDrawable draw, unsigned long *event_mask);
+#endif
+
+#ifndef GLX_VERSION_1_4
+#define GLX_VERSION_1_4 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern __GLXextFuncPtr glXGetProcAddress (const GLubyte *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef __GLXextFuncPtr ( * PFNGLXGETPROCADDRESSPROC) (const GLubyte *procName);
+#endif
+
+#ifndef GLX_ARB_get_proc_address
+#define GLX_ARB_get_proc_address 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern __GLXextFuncPtr glXGetProcAddressARB (const GLubyte *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef __GLXextFuncPtr ( * PFNGLXGETPROCADDRESSARBPROC) (const GLubyte *procName);
+#endif
+
+#ifndef GLX_ARB_multisample
+#define GLX_ARB_multisample 1
+#endif
+
+#ifndef GLX_ARB_fbconfig_float
+#define GLX_ARB_fbconfig_float 1
+#endif
+
+#ifndef GLX_SGIS_multisample
+#define GLX_SGIS_multisample 1
+#endif
+
+#ifndef GLX_EXT_visual_info
+#define GLX_EXT_visual_info 1
+#endif
+
+#ifndef GLX_SGI_swap_control
+#define GLX_SGI_swap_control 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern int glXSwapIntervalSGI (int);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef int ( * PFNGLXSWAPINTERVALSGIPROC) (int interval);
+#endif
+
+#ifndef GLX_SGI_video_sync
+#define GLX_SGI_video_sync 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern int glXGetVideoSyncSGI (unsigned int *);
+extern int glXWaitVideoSyncSGI (int, int, unsigned int *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef int ( * PFNGLXGETVIDEOSYNCSGIPROC) (unsigned int *count);
+typedef int ( * PFNGLXWAITVIDEOSYNCSGIPROC) (int divisor, int remainder, unsigned int *count);
+#endif
+
+#ifndef GLX_SGI_make_current_read
+#define GLX_SGI_make_current_read 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Bool glXMakeCurrentReadSGI (Display *, GLXDrawable, GLXDrawable, GLXContext);
+extern GLXDrawable glXGetCurrentReadDrawableSGI (void);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Bool ( * PFNGLXMAKECURRENTREADSGIPROC) (Display *dpy, GLXDrawable draw, GLXDrawable read, GLXContext ctx);
+typedef GLXDrawable ( * PFNGLXGETCURRENTREADDRAWABLESGIPROC) (void);
+#endif
+
+#ifndef GLX_SGIX_video_source
+#define GLX_SGIX_video_source 1
+#ifdef _VL_H
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern GLXVideoSourceSGIX glXCreateGLXVideoSourceSGIX (Display *, int, VLServer, VLPath, int, VLNode);
+extern void glXDestroyGLXVideoSourceSGIX (Display *, GLXVideoSourceSGIX);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef GLXVideoSourceSGIX ( * PFNGLXCREATEGLXVIDEOSOURCESGIXPROC) (Display *display, int screen, VLServer server, VLPath path, int nodeClass, VLNode drainNode);
+typedef void ( * PFNGLXDESTROYGLXVIDEOSOURCESGIXPROC) (Display *dpy, GLXVideoSourceSGIX glxvideosource);
+#endif /* _VL_H */
+#endif
+
+#ifndef GLX_EXT_visual_rating
+#define GLX_EXT_visual_rating 1
+#endif
+
+#ifndef GLX_EXT_import_context
+#define GLX_EXT_import_context 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Display * glXGetCurrentDisplayEXT (void);
+extern int glXQueryContextInfoEXT (Display *, GLXContext, int, int *);
+extern GLXContextID glXGetContextIDEXT (const GLXContext);
+extern GLXContext glXImportContextEXT (Display *, GLXContextID);
+extern void glXFreeContextEXT (Display *, GLXContext);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Display * ( * PFNGLXGETCURRENTDISPLAYEXTPROC) (void);
+typedef int ( * PFNGLXQUERYCONTEXTINFOEXTPROC) (Display *dpy, GLXContext context, int attribute, int *value);
+typedef GLXContextID ( * PFNGLXGETCONTEXTIDEXTPROC) (const GLXContext context);
+typedef GLXContext ( * PFNGLXIMPORTCONTEXTEXTPROC) (Display *dpy, GLXContextID contextID);
+typedef void ( * PFNGLXFREECONTEXTEXTPROC) (Display *dpy, GLXContext context);
+#endif
+
+#ifndef GLX_SGIX_fbconfig
+#define GLX_SGIX_fbconfig 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern int glXGetFBConfigAttribSGIX (Display *, GLXFBConfigSGIX, int, int *);
+extern GLXFBConfigSGIX * glXChooseFBConfigSGIX (Display *, int, int *, int *);
+extern GLXPixmap glXCreateGLXPixmapWithConfigSGIX (Display *, GLXFBConfigSGIX, Pixmap);
+extern GLXContext glXCreateContextWithConfigSGIX (Display *, GLXFBConfigSGIX, int, GLXContext, Bool);
+extern XVisualInfo * glXGetVisualFromFBConfigSGIX (Display *, GLXFBConfigSGIX);
+extern GLXFBConfigSGIX glXGetFBConfigFromVisualSGIX (Display *, XVisualInfo *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef int ( * PFNGLXGETFBCONFIGATTRIBSGIXPROC) (Display *dpy, GLXFBConfigSGIX config, int attribute, int *value);
+typedef GLXFBConfigSGIX * ( * PFNGLXCHOOSEFBCONFIGSGIXPROC) (Display *dpy, int screen, int *attrib_list, int *nelements);
+typedef GLXPixmap ( * PFNGLXCREATEGLXPIXMAPWITHCONFIGSGIXPROC) (Display *dpy, GLXFBConfigSGIX config, Pixmap pixmap);
+typedef GLXContext ( * PFNGLXCREATECONTEXTWITHCONFIGSGIXPROC) (Display *dpy, GLXFBConfigSGIX config, int render_type, GLXContext share_list, Bool direct);
+typedef XVisualInfo * ( * PFNGLXGETVISUALFROMFBCONFIGSGIXPROC) (Display *dpy, GLXFBConfigSGIX config);
+typedef GLXFBConfigSGIX ( * PFNGLXGETFBCONFIGFROMVISUALSGIXPROC) (Display *dpy, XVisualInfo *vis);
+#endif
+
+#ifndef GLX_SGIX_pbuffer
+#define GLX_SGIX_pbuffer 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern GLXPbufferSGIX glXCreateGLXPbufferSGIX (Display *, GLXFBConfigSGIX, unsigned int, unsigned int, int *);
+extern void glXDestroyGLXPbufferSGIX (Display *, GLXPbufferSGIX);
+extern int glXQueryGLXPbufferSGIX (Display *, GLXPbufferSGIX, int, unsigned int *);
+extern void glXSelectEventSGIX (Display *, GLXDrawable, unsigned long);
+extern void glXGetSelectedEventSGIX (Display *, GLXDrawable, unsigned long *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef GLXPbufferSGIX ( * PFNGLXCREATEGLXPBUFFERSGIXPROC) (Display *dpy, GLXFBConfigSGIX config, unsigned int width, unsigned int height, int *attrib_list);
+typedef void ( * PFNGLXDESTROYGLXPBUFFERSGIXPROC) (Display *dpy, GLXPbufferSGIX pbuf);
+typedef int ( * PFNGLXQUERYGLXPBUFFERSGIXPROC) (Display *dpy, GLXPbufferSGIX pbuf, int attribute, unsigned int *value);
+typedef void ( * PFNGLXSELECTEVENTSGIXPROC) (Display *dpy, GLXDrawable drawable, unsigned long mask);
+typedef void ( * PFNGLXGETSELECTEDEVENTSGIXPROC) (Display *dpy, GLXDrawable drawable, unsigned long *mask);
+#endif
+
+#ifndef GLX_SGI_cushion
+#define GLX_SGI_cushion 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern void glXCushionSGI (Display *, Window, float);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef void ( * PFNGLXCUSHIONSGIPROC) (Display *dpy, Window window, float cushion);
+#endif
+
+#ifndef GLX_SGIX_video_resize
+#define GLX_SGIX_video_resize 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern int glXBindChannelToWindowSGIX (Display *, int, int, Window);
+extern int glXChannelRectSGIX (Display *, int, int, int, int, int, int);
+extern int glXQueryChannelRectSGIX (Display *, int, int, int *, int *, int *, int *);
+extern int glXQueryChannelDeltasSGIX (Display *, int, int, int *, int *, int *, int *);
+extern int glXChannelRectSyncSGIX (Display *, int, int, GLenum);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef int ( * PFNGLXBINDCHANNELTOWINDOWSGIXPROC) (Display *display, int screen, int channel, Window window);
+typedef int ( * PFNGLXCHANNELRECTSGIXPROC) (Display *display, int screen, int channel, int x, int y, int w, int h);
+typedef int ( * PFNGLXQUERYCHANNELRECTSGIXPROC) (Display *display, int screen, int channel, int *dx, int *dy, int *dw, int *dh);
+typedef int ( * PFNGLXQUERYCHANNELDELTASSGIXPROC) (Display *display, int screen, int channel, int *x, int *y, int *w, int *h);
+typedef int ( * PFNGLXCHANNELRECTSYNCSGIXPROC) (Display *display, int screen, int channel, GLenum synctype);
+#endif
+
+#ifndef GLX_SGIX_dmbuffer
+#define GLX_SGIX_dmbuffer 1
+#ifdef _DM_BUFFER_H_
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Bool glXAssociateDMPbufferSGIX (Display *, GLXPbufferSGIX, DMparams *, DMbuffer);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Bool ( * PFNGLXASSOCIATEDMPBUFFERSGIXPROC) (Display *dpy, GLXPbufferSGIX pbuffer, DMparams *params, DMbuffer dmbuffer);
+#endif /* _DM_BUFFER_H_ */
+#endif
+
+#ifndef GLX_SGIX_swap_group
+#define GLX_SGIX_swap_group 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern void glXJoinSwapGroupSGIX (Display *, GLXDrawable, GLXDrawable);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef void ( * PFNGLXJOINSWAPGROUPSGIXPROC) (Display *dpy, GLXDrawable drawable, GLXDrawable member);
+#endif
+
+#ifndef GLX_SGIX_swap_barrier
+#define GLX_SGIX_swap_barrier 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern void glXBindSwapBarrierSGIX (Display *, GLXDrawable, int);
+extern Bool glXQueryMaxSwapBarriersSGIX (Display *, int, int *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef void ( * PFNGLXBINDSWAPBARRIERSGIXPROC) (Display *dpy, GLXDrawable drawable, int barrier);
+typedef Bool ( * PFNGLXQUERYMAXSWAPBARRIERSSGIXPROC) (Display *dpy, int screen, int *max);
+#endif
+
+#ifndef GLX_SUN_get_transparent_index
+#define GLX_SUN_get_transparent_index 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Status glXGetTransparentIndexSUN (Display *, Window, Window, long *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Status ( * PFNGLXGETTRANSPARENTINDEXSUNPROC) (Display *dpy, Window overlay, Window underlay, long *pTransparentIndex);
+#endif
+
+#ifndef GLX_MESA_copy_sub_buffer
+#define GLX_MESA_copy_sub_buffer 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern void glXCopySubBufferMESA (Display *, GLXDrawable, int, int, int, int);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef void ( * PFNGLXCOPYSUBBUFFERMESAPROC) (Display *dpy, GLXDrawable drawable, int x, int y, int width, int height);
+#endif
+
+#ifndef GLX_MESA_pixmap_colormap
+#define GLX_MESA_pixmap_colormap 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern GLXPixmap glXCreateGLXPixmapMESA (Display *, XVisualInfo *, Pixmap, Colormap);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef GLXPixmap ( * PFNGLXCREATEGLXPIXMAPMESAPROC) (Display *dpy, XVisualInfo *visual, Pixmap pixmap, Colormap cmap);
+#endif
+
+#ifndef GLX_MESA_release_buffers
+#define GLX_MESA_release_buffers 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Bool glXReleaseBuffersMESA (Display *, GLXDrawable);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Bool ( * PFNGLXRELEASEBUFFERSMESAPROC) (Display *dpy, GLXDrawable drawable);
+#endif
+
+#ifndef GLX_MESA_set_3dfx_mode
+#define GLX_MESA_set_3dfx_mode 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Bool glXSet3DfxModeMESA (int);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Bool ( * PFNGLXSET3DFXMODEMESAPROC) (int mode);
+#endif
+
+#ifndef GLX_SGIX_visual_select_group
+#define GLX_SGIX_visual_select_group 1
+#endif
+
+#ifndef GLX_OML_swap_method
+#define GLX_OML_swap_method 1
+#endif
+
+#ifndef GLX_OML_sync_control
+#define GLX_OML_sync_control 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern Bool glXGetSyncValuesOML (Display *, GLXDrawable, int64_t *, int64_t *, int64_t *);
+extern Bool glXGetMscRateOML (Display *, GLXDrawable, int32_t *, int32_t *);
+extern int64_t glXSwapBuffersMscOML (Display *, GLXDrawable, int64_t, int64_t, int64_t);
+extern Bool glXWaitForMscOML (Display *, GLXDrawable, int64_t, int64_t, int64_t, int64_t *, int64_t *, int64_t *);
+extern Bool glXWaitForSbcOML (Display *, GLXDrawable, int64_t, int64_t *, int64_t *, int64_t *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef Bool ( * PFNGLXGETSYNCVALUESOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t *ust, int64_t *msc, int64_t *sbc);
+typedef Bool ( * PFNGLXGETMSCRATEOMLPROC) (Display *dpy, GLXDrawable drawable, int32_t *numerator, int32_t *denominator);
+typedef int64_t ( * PFNGLXSWAPBUFFERSMSCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_msc, int64_t divisor, int64_t remainder);
+typedef Bool ( * PFNGLXWAITFORMSCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_msc, int64_t divisor, int64_t remainder, int64_t *ust, int64_t *msc, int64_t *sbc);
+typedef Bool ( * PFNGLXWAITFORSBCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_sbc, int64_t *ust, int64_t *msc, int64_t *sbc);
+#endif
+
+#ifndef GLX_NV_float_buffer
+#define GLX_NV_float_buffer 1
+#endif
+
+#ifndef GLX_SGIX_hyperpipe
+#define GLX_SGIX_hyperpipe 1
+
+typedef struct {
+ char pipeName[GLX_HYPERPIPE_PIPE_NAME_LENGTH_SGIX];
+ int networkId;
+} GLXHyperpipeNetworkSGIX;
+
+typedef struct {
+ char pipeName[GLX_HYPERPIPE_PIPE_NAME_LENGTH_SGIX];
+ int channel;
+ unsigned int
+ participationType;
+ int timeSlice;
+} GLXHyperpipeConfigSGIX;
+
+typedef struct {
+ char pipeName[GLX_HYPERPIPE_PIPE_NAME_LENGTH_SGIX];
+ int srcXOrigin, srcYOrigin, srcWidth, srcHeight;
+ int destXOrigin, destYOrigin, destWidth, destHeight;
+} GLXPipeRect;
+
+typedef struct {
+ char pipeName[GLX_HYPERPIPE_PIPE_NAME_LENGTH_SGIX];
+ int XOrigin, YOrigin, maxHeight, maxWidth;
+} GLXPipeRectLimits;
+
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern GLXHyperpipeNetworkSGIX * glXQueryHyperpipeNetworkSGIX (Display *, int *);
+extern int glXHyperpipeConfigSGIX (Display *, int, int, GLXHyperpipeConfigSGIX *, int *);
+extern GLXHyperpipeConfigSGIX * glXQueryHyperpipeConfigSGIX (Display *, int, int *);
+extern int glXDestroyHyperpipeConfigSGIX (Display *, int);
+extern int glXBindHyperpipeSGIX (Display *, int);
+extern int glXQueryHyperpipeBestAttribSGIX (Display *, int, int, int, void *, void *);
+extern int glXHyperpipeAttribSGIX (Display *, int, int, int, void *);
+extern int glXQueryHyperpipeAttribSGIX (Display *, int, int, int, void *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef GLXHyperpipeNetworkSGIX * ( * PFNGLXQUERYHYPERPIPENETWORKSGIXPROC) (Display *dpy, int *npipes);
+typedef int ( * PFNGLXHYPERPIPECONFIGSGIXPROC) (Display *dpy, int networkId, int npipes, GLXHyperpipeConfigSGIX *cfg, int *hpId);
+typedef GLXHyperpipeConfigSGIX * ( * PFNGLXQUERYHYPERPIPECONFIGSGIXPROC) (Display *dpy, int hpId, int *npipes);
+typedef int ( * PFNGLXDESTROYHYPERPIPECONFIGSGIXPROC) (Display *dpy, int hpId);
+typedef int ( * PFNGLXBINDHYPERPIPESGIXPROC) (Display *dpy, int hpId);
+typedef int ( * PFNGLXQUERYHYPERPIPEBESTATTRIBSGIXPROC) (Display *dpy, int timeSlice, int attrib, int size, void *attribList, void *returnAttribList);
+typedef int ( * PFNGLXHYPERPIPEATTRIBSGIXPROC) (Display *dpy, int timeSlice, int attrib, int size, void *attribList);
+typedef int ( * PFNGLXQUERYHYPERPIPEATTRIBSGIXPROC) (Display *dpy, int timeSlice, int attrib, int size, void *returnAttribList);
+#endif
+
+#ifndef GLX_MESA_agp_offset
+#define GLX_MESA_agp_offset 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern unsigned int glXGetAGPOffsetMESA (const void *);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef unsigned int ( * PFNGLXGETAGPOFFSETMESAPROC) (const void *pointer);
+#endif
+
+#ifndef GLX_EXT_fbconfig_packed_float
+#define GLX_EXT_fbconfig_packed_float 1
+#endif
+
+#ifndef GLX_EXT_framebuffer_sRGB
+#define GLX_EXT_framebuffer_sRGB 1
+#endif
+
+#ifndef GLX_EXT_texture_from_pixmap
+#define GLX_EXT_texture_from_pixmap 1
+#ifdef GLX_GLXEXT_PROTOTYPES
+extern void glXBindTexImageEXT (Display *, GLXDrawable, int, const int *);
+extern void glXReleaseTexImageEXT (Display *, GLXDrawable, int);
+#endif /* GLX_GLXEXT_PROTOTYPES */
+typedef void ( * PFNGLXBINDTEXIMAGEEXTPROC) (Display *dpy, GLXDrawable drawable, int buffer, const int *attrib_list);
+typedef void ( * PFNGLXRELEASETEXIMAGEEXTPROC) (Display *dpy, GLXDrawable drawable, int buffer);
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so
new file mode 100644
index 0000000..ebaa858
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1
new file mode 100644
index 0000000..ebaa858
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1.2 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1.2
new file mode 100644
index 0000000..ebaa858
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libGL.so.1.2
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libX11.so.6.2 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libX11.so.6.2
new file mode 100644
index 0000000..2931d5d
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libX11.so.6.2
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6
new file mode 100644
index 0000000..f6d639a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6
Binary files differ
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0
new file mode 100644
index 0000000..f6d639a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0
Binary files differ
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0.0
new file mode 100644
index 0000000..f6d639a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXau.so.6.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1
new file mode 100644
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--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1
new file mode 100644
index 0000000..47f9431
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1.0
new file mode 100644
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--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdamage.so.1.1.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6
new file mode 100644
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--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0
new file mode 100644
index 0000000..16ca246
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0.0
new file mode 100644
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--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXdmcp.so.6.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6
new file mode 100644
index 0000000..0d1269c
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4
new file mode 100644
index 0000000..0d1269c
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4.0
new file mode 100644
index 0000000..0d1269c
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXext.so.6.4.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3
new file mode 100644
index 0000000..1c57ebe
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1
new file mode 100644
index 0000000..1c57ebe
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1.0
new file mode 100644
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--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXfixes.so.3.1.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1
new file mode 100644
index 0000000..65b501a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0
new file mode 100644
index 0000000..65b501a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0.0
new file mode 100644
index 0000000..65b501a
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libXxf86vm.so.1.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libasound.so.2.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libasound.so.2.0
new file mode 100644
index 0000000..79a55ee
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libasound.so.2.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2
new file mode 100644
index 0000000..6621e10
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3
new file mode 100644
index 0000000..6621e10
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3.0
new file mode 100644
index 0000000..6621e10
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libdrm.so.2.3.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libesd.so.0.2 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libesd.so.0.2
new file mode 100644
index 0000000..a7c8c55
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libesd.so.0.2
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse-simple.so.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse-simple.so.0.0
new file mode 100644
index 0000000..7f19b70
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse-simple.so.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse.so.0.4 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse.so.0.4
new file mode 100644
index 0000000..6f013bb
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libpulse.so.0.4
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0
new file mode 100644
index 0000000..185540b
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0
new file mode 100644
index 0000000..185540b
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0.0
new file mode 100644
index 0000000..185540b
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb-xlib.so.0.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1
new file mode 100644
index 0000000..bc66171
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1
Binary files differ
diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0
new file mode 100644
index 0000000..bc66171
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0.0 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0.0
new file mode 100644
index 0000000..bc66171
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libxcb.so.1.0.0
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diff --git a/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libz.so.1.2.3 b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libz.so.1.2.3
new file mode 100644
index 0000000..1711f99
--- /dev/null
+++ b/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/libz.so.1.2.3
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diff --git a/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/machine/_types.h b/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/machine/_types.h
index be4f6e4..ec75dfa 100644
--- a/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/machine/_types.h
+++ b/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/machine/_types.h
@@ -36,8 +36,8 @@
#define _I386__TYPES_H_
/* the kernel defines size_t as unsigned int, but g++ wants it to be unsigned long */
-#ifndef _SIZE_T
-# define _SIZE_T
+#ifndef _SIZE_T_DEFINED_
+# define _SIZE_T_DEFINED_
# ifdef ANDROID
typedef unsigned int size_t;
# else
diff --git a/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/machine/_types.h b/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/machine/_types.h
index be4f6e4..274e169 100644
--- a/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/machine/_types.h
+++ b/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/machine/_types.h
@@ -54,9 +54,6 @@
typedef long ptrdiff_t;
#endif
-#define _OFF_T_DEFINED_
-#define _SIZE_T_DEFINED_
-
#include <linux/types.h>
/* 7.18.1.1 Exact-width integer types */
